blob: c026dcaaccc87866fd5ead96845cc678cffb8c6a [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
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Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
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518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
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Marat Dukhan062bee32021-05-27 20:31:07 -0700528 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700529 "src/qs8-vadd/gen/minmax-scalar-x1.c",
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533 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
534 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700535 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/qu8-gemm/2x2-minmax-scalar.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700542 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700544 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700545 "src/qu8-requantization/rndna-scalar-signed64.c",
546 "src/qu8-requantization/rndna-scalar-unsigned32.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -0700548 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700549 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700550 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700551 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700553 "src/x8-lut/scalar.c",
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556 "src/x8-zip/x4-scalar.c",
557 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800558 "src/x32-depthtospace2d-chw2hwc/scalar.c",
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560 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700561 "src/x32-packx/x2-scalar.c",
562 "src/x32-packx/x3-scalar.c",
563 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700564 "src/x32-pad/scalar-float.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700566 "src/x32-unpool/scalar.c",
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Marat Dukhan436ebe62019-12-04 15:10:12 -0800574WASM_UKERNELS = [
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001314 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
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Marat Dukhaned6baaf2020-12-01 15:07:08 -08001318 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07001345 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001356 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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1365 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001370 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
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1372 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
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1375 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
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1378 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
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1380 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07001382 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
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1385 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1386 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
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1388 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1389 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001390 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1391 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1393 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001394 "src/math/roundd-wasmsimd-addsub.c",
1395 "src/math/roundd-wasmsimd-cvt.c",
1396 "src/math/roundne-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-addsub.c",
1398 "src/math/roundu-wasmsimd-cvt.c",
1399 "src/math/roundz-wasmsimd-addsub.c",
1400 "src/math/roundz-wasmsimd-cvt.c",
1401 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1402 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001403 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1405 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1407 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
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Marat Dukhanb5e3d172020-08-06 13:29:53 -07001409 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
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1423 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
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1428 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1429 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001430 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001431 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001432 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1433 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
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1435 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001440 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001441 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001442 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001443 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001444 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001445 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001446 "src/x32-zip/x2-wasmsimd.c",
1447 "src/x32-zip/x3-wasmsimd.c",
1448 "src/x32-zip/x4-wasmsimd.c",
1449 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001450]
1451
Marat Dukhan08c4a432019-10-03 09:29:21 -07001452# ISA-specific micro-kernels
1453NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001454 "src/f32-argmaxpool/4x-neon-c4.c",
1455 "src/f32-argmaxpool/9p8x-neon-c4.c",
1456 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001457 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1458 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001462 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001466 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001467 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001469 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001471 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001473 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1475 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1477 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001479 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1489 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1497 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1510 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001520 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001521 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001522 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1523 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1526 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1530 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1531 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1532 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1536 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001537 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1538 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001539 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1540 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1541 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1542 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1546 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1547 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1548 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1552 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1553 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1554 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001555 "src/f32-ibilinear-chw/gen/neon-p4.c",
1556 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001557 "src/f32-ibilinear/gen/neon-c4.c",
1558 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001560 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001562 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1563 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001565 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1567 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1568 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1570 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1572 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001573 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1574 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001575 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1577 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001578 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1579 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001580 "src/f32-prelu/gen/neon-1x4.c",
1581 "src/f32-prelu/gen/neon-1x8.c",
1582 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001583 "src/f32-prelu/gen/neon-2x4.c",
1584 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001585 "src/f32-prelu/gen/neon-2x16.c",
1586 "src/f32-prelu/gen/neon-4x4.c",
1587 "src/f32-prelu/gen/neon-4x8.c",
1588 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001600 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1612 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001613 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001614 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1616 "src/f32-spmm/gen/4x1-minmax-neon.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1619 "src/f32-spmm/gen/8x1-minmax-neon.c",
1620 "src/f32-spmm/gen/12x1-minmax-neon.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1623 "src/f32-spmm/gen/16x1-minmax-neon.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1626 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001627 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1628 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1630 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001631 "src/f32-vbinary/gen/vmax-neon-x4.c",
1632 "src/f32-vbinary/gen/vmax-neon-x8.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1634 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1635 "src/f32-vbinary/gen/vmin-neon-x4.c",
1636 "src/f32-vbinary/gen/vmin-neon-x8.c",
1637 "src/f32-vbinary/gen/vminc-neon-x4.c",
1638 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001639 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1640 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1642 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1644 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001645 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1646 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1648 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001649 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1650 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1652 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001653 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1654 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1660 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1666 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001667 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1669 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001670 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1671 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001672 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1673 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001674 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1675 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001676 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1677 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1679 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1681 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1683 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1701 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001702 "src/f32-vunary/gen/vabs-neon-x4.c",
1703 "src/f32-vunary/gen/vabs-neon-x8.c",
1704 "src/f32-vunary/gen/vneg-neon-x4.c",
1705 "src/f32-vunary/gen/vneg-neon-x8.c",
1706 "src/f32-vunary/gen/vsqr-neon-x4.c",
1707 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001708 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1709 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/math/roundd-neon-addsub.c",
1711 "src/math/roundd-neon-cvt.c",
1712 "src/math/roundne-neon-addsub.c",
1713 "src/math/roundu-neon-addsub.c",
1714 "src/math/roundu-neon-cvt.c",
1715 "src/math/roundz-neon-addsub.c",
1716 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001717 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1719 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1720 "src/math/sqrt-neon-nr1rsqrts.c",
1721 "src/math/sqrt-neon-nr2rsqrts.c",
1722 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001723 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001724 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001725 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001726 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001727 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001728 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001729 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001730 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001731 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001732 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001733 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001734 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001735 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001736 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001737 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001738 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001739 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1740 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1741 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1742 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001743 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1744 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1745 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1746 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001747 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1748 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1749 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1750 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1751 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001752 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001753 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001754 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1755 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001756 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001757 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1758 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1759 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1760 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1761 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1762 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1763 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1764 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1765 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1766 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1767 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1768 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1769 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001770 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001771 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001772 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1773 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1774 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1775 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1776 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1777 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1778 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1779 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1780 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1781 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1782 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1783 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1784 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1785 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1786 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1787 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1788 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1789 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1790 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1791 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1792 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1793 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1794 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1795 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1796 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1797 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1798 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1799 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1800 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1801 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1802 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1803 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1804 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1805 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001806 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001807 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1808 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1809 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1810 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1811 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1812 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1813 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1814 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1815 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1816 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1817 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1818 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1819 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1820 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1821 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1822 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1823 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07001824 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001825 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001826 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1827 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001828 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001829 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1830 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1831 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1832 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1833 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1834 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1835 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1836 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1837 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1838 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1839 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1840 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1841 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07001842 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001843 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001844 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1845 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1846 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1847 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1848 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1849 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1850 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1851 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1852 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1853 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1854 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1855 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1856 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1857 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1858 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1859 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1860 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1861 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1862 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1863 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1864 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1865 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1866 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1867 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1868 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1869 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1870 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1871 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1872 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1873 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1874 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1875 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1876 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1877 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001878 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001879 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1880 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1881 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1882 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1883 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1884 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1885 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1886 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1887 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1888 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1889 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1890 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001891 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001892 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001893 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07001894 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001895 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1896 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1897 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1898 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1899 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1900 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1901 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1902 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001903 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1904 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1905 "src/qu8-dwconv/up8x9-minmax-neon.c",
1906 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1907 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1908 "src/qu8-gemm/4x8-minmax-neon.c",
1909 "src/qu8-gemm/8x8-minmax-neon.c",
1910 "src/qu8-igemm/4x8-minmax-neon.c",
1911 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001912 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001913 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001914 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001915 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001916 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001917 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001918 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001919 "src/x8-zip/x2-neon.c",
1920 "src/x8-zip/x3-neon.c",
1921 "src/x8-zip/x4-neon.c",
1922 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001923 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001924 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001925 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001926 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001927 "src/x32-zip/x2-neon.c",
1928 "src/x32-zip/x3-neon.c",
1929 "src/x32-zip/x4-neon.c",
1930 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001931]
1932
1933NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001934 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1935 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1936 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1937 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1938 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1939 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1940 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1941 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1942 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1943 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1944 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1945 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1946 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1947 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1948 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1949 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1950 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1951 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1952 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1953 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1954 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1955 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1956 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1957 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1958 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1959 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1960 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1961 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1962 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1963 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001964 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1965 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001966 "src/f32-ibilinear/gen/neonfma-c4.c",
1967 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001968 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001969 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001970 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001971 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1972 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001973 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1974 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001975 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1976 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001977 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1978 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001979 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001980 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001981 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001982 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001984 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001985 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1986 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001987 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001988 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1989 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001990 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1991 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1992 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1993 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1994 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1995 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1996 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1997 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1998 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1999 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2000 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2001 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2002 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002003 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2004 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2005 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2006 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2007 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2008 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2009 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2010 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2011 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2012 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2013 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2014 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2015 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002016 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2017 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2018 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2019 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2020 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2021 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2022 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2023 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2024 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2025 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2026 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2027 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002028 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2029 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2066 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2067 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2068 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2069 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2070 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2071 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2072 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2073 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2074 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2075 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2076 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2077 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2078 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2079 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2080 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2081 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2082 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2083 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002084 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2085 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2086 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2087 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2088 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2089 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2090 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2091 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2092 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2093 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2094 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2095 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2096 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2097 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2098 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2099 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2100 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2101 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2102 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2103 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002104 "src/math/exp-neonfma-rr2-lut64-p2.c",
2105 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002106 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2107 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002108 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2109 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2110 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002111 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2112 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2113 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002114 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2115 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2116 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002117 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2118 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2119 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002120 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2121 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2122 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002123 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2124 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2125 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002126 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2127 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2128 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002129 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002130 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002131 "src/math/sqrt-neonfma-nr2fma.c",
2132 "src/math/sqrt-neonfma-nr2fma1adj.c",
2133 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002134]
2135
2136AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002137 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002138 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002139 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002140 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002141 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002142 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002143 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002144 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002145 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002146 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2147 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
2148 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002149 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002150 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002151 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
2152 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
2153 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
2154 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2155 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002156 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2157 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2158 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002159 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002160 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002161 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2162 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2163 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002164 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2165 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2166 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2167 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002168 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002169 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2170 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002171 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002172 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002173 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002174 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002175 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002177 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2178 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2179 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2180 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2181 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2182 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2183 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2184 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002185 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002187 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2188 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2189 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2190 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2191 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2192 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2193 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2194 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2195 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2196 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2197 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2198 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2199 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2200 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2201 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2202 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2203 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2204 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2205 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2206 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002207 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2208 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002209 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2210 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002211 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2212 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002213 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2214 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002215 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2216 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002217 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2218 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2219 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2220 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2221 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2222 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002223 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2224 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2225 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2226 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2227 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2228 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2229 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2230 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2231 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2232 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2233 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2234 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002249]
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Marat Dukhan8853b822020-05-07 12:19:01 -07002251NEONV8_UKERNELS = [
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Marat Dukhan8853b822020-05-07 12:19:01 -07002280]
2281
Marat Dukhan08c4a432019-10-03 09:29:21 -07002282AARCH64_NEONFP16ARITH_UKERNELS = [
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002367]
2368
Benoit Jacoba9644732020-08-13 12:48:55 -07002369NEONDOT_UKERNELS = [
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Benoit Jacoba9644732020-08-13 12:48:55 -07002402]
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002404SSE_UKERNELS = [
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2437 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2438 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002439 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2440 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2441 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2442 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2443 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2444 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2445 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2446 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2447 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2448 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2449 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2450 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2451 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002452 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2453 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2454 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2455 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2456 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2457 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2458 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2459 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002460 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002461 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002462 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002463 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2464 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002465 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2466 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2467 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002468 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2469 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2470 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002471 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2472 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2473 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002474 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2475 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2476 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002477 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2478 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2479 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002480 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2481 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2482 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002483 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2484 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2485 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2486 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002487 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2488 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2489 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002490 "src/f32-ibilinear-chw/gen/sse-p4.c",
2491 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002492 "src/f32-ibilinear/gen/sse-c4.c",
2493 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002494 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2495 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2496 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002497 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2498 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2499 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002500 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2501 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2502 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2503 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002504 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2505 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2506 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002507 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2508 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2509 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002510 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002511 "src/f32-prelu/gen/sse-2x4.c",
2512 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002513 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002514 "src/f32-spmm/gen/4x1-minmax-sse.c",
2515 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002516 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002517 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002518 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2519 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2520 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2521 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2522 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2523 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2524 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2525 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002526 "src/f32-vbinary/gen/vmax-sse-x4.c",
2527 "src/f32-vbinary/gen/vmax-sse-x8.c",
2528 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2529 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2530 "src/f32-vbinary/gen/vmin-sse-x4.c",
2531 "src/f32-vbinary/gen/vmin-sse-x8.c",
2532 "src/f32-vbinary/gen/vminc-sse-x4.c",
2533 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002534 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2535 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2536 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2537 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2538 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2539 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2540 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2541 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002542 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2543 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2544 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2545 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002546 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2547 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2548 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2549 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002550 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2551 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002552 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2553 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002554 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2555 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002556 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2557 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002558 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2559 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002560 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2561 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002562 "src/f32-vunary/gen/vabs-sse-x4.c",
2563 "src/f32-vunary/gen/vabs-sse-x8.c",
2564 "src/f32-vunary/gen/vneg-sse-x4.c",
2565 "src/f32-vunary/gen/vneg-sse-x8.c",
2566 "src/f32-vunary/gen/vsqr-sse-x4.c",
2567 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002568 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002569 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002570 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002571 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002572 "src/math/sqrt-sse-hh1mac.c",
2573 "src/math/sqrt-sse-nr1mac.c",
2574 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002575 "src/x32-fill/sse.c",
2576 "src/x32-packx/x4-sse.c",
2577 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002578]
2579
2580SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002581 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002582 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002583 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002584 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2585 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2586 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2587 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2588 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2589 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2590 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2591 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2592 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2593 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2594 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2595 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002596 "src/f32-prelu/gen/sse2-2x4.c",
2597 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002598 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002599 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002600 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002601 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2602 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002603 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002604 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2605 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002606 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002607 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2608 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002609 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002610 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2611 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2612 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2613 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2614 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2615 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2616 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2617 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2618 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2619 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2620 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2621 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002622 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2623 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002624 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2625 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002626 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2627 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2628 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2629 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2630 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2631 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002632 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2633 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2634 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2635 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2636 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2637 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2638 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2639 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2640 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2641 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2642 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2643 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002644 "src/math/exp-sse2-rr2-lut64-p2.c",
2645 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002646 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002647 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002648 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002649 "src/math/roundd-sse2-cvt.c",
2650 "src/math/roundne-sse2-cvt.c",
2651 "src/math/roundu-sse2-cvt.c",
2652 "src/math/roundz-sse2-cvt.c",
2653 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2654 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2655 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2656 "src/math/sigmoid-sse2-rr2-p5-div.c",
2657 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2658 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002659 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2660 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2661 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2662 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2663 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2664 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002665 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002666 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002667 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002668 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002669 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002670 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002671 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002672 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002673 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002674 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002675 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002676 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002677 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002678 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002679 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002680 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002681 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002682 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002683 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002684 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002685 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002686 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002687 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002688 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002689 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002690 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002691 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002692 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002693 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2694 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002695 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2696 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2697 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2698 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2699 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2700 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2701 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2702 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2703 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
2704 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002705 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2706 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2707 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002708 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2709 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2710 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002711 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002712 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002713 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002714 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002715 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002716 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002717 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002718 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002719 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002720 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002721 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002722 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002723 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002724 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002725 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002726 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002727 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002728 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002729 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002730 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002731 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002732 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002733 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002734 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002735 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002736 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002737 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002738 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002739 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002740 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002741 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002742 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002743 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002744 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002745 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002746 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002747 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002748 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002749 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002750 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002751 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002752 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002753 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002754 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002755 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002756 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002757 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002758 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002759 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002760 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002761 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002762 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002763 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002764 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002765 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002766 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002767 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002768 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002769 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002770 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002771 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002772 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002773 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002774 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002775 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002776 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002777 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2778 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2779 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2780 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002781 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2782 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2783 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2784 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002785 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2786 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002787 "src/qu8-dwconv/up8x9-minmax-sse2.c",
2788 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2789 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
2790 "src/qu8-gemm/2x4c8-minmax-sse2.c",
2791 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002792 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002793 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002794 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002795 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002796 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002797 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002798 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002799 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002800 "src/x8-zip/x2-sse2.c",
2801 "src/x8-zip/x3-sse2.c",
2802 "src/x8-zip/x4-sse2.c",
2803 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002804 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002805 "src/x32-zip/x2-sse2.c",
2806 "src/x32-zip/x3-sse2.c",
2807 "src/x32-zip/x4-sse2.c",
2808 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07002809]
2810
2811SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07002812 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
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Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002815 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002816 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002817 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
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2819 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c",
2820 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
2821 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002822 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002823 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c",
2824 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
2825 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
2826 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
2827 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002828 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
2829 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
2830 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002831 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
2832 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c",
2833 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002834 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002835 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002836 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002837 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002838 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002839 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002840 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002841 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002842 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002843 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002844 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002845 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002846 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002847 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002848 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002849 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002850 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002851 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002852 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002853 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002854 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002855 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002856 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002857 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002858 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002859 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002860 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002861 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002862 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002863 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002864 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002865 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002866 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002867 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002868 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002869 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002870 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002871 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002872 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002873 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002874 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002875 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002876 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002877 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002878 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002879 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002880 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002881 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002882 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002883 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002884 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002885]
2886
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002887SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08002888 "src/f32-prelu/gen/sse41-2x4.c",
2889 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002890 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
2891 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
2892 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
2893 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
2894 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
2895 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
2896 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
2897 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
2898 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
2899 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
2900 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
2901 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002902 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
2903 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002904 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2905 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002906 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
2907 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
2908 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
2909 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
2910 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2911 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002912 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
2913 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
2914 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
2915 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2916 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2917 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2918 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
2919 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
2920 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2921 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2922 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2923 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002924 "src/math/roundd-sse41.c",
2925 "src/math/roundne-sse41.c",
2926 "src/math/roundu-sse41.c",
2927 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002928 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2929 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2930 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2931 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2932 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2933 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2934 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2935 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
2936 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2937 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2938 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2939 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002940 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002941 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002942 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002943 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002944 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002945 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002946 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002947 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002948 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002949 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002950 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002951 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002952 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002953 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002954 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002955 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002956 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002957 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002958 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002959 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002960 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002961 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002962 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002963 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002964 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002965 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002966 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002967 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002968 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2969 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2970 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
2971 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002972 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2973 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2974 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
2975 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
2976 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2977 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2978 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2979 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2980 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2981 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
2982 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2983 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
2984 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2985 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2986 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2987 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2988 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2989 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
2990 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
2991 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002992 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
2993 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
2994 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002995 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
2996 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
2997 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002998 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002999 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003000 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003001 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003002 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003003 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003004 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003005 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003006 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003007 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003008 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003009 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003010 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003011 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003012 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003013 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003014 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003015 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003016 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003017 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003018 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003019 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003020 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003021 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003022 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003023 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003024 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003025 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003026 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003027 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003028 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003029 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003030 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003031 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003032 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003033 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003034 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003035 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003036 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003037 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003038 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003039 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003040 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003041 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003042 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003043 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003044 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003045 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003046 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003047 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003048 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003049 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003050 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003051 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003052 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003053 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003054 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003055 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003056 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003057 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003058 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003059 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003060 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003061 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003062 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003063 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003064 "src/qs8-requantization/rndnu-sse4-sra.c",
3065 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003066 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3067 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3068 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3069 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003070 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3071 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3072 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3073 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003074 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3075 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3076 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3077 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003078 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3079 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3080 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3081 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003082 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003083 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003084]
3085
Marat Dukhan08c4a432019-10-03 09:29:21 -07003086AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003087 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003089 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3090 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003091 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3092 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003093 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
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3095 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
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3097 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3098 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003099 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003100 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3101 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003102 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003103 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003104 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003105 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003106 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3107 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3108 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3109 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3110 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3111 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3112 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3113 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3114 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3115 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3116 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003117 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003118 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3119 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003120 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003121 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003122 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003123 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003124 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3125 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003126 "src/f32-prelu/gen/avx-2x8.c",
3127 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003128 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003129 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3130 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3131 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3132 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3133 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3134 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3135 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3136 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003137 "src/f32-vbinary/gen/vmax-avx-x8.c",
3138 "src/f32-vbinary/gen/vmax-avx-x16.c",
3139 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3140 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3141 "src/f32-vbinary/gen/vmin-avx-x8.c",
3142 "src/f32-vbinary/gen/vmin-avx-x16.c",
3143 "src/f32-vbinary/gen/vminc-avx-x8.c",
3144 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003145 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3146 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3147 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3148 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3149 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3150 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3151 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3152 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003153 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3154 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3155 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3156 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003157 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3158 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3159 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3160 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003161 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3162 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003163 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3164 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3165 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3166 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3167 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3168 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3169 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3170 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3171 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3172 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3173 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3174 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3175 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3176 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3177 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3178 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3179 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3180 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003181 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3182 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003183 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3184 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003185 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3186 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003187 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3188 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003189 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3190 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3191 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3192 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3193 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3194 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003195 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003196 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3197 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3198 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3199 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3200 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3201 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3202 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3203 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3204 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3205 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3206 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3207 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3208 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3209 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3210 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3211 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3212 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3213 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3214 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3215 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003216 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3217 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003218 "src/f32-vunary/gen/vabs-avx-x8.c",
3219 "src/f32-vunary/gen/vabs-avx-x16.c",
3220 "src/f32-vunary/gen/vneg-avx-x8.c",
3221 "src/f32-vunary/gen/vneg-avx-x16.c",
3222 "src/f32-vunary/gen/vsqr-avx-x8.c",
3223 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003224 "src/math/exp-avx-rr2-p5.c",
3225 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3226 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3227 "src/math/expm1minus-avx-rr2-p6.c",
3228 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3229 "src/math/sigmoid-avx-rr2-p5-div.c",
3230 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3231 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003232 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3233 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3234 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3235 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3236 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3237 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3238 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3239 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3240 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3241 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3242 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3243 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003244 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003245 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003246 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003247 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003248 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003249 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003250 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003251 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003252 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003253 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003254 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003255 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003256 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003257 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003258 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003259 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003260 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003261 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003262 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003263 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003264 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003265 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003266 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003267 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003268 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003269 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003270 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003271 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003272 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3273 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3274 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3275 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003276 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3277 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3278 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3279 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3280 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3281 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3282 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3283 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3284 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3285 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3286 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3287 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3288 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3289 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3290 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3291 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3292 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3293 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3294 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3295 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003296 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003297 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003298 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003299 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003300 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003301 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003302 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003303 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003304 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003305 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003306 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003307 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003308 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003309 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003310 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003311 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003312 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003313 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003314 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003315 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003316 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003317 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003318 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003319 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003320 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003321 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003322 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003323 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003324 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003325 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003326 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003327 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003328 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003329 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003330 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003331 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003332 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003333 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003334 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003335 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003336 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003337 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003338 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003339 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003340 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003341 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003342 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003343 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003344 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003345 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003346 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003347 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003348 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003349 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003350 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003351 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003352 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003353 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
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3361 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3362 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3363 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3364 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3365 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3366 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
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3368 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3369 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07003375]
3376
Marat Dukhan1566fee2020-08-02 21:55:41 -07003377XOP_UKERNELS = [
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Marat Dukhan1566fee2020-08-02 21:55:41 -07003495]
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3529 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3530 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3531 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3532 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
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3542 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003549 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
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3551 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003552 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3553 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003554 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
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3556 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
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3558 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3559 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
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3561 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003562 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003563 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003564 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003565]
3566
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003567AVX2_UKERNELS = [
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08003592 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
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3606 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3607 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3608 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
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3613 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3614 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3615 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3616 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3617 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3618 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3619 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3620 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3621 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3622 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3623 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3624 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3625 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3626 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3627 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3628 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3629 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3630 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3631 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3632 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3633 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3634 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3635 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3636 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3637 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3638 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3639 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3640 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3641 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3642 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3643 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003644 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3645 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3646 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3647 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3648 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3649 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3650 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3651 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3652 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3653 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3654 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3655 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3656 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3657 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3658 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3659 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3660 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3661 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3662 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3663 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3664 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3665 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3666 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3667 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003668 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3669 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3670 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3671 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3672 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3673 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3674 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3675 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3676 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3677 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3678 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3679 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3680 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3681 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3682 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3683 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3684 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3685 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3686 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3687 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3688 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3689 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3690 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3691 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3692 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3693 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3694 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3695 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3696 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3697 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003698 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3699 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3700 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003701 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3702 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3703 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3704 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003705 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003706 "src/math/extexp-avx2-p5.c",
3707 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3708 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3709 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3710 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3711 "src/math/sigmoid-avx2-rr1-p5-div.c",
3712 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3713 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3714 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3715 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3716 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3717 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3718 "src/math/sigmoid-avx2-rr2-p5-div.c",
3719 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3720 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07003721 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
3722 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
3723 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
3724 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
3725 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
3726 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
3727 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
3728 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
3729 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
3730 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
3731 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
3732 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003733 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3734 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3735 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3736 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3737 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3738 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07003739 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
3740 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
3741 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003742 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003743 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003744 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003745 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003746 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003747 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003748 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3749 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003750 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003751 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003752 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3753 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003754 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003755 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003756 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003757 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003758 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003759 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003760 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3761 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003762 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003763 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003764 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3765 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003766 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003767 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003768 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003769 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003770 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003771 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003772 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003773 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003774 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003775 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003776 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003777 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003778 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003779 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003780 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003781 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003782 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003783 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003784 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3785 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3786 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3787 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3788 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3789 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3790 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3791 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003792]
3793
Marat Dukhan08c4a432019-10-03 09:29:21 -07003794AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003795 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3796 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003797 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3798 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003799 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3800 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003801 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3802 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3803 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3804 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3805 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3806 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003807 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3808 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3809 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3810 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3811 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3812 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003813 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3814 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3815 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3816 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3817 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3818 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003819 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3820 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3821 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3822 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3823 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3824 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003825 "src/f32-prelu/gen/avx512f-2x16.c",
3826 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003827 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3828 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003829 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003830 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003831 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003832 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3833 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003834 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003835 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3836 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3837 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003838 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003839 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3840 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003841 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003842 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003843 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003844 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3845 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003846 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003847 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3848 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3849 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003850 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003851 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3852 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003853 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003854 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003855 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003856 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3857 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003858 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003859 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3860 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3861 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003862 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003863 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003864 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3865 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3866 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3867 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3868 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3869 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3870 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3871 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003872 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3873 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3874 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3875 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3876 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3877 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3878 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3879 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003880 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3881 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3882 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3883 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3884 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3885 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3886 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3887 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003888 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3889 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3890 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3891 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003892 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3893 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3894 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3895 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003896 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3897 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003898 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3899 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3900 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3901 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3902 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3903 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3904 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3905 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3906 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3907 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3908 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3909 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3910 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3911 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3912 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3913 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003914 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3915 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003916 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3917 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003918 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3919 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003920 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3921 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3922 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3923 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3924 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3925 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3926 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3927 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003928 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003929 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3930 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3931 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3932 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3933 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3934 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3935 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3936 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3937 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3938 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3939 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3940 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3941 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3942 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3943 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3944 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3945 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3946 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3947 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3948 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3949 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3950 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3951 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3952 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003953 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3954 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3955 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3956 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3957 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3958 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3959 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3960 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3961 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3962 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3963 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3964 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3965 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3966 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3967 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3968 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3969 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3970 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3971 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3972 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3973 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3974 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3975 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3976 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3977 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3978 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3979 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3980 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3981 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3982 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3983 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3984 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3985 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3986 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3987 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3988 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3989 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3990 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3991 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3992 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3993 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3994 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3995 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3996 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3997 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
3998 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
3999 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4000 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004001 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4002 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4003 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4004 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4005 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4006 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4007 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4008 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004009 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4010 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4011 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4012 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4013 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4014 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004015 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4016 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4017 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4018 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4019 "src/math/exp-avx512f-rr2-p5-scalef.c",
4020 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004021 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4022 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004023 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004024 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004025 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004026 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004027 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004028 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004029 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004030 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004031 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004032 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4033 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4034 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4035 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4036 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4037 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4038 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4039 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4040 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4041 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004042 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004043 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004044 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4045 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4046 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4047 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004048 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004049 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004050 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004051]
4052
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004053AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004054 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4055 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4056 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4057 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004058 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4059 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4060 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4061 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4062 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4063 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4064 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4065 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004066 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004067 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004068 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004069 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004070 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004071 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004072 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004073 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004074 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004075 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004076 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004077 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004078 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004079 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004080 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004081 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004082 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004083 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004084 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004085 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004086 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004087 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004088 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004089 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004090]
4091
Frank Barchardbcedc082020-08-17 18:00:51 -07004092WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004093 "src/f32-vrelu/wasm_shr_x1.S",
4094 "src/f32-vrelu/wasm_shr_x2.S",
4095 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004096]
4097
Marat Dukhan08c4a432019-10-03 09:29:21 -07004098AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004099 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004100 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004101 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4102 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004103 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004104 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004105 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004106 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07004113]
4114
4115AARCH64_ASM_UKERNELS = [
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Frank Barchard97374612021-06-07 11:51:07 -07004122 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
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Frank Barchard04336c12020-10-22 16:48:55 -07004125 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
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Frank Barchard80fc5f42021-06-07 10:43:16 -07004130 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004134 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004136 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
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Frank Barchard04336c12020-10-22 16:48:55 -07004138 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
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Frank Barchard04336c12020-10-22 16:48:55 -07004140 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004141 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004143 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004144 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004145 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004146 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004147 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004148 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004149 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004150 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4151 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004152 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004153 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004154 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004155 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004156 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004157 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004158 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
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Frank Barchard143a1102021-06-15 09:15:34 -07004160 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004161 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
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4163 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004164 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
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4166 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004167 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004168 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004169 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004170 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004171 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4172 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004173 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4174 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
4175 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
4176 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004177 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004178 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004179 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004180 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4181 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004182 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4183 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4184 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4185 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004186 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004187 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004188 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004189 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004190 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004191 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4192 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4193 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4194 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004195 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004196 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004197 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004198 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4199 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4200 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4201 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004202 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4203 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004204 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4205 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4206 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4207 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004208 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
4209 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004210 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4211 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004212 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4213 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4214 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004215 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004216 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4217 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4218 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4219 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
4220 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4221 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4222 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4223 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004224 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004225 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4226 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004227 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4228 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004229 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004230]
4231
Marat Dukhan1b354632020-03-23 12:50:22 -07004232INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004233 "src/xnnpack/argmaxpool.h",
4234 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004235 "src/xnnpack/common.h",
4236 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004237 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004238 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004239 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004240 "src/xnnpack/gavgpool.h",
4241 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004242 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004243 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004244 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004245 "src/xnnpack/lut.h",
4246 "src/xnnpack/math.h",
4247 "src/xnnpack/maxpool.h",
4248 "src/xnnpack/packx.h",
4249 "src/xnnpack/pad.h",
4250 "src/xnnpack/params.h",
4251 "src/xnnpack/pavgpool.h",
4252 "src/xnnpack/ppmm.h",
4253 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004254 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004255 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004256 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004257 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004258 "src/xnnpack/spmm.h",
4259 "src/xnnpack/unpool.h",
4260 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004261 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004262 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004263 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004264 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004265 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004266 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004267 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004268]
4269
4270INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004271 "include/xnnpack.h",
4272 "src/xnnpack/allocator.h",
4273 "src/xnnpack/compute.h",
4274 "src/xnnpack/im2col.h",
4275 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004276 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004277 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004278 "src/xnnpack/operator.h",
4279 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004280 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004281 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004282 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004283 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004284]
4285
Marat Dukhan1b354632020-03-23 12:50:22 -07004286ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004287 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004288]
4289
Marat Dukhan1b354632020-03-23 12:50:22 -07004290MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004291 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004292 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004293]
4294
Marat Dukhan1b354632020-03-23 12:50:22 -07004295MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004296 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004297 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004298 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004299 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004300]
4301
4302OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004303 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004304 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004305]
4306
4307WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004308 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004309 "src/xnnpack/operator.h",
4310 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004311]
4312
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004313LOGGING_COPTS = select({
4314 # No logging in optimized mode
4315 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4316 # Full logging in debug mode
4317 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4318 # Error-only logging in default (fastbuild) mode
4319 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4320})
4321
Marat Dukhan3b59de22020-06-03 20:15:19 -07004322LOGGING_SRCS = select({
4323 # No logging in optimized mode
4324 ":optimized_build": [],
4325 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004326 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004327 "src/operator-strings.c",
4328 "src/subgraph-strings.c",
4329 ],
4330})
4331
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004332LOGGING_HDRS = [
4333 "src/xnnpack/log.h",
4334]
4335
Marat Dukhan08c4a432019-10-03 09:29:21 -07004336xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004337 name = "tables",
4338 srcs = TABLE_SRCS,
4339 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004340 gcc_copts = xnnpack_gcc_std_copts(),
4341 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004342)
4343
4344xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004345 name = "scalar_ukernels",
4346 srcs = SCALAR_UKERNELS,
4347 hdrs = INTERNAL_HDRS,
4348 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004349 gcc_copts = xnnpack_gcc_std_copts(),
4350 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004351 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004352 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004353 "@FP16",
4354 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004355 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004356 ],
4357)
4358
4359xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004360 name = "scalar_ukernels_test_mode",
4361 srcs = SCALAR_UKERNELS,
4362 hdrs = INTERNAL_HDRS,
4363 aarch32_copts = ["-marm"],
4364 copts = [
4365 "-UNDEBUG",
4366 "-DXNN_TEST_MODE=1",
4367 ],
4368 gcc_copts = xnnpack_gcc_std_copts(),
4369 msvc_copts = xnnpack_msvc_std_copts(),
4370 deps = [
4371 ":tables",
4372 "@FP16",
4373 "@FXdiv",
4374 "@pthreadpool",
4375 ],
4376)
4377
4378xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004379 name = "wasm_ukernels",
4380 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004381 gcc_copts = xnnpack_gcc_std_copts(),
4382 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004383 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004384 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004385 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004386 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004387 "@FP16",
4388 "@FXdiv",
4389 "@pthreadpool",
4390 ],
4391)
4392
4393xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004394 name = "wasm_ukernels_test_mode",
4395 hdrs = INTERNAL_HDRS,
4396 copts = [
4397 "-UNDEBUG",
4398 "-DXNN_TEST_MODE=1",
4399 ],
4400 gcc_copts = xnnpack_gcc_std_copts(),
4401 msvc_copts = xnnpack_msvc_std_copts(),
4402 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004403 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004404 deps = [
4405 ":tables",
4406 "@FP16",
4407 "@FXdiv",
4408 "@pthreadpool",
4409 ],
4410)
4411
4412xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004413 name = "neon_ukernels",
4414 hdrs = INTERNAL_HDRS,
4415 aarch32_copts = [
4416 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004417 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004418 "-mfpu=neon",
4419 ],
4420 aarch32_srcs = NEON_UKERNELS,
4421 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004422 gcc_copts = xnnpack_gcc_std_copts(),
4423 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004424 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004425 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004426 "@FP16",
4427 "@pthreadpool",
4428 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004429)
4430
4431xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004432 name = "neon_ukernels_test_mode",
4433 hdrs = INTERNAL_HDRS,
4434 aarch32_copts = [
4435 "-marm",
4436 "-march=armv7-a",
4437 "-mfpu=neon",
4438 ],
4439 aarch32_srcs = NEON_UKERNELS,
4440 aarch64_srcs = NEON_UKERNELS,
4441 copts = [
4442 "-UNDEBUG",
4443 "-DXNN_TEST_MODE=1",
4444 ],
4445 gcc_copts = xnnpack_gcc_std_copts(),
4446 msvc_copts = xnnpack_msvc_std_copts(),
4447 deps = [
4448 ":tables",
4449 "@FP16",
4450 "@pthreadpool",
4451 ],
4452)
4453
4454xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004455 name = "neonfma_ukernels",
4456 hdrs = INTERNAL_HDRS,
4457 aarch32_copts = [
4458 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004459 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004460 "-mfpu=neon-vfpv4",
4461 ],
4462 aarch32_srcs = NEONFMA_UKERNELS,
4463 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004464 apple_aarch32_copts = [
4465 "-mcpu=swift",
4466 "-mtune=generic",
4467 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004468 gcc_copts = xnnpack_gcc_std_copts(),
4469 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004470 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004471 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004472 "@FP16",
4473 "@pthreadpool",
4474 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004475)
4476
4477xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004478 name = "neonfma_ukernels_test_mode",
4479 hdrs = INTERNAL_HDRS,
4480 aarch32_copts = [
4481 "-marm",
4482 "-march=armv7-a",
4483 "-mfpu=neon-vfpv4",
4484 ],
4485 aarch32_srcs = NEONFMA_UKERNELS,
4486 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004487 apple_aarch32_copts = [
4488 "-mcpu=swift",
4489 "-mtune=generic",
4490 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004491 copts = [
4492 "-UNDEBUG",
4493 "-DXNN_TEST_MODE=1",
4494 ],
4495 gcc_copts = xnnpack_gcc_std_copts(),
4496 msvc_copts = xnnpack_msvc_std_copts(),
4497 deps = [
4498 ":tables",
4499 "@FP16",
4500 "@pthreadpool",
4501 ],
4502)
4503
4504xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004505 name = "neonv8_ukernels",
4506 hdrs = INTERNAL_HDRS,
4507 aarch32_copts = [
4508 "-marm",
4509 "-march=armv8-a",
4510 "-mfpu=neon-fp-armv8",
4511 ],
4512 aarch32_srcs = NEONV8_UKERNELS,
4513 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004514 apple_aarch32_copts = [
4515 "-mcpu=cyclone",
4516 "-mtune=generic",
4517 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004518 gcc_copts = xnnpack_gcc_std_copts(),
4519 msvc_copts = xnnpack_msvc_std_copts(),
4520 deps = [
4521 ":tables",
4522 "@FP16",
4523 "@pthreadpool",
4524 ],
4525)
4526
4527xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004528 name = "neonv8_ukernels_test_mode",
4529 hdrs = INTERNAL_HDRS,
4530 aarch32_copts = [
4531 "-marm",
4532 "-march=armv8-a",
4533 "-mfpu=neon-fp-armv8",
4534 ],
4535 aarch32_srcs = NEONV8_UKERNELS,
4536 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004537 apple_aarch32_copts = [
4538 "-mcpu=cyclone",
4539 "-mtune=generic",
4540 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004541 copts = [
4542 "-UNDEBUG",
4543 "-DXNN_TEST_MODE=1",
4544 ],
4545 gcc_copts = xnnpack_gcc_std_copts(),
4546 msvc_copts = xnnpack_msvc_std_copts(),
4547 deps = [
4548 ":tables",
4549 "@FP16",
4550 "@pthreadpool",
4551 ],
4552)
4553
4554xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004555 name = "neonfp16arith_ukernels",
4556 hdrs = INTERNAL_HDRS,
4557 aarch64_copts = ["-march=armv8.2-a+fp16"],
4558 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004559 gcc_copts = xnnpack_gcc_std_copts(),
4560 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004561 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004562 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004563 "@FP16",
4564 "@pthreadpool",
4565 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004566)
4567
4568xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004569 name = "neonfp16arith_ukernels_test_mode",
4570 hdrs = INTERNAL_HDRS,
4571 aarch64_copts = ["-march=armv8.2-a+fp16"],
4572 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4573 copts = [
4574 "-UNDEBUG",
4575 "-DXNN_TEST_MODE=1",
4576 ],
4577 gcc_copts = xnnpack_gcc_std_copts(),
4578 msvc_copts = xnnpack_msvc_std_copts(),
4579 deps = [
4580 ":tables",
4581 "@FP16",
4582 "@pthreadpool",
4583 ],
4584)
4585
4586xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004587 name = "neondot_ukernels",
4588 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004589 aarch32_copts = [
4590 "-marm",
4591 "-march=armv8.2-a+dotprod",
4592 "-mfpu=neon-fp-armv8",
4593 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004594 aarch32_srcs = NEONDOT_UKERNELS,
4595 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4596 aarch64_srcs = NEONDOT_UKERNELS,
4597 gcc_copts = xnnpack_gcc_std_copts(),
4598 msvc_copts = xnnpack_msvc_std_copts(),
4599 deps = [
4600 ":tables",
4601 "@FP16",
4602 "@pthreadpool",
4603 ],
4604)
4605
4606xnnpack_cc_library(
4607 name = "neondot_ukernels_test_mode",
4608 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004609 aarch32_copts = [
4610 "-marm",
4611 "-march=armv8.2-a+dotprod",
4612 "-mfpu=neon-fp-armv8",
4613 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004614 aarch32_srcs = NEONDOT_UKERNELS,
4615 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4616 aarch64_srcs = NEONDOT_UKERNELS,
4617 copts = [
4618 "-UNDEBUG",
4619 "-DXNN_TEST_MODE=1",
4620 ],
4621 gcc_copts = xnnpack_gcc_std_copts(),
4622 msvc_copts = xnnpack_msvc_std_copts(),
4623 deps = [
4624 ":tables",
4625 "@FP16",
4626 "@pthreadpool",
4627 ],
4628)
4629
4630xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004631 name = "sse2_ukernels",
4632 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004633 gcc_copts = xnnpack_gcc_std_copts(),
4634 gcc_x86_copts = ["-msse2"],
4635 msvc_copts = xnnpack_msvc_std_copts(),
4636 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004637 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004638 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004639 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004640 "@FP16",
4641 "@pthreadpool",
4642 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004643)
4644
4645xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004646 name = "sse2_ukernels_test_mode",
4647 hdrs = INTERNAL_HDRS,
4648 copts = [
4649 "-UNDEBUG",
4650 "-DXNN_TEST_MODE=1",
4651 ],
4652 gcc_copts = xnnpack_gcc_std_copts(),
4653 gcc_x86_copts = ["-msse2"],
4654 msvc_copts = xnnpack_msvc_std_copts(),
4655 msvc_x86_32_copts = ["/arch:SSE2"],
4656 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4657 deps = [
4658 ":tables",
4659 "@FP16",
4660 "@pthreadpool",
4661 ],
4662)
4663
4664xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004665 name = "ssse3_ukernels",
4666 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004667 gcc_copts = xnnpack_gcc_std_copts(),
4668 gcc_x86_copts = ["-mssse3"],
4669 msvc_copts = xnnpack_msvc_std_copts(),
4670 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004671 x86_srcs = SSSE3_UKERNELS,
4672 deps = [
4673 ":tables",
4674 "@FP16",
4675 "@pthreadpool",
4676 ],
4677)
4678
4679xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004680 name = "ssse3_ukernels_test_mode",
4681 hdrs = INTERNAL_HDRS,
4682 copts = [
4683 "-UNDEBUG",
4684 "-DXNN_TEST_MODE=1",
4685 ],
4686 gcc_copts = xnnpack_gcc_std_copts(),
4687 gcc_x86_copts = ["-mssse3"],
4688 msvc_copts = xnnpack_msvc_std_copts(),
4689 msvc_x86_32_copts = ["/arch:SSE2"],
4690 x86_srcs = SSSE3_UKERNELS,
4691 deps = [
4692 ":tables",
4693 "@FP16",
4694 "@pthreadpool",
4695 ],
4696)
4697
4698xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004699 name = "sse41_ukernels",
4700 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004701 gcc_copts = xnnpack_gcc_std_copts(),
4702 gcc_x86_copts = ["-msse4.1"],
4703 msvc_copts = xnnpack_msvc_std_copts(),
4704 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004705 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004706 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004707 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004708 "@FP16",
4709 "@pthreadpool",
4710 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004711)
4712
4713xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004714 name = "sse41_ukernels_test_mode",
4715 hdrs = INTERNAL_HDRS,
4716 copts = [
4717 "-UNDEBUG",
4718 "-DXNN_TEST_MODE=1",
4719 ],
4720 gcc_copts = xnnpack_gcc_std_copts(),
4721 gcc_x86_copts = ["-msse4.1"],
4722 msvc_copts = xnnpack_msvc_std_copts(),
4723 msvc_x86_32_copts = ["/arch:SSE2"],
4724 x86_srcs = SSE41_UKERNELS,
4725 deps = [
4726 ":tables",
4727 "@FP16",
4728 "@pthreadpool",
4729 ],
4730)
4731
4732xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004733 name = "avx_ukernels",
4734 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004735 gcc_copts = xnnpack_gcc_std_copts(),
4736 gcc_x86_copts = ["-mavx"],
4737 msvc_copts = xnnpack_msvc_std_copts(),
4738 msvc_x86_32_copts = ["/arch:AVX"],
4739 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004740 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004741 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004742 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004743 "@FP16",
4744 "@pthreadpool",
4745 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004746)
4747
4748xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004749 name = "avx_ukernels_test_mode",
4750 hdrs = INTERNAL_HDRS,
4751 copts = [
4752 "-UNDEBUG",
4753 "-DXNN_TEST_MODE=1",
4754 ],
4755 gcc_copts = xnnpack_gcc_std_copts(),
4756 gcc_x86_copts = ["-mavx"],
4757 msvc_copts = xnnpack_msvc_std_copts(),
4758 msvc_x86_32_copts = ["/arch:AVX"],
4759 msvc_x86_64_copts = ["/arch:AVX"],
4760 x86_srcs = AVX_UKERNELS,
4761 deps = [
4762 ":tables",
4763 "@FP16",
4764 "@pthreadpool",
4765 ],
4766)
4767
4768xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004769 name = "xop_ukernels",
4770 hdrs = INTERNAL_HDRS,
4771 gcc_copts = xnnpack_gcc_std_copts(),
4772 gcc_x86_copts = ["-mxop"],
4773 msvc_copts = xnnpack_msvc_std_copts(),
4774 msvc_x86_32_copts = ["/arch:AVX"],
4775 msvc_x86_64_copts = ["/arch:AVX"],
4776 x86_srcs = XOP_UKERNELS,
4777 deps = [
4778 ":tables",
4779 "@FP16",
4780 "@pthreadpool",
4781 ],
4782)
4783
4784xnnpack_cc_library(
4785 name = "xop_ukernels_test_mode",
4786 hdrs = INTERNAL_HDRS,
4787 copts = [
4788 "-UNDEBUG",
4789 "-DXNN_TEST_MODE=1",
4790 ],
4791 gcc_copts = xnnpack_gcc_std_copts(),
4792 gcc_x86_copts = ["-mxop"],
4793 msvc_copts = xnnpack_msvc_std_copts(),
4794 msvc_x86_32_copts = ["/arch:AVX"],
4795 msvc_x86_64_copts = ["/arch:AVX"],
4796 x86_srcs = XOP_UKERNELS,
4797 deps = [
4798 ":tables",
4799 "@FP16",
4800 "@pthreadpool",
4801 ],
4802)
4803
4804xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004805 name = "fma3_ukernels",
4806 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004807 gcc_copts = xnnpack_gcc_std_copts(),
4808 gcc_x86_copts = ["-mfma"],
4809 msvc_copts = xnnpack_msvc_std_copts(),
4810 msvc_x86_32_copts = ["/arch:AVX"],
4811 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004812 x86_srcs = FMA3_UKERNELS,
4813 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004814 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004815 "@FP16",
4816 "@pthreadpool",
4817 ],
4818)
4819
4820xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004821 name = "fma3_ukernels_test_mode",
4822 hdrs = INTERNAL_HDRS,
4823 copts = [
4824 "-UNDEBUG",
4825 "-DXNN_TEST_MODE=1",
4826 ],
4827 gcc_copts = xnnpack_gcc_std_copts(),
4828 gcc_x86_copts = ["-mfma"],
4829 msvc_copts = xnnpack_msvc_std_copts(),
4830 msvc_x86_32_copts = ["/arch:AVX"],
4831 msvc_x86_64_copts = ["/arch:AVX"],
4832 x86_srcs = FMA3_UKERNELS,
4833 deps = [
4834 ":tables",
4835 "@FP16",
4836 "@pthreadpool",
4837 ],
4838)
4839
4840xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004841 name = "avx2_ukernels",
4842 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004843 gcc_copts = xnnpack_gcc_std_copts(),
4844 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004845 "-mfma",
4846 "-mavx2",
4847 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004848 msvc_copts = xnnpack_msvc_std_copts(),
4849 msvc_x86_32_copts = ["/arch:AVX2"],
4850 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004851 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004852 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004853 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004854 "@FP16",
4855 "@pthreadpool",
4856 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004857)
4858
4859xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004860 name = "avx2_ukernels_test_mode",
4861 hdrs = INTERNAL_HDRS,
4862 copts = [
4863 "-UNDEBUG",
4864 "-DXNN_TEST_MODE=1",
4865 ],
4866 gcc_copts = xnnpack_gcc_std_copts(),
4867 gcc_x86_copts = [
4868 "-mfma",
4869 "-mavx2",
4870 ],
4871 msvc_copts = xnnpack_msvc_std_copts(),
4872 msvc_x86_32_copts = ["/arch:AVX2"],
4873 msvc_x86_64_copts = ["/arch:AVX2"],
4874 x86_srcs = AVX2_UKERNELS,
4875 deps = [
4876 ":tables",
4877 "@FP16",
4878 "@pthreadpool",
4879 ],
4880)
4881
4882xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004883 name = "avx512f_ukernels",
4884 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004885 gcc_copts = xnnpack_gcc_std_copts(),
4886 gcc_x86_copts = ["-mavx512f"],
4887 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4888 msvc_copts = xnnpack_msvc_std_copts(),
4889 msvc_x86_32_copts = ["/arch:AVX512"],
4890 msvc_x86_64_copts = ["/arch:AVX512"],
4891 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004892 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004893 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004894 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004895 "@FP16",
4896 "@pthreadpool",
4897 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004898)
4899
4900xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004901 name = "avx512f_ukernels_test_mode",
4902 hdrs = INTERNAL_HDRS,
4903 copts = [
4904 "-UNDEBUG",
4905 "-DXNN_TEST_MODE=1",
4906 ],
4907 gcc_copts = xnnpack_gcc_std_copts(),
4908 gcc_x86_copts = ["-mavx512f"],
4909 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4910 msvc_copts = xnnpack_msvc_std_copts(),
4911 msvc_x86_32_copts = ["/arch:AVX512"],
4912 msvc_x86_64_copts = ["/arch:AVX512"],
4913 msys_copts = ["-fno-asynchronous-unwind-tables"],
4914 x86_srcs = AVX512F_UKERNELS,
4915 deps = [
4916 ":tables",
4917 "@FP16",
4918 "@pthreadpool",
4919 ],
4920)
4921
4922xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004923 name = "avx512skx_ukernels",
4924 hdrs = INTERNAL_HDRS,
4925 gcc_copts = xnnpack_gcc_std_copts(),
4926 gcc_x86_copts = [
4927 "-mavx512f",
4928 "-mavx512cd",
4929 "-mavx512bw",
4930 "-mavx512dq",
4931 "-mavx512vl",
4932 ],
4933 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4934 msvc_copts = xnnpack_msvc_std_copts(),
4935 msvc_x86_32_copts = ["/arch:AVX512"],
4936 msvc_x86_64_copts = ["/arch:AVX512"],
4937 msys_copts = ["-fno-asynchronous-unwind-tables"],
4938 x86_srcs = AVX512SKX_UKERNELS,
4939 deps = [
4940 ":tables",
4941 "@FP16",
4942 "@pthreadpool",
4943 ],
4944)
4945
4946xnnpack_cc_library(
4947 name = "avx512skx_ukernels_test_mode",
4948 hdrs = INTERNAL_HDRS,
4949 copts = [
4950 "-UNDEBUG",
4951 "-DXNN_TEST_MODE=1",
4952 ],
4953 gcc_copts = xnnpack_gcc_std_copts(),
4954 gcc_x86_copts = [
4955 "-mavx512f",
4956 "-mavx512cd",
4957 "-mavx512bw",
4958 "-mavx512dq",
4959 "-mavx512vl",
4960 ],
4961 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4962 msvc_copts = xnnpack_msvc_std_copts(),
4963 msvc_x86_32_copts = ["/arch:AVX512"],
4964 msvc_x86_64_copts = ["/arch:AVX512"],
4965 msys_copts = ["-fno-asynchronous-unwind-tables"],
4966 x86_srcs = AVX512SKX_UKERNELS,
4967 deps = [
4968 ":tables",
4969 "@FP16",
4970 "@pthreadpool",
4971 ],
4972)
4973
4974xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004975 name = "asm_ukernels",
4976 hdrs = ["src/xnnpack/assembly.h"],
4977 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004978 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004979 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004980 wasm_srcs = WASM32_ASM_UKERNELS,
4981 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004982)
4983
Marat Dukhan3b59de22020-06-03 20:15:19 -07004984xnnpack_cc_library(
4985 name = "logging_utils",
4986 srcs = LOGGING_SRCS,
4987 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4988 copts = LOGGING_COPTS + [
4989 "-Isrc",
4990 "-Iinclude",
4991 ] + select({
4992 ":debug_build": [],
4993 "//conditions:default": xnnpack_min_size_copts(),
4994 }),
4995 gcc_copts = xnnpack_gcc_std_copts(),
4996 msvc_copts = xnnpack_msvc_std_copts(),
4997 visibility = xnnpack_visibility(),
4998 deps = [
4999 "@FP16",
5000 "@clog",
5001 "@pthreadpool",
5002 ],
5003)
5004
Marat Dukhan08c4a432019-10-03 09:29:21 -07005005xnnpack_aggregate_library(
5006 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005007 aarch32_ios_deps = [
5008 ":neon_ukernels",
5009 ":neonfma_ukernels",
5010 ":neonv8_ukernels",
5011 ":asm_ukernels",
5012 ],
5013 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005014 ":neon_ukernels",
5015 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005016 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005017 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005018 ":asm_ukernels",
5019 ],
5020 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005021 ":neon_ukernels",
5022 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005023 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005024 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005025 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005026 ":asm_ukernels",
5027 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005028 generic_deps = [
5029 ":scalar_ukernels",
5030 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005031 wasm_deps = [
5032 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005033 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005034 ],
5035 wasmsimd_deps = [
5036 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005037 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005038 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005039 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005040 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005041 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005042 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005043 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005044 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005045 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005046 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005047 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005048 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005049 ],
5050)
5051
Marat Dukhan33fcf782020-05-24 14:27:15 -07005052xnnpack_aggregate_library(
5053 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005054 aarch32_ios_deps = [
5055 ":neon_ukernels_test_mode",
5056 ":neonfma_ukernels_test_mode",
5057 ":neonv8_ukernels_test_mode",
5058 ":asm_ukernels",
5059 ],
5060 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005061 ":neon_ukernels_test_mode",
5062 ":neonfma_ukernels_test_mode",
5063 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005064 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005065 ":asm_ukernels",
5066 ],
5067 aarch64_deps = [
5068 ":neon_ukernels_test_mode",
5069 ":neonfma_ukernels_test_mode",
5070 ":neonv8_ukernels_test_mode",
5071 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005072 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005073 ":asm_ukernels",
5074 ],
5075 generic_deps = [
5076 ":scalar_ukernels_test_mode",
5077 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005078 wasm_deps = [
5079 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005080 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005081 ],
5082 wasmsimd_deps = [
5083 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005084 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005085 ],
5086 x86_deps = [
5087 ":sse2_ukernels_test_mode",
5088 ":ssse3_ukernels_test_mode",
5089 ":sse41_ukernels_test_mode",
5090 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005091 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005092 ":fma3_ukernels_test_mode",
5093 ":avx2_ukernels_test_mode",
5094 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005095 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005096 ],
5097)
5098
Marat Dukhan08c4a432019-10-03 09:29:21 -07005099xnnpack_cc_library(
5100 name = "im2col",
5101 srcs = ["src/im2col.c"],
5102 hdrs = [
5103 "src/xnnpack/common.h",
5104 "src/xnnpack/im2col.h",
5105 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005106 gcc_copts = xnnpack_gcc_std_copts(),
5107 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005108)
5109
5110xnnpack_cc_library(
5111 name = "indirection",
5112 srcs = ["src/indirection.c"],
5113 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005114 gcc_copts = xnnpack_gcc_std_copts(),
5115 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005116 deps = [
5117 "@FP16",
5118 "@FXdiv",
5119 "@pthreadpool",
5120 ],
5121)
5122
5123xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005124 name = "indirection_test_mode",
5125 srcs = ["src/indirection.c"],
5126 hdrs = INTERNAL_HDRS,
5127 copts = [
5128 "-UNDEBUG",
5129 "-DXNN_TEST_MODE=1",
5130 ],
5131 gcc_copts = xnnpack_gcc_std_copts(),
5132 msvc_copts = xnnpack_msvc_std_copts(),
5133 deps = [
5134 "@FP16",
5135 "@FXdiv",
5136 "@pthreadpool",
5137 ],
5138)
5139
5140xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005141 name = "packing",
5142 srcs = ["src/packing.c"],
5143 hdrs = INTERNAL_HDRS,
5144 gcc_copts = xnnpack_gcc_std_copts(),
5145 msvc_copts = xnnpack_msvc_std_copts(),
5146 deps = [
5147 "@FP16",
5148 "@FXdiv",
5149 "@pthreadpool",
5150 ],
5151)
5152
5153xnnpack_cc_library(
5154 name = "packing_test_mode",
5155 srcs = ["src/packing.c"],
5156 hdrs = INTERNAL_HDRS,
5157 copts = [
5158 "-UNDEBUG",
5159 "-DXNN_TEST_MODE=1",
5160 ],
5161 gcc_copts = xnnpack_gcc_std_copts(),
5162 msvc_copts = xnnpack_msvc_std_copts(),
5163 deps = [
5164 "@FP16",
5165 "@FXdiv",
5166 "@pthreadpool",
5167 ],
5168)
5169
5170xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005171 name = "operator_run",
5172 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005173 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005174 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005175 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5176 "//conditions:default": [],
5177 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005178 gcc_copts = xnnpack_gcc_std_copts(),
5179 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005180 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005181 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005182 "@FP16",
5183 "@FXdiv",
5184 "@clog",
5185 "@pthreadpool",
5186 ],
5187)
5188
Chao Mei6ddfc602020-05-13 22:29:36 -07005189xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005190 name = "operator_run_test_mode",
5191 srcs = ["src/operator-run.c"],
5192 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5193 copts = LOGGING_COPTS + [
5194 "-UNDEBUG",
5195 "-DXNN_TEST_MODE=1",
5196 ] + select({
5197 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5198 "//conditions:default": [],
5199 }),
5200 gcc_copts = xnnpack_gcc_std_copts(),
5201 msvc_copts = xnnpack_msvc_std_copts(),
5202 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005203 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005204 "@FP16",
5205 "@FXdiv",
5206 "@clog",
5207 "@pthreadpool",
5208 ],
5209)
5210
5211xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005212 name = "memory_planner",
5213 srcs = ["src/memory-planner.c"],
5214 hdrs = INTERNAL_HDRS,
5215 defines = select({
5216 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5217 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5218 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5219 }),
5220 gcc_copts = xnnpack_gcc_std_copts(),
5221 msvc_copts = xnnpack_msvc_std_copts(),
5222 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005223 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005224 "@pthreadpool",
5225 ],
5226)
5227
Marat Dukhan33fcf782020-05-24 14:27:15 -07005228xnnpack_cc_library(
5229 name = "memory_planner_test_mode",
5230 srcs = ["src/memory-planner.c"],
5231 hdrs = INTERNAL_HDRS,
5232 copts = [
5233 "-UNDEBUG",
5234 "-DXNN_TEST_MODE=1",
5235 ],
5236 defines = select({
5237 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5238 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5239 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5240 }),
5241 gcc_copts = xnnpack_gcc_std_copts(),
5242 msvc_copts = xnnpack_msvc_std_copts(),
5243 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005244 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005245 "@pthreadpool",
5246 ],
5247)
5248
Marat Dukhan08c4a432019-10-03 09:29:21 -07005249cc_library(
5250 name = "enable_assembly",
5251 defines = select({
5252 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5253 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005254 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005255 }),
5256)
5257
Marat Dukhan9de90e02020-06-18 16:04:12 -07005258cc_library(
5259 name = "enable_sparse",
5260 defines = select({
5261 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5262 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005263 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005264 }),
5265)
5266
Marat Dukhancf056b22019-10-07 10:26:29 -07005267xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005268 name = "operators",
5269 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005270 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005271 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005272 ],
5273 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005274 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005275 "-Isrc",
5276 "-Iinclude",
5277 ] + select({
5278 ":debug_build": [],
5279 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005280 }) + select({
5281 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5282 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005283 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005284 gcc_copts = xnnpack_gcc_std_copts(),
5285 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005286 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005287 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005288 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005289 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005290 "@FP16",
5291 "@FXdiv",
5292 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005293 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005294 ],
5295)
5296
Marat Dukhan10a38082020-04-17 03:58:35 -07005297xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005298 name = "operators_test_mode",
5299 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005300 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005301 "src/operator-delete.c",
5302 ],
5303 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5304 copts = LOGGING_COPTS + [
5305 "-Isrc",
5306 "-Iinclude",
5307 "-UNDEBUG",
5308 "-DXNN_TEST_MODE=1",
5309 ] + select({
5310 ":debug_build": [],
5311 "//conditions:default": xnnpack_min_size_copts(),
5312 }) + select({
5313 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5314 "//conditions:default": [],
5315 }),
5316 gcc_copts = xnnpack_gcc_std_copts(),
5317 msvc_copts = xnnpack_msvc_std_copts(),
5318 deps = [
5319 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005320 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005321 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005322 "@FP16",
5323 "@FXdiv",
5324 "@clog",
5325 "@pthreadpool",
5326 ],
5327)
5328
5329xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005330 name = "XNNPACK",
5331 srcs = [
5332 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005333 "src/runtime.c",
5334 "src/subgraph.c",
5335 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005336 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005337 hdrs = ["include/xnnpack.h"],
5338 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005339 "-Isrc",
5340 "-Iinclude",
5341 ] + select({
5342 ":debug_build": [],
5343 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005344 }) + select({
5345 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5346 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005347 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005348 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005349 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005350 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005351 visibility = xnnpack_visibility(),
5352 deps = [
5353 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005354 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005355 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005356 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005357 ":operator_run",
5358 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005359 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005360 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005361 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005362 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005363 ] + select({
5364 ":emscripten": [],
5365 "//conditions:default": ["@cpuinfo"],
5366 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005367)
5368
Marat Dukhan10a38082020-04-17 03:58:35 -07005369xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005370 name = "XNNPACK_test_mode",
5371 srcs = [
5372 "src/init.c",
5373 "src/runtime.c",
5374 "src/subgraph.c",
5375 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005376 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005377 hdrs = ["include/xnnpack.h"],
5378 copts = LOGGING_COPTS + [
5379 "-Isrc",
5380 "-Iinclude",
5381 "-UNDEBUG",
5382 "-DXNN_TEST_MODE=1",
5383 ] + select({
5384 ":debug_build": [],
5385 "//conditions:default": xnnpack_min_size_copts(),
5386 }) + select({
5387 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5388 "//conditions:default": [],
5389 }),
5390 gcc_copts = xnnpack_gcc_std_copts(),
5391 includes = ["include"],
5392 msvc_copts = xnnpack_msvc_std_copts(),
5393 visibility = xnnpack_visibility(),
5394 deps = [
5395 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005396 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005397 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005398 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005399 ":operator_run_test_mode",
5400 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005401 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005402 "@clog",
5403 "@FP16",
5404 "@pthreadpool",
5405 ] + select({
5406 ":emscripten": [],
5407 "//conditions:default": ["@cpuinfo"],
5408 }),
5409)
5410
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005411# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5412# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005413xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005414 name = "xnnpack_for_tflite",
5415 srcs = [
5416 "src/init.c",
5417 "src/runtime.c",
5418 "src/subgraph.c",
5419 "src/tensor.c",
5420 ] + SUBGRAPH_SRCS,
5421 hdrs = ["include/xnnpack.h"],
5422 copts = LOGGING_COPTS + [
5423 "-Isrc",
5424 "-Iinclude",
5425 ] + select({
5426 ":debug_build": [],
5427 "//conditions:default": xnnpack_min_size_copts(),
5428 }) + select({
5429 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5430 "//conditions:default": [],
5431 }),
5432 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005433 "XNN_NO_QU8_OPERATORS",
5434 "XNN_NO_U8_OPERATORS",
5435 "XNN_NO_X8_OPERATORS",
5436 "XNN_NO_F16_OPERATORS",
5437 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005438 ] + select({
5439 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005440 ":xnn_enable_qs8_explicit_false": [
5441 "XNN_NO_QC8_OPERATORS",
5442 "XNN_NO_QS8_OPERATORS",
5443 ],
5444 "//conditions:default": [
5445 "XNN_NO_QC8_OPERATORS",
5446 "XNN_NO_QS8_OPERATORS",
5447 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005448 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005449 gcc_copts = xnnpack_gcc_std_copts(),
5450 includes = ["include"],
5451 msvc_copts = xnnpack_msvc_std_copts(),
5452 visibility = xnnpack_visibility(),
5453 deps = [
5454 ":enable_assembly",
5455 ":enable_sparse",
5456 ":logging_utils",
5457 ":memory_planner",
5458 ":operator_run",
5459 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005460 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005461 "@clog",
5462 "@FP16",
5463 "@pthreadpool",
5464 ] + select({
5465 ":emscripten": [],
5466 "//conditions:default": ["@cpuinfo"],
5467 }),
5468)
5469
5470# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5471# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5472xnnpack_cc_library(
5473 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005474 srcs = [
5475 "src/init.c",
5476 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005477 hdrs = ["include/xnnpack.h"],
5478 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005479 "-Isrc",
5480 "-Iinclude",
5481 ] + select({
5482 ":debug_build": [],
5483 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005484 }) + select({
5485 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5486 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005487 }),
5488 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005489 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005490 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005491 "XNN_NO_U8_OPERATORS",
5492 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005493 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005494 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005495 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005496 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005497 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005498 visibility = xnnpack_visibility(),
5499 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005500 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005501 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005502 ":operator_run",
5503 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005504 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005505 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005506 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005507 ] + select({
5508 ":emscripten": [],
5509 "//conditions:default": ["@cpuinfo"],
5510 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005511)
5512
Marat Dukhancf056b22019-10-07 10:26:29 -07005513xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005514 name = "bench_utils",
5515 srcs = ["bench/utils.cc"],
5516 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005517 deps = [
5518 "@com_google_benchmark//:benchmark",
5519 "@cpuinfo",
5520 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005521)
5522
Frank Barchard7e955972019-10-11 10:34:25 -07005523######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005524
5525xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005526 name = "qs8_gemm_bench",
5527 srcs = [
5528 "bench/gemm.h",
5529 "bench/qs8-gemm.cc",
5530 "src/xnnpack/AlignedAllocator.h",
5531 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005532 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5533 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005534)
5535
5536xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005537 name = "qs8_requantization_bench",
5538 srcs = [
5539 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005540 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005541 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005542 ] + MICROKERNEL_BENCHMARK_HDRS,
5543 deps = MICROKERNEL_BENCHMARK_DEPS,
5544)
5545
5546xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005547 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005548 srcs = [
5549 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005550 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005551 "src/xnnpack/AlignedAllocator.h",
5552 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005553 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005554 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005555)
5556
5557xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005558 name = "qu8_requantization_bench",
5559 srcs = [
5560 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005561 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005562 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005563 ] + MICROKERNEL_BENCHMARK_HDRS,
5564 deps = MICROKERNEL_BENCHMARK_DEPS,
5565)
5566
5567xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005568 name = "f16_igemm_bench",
5569 srcs = [
5570 "bench/f16-igemm.cc",
5571 "bench/conv.h",
5572 "bench/google/conv.h",
5573 "src/xnnpack/AlignedAllocator.h",
5574 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005575 deps = MICROKERNEL_BENCHMARK_DEPS + [
5576 ":indirection",
5577 ":packing",
5578 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005579)
5580
5581xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005582 name = "f16_gemm_bench",
5583 srcs = [
5584 "bench/f16-gemm.cc",
5585 "bench/gemm.h",
5586 "src/xnnpack/AlignedAllocator.h",
5587 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005588 deps = MICROKERNEL_BENCHMARK_DEPS + [
5589 ":packing",
5590 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005591)
5592
5593xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005594 name = "f16_spmm_bench",
5595 srcs = [
5596 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005597 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005598 "src/xnnpack/AlignedAllocator.h",
5599 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005600 deps = MICROKERNEL_BENCHMARK_DEPS,
5601)
5602
5603xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005604 name = "f16_vrelu_bench",
5605 srcs = [
5606 "bench/f16-vrelu.cc",
5607 "src/xnnpack/AlignedAllocator.h",
5608 ] + MICROKERNEL_BENCHMARK_HDRS,
5609 deps = MICROKERNEL_BENCHMARK_DEPS,
5610)
5611
5612xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005613 name = "f32_igemm_bench",
5614 srcs = [
5615 "bench/f32-igemm.cc",
5616 "bench/conv.h",
5617 "src/xnnpack/AlignedAllocator.h",
5618 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005619 deps = MICROKERNEL_BENCHMARK_DEPS + [
5620 ":indirection",
5621 ":packing",
5622 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005623)
5624
5625xnnpack_benchmark(
5626 name = "f32_conv_hwc_bench",
5627 srcs = [
5628 "bench/f32-conv-hwc.cc",
5629 "bench/dconv.h",
5630 "src/xnnpack/AlignedAllocator.h",
5631 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005632 deps = MICROKERNEL_BENCHMARK_DEPS + [
5633 ":packing",
5634 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005635)
5636
5637xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005638 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005639 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005640 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005641 "bench/dconv.h",
5642 "src/xnnpack/AlignedAllocator.h",
5643 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005644 deps = MICROKERNEL_BENCHMARK_DEPS + [
5645 ":packing",
5646 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005647)
5648
5649xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005650 name = "f16_dwconv_bench",
5651 srcs = [
5652 "bench/f16-dwconv.cc",
5653 "bench/dwconv.h",
5654 "bench/google/dwconv.h",
5655 "src/xnnpack/AlignedAllocator.h",
5656 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005657 deps = MICROKERNEL_BENCHMARK_DEPS + [
5658 ":indirection",
5659 ":packing",
5660 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005661)
5662
5663xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005664 name = "f32_dwconv_bench",
5665 srcs = [
5666 "bench/f32-dwconv.cc",
5667 "bench/dwconv.h",
5668 "src/xnnpack/AlignedAllocator.h",
5669 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005670 deps = MICROKERNEL_BENCHMARK_DEPS + [
5671 ":indirection",
5672 ":packing",
5673 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005674)
5675
5676xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005677 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005678 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005679 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005680 "bench/dwconv.h",
5681 "src/xnnpack/AlignedAllocator.h",
5682 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005683 deps = MICROKERNEL_BENCHMARK_DEPS + [
5684 ":indirection",
5685 ":packing",
5686 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005687)
5688
5689xnnpack_benchmark(
5690 name = "f32_gemm_bench",
5691 srcs = [
5692 "bench/f32-gemm.cc",
5693 "bench/gemm.h",
5694 "src/xnnpack/AlignedAllocator.h",
5695 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005696 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005697 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005698)
5699
5700xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005701 name = "f32_raddexpminusmax_bench",
5702 srcs = [
5703 "bench/f32-raddexpminusmax.cc",
5704 "src/xnnpack/AlignedAllocator.h",
5705 ] + MICROKERNEL_BENCHMARK_HDRS,
5706 deps = MICROKERNEL_BENCHMARK_DEPS,
5707)
5708
5709xnnpack_benchmark(
5710 name = "f32_raddextexp_bench",
5711 srcs = [
5712 "bench/f32-raddextexp.cc",
5713 "src/xnnpack/AlignedAllocator.h",
5714 ] + MICROKERNEL_BENCHMARK_HDRS,
5715 deps = MICROKERNEL_BENCHMARK_DEPS,
5716)
5717
5718xnnpack_benchmark(
5719 name = "f32_raddstoreexpminusmax_bench",
5720 srcs = [
5721 "bench/f32-raddstoreexpminusmax.cc",
5722 "src/xnnpack/AlignedAllocator.h",
5723 ] + MICROKERNEL_BENCHMARK_HDRS,
5724 deps = MICROKERNEL_BENCHMARK_DEPS,
5725)
5726
5727xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005728 name = "f32_rmax_bench",
5729 srcs = [
5730 "bench/f32-rmax.cc",
5731 "src/xnnpack/AlignedAllocator.h",
5732 ] + MICROKERNEL_BENCHMARK_HDRS,
5733 deps = MICROKERNEL_BENCHMARK_DEPS,
5734)
5735
5736xnnpack_benchmark(
5737 name = "f32_spmm_bench",
5738 srcs = [
5739 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005740 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005741 "src/xnnpack/AlignedAllocator.h",
5742 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005743 deps = MICROKERNEL_BENCHMARK_DEPS,
5744)
5745
5746xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005747 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005748 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005749 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005750 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005751 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005752 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005753)
5754
5755xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005756 name = "f32_velu_bench",
5757 srcs = [
5758 "bench/f32-velu.cc",
5759 "src/xnnpack/AlignedAllocator.h",
5760 ] + MICROKERNEL_BENCHMARK_HDRS,
5761 deps = MICROKERNEL_BENCHMARK_DEPS,
5762)
5763
5764xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005765 name = "f32_vhswish_bench",
5766 srcs = [
5767 "bench/f32-vhswish.cc",
5768 "src/xnnpack/AlignedAllocator.h",
5769 ] + MICROKERNEL_BENCHMARK_HDRS,
5770 deps = MICROKERNEL_BENCHMARK_DEPS,
5771)
5772
5773xnnpack_benchmark(
5774 name = "f32_vrelu_bench",
5775 srcs = [
5776 "bench/f32-vrelu.cc",
5777 "src/xnnpack/AlignedAllocator.h",
5778 ] + MICROKERNEL_BENCHMARK_HDRS,
5779 deps = MICROKERNEL_BENCHMARK_DEPS,
5780)
5781
5782xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005783 name = "f32_vscaleexpminusmax_bench",
5784 srcs = [
5785 "bench/f32-vscaleexpminusmax.cc",
5786 "src/xnnpack/AlignedAllocator.h",
5787 ] + MICROKERNEL_BENCHMARK_HDRS,
5788 deps = MICROKERNEL_BENCHMARK_DEPS,
5789)
5790
5791xnnpack_benchmark(
5792 name = "f32_vscaleextexp_bench",
5793 srcs = [
5794 "bench/f32-vscaleextexp.cc",
5795 "src/xnnpack/AlignedAllocator.h",
5796 ] + MICROKERNEL_BENCHMARK_HDRS,
5797 deps = MICROKERNEL_BENCHMARK_DEPS,
5798)
5799
5800xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005801 name = "f32_vsigmoid_bench",
5802 srcs = [
5803 "bench/f32-vsigmoid.cc",
5804 "src/xnnpack/AlignedAllocator.h",
5805 ] + MICROKERNEL_BENCHMARK_HDRS,
5806 deps = MICROKERNEL_BENCHMARK_DEPS,
5807)
5808
5809xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005810 name = "f32_vsqrt_bench",
5811 srcs = [
5812 "bench/f32-vsqrt.cc",
5813 "src/xnnpack/AlignedAllocator.h",
5814 ] + MICROKERNEL_BENCHMARK_HDRS,
5815 deps = MICROKERNEL_BENCHMARK_DEPS,
5816)
5817
5818xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005819 name = "f32_im2col_gemm_bench",
5820 srcs = [
5821 "bench/f32-im2col-gemm.cc",
5822 "bench/conv.h",
5823 "src/xnnpack/AlignedAllocator.h",
5824 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005825 deps = MICROKERNEL_BENCHMARK_DEPS + [
5826 ":im2col",
5827 ":packing",
5828 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005829)
5830
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005831xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005832 name = "rounding_bench",
5833 srcs = [
5834 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005835 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005836 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005837 ] + MICROKERNEL_BENCHMARK_HDRS,
5838 deps = MICROKERNEL_BENCHMARK_DEPS,
5839)
5840
Marat Dukhan08c4a432019-10-03 09:29:21 -07005841########################### Benchmarks for operators ###########################
5842
5843xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005844 name = "average_pooling_bench",
5845 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005846 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005847 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005848 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005849)
5850
5851xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005852 name = "bankers_rounding_bench",
5853 srcs = ["bench/bankers-rounding.cc"],
5854 copts = xnnpack_optional_tflite_copts(),
5855 tags = ["nowin32"],
5856 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5857)
5858
5859xnnpack_benchmark(
5860 name = "ceiling_bench",
5861 srcs = ["bench/ceiling.cc"],
5862 copts = xnnpack_optional_tflite_copts(),
5863 tags = ["nowin32"],
5864 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5865)
5866
5867xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005868 name = "channel_shuffle_bench",
5869 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005870 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005871)
5872
5873xnnpack_benchmark(
5874 name = "convolution_bench",
5875 srcs = ["bench/convolution.cc"],
5876 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005877 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005878 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005879)
5880
5881xnnpack_benchmark(
5882 name = "deconvolution_bench",
5883 srcs = ["bench/deconvolution.cc"],
5884 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005885 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005886 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005887)
5888
5889xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005890 name = "elu_bench",
5891 srcs = ["bench/elu.cc"],
5892 copts = xnnpack_optional_tflite_copts(),
5893 tags = ["nowin32"],
5894 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5895)
5896
5897xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005898 name = "floor_bench",
5899 srcs = ["bench/floor.cc"],
5900 copts = xnnpack_optional_tflite_copts(),
5901 tags = ["nowin32"],
5902 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5903)
5904
5905xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005906 name = "global_average_pooling_bench",
5907 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005908 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005909)
5910
5911xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005912 name = "hardswish_bench",
5913 srcs = ["bench/hardswish.cc"],
5914 copts = xnnpack_optional_tflite_copts(),
5915 tags = ["nowin32"],
5916 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5917)
5918
5919xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005920 name = "max_pooling_bench",
5921 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005922 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005923)
5924
5925xnnpack_benchmark(
5926 name = "sigmoid_bench",
5927 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005928 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005929 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005930 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005931)
5932
5933xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005934 name = "prelu_bench",
5935 srcs = ["bench/prelu.cc"],
5936 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005937 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005938 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005939)
5940
5941xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005942 name = "softmax_bench",
5943 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005944 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005945 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005946 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005947)
5948
Marat Dukhan87727142020-06-24 15:24:10 -07005949xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005950 name = "square_root_bench",
5951 srcs = ["bench/square-root.cc"],
5952 copts = xnnpack_optional_tflite_copts(),
5953 tags = ["nowin32"],
5954 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5955)
5956
5957xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005958 name = "truncation_bench",
5959 srcs = ["bench/truncation.cc"],
5960 deps = OPERATOR_BENCHMARK_DEPS,
5961)
5962
Marat Dukhanc068bb62019-10-04 13:24:39 -07005963############################# End-to-end benchmarks ############################
5964
5965cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005966 name = "fp32_mobilenet_v1",
5967 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005968 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005969 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005970 linkstatic = True,
5971 deps = [
5972 ":XNNPACK",
5973 "@pthreadpool",
5974 ],
5975)
5976
5977cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005978 name = "fp32_sparse_mobilenet_v1",
5979 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5980 hdrs = ["models/models.h"],
5981 copts = xnnpack_std_cxxopts(),
5982 linkstatic = True,
5983 deps = [
5984 ":XNNPACK",
5985 "@pthreadpool",
5986 ],
5987)
5988
5989cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005990 name = "fp16_mobilenet_v1",
5991 srcs = ["models/fp16-mobilenet-v1.cc"],
5992 hdrs = ["models/models.h"],
5993 copts = xnnpack_std_cxxopts(),
5994 linkstatic = True,
5995 deps = [
5996 ":XNNPACK",
5997 "@FP16",
5998 "@pthreadpool",
5999 ],
6000)
6001
6002cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006003 name = "qs8_mobilenet_v1",
6004 srcs = ["models/qs8-mobilenet-v1.cc"],
6005 hdrs = ["models/models.h"],
6006 copts = xnnpack_std_cxxopts(),
6007 linkstatic = True,
6008 deps = [
6009 ":XNNPACK",
6010 "@pthreadpool",
6011 ],
6012)
6013
6014cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006015 name = "qs8_mobilenet_v2",
6016 srcs = ["models/qs8-mobilenet-v2.cc"],
6017 hdrs = ["models/models.h"],
6018 copts = xnnpack_std_cxxopts(),
6019 linkstatic = True,
6020 deps = [
6021 ":XNNPACK",
6022 "@pthreadpool",
6023 ],
6024)
6025
6026cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006027 name = "qu8_mobilenet_v1",
6028 srcs = ["models/qu8-mobilenet-v1.cc"],
6029 hdrs = ["models/models.h"],
6030 copts = xnnpack_std_cxxopts(),
6031 linkstatic = True,
6032 deps = [
6033 ":XNNPACK",
6034 "@pthreadpool",
6035 ],
6036)
6037
6038cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006039 name = "fp32_mobilenet_v2",
6040 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006041 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006042 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006043 linkstatic = True,
6044 deps = [
6045 ":XNNPACK",
6046 "@pthreadpool",
6047 ],
6048)
6049
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006050cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006051 name = "fp32_sparse_mobilenet_v2",
6052 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6053 hdrs = ["models/models.h"],
6054 copts = xnnpack_std_cxxopts(),
6055 linkstatic = True,
6056 deps = [
6057 ":XNNPACK",
6058 "@pthreadpool",
6059 ],
6060)
6061
6062cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006063 name = "fp16_mobilenet_v2",
6064 srcs = ["models/fp16-mobilenet-v2.cc"],
6065 hdrs = ["models/models.h"],
6066 copts = xnnpack_std_cxxopts(),
6067 linkstatic = True,
6068 deps = [
6069 ":XNNPACK",
6070 "@FP16",
6071 "@pthreadpool",
6072 ],
6073)
6074
6075cc_library(
6076 name = "fp32_mobilenet_v3_large",
6077 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006078 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006079 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006080 linkstatic = True,
6081 deps = [
6082 ":XNNPACK",
6083 "@pthreadpool",
6084 ],
6085)
6086
6087cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006088 name = "fp32_sparse_mobilenet_v3_large",
6089 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6090 hdrs = ["models/models.h"],
6091 copts = xnnpack_std_cxxopts(),
6092 linkstatic = True,
6093 deps = [
6094 ":XNNPACK",
6095 "@pthreadpool",
6096 ],
6097)
6098
6099cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006100 name = "fp16_mobilenet_v3_large",
6101 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6102 hdrs = ["models/models.h"],
6103 copts = xnnpack_std_cxxopts(),
6104 linkstatic = True,
6105 deps = [
6106 ":XNNPACK",
6107 "@FP16",
6108 "@pthreadpool",
6109 ],
6110)
6111
6112cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006113 name = "fp32_mobilenet_v3_small",
6114 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006115 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006116 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006117 linkstatic = True,
6118 deps = [
6119 ":XNNPACK",
6120 "@pthreadpool",
6121 ],
6122)
6123
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006124cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006125 name = "fp32_sparse_mobilenet_v3_small",
6126 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6127 hdrs = ["models/models.h"],
6128 copts = xnnpack_std_cxxopts(),
6129 linkstatic = True,
6130 deps = [
6131 ":XNNPACK",
6132 "@pthreadpool",
6133 ],
6134)
6135
6136cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006137 name = "fp16_mobilenet_v3_small",
6138 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6139 hdrs = ["models/models.h"],
6140 copts = xnnpack_std_cxxopts(),
6141 linkstatic = True,
6142 deps = [
6143 ":XNNPACK",
6144 "@FP16",
6145 "@pthreadpool",
6146 ],
6147)
6148
Marat Dukhanc068bb62019-10-04 13:24:39 -07006149xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006150 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006151 srcs = [
6152 "bench/f32-dwconv-e2e.cc",
6153 "bench/end2end.h",
6154 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006155 deps = MICROKERNEL_BENCHMARK_DEPS + [
6156 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006157 ":fp32_mobilenet_v1",
6158 ":fp32_mobilenet_v2",
6159 ":fp32_mobilenet_v3_large",
6160 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006161 ],
6162)
6163
6164xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006165 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006166 srcs = [
6167 "bench/f32-gemm-e2e.cc",
6168 "bench/end2end.h",
6169 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006170 deps = MICROKERNEL_BENCHMARK_DEPS + [
6171 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006172 ":fp32_mobilenet_v1",
6173 ":fp32_mobilenet_v2",
6174 ":fp32_mobilenet_v3_large",
6175 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006176 ],
6177)
6178
6179xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006180 name = "qs8_gemm_e2e_bench",
6181 srcs = [
6182 "bench/qs8-gemm-e2e.cc",
6183 "bench/end2end.h",
6184 ] + MICROKERNEL_BENCHMARK_HDRS,
6185 deps = MICROKERNEL_BENCHMARK_DEPS + [
6186 ":XNNPACK",
6187 ":qs8_mobilenet_v1",
6188 ":qs8_mobilenet_v2",
6189 ],
6190)
6191
6192xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006193 name = "end2end_bench",
6194 srcs = ["bench/end2end.cc"],
6195 deps = [
6196 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006197 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006198 ":fp16_mobilenet_v1",
6199 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006200 ":fp16_mobilenet_v3_large",
6201 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006202 ":fp32_mobilenet_v1",
6203 ":fp32_mobilenet_v2",
6204 ":fp32_mobilenet_v3_large",
6205 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006206 ":fp32_sparse_mobilenet_v1",
6207 ":fp32_sparse_mobilenet_v2",
6208 ":fp32_sparse_mobilenet_v3_large",
6209 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006210 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006211 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006212 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006213 "@pthreadpool",
6214 ],
6215)
6216
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006217#################### Accuracy evaluation for math functions ####################
6218
6219xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006220 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006221 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006222 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006223 "src/xnnpack/AlignedAllocator.h",
6224 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006225 deps = ACCURACY_EVAL_DEPS + [
6226 ":bench_utils",
6227 "@cpuinfo",
6228 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006229)
6230
Marat Dukhan515c9772019-10-17 18:07:57 -07006231xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006232 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006233 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006234 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006235 "src/xnnpack/AlignedAllocator.h",
6236 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006237 deps = ACCURACY_EVAL_DEPS + [
6238 ":bench_utils",
6239 "@cpuinfo",
6240 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006241)
6242
Marat Dukhan98ba4412019-10-23 02:14:28 -07006243xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006244 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006245 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006246 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006247 "src/xnnpack/AlignedAllocator.h",
6248 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006249 deps = ACCURACY_EVAL_DEPS + [
6250 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006251 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006252 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006253)
6254
6255xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006256 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006257 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006258 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006259 "src/xnnpack/AlignedAllocator.h",
6260 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006261 deps = ACCURACY_EVAL_DEPS + [
6262 ":bench_utils",
6263 "@cpuinfo",
6264 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006265)
6266
Marat Dukhanf44f0222020-12-14 11:53:27 -08006267xnnpack_benchmark(
6268 name = "f32_sigmoid_ulp_eval",
6269 srcs = [
6270 "eval/f32-sigmoid-ulp.cc",
6271 "src/xnnpack/AlignedAllocator.h",
6272 ] + ACCURACY_EVAL_HDRS,
6273 deps = ACCURACY_EVAL_DEPS + [
6274 ":bench_utils",
6275 "@cpuinfo",
6276 ],
6277)
6278
6279xnnpack_benchmark(
6280 name = "f32_sqrt_ulp_eval",
6281 srcs = [
6282 "eval/f32-sqrt-ulp.cc",
6283 "src/xnnpack/AlignedAllocator.h",
6284 ] + ACCURACY_EVAL_HDRS,
6285 deps = ACCURACY_EVAL_DEPS + [
6286 ":bench_utils",
6287 "@cpuinfo",
6288 ],
6289)
6290
6291################### Accuracy verification for math functions ##################
6292
6293xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006294 name = "f32_exp_eval",
6295 srcs = [
6296 "eval/f32-exp.cc",
6297 "src/xnnpack/AlignedAllocator.h",
6298 "src/xnnpack/math-stubs.h",
6299 ] + MICROKERNEL_TEST_HDRS,
6300 automatic = False,
6301 deps = MICROKERNEL_TEST_DEPS,
6302)
6303
6304xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006305 name = "f32_expm1minus_eval",
6306 srcs = [
6307 "eval/f32-expm1minus.cc",
6308 "src/xnnpack/AlignedAllocator.h",
6309 "src/xnnpack/math-stubs.h",
6310 ] + MICROKERNEL_TEST_HDRS,
6311 automatic = False,
6312 deps = MICROKERNEL_TEST_DEPS,
6313)
6314
Marat Dukhan8853b822020-05-07 12:19:01 -07006315xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006316 name = "f32_expminus_eval",
6317 srcs = [
6318 "eval/f32-expminus.cc",
6319 "src/xnnpack/AlignedAllocator.h",
6320 "src/xnnpack/math-stubs.h",
6321 ] + MICROKERNEL_TEST_HDRS,
6322 automatic = False,
6323 deps = MICROKERNEL_TEST_DEPS,
6324)
6325
6326xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006327 name = "f32_roundne_eval",
6328 srcs = [
6329 "eval/f32-roundne.cc",
6330 "src/xnnpack/AlignedAllocator.h",
6331 "src/xnnpack/math-stubs.h",
6332 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006333 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006334 deps = MICROKERNEL_TEST_DEPS,
6335)
6336
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006337xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006338 name = "f32_roundd_eval",
6339 srcs = [
6340 "eval/f32-roundd.cc",
6341 "src/xnnpack/AlignedAllocator.h",
6342 "src/xnnpack/math-stubs.h",
6343 ] + MICROKERNEL_TEST_HDRS,
6344 automatic = False,
6345 deps = MICROKERNEL_TEST_DEPS,
6346)
6347
6348xnnpack_unit_test(
6349 name = "f32_roundu_eval",
6350 srcs = [
6351 "eval/f32-roundu.cc",
6352 "src/xnnpack/AlignedAllocator.h",
6353 "src/xnnpack/math-stubs.h",
6354 ] + MICROKERNEL_TEST_HDRS,
6355 automatic = False,
6356 deps = MICROKERNEL_TEST_DEPS,
6357)
6358
6359xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006360 name = "f32_roundz_eval",
6361 srcs = [
6362 "eval/f32-roundz.cc",
6363 "src/xnnpack/AlignedAllocator.h",
6364 "src/xnnpack/math-stubs.h",
6365 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006366 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006367 deps = MICROKERNEL_TEST_DEPS,
6368)
6369
Marat Dukhan08c4a432019-10-03 09:29:21 -07006370######################### Unit tests for micro-kernels #########################
6371
6372xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006373 name = "f16_dwconv_minmax_test",
6374 srcs = [
6375 "test/f16-dwconv-minmax.cc",
6376 "test/dwconv-microkernel-tester.h",
6377 "src/xnnpack/AlignedAllocator.h",
6378 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6379 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6380)
6381
6382xnnpack_unit_test(
6383 name = "f16_gavgpool_minmax_test",
6384 srcs = [
6385 "test/f16-gavgpool-minmax.cc",
6386 "test/gavgpool-microkernel-tester.h",
6387 "src/xnnpack/AlignedAllocator.h",
6388 ] + MICROKERNEL_TEST_HDRS,
6389 deps = MICROKERNEL_TEST_DEPS,
6390)
6391
6392xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006393 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006394 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006395 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006396 "test/gemm-microkernel-tester.h",
6397 "src/xnnpack/AlignedAllocator.h",
6398 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006399 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006400)
6401
6402xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006403 name = "f16_igemm_minmax_test",
6404 srcs = [
6405 "test/f16-igemm-minmax.cc",
6406 "test/gemm-microkernel-tester.h",
6407 "src/xnnpack/AlignedAllocator.h",
6408 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6409 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6410)
6411
6412xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006413 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006414 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006415 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006416 "test/spmm-microkernel-tester.h",
6417 "src/xnnpack/AlignedAllocator.h",
6418 ] + MICROKERNEL_TEST_HDRS,
6419 deps = MICROKERNEL_TEST_DEPS,
6420)
6421
6422xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006423 name = "f16_vadd_minmax_test",
6424 srcs = [
6425 "test/f16-vadd-minmax.cc",
6426 "test/vbinary-microkernel-tester.h",
6427 ] + MICROKERNEL_TEST_HDRS,
6428 deps = MICROKERNEL_TEST_DEPS,
6429)
6430
6431xnnpack_unit_test(
6432 name = "f16_vaddc_minmax_test",
6433 srcs = [
6434 "test/f16-vaddc-minmax.cc",
6435 "test/vbinaryc-microkernel-tester.h",
6436 ] + MICROKERNEL_TEST_HDRS,
6437 deps = MICROKERNEL_TEST_DEPS,
6438)
6439
6440xnnpack_unit_test(
6441 name = "f16_vclamp_test",
6442 srcs = [
6443 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006444 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006445 ] + MICROKERNEL_TEST_HDRS,
6446 deps = MICROKERNEL_TEST_DEPS,
6447)
6448
6449xnnpack_unit_test(
6450 name = "f16_vdiv_minmax_test",
6451 srcs = [
6452 "test/f16-vdiv-minmax.cc",
6453 "test/vbinary-microkernel-tester.h",
6454 ] + MICROKERNEL_TEST_HDRS,
6455 deps = MICROKERNEL_TEST_DEPS,
6456)
6457
6458xnnpack_unit_test(
6459 name = "f16_vdivc_minmax_test",
6460 srcs = [
6461 "test/f16-vdivc-minmax.cc",
6462 "test/vbinaryc-microkernel-tester.h",
6463 ] + MICROKERNEL_TEST_HDRS,
6464 deps = MICROKERNEL_TEST_DEPS,
6465)
6466
6467xnnpack_unit_test(
6468 name = "f16_vrdivc_minmax_test",
6469 srcs = [
6470 "test/f16-vrdivc-minmax.cc",
6471 "test/vbinaryc-microkernel-tester.h",
6472 ] + MICROKERNEL_TEST_HDRS,
6473 deps = MICROKERNEL_TEST_DEPS,
6474)
6475
6476xnnpack_unit_test(
6477 name = "f16_vhswish_test",
6478 srcs = [
6479 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006480 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006481 ] + MICROKERNEL_TEST_HDRS,
6482 deps = MICROKERNEL_TEST_DEPS,
6483)
6484
6485xnnpack_unit_test(
6486 name = "f16_vmax_test",
6487 srcs = [
6488 "test/f16-vmax.cc",
6489 "test/vbinary-microkernel-tester.h",
6490 ] + MICROKERNEL_TEST_HDRS,
6491 deps = MICROKERNEL_TEST_DEPS,
6492)
6493
6494xnnpack_unit_test(
6495 name = "f16_vmaxc_test",
6496 srcs = [
6497 "test/f16-vmaxc.cc",
6498 "test/vbinaryc-microkernel-tester.h",
6499 ] + MICROKERNEL_TEST_HDRS,
6500 deps = MICROKERNEL_TEST_DEPS,
6501)
6502
6503xnnpack_unit_test(
6504 name = "f16_vmin_test",
6505 srcs = [
6506 "test/f16-vmin.cc",
6507 "test/vbinary-microkernel-tester.h",
6508 ] + MICROKERNEL_TEST_HDRS,
6509 deps = MICROKERNEL_TEST_DEPS,
6510)
6511
6512xnnpack_unit_test(
6513 name = "f16_vminc_test",
6514 srcs = [
6515 "test/f16-vminc.cc",
6516 "test/vbinaryc-microkernel-tester.h",
6517 ] + MICROKERNEL_TEST_HDRS,
6518 deps = MICROKERNEL_TEST_DEPS,
6519)
6520
6521xnnpack_unit_test(
6522 name = "f16_vmul_minmax_test",
6523 srcs = [
6524 "test/f16-vmul-minmax.cc",
6525 "test/vbinary-microkernel-tester.h",
6526 ] + MICROKERNEL_TEST_HDRS,
6527 deps = MICROKERNEL_TEST_DEPS,
6528)
6529
6530xnnpack_unit_test(
6531 name = "f16_vmulc_minmax_test",
6532 srcs = [
6533 "test/f16-vmulc-minmax.cc",
6534 "test/vbinaryc-microkernel-tester.h",
6535 ] + MICROKERNEL_TEST_HDRS,
6536 deps = MICROKERNEL_TEST_DEPS,
6537)
6538
6539xnnpack_unit_test(
6540 name = "f16_vmulcaddc_minmax_test",
6541 srcs = [
6542 "test/f16-vmulcaddc-minmax.cc",
6543 "test/vmulcaddc-microkernel-tester.h",
6544 "src/xnnpack/AlignedAllocator.h",
6545 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6546 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6547)
6548
6549xnnpack_unit_test(
6550 name = "f16_vsub_minmax_test",
6551 srcs = [
6552 "test/f16-vsub-minmax.cc",
6553 "test/vbinary-microkernel-tester.h",
6554 ] + MICROKERNEL_TEST_HDRS,
6555 deps = MICROKERNEL_TEST_DEPS,
6556)
6557
6558xnnpack_unit_test(
6559 name = "f16_vsubc_minmax_test",
6560 srcs = [
6561 "test/f16-vsubc-minmax.cc",
6562 "test/vbinaryc-microkernel-tester.h",
6563 ] + MICROKERNEL_TEST_HDRS,
6564 deps = MICROKERNEL_TEST_DEPS,
6565)
6566
6567xnnpack_unit_test(
6568 name = "f16_vrsubc_minmax_test",
6569 srcs = [
6570 "test/f16-vrsubc-minmax.cc",
6571 "test/vbinaryc-microkernel-tester.h",
6572 ] + MICROKERNEL_TEST_HDRS,
6573 deps = MICROKERNEL_TEST_DEPS,
6574)
6575
6576xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006577 name = "f32_argmaxpool_test",
6578 srcs = [
6579 "test/f32-argmaxpool.cc",
6580 "test/argmaxpool-microkernel-tester.h",
6581 "src/xnnpack/AlignedAllocator.h",
6582 ] + MICROKERNEL_TEST_HDRS,
6583 deps = MICROKERNEL_TEST_DEPS,
6584)
6585
6586xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006587 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006588 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006589 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006590 "test/avgpool-microkernel-tester.h",
6591 "src/xnnpack/AlignedAllocator.h",
6592 ] + MICROKERNEL_TEST_HDRS,
6593 deps = MICROKERNEL_TEST_DEPS,
6594)
6595
6596xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006597 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006598 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006599 "test/f32-ibilinear.cc",
6600 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006601 "src/xnnpack/AlignedAllocator.h",
6602 ] + MICROKERNEL_TEST_HDRS,
6603 deps = MICROKERNEL_TEST_DEPS,
6604)
6605
6606xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006607 name = "f32_ibilinear_chw_test",
6608 srcs = [
6609 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006610 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006611 "src/xnnpack/AlignedAllocator.h",
6612 ] + MICROKERNEL_TEST_HDRS,
6613 deps = MICROKERNEL_TEST_DEPS,
6614)
6615
6616xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006617 name = "f32_igemm_test",
6618 srcs = [
6619 "test/f32-igemm.cc",
6620 "test/gemm-microkernel-tester.h",
6621 "src/xnnpack/AlignedAllocator.h",
6622 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006623 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006624)
6625
6626xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006627 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006628 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006629 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006630 "test/gemm-microkernel-tester.h",
6631 "src/xnnpack/AlignedAllocator.h",
6632 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006633 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006634)
6635
6636xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006637 name = "f32_igemm_minmax_test",
6638 srcs = [
6639 "test/f32-igemm-minmax.cc",
6640 "test/gemm-microkernel-tester.h",
6641 "src/xnnpack/AlignedAllocator.h",
6642 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006643 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006644)
6645
6646xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006647 name = "f32_conv_hwc_test",
6648 srcs = [
6649 "test/f32-conv-hwc.cc",
6650 "test/conv-hwc-microkernel-tester.h",
6651 "src/xnnpack/AlignedAllocator.h",
6652 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006653 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006654)
6655
6656xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006657 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006658 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006659 "test/f32-conv-hwc2chw.cc",
6660 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006661 "src/xnnpack/AlignedAllocator.h",
6662 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006663 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006664)
6665
6666xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006667 name = "f32_dwconv_test",
6668 srcs = [
6669 "test/f32-dwconv.cc",
6670 "test/dwconv-microkernel-tester.h",
6671 "src/xnnpack/AlignedAllocator.h",
6672 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006673 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006674)
6675
6676xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006677 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006678 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006679 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006680 "test/dwconv-microkernel-tester.h",
6681 "src/xnnpack/AlignedAllocator.h",
6682 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006683 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006684)
6685
6686xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006687 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006688 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006689 "test/f32-dwconv2d-chw.cc",
6690 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006691 "src/xnnpack/AlignedAllocator.h",
6692 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006693 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006694)
6695
6696xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006697 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006698 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006699 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006700 "test/gavgpool-microkernel-tester.h",
6701 "src/xnnpack/AlignedAllocator.h",
6702 ] + MICROKERNEL_TEST_HDRS,
6703 deps = MICROKERNEL_TEST_DEPS,
6704)
6705
6706xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006707 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006708 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006709 "test/f32-gavgpool-cw.cc",
6710 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006711 "src/xnnpack/AlignedAllocator.h",
6712 ] + MICROKERNEL_TEST_HDRS,
6713 deps = MICROKERNEL_TEST_DEPS,
6714)
6715
6716xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006717 name = "f32_gemm_test",
6718 srcs = [
6719 "test/f32-gemm.cc",
6720 "test/gemm-microkernel-tester.h",
6721 "src/xnnpack/AlignedAllocator.h",
6722 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006723 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006724)
6725
6726xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006727 name = "f32_gemm_relu_test",
6728 srcs = [
6729 "test/f32-gemm-relu.cc",
6730 "test/gemm-microkernel-tester.h",
6731 "src/xnnpack/AlignedAllocator.h",
6732 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006733 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006734)
6735
6736xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006737 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006738 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006739 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006740 "test/gemm-microkernel-tester.h",
6741 "src/xnnpack/AlignedAllocator.h",
6742 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006743 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006744)
6745
6746xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006747 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006748 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006749 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006750 "test/gemm-microkernel-tester.h",
6751 "src/xnnpack/AlignedAllocator.h",
6752 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006753 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006754)
6755
6756xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006757 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006758 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006759 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006760 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006761 ] + MICROKERNEL_TEST_HDRS,
6762 deps = MICROKERNEL_TEST_DEPS,
6763)
6764
6765xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006766 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006767 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006768 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006769 "test/maxpool-microkernel-tester.h",
6770 ] + MICROKERNEL_TEST_HDRS,
6771 deps = MICROKERNEL_TEST_DEPS,
6772)
6773
6774xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006775 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006776 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006777 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006778 "test/avgpool-microkernel-tester.h",
6779 "src/xnnpack/AlignedAllocator.h",
6780 ] + MICROKERNEL_TEST_HDRS,
6781 deps = MICROKERNEL_TEST_DEPS,
6782)
6783
6784xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006785 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006786 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006787 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006788 "test/gemm-microkernel-tester.h",
6789 "src/xnnpack/AlignedAllocator.h",
6790 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006791 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006792)
6793
6794xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006795 name = "f16_prelu_test",
6796 srcs = [
6797 "test/f16-prelu.cc",
6798 "test/prelu-microkernel-tester.h",
6799 "src/xnnpack/AlignedAllocator.h",
6800 ] + MICROKERNEL_TEST_HDRS,
6801 deps = MICROKERNEL_TEST_DEPS,
6802)
6803
6804xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006805 name = "f32_prelu_test",
6806 srcs = [
6807 "test/f32-prelu.cc",
6808 "test/prelu-microkernel-tester.h",
6809 "src/xnnpack/AlignedAllocator.h",
6810 ] + MICROKERNEL_TEST_HDRS,
6811 deps = MICROKERNEL_TEST_DEPS,
6812)
6813
6814xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006815 name = "f32_raddexpminusmax_test",
6816 srcs = [
6817 "test/f32-raddexpminusmax.cc",
6818 "test/raddexpminusmax-microkernel-tester.h",
6819 ] + MICROKERNEL_TEST_HDRS,
6820 deps = MICROKERNEL_TEST_DEPS,
6821)
6822
6823xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006824 name = "f32_raddextexp_test",
6825 srcs = [
6826 "test/f32-raddextexp.cc",
6827 "test/raddextexp-microkernel-tester.h",
6828 ] + MICROKERNEL_TEST_HDRS,
6829 deps = MICROKERNEL_TEST_DEPS,
6830)
6831
6832xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006833 name = "f32_raddstoreexpminusmax_test",
6834 srcs = [
6835 "test/f32-raddstoreexpminusmax.cc",
6836 "test/raddstoreexpminusmax-microkernel-tester.h",
6837 ] + MICROKERNEL_TEST_HDRS,
6838 deps = MICROKERNEL_TEST_DEPS,
6839)
6840
6841xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006842 name = "f32_rmax_test",
6843 srcs = [
6844 "test/f32-rmax.cc",
6845 "test/rmax-microkernel-tester.h",
6846 ] + MICROKERNEL_TEST_HDRS,
6847 deps = MICROKERNEL_TEST_DEPS,
6848)
6849
6850xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006851 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006852 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006853 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006854 "test/spmm-microkernel-tester.h",
6855 "src/xnnpack/AlignedAllocator.h",
6856 ] + MICROKERNEL_TEST_HDRS,
6857 deps = MICROKERNEL_TEST_DEPS,
6858)
6859
6860xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006861 name = "f32_vabs_test",
6862 srcs = [
6863 "test/f32-vabs.cc",
6864 "test/vunary-microkernel-tester.h",
6865 ] + MICROKERNEL_TEST_HDRS,
6866 deps = MICROKERNEL_TEST_DEPS,
6867)
6868
6869xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006870 name = "f32_vadd_test",
6871 srcs = [
6872 "test/f32-vadd.cc",
6873 "test/vbinary-microkernel-tester.h",
6874 ] + MICROKERNEL_TEST_HDRS,
6875 deps = MICROKERNEL_TEST_DEPS,
6876)
6877
6878xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006879 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006880 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006881 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006882 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006883 ] + MICROKERNEL_TEST_HDRS,
6884 deps = MICROKERNEL_TEST_DEPS,
6885)
6886
6887xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006888 name = "f32_vadd_relu_test",
6889 srcs = [
6890 "test/f32-vadd-relu.cc",
6891 "test/vbinary-microkernel-tester.h",
6892 ] + MICROKERNEL_TEST_HDRS,
6893 deps = MICROKERNEL_TEST_DEPS,
6894)
6895
6896xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006897 name = "f32_vaddc_test",
6898 srcs = [
6899 "test/f32-vaddc.cc",
6900 "test/vbinaryc-microkernel-tester.h",
6901 ] + MICROKERNEL_TEST_HDRS,
6902 deps = MICROKERNEL_TEST_DEPS,
6903)
6904
6905xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006906 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006907 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006908 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006909 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006910 ] + MICROKERNEL_TEST_HDRS,
6911 deps = MICROKERNEL_TEST_DEPS,
6912)
6913
6914xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006915 name = "f32_vaddc_relu_test",
6916 srcs = [
6917 "test/f32-vaddc-relu.cc",
6918 "test/vbinaryc-microkernel-tester.h",
6919 ] + MICROKERNEL_TEST_HDRS,
6920 deps = MICROKERNEL_TEST_DEPS,
6921)
6922
6923xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006924 name = "f32_vclamp_test",
6925 srcs = [
6926 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006927 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006928 ] + MICROKERNEL_TEST_HDRS,
6929 deps = MICROKERNEL_TEST_DEPS,
6930)
6931
6932xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006933 name = "f32_vdiv_test",
6934 srcs = [
6935 "test/f32-vdiv.cc",
6936 "test/vbinary-microkernel-tester.h",
6937 ] + MICROKERNEL_TEST_HDRS,
6938 deps = MICROKERNEL_TEST_DEPS,
6939)
6940
6941xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006942 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006943 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006944 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006945 "test/vbinary-microkernel-tester.h",
6946 ] + MICROKERNEL_TEST_HDRS,
6947 deps = MICROKERNEL_TEST_DEPS,
6948)
6949
6950xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006951 name = "f32_vdiv_relu_test",
6952 srcs = [
6953 "test/f32-vdiv-relu.cc",
6954 "test/vbinary-microkernel-tester.h",
6955 ] + MICROKERNEL_TEST_HDRS,
6956 deps = MICROKERNEL_TEST_DEPS,
6957)
6958
6959xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006960 name = "f32_vdivc_test",
6961 srcs = [
6962 "test/f32-vdivc.cc",
6963 "test/vbinaryc-microkernel-tester.h",
6964 ] + MICROKERNEL_TEST_HDRS,
6965 deps = MICROKERNEL_TEST_DEPS,
6966)
6967
6968xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006969 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006970 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006971 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006972 "test/vbinaryc-microkernel-tester.h",
6973 ] + MICROKERNEL_TEST_HDRS,
6974 deps = MICROKERNEL_TEST_DEPS,
6975)
6976
6977xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006978 name = "f32_vdivc_relu_test",
6979 srcs = [
6980 "test/f32-vdivc-relu.cc",
6981 "test/vbinaryc-microkernel-tester.h",
6982 ] + MICROKERNEL_TEST_HDRS,
6983 deps = MICROKERNEL_TEST_DEPS,
6984)
6985
6986xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006987 name = "f32_vrdivc_test",
6988 srcs = [
6989 "test/f32-vrdivc.cc",
6990 "test/vbinaryc-microkernel-tester.h",
6991 ] + MICROKERNEL_TEST_HDRS,
6992 deps = MICROKERNEL_TEST_DEPS,
6993)
6994
6995xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006996 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006997 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006998 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006999 "test/vbinaryc-microkernel-tester.h",
7000 ] + MICROKERNEL_TEST_HDRS,
7001 deps = MICROKERNEL_TEST_DEPS,
7002)
7003
7004xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007005 name = "f32_vrdivc_relu_test",
7006 srcs = [
7007 "test/f32-vrdivc-relu.cc",
7008 "test/vbinaryc-microkernel-tester.h",
7009 ] + MICROKERNEL_TEST_HDRS,
7010 deps = MICROKERNEL_TEST_DEPS,
7011)
7012
7013xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007014 name = "f32_velu_test",
7015 srcs = [
7016 "test/f32-velu.cc",
7017 "test/vunary-microkernel-tester.h",
7018 ] + MICROKERNEL_TEST_HDRS,
7019 deps = MICROKERNEL_TEST_DEPS,
7020)
7021
7022xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007023 name = "f32_vmax_test",
7024 srcs = [
7025 "test/f32-vmax.cc",
7026 "test/vbinary-microkernel-tester.h",
7027 ] + MICROKERNEL_TEST_HDRS,
7028 deps = MICROKERNEL_TEST_DEPS,
7029)
7030
7031xnnpack_unit_test(
7032 name = "f32_vmaxc_test",
7033 srcs = [
7034 "test/f32-vmaxc.cc",
7035 "test/vbinaryc-microkernel-tester.h",
7036 ] + MICROKERNEL_TEST_HDRS,
7037 deps = MICROKERNEL_TEST_DEPS,
7038)
7039
7040xnnpack_unit_test(
7041 name = "f32_vmin_test",
7042 srcs = [
7043 "test/f32-vmin.cc",
7044 "test/vbinary-microkernel-tester.h",
7045 ] + MICROKERNEL_TEST_HDRS,
7046 deps = MICROKERNEL_TEST_DEPS,
7047)
7048
7049xnnpack_unit_test(
7050 name = "f32_vminc_test",
7051 srcs = [
7052 "test/f32-vminc.cc",
7053 "test/vbinaryc-microkernel-tester.h",
7054 ] + MICROKERNEL_TEST_HDRS,
7055 deps = MICROKERNEL_TEST_DEPS,
7056)
7057
7058xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007059 name = "f32_vmul_test",
7060 srcs = [
7061 "test/f32-vmul.cc",
7062 "test/vbinary-microkernel-tester.h",
7063 ] + MICROKERNEL_TEST_HDRS,
7064 deps = MICROKERNEL_TEST_DEPS,
7065)
7066
7067xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007068 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007069 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007070 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007071 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007072 ] + MICROKERNEL_TEST_HDRS,
7073 deps = MICROKERNEL_TEST_DEPS,
7074)
7075
7076xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007077 name = "f32_vmul_relu_test",
7078 srcs = [
7079 "test/f32-vmul-relu.cc",
7080 "test/vbinary-microkernel-tester.h",
7081 ] + MICROKERNEL_TEST_HDRS,
7082 deps = MICROKERNEL_TEST_DEPS,
7083)
7084
7085xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007086 name = "f32_vmulc_test",
7087 srcs = [
7088 "test/f32-vmulc.cc",
7089 "test/vbinaryc-microkernel-tester.h",
7090 ] + MICROKERNEL_TEST_HDRS,
7091 deps = MICROKERNEL_TEST_DEPS,
7092)
7093
7094xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007095 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007096 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007097 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007098 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007099 ] + MICROKERNEL_TEST_HDRS,
7100 deps = MICROKERNEL_TEST_DEPS,
7101)
7102
7103xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007104 name = "f32_vmulc_relu_test",
7105 srcs = [
7106 "test/f32-vmulc-relu.cc",
7107 "test/vbinaryc-microkernel-tester.h",
7108 ] + MICROKERNEL_TEST_HDRS,
7109 deps = MICROKERNEL_TEST_DEPS,
7110)
7111
7112xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007113 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007114 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007115 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007116 "test/vmulcaddc-microkernel-tester.h",
7117 "src/xnnpack/AlignedAllocator.h",
7118 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007119 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007120)
7121
7122xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007123 name = "f32_vlrelu_test",
7124 srcs = [
7125 "test/f32-vlrelu.cc",
7126 "test/vunary-microkernel-tester.h",
7127 ] + MICROKERNEL_TEST_HDRS,
7128 deps = MICROKERNEL_TEST_DEPS,
7129)
7130
7131xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007132 name = "f32_vneg_test",
7133 srcs = [
7134 "test/f32-vneg.cc",
7135 "test/vunary-microkernel-tester.h",
7136 ] + MICROKERNEL_TEST_HDRS,
7137 deps = MICROKERNEL_TEST_DEPS,
7138)
7139
7140xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007141 name = "f32_vrelu_test",
7142 srcs = [
7143 "test/f32-vrelu.cc",
7144 "test/vunary-microkernel-tester.h",
7145 ] + MICROKERNEL_TEST_HDRS,
7146 deps = MICROKERNEL_TEST_DEPS,
7147)
7148
7149xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007150 name = "f32_vrndne_test",
7151 srcs = [
7152 "test/f32-vrndne.cc",
7153 "test/vunary-microkernel-tester.h",
7154 ] + MICROKERNEL_TEST_HDRS,
7155 deps = MICROKERNEL_TEST_DEPS,
7156)
7157
7158xnnpack_unit_test(
7159 name = "f32_vrndz_test",
7160 srcs = [
7161 "test/f32-vrndz.cc",
7162 "test/vunary-microkernel-tester.h",
7163 ] + MICROKERNEL_TEST_HDRS,
7164 deps = MICROKERNEL_TEST_DEPS,
7165)
7166
7167xnnpack_unit_test(
7168 name = "f32_vrndu_test",
7169 srcs = [
7170 "test/f32-vrndu.cc",
7171 "test/vunary-microkernel-tester.h",
7172 ] + MICROKERNEL_TEST_HDRS,
7173 deps = MICROKERNEL_TEST_DEPS,
7174)
7175
7176xnnpack_unit_test(
7177 name = "f32_vrndd_test",
7178 srcs = [
7179 "test/f32-vrndd.cc",
7180 "test/vunary-microkernel-tester.h",
7181 ] + MICROKERNEL_TEST_HDRS,
7182 deps = MICROKERNEL_TEST_DEPS,
7183)
7184
7185xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007186 name = "f32_vscale_test",
7187 srcs = [
7188 "test/f32-vscale.cc",
7189 "test/vscale-microkernel-tester.h",
7190 ] + MICROKERNEL_TEST_HDRS,
7191 deps = MICROKERNEL_TEST_DEPS,
7192)
7193
7194xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007195 name = "f32_vscaleexpminusmax_test",
7196 srcs = [
7197 "test/f32-vscaleexpminusmax.cc",
7198 "test/vscaleexpminusmax-microkernel-tester.h",
7199 ] + MICROKERNEL_TEST_HDRS,
7200 deps = MICROKERNEL_TEST_DEPS,
7201)
7202
7203xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007204 name = "f32_vscaleextexp_test",
7205 srcs = [
7206 "test/f32-vscaleextexp.cc",
7207 "test/vscaleextexp-microkernel-tester.h",
7208 ] + MICROKERNEL_TEST_HDRS,
7209 deps = MICROKERNEL_TEST_DEPS,
7210)
7211
7212xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007213 name = "f32_vsigmoid_test",
7214 srcs = [
7215 "test/f32-vsigmoid.cc",
7216 "test/vunary-microkernel-tester.h",
7217 ] + MICROKERNEL_TEST_HDRS,
7218 deps = MICROKERNEL_TEST_DEPS,
7219)
7220
7221xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007222 name = "f32_vsqr_test",
7223 srcs = [
7224 "test/f32-vsqr.cc",
7225 "test/vunary-microkernel-tester.h",
7226 ] + MICROKERNEL_TEST_HDRS,
7227 deps = MICROKERNEL_TEST_DEPS,
7228)
7229
7230xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007231 name = "f32_vsqrdiff_test",
7232 srcs = [
7233 "test/f32-vsqrdiff.cc",
7234 "test/vbinary-microkernel-tester.h",
7235 ] + MICROKERNEL_TEST_HDRS,
7236 deps = MICROKERNEL_TEST_DEPS,
7237)
7238
7239xnnpack_unit_test(
7240 name = "f32_vsqrdiffc_test",
7241 srcs = [
7242 "test/f32-vsqrdiffc.cc",
7243 "test/vbinaryc-microkernel-tester.h",
7244 ] + MICROKERNEL_TEST_HDRS,
7245 deps = MICROKERNEL_TEST_DEPS,
7246)
7247
7248xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007249 name = "f32_vsqrt_test",
7250 srcs = [
7251 "test/f32-vsqrt.cc",
7252 "test/vunary-microkernel-tester.h",
7253 ] + MICROKERNEL_TEST_HDRS,
7254 deps = MICROKERNEL_TEST_DEPS,
7255)
7256
7257xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007258 name = "f32_vsub_test",
7259 srcs = [
7260 "test/f32-vsub.cc",
7261 "test/vbinary-microkernel-tester.h",
7262 ] + MICROKERNEL_TEST_HDRS,
7263 deps = MICROKERNEL_TEST_DEPS,
7264)
7265
7266xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007267 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007268 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007269 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007270 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007271 ] + MICROKERNEL_TEST_HDRS,
7272 deps = MICROKERNEL_TEST_DEPS,
7273)
7274
7275xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007276 name = "f32_vsub_relu_test",
7277 srcs = [
7278 "test/f32-vsub-relu.cc",
7279 "test/vbinary-microkernel-tester.h",
7280 ] + MICROKERNEL_TEST_HDRS,
7281 deps = MICROKERNEL_TEST_DEPS,
7282)
7283
7284xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007285 name = "f32_vsubc_test",
7286 srcs = [
7287 "test/f32-vsubc.cc",
7288 "test/vbinaryc-microkernel-tester.h",
7289 ] + MICROKERNEL_TEST_HDRS,
7290 deps = MICROKERNEL_TEST_DEPS,
7291)
7292
7293xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007294 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007295 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007296 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007297 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007298 ] + MICROKERNEL_TEST_HDRS,
7299 deps = MICROKERNEL_TEST_DEPS,
7300)
7301
7302xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007303 name = "f32_vsubc_relu_test",
7304 srcs = [
7305 "test/f32-vsubc-relu.cc",
7306 "test/vbinaryc-microkernel-tester.h",
7307 ] + MICROKERNEL_TEST_HDRS,
7308 deps = MICROKERNEL_TEST_DEPS,
7309)
7310
7311xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007312 name = "f32_vrsubc_test",
7313 srcs = [
7314 "test/f32-vrsubc.cc",
7315 "test/vbinaryc-microkernel-tester.h",
7316 ] + MICROKERNEL_TEST_HDRS,
7317 deps = MICROKERNEL_TEST_DEPS,
7318)
7319
7320xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007321 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007322 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007323 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007324 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007325 ] + MICROKERNEL_TEST_HDRS,
7326 deps = MICROKERNEL_TEST_DEPS,
7327)
7328
7329xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007330 name = "f32_vrsubc_relu_test",
7331 srcs = [
7332 "test/f32-vrsubc-relu.cc",
7333 "test/vbinaryc-microkernel-tester.h",
7334 ] + MICROKERNEL_TEST_HDRS,
7335 deps = MICROKERNEL_TEST_DEPS,
7336)
7337
7338xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007339 name = "qc8_dwconv_minmax_fp32_test",
7340 timeout = "moderate",
7341 srcs = [
7342 "test/qc8-dwconv-minmax-fp32.cc",
7343 "test/dwconv-microkernel-tester.h",
7344 "src/xnnpack/AlignedAllocator.h",
7345 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7346 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7347)
7348
7349xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007350 name = "qc8_gemm_minmax_fp32_test",
7351 timeout = "moderate",
7352 srcs = [
7353 "test/qc8-gemm-minmax-fp32.cc",
7354 "test/gemm-microkernel-tester.h",
7355 "src/xnnpack/AlignedAllocator.h",
7356 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7357 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7358)
7359
7360xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007361 name = "qc8_igemm_minmax_fp32_test",
7362 timeout = "moderate",
7363 srcs = [
7364 "test/qc8-igemm-minmax-fp32.cc",
7365 "test/gemm-microkernel-tester.h",
7366 "src/xnnpack/AlignedAllocator.h",
7367 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7368 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7369)
7370
7371xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007372 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007373 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007374 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007375 "test/dwconv-microkernel-tester.h",
7376 "src/xnnpack/AlignedAllocator.h",
7377 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7378 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7379)
7380
7381xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007382 name = "qs8_dwconv_minmax_fp32_test",
7383 srcs = [
7384 "test/qs8-dwconv-minmax-fp32.cc",
7385 "test/dwconv-microkernel-tester.h",
7386 "src/xnnpack/AlignedAllocator.h",
7387 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7388 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7389)
7390
7391xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007392 name = "qs8_gavgpool_minmax_test",
7393 srcs = [
7394 "test/qs8-gavgpool-minmax.cc",
7395 "test/gavgpool-microkernel-tester.h",
7396 "src/xnnpack/AlignedAllocator.h",
7397 ] + MICROKERNEL_TEST_HDRS,
7398 deps = MICROKERNEL_TEST_DEPS,
7399)
7400
7401xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007402 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007403 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007404 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007405 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007406 "test/gemm-microkernel-tester.h",
7407 "src/xnnpack/AlignedAllocator.h",
7408 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7409 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7410)
7411
7412xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007413 name = "qs8_gemm_minmax_fp32_test",
7414 timeout = "moderate",
7415 srcs = [
7416 "test/qs8-gemm-minmax-fp32.cc",
7417 "test/gemm-microkernel-tester.h",
7418 "src/xnnpack/AlignedAllocator.h",
7419 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7420 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7421)
7422
7423xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007424 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007425 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007426 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007427 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007428 "test/gemm-microkernel-tester.h",
7429 "src/xnnpack/AlignedAllocator.h",
7430 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7431 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7432)
7433
7434xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007435 name = "qs8_igemm_minmax_fp32_test",
7436 timeout = "moderate",
7437 srcs = [
7438 "test/qs8-igemm-minmax-fp32.cc",
7439 "test/gemm-microkernel-tester.h",
7440 "src/xnnpack/AlignedAllocator.h",
7441 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7442 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7443)
7444
7445xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007446 name = "qs8_requantization_test",
7447 srcs = [
7448 "src/xnnpack/requantization-stubs.h",
7449 "test/qs8-requantization.cc",
7450 "test/requantization-tester.h",
7451 ] + MICROKERNEL_TEST_HDRS,
7452 deps = MICROKERNEL_TEST_DEPS,
7453)
7454
7455xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007456 name = "qs8_vadd_minmax_test",
7457 srcs = [
7458 "test/qs8-vadd-minmax.cc",
7459 "test/vadd-microkernel-tester.h",
7460 ] + MICROKERNEL_TEST_HDRS,
7461 deps = MICROKERNEL_TEST_DEPS,
7462)
7463
7464xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007465 name = "qs8_vaddc_minmax_test",
7466 srcs = [
7467 "test/qs8-vaddc-minmax.cc",
7468 "test/vaddc-microkernel-tester.h",
7469 ] + MICROKERNEL_TEST_HDRS,
7470 deps = MICROKERNEL_TEST_DEPS,
7471)
7472
7473xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007474 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007475 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007476 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007477 "test/avgpool-microkernel-tester.h",
7478 "src/xnnpack/AlignedAllocator.h",
7479 ] + MICROKERNEL_TEST_HDRS,
7480 deps = MICROKERNEL_TEST_DEPS,
7481)
7482
7483xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007484 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007485 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007486 "test/qu8-dwconv-minmax.cc",
7487 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007488 "src/xnnpack/AlignedAllocator.h",
7489 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007490 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007491)
7492
7493xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007494 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007495 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007496 "test/qu8-igemm-minmax.cc",
7497 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007498 "src/xnnpack/AlignedAllocator.h",
7499 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007500 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007501)
7502
7503xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007504 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007505 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007506 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007507 "test/gavgpool-microkernel-tester.h",
7508 "src/xnnpack/AlignedAllocator.h",
7509 ] + MICROKERNEL_TEST_HDRS,
7510 deps = MICROKERNEL_TEST_DEPS,
7511)
7512
7513xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007514 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007515 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007516 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007517 "test/gemm-microkernel-tester.h",
7518 "src/xnnpack/AlignedAllocator.h",
7519 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007520 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007521)
7522
7523xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007524 name = "qu8_requantization_test",
7525 srcs = [
7526 "src/xnnpack/requantization-stubs.h",
7527 "test/qu8-requantization.cc",
7528 "test/requantization-tester.h",
7529 ] + MICROKERNEL_TEST_HDRS,
7530 deps = MICROKERNEL_TEST_DEPS,
7531)
7532
7533xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007534 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007535 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007536 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007537 "test/vadd-microkernel-tester.h",
7538 ] + MICROKERNEL_TEST_HDRS,
7539 deps = MICROKERNEL_TEST_DEPS,
7540)
7541
7542xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007543 name = "u8_lut32norm_test",
7544 srcs = [
7545 "test/u8-lut32norm.cc",
7546 "test/lut-norm-microkernel-tester.h",
7547 ] + MICROKERNEL_TEST_HDRS,
7548 deps = MICROKERNEL_TEST_DEPS,
7549)
7550
7551xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007552 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007553 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007554 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007555 "test/maxpool-microkernel-tester.h",
7556 ] + MICROKERNEL_TEST_HDRS,
7557 deps = MICROKERNEL_TEST_DEPS,
7558)
7559
7560xnnpack_unit_test(
7561 name = "u8_rmax_test",
7562 srcs = [
7563 "test/u8-rmax.cc",
7564 "test/rmax-microkernel-tester.h",
7565 ] + MICROKERNEL_TEST_HDRS,
7566 deps = MICROKERNEL_TEST_DEPS,
7567)
7568
7569xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007570 name = "u8_vclamp_test",
7571 srcs = [
7572 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007573 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007574 ] + MICROKERNEL_TEST_HDRS,
7575 deps = MICROKERNEL_TEST_DEPS,
7576)
7577
7578xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007579 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007580 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007581 "test/x32-depthtospace2d-chw2hwc.cc",
7582 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007583 ] + MICROKERNEL_TEST_HDRS,
7584 deps = MICROKERNEL_TEST_DEPS,
7585)
7586
7587xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007588 name = "x32_fill_test",
7589 srcs = [
7590 "test/x32-fill.cc",
7591 "test/fill-microkernel-tester.h",
7592 ] + MICROKERNEL_TEST_HDRS,
7593 deps = MICROKERNEL_TEST_DEPS,
7594)
7595
7596xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007597 name = "x32_packx_test",
7598 srcs = [
7599 "test/x32-packx.cc",
7600 "test/pack-microkernel-tester.h",
7601 "src/xnnpack/AlignedAllocator.h",
7602 ] + MICROKERNEL_TEST_HDRS,
7603 deps = MICROKERNEL_TEST_DEPS,
7604)
7605
7606xnnpack_unit_test(
7607 name = "x32_pad_test",
7608 srcs = [
7609 "test/x32-pad.cc",
7610 "test/pad-microkernel-tester.h",
7611 ] + MICROKERNEL_TEST_HDRS,
7612 deps = MICROKERNEL_TEST_DEPS,
7613)
7614
7615xnnpack_unit_test(
7616 name = "x32_unpool_test",
7617 srcs = [
7618 "test/x32-unpool.cc",
7619 "test/unpool-microkernel-tester.h",
7620 ] + MICROKERNEL_TEST_HDRS,
7621 deps = MICROKERNEL_TEST_DEPS,
7622)
7623
7624xnnpack_unit_test(
7625 name = "x32_zip_test",
7626 srcs = [
7627 "test/x32-zip.cc",
7628 "test/zip-microkernel-tester.h",
7629 ] + MICROKERNEL_TEST_HDRS,
7630 deps = MICROKERNEL_TEST_DEPS,
7631)
7632
7633xnnpack_unit_test(
7634 name = "x8_lut_test",
7635 srcs = [
7636 "test/x8-lut.cc",
7637 "test/lut-microkernel-tester.h",
7638 ] + MICROKERNEL_TEST_HDRS,
7639 deps = MICROKERNEL_TEST_DEPS,
7640)
7641
7642xnnpack_unit_test(
7643 name = "x8_zip_test",
7644 srcs = [
7645 "test/x8-zip.cc",
7646 "test/zip-microkernel-tester.h",
7647 ] + MICROKERNEL_TEST_HDRS,
7648 deps = MICROKERNEL_TEST_DEPS,
7649)
7650
Marat Dukhan20c3b922020-03-10 03:45:06 -07007651########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007652
7653xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007654 name = "operator_size_test",
7655 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007656 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007657)
7658
Marat Dukhan20c3b922020-03-10 03:45:06 -07007659xnnpack_binary(
7660 name = "subgraph_size_test",
7661 srcs = ["test/subgraph-size.c"],
7662 deps = [":XNNPACK"],
7663)
7664
7665########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007666
7667xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007668 name = "abs_nc_test",
7669 srcs = [
7670 "test/abs-nc.cc",
7671 "test/abs-operator-tester.h",
7672 ],
7673 deps = OPERATOR_TEST_DEPS,
7674)
7675
7676xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007677 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007678 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007679 srcs = [
7680 "test/add-nd.cc",
7681 "test/binary-elementwise-operator-tester.h",
7682 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007683 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007684)
7685
7686xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007687 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007688 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007689 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007690 "test/argmax-pooling-operator-tester.h",
7691 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007692 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007693)
7694
7695xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007696 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007697 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007698 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007699 "test/average-pooling-operator-tester.h",
7700 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007701 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007702)
7703
7704xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007705 name = "bankers_rounding_nc_test",
7706 srcs = [
7707 "test/bankers-rounding-nc.cc",
7708 "test/bankers-rounding-operator-tester.h",
7709 ],
7710 deps = OPERATOR_TEST_DEPS,
7711)
7712
7713xnnpack_unit_test(
7714 name = "ceiling_nc_test",
7715 srcs = [
7716 "test/ceiling-nc.cc",
7717 "test/ceiling-operator-tester.h",
7718 ],
7719 deps = OPERATOR_TEST_DEPS,
7720)
7721
7722xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007723 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007724 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007725 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007726 "test/channel-shuffle-operator-tester.h",
7727 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007728 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007729)
7730
7731xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007732 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007733 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007734 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007735 "test/clamp-operator-tester.h",
7736 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007737 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007738)
7739
7740xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007741 name = "constant_pad_nd_test",
7742 srcs = [
7743 "test/constant-pad-nd.cc",
7744 "test/constant-pad-operator-tester.h",
7745 ],
7746 deps = OPERATOR_TEST_DEPS,
7747)
7748
7749xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007750 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007751 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007752 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007753 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007754 "test/convolution-operator-tester.h",
7755 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007756 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007757)
7758
7759xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007760 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007761 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007762 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007763 "test/convolution-nchw.cc",
7764 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007765 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007766 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007767)
7768
7769xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007770 name = "copy_nc_test",
7771 srcs = [
7772 "test/copy-nc.cc",
7773 "test/copy-operator-tester.h",
7774 ],
7775 deps = OPERATOR_TEST_DEPS,
7776)
7777
7778xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007779 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007780 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007781 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007782 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007783 "test/deconvolution-operator-tester.h",
7784 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007785 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007786)
7787
7788xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007789 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007790 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007791 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007792 "test/depth-to-space-operator-tester.h",
7793 ] + OPERATOR_TEST_PARAMS_HDRS,
7794 deps = OPERATOR_TEST_DEPS,
7795)
7796
7797xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007798 name = "depth_to_space_nhwc_test",
7799 srcs = [
7800 "test/depth-to-space-nhwc.cc",
7801 "test/depth-to-space-operator-tester.h",
7802 ] + OPERATOR_TEST_PARAMS_HDRS,
7803 deps = OPERATOR_TEST_DEPS,
7804)
7805
7806xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007807 name = "divide_nd_test",
7808 srcs = [
7809 "test/binary-elementwise-operator-tester.h",
7810 "test/divide-nd.cc",
7811 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007812 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007813)
7814
7815xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007816 name = "elu_nc_test",
7817 srcs = [
7818 "test/elu-nc.cc",
7819 "test/elu-operator-tester.h",
7820 ],
7821 deps = OPERATOR_TEST_DEPS,
7822)
7823
7824xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007825 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007826 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007827 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007828 "test/fully-connected-operator-tester.h",
7829 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007830 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007831)
7832
7833xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007834 name = "floor_nc_test",
7835 srcs = [
7836 "test/floor-nc.cc",
7837 "test/floor-operator-tester.h",
7838 ],
7839 deps = OPERATOR_TEST_DEPS,
7840)
7841
7842xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007843 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007844 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007845 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007846 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007847 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007848 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007849)
7850
7851xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007852 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007853 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007854 "test/global-average-pooling-ncw.cc",
7855 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007856 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007857 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007858)
7859
7860xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007861 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007862 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007863 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007864 "test/hardswish-operator-tester.h",
7865 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007866 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007867)
7868
7869xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007870 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007871 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007872 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007873 "test/leaky-relu-operator-tester.h",
7874 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007875 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007876)
7877
7878xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007879 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007880 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007881 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007882 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007883 "test/max-pooling-operator-tester.h",
7884 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007885 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007886)
7887
7888xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007889 name = "maximum_nd_test",
7890 srcs = [
7891 "test/binary-elementwise-operator-tester.h",
7892 "test/maximum-nd.cc",
7893 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007894 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007895)
7896
7897xnnpack_unit_test(
7898 name = "minimum_nd_test",
7899 srcs = [
7900 "test/binary-elementwise-operator-tester.h",
7901 "test/minimum-nd.cc",
7902 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007903 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007904)
7905
7906xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007907 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007908 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007909 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007910 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007911 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007912 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007913)
7914
7915xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007916 name = "negate_nc_test",
7917 srcs = [
7918 "test/negate-nc.cc",
7919 "test/negate-operator-tester.h",
7920 ],
7921 deps = OPERATOR_TEST_DEPS,
7922)
7923
7924xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007925 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007926 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007927 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007928 "test/prelu-operator-tester.h",
7929 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007930 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007931)
7932
7933xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007934 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007935 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007936 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007937 "test/resize-bilinear-operator-tester.h",
7938 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007939 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007940)
7941
7942xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007943 name = "resize_bilinear_nchw_test",
7944 srcs = [
7945 "test/resize-bilinear-nchw.cc",
7946 "test/resize-bilinear-operator-tester.h",
7947 ] + OPERATOR_TEST_PARAMS_HDRS,
7948 deps = OPERATOR_TEST_DEPS,
7949)
7950
7951xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007952 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007953 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007954 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007955 "test/sigmoid-operator-tester.h",
7956 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007957 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007958)
7959
7960xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007961 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007962 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007963 "test/softmax-nc.cc",
7964 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007965 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007966 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007967)
7968
7969xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007970 name = "square_nc_test",
7971 srcs = [
7972 "test/square-nc.cc",
7973 "test/square-operator-tester.h",
7974 ],
7975 deps = OPERATOR_TEST_DEPS,
7976)
7977
7978xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007979 name = "square_root_nc_test",
7980 srcs = [
7981 "test/square-root-nc.cc",
7982 "test/square-root-operator-tester.h",
7983 ],
7984 deps = OPERATOR_TEST_DEPS,
7985)
7986
7987xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007988 name = "squared_difference_nd_test",
7989 srcs = [
7990 "test/binary-elementwise-operator-tester.h",
7991 "test/squared-difference-nd.cc",
7992 ],
7993 deps = OPERATOR_TEST_DEPS,
7994)
7995
7996xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007997 name = "subtract_nd_test",
7998 srcs = [
7999 "test/binary-elementwise-operator-tester.h",
8000 "test/subtract-nd.cc",
8001 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008002 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008003)
8004
8005xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008006 name = "truncation_nc_test",
8007 srcs = [
8008 "test/truncation-nc.cc",
8009 "test/truncation-operator-tester.h",
8010 ],
8011 deps = OPERATOR_TEST_DEPS,
8012)
8013
8014xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008015 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008016 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008017 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008018 "test/unpooling-operator-tester.h",
8019 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008020 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008021)
8022
Chao Mei6ddfc602020-05-13 22:29:36 -07008023############################### Misc unit tests ###############################
8024
8025xnnpack_unit_test(
8026 name = "memory_planner_test",
8027 srcs = [
8028 "test/memory-planner-test.cc",
8029 ],
8030 deps = [
8031 ":XNNPACK",
8032 ":memory_planner",
8033 ],
8034)
8035
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008036xnnpack_unit_test(
8037 name = "subgraph_nchw_test",
8038 srcs = [
8039 "src/xnnpack/subgraph.h",
8040 "test/subgraph-nchw.cc",
8041 "test/subgraph-tester.h",
8042 ],
8043 deps = [
8044 ":XNNPACK",
8045 ],
8046)
8047
Marat Dukhan08c4a432019-10-03 09:29:21 -07008048############################# Build configurations #############################
8049
Marat Dukhanb8642352019-10-30 15:43:02 -07008050# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008051config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008052 name = "xnn_enable_assembly_explicit_true",
8053 define_values = {"xnn_enable_assembly": "true"},
8054)
8055
8056# Disables usage of assembly kernels.
8057config_setting(
8058 name = "xnn_enable_assembly_explicit_false",
8059 define_values = {"xnn_enable_assembly": "false"},
8060)
8061
Marat Dukhan9de90e02020-06-18 16:04:12 -07008062# Enables usage of sparse inference.
8063config_setting(
8064 name = "xnn_enable_sparse_explicit_true",
8065 define_values = {"xnn_enable_sparse": "true"},
8066)
8067
8068# Disables usage of sparse inference.
8069config_setting(
8070 name = "xnn_enable_sparse_explicit_false",
8071 define_values = {"xnn_enable_sparse": "false"},
8072)
8073
Marat Dukhan05702cf2020-03-26 15:41:33 -07008074# Disables usage of HMP-aware optimizations.
8075config_setting(
8076 name = "xnn_enable_hmp_explicit_false",
8077 define_values = {"xnn_enable_hmp": "false"},
8078)
8079
Chao Mei6ddfc602020-05-13 22:29:36 -07008080# Enable usage of optimized memory allocation
8081config_setting(
8082 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008083 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008084)
8085
8086# Disable usage of optimized memory allocation
8087config_setting(
8088 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008089 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008090)
8091
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008092# Enable QS8 inference in TFLite-specific version
8093config_setting(
8094 name = "xnn_enable_qs8_explicit_true",
8095 define_values = {"xnn_enable_qs8": "true"},
8096)
8097
8098# Disable QS8 inference in TFLite-specific version
8099config_setting(
8100 name = "xnn_enable_qs8_explicit_false",
8101 define_values = {"xnn_enable_qs8": "false"},
8102)
8103
Marat Dukhanb8642352019-10-30 15:43:02 -07008104# Builds with -c dbg
8105config_setting(
8106 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008107 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008108 "compilation_mode": "dbg",
8109 },
8110)
8111
8112# Builds with -c opt
8113config_setting(
8114 name = "optimized_build",
8115 values = {
8116 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008117 },
8118)
8119
8120config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008121 name = "linux_k8",
8122 values = {"cpu": "k8"},
8123)
8124
8125config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008126 name = "linux_arm",
8127 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008128)
8129
8130config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008131 name = "linux_armeabi",
8132 values = {"cpu": "armeabi"},
8133)
8134
8135config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008136 name = "linux_armhf",
8137 values = {"cpu": "armhf"},
8138)
8139
8140config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008141 name = "linux_armv7a",
8142 values = {"cpu": "armv7a"},
8143)
8144
8145config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008146 name = "linux_aarch64",
8147 values = {"cpu": "aarch64"},
8148)
8149
8150config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008151 name = "android",
8152 values = {"crosstool_top": "//external:android/crosstool"},
8153)
8154
8155config_setting(
8156 name = "android_armv7",
8157 values = {
8158 "crosstool_top": "//external:android/crosstool",
8159 "cpu": "armeabi-v7a",
8160 },
8161)
8162
8163config_setting(
8164 name = "android_arm64",
8165 values = {
8166 "crosstool_top": "//external:android/crosstool",
8167 "cpu": "arm64-v8a",
8168 },
8169)
8170
8171config_setting(
8172 name = "android_x86",
8173 values = {
8174 "crosstool_top": "//external:android/crosstool",
8175 "cpu": "x86",
8176 },
8177)
8178
8179config_setting(
8180 name = "android_x86_64",
8181 values = {
8182 "crosstool_top": "//external:android/crosstool",
8183 "cpu": "x86_64",
8184 },
8185)
8186
8187config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008188 name = "windows_x86_64",
8189 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008190)
8191
8192config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008193 name = "windows_x86_64_clang",
8194 values = {
8195 "compiler": "clang-cl",
8196 "cpu": "x64_windows",
8197 },
8198)
8199
8200config_setting(
8201 name = "windows_x86_64_mingw",
8202 values = {
8203 "compiler": "mingw-gcc",
8204 "cpu": "x64_windows",
8205 },
8206)
8207
8208config_setting(
8209 name = "windows_x86_64_msys",
8210 values = {
8211 "compiler": "msys-gcc",
8212 "cpu": "x64_windows",
8213 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008214)
8215
8216config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008217 name = "macos_x86_64",
8218 values = {
8219 "apple_platform_type": "macos",
8220 "cpu": "darwin",
8221 },
8222)
8223
8224config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008225 name = "macos_arm64",
8226 values = {
8227 "apple_platform_type": "macos",
8228 "cpu": "darwin_arm64",
8229 },
8230)
8231
8232config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008233 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008234 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008235)
8236
8237config_setting(
8238 name = "emscripten_wasm",
8239 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008240 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008241 "cpu": "wasm",
8242 },
8243)
8244
8245config_setting(
8246 name = "emscripten_wasmsimd",
8247 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008248 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008249 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008250 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008251 },
8252)
8253
8254config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008255 name = "ios_armv7",
8256 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008257 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008258 "cpu": "ios_armv7",
8259 },
8260)
8261
8262config_setting(
8263 name = "ios_arm64",
8264 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008265 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008266 "cpu": "ios_arm64",
8267 },
8268)
8269
8270config_setting(
8271 name = "ios_arm64e",
8272 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008273 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008274 "cpu": "ios_arm64e",
8275 },
8276)
8277
8278config_setting(
8279 name = "ios_x86",
8280 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008281 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008282 "cpu": "ios_i386",
8283 },
8284)
8285
8286config_setting(
8287 name = "ios_x86_64",
8288 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008289 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008290 "cpu": "ios_x86_64",
8291 },
8292)
8293
8294config_setting(
8295 name = "watchos_armv7k",
8296 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008297 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008298 "cpu": "watchos_armv7k",
8299 },
8300)
8301
8302config_setting(
8303 name = "watchos_arm64_32",
8304 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008305 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008306 "cpu": "watchos_arm64_32",
8307 },
8308)
8309
8310config_setting(
8311 name = "watchos_x86",
8312 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008313 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008314 "cpu": "watchos_i386",
8315 },
8316)
8317
8318config_setting(
8319 name = "watchos_x86_64",
8320 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008321 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008322 "cpu": "watchos_x86_64",
8323 },
8324)
8325
8326config_setting(
8327 name = "tvos_arm64",
8328 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008329 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008330 "cpu": "tvos_arm64",
8331 },
8332)
8333
8334config_setting(
8335 name = "tvos_x86_64",
8336 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008337 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008338 "cpu": "tvos_x86_64",
8339 },
8340)