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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
2 */
Dave Airlie0d6aa602006-01-02 20:14:23 +11003/*
Dave Airliebc54fd12005-06-23 22:46:46 +10004 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * All Rights Reserved.
Dave Airliebc54fd12005-06-23 22:46:46 +10007 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
18 * of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 *
Dave Airlie0d6aa602006-01-02 20:14:23 +110028 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
Jesse Barnes5669fca2009-02-17 15:13:31 -080030#include <linux/device.h>
David Howells760285e2012-10-02 18:01:07 +010031#include <drm/drmP.h>
32#include <drm/i915_drm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include "i915_drv.h"
Chris Wilson990bbda2012-07-02 11:51:02 -030034#include "i915_trace.h"
Kenneth Graunkef49f0582010-09-11 01:19:14 -070035#include "intel_drv.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include <linux/console.h>
Paul Gortmakere0cd3602011-08-30 11:04:30 -040038#include <linux/module.h>
David Howells760285e2012-10-02 18:01:07 +010039#include <drm/drm_crtc_helper.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080040
Ben Widawskya35d9d32011-07-13 14:38:17 -070041static int i915_modeset __read_mostly = -1;
Jesse Barnes79e53942008-11-07 14:24:08 -080042module_param_named(modeset, i915_modeset, int, 0400);
Ben Widawsky6e96e772011-07-13 14:38:18 -070043MODULE_PARM_DESC(modeset,
44 "Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, "
45 "1=on, -1=force vga console preference [default])");
Jesse Barnes79e53942008-11-07 14:24:08 -080046
Ben Widawskya35d9d32011-07-13 14:38:17 -070047unsigned int i915_fbpercrtc __always_unused = 0;
Jesse Barnes79e53942008-11-07 14:24:08 -080048module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
Linus Torvalds1da177e2005-04-16 15:20:36 -070049
Daniel Vettera7269152012-11-20 14:50:08 +010050int i915_panel_ignore_lid __read_mostly = 1;
Chris Wilsonfca87402011-02-17 13:44:48 +000051module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -070052MODULE_PARM_DESC(panel_ignore_lid,
Daniel Vettera7269152012-11-20 14:50:08 +010053 "Override lid status (0=autodetect, 1=autodetect disabled [default], "
54 "-1=force lid closed, -2=force lid open)");
Chris Wilsonfca87402011-02-17 13:44:48 +000055
Ben Widawskya35d9d32011-07-13 14:38:17 -070056unsigned int i915_powersave __read_mostly = 1;
Chris Wilson0aa99272010-11-02 09:20:50 +000057module_param_named(powersave, i915_powersave, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -070058MODULE_PARM_DESC(powersave,
59 "Enable powersavings, fbc, downclocking, etc. (default: true)");
Jesse Barnes652c3932009-08-17 13:31:43 -070060
Eugeni Dodonovf45b5552011-12-09 17:16:37 -080061int i915_semaphores __read_mostly = -1;
Chris Wilsona1656b92011-03-04 18:48:03 +000062module_param_named(semaphores, i915_semaphores, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -070063MODULE_PARM_DESC(semaphores,
Eugeni Dodonovf45b5552011-12-09 17:16:37 -080064 "Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))");
Chris Wilsona1656b92011-03-04 18:48:03 +000065
Keith Packardc0f372b32011-11-16 22:24:52 -080066int i915_enable_rc6 __read_mostly = -1;
Jesse Barnesf57f9c12012-04-11 09:39:02 -070067module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0400);
Ben Widawsky6e96e772011-07-13 14:38:18 -070068MODULE_PARM_DESC(i915_enable_rc6,
Eugeni Dodonov83b7f9a2012-03-23 11:57:18 -030069 "Enable power-saving render C-state 6. "
70 "Different stages can be selected via bitmask values "
71 "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). "
72 "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
73 "default: -1 (use per-chip default)");
Chris Wilsonac668082011-02-09 16:15:32 +000074
Keith Packard4415e632011-11-09 09:57:50 -080075int i915_enable_fbc __read_mostly = -1;
Jesse Barnesc1a9f042011-05-05 15:24:21 -070076module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -070077MODULE_PARM_DESC(i915_enable_fbc,
78 "Enable frame buffer compression for power savings "
Keith Packardcd0de032011-09-19 21:34:19 -070079 "(default: -1 (use per-chip default))");
Jesse Barnesc1a9f042011-05-05 15:24:21 -070080
Ben Widawskya35d9d32011-07-13 14:38:17 -070081unsigned int i915_lvds_downclock __read_mostly = 0;
Jesse Barnes33814342010-01-14 20:48:02 +000082module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
Ben Widawsky6e96e772011-07-13 14:38:18 -070083MODULE_PARM_DESC(lvds_downclock,
84 "Use panel (LVDS/eDP) downclocking for power savings "
85 "(default: false)");
Jesse Barnes33814342010-01-14 20:48:02 +000086
Takashi Iwai121d5272012-03-20 13:07:06 +010087int i915_lvds_channel_mode __read_mostly;
88module_param_named(lvds_channel_mode, i915_lvds_channel_mode, int, 0600);
89MODULE_PARM_DESC(lvds_channel_mode,
90 "Specify LVDS channel mode "
91 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
92
Keith Packard4415e632011-11-09 09:57:50 -080093int i915_panel_use_ssc __read_mostly = -1;
Chris Wilsona7615032011-01-12 17:04:08 +000094module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -070095MODULE_PARM_DESC(lvds_use_ssc,
96 "Use Spread Spectrum Clock with panels [LVDS/eDP] "
Keith Packard72bbe582011-09-26 16:09:45 -070097 "(default: auto from VBT)");
Chris Wilsona7615032011-01-12 17:04:08 +000098
Ben Widawskya35d9d32011-07-13 14:38:17 -070099int i915_vbt_sdvo_panel_type __read_mostly = -1;
Chris Wilson5a1e5b62011-01-29 16:50:25 +0000100module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -0700101MODULE_PARM_DESC(vbt_sdvo_panel_type,
Mathias Fröhlichc10e4082012-03-01 06:44:35 +0100102 "Override/Ignore selection of SDVO panel mode in the VBT "
103 "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
Chris Wilson5a1e5b62011-01-29 16:50:25 +0000104
Ben Widawskya35d9d32011-07-13 14:38:17 -0700105static bool i915_try_reset __read_mostly = true;
Chris Wilsond78cb502010-12-23 13:33:15 +0000106module_param_named(reset, i915_try_reset, bool, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -0700107MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
Chris Wilsond78cb502010-12-23 13:33:15 +0000108
Ben Widawskya35d9d32011-07-13 14:38:17 -0700109bool i915_enable_hangcheck __read_mostly = true;
Ben Widawsky3e0dc6b2011-06-29 10:26:42 -0700110module_param_named(enable_hangcheck, i915_enable_hangcheck, bool, 0644);
Ben Widawsky6e96e772011-07-13 14:38:18 -0700111MODULE_PARM_DESC(enable_hangcheck,
112 "Periodically check GPU activity for detecting hangs. "
113 "WARNING: Disabling this can cause system wide hangs. "
114 "(default: true)");
Ben Widawsky3e0dc6b2011-06-29 10:26:42 -0700115
Daniel Vetter650dc072012-04-02 10:08:35 +0200116int i915_enable_ppgtt __read_mostly = -1;
117module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
Daniel Vettere21af882012-02-09 20:53:27 +0100118MODULE_PARM_DESC(i915_enable_ppgtt,
119 "Enable PPGTT (default: true)");
120
Rodrigo Vivi105b7c12013-07-11 18:45:02 -0300121int i915_enable_psr __read_mostly = 0;
122module_param_named(enable_psr, i915_enable_psr, int, 0600);
123MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");
124
Josh Triplett99486b82013-08-13 16:23:17 -0700125unsigned int i915_preliminary_hw_support __read_mostly = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT);
Rodrigo Vivi0a3af262012-10-15 17:16:23 -0300126module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);
127MODULE_PARM_DESC(preliminary_hw_support,
Josh Triplett99486b82013-08-13 16:23:17 -0700128 "Enable preliminary hardware support.");
Rodrigo Vivi0a3af262012-10-15 17:16:23 -0300129
Paulo Zanonibf51d5e2013-07-03 17:12:13 -0300130int i915_disable_power_well __read_mostly = 1;
Paulo Zanoni2124b722013-03-22 14:07:23 -0300131module_param_named(disable_power_well, i915_disable_power_well, int, 0600);
132MODULE_PARM_DESC(disable_power_well,
Paulo Zanonibf51d5e2013-07-03 17:12:13 -0300133 "Disable the power well when possible (default: true)");
Paulo Zanoni2124b722013-03-22 14:07:23 -0300134
Paulo Zanoni3c4ca582013-05-31 16:33:23 -0300135int i915_enable_ips __read_mostly = 1;
136module_param_named(enable_ips, i915_enable_ips, int, 0600);
137MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");
138
Jesse Barnes2385bdf2013-06-26 01:38:15 +0300139bool i915_fastboot __read_mostly = 0;
140module_param_named(fastboot, i915_fastboot, bool, 0600);
141MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "
142 "(default: false)");
143
Paulo Zanonie27e9702013-08-19 13:18:12 -0300144int i915_enable_pc8 __read_mostly = 1;
Paulo Zanonic67a4702013-08-19 13:18:09 -0300145module_param_named(enable_pc8, i915_enable_pc8, int, 0600);
Paulo Zanonie27e9702013-08-19 13:18:12 -0300146MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: true)");
Paulo Zanonic67a4702013-08-19 13:18:09 -0300147
Paulo Zanoni90058742013-08-19 13:18:11 -0300148int i915_pc8_timeout __read_mostly = 5000;
149module_param_named(pc8_timeout, i915_pc8_timeout, int, 0600);
150MODULE_PARM_DESC(pc8_timeout, "Number of msecs of idleness required to enter PC8+ (default: 5000)");
151
Xiong Zhang0b74b502013-07-19 13:51:24 +0800152bool i915_prefault_disable __read_mostly;
153module_param_named(prefault_disable, i915_prefault_disable, bool, 0600);
154MODULE_PARM_DESC(prefault_disable,
155 "Disable page prefaulting for pread/pwrite/reloc (default:false). For developers only.");
156
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500157static struct drm_driver driver;
Zhenyu Wang1f7a6e32010-02-23 14:05:24 +0800158extern int intel_agp_enabled;
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500159
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200160static const struct intel_device_info intel_i830_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700161 .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
Chris Wilson315781482010-08-12 09:42:51 +0100162 .has_overlay = 1, .overlay_needs_physical = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700163 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500164};
165
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200166static const struct intel_device_info intel_845g_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700167 .gen = 2, .num_pipes = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100168 .has_overlay = 1, .overlay_needs_physical = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700169 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500170};
171
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200172static const struct intel_device_info intel_i85x_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700173 .gen = 2, .is_i85x = 1, .is_mobile = 1, .num_pipes = 2,
Adam Jackson5ce8ba72010-04-15 14:03:30 -0400174 .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100175 .has_overlay = 1, .overlay_needs_physical = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700176 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500177};
178
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200179static const struct intel_device_info intel_i865g_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700180 .gen = 2, .num_pipes = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100181 .has_overlay = 1, .overlay_needs_physical = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700182 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500183};
184
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200185static const struct intel_device_info intel_i915g_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700186 .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
Chris Wilson315781482010-08-12 09:42:51 +0100187 .has_overlay = 1, .overlay_needs_physical = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700188 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500189};
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200190static const struct intel_device_info intel_i915gm_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700191 .gen = 3, .is_mobile = 1, .num_pipes = 2,
Kristian Høgsbergb295d1b2009-12-16 15:16:17 -0500192 .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100193 .has_overlay = 1, .overlay_needs_physical = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100194 .supports_tv = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700195 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500196};
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200197static const struct intel_device_info intel_i945g_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700198 .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
Chris Wilson315781482010-08-12 09:42:51 +0100199 .has_overlay = 1, .overlay_needs_physical = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700200 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500201};
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200202static const struct intel_device_info intel_i945gm_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700203 .gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
Kristian Høgsbergb295d1b2009-12-16 15:16:17 -0500204 .has_hotplug = 1, .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100205 .has_overlay = 1, .overlay_needs_physical = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100206 .supports_tv = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700207 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500208};
209
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200210static const struct intel_device_info intel_i965g_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700211 .gen = 4, .is_broadwater = 1, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100212 .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100213 .has_overlay = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700214 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500215};
216
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200217static const struct intel_device_info intel_i965gm_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700218 .gen = 4, .is_crestline = 1, .num_pipes = 2,
Chris Wilsone3c4e5d2010-12-05 16:49:51 +0000219 .is_mobile = 1, .has_fbc = 1, .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100220 .has_overlay = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100221 .supports_tv = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700222 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500223};
224
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200225static const struct intel_device_info intel_g33_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700226 .gen = 3, .is_g33 = 1, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100227 .need_gfx_hws = 1, .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100228 .has_overlay = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700229 .ring_mask = RENDER_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500230};
231
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200232static const struct intel_device_info intel_g45_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700233 .gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100234 .has_pipe_cxsr = 1, .has_hotplug = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700235 .ring_mask = RENDER_RING | BSD_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500236};
237
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200238static const struct intel_device_info intel_gm45_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700239 .gen = 4, .is_g4x = 1, .num_pipes = 2,
Chris Wilsone3c4e5d2010-12-05 16:49:51 +0000240 .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100241 .has_pipe_cxsr = 1, .has_hotplug = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100242 .supports_tv = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700243 .ring_mask = RENDER_RING | BSD_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500244};
245
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200246static const struct intel_device_info intel_pineview_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700247 .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100248 .need_gfx_hws = 1, .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100249 .has_overlay = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500250};
251
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200252static const struct intel_device_info intel_ironlake_d_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700253 .gen = 5, .num_pipes = 2,
Eugeni Dodonov5a117db2012-01-05 09:34:29 -0200254 .need_gfx_hws = 1, .has_hotplug = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700255 .ring_mask = RENDER_RING | BSD_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500256};
257
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200258static const struct intel_device_info intel_ironlake_m_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700259 .gen = 5, .is_mobile = 1, .num_pipes = 2,
Chris Wilsone3c4e5d2010-12-05 16:49:51 +0000260 .need_gfx_hws = 1, .has_hotplug = 1,
Jesse Barnesc1a9f042011-05-05 15:24:21 -0700261 .has_fbc = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700262 .ring_mask = RENDER_RING | BSD_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500263};
264
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200265static const struct intel_device_info intel_sandybridge_d_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700266 .gen = 6, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100267 .need_gfx_hws = 1, .has_hotplug = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700268 .ring_mask = RENDER_RING | BSD_RING | BLT_RING,
Eugeni Dodonov3d29b842012-01-17 14:43:53 -0200269 .has_llc = 1,
Eric Anholtf6e450a2009-11-02 12:08:22 -0800270};
271
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200272static const struct intel_device_info intel_sandybridge_m_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700273 .gen = 6, .is_mobile = 1, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100274 .need_gfx_hws = 1, .has_hotplug = 1,
Yuanhan Liu9c04f012010-12-15 15:42:32 +0800275 .has_fbc = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700276 .ring_mask = RENDER_RING | BSD_RING | BLT_RING,
Eugeni Dodonov3d29b842012-01-17 14:43:53 -0200277 .has_llc = 1,
Eric Anholta13e4092010-01-07 15:08:18 -0800278};
279
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700280#define GEN7_FEATURES \
281 .gen = 7, .num_pipes = 3, \
282 .need_gfx_hws = 1, .has_hotplug = 1, \
Ben Widawsky73ae4782013-10-15 10:02:57 -0700283 .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
Ben Widawskyab484f82013-10-05 17:57:11 -0700284 .has_llc = 1
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700285
Jesse Barnesc76b6152011-04-28 14:32:07 -0700286static const struct intel_device_info intel_ivybridge_d_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700287 GEN7_FEATURES,
288 .is_ivybridge = 1,
Jesse Barnesc76b6152011-04-28 14:32:07 -0700289};
290
291static const struct intel_device_info intel_ivybridge_m_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700292 GEN7_FEATURES,
293 .is_ivybridge = 1,
294 .is_mobile = 1,
Rodrigo Viviabe959c2013-05-06 19:37:33 -0300295 .has_fbc = 1,
Jesse Barnesc76b6152011-04-28 14:32:07 -0700296};
297
Ben Widawsky999bcde2013-04-05 13:12:45 -0700298static const struct intel_device_info intel_ivybridge_q_info = {
299 GEN7_FEATURES,
300 .is_ivybridge = 1,
301 .num_pipes = 0, /* legal, last one wins */
302};
303
Jesse Barnes70a3eb72012-03-28 13:39:21 -0700304static const struct intel_device_info intel_valleyview_m_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700305 GEN7_FEATURES,
306 .is_mobile = 1,
307 .num_pipes = 2,
Jesse Barnes70a3eb72012-03-28 13:39:21 -0700308 .is_valleyview = 1,
Ville Syrjäläfba5d532013-01-24 15:29:56 +0200309 .display_mmio_offset = VLV_DISPLAY_BASE,
Ben Widawsky30ccd962013-04-15 21:48:03 -0700310 .has_llc = 0, /* legal, last one wins */
Jesse Barnes70a3eb72012-03-28 13:39:21 -0700311};
312
313static const struct intel_device_info intel_valleyview_d_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700314 GEN7_FEATURES,
315 .num_pipes = 2,
Jesse Barnes70a3eb72012-03-28 13:39:21 -0700316 .is_valleyview = 1,
Ville Syrjäläfba5d532013-01-24 15:29:56 +0200317 .display_mmio_offset = VLV_DISPLAY_BASE,
Ben Widawsky30ccd962013-04-15 21:48:03 -0700318 .has_llc = 0, /* legal, last one wins */
Jesse Barnes70a3eb72012-03-28 13:39:21 -0700319};
320
Eugeni Dodonov4cae9ae2012-03-29 12:32:18 -0300321static const struct intel_device_info intel_haswell_d_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700322 GEN7_FEATURES,
323 .is_haswell = 1,
Damien Lespiaudd93be52013-04-22 18:40:39 +0100324 .has_ddi = 1,
Damien Lespiau30568c42013-04-22 18:40:41 +0100325 .has_fpga_dbg = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700326 .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
Eugeni Dodonov4cae9ae2012-03-29 12:32:18 -0300327};
328
329static const struct intel_device_info intel_haswell_m_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700330 GEN7_FEATURES,
331 .is_haswell = 1,
332 .is_mobile = 1,
Damien Lespiaudd93be52013-04-22 18:40:39 +0100333 .has_ddi = 1,
Damien Lespiau30568c42013-04-22 18:40:41 +0100334 .has_fpga_dbg = 1,
Rodrigo Vivi891348b2013-05-06 19:37:36 -0300335 .has_fbc = 1,
Ben Widawsky73ae4782013-10-15 10:02:57 -0700336 .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500337};
338
Ben Widawsky4d4dead2013-11-03 16:47:33 -0800339static const struct intel_device_info intel_broadwell_d_info = {
340 .is_preliminary = 1,
Damien Lespiau4b305532013-11-02 21:07:32 -0700341 .gen = 8, .num_pipes = 3,
Ben Widawsky4d4dead2013-11-03 16:47:33 -0800342 .need_gfx_hws = 1, .has_hotplug = 1,
343 .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
344 .has_llc = 1,
345 .has_ddi = 1,
346};
347
348static const struct intel_device_info intel_broadwell_m_info = {
349 .is_preliminary = 1,
Damien Lespiau4b305532013-11-02 21:07:32 -0700350 .gen = 8, .is_mobile = 1, .num_pipes = 3,
Ben Widawsky4d4dead2013-11-03 16:47:33 -0800351 .need_gfx_hws = 1, .has_hotplug = 1,
352 .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
353 .has_llc = 1,
354 .has_ddi = 1,
355};
356
Jesse Barnesa0a18072013-07-26 13:32:51 -0700357/*
358 * Make sure any device matches here are from most specific to most
359 * general. For example, since the Quanta match is based on the subsystem
360 * and subvendor IDs, we need it to come before the more general IVB
361 * PCI ID matches, otherwise we'll use the wrong info struct above.
362 */
363#define INTEL_PCI_IDS \
364 INTEL_I830_IDS(&intel_i830_info), \
365 INTEL_I845G_IDS(&intel_845g_info), \
366 INTEL_I85X_IDS(&intel_i85x_info), \
367 INTEL_I865G_IDS(&intel_i865g_info), \
368 INTEL_I915G_IDS(&intel_i915g_info), \
369 INTEL_I915GM_IDS(&intel_i915gm_info), \
370 INTEL_I945G_IDS(&intel_i945g_info), \
371 INTEL_I945GM_IDS(&intel_i945gm_info), \
372 INTEL_I965G_IDS(&intel_i965g_info), \
373 INTEL_G33_IDS(&intel_g33_info), \
374 INTEL_I965GM_IDS(&intel_i965gm_info), \
375 INTEL_GM45_IDS(&intel_gm45_info), \
376 INTEL_G45_IDS(&intel_g45_info), \
377 INTEL_PINEVIEW_IDS(&intel_pineview_info), \
378 INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info), \
379 INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info), \
380 INTEL_SNB_D_IDS(&intel_sandybridge_d_info), \
381 INTEL_SNB_M_IDS(&intel_sandybridge_m_info), \
382 INTEL_IVB_Q_IDS(&intel_ivybridge_q_info), /* must be first IVB */ \
383 INTEL_IVB_M_IDS(&intel_ivybridge_m_info), \
384 INTEL_IVB_D_IDS(&intel_ivybridge_d_info), \
385 INTEL_HSW_D_IDS(&intel_haswell_d_info), \
386 INTEL_HSW_M_IDS(&intel_haswell_m_info), \
387 INTEL_VLV_M_IDS(&intel_valleyview_m_info), \
Ben Widawsky4d4dead2013-11-03 16:47:33 -0800388 INTEL_VLV_D_IDS(&intel_valleyview_d_info), \
389 INTEL_BDW_M_IDS(&intel_broadwell_m_info), \
390 INTEL_BDW_D_IDS(&intel_broadwell_d_info)
Jesse Barnesa0a18072013-07-26 13:32:51 -0700391
Chris Wilson6103da02010-07-05 18:01:47 +0100392static const struct pci_device_id pciidlist[] = { /* aka */
Jesse Barnesa0a18072013-07-26 13:32:51 -0700393 INTEL_PCI_IDS,
Kristian Høgsberg49ae35f2009-12-16 15:16:15 -0500394 {0, 0, 0}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395};
396
Jesse Barnes79e53942008-11-07 14:24:08 -0800397#if defined(CONFIG_DRM_I915_KMS)
398MODULE_DEVICE_TABLE(pci, pciidlist);
399#endif
400
Akshay Joshi0206e352011-08-16 15:34:10 -0400401void intel_detect_pch(struct drm_device *dev)
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800402{
403 struct drm_i915_private *dev_priv = dev->dev_private;
404 struct pci_dev *pch;
405
Ben Widawskyce1bb322013-04-05 13:12:44 -0700406 /* In all current cases, num_pipes is equivalent to the PCH_NOP setting
407 * (which really amounts to a PCH but no South Display).
408 */
409 if (INTEL_INFO(dev)->num_pipes == 0) {
410 dev_priv->pch_type = PCH_NOP;
Ben Widawskyce1bb322013-04-05 13:12:44 -0700411 return;
412 }
413
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800414 /*
415 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
416 * make graphics device passthrough work easy for VMM, that only
417 * need to expose ISA bridge to let driver know the real hardware
418 * underneath. This is a requirement from virtualization team.
Rui Guo6a9c4b32013-06-19 21:10:23 +0800419 *
420 * In some virtualized environments (e.g. XEN), there is irrelevant
421 * ISA bridge in the system. To work reliably, we should scan trhough
422 * all the ISA bridge devices and check for the first match, instead
423 * of only checking the first one.
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800424 */
425 pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
Rui Guo6a9c4b32013-06-19 21:10:23 +0800426 while (pch) {
427 struct pci_dev *curr = pch;
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800428 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
Paulo Zanoni17a303e2012-11-20 15:12:07 -0200429 unsigned short id;
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800430 id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
Paulo Zanoni17a303e2012-11-20 15:12:07 -0200431 dev_priv->pch_id = id;
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800432
Jesse Barnes90711d52011-04-28 14:48:02 -0700433 if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
434 dev_priv->pch_type = PCH_IBX;
435 DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
Daniel Vetter7fcb83c2012-10-31 22:52:27 +0100436 WARN_ON(!IS_GEN5(dev));
Jesse Barnes90711d52011-04-28 14:48:02 -0700437 } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800438 dev_priv->pch_type = PCH_CPT;
439 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
Daniel Vetter7fcb83c2012-10-31 22:52:27 +0100440 WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
Jesse Barnesc7925132011-04-07 12:33:56 -0700441 } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
442 /* PantherPoint is CPT compatible */
443 dev_priv->pch_type = PCH_CPT;
Jani Nikula492ab662013-10-01 12:12:33 +0300444 DRM_DEBUG_KMS("Found PantherPoint PCH\n");
Daniel Vetter7fcb83c2012-10-31 22:52:27 +0100445 WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
Eugeni Dodonoveb877eb2012-03-29 12:32:20 -0300446 } else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
447 dev_priv->pch_type = PCH_LPT;
448 DRM_DEBUG_KMS("Found LynxPoint PCH\n");
Daniel Vetter7fcb83c2012-10-31 22:52:27 +0100449 WARN_ON(!IS_HASWELL(dev));
Paulo Zanoni08e14132013-04-12 18:16:54 -0300450 WARN_ON(IS_ULT(dev));
Wei Shun Changae6935d2012-11-12 18:54:13 -0200451 } else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
452 dev_priv->pch_type = PCH_LPT;
Wei Shun Changae6935d2012-11-12 18:54:13 -0200453 DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
454 WARN_ON(!IS_HASWELL(dev));
Paulo Zanoni08e14132013-04-12 18:16:54 -0300455 WARN_ON(!IS_ULT(dev));
Rui Guo6a9c4b32013-06-19 21:10:23 +0800456 } else {
457 goto check_next;
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800458 }
Rui Guo6a9c4b32013-06-19 21:10:23 +0800459 pci_dev_put(pch);
460 break;
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800461 }
Rui Guo6a9c4b32013-06-19 21:10:23 +0800462check_next:
463 pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, curr);
464 pci_dev_put(curr);
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800465 }
Rui Guo6a9c4b32013-06-19 21:10:23 +0800466 if (!pch)
467 DRM_DEBUG_KMS("No PCH found?\n");
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800468}
469
Ben Widawsky2911a352012-04-05 14:47:36 -0700470bool i915_semaphore_is_enabled(struct drm_device *dev)
471{
472 if (INTEL_INFO(dev)->gen < 6)
473 return 0;
474
475 if (i915_semaphores >= 0)
476 return i915_semaphores;
477
Daniel Vetter59de3292012-04-02 20:48:43 +0200478#ifdef CONFIG_INTEL_IOMMU
Ben Widawsky2911a352012-04-05 14:47:36 -0700479 /* Enable semaphores on SNB when IO remapping is off */
Daniel Vetter59de3292012-04-02 20:48:43 +0200480 if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
481 return false;
482#endif
Ben Widawsky2911a352012-04-05 14:47:36 -0700483
484 return 1;
485}
486
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100487static int i915_drm_freeze(struct drm_device *dev)
488{
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100489 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes24576d22013-03-26 09:25:45 -0700490 struct drm_crtc *crtc;
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100491
Zhang Ruib8efb172013-02-05 15:41:53 +0800492 /* ignore lid events during suspend */
493 mutex_lock(&dev_priv->modeset_restore_lock);
494 dev_priv->modeset_restore = MODESET_SUSPENDED;
495 mutex_unlock(&dev_priv->modeset_restore_lock);
496
Paulo Zanonic67a4702013-08-19 13:18:09 -0300497 /* We do a lot of poking in a lot of registers, make sure they work
498 * properly. */
499 hsw_disable_package_c8(dev_priv);
Imre Deakbaa70702013-10-25 17:36:48 +0300500 intel_display_set_init_power(dev, true);
Paulo Zanonicb107992013-01-25 16:59:15 -0200501
Dave Airlie5bcf7192010-12-07 09:20:40 +1000502 drm_kms_helper_poll_disable(dev);
503
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100504 pci_save_state(dev->pdev);
505
506 /* If KMS is active, we do the leavevt stuff here */
507 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
Daniel Vetterdb1b76c2013-07-09 16:51:37 +0200508 int error;
509
Chris Wilson45c5f202013-10-16 11:50:01 +0100510 error = i915_gem_suspend(dev);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100511 if (error) {
512 dev_err(&dev->pdev->dev,
513 "GEM idle failed, resume might fail\n");
514 return error;
515 }
Daniel Vettera261b242012-07-26 19:21:47 +0200516
Jesse Barnes1a01ab32012-11-02 11:14:00 -0700517 cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work);
518
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100519 drm_irq_uninstall(dev);
Daniel Vetter15239092013-03-05 09:50:58 +0100520 dev_priv->enable_hotplug_processing = false;
Jesse Barnes24576d22013-03-26 09:25:45 -0700521 /*
522 * Disable CRTCs directly since we want to preserve sw state
523 * for _thaw.
524 */
525 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
526 dev_priv->display.crtc_disable(crtc);
Imre Deak7d708ee2013-04-17 14:04:50 +0300527
528 intel_modeset_suspend_hw(dev);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100529 }
530
Ben Widawsky828c7902013-10-16 09:21:30 -0700531 i915_gem_suspend_gtt_mappings(dev);
532
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100533 i915_save_state(dev);
534
Chris Wilson44834a62010-08-19 16:09:23 +0100535 intel_opregion_fini(dev);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100536
Dave Airlie3fa016a2012-03-28 10:48:49 +0100537 console_lock();
Damien Lespiaub6f3eff2013-06-10 15:48:09 +0100538 intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED);
Dave Airlie3fa016a2012-03-28 10:48:49 +0100539 console_unlock();
540
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100541 return 0;
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100542}
543
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000544int i915_suspend(struct drm_device *dev, pm_message_t state)
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100545{
546 int error;
547
548 if (!dev || !dev->dev_private) {
549 DRM_ERROR("dev: %p\n", dev);
Keith Packard1ae8c0a2009-06-28 15:42:17 -0700550 DRM_ERROR("DRM not initialized, aborting suspend.\n");
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000551 return -ENODEV;
552 }
553
Dave Airlieb932ccb2008-02-20 10:02:20 +1000554 if (state.event == PM_EVENT_PRETHAW)
555 return 0;
556
Dave Airlie5bcf7192010-12-07 09:20:40 +1000557
558 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
559 return 0;
Chris Wilson6eecba32010-09-08 09:45:11 +0100560
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100561 error = i915_drm_freeze(dev);
562 if (error)
563 return error;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000564
Dave Airlieb932ccb2008-02-20 10:02:20 +1000565 if (state.event == PM_EVENT_SUSPEND) {
566 /* Shut down the device */
567 pci_disable_device(dev->pdev);
568 pci_set_power_state(dev->pdev, PCI_D3hot);
569 }
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000570
571 return 0;
572}
573
Jesse Barnes073f34d2012-11-02 11:13:59 -0700574void intel_console_resume(struct work_struct *work)
575{
576 struct drm_i915_private *dev_priv =
577 container_of(work, struct drm_i915_private,
578 console_resume_work);
579 struct drm_device *dev = dev_priv->dev;
580
581 console_lock();
Damien Lespiaub6f3eff2013-06-10 15:48:09 +0100582 intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
Jesse Barnes073f34d2012-11-02 11:13:59 -0700583 console_unlock();
584}
585
Jesse Barnesbb60b962013-03-26 09:25:46 -0700586static void intel_resume_hotplug(struct drm_device *dev)
587{
588 struct drm_mode_config *mode_config = &dev->mode_config;
589 struct intel_encoder *encoder;
590
591 mutex_lock(&mode_config->mutex);
592 DRM_DEBUG_KMS("running encoder hotplug functions\n");
593
594 list_for_each_entry(encoder, &mode_config->encoder_list, base.head)
595 if (encoder->hot_plug)
596 encoder->hot_plug(encoder);
597
598 mutex_unlock(&mode_config->mutex);
599
600 /* Just fire off a uevent and let userspace tell us what to do */
601 drm_helper_hpd_irq_event(dev);
602}
603
Paulo Zanoni9d49c0e2013-09-12 18:06:43 -0300604static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000605{
Jesse Barnes5669fca2009-02-17 15:13:31 -0800606 struct drm_i915_private *dev_priv = dev->dev_private;
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100607 int error = 0;
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100608
Ville Syrjäläc9f7fbf2013-09-16 17:38:36 +0300609 intel_uncore_early_sanitize(dev);
610
Paulo Zanoni9d49c0e2013-09-12 18:06:43 -0300611 intel_uncore_sanitize(dev);
612
613 if (drm_core_check_feature(dev, DRIVER_MODESET) &&
614 restore_gtt_mappings) {
615 mutex_lock(&dev->struct_mutex);
616 i915_gem_restore_gtt_mappings(dev);
617 mutex_unlock(&dev->struct_mutex);
618 }
619
Imre Deakddb642f2013-10-28 17:20:35 +0200620 intel_power_domains_init_hw(dev);
Ville Syrjäläebdcefc2013-09-16 17:38:35 +0300621
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100622 i915_restore_state(dev);
Chris Wilson44834a62010-08-19 16:09:23 +0100623 intel_opregion_setup(dev);
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100624
Jesse Barnes5669fca2009-02-17 15:13:31 -0800625 /* KMS EnterVT equivalent */
626 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
Paulo Zanonidde86e22012-12-01 12:04:25 -0200627 intel_init_pch_refclk(dev);
Chris Wilson1833b132012-05-09 11:56:28 +0100628
Jesse Barnes5669fca2009-02-17 15:13:31 -0800629 mutex_lock(&dev->struct_mutex);
Jesse Barnes5669fca2009-02-17 15:13:31 -0800630
Daniel Vetterf691e2f2012-02-02 09:58:12 +0100631 error = i915_gem_init_hw(dev);
Jesse Barnes5669fca2009-02-17 15:13:31 -0800632 mutex_unlock(&dev->struct_mutex);
Jesse Barnes226485e2009-02-23 15:41:09 -0800633
Daniel Vetter15239092013-03-05 09:50:58 +0100634 /* We need working interrupts for modeset enabling ... */
635 drm_irq_install(dev);
636
Chris Wilson1833b132012-05-09 11:56:28 +0100637 intel_modeset_init_hw(dev);
Jesse Barnes24576d22013-03-26 09:25:45 -0700638
639 drm_modeset_lock_all(dev);
640 intel_modeset_setup_hw_state(dev, true);
641 drm_modeset_unlock_all(dev);
Daniel Vetter15239092013-03-05 09:50:58 +0100642
643 /*
644 * ... but also need to make sure that hotplug processing
645 * doesn't cause havoc. Like in the driver load code we don't
646 * bother with the tiny race here where we might loose hotplug
647 * notifications.
648 * */
Daniel Vetter20afbda2012-12-11 14:05:07 +0100649 intel_hpd_init(dev);
Daniel Vetter15239092013-03-05 09:50:58 +0100650 dev_priv->enable_hotplug_processing = true;
Jesse Barnesbb60b962013-03-26 09:25:46 -0700651 /* Config may have changed between suspend and resume */
652 intel_resume_hotplug(dev);
Jesse Barnesd5bb0812011-01-05 12:01:26 -0800653 }
Jesse Barnes1daed3f2011-01-05 12:01:25 -0800654
Chris Wilson44834a62010-08-19 16:09:23 +0100655 intel_opregion_init(dev);
656
Jesse Barnes073f34d2012-11-02 11:13:59 -0700657 /*
658 * The console lock can be pretty contented on resume due
659 * to all the printk activity. Try to keep it out of the hot
660 * path of resume if possible.
661 */
662 if (console_trylock()) {
Damien Lespiaub6f3eff2013-06-10 15:48:09 +0100663 intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
Jesse Barnes073f34d2012-11-02 11:13:59 -0700664 console_unlock();
665 } else {
666 schedule_work(&dev_priv->console_resume_work);
667 }
668
Paulo Zanonic67a4702013-08-19 13:18:09 -0300669 /* Undo what we did at i915_drm_freeze so the refcount goes back to the
670 * expected level. */
671 hsw_enable_package_c8(dev_priv);
672
Zhang Ruib8efb172013-02-05 15:41:53 +0800673 mutex_lock(&dev_priv->modeset_restore_lock);
674 dev_priv->modeset_restore = MODESET_DONE;
675 mutex_unlock(&dev_priv->modeset_restore_lock);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100676 return error;
677}
678
Jesse Barnes1abd02e2012-11-02 11:14:02 -0700679static int i915_drm_thaw(struct drm_device *dev)
680{
Daniel Vetter7f16e5c2013-11-04 16:28:47 +0100681 if (drm_core_check_feature(dev, DRIVER_MODESET))
Ben Widawsky828c7902013-10-16 09:21:30 -0700682 i915_check_and_clear_faults(dev);
Jesse Barnes1abd02e2012-11-02 11:14:02 -0700683
Paulo Zanoni9d49c0e2013-09-12 18:06:43 -0300684 return __i915_drm_thaw(dev, true);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100685}
686
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000687int i915_resume(struct drm_device *dev)
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100688{
Jesse Barnes1abd02e2012-11-02 11:14:02 -0700689 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson6eecba32010-09-08 09:45:11 +0100690 int ret;
691
Dave Airlie5bcf7192010-12-07 09:20:40 +1000692 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
693 return 0;
694
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100695 if (pci_enable_device(dev->pdev))
696 return -EIO;
697
698 pci_set_master(dev->pdev);
699
Jesse Barnes1abd02e2012-11-02 11:14:02 -0700700 /*
701 * Platforms with opregion should have sane BIOS, older ones (gen3 and
Paulo Zanoni9d49c0e2013-09-12 18:06:43 -0300702 * earlier) need to restore the GTT mappings since the BIOS might clear
703 * all our scratch PTEs.
Jesse Barnes1abd02e2012-11-02 11:14:02 -0700704 */
Paulo Zanoni9d49c0e2013-09-12 18:06:43 -0300705 ret = __i915_drm_thaw(dev, !dev_priv->opregion.header);
Chris Wilson6eecba32010-09-08 09:45:11 +0100706 if (ret)
707 return ret;
708
709 drm_kms_helper_poll_enable(dev);
710 return 0;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000711}
712
Ben Gamari11ed50e2009-09-14 17:48:45 -0400713/**
Eugeni Dodonovf3953dc2011-11-28 16:15:17 -0200714 * i915_reset - reset chip after a hang
Ben Gamari11ed50e2009-09-14 17:48:45 -0400715 * @dev: drm device to reset
Ben Gamari11ed50e2009-09-14 17:48:45 -0400716 *
717 * Reset the chip. Useful if a hang is detected. Returns zero on successful
718 * reset or otherwise an error code.
719 *
720 * Procedure is fairly simple:
721 * - reset the chip using the reset reg
722 * - re-init context state
723 * - re-init hardware status page
724 * - re-init ring buffer
725 * - re-init interrupt state
726 * - re-init display
727 */
Daniel Vetterd4b8bb22012-04-27 15:17:44 +0200728int i915_reset(struct drm_device *dev)
Ben Gamari11ed50e2009-09-14 17:48:45 -0400729{
730 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson2e7c8ee2013-05-28 10:38:44 +0100731 bool simulated;
Kenneth Graunke0573ed42010-09-11 03:17:19 -0700732 int ret;
Ben Gamari11ed50e2009-09-14 17:48:45 -0400733
Chris Wilsond78cb502010-12-23 13:33:15 +0000734 if (!i915_try_reset)
735 return 0;
736
Daniel Vetterd54a02c2012-07-04 22:18:39 +0200737 mutex_lock(&dev->struct_mutex);
Ben Gamari11ed50e2009-09-14 17:48:45 -0400738
Chris Wilson069efc12010-09-30 16:53:18 +0100739 i915_gem_reset(dev);
Ben Gamari11ed50e2009-09-14 17:48:45 -0400740
Chris Wilson2e7c8ee2013-05-28 10:38:44 +0100741 simulated = dev_priv->gpu_error.stop_rings != 0;
742
Mika Kuoppalabe62acb2013-08-30 16:19:28 +0300743 ret = intel_gpu_reset(dev);
Daniel Vetter350d2702012-04-27 15:17:42 +0200744
Mika Kuoppalabe62acb2013-08-30 16:19:28 +0300745 /* Also reset the gpu hangman. */
746 if (simulated) {
747 DRM_INFO("Simulated gpu hang, resetting stop_rings\n");
748 dev_priv->gpu_error.stop_rings = 0;
749 if (ret == -ENODEV) {
750 DRM_ERROR("Reset not implemented, but ignoring "
751 "error for simulated gpu hangs\n");
752 ret = 0;
753 }
Chris Wilson2e7c8ee2013-05-28 10:38:44 +0100754 }
Mika Kuoppalabe62acb2013-08-30 16:19:28 +0300755
Kenneth Graunke0573ed42010-09-11 03:17:19 -0700756 if (ret) {
Chris Wilsonf803aa52010-09-19 12:38:26 +0100757 DRM_ERROR("Failed to reset chip.\n");
Daniel J Bluemanf953c932010-05-17 14:23:52 +0100758 mutex_unlock(&dev->struct_mutex);
Chris Wilsonf803aa52010-09-19 12:38:26 +0100759 return ret;
Ben Gamari11ed50e2009-09-14 17:48:45 -0400760 }
761
762 /* Ok, now get things going again... */
763
764 /*
765 * Everything depends on having the GTT running, so we need to start
766 * there. Fortunately we don't need to do this unless we reset the
767 * chip at a PCI level.
768 *
769 * Next we need to restore the context, but we don't use those
770 * yet either...
771 *
772 * Ring buffer needs to be re-initialized in the KMS case, or if X
773 * was running at the time of the reset (i.e. we weren't VT
774 * switched away).
775 */
776 if (drm_core_check_feature(dev, DRIVER_MODESET) ||
Daniel Vetterdb1b76c2013-07-09 16:51:37 +0200777 !dev_priv->ums.mm_suspended) {
Ben Widawsky3d57e5b2013-10-14 10:01:36 -0700778 bool hw_contexts_disabled = dev_priv->hw_contexts_disabled;
Daniel Vetterdb1b76c2013-07-09 16:51:37 +0200779 dev_priv->ums.mm_suspended = 0;
Eric Anholt75a68982010-11-18 09:31:13 +0800780
Ben Widawsky3d57e5b2013-10-14 10:01:36 -0700781 ret = i915_gem_init_hw(dev);
782 if (!hw_contexts_disabled && dev_priv->hw_contexts_disabled)
783 DRM_ERROR("HW contexts didn't survive reset\n");
Daniel Vetter8e88a2b2012-06-19 18:40:00 +0200784 mutex_unlock(&dev->struct_mutex);
Ben Widawsky3d57e5b2013-10-14 10:01:36 -0700785 if (ret) {
786 DRM_ERROR("Failed hw init on reset %d\n", ret);
787 return ret;
788 }
Daniel Vetterf8175862012-04-10 15:50:11 +0200789
Ben Gamari11ed50e2009-09-14 17:48:45 -0400790 drm_irq_uninstall(dev);
791 drm_irq_install(dev);
Daniel Vetter20afbda2012-12-11 14:05:07 +0100792 intel_hpd_init(dev);
Daniel Vetterbcbc3242012-04-27 15:17:41 +0200793 } else {
794 mutex_unlock(&dev->struct_mutex);
Ben Gamari11ed50e2009-09-14 17:48:45 -0400795 }
796
Ben Gamari11ed50e2009-09-14 17:48:45 -0400797 return 0;
798}
799
Greg Kroah-Hartman56550d92012-12-21 15:09:25 -0800800static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500801{
Daniel Vetter01a06852012-06-25 15:58:49 +0200802 struct intel_device_info *intel_info =
803 (struct intel_device_info *) ent->driver_data;
804
Ben Widawskyb833d682013-08-23 16:00:07 -0700805 if (IS_PRELIMINARY_HW(intel_info) && !i915_preliminary_hw_support) {
806 DRM_INFO("This hardware requires preliminary hardware support.\n"
807 "See CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT, and/or modparam preliminary_hw_support\n");
808 return -ENODEV;
809 }
810
Chris Wilson5fe49d82011-02-01 19:43:02 +0000811 /* Only bind to function 0 of the device. Early generations
812 * used function 1 as a placeholder for multi-head. This causes
813 * us confusion instead, especially on the systems where both
814 * functions have the same PCI-ID!
815 */
816 if (PCI_FUNC(pdev->devfn))
817 return -ENODEV;
818
Daniel Vetter01a06852012-06-25 15:58:49 +0200819 /* We've managed to ship a kms-enabled ddx that shipped with an XvMC
820 * implementation for gen3 (and only gen3) that used legacy drm maps
821 * (gasp!) to share buffers between X and the client. Hence we need to
822 * keep around the fake agp stuff for gen3, even when kms is enabled. */
823 if (intel_info->gen != 3) {
824 driver.driver_features &=
825 ~(DRIVER_USE_AGP | DRIVER_REQUIRE_AGP);
826 } else if (!intel_agp_enabled) {
827 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
828 return -ENODEV;
829 }
830
Jordan Crousedcdb1672010-05-27 13:40:25 -0600831 return drm_get_pci_dev(pdev, ent, &driver);
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500832}
833
834static void
835i915_pci_remove(struct pci_dev *pdev)
836{
837 struct drm_device *dev = pci_get_drvdata(pdev);
838
839 drm_put_dev(dev);
840}
841
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100842static int i915_pm_suspend(struct device *dev)
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500843{
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100844 struct pci_dev *pdev = to_pci_dev(dev);
845 struct drm_device *drm_dev = pci_get_drvdata(pdev);
846 int error;
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500847
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100848 if (!drm_dev || !drm_dev->dev_private) {
849 dev_err(dev, "DRM not initialized, aborting suspend.\n");
850 return -ENODEV;
851 }
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500852
Dave Airlie5bcf7192010-12-07 09:20:40 +1000853 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
854 return 0;
855
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100856 error = i915_drm_freeze(drm_dev);
857 if (error)
858 return error;
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500859
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100860 pci_disable_device(pdev);
861 pci_set_power_state(pdev, PCI_D3hot);
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800862
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800863 return 0;
864}
865
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100866static int i915_pm_resume(struct device *dev)
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800867{
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100868 struct pci_dev *pdev = to_pci_dev(dev);
869 struct drm_device *drm_dev = pci_get_drvdata(pdev);
870
871 return i915_resume(drm_dev);
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800872}
873
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100874static int i915_pm_freeze(struct device *dev)
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800875{
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100876 struct pci_dev *pdev = to_pci_dev(dev);
877 struct drm_device *drm_dev = pci_get_drvdata(pdev);
878
879 if (!drm_dev || !drm_dev->dev_private) {
880 dev_err(dev, "DRM not initialized, aborting suspend.\n");
881 return -ENODEV;
882 }
883
884 return i915_drm_freeze(drm_dev);
885}
886
887static int i915_pm_thaw(struct device *dev)
888{
889 struct pci_dev *pdev = to_pci_dev(dev);
890 struct drm_device *drm_dev = pci_get_drvdata(pdev);
891
892 return i915_drm_thaw(drm_dev);
893}
894
895static int i915_pm_poweroff(struct device *dev)
896{
897 struct pci_dev *pdev = to_pci_dev(dev);
898 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100899
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100900 return i915_drm_freeze(drm_dev);
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800901}
902
Chris Wilsonb4b78d12010-06-06 15:40:20 +0100903static const struct dev_pm_ops i915_pm_ops = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400904 .suspend = i915_pm_suspend,
905 .resume = i915_pm_resume,
906 .freeze = i915_pm_freeze,
907 .thaw = i915_pm_thaw,
908 .poweroff = i915_pm_poweroff,
909 .restore = i915_pm_resume,
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800910};
911
Laurent Pinchart78b68552012-05-17 13:27:22 +0200912static const struct vm_operations_struct i915_gem_vm_ops = {
Jesse Barnesde151cf2008-11-12 10:03:55 -0800913 .fault = i915_gem_fault,
Jesse Barnesab00b3e2009-02-11 14:01:46 -0800914 .open = drm_gem_vm_open,
915 .close = drm_gem_vm_close,
Jesse Barnesde151cf2008-11-12 10:03:55 -0800916};
917
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700918static const struct file_operations i915_driver_fops = {
919 .owner = THIS_MODULE,
920 .open = drm_open,
921 .release = drm_release,
922 .unlocked_ioctl = drm_ioctl,
923 .mmap = drm_gem_mmap,
924 .poll = drm_poll,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700925 .read = drm_read,
926#ifdef CONFIG_COMPAT
927 .compat_ioctl = i915_compat_ioctl,
928#endif
929 .llseek = noop_llseek,
930};
931
Linus Torvalds1da177e2005-04-16 15:20:36 -0700932static struct drm_driver driver = {
Michael Witten0c547812011-08-25 17:55:54 +0000933 /* Don't use MTRRs here; the Xserver or userspace app should
934 * deal with them for Intel hardware.
Dave Airlie792d2b92005-11-11 23:30:27 +1100935 */
Eric Anholt673a3942008-07-30 12:06:12 -0700936 .driver_features =
Daniel Vetter28185642013-08-08 15:41:27 +0200937 DRIVER_USE_AGP | DRIVER_REQUIRE_AGP |
Kristian Høgsberg10ba5012013-08-25 18:29:01 +0200938 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | DRIVER_PRIME |
939 DRIVER_RENDER,
Dave Airlie22eae942005-11-10 22:16:34 +1100940 .load = i915_driver_load,
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000941 .unload = i915_driver_unload,
Eric Anholt673a3942008-07-30 12:06:12 -0700942 .open = i915_driver_open,
Dave Airlie22eae942005-11-10 22:16:34 +1100943 .lastclose = i915_driver_lastclose,
944 .preclose = i915_driver_preclose,
Eric Anholt673a3942008-07-30 12:06:12 -0700945 .postclose = i915_driver_postclose,
Rafael J. Wysockid8e29202010-01-09 00:45:33 +0100946
947 /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
948 .suspend = i915_suspend,
949 .resume = i915_resume,
950
Dave Airliecda17382005-07-10 17:31:26 +1000951 .device_is_agp = i915_driver_device_is_agp,
Dave Airlie7c1c2872008-11-28 14:22:24 +1000952 .master_create = i915_master_create,
953 .master_destroy = i915_master_destroy,
Ben Gamari955b12d2009-02-17 20:08:49 -0500954#if defined(CONFIG_DEBUG_FS)
Ben Gamari27c202a2009-07-01 22:26:52 -0400955 .debugfs_init = i915_debugfs_init,
956 .debugfs_cleanup = i915_debugfs_cleanup,
Ben Gamari955b12d2009-02-17 20:08:49 -0500957#endif
Eric Anholt673a3942008-07-30 12:06:12 -0700958 .gem_free_object = i915_gem_free_object,
Jesse Barnesde151cf2008-11-12 10:03:55 -0800959 .gem_vm_ops = &i915_gem_vm_ops,
Daniel Vetter1286ff72012-05-10 15:25:09 +0200960
961 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
962 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
963 .gem_prime_export = i915_gem_prime_export,
964 .gem_prime_import = i915_gem_prime_import,
965
Dave Airlieff72145b2011-02-07 12:16:14 +1000966 .dumb_create = i915_gem_dumb_create,
967 .dumb_map_offset = i915_gem_mmap_gtt,
Daniel Vetter43387b32013-07-16 09:12:04 +0200968 .dumb_destroy = drm_gem_dumb_destroy,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700969 .ioctls = i915_ioctls,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700970 .fops = &i915_driver_fops,
Dave Airlie22eae942005-11-10 22:16:34 +1100971 .name = DRIVER_NAME,
972 .desc = DRIVER_DESC,
973 .date = DRIVER_DATE,
974 .major = DRIVER_MAJOR,
975 .minor = DRIVER_MINOR,
976 .patchlevel = DRIVER_PATCHLEVEL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700977};
978
Dave Airlie8410ea32010-12-15 03:16:38 +1000979static struct pci_driver i915_pci_driver = {
980 .name = DRIVER_NAME,
981 .id_table = pciidlist,
982 .probe = i915_pci_probe,
983 .remove = i915_pci_remove,
984 .driver.pm = &i915_pm_ops,
985};
986
Linus Torvalds1da177e2005-04-16 15:20:36 -0700987static int __init i915_init(void)
988{
989 driver.num_ioctls = i915_max_ioctl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800990
991 /*
992 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
993 * explicitly disabled with the module pararmeter.
994 *
995 * Otherwise, just follow the parameter (defaulting to off).
996 *
997 * Allow optional vga_text_mode_force boot option to override
998 * the default behavior.
999 */
1000#if defined(CONFIG_DRM_I915_KMS)
1001 if (i915_modeset != 0)
1002 driver.driver_features |= DRIVER_MODESET;
1003#endif
1004 if (i915_modeset == 1)
1005 driver.driver_features |= DRIVER_MODESET;
1006
1007#ifdef CONFIG_VGA_CONSOLE
1008 if (vgacon_text_force() && i915_modeset == -1)
1009 driver.driver_features &= ~DRIVER_MODESET;
1010#endif
1011
Chris Wilson3885c6b2011-01-23 10:45:14 +00001012 if (!(driver.driver_features & DRIVER_MODESET))
1013 driver.get_vblank_timestamp = NULL;
1014
Dave Airlie8410ea32010-12-15 03:16:38 +10001015 return drm_pci_init(&driver, &i915_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016}
1017
1018static void __exit i915_exit(void)
1019{
Dave Airlie8410ea32010-12-15 03:16:38 +10001020 drm_pci_exit(&driver, &i915_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001021}
1022
1023module_init(i915_init);
1024module_exit(i915_exit);
1025
Dave Airlieb5e89ed2005-09-25 14:28:13 +10001026MODULE_AUTHOR(DRIVER_AUTHOR);
1027MODULE_DESCRIPTION(DRIVER_DESC);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001028MODULE_LICENSE("GPL and additional rights");