blob: a967f62a386ec2f1f67ab4aad60b3dd88f8bb0e9 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700252 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
474 "src/math/expm1minus-scalar-rr2-p5.c",
475 "src/math/expm1minus-scalar-rr2-p6.c",
Frank Barchard22136062020-11-24 18:44:46 -0800476 "src/math/expminus-scalar-rr2-lut64-p2.c",
477 "src/math/expminus-scalar-rr2-lut2048-p1.c",
478 "src/math/expminus-scalar-rr2-p5.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
483 "src/math/roundne-scalar-nearbyint.c",
484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
489 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
495 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
496 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
497 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
498 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
499 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700500 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
501 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
502 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
503 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
504 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
505 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
507 "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c",
508 "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c",
509 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
510 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
511 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
512 "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c",
513 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
514 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
515 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
516 "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c",
517 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
519 "src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c",
520 "src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c",
521 "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
523 "src/qs8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700524 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
526 "src/qs8-requantization/rndna-scalar-unsigned32.c",
527 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan062bee32021-05-27 20:31:07 -0700528 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700529 "src/qs8-vadd/gen/minmax-scalar-x1.c",
530 "src/qs8-vadd/gen/minmax-scalar-x2.c",
531 "src/qs8-vadd/gen/minmax-scalar-x4.c",
532 "src/qs8-vaddc/gen/minmax-scalar-x1.c",
533 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
534 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700535 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
536 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
537 "src/qu8-dwconv/up1x9-minmax-scalar.c",
538 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
539 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/qu8-gemm/2x2-minmax-scalar.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700541 "src/qu8-igemm/2x2-minmax-scalar.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700542 "src/qu8-requantization/fp32-scalar-lrintf.c",
543 "src/qu8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700544 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700545 "src/qu8-requantization/rndna-scalar-signed64.c",
546 "src/qu8-requantization/rndna-scalar-unsigned32.c",
547 "src/qu8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700548 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700549 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700550 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700551 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700553 "src/x8-lut/scalar.c",
554 "src/x8-zip/x2-scalar.c",
555 "src/x8-zip/x3-scalar.c",
556 "src/x8-zip/x4-scalar.c",
557 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800558 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700559 "src/x32-fill/scalar-float.c",
560 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700561 "src/x32-packx/x2-scalar.c",
562 "src/x32-packx/x3-scalar.c",
563 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700564 "src/x32-pad/scalar-float.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700565 "src/x32-pad/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700566 "src/x32-unpool/scalar.c",
567 "src/x32-zip/x2-scalar.c",
568 "src/x32-zip/x3-scalar.c",
569 "src/x32-zip/x4-scalar.c",
570 "src/x32-zip/xm-scalar.c",
Marat Dukhan048931b2020-11-24 20:53:54 -0800571 "src/xx-copy/memcpy.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700572]
573
Marat Dukhan436ebe62019-12-04 15:10:12 -0800574WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700575 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
576 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700577 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
578 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700579 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
580 "src/f32-dwconv/gen/up1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700581 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
582 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700583 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
584 "src/f32-dwconv/gen/up1x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700585 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
586 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700587 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
588 "src/f32-dwconv/gen/up1x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700589 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
590 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700591 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
592 "src/f32-dwconv/gen/up2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700593 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
594 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700595 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
596 "src/f32-dwconv/gen/up2x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700597 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
598 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700599 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
600 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700601 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
602 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700603 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
604 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
605 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
606 "src/f32-gemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700607 "src/f32-gemm/gen/1x4-relu-wasm.c",
608 "src/f32-gemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700609 "src/f32-gemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700610 "src/f32-gemm/gen/2x4-relu-wasm.c",
611 "src/f32-gemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700612 "src/f32-gemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700613 "src/f32-gemm/gen/4x2-relu-wasm.c",
614 "src/f32-gemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700615 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700616 "src/f32-gemm/gen/4x4-relu-wasm.c",
617 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700618 "src/f32-igemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700619 "src/f32-igemm/gen/1x4-relu-wasm.c",
620 "src/f32-igemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700621 "src/f32-igemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700622 "src/f32-igemm/gen/2x4-relu-wasm.c",
623 "src/f32-igemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700624 "src/f32-igemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700625 "src/f32-igemm/gen/4x2-relu-wasm.c",
626 "src/f32-igemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700627 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700628 "src/f32-igemm/gen/4x4-relu-wasm.c",
629 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700630 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
631 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
632 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700633 "src/f32-prelu/gen/wasm-2x1.c",
634 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700635 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
636 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
637 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700638 "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700639 "src/f32-vbinary/gen/vadd-relu-wasm-x1.c",
640 "src/f32-vbinary/gen/vadd-relu-wasm-x2.c",
641 "src/f32-vbinary/gen/vadd-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700642 "src/f32-vbinary/gen/vadd-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700643 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
644 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
645 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
646 "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700647 "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c",
648 "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c",
649 "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700650 "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700651 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
652 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
653 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
654 "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700655 "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c",
656 "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c",
657 "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700658 "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700659 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
660 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
661 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
662 "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700663 "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c",
664 "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c",
665 "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700666 "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800667 "src/f32-vbinary/gen/vmax-wasm-x1.c",
668 "src/f32-vbinary/gen/vmax-wasm-x2.c",
669 "src/f32-vbinary/gen/vmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700670 "src/f32-vbinary/gen/vmax-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800671 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
672 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
673 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700674 "src/f32-vbinary/gen/vmaxc-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800675 "src/f32-vbinary/gen/vmin-wasm-x1.c",
676 "src/f32-vbinary/gen/vmin-wasm-x2.c",
677 "src/f32-vbinary/gen/vmin-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700678 "src/f32-vbinary/gen/vmin-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800679 "src/f32-vbinary/gen/vminc-wasm-x1.c",
680 "src/f32-vbinary/gen/vminc-wasm-x2.c",
681 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700682 "src/f32-vbinary/gen/vminc-wasm-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700683 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
684 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
685 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700686 "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700687 "src/f32-vbinary/gen/vmul-relu-wasm-x1.c",
688 "src/f32-vbinary/gen/vmul-relu-wasm-x2.c",
689 "src/f32-vbinary/gen/vmul-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700690 "src/f32-vbinary/gen/vmul-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700691 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
692 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
693 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
694 "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700695 "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c",
696 "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c",
697 "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700698 "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700699 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
700 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
701 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
702 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700703 "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c",
704 "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c",
705 "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700706 "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700707 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
708 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
709 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
710 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700711 "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c",
712 "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c",
713 "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700714 "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700715 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
716 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
717 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
718 "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700719 "src/f32-vbinary/gen/vsub-relu-wasm-x1.c",
720 "src/f32-vbinary/gen/vsub-relu-wasm-x2.c",
721 "src/f32-vbinary/gen/vsub-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700722 "src/f32-vbinary/gen/vsub-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700723 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
724 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
725 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
726 "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700727 "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c",
728 "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c",
729 "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700730 "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700731 "src/f32-vclamp/gen/vclamp-wasm-x1.c",
732 "src/f32-vclamp/gen/vclamp-wasm-x2.c",
733 "src/f32-vclamp/gen/vclamp-wasm-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800734 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c",
735 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c",
736 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c",
737 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c",
738 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c",
739 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c",
740 "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c",
741 "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c",
742 "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c",
743 "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c",
744 "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c",
745 "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700746 "src/f32-vhswish/gen/vhswish-wasm-x1.c",
747 "src/f32-vhswish/gen/vhswish-wasm-x2.c",
748 "src/f32-vhswish/gen/vhswish-wasm-x4.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700749 "src/f32-vlrelu/gen/vlrelu-wasm-x1.c",
750 "src/f32-vlrelu/gen/vlrelu-wasm-x2.c",
751 "src/f32-vlrelu/gen/vlrelu-wasm-x4.c",
Frank Barchardd4416d62021-05-17 15:51:37 -0700752 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
753 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
754 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700755 "src/f32-vrelu/gen/vrelu-wasm-x1.c",
756 "src/f32-vrelu/gen/vrelu-wasm-x2.c",
757 "src/f32-vrelu/gen/vrelu-wasm-x4.c",
758 "src/f32-vrelu/gen/vrelu-wasm-x8.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800759]
760
Marat Dukhan290055c2020-06-09 12:24:29 -0700761WASMSIMD_UKERNELS = [
Marat Dukhan40f05522020-07-16 22:33:12 -0700762 "src/f32-argmaxpool/4x-wasmsimd-c4.c",
763 "src/f32-argmaxpool/9p8x-wasmsimd-c4.c",
764 "src/f32-argmaxpool/9x-wasmsimd-c4.c",
Marat Dukhan3b7432d2020-07-16 17:46:32 -0700765 "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c",
766 "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c",
767 "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c",
768 "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard22136062020-11-24 18:44:46 -0800769 "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800770 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700771 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800772 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700773 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700774 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800775 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700776 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800777 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700778 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700779 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800780 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700781 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800782 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700783 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
784 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800785 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700786 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800787 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700788 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700789 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800790 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700791 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800792 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700793 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700794 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800795 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700796 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800797 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700798 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
799 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800800 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
801 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
802 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
803 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
804 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
805 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
806 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
807 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
808 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c",
809 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800810 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
811 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
812 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
813 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c",
814 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
815 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c",
816 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c",
817 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c",
818 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c",
819 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800820 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
821 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
822 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
823 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
824 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
825 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
826 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
827 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
828 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c",
829 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800830 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
831 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
832 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
833 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c",
834 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
835 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c",
836 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c",
837 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c",
838 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c",
839 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c",
Frank Barchardc5704bf2020-12-21 23:09:00 -0800840 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
841 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
842 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
843 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
844 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
845 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
846 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
847 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800848 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
849 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
850 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
851 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c",
852 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
853 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c",
854 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c",
855 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c",
Frank Barchardcadd4222021-01-20 16:27:25 -0800856 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
857 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
858 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
859 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
860 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
861 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
862 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
863 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800864 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
865 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
866 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
867 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c",
868 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
869 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c",
870 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c",
871 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -0800872 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
873 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
874 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
875 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
876 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
877 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
878 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
879 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
880 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
881 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
882 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c",
883 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c",
884 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800885 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
886 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
887 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
888 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
889 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c",
890 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
891 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
892 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c",
893 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
894 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c",
895 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c",
896 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c",
897 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -0800898 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
899 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
900 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
901 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
902 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
903 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
904 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
905 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
906 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
907 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
908 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c",
909 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c",
910 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800911 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
912 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
913 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
914 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
915 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c",
916 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
917 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
918 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c",
919 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
920 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c",
921 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c",
922 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c",
923 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -0800924 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
925 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
926 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
927 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
928 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
929 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
930 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
931 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
932 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
933 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800934 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
935 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
936 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
937 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
938 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c",
939 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
940 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
941 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c",
942 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
943 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -0800944 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
945 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
946 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
947 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
948 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
949 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
950 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
951 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
952 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
953 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800954 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
955 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
956 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
957 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
958 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c",
959 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
960 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
961 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c",
962 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
963 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700964 "src/f32-gavgpool-cw/wasmsimd-arm-x4.c",
965 "src/f32-gavgpool-cw/wasmsimd-x86-x4.c",
Marat Dukhanc6016802020-07-16 18:51:28 -0700966 "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c",
967 "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c",
968 "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c",
969 "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800970 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c",
971 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c",
972 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c",
973 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700974 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
975 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800976 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c",
977 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c",
978 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c",
979 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700980 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
981 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800982 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c",
983 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c",
984 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c",
985 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700986 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
987 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800988 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c",
989 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c",
990 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c",
991 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700992 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
993 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800994 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c",
995 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c",
996 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c",
997 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700998 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
999 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001000 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1001 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1002 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1003 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001004 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c",
1005 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
1006 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1007 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001008 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1009 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1010 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1011 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001012 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1013 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1014 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1015 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1016 "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c",
1017 "src/f32-gemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001018 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1019 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1020 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1021 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001022 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c",
1023 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
1024 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1025 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001026 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1027 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1028 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1029 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001030 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c",
1031 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
1032 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1033 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001034 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1035 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1036 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1037 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001038 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1039 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
XNNPACK Team965272b2020-10-23 21:10:15 -07001040 "src/f32-ibilinear-chw/gen/wasmsimd-p4.c",
1041 "src/f32-ibilinear-chw/gen/wasmsimd-p8.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001042 "src/f32-ibilinear/gen/wasmsimd-c4.c",
1043 "src/f32-ibilinear/gen/wasmsimd-c8.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001044 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1045 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1046 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1047 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001048 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c",
1049 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
1050 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1051 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001052 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1053 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1054 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1055 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001056 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1057 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1058 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1059 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1060 "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c",
1061 "src/f32-igemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001062 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1063 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1064 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1065 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001066 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c",
1067 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
1068 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1069 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001070 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1071 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1072 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1073 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001074 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c",
1075 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
1076 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1077 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001078 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1079 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1080 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1081 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001082 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1083 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhanf6e24802020-07-08 22:20:40 -07001084 "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c",
1085 "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c",
Marat Dukhan1483c532020-07-16 18:08:19 -07001086 "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c",
1087 "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c",
1088 "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c",
1089 "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001090 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1091 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001092 "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c",
1093 "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c",
1094 "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001095 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
1096 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001097 "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c",
1098 "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c",
1099 "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c",
1100 "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c",
1101 "src/f32-prelu/gen/wasmsimd-minmax-1x4.c",
1102 "src/f32-prelu/gen/wasmsimd-minmax-1x8.c",
1103 "src/f32-prelu/gen/wasmsimd-minmax-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001104 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
1105 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001106 "src/f32-prelu/gen/wasmsimd-minmax-2x16.c",
1107 "src/f32-prelu/gen/wasmsimd-minmax-4x4.c",
1108 "src/f32-prelu/gen/wasmsimd-minmax-4x8.c",
1109 "src/f32-prelu/gen/wasmsimd-minmax-4x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001110 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001111 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001112 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001113 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c",
1114 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001115 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001116 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c",
1117 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001118 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001119 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c",
1120 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001121 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c",
Marat Dukhan8c417962020-07-08 12:27:50 -07001122 "src/f32-rmax/wasmsimd-arm.c",
1123 "src/f32-rmax/wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001124 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c",
1125 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001126 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c",
1127 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001128 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001129 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c",
1130 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001131 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c",
1132 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001133 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001134 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c",
1135 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001136 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c",
1137 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001138 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001139 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c",
1140 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001141 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c",
1142 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001143 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001144 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c",
1145 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001146 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c",
1147 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001148 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001149 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c",
1150 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001151 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c",
1152 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001153 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001154 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c",
1155 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001156 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c",
1157 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001158 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001159 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c",
1160 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001161 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c",
1162 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001163 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001164 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
1165 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001166 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001167 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
1168 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001169 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001170 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c",
1171 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001172 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001173 "src/f32-vbinary/gen/vadd-wasmsimd-x4.c",
1174 "src/f32-vbinary/gen/vadd-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001175 "src/f32-vbinary/gen/vadd-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001176 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
1177 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001178 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001179 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
1180 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001181 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001182 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c",
1183 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001184 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001185 "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c",
1186 "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001187 "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001188 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
1189 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001190 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001191 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
1192 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001193 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001194 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c",
1195 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001196 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001197 "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c",
1198 "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001199 "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001200 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
1201 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001202 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001203 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
1204 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001205 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001206 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c",
1207 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001208 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001209 "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c",
1210 "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001211 "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001212 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
1213 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001214 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001215 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
1216 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001217 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001218 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
1219 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001220 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001221 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
1222 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001223 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001224 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
1225 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001226 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001227 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
1228 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001229 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001230 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
1231 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001232 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001233 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
1234 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001235 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001236 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
1237 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001238 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001239 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
1240 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001241 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001242 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c",
1243 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001244 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001245 "src/f32-vbinary/gen/vmul-wasmsimd-x4.c",
1246 "src/f32-vbinary/gen/vmul-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001247 "src/f32-vbinary/gen/vmul-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001248 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
1249 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001250 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001251 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
1252 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001253 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001254 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c",
1255 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001256 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001257 "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c",
1258 "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001259 "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001260 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
1261 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001262 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001263 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
1264 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001265 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001266 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c",
1267 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001268 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001269 "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c",
1270 "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001271 "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001272 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
1273 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001274 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001275 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
1276 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001277 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001278 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c",
1279 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001280 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001281 "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c",
1282 "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001283 "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001284 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
1285 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001286 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001287 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
1288 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001289 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001290 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
1291 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001292 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001293 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
1294 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001295 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001296 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c",
1297 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001298 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001299 "src/f32-vbinary/gen/vsub-wasmsimd-x4.c",
1300 "src/f32-vbinary/gen/vsub-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001301 "src/f32-vbinary/gen/vsub-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001302 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
1303 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001304 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001305 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
1306 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001307 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001308 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c",
1309 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001310 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001311 "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c",
1312 "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001313 "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001314 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
1315 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c",
1316 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c",
1317 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001318 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
1319 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c",
1320 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c",
1321 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c",
1322 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c",
1323 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001324 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c",
1325 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c",
1326 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c",
1327 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c",
1328 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c",
1329 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08001330 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c",
1331 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c",
1332 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c",
1333 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c",
1334 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c",
1335 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001336 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c",
1337 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c",
1338 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c",
1339 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c",
1340 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c",
1341 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001342 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1343 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1344 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001345 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1346 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1347 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1348 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001349 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001350 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001351 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001352 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001353 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1354 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1355 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001356 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1357 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1358 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1359 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001360 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1361 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
1362 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1363 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1364 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1365 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
1366 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1367 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1368 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1369 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001370 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1371 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1372 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1373 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1374 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1375 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1376 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1377 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1378 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1379 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1380 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1381 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001382 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1383 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001384 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1385 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1386 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1387 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1388 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1389 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001390 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1391 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1393 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001394 "src/math/roundd-wasmsimd-addsub.c",
1395 "src/math/roundd-wasmsimd-cvt.c",
1396 "src/math/roundne-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-addsub.c",
1398 "src/math/roundu-wasmsimd-cvt.c",
1399 "src/math/roundz-wasmsimd-addsub.c",
1400 "src/math/roundz-wasmsimd-cvt.c",
1401 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1402 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001403 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
1404 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c",
1405 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
1406 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c",
1407 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
1408 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07001409 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
1410 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
1411 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001412 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
1413 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
1414 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001415 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1416 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1417 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-wasmsimd.c",
1418 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1419 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1420 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-wasmsimd.c",
1421 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1422 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1423 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
1424 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1425 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1426 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1427 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1428 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1429 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001430 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001431 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001432 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1433 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
1434 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
1435 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1436 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1437 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1438 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1439 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001440 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001441 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001442 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001443 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001444 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001445 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001446 "src/x32-zip/x2-wasmsimd.c",
1447 "src/x32-zip/x3-wasmsimd.c",
1448 "src/x32-zip/x4-wasmsimd.c",
1449 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001450]
1451
Marat Dukhan08c4a432019-10-03 09:29:21 -07001452# ISA-specific micro-kernels
1453NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001454 "src/f32-argmaxpool/4x-neon-c4.c",
1455 "src/f32-argmaxpool/9p8x-neon-c4.c",
1456 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001457 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1458 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001462 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001466 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001467 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001469 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001471 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001473 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1475 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1477 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001479 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1489 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1497 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1510 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001520 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001521 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001522 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1523 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1526 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1530 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1531 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1532 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1536 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001537 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1538 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001539 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1540 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1541 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1542 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1546 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1547 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1548 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1552 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1553 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1554 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001555 "src/f32-ibilinear-chw/gen/neon-p4.c",
1556 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001557 "src/f32-ibilinear/gen/neon-c4.c",
1558 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001560 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001562 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1563 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001565 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1567 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1568 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1570 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1572 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001573 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1574 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001575 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1577 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001578 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1579 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001580 "src/f32-prelu/gen/neon-1x4.c",
1581 "src/f32-prelu/gen/neon-1x8.c",
1582 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001583 "src/f32-prelu/gen/neon-2x4.c",
1584 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001585 "src/f32-prelu/gen/neon-2x16.c",
1586 "src/f32-prelu/gen/neon-4x4.c",
1587 "src/f32-prelu/gen/neon-4x8.c",
1588 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001600 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1612 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001613 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001614 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1616 "src/f32-spmm/gen/4x1-minmax-neon.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1619 "src/f32-spmm/gen/8x1-minmax-neon.c",
1620 "src/f32-spmm/gen/12x1-minmax-neon.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1623 "src/f32-spmm/gen/16x1-minmax-neon.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1626 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001627 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1628 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1630 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001631 "src/f32-vbinary/gen/vmax-neon-x4.c",
1632 "src/f32-vbinary/gen/vmax-neon-x8.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1634 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1635 "src/f32-vbinary/gen/vmin-neon-x4.c",
1636 "src/f32-vbinary/gen/vmin-neon-x8.c",
1637 "src/f32-vbinary/gen/vminc-neon-x4.c",
1638 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001639 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1640 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1642 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1644 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001645 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1646 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1648 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001649 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1650 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1652 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001653 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1654 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1660 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1666 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001667 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1669 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001670 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1671 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001672 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1673 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001674 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1675 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001676 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1677 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1679 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1681 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1683 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1701 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001702 "src/f32-vunary/gen/vabs-neon-x4.c",
1703 "src/f32-vunary/gen/vabs-neon-x8.c",
1704 "src/f32-vunary/gen/vneg-neon-x4.c",
1705 "src/f32-vunary/gen/vneg-neon-x8.c",
1706 "src/f32-vunary/gen/vsqr-neon-x4.c",
1707 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001708 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1709 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/math/roundd-neon-addsub.c",
1711 "src/math/roundd-neon-cvt.c",
1712 "src/math/roundne-neon-addsub.c",
1713 "src/math/roundu-neon-addsub.c",
1714 "src/math/roundu-neon-cvt.c",
1715 "src/math/roundz-neon-addsub.c",
1716 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001717 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1719 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1720 "src/math/sqrt-neon-nr1rsqrts.c",
1721 "src/math/sqrt-neon-nr2rsqrts.c",
1722 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001723 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1724 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
1725 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1726 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
1727 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1728 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
1729 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1730 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001731 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001732 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001733 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001734 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001735 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001736 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001737 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001738 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001739 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001740 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001741 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001742 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001743 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001744 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001745 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001746 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001747 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1748 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1749 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1750 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001751 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1752 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1753 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1754 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001755 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1756 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1757 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1758 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1759 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001760 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001761 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001762 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1763 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001764 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001765 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1766 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1767 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1768 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1769 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1770 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1771 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1772 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1773 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1774 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1775 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1776 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1777 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001778 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001779 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001780 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1781 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1782 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1783 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1784 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1785 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1786 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1787 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1788 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1789 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1790 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1791 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1792 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1793 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1794 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1795 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1796 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1797 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1798 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1799 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1800 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1801 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1802 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1803 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1804 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1805 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1806 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1807 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1808 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1809 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1810 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1811 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1812 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1813 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001814 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001815 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1816 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1817 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1818 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1819 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1820 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1821 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1822 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1823 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1824 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1825 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1826 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1827 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1828 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1829 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1830 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1831 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07001832 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001833 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001834 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1835 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001836 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001837 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1838 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1839 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1840 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1841 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1842 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1843 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1844 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1845 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1846 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1847 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1848 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1849 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07001850 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001851 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001852 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1853 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1854 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1855 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1856 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1857 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1858 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1859 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1860 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1861 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1862 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1863 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1864 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1865 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1866 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1867 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1868 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1869 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1870 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1871 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1872 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1873 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1874 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1875 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1876 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1877 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1878 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1879 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1880 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1881 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1882 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1883 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1884 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1885 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001886 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001887 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1888 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1889 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1890 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1891 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1892 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1893 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1894 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1895 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1896 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1897 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1898 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001899 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001900 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001901 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07001902 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001903 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1904 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1905 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1906 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1907 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1908 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1909 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1910 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001911 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1912 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1913 "src/qu8-dwconv/up8x9-minmax-neon.c",
1914 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1915 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1916 "src/qu8-gemm/4x8-minmax-neon.c",
1917 "src/qu8-gemm/8x8-minmax-neon.c",
1918 "src/qu8-igemm/4x8-minmax-neon.c",
1919 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001920 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001921 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001922 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001923 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001924 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001925 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001926 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001927 "src/x8-zip/x2-neon.c",
1928 "src/x8-zip/x3-neon.c",
1929 "src/x8-zip/x4-neon.c",
1930 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001931 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001932 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001933 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001934 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001935 "src/x32-zip/x2-neon.c",
1936 "src/x32-zip/x3-neon.c",
1937 "src/x32-zip/x4-neon.c",
1938 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001939]
1940
1941NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001942 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1943 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1944 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1945 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1946 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1947 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1948 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1949 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1950 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1951 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1952 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1953 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1954 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1955 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1956 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1957 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1958 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1959 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1960 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1961 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1962 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1963 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1964 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1965 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1966 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1967 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1968 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1969 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1970 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1971 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001972 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1973 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001974 "src/f32-ibilinear/gen/neonfma-c4.c",
1975 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001976 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001977 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001978 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001979 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1980 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001981 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1982 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001983 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1984 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001985 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1986 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001987 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001988 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001989 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001990 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1991 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001992 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001993 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1994 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001995 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001996 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1997 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001998 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1999 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2000 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2001 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2002 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2003 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2004 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2005 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2006 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2007 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2008 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2009 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2010 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002011 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2012 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2013 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2014 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2015 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2016 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2017 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2018 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2019 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2020 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2021 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2022 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2023 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002024 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2025 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2026 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2027 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2028 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2029 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2030 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2031 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2032 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2033 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2034 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2035 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002036 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2037 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2066 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2067 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2068 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2069 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2070 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2071 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2072 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2073 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2074 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2075 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2076 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2077 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2078 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2079 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2080 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2081 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2082 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2083 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2084 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2085 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2086 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2087 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2088 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2089 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2090 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2091 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002092 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2093 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2094 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2095 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2096 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2097 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2098 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2099 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2100 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2101 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2102 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2103 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2104 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2105 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2106 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2107 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2108 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2109 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2110 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2111 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002112 "src/math/exp-neonfma-rr2-lut64-p2.c",
2113 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002114 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2115 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002116 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2117 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2118 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002119 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2120 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2121 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002122 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2123 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2124 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002125 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2126 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2127 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002128 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2129 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2130 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002131 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2132 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2133 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002134 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2135 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2136 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002137 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002138 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002139 "src/math/sqrt-neonfma-nr2fma.c",
2140 "src/math/sqrt-neonfma-nr2fma1adj.c",
2141 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002142]
2143
2144AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002145 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002146 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002147 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002148 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002149 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002150 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002151 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002152 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002153 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002154 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2155 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
2156 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002157 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
2160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
2161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
2162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002164 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2165 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2166 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002167 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002172 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2173 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2174 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2175 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002185 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2196 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2197 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2198 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2199 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2200 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2201 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2202 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2203 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2204 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2205 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2206 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2207 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2208 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2209 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2210 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2211 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2212 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2213 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2214 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002215 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2216 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002217 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2218 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002219 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2220 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002221 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2222 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002223 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2224 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002225 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2226 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2227 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2228 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2229 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2230 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002231 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2232 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2233 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2234 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2235 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2236 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2237 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2238 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2239 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2240 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2241 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2242 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2243 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2244 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2245 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2246 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2247 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2248 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002249 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2250 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002251 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002252 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002253 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002254 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002255 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002256 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002257]
2258
Marat Dukhan8853b822020-05-07 12:19:01 -07002259NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002260 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2261 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002262 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2263 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2264 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2265 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2266 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2267 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002268 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002269 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002270 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002271 "src/math/roundz-neonv8.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002272 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2273 "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2274 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2275 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
2276 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2277 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2278 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2279 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002280 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2281 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2282 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2283 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2284 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2285 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2286 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2287 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
2288 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2289 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2290 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2291 "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
2292 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2293 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2294 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2295 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002296]
2297
Marat Dukhan08c4a432019-10-03 09:29:21 -07002298AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchard5a599a62020-06-04 20:12:44 -07002299 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
2300 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
2301 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2302 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002303 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2304 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2305 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2306 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2307 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2308 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2309 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2310 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002311 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2312 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002313 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
2314 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
2315 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2316 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2317 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2318 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
2319 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2320 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2321 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2322 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2323 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2324 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2325 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2326 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2327 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2328 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002329 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2330 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2331 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2332 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2333 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2334 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2335 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2336 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002337 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002338 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002339 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002340 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002341 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002342 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002343 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002344 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002345 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002346 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2347 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2348 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2349 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2350 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2351 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2352 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2353 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2354 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2355 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2356 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2357 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2358 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2359 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2360 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2361 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2362 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2363 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2364 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2365 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2366 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2367 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2368 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2369 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2370 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2371 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2372 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2373 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2374 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002375 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2376 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002377 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2378 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002379 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2380 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002381 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2382 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002383]
2384
Benoit Jacoba9644732020-08-13 12:48:55 -07002385NEONDOT_UKERNELS = [
Marat Dukhane76478b2021-06-28 16:35:40 -07002386 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2387 "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2388 "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2389 "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2390 "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2391 "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2392 "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2393 "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2394 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2395 "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2396 "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2397 "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2398 "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2399 "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2400 "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2401 "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002402 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2403 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002404 "src/qs8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2405 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002406 "src/qs8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2407 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002408 "src/qs8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2409 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002410 "src/qs8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2411 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002412 "src/qs8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2413 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002414 "src/qs8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2415 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002416 "src/qs8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2417 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002418 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2419 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002420 "src/qs8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2421 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002422 "src/qs8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2423 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002424 "src/qs8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2425 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002426 "src/qs8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2427 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002428 "src/qs8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2429 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002430 "src/qs8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2431 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002432 "src/qs8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
2433 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002434]
2435
Marat Dukhan08c4a432019-10-03 09:29:21 -07002436SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -07002437 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
2438 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07002439 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
2440 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002441 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
2442 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
2443 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
2444 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002445 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2446 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002447 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2448 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2449 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2450 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002451 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2452 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002453 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2454 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2455 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002456 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002457 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002458 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2459 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2460 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2461 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2462 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002463 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2464 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2465 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002466 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002467 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002468 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2469 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2470 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002471 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2472 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2473 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2474 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2475 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2476 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2477 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2478 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2479 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2480 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2481 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2482 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2483 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002484 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2485 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2486 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2487 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2488 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2489 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2490 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2491 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002492 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002493 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002494 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002495 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2496 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002497 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2498 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2499 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002500 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2501 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2502 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002503 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2504 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2505 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002506 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2507 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2508 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002509 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2510 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2511 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002512 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2513 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2514 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002515 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2516 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2517 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2518 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002519 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2520 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2521 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002522 "src/f32-ibilinear-chw/gen/sse-p4.c",
2523 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002524 "src/f32-ibilinear/gen/sse-c4.c",
2525 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002526 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2527 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2528 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002529 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2530 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2531 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002532 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2533 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2534 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2535 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002536 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2537 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2538 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002539 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2540 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2541 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002542 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002543 "src/f32-prelu/gen/sse-2x4.c",
2544 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002545 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002546 "src/f32-spmm/gen/4x1-minmax-sse.c",
2547 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002548 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002549 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002550 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2551 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2552 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2553 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2554 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2555 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2556 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2557 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002558 "src/f32-vbinary/gen/vmax-sse-x4.c",
2559 "src/f32-vbinary/gen/vmax-sse-x8.c",
2560 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2561 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2562 "src/f32-vbinary/gen/vmin-sse-x4.c",
2563 "src/f32-vbinary/gen/vmin-sse-x8.c",
2564 "src/f32-vbinary/gen/vminc-sse-x4.c",
2565 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002566 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2567 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2568 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2569 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2570 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2571 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2572 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2573 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002574 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2575 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2576 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2577 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002578 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2579 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2580 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2581 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002582 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2583 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002584 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2585 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002586 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2587 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002588 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2589 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002590 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2591 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002592 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2593 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002594 "src/f32-vunary/gen/vabs-sse-x4.c",
2595 "src/f32-vunary/gen/vabs-sse-x8.c",
2596 "src/f32-vunary/gen/vneg-sse-x4.c",
2597 "src/f32-vunary/gen/vneg-sse-x8.c",
2598 "src/f32-vunary/gen/vsqr-sse-x4.c",
2599 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002600 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002601 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002602 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002603 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002604 "src/math/sqrt-sse-hh1mac.c",
2605 "src/math/sqrt-sse-nr1mac.c",
2606 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002607 "src/x32-fill/sse.c",
2608 "src/x32-packx/x4-sse.c",
2609 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002610]
2611
2612SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002613 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002614 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002615 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002616 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2617 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2618 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2619 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2620 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2621 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2622 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2623 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2624 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2625 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2626 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2627 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002628 "src/f32-prelu/gen/sse2-2x4.c",
2629 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002630 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002631 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002632 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002633 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2634 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002635 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002636 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2637 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002638 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002639 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2640 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002641 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002642 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2643 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2644 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2645 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2646 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2647 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2648 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2649 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2650 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2651 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2652 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2653 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002654 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2655 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002656 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2657 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002658 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2659 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2660 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2661 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2662 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2663 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002664 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2665 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2666 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2667 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2668 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2669 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2670 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2671 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2672 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2673 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2674 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2675 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002676 "src/math/exp-sse2-rr2-lut64-p2.c",
2677 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002678 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002679 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002680 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002681 "src/math/roundd-sse2-cvt.c",
2682 "src/math/roundne-sse2-cvt.c",
2683 "src/math/roundu-sse2-cvt.c",
2684 "src/math/roundz-sse2-cvt.c",
2685 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2686 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2687 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2688 "src/math/sigmoid-sse2-rr2-p5-div.c",
2689 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2690 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002691 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2692 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2693 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2694 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2695 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2696 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002697 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002698 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002699 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002700 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002701 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002702 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002703 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002704 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002705 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002706 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002707 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002708 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002709 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002710 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002711 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002712 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002713 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002714 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002715 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002716 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002717 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002718 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002719 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002720 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002721 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002722 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002723 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002724 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002725 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2726 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002727 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2728 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2729 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2730 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2731 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2732 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2733 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2734 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2735 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
2736 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002737 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2738 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2739 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002740 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2741 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2742 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002743 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002744 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002745 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002746 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002747 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002748 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002749 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002750 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002751 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002752 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002753 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002754 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002755 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002756 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002757 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002758 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002759 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002760 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002761 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002762 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002763 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002764 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002765 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002766 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002767 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002768 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002769 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002770 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002771 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002772 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002773 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002774 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002775 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002776 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002777 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002778 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002779 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002780 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002781 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002782 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002783 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002784 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002785 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002786 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002787 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002788 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002789 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002790 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002791 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002792 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002793 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002794 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002795 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002796 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002797 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002798 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002799 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002800 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002801 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002802 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002803 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002804 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002805 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002806 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002807 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002808 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002809 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2810 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2811 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2812 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002813 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2814 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2815 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2816 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002817 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2818 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002819 "src/qu8-dwconv/up8x9-minmax-sse2.c",
2820 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2821 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
2822 "src/qu8-gemm/2x4c8-minmax-sse2.c",
2823 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002824 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002825 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002826 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002827 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002828 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002829 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002830 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002831 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002832 "src/x8-zip/x2-sse2.c",
2833 "src/x8-zip/x3-sse2.c",
2834 "src/x8-zip/x4-sse2.c",
2835 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002836 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002837 "src/x32-zip/x2-sse2.c",
2838 "src/x32-zip/x3-sse2.c",
2839 "src/x32-zip/x4-sse2.c",
2840 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07002841]
2842
2843SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07002844 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
2845 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c",
2846 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002847 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002848 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002849 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
2850 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c",
2851 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c",
2852 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
2853 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002854 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002855 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c",
2856 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
2857 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
2858 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
2859 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002860 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
2861 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
2862 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002863 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
2864 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c",
2865 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002866 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002867 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002868 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002869 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002870 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002871 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002872 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002873 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002874 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002875 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002876 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002877 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002878 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002879 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002880 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002881 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002882 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002883 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002884 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002885 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002886 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002887 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002888 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002889 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002890 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002891 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002892 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002893 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002894 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002895 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002896 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002897 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002898 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002899 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002900 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002901 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002902 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002903 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002904 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002905 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002906 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002907 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002908 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002909 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002910 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002911 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002912 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002913 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002914 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002915 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002916 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002917]
2918
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002919SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08002920 "src/f32-prelu/gen/sse41-2x4.c",
2921 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002922 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
2923 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
2924 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
2925 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
2926 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
2927 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
2928 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
2929 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
2930 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
2931 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
2932 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
2933 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002934 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
2935 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002936 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2937 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002938 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
2939 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
2940 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
2941 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
2942 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2943 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002944 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
2945 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
2946 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
2947 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2948 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2949 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2950 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
2951 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
2952 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2953 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2954 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2955 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002956 "src/math/roundd-sse41.c",
2957 "src/math/roundne-sse41.c",
2958 "src/math/roundu-sse41.c",
2959 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002960 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2961 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2962 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2963 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2964 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2965 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2966 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2967 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
2968 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2969 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2970 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2971 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002972 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002973 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002974 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002975 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002976 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002977 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002978 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002979 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002980 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002981 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002982 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002983 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002984 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002985 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002986 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002987 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002988 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002989 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002990 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002991 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002992 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002993 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002994 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002995 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002996 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002997 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002998 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002999 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003000 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3001 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3002 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
3003 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003004 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3005 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3006 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
3007 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3008 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3009 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3010 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3011 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3012 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3013 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3014 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3015 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3016 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3017 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3018 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
3019 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3020 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3021 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3022 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3023 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003024 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3025 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3026 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003027 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
3028 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
3029 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003030 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003031 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003032 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003033 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003034 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003035 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003036 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003037 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003038 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003039 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003040 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003041 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003042 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003043 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003044 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003045 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003046 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003047 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003048 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003049 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003050 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003051 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003052 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003053 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003054 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003055 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003056 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003057 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003058 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003059 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003060 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003061 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003062 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003063 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003064 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003065 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003066 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003067 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003068 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003069 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003070 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003071 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003072 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003073 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003074 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003075 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003076 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003077 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003078 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003079 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003080 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003081 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003082 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003083 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003084 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003085 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003086 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003087 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003088 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003089 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003090 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003091 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003092 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003093 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003094 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003095 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003096 "src/qs8-requantization/rndnu-sse4-sra.c",
3097 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003098 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3099 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3100 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3101 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003102 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3103 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3104 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3105 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003106 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3107 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3108 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3109 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003110 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3111 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3112 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3113 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003114 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003115 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003116]
3117
Marat Dukhan08c4a432019-10-03 09:29:21 -07003118AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003119 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3120 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003121 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3122 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003123 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3124 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003125 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3126 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3127 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3128 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3129 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3130 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003131 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003132 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3133 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003134 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003135 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003136 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003137 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003138 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3139 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3140 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3141 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3142 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3143 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3144 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3145 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3146 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3147 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3148 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003149 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003150 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3151 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003152 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003153 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003154 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003155 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003156 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3157 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003158 "src/f32-prelu/gen/avx-2x8.c",
3159 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003160 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003161 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3162 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3163 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3164 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3165 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3166 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3167 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3168 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003169 "src/f32-vbinary/gen/vmax-avx-x8.c",
3170 "src/f32-vbinary/gen/vmax-avx-x16.c",
3171 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3172 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3173 "src/f32-vbinary/gen/vmin-avx-x8.c",
3174 "src/f32-vbinary/gen/vmin-avx-x16.c",
3175 "src/f32-vbinary/gen/vminc-avx-x8.c",
3176 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003177 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3178 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3179 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3180 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3181 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3182 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3183 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3184 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003185 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3186 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3187 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3188 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003189 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3190 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3191 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3192 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003193 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3194 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003195 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3196 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3197 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3198 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3199 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3200 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3201 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3202 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3203 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3204 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3205 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3206 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3207 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3208 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3209 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3210 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3211 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3212 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003213 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3214 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003215 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3216 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003217 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3218 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003219 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3220 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003221 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3222 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3223 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3224 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3225 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3226 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003227 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003228 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3229 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3230 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3231 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3232 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3233 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3234 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3235 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3236 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3237 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3238 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3239 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3240 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3241 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3242 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3243 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3244 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3245 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3246 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3247 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003248 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3249 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003250 "src/f32-vunary/gen/vabs-avx-x8.c",
3251 "src/f32-vunary/gen/vabs-avx-x16.c",
3252 "src/f32-vunary/gen/vneg-avx-x8.c",
3253 "src/f32-vunary/gen/vneg-avx-x16.c",
3254 "src/f32-vunary/gen/vsqr-avx-x8.c",
3255 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003256 "src/math/exp-avx-rr2-p5.c",
3257 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3258 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3259 "src/math/expm1minus-avx-rr2-p6.c",
3260 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3261 "src/math/sigmoid-avx-rr2-p5-div.c",
3262 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3263 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003264 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3265 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3266 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3267 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3268 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3269 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3270 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3271 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3272 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3273 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3274 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3275 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003276 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003277 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003278 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003279 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003280 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003281 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003282 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003283 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003284 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003285 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003286 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003287 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003288 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003289 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003290 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003291 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003292 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003293 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003294 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003295 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003296 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003297 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003298 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003299 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003300 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003301 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003302 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003303 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003304 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3305 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3306 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3307 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003308 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3309 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3310 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3311 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3312 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3313 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3314 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3315 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3316 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3317 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3318 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3319 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3320 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3321 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3322 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3323 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3324 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3325 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3326 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3327 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003328 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003329 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003330 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003331 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003332 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003333 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003334 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003335 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003336 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003337 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003338 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003339 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003340 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003341 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003342 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003343 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003344 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003345 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003346 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003347 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003348 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003349 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003350 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003351 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003352 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003353 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003354 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003355 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003356 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003357 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003358 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003359 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003360 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003361 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003362 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003363 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003364 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003365 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003366 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003367 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003368 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003369 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003370 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003371 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003372 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003373 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003374 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003375 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003376 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003377 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003378 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003379 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003380 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003381 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003382 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003383 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003384 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003385 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003386 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003387 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003388 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003389 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003390 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003391 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3392 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3393 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3394 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3395 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3396 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3397 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3398 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3399 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3400 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3401 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3402 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3403 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3404 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3405 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3406 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003407]
3408
Marat Dukhan1566fee2020-08-02 21:55:41 -07003409XOP_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07003410 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3411 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3412 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3413 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3414 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3415 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003416 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003417 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003418 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003419 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003420 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003421 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003422 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003423 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003424 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003425 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003426 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003427 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003428 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003429 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003430 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003431 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003432 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003433 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003434 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003435 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003436 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003437 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003438 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003439 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003440 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003441 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003442 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003443 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003444 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3445 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003446 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3447 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3448 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3449 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3450 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3451 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3452 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3453 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3454 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3455 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003456 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003457 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003458 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003459 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003460 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003461 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003462 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003463 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003464 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003465 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003466 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003467 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003468 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003469 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003470 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003471 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003472 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003473 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003474 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003475 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003476 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003477 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003478 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003479 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003480 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003481 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003482 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003483 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003484 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003485 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003486 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003487 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003488 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003489 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003490 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003491 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003492 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003493 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003494 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003495 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003496 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003497 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003498 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003499 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003500 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003501 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003502 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003503 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003504 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003505 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003506 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003507 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003508 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003509 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003510 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003511 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003512 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003513 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003514 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003515 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003516 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003517 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003518 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003519 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3520 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3521 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3522 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3523 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3524 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3525 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3526 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003527]
3528
Marat Dukhanfda12b82019-11-21 12:27:59 -08003529FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003530 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
3531 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003532 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3533 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003534 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3535 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003536 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
3537 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
3538 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
3539 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
3540 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3541 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003542 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003543 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3544 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3545 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3546 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003547 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003548 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
3549 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003550 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003551 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
3552 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003553 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3554 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3555 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003556 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3557 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3558 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3559 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3560 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3561 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3562 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3563 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3564 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3565 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3566 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3567 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3568 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3569 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003570 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003571 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3572 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3573 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3574 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003575 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003576 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3577 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003578 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003579 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3580 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003581 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3582 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3583 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003584 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3585 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003586 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3587 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3588 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3589 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3590 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3591 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3592 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3593 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003594 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003595 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003596 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003597]
3598
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003599AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003600 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
3601 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003602 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003603 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003604 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003605 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
3606 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003607 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003608 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
3609 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
3610 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003611 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003612 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
3613 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003614 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003615 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003616 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003617 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3618 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003619 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003620 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3621 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3622 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003623 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003624 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3625 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003626 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003627 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003628 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003629 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3630 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003631 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003632 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3633 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3634 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003635 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003636 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3637 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3638 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3639 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3640 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3641 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3642 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3643 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3644 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3645 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3646 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3647 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3648 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3649 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3650 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3651 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3652 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3653 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3654 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3655 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3656 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3657 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3658 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3659 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3660 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3661 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3662 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3663 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3664 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3665 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3666 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3667 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3668 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3669 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3670 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3671 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3672 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3673 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3674 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3675 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003676 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3677 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3678 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3679 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3680 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3681 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3682 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3683 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3684 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3685 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3686 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3687 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3688 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3689 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3690 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3691 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3692 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3693 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3694 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3695 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3696 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3697 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3698 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3699 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003700 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3701 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3702 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3703 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3704 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3705 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3706 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3707 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3708 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3709 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3710 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3711 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3712 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3713 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3714 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3715 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3716 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3717 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3718 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3719 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3720 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3721 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3722 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3723 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3724 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3725 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3726 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3727 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3728 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3729 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003730 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3731 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3732 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003733 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3734 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3735 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3736 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003737 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003738 "src/math/extexp-avx2-p5.c",
3739 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3740 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3741 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3742 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3743 "src/math/sigmoid-avx2-rr1-p5-div.c",
3744 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3745 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3746 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3747 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3748 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3749 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3750 "src/math/sigmoid-avx2-rr2-p5-div.c",
3751 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3752 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07003753 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
3754 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
3755 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
3756 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
3757 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
3758 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
3759 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
3760 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
3761 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
3762 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
3763 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
3764 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003765 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3766 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3767 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3768 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3769 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3770 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07003771 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
3772 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
3773 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003774 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003775 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003776 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003777 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003778 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003779 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003780 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3781 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003782 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003783 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003784 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3785 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003786 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003787 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003788 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003789 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003790 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003791 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003792 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3793 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003794 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003795 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003796 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3797 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003798 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003799 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003800 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003801 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003802 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003803 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003804 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003805 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003806 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003807 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003808 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003809 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003810 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003811 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003812 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003813 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003814 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003815 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003816 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3817 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3818 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3819 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3820 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3821 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3822 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3823 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003824]
3825
Marat Dukhan08c4a432019-10-03 09:29:21 -07003826AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003827 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3828 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003829 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3830 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003831 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3832 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003833 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3834 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3835 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3836 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3837 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3838 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003839 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3840 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3841 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3842 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3843 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3844 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003845 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3846 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3847 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3848 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3849 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3850 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003851 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3852 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3853 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3854 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3855 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3856 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003857 "src/f32-prelu/gen/avx512f-2x16.c",
3858 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003859 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3860 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003861 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003862 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003863 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003864 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3865 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003866 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003867 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3868 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3869 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003870 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003871 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3872 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003873 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003874 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003875 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003876 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3877 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003878 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003879 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3880 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3881 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003882 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003883 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3884 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003885 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003886 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003887 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003888 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3889 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003890 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003891 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3892 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3893 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003894 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003895 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003896 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3897 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3898 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3899 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3900 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3901 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3902 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3903 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003904 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3905 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3906 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3907 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3908 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3909 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3910 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3911 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003912 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3913 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3914 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3915 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3916 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3917 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3918 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3919 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003920 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3921 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3922 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3923 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003924 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3925 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3926 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3927 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003928 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3929 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003930 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3931 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3932 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3933 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3934 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3935 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3936 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3937 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3938 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3939 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3940 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3941 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3942 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3943 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3944 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3945 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003946 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3947 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003948 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3949 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003950 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3951 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003952 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3953 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3954 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3955 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3956 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3957 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3958 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3959 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003960 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003961 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3962 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3963 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3964 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3965 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3966 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3967 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3968 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3969 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3970 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3971 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3972 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3973 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3974 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3975 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3976 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3977 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3978 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3979 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3980 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3981 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3982 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3983 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3984 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003985 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3986 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3987 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3988 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3989 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3990 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3991 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3992 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3993 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3994 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3995 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3996 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3997 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3998 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3999 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4000 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4001 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4002 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4003 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4004 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4005 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4006 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4007 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4008 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4009 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4010 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4011 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4012 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4013 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4014 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4015 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4016 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4017 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4018 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4019 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4020 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4021 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4022 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4023 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4024 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4025 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4026 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4027 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4028 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4029 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4030 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4031 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4032 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004033 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4034 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4035 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4036 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4037 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4038 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4039 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4040 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004041 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4042 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4043 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4044 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4045 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4046 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004047 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4048 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4049 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4050 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4051 "src/math/exp-avx512f-rr2-p5-scalef.c",
4052 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004053 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4054 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004055 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004056 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004057 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004058 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004059 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004060 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004061 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004062 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004063 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004064 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4065 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4066 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4067 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4068 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4069 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4070 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4071 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4072 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4073 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004074 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004075 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004076 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4077 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4078 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4079 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004080 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004081 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004082 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004083]
4084
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004085AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004086 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4087 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4088 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4089 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004090 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4091 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4092 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4093 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4094 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4095 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4096 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4097 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004098 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004099 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004100 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004101 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004102 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004103 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004104 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004105 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004106 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004107 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004108 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004109 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004110 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004111 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004112 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004113 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004114 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004115 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004116 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004117 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004118 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004119 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004120 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004121 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004122]
4123
Frank Barchardbcedc082020-08-17 18:00:51 -07004124WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004125 "src/f32-vrelu/wasm_shr_x1.S",
4126 "src/f32-vrelu/wasm_shr_x2.S",
4127 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004128]
4129
Marat Dukhan08c4a432019-10-03 09:29:21 -07004130AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004131 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004132 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004133 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4134 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004135 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004136 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004137 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004138 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004139 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4140 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004141 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4142 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4143 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4144 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004145]
4146
4147AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004148 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004149 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004150 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004151 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004152 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004153 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004154 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004155 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
4156 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004157 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
4158 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
4159 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
4160 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
4161 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004162 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004163 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004164 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
4165 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004166 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
4167 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004168 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004169 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004170 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004171 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004172 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004173 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4174 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004175 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004176 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004177 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004178 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004179 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004180 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004181 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004182 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4183 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004184 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004185 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004186 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004187 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004188 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004189 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004190 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
4191 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004192 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004193 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
4194 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4195 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004196 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4197 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
4198 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004199 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004200 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004201 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004202 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004203 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4204 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004205 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4206 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
4207 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
4208 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004209 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004210 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004211 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004212 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4213 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004214 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4215 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4216 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4217 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004218 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004219 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004220 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004221 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004222 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004223 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4224 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4225 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4226 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004227 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004228 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004229 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004230 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4231 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4232 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4233 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004234 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4235 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004236 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4237 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4238 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4239 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004240 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
4241 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004242 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4243 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004244 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4245 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4246 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004247 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004248 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4249 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4250 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4251 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
4252 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4253 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4254 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4255 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004256 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004257 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4258 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004259 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4260 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004261 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004262]
4263
Marat Dukhan1b354632020-03-23 12:50:22 -07004264INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004265 "src/xnnpack/argmaxpool.h",
4266 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004267 "src/xnnpack/common.h",
4268 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004269 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004270 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004271 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004272 "src/xnnpack/gavgpool.h",
4273 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004274 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004275 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004276 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004277 "src/xnnpack/lut.h",
4278 "src/xnnpack/math.h",
4279 "src/xnnpack/maxpool.h",
4280 "src/xnnpack/packx.h",
4281 "src/xnnpack/pad.h",
4282 "src/xnnpack/params.h",
4283 "src/xnnpack/pavgpool.h",
4284 "src/xnnpack/ppmm.h",
4285 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004286 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004287 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004288 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004289 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004290 "src/xnnpack/spmm.h",
4291 "src/xnnpack/unpool.h",
4292 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004293 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004294 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004295 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004296 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004297 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004298 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004299 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004300]
4301
4302INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004303 "include/xnnpack.h",
4304 "src/xnnpack/allocator.h",
4305 "src/xnnpack/compute.h",
4306 "src/xnnpack/im2col.h",
4307 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004308 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004309 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004310 "src/xnnpack/operator.h",
4311 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004312 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004313 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004314 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004315 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004316]
4317
Marat Dukhan1b354632020-03-23 12:50:22 -07004318ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004319 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004320]
4321
Marat Dukhan1b354632020-03-23 12:50:22 -07004322MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004323 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004324 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004325]
4326
Marat Dukhan1b354632020-03-23 12:50:22 -07004327MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004328 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004329 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004330 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004331 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004332]
4333
4334OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004335 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004336 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004337]
4338
4339WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004340 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004341 "src/xnnpack/operator.h",
4342 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004343]
4344
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004345LOGGING_COPTS = select({
4346 # No logging in optimized mode
4347 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4348 # Full logging in debug mode
4349 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4350 # Error-only logging in default (fastbuild) mode
4351 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4352})
4353
Marat Dukhan3b59de22020-06-03 20:15:19 -07004354LOGGING_SRCS = select({
4355 # No logging in optimized mode
4356 ":optimized_build": [],
4357 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004358 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004359 "src/operator-strings.c",
4360 "src/subgraph-strings.c",
4361 ],
4362})
4363
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004364LOGGING_HDRS = [
4365 "src/xnnpack/log.h",
4366]
4367
Marat Dukhan08c4a432019-10-03 09:29:21 -07004368xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004369 name = "tables",
4370 srcs = TABLE_SRCS,
4371 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004372 gcc_copts = xnnpack_gcc_std_copts(),
4373 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004374)
4375
4376xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004377 name = "scalar_ukernels",
4378 srcs = SCALAR_UKERNELS,
4379 hdrs = INTERNAL_HDRS,
4380 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004381 gcc_copts = xnnpack_gcc_std_copts(),
4382 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004383 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004384 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004385 "@FP16",
4386 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004387 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004388 ],
4389)
4390
4391xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004392 name = "scalar_ukernels_test_mode",
4393 srcs = SCALAR_UKERNELS,
4394 hdrs = INTERNAL_HDRS,
4395 aarch32_copts = ["-marm"],
4396 copts = [
4397 "-UNDEBUG",
4398 "-DXNN_TEST_MODE=1",
4399 ],
4400 gcc_copts = xnnpack_gcc_std_copts(),
4401 msvc_copts = xnnpack_msvc_std_copts(),
4402 deps = [
4403 ":tables",
4404 "@FP16",
4405 "@FXdiv",
4406 "@pthreadpool",
4407 ],
4408)
4409
4410xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004411 name = "wasm_ukernels",
4412 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004413 gcc_copts = xnnpack_gcc_std_copts(),
4414 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004415 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004416 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004417 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004418 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004419 "@FP16",
4420 "@FXdiv",
4421 "@pthreadpool",
4422 ],
4423)
4424
4425xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004426 name = "wasm_ukernels_test_mode",
4427 hdrs = INTERNAL_HDRS,
4428 copts = [
4429 "-UNDEBUG",
4430 "-DXNN_TEST_MODE=1",
4431 ],
4432 gcc_copts = xnnpack_gcc_std_copts(),
4433 msvc_copts = xnnpack_msvc_std_copts(),
4434 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004435 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004436 deps = [
4437 ":tables",
4438 "@FP16",
4439 "@FXdiv",
4440 "@pthreadpool",
4441 ],
4442)
4443
4444xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004445 name = "neon_ukernels",
4446 hdrs = INTERNAL_HDRS,
4447 aarch32_copts = [
4448 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004449 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004450 "-mfpu=neon",
4451 ],
4452 aarch32_srcs = NEON_UKERNELS,
4453 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004454 gcc_copts = xnnpack_gcc_std_copts(),
4455 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004456 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004457 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004458 "@FP16",
4459 "@pthreadpool",
4460 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004461)
4462
4463xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004464 name = "neon_ukernels_test_mode",
4465 hdrs = INTERNAL_HDRS,
4466 aarch32_copts = [
4467 "-marm",
4468 "-march=armv7-a",
4469 "-mfpu=neon",
4470 ],
4471 aarch32_srcs = NEON_UKERNELS,
4472 aarch64_srcs = NEON_UKERNELS,
4473 copts = [
4474 "-UNDEBUG",
4475 "-DXNN_TEST_MODE=1",
4476 ],
4477 gcc_copts = xnnpack_gcc_std_copts(),
4478 msvc_copts = xnnpack_msvc_std_copts(),
4479 deps = [
4480 ":tables",
4481 "@FP16",
4482 "@pthreadpool",
4483 ],
4484)
4485
4486xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004487 name = "neonfma_ukernels",
4488 hdrs = INTERNAL_HDRS,
4489 aarch32_copts = [
4490 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004491 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004492 "-mfpu=neon-vfpv4",
4493 ],
4494 aarch32_srcs = NEONFMA_UKERNELS,
4495 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004496 apple_aarch32_copts = [
4497 "-mcpu=swift",
4498 "-mtune=generic",
4499 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004500 gcc_copts = xnnpack_gcc_std_copts(),
4501 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004502 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004503 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004504 "@FP16",
4505 "@pthreadpool",
4506 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004507)
4508
4509xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004510 name = "neonfma_ukernels_test_mode",
4511 hdrs = INTERNAL_HDRS,
4512 aarch32_copts = [
4513 "-marm",
4514 "-march=armv7-a",
4515 "-mfpu=neon-vfpv4",
4516 ],
4517 aarch32_srcs = NEONFMA_UKERNELS,
4518 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004519 apple_aarch32_copts = [
4520 "-mcpu=swift",
4521 "-mtune=generic",
4522 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004523 copts = [
4524 "-UNDEBUG",
4525 "-DXNN_TEST_MODE=1",
4526 ],
4527 gcc_copts = xnnpack_gcc_std_copts(),
4528 msvc_copts = xnnpack_msvc_std_copts(),
4529 deps = [
4530 ":tables",
4531 "@FP16",
4532 "@pthreadpool",
4533 ],
4534)
4535
4536xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004537 name = "neonv8_ukernels",
4538 hdrs = INTERNAL_HDRS,
4539 aarch32_copts = [
4540 "-marm",
4541 "-march=armv8-a",
4542 "-mfpu=neon-fp-armv8",
4543 ],
4544 aarch32_srcs = NEONV8_UKERNELS,
4545 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004546 apple_aarch32_copts = [
4547 "-mcpu=cyclone",
4548 "-mtune=generic",
4549 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004550 gcc_copts = xnnpack_gcc_std_copts(),
4551 msvc_copts = xnnpack_msvc_std_copts(),
4552 deps = [
4553 ":tables",
4554 "@FP16",
4555 "@pthreadpool",
4556 ],
4557)
4558
4559xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004560 name = "neonv8_ukernels_test_mode",
4561 hdrs = INTERNAL_HDRS,
4562 aarch32_copts = [
4563 "-marm",
4564 "-march=armv8-a",
4565 "-mfpu=neon-fp-armv8",
4566 ],
4567 aarch32_srcs = NEONV8_UKERNELS,
4568 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004569 apple_aarch32_copts = [
4570 "-mcpu=cyclone",
4571 "-mtune=generic",
4572 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004573 copts = [
4574 "-UNDEBUG",
4575 "-DXNN_TEST_MODE=1",
4576 ],
4577 gcc_copts = xnnpack_gcc_std_copts(),
4578 msvc_copts = xnnpack_msvc_std_copts(),
4579 deps = [
4580 ":tables",
4581 "@FP16",
4582 "@pthreadpool",
4583 ],
4584)
4585
4586xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004587 name = "neonfp16arith_ukernels",
4588 hdrs = INTERNAL_HDRS,
4589 aarch64_copts = ["-march=armv8.2-a+fp16"],
4590 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004591 gcc_copts = xnnpack_gcc_std_copts(),
4592 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004593 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004594 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004595 "@FP16",
4596 "@pthreadpool",
4597 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004598)
4599
4600xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004601 name = "neonfp16arith_ukernels_test_mode",
4602 hdrs = INTERNAL_HDRS,
4603 aarch64_copts = ["-march=armv8.2-a+fp16"],
4604 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4605 copts = [
4606 "-UNDEBUG",
4607 "-DXNN_TEST_MODE=1",
4608 ],
4609 gcc_copts = xnnpack_gcc_std_copts(),
4610 msvc_copts = xnnpack_msvc_std_copts(),
4611 deps = [
4612 ":tables",
4613 "@FP16",
4614 "@pthreadpool",
4615 ],
4616)
4617
4618xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004619 name = "neondot_ukernels",
4620 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004621 aarch32_copts = [
4622 "-marm",
4623 "-march=armv8.2-a+dotprod",
4624 "-mfpu=neon-fp-armv8",
4625 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004626 aarch32_srcs = NEONDOT_UKERNELS,
4627 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4628 aarch64_srcs = NEONDOT_UKERNELS,
4629 gcc_copts = xnnpack_gcc_std_copts(),
4630 msvc_copts = xnnpack_msvc_std_copts(),
4631 deps = [
4632 ":tables",
4633 "@FP16",
4634 "@pthreadpool",
4635 ],
4636)
4637
4638xnnpack_cc_library(
4639 name = "neondot_ukernels_test_mode",
4640 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004641 aarch32_copts = [
4642 "-marm",
4643 "-march=armv8.2-a+dotprod",
4644 "-mfpu=neon-fp-armv8",
4645 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004646 aarch32_srcs = NEONDOT_UKERNELS,
4647 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4648 aarch64_srcs = NEONDOT_UKERNELS,
4649 copts = [
4650 "-UNDEBUG",
4651 "-DXNN_TEST_MODE=1",
4652 ],
4653 gcc_copts = xnnpack_gcc_std_copts(),
4654 msvc_copts = xnnpack_msvc_std_copts(),
4655 deps = [
4656 ":tables",
4657 "@FP16",
4658 "@pthreadpool",
4659 ],
4660)
4661
4662xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004663 name = "sse2_ukernels",
4664 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004665 gcc_copts = xnnpack_gcc_std_copts(),
4666 gcc_x86_copts = ["-msse2"],
4667 msvc_copts = xnnpack_msvc_std_copts(),
4668 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004669 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004670 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004671 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004672 "@FP16",
4673 "@pthreadpool",
4674 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004675)
4676
4677xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004678 name = "sse2_ukernels_test_mode",
4679 hdrs = INTERNAL_HDRS,
4680 copts = [
4681 "-UNDEBUG",
4682 "-DXNN_TEST_MODE=1",
4683 ],
4684 gcc_copts = xnnpack_gcc_std_copts(),
4685 gcc_x86_copts = ["-msse2"],
4686 msvc_copts = xnnpack_msvc_std_copts(),
4687 msvc_x86_32_copts = ["/arch:SSE2"],
4688 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4689 deps = [
4690 ":tables",
4691 "@FP16",
4692 "@pthreadpool",
4693 ],
4694)
4695
4696xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004697 name = "ssse3_ukernels",
4698 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004699 gcc_copts = xnnpack_gcc_std_copts(),
4700 gcc_x86_copts = ["-mssse3"],
4701 msvc_copts = xnnpack_msvc_std_copts(),
4702 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004703 x86_srcs = SSSE3_UKERNELS,
4704 deps = [
4705 ":tables",
4706 "@FP16",
4707 "@pthreadpool",
4708 ],
4709)
4710
4711xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004712 name = "ssse3_ukernels_test_mode",
4713 hdrs = INTERNAL_HDRS,
4714 copts = [
4715 "-UNDEBUG",
4716 "-DXNN_TEST_MODE=1",
4717 ],
4718 gcc_copts = xnnpack_gcc_std_copts(),
4719 gcc_x86_copts = ["-mssse3"],
4720 msvc_copts = xnnpack_msvc_std_copts(),
4721 msvc_x86_32_copts = ["/arch:SSE2"],
4722 x86_srcs = SSSE3_UKERNELS,
4723 deps = [
4724 ":tables",
4725 "@FP16",
4726 "@pthreadpool",
4727 ],
4728)
4729
4730xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004731 name = "sse41_ukernels",
4732 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004733 gcc_copts = xnnpack_gcc_std_copts(),
4734 gcc_x86_copts = ["-msse4.1"],
4735 msvc_copts = xnnpack_msvc_std_copts(),
4736 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004737 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004738 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004739 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004740 "@FP16",
4741 "@pthreadpool",
4742 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004743)
4744
4745xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004746 name = "sse41_ukernels_test_mode",
4747 hdrs = INTERNAL_HDRS,
4748 copts = [
4749 "-UNDEBUG",
4750 "-DXNN_TEST_MODE=1",
4751 ],
4752 gcc_copts = xnnpack_gcc_std_copts(),
4753 gcc_x86_copts = ["-msse4.1"],
4754 msvc_copts = xnnpack_msvc_std_copts(),
4755 msvc_x86_32_copts = ["/arch:SSE2"],
4756 x86_srcs = SSE41_UKERNELS,
4757 deps = [
4758 ":tables",
4759 "@FP16",
4760 "@pthreadpool",
4761 ],
4762)
4763
4764xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004765 name = "avx_ukernels",
4766 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004767 gcc_copts = xnnpack_gcc_std_copts(),
4768 gcc_x86_copts = ["-mavx"],
4769 msvc_copts = xnnpack_msvc_std_copts(),
4770 msvc_x86_32_copts = ["/arch:AVX"],
4771 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004772 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004773 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004774 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004775 "@FP16",
4776 "@pthreadpool",
4777 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004778)
4779
4780xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004781 name = "avx_ukernels_test_mode",
4782 hdrs = INTERNAL_HDRS,
4783 copts = [
4784 "-UNDEBUG",
4785 "-DXNN_TEST_MODE=1",
4786 ],
4787 gcc_copts = xnnpack_gcc_std_copts(),
4788 gcc_x86_copts = ["-mavx"],
4789 msvc_copts = xnnpack_msvc_std_copts(),
4790 msvc_x86_32_copts = ["/arch:AVX"],
4791 msvc_x86_64_copts = ["/arch:AVX"],
4792 x86_srcs = AVX_UKERNELS,
4793 deps = [
4794 ":tables",
4795 "@FP16",
4796 "@pthreadpool",
4797 ],
4798)
4799
4800xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004801 name = "xop_ukernels",
4802 hdrs = INTERNAL_HDRS,
4803 gcc_copts = xnnpack_gcc_std_copts(),
4804 gcc_x86_copts = ["-mxop"],
4805 msvc_copts = xnnpack_msvc_std_copts(),
4806 msvc_x86_32_copts = ["/arch:AVX"],
4807 msvc_x86_64_copts = ["/arch:AVX"],
4808 x86_srcs = XOP_UKERNELS,
4809 deps = [
4810 ":tables",
4811 "@FP16",
4812 "@pthreadpool",
4813 ],
4814)
4815
4816xnnpack_cc_library(
4817 name = "xop_ukernels_test_mode",
4818 hdrs = INTERNAL_HDRS,
4819 copts = [
4820 "-UNDEBUG",
4821 "-DXNN_TEST_MODE=1",
4822 ],
4823 gcc_copts = xnnpack_gcc_std_copts(),
4824 gcc_x86_copts = ["-mxop"],
4825 msvc_copts = xnnpack_msvc_std_copts(),
4826 msvc_x86_32_copts = ["/arch:AVX"],
4827 msvc_x86_64_copts = ["/arch:AVX"],
4828 x86_srcs = XOP_UKERNELS,
4829 deps = [
4830 ":tables",
4831 "@FP16",
4832 "@pthreadpool",
4833 ],
4834)
4835
4836xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004837 name = "fma3_ukernels",
4838 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004839 gcc_copts = xnnpack_gcc_std_copts(),
4840 gcc_x86_copts = ["-mfma"],
4841 msvc_copts = xnnpack_msvc_std_copts(),
4842 msvc_x86_32_copts = ["/arch:AVX"],
4843 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004844 x86_srcs = FMA3_UKERNELS,
4845 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004846 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004847 "@FP16",
4848 "@pthreadpool",
4849 ],
4850)
4851
4852xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004853 name = "fma3_ukernels_test_mode",
4854 hdrs = INTERNAL_HDRS,
4855 copts = [
4856 "-UNDEBUG",
4857 "-DXNN_TEST_MODE=1",
4858 ],
4859 gcc_copts = xnnpack_gcc_std_copts(),
4860 gcc_x86_copts = ["-mfma"],
4861 msvc_copts = xnnpack_msvc_std_copts(),
4862 msvc_x86_32_copts = ["/arch:AVX"],
4863 msvc_x86_64_copts = ["/arch:AVX"],
4864 x86_srcs = FMA3_UKERNELS,
4865 deps = [
4866 ":tables",
4867 "@FP16",
4868 "@pthreadpool",
4869 ],
4870)
4871
4872xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004873 name = "avx2_ukernels",
4874 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004875 gcc_copts = xnnpack_gcc_std_copts(),
4876 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004877 "-mfma",
4878 "-mavx2",
4879 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004880 msvc_copts = xnnpack_msvc_std_copts(),
4881 msvc_x86_32_copts = ["/arch:AVX2"],
4882 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004883 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004884 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004885 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004886 "@FP16",
4887 "@pthreadpool",
4888 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004889)
4890
4891xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004892 name = "avx2_ukernels_test_mode",
4893 hdrs = INTERNAL_HDRS,
4894 copts = [
4895 "-UNDEBUG",
4896 "-DXNN_TEST_MODE=1",
4897 ],
4898 gcc_copts = xnnpack_gcc_std_copts(),
4899 gcc_x86_copts = [
4900 "-mfma",
4901 "-mavx2",
4902 ],
4903 msvc_copts = xnnpack_msvc_std_copts(),
4904 msvc_x86_32_copts = ["/arch:AVX2"],
4905 msvc_x86_64_copts = ["/arch:AVX2"],
4906 x86_srcs = AVX2_UKERNELS,
4907 deps = [
4908 ":tables",
4909 "@FP16",
4910 "@pthreadpool",
4911 ],
4912)
4913
4914xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004915 name = "avx512f_ukernels",
4916 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004917 gcc_copts = xnnpack_gcc_std_copts(),
4918 gcc_x86_copts = ["-mavx512f"],
4919 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4920 msvc_copts = xnnpack_msvc_std_copts(),
4921 msvc_x86_32_copts = ["/arch:AVX512"],
4922 msvc_x86_64_copts = ["/arch:AVX512"],
4923 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004924 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004925 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004926 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004927 "@FP16",
4928 "@pthreadpool",
4929 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004930)
4931
4932xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004933 name = "avx512f_ukernels_test_mode",
4934 hdrs = INTERNAL_HDRS,
4935 copts = [
4936 "-UNDEBUG",
4937 "-DXNN_TEST_MODE=1",
4938 ],
4939 gcc_copts = xnnpack_gcc_std_copts(),
4940 gcc_x86_copts = ["-mavx512f"],
4941 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4942 msvc_copts = xnnpack_msvc_std_copts(),
4943 msvc_x86_32_copts = ["/arch:AVX512"],
4944 msvc_x86_64_copts = ["/arch:AVX512"],
4945 msys_copts = ["-fno-asynchronous-unwind-tables"],
4946 x86_srcs = AVX512F_UKERNELS,
4947 deps = [
4948 ":tables",
4949 "@FP16",
4950 "@pthreadpool",
4951 ],
4952)
4953
4954xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004955 name = "avx512skx_ukernels",
4956 hdrs = INTERNAL_HDRS,
4957 gcc_copts = xnnpack_gcc_std_copts(),
4958 gcc_x86_copts = [
4959 "-mavx512f",
4960 "-mavx512cd",
4961 "-mavx512bw",
4962 "-mavx512dq",
4963 "-mavx512vl",
4964 ],
4965 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4966 msvc_copts = xnnpack_msvc_std_copts(),
4967 msvc_x86_32_copts = ["/arch:AVX512"],
4968 msvc_x86_64_copts = ["/arch:AVX512"],
4969 msys_copts = ["-fno-asynchronous-unwind-tables"],
4970 x86_srcs = AVX512SKX_UKERNELS,
4971 deps = [
4972 ":tables",
4973 "@FP16",
4974 "@pthreadpool",
4975 ],
4976)
4977
4978xnnpack_cc_library(
4979 name = "avx512skx_ukernels_test_mode",
4980 hdrs = INTERNAL_HDRS,
4981 copts = [
4982 "-UNDEBUG",
4983 "-DXNN_TEST_MODE=1",
4984 ],
4985 gcc_copts = xnnpack_gcc_std_copts(),
4986 gcc_x86_copts = [
4987 "-mavx512f",
4988 "-mavx512cd",
4989 "-mavx512bw",
4990 "-mavx512dq",
4991 "-mavx512vl",
4992 ],
4993 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4994 msvc_copts = xnnpack_msvc_std_copts(),
4995 msvc_x86_32_copts = ["/arch:AVX512"],
4996 msvc_x86_64_copts = ["/arch:AVX512"],
4997 msys_copts = ["-fno-asynchronous-unwind-tables"],
4998 x86_srcs = AVX512SKX_UKERNELS,
4999 deps = [
5000 ":tables",
5001 "@FP16",
5002 "@pthreadpool",
5003 ],
5004)
5005
5006xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005007 name = "asm_ukernels",
5008 hdrs = ["src/xnnpack/assembly.h"],
5009 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005010 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005011 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005012 wasm_srcs = WASM32_ASM_UKERNELS,
5013 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005014)
5015
Marat Dukhan3b59de22020-06-03 20:15:19 -07005016xnnpack_cc_library(
5017 name = "logging_utils",
5018 srcs = LOGGING_SRCS,
5019 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5020 copts = LOGGING_COPTS + [
5021 "-Isrc",
5022 "-Iinclude",
5023 ] + select({
5024 ":debug_build": [],
5025 "//conditions:default": xnnpack_min_size_copts(),
5026 }),
5027 gcc_copts = xnnpack_gcc_std_copts(),
5028 msvc_copts = xnnpack_msvc_std_copts(),
5029 visibility = xnnpack_visibility(),
5030 deps = [
5031 "@FP16",
5032 "@clog",
5033 "@pthreadpool",
5034 ],
5035)
5036
Marat Dukhan08c4a432019-10-03 09:29:21 -07005037xnnpack_aggregate_library(
5038 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005039 aarch32_ios_deps = [
5040 ":neon_ukernels",
5041 ":neonfma_ukernels",
5042 ":neonv8_ukernels",
5043 ":asm_ukernels",
5044 ],
5045 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005046 ":neon_ukernels",
5047 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005048 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005049 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005050 ":asm_ukernels",
5051 ],
5052 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005053 ":neon_ukernels",
5054 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005055 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005056 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005057 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005058 ":asm_ukernels",
5059 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005060 generic_deps = [
5061 ":scalar_ukernels",
5062 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005063 wasm_deps = [
5064 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005065 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005066 ],
5067 wasmsimd_deps = [
5068 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005069 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005070 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005071 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005072 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005073 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005074 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005075 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005076 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005077 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005078 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005079 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005080 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005081 ],
5082)
5083
Marat Dukhan33fcf782020-05-24 14:27:15 -07005084xnnpack_aggregate_library(
5085 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005086 aarch32_ios_deps = [
5087 ":neon_ukernels_test_mode",
5088 ":neonfma_ukernels_test_mode",
5089 ":neonv8_ukernels_test_mode",
5090 ":asm_ukernels",
5091 ],
5092 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005093 ":neon_ukernels_test_mode",
5094 ":neonfma_ukernels_test_mode",
5095 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005096 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005097 ":asm_ukernels",
5098 ],
5099 aarch64_deps = [
5100 ":neon_ukernels_test_mode",
5101 ":neonfma_ukernels_test_mode",
5102 ":neonv8_ukernels_test_mode",
5103 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005104 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005105 ":asm_ukernels",
5106 ],
5107 generic_deps = [
5108 ":scalar_ukernels_test_mode",
5109 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005110 wasm_deps = [
5111 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005112 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005113 ],
5114 wasmsimd_deps = [
5115 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005116 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005117 ],
5118 x86_deps = [
5119 ":sse2_ukernels_test_mode",
5120 ":ssse3_ukernels_test_mode",
5121 ":sse41_ukernels_test_mode",
5122 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005123 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005124 ":fma3_ukernels_test_mode",
5125 ":avx2_ukernels_test_mode",
5126 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005127 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005128 ],
5129)
5130
Marat Dukhan08c4a432019-10-03 09:29:21 -07005131xnnpack_cc_library(
5132 name = "im2col",
5133 srcs = ["src/im2col.c"],
5134 hdrs = [
5135 "src/xnnpack/common.h",
5136 "src/xnnpack/im2col.h",
5137 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005138 gcc_copts = xnnpack_gcc_std_copts(),
5139 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005140)
5141
5142xnnpack_cc_library(
5143 name = "indirection",
5144 srcs = ["src/indirection.c"],
5145 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005146 gcc_copts = xnnpack_gcc_std_copts(),
5147 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005148 deps = [
5149 "@FP16",
5150 "@FXdiv",
5151 "@pthreadpool",
5152 ],
5153)
5154
5155xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005156 name = "indirection_test_mode",
5157 srcs = ["src/indirection.c"],
5158 hdrs = INTERNAL_HDRS,
5159 copts = [
5160 "-UNDEBUG",
5161 "-DXNN_TEST_MODE=1",
5162 ],
5163 gcc_copts = xnnpack_gcc_std_copts(),
5164 msvc_copts = xnnpack_msvc_std_copts(),
5165 deps = [
5166 "@FP16",
5167 "@FXdiv",
5168 "@pthreadpool",
5169 ],
5170)
5171
5172xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005173 name = "packing",
5174 srcs = ["src/packing.c"],
5175 hdrs = INTERNAL_HDRS,
5176 gcc_copts = xnnpack_gcc_std_copts(),
5177 msvc_copts = xnnpack_msvc_std_copts(),
5178 deps = [
5179 "@FP16",
5180 "@FXdiv",
5181 "@pthreadpool",
5182 ],
5183)
5184
5185xnnpack_cc_library(
5186 name = "packing_test_mode",
5187 srcs = ["src/packing.c"],
5188 hdrs = INTERNAL_HDRS,
5189 copts = [
5190 "-UNDEBUG",
5191 "-DXNN_TEST_MODE=1",
5192 ],
5193 gcc_copts = xnnpack_gcc_std_copts(),
5194 msvc_copts = xnnpack_msvc_std_copts(),
5195 deps = [
5196 "@FP16",
5197 "@FXdiv",
5198 "@pthreadpool",
5199 ],
5200)
5201
5202xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005203 name = "operator_run",
5204 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005205 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005206 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005207 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5208 "//conditions:default": [],
5209 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005210 gcc_copts = xnnpack_gcc_std_copts(),
5211 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005212 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005213 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005214 "@FP16",
5215 "@FXdiv",
5216 "@clog",
5217 "@pthreadpool",
5218 ],
5219)
5220
Chao Mei6ddfc602020-05-13 22:29:36 -07005221xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005222 name = "operator_run_test_mode",
5223 srcs = ["src/operator-run.c"],
5224 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5225 copts = LOGGING_COPTS + [
5226 "-UNDEBUG",
5227 "-DXNN_TEST_MODE=1",
5228 ] + select({
5229 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5230 "//conditions:default": [],
5231 }),
5232 gcc_copts = xnnpack_gcc_std_copts(),
5233 msvc_copts = xnnpack_msvc_std_copts(),
5234 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005235 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005236 "@FP16",
5237 "@FXdiv",
5238 "@clog",
5239 "@pthreadpool",
5240 ],
5241)
5242
5243xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005244 name = "memory_planner",
5245 srcs = ["src/memory-planner.c"],
5246 hdrs = INTERNAL_HDRS,
5247 defines = select({
5248 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5249 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5250 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5251 }),
5252 gcc_copts = xnnpack_gcc_std_copts(),
5253 msvc_copts = xnnpack_msvc_std_copts(),
5254 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005255 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005256 "@pthreadpool",
5257 ],
5258)
5259
Marat Dukhan33fcf782020-05-24 14:27:15 -07005260xnnpack_cc_library(
5261 name = "memory_planner_test_mode",
5262 srcs = ["src/memory-planner.c"],
5263 hdrs = INTERNAL_HDRS,
5264 copts = [
5265 "-UNDEBUG",
5266 "-DXNN_TEST_MODE=1",
5267 ],
5268 defines = select({
5269 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5270 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5271 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5272 }),
5273 gcc_copts = xnnpack_gcc_std_copts(),
5274 msvc_copts = xnnpack_msvc_std_copts(),
5275 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005276 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005277 "@pthreadpool",
5278 ],
5279)
5280
Marat Dukhan08c4a432019-10-03 09:29:21 -07005281cc_library(
5282 name = "enable_assembly",
5283 defines = select({
5284 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5285 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005286 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005287 }),
5288)
5289
Marat Dukhan9de90e02020-06-18 16:04:12 -07005290cc_library(
5291 name = "enable_sparse",
5292 defines = select({
5293 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5294 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005295 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005296 }),
5297)
5298
Marat Dukhancf056b22019-10-07 10:26:29 -07005299xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005300 name = "operators",
5301 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005302 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005303 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005304 ],
5305 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005306 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005307 "-Isrc",
5308 "-Iinclude",
5309 ] + select({
5310 ":debug_build": [],
5311 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005312 }) + select({
5313 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5314 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005315 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005316 gcc_copts = xnnpack_gcc_std_copts(),
5317 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005318 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005319 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005320 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005321 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005322 "@FP16",
5323 "@FXdiv",
5324 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005325 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005326 ],
5327)
5328
Marat Dukhan10a38082020-04-17 03:58:35 -07005329xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005330 name = "operators_test_mode",
5331 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005332 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005333 "src/operator-delete.c",
5334 ],
5335 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5336 copts = LOGGING_COPTS + [
5337 "-Isrc",
5338 "-Iinclude",
5339 "-UNDEBUG",
5340 "-DXNN_TEST_MODE=1",
5341 ] + select({
5342 ":debug_build": [],
5343 "//conditions:default": xnnpack_min_size_copts(),
5344 }) + select({
5345 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5346 "//conditions:default": [],
5347 }),
5348 gcc_copts = xnnpack_gcc_std_copts(),
5349 msvc_copts = xnnpack_msvc_std_copts(),
5350 deps = [
5351 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005352 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005353 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005354 "@FP16",
5355 "@FXdiv",
5356 "@clog",
5357 "@pthreadpool",
5358 ],
5359)
5360
5361xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005362 name = "XNNPACK",
5363 srcs = [
5364 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005365 "src/runtime.c",
5366 "src/subgraph.c",
5367 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005368 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005369 hdrs = ["include/xnnpack.h"],
5370 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005371 "-Isrc",
5372 "-Iinclude",
5373 ] + select({
5374 ":debug_build": [],
5375 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005376 }) + select({
5377 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5378 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005379 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005380 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005381 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005382 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005383 visibility = xnnpack_visibility(),
5384 deps = [
5385 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005386 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005387 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005388 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005389 ":operator_run",
5390 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005391 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005392 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005393 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005394 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005395 ] + select({
5396 ":emscripten": [],
5397 "//conditions:default": ["@cpuinfo"],
5398 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005399)
5400
Marat Dukhan10a38082020-04-17 03:58:35 -07005401xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005402 name = "XNNPACK_test_mode",
5403 srcs = [
5404 "src/init.c",
5405 "src/runtime.c",
5406 "src/subgraph.c",
5407 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005408 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005409 hdrs = ["include/xnnpack.h"],
5410 copts = LOGGING_COPTS + [
5411 "-Isrc",
5412 "-Iinclude",
5413 "-UNDEBUG",
5414 "-DXNN_TEST_MODE=1",
5415 ] + select({
5416 ":debug_build": [],
5417 "//conditions:default": xnnpack_min_size_copts(),
5418 }) + select({
5419 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5420 "//conditions:default": [],
5421 }),
5422 gcc_copts = xnnpack_gcc_std_copts(),
5423 includes = ["include"],
5424 msvc_copts = xnnpack_msvc_std_copts(),
5425 visibility = xnnpack_visibility(),
5426 deps = [
5427 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005428 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005429 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005430 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005431 ":operator_run_test_mode",
5432 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005433 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005434 "@clog",
5435 "@FP16",
5436 "@pthreadpool",
5437 ] + select({
5438 ":emscripten": [],
5439 "//conditions:default": ["@cpuinfo"],
5440 }),
5441)
5442
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005443# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5444# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005445xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005446 name = "xnnpack_for_tflite",
5447 srcs = [
5448 "src/init.c",
5449 "src/runtime.c",
5450 "src/subgraph.c",
5451 "src/tensor.c",
5452 ] + SUBGRAPH_SRCS,
5453 hdrs = ["include/xnnpack.h"],
5454 copts = LOGGING_COPTS + [
5455 "-Isrc",
5456 "-Iinclude",
5457 ] + select({
5458 ":debug_build": [],
5459 "//conditions:default": xnnpack_min_size_copts(),
5460 }) + select({
5461 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5462 "//conditions:default": [],
5463 }),
5464 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005465 "XNN_NO_QU8_OPERATORS",
5466 "XNN_NO_U8_OPERATORS",
5467 "XNN_NO_X8_OPERATORS",
5468 "XNN_NO_F16_OPERATORS",
5469 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005470 ] + select({
5471 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005472 ":xnn_enable_qs8_explicit_false": [
5473 "XNN_NO_QC8_OPERATORS",
5474 "XNN_NO_QS8_OPERATORS",
5475 ],
5476 "//conditions:default": [
5477 "XNN_NO_QC8_OPERATORS",
5478 "XNN_NO_QS8_OPERATORS",
5479 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005480 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005481 gcc_copts = xnnpack_gcc_std_copts(),
5482 includes = ["include"],
5483 msvc_copts = xnnpack_msvc_std_copts(),
5484 visibility = xnnpack_visibility(),
5485 deps = [
5486 ":enable_assembly",
5487 ":enable_sparse",
5488 ":logging_utils",
5489 ":memory_planner",
5490 ":operator_run",
5491 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005492 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005493 "@clog",
5494 "@FP16",
5495 "@pthreadpool",
5496 ] + select({
5497 ":emscripten": [],
5498 "//conditions:default": ["@cpuinfo"],
5499 }),
5500)
5501
5502# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5503# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5504xnnpack_cc_library(
5505 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005506 srcs = [
5507 "src/init.c",
5508 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005509 hdrs = ["include/xnnpack.h"],
5510 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005511 "-Isrc",
5512 "-Iinclude",
5513 ] + select({
5514 ":debug_build": [],
5515 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005516 }) + select({
5517 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5518 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005519 }),
5520 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005521 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005522 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005523 "XNN_NO_U8_OPERATORS",
5524 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005525 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005526 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005527 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005528 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005529 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005530 visibility = xnnpack_visibility(),
5531 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005532 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005533 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005534 ":operator_run",
5535 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005536 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005537 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005538 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005539 ] + select({
5540 ":emscripten": [],
5541 "//conditions:default": ["@cpuinfo"],
5542 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005543)
5544
Marat Dukhancf056b22019-10-07 10:26:29 -07005545xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005546 name = "bench_utils",
5547 srcs = ["bench/utils.cc"],
5548 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005549 deps = [
5550 "@com_google_benchmark//:benchmark",
5551 "@cpuinfo",
5552 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005553)
5554
Frank Barchard7e955972019-10-11 10:34:25 -07005555######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005556
5557xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005558 name = "qs8_gemm_bench",
5559 srcs = [
5560 "bench/gemm.h",
5561 "bench/qs8-gemm.cc",
5562 "src/xnnpack/AlignedAllocator.h",
5563 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005564 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5565 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005566)
5567
5568xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005569 name = "qs8_requantization_bench",
5570 srcs = [
5571 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005572 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005573 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005574 ] + MICROKERNEL_BENCHMARK_HDRS,
5575 deps = MICROKERNEL_BENCHMARK_DEPS,
5576)
5577
5578xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005579 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005580 srcs = [
5581 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005582 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005583 "src/xnnpack/AlignedAllocator.h",
5584 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005585 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005586 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005587)
5588
5589xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005590 name = "qu8_requantization_bench",
5591 srcs = [
5592 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005593 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005594 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005595 ] + MICROKERNEL_BENCHMARK_HDRS,
5596 deps = MICROKERNEL_BENCHMARK_DEPS,
5597)
5598
5599xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005600 name = "f16_igemm_bench",
5601 srcs = [
5602 "bench/f16-igemm.cc",
5603 "bench/conv.h",
5604 "bench/google/conv.h",
5605 "src/xnnpack/AlignedAllocator.h",
5606 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005607 deps = MICROKERNEL_BENCHMARK_DEPS + [
5608 ":indirection",
5609 ":packing",
5610 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005611)
5612
5613xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005614 name = "f16_gemm_bench",
5615 srcs = [
5616 "bench/f16-gemm.cc",
5617 "bench/gemm.h",
5618 "src/xnnpack/AlignedAllocator.h",
5619 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005620 deps = MICROKERNEL_BENCHMARK_DEPS + [
5621 ":packing",
5622 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005623)
5624
5625xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005626 name = "f16_spmm_bench",
5627 srcs = [
5628 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005629 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005630 "src/xnnpack/AlignedAllocator.h",
5631 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005632 deps = MICROKERNEL_BENCHMARK_DEPS,
5633)
5634
5635xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005636 name = "f16_vrelu_bench",
5637 srcs = [
5638 "bench/f16-vrelu.cc",
5639 "src/xnnpack/AlignedAllocator.h",
5640 ] + MICROKERNEL_BENCHMARK_HDRS,
5641 deps = MICROKERNEL_BENCHMARK_DEPS,
5642)
5643
5644xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005645 name = "f32_igemm_bench",
5646 srcs = [
5647 "bench/f32-igemm.cc",
5648 "bench/conv.h",
5649 "src/xnnpack/AlignedAllocator.h",
5650 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005651 deps = MICROKERNEL_BENCHMARK_DEPS + [
5652 ":indirection",
5653 ":packing",
5654 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005655)
5656
5657xnnpack_benchmark(
5658 name = "f32_conv_hwc_bench",
5659 srcs = [
5660 "bench/f32-conv-hwc.cc",
5661 "bench/dconv.h",
5662 "src/xnnpack/AlignedAllocator.h",
5663 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005664 deps = MICROKERNEL_BENCHMARK_DEPS + [
5665 ":packing",
5666 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005667)
5668
5669xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005670 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005671 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005672 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005673 "bench/dconv.h",
5674 "src/xnnpack/AlignedAllocator.h",
5675 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005676 deps = MICROKERNEL_BENCHMARK_DEPS + [
5677 ":packing",
5678 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005679)
5680
5681xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005682 name = "f16_dwconv_bench",
5683 srcs = [
5684 "bench/f16-dwconv.cc",
5685 "bench/dwconv.h",
5686 "bench/google/dwconv.h",
5687 "src/xnnpack/AlignedAllocator.h",
5688 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005689 deps = MICROKERNEL_BENCHMARK_DEPS + [
5690 ":indirection",
5691 ":packing",
5692 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005693)
5694
5695xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005696 name = "f32_dwconv_bench",
5697 srcs = [
5698 "bench/f32-dwconv.cc",
5699 "bench/dwconv.h",
5700 "src/xnnpack/AlignedAllocator.h",
5701 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005702 deps = MICROKERNEL_BENCHMARK_DEPS + [
5703 ":indirection",
5704 ":packing",
5705 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005706)
5707
5708xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005709 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005710 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005711 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005712 "bench/dwconv.h",
5713 "src/xnnpack/AlignedAllocator.h",
5714 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005715 deps = MICROKERNEL_BENCHMARK_DEPS + [
5716 ":indirection",
5717 ":packing",
5718 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005719)
5720
5721xnnpack_benchmark(
5722 name = "f32_gemm_bench",
5723 srcs = [
5724 "bench/f32-gemm.cc",
5725 "bench/gemm.h",
5726 "src/xnnpack/AlignedAllocator.h",
5727 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005728 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005729 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005730)
5731
5732xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005733 name = "f32_raddexpminusmax_bench",
5734 srcs = [
5735 "bench/f32-raddexpminusmax.cc",
5736 "src/xnnpack/AlignedAllocator.h",
5737 ] + MICROKERNEL_BENCHMARK_HDRS,
5738 deps = MICROKERNEL_BENCHMARK_DEPS,
5739)
5740
5741xnnpack_benchmark(
5742 name = "f32_raddextexp_bench",
5743 srcs = [
5744 "bench/f32-raddextexp.cc",
5745 "src/xnnpack/AlignedAllocator.h",
5746 ] + MICROKERNEL_BENCHMARK_HDRS,
5747 deps = MICROKERNEL_BENCHMARK_DEPS,
5748)
5749
5750xnnpack_benchmark(
5751 name = "f32_raddstoreexpminusmax_bench",
5752 srcs = [
5753 "bench/f32-raddstoreexpminusmax.cc",
5754 "src/xnnpack/AlignedAllocator.h",
5755 ] + MICROKERNEL_BENCHMARK_HDRS,
5756 deps = MICROKERNEL_BENCHMARK_DEPS,
5757)
5758
5759xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005760 name = "f32_rmax_bench",
5761 srcs = [
5762 "bench/f32-rmax.cc",
5763 "src/xnnpack/AlignedAllocator.h",
5764 ] + MICROKERNEL_BENCHMARK_HDRS,
5765 deps = MICROKERNEL_BENCHMARK_DEPS,
5766)
5767
5768xnnpack_benchmark(
5769 name = "f32_spmm_bench",
5770 srcs = [
5771 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005772 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005773 "src/xnnpack/AlignedAllocator.h",
5774 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005775 deps = MICROKERNEL_BENCHMARK_DEPS,
5776)
5777
5778xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005779 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005780 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005781 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005782 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005783 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005784 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005785)
5786
5787xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005788 name = "f32_velu_bench",
5789 srcs = [
5790 "bench/f32-velu.cc",
5791 "src/xnnpack/AlignedAllocator.h",
5792 ] + MICROKERNEL_BENCHMARK_HDRS,
5793 deps = MICROKERNEL_BENCHMARK_DEPS,
5794)
5795
5796xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005797 name = "f32_vhswish_bench",
5798 srcs = [
5799 "bench/f32-vhswish.cc",
5800 "src/xnnpack/AlignedAllocator.h",
5801 ] + MICROKERNEL_BENCHMARK_HDRS,
5802 deps = MICROKERNEL_BENCHMARK_DEPS,
5803)
5804
5805xnnpack_benchmark(
5806 name = "f32_vrelu_bench",
5807 srcs = [
5808 "bench/f32-vrelu.cc",
5809 "src/xnnpack/AlignedAllocator.h",
5810 ] + MICROKERNEL_BENCHMARK_HDRS,
5811 deps = MICROKERNEL_BENCHMARK_DEPS,
5812)
5813
5814xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005815 name = "f32_vscaleexpminusmax_bench",
5816 srcs = [
5817 "bench/f32-vscaleexpminusmax.cc",
5818 "src/xnnpack/AlignedAllocator.h",
5819 ] + MICROKERNEL_BENCHMARK_HDRS,
5820 deps = MICROKERNEL_BENCHMARK_DEPS,
5821)
5822
5823xnnpack_benchmark(
5824 name = "f32_vscaleextexp_bench",
5825 srcs = [
5826 "bench/f32-vscaleextexp.cc",
5827 "src/xnnpack/AlignedAllocator.h",
5828 ] + MICROKERNEL_BENCHMARK_HDRS,
5829 deps = MICROKERNEL_BENCHMARK_DEPS,
5830)
5831
5832xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005833 name = "f32_vsigmoid_bench",
5834 srcs = [
5835 "bench/f32-vsigmoid.cc",
5836 "src/xnnpack/AlignedAllocator.h",
5837 ] + MICROKERNEL_BENCHMARK_HDRS,
5838 deps = MICROKERNEL_BENCHMARK_DEPS,
5839)
5840
5841xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005842 name = "f32_vsqrt_bench",
5843 srcs = [
5844 "bench/f32-vsqrt.cc",
5845 "src/xnnpack/AlignedAllocator.h",
5846 ] + MICROKERNEL_BENCHMARK_HDRS,
5847 deps = MICROKERNEL_BENCHMARK_DEPS,
5848)
5849
5850xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005851 name = "f32_im2col_gemm_bench",
5852 srcs = [
5853 "bench/f32-im2col-gemm.cc",
5854 "bench/conv.h",
5855 "src/xnnpack/AlignedAllocator.h",
5856 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005857 deps = MICROKERNEL_BENCHMARK_DEPS + [
5858 ":im2col",
5859 ":packing",
5860 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005861)
5862
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005863xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005864 name = "rounding_bench",
5865 srcs = [
5866 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005867 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005868 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005869 ] + MICROKERNEL_BENCHMARK_HDRS,
5870 deps = MICROKERNEL_BENCHMARK_DEPS,
5871)
5872
Marat Dukhan08c4a432019-10-03 09:29:21 -07005873########################### Benchmarks for operators ###########################
5874
5875xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005876 name = "average_pooling_bench",
5877 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005878 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005879 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005880 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005881)
5882
5883xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005884 name = "bankers_rounding_bench",
5885 srcs = ["bench/bankers-rounding.cc"],
5886 copts = xnnpack_optional_tflite_copts(),
5887 tags = ["nowin32"],
5888 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5889)
5890
5891xnnpack_benchmark(
5892 name = "ceiling_bench",
5893 srcs = ["bench/ceiling.cc"],
5894 copts = xnnpack_optional_tflite_copts(),
5895 tags = ["nowin32"],
5896 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5897)
5898
5899xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005900 name = "channel_shuffle_bench",
5901 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005902 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005903)
5904
5905xnnpack_benchmark(
5906 name = "convolution_bench",
5907 srcs = ["bench/convolution.cc"],
5908 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005909 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005910 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005911)
5912
5913xnnpack_benchmark(
5914 name = "deconvolution_bench",
5915 srcs = ["bench/deconvolution.cc"],
5916 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005917 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005918 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005919)
5920
5921xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005922 name = "elu_bench",
5923 srcs = ["bench/elu.cc"],
5924 copts = xnnpack_optional_tflite_copts(),
5925 tags = ["nowin32"],
5926 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5927)
5928
5929xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005930 name = "floor_bench",
5931 srcs = ["bench/floor.cc"],
5932 copts = xnnpack_optional_tflite_copts(),
5933 tags = ["nowin32"],
5934 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5935)
5936
5937xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005938 name = "global_average_pooling_bench",
5939 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005940 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005941)
5942
5943xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005944 name = "hardswish_bench",
5945 srcs = ["bench/hardswish.cc"],
5946 copts = xnnpack_optional_tflite_copts(),
5947 tags = ["nowin32"],
5948 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5949)
5950
5951xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005952 name = "max_pooling_bench",
5953 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005954 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005955)
5956
5957xnnpack_benchmark(
5958 name = "sigmoid_bench",
5959 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005960 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005961 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005962 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005963)
5964
5965xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005966 name = "prelu_bench",
5967 srcs = ["bench/prelu.cc"],
5968 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005969 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005970 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005971)
5972
5973xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005974 name = "softmax_bench",
5975 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005976 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005977 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005978 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005979)
5980
Marat Dukhan87727142020-06-24 15:24:10 -07005981xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005982 name = "square_root_bench",
5983 srcs = ["bench/square-root.cc"],
5984 copts = xnnpack_optional_tflite_copts(),
5985 tags = ["nowin32"],
5986 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5987)
5988
5989xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005990 name = "truncation_bench",
5991 srcs = ["bench/truncation.cc"],
5992 deps = OPERATOR_BENCHMARK_DEPS,
5993)
5994
Marat Dukhanc068bb62019-10-04 13:24:39 -07005995############################# End-to-end benchmarks ############################
5996
5997cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005998 name = "fp32_mobilenet_v1",
5999 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006000 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006001 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006002 linkstatic = True,
6003 deps = [
6004 ":XNNPACK",
6005 "@pthreadpool",
6006 ],
6007)
6008
6009cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006010 name = "fp32_sparse_mobilenet_v1",
6011 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6012 hdrs = ["models/models.h"],
6013 copts = xnnpack_std_cxxopts(),
6014 linkstatic = True,
6015 deps = [
6016 ":XNNPACK",
6017 "@pthreadpool",
6018 ],
6019)
6020
6021cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006022 name = "fp16_mobilenet_v1",
6023 srcs = ["models/fp16-mobilenet-v1.cc"],
6024 hdrs = ["models/models.h"],
6025 copts = xnnpack_std_cxxopts(),
6026 linkstatic = True,
6027 deps = [
6028 ":XNNPACK",
6029 "@FP16",
6030 "@pthreadpool",
6031 ],
6032)
6033
6034cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006035 name = "qs8_mobilenet_v1",
6036 srcs = ["models/qs8-mobilenet-v1.cc"],
6037 hdrs = ["models/models.h"],
6038 copts = xnnpack_std_cxxopts(),
6039 linkstatic = True,
6040 deps = [
6041 ":XNNPACK",
6042 "@pthreadpool",
6043 ],
6044)
6045
6046cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006047 name = "qs8_mobilenet_v2",
6048 srcs = ["models/qs8-mobilenet-v2.cc"],
6049 hdrs = ["models/models.h"],
6050 copts = xnnpack_std_cxxopts(),
6051 linkstatic = True,
6052 deps = [
6053 ":XNNPACK",
6054 "@pthreadpool",
6055 ],
6056)
6057
6058cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006059 name = "qu8_mobilenet_v1",
6060 srcs = ["models/qu8-mobilenet-v1.cc"],
6061 hdrs = ["models/models.h"],
6062 copts = xnnpack_std_cxxopts(),
6063 linkstatic = True,
6064 deps = [
6065 ":XNNPACK",
6066 "@pthreadpool",
6067 ],
6068)
6069
6070cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006071 name = "fp32_mobilenet_v2",
6072 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006073 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006074 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006075 linkstatic = True,
6076 deps = [
6077 ":XNNPACK",
6078 "@pthreadpool",
6079 ],
6080)
6081
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006082cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006083 name = "fp32_sparse_mobilenet_v2",
6084 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6085 hdrs = ["models/models.h"],
6086 copts = xnnpack_std_cxxopts(),
6087 linkstatic = True,
6088 deps = [
6089 ":XNNPACK",
6090 "@pthreadpool",
6091 ],
6092)
6093
6094cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006095 name = "fp16_mobilenet_v2",
6096 srcs = ["models/fp16-mobilenet-v2.cc"],
6097 hdrs = ["models/models.h"],
6098 copts = xnnpack_std_cxxopts(),
6099 linkstatic = True,
6100 deps = [
6101 ":XNNPACK",
6102 "@FP16",
6103 "@pthreadpool",
6104 ],
6105)
6106
6107cc_library(
6108 name = "fp32_mobilenet_v3_large",
6109 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006110 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006111 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006112 linkstatic = True,
6113 deps = [
6114 ":XNNPACK",
6115 "@pthreadpool",
6116 ],
6117)
6118
6119cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006120 name = "fp32_sparse_mobilenet_v3_large",
6121 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6122 hdrs = ["models/models.h"],
6123 copts = xnnpack_std_cxxopts(),
6124 linkstatic = True,
6125 deps = [
6126 ":XNNPACK",
6127 "@pthreadpool",
6128 ],
6129)
6130
6131cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006132 name = "fp16_mobilenet_v3_large",
6133 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6134 hdrs = ["models/models.h"],
6135 copts = xnnpack_std_cxxopts(),
6136 linkstatic = True,
6137 deps = [
6138 ":XNNPACK",
6139 "@FP16",
6140 "@pthreadpool",
6141 ],
6142)
6143
6144cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006145 name = "fp32_mobilenet_v3_small",
6146 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006147 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006148 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006149 linkstatic = True,
6150 deps = [
6151 ":XNNPACK",
6152 "@pthreadpool",
6153 ],
6154)
6155
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006156cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006157 name = "fp32_sparse_mobilenet_v3_small",
6158 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6159 hdrs = ["models/models.h"],
6160 copts = xnnpack_std_cxxopts(),
6161 linkstatic = True,
6162 deps = [
6163 ":XNNPACK",
6164 "@pthreadpool",
6165 ],
6166)
6167
6168cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006169 name = "fp16_mobilenet_v3_small",
6170 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6171 hdrs = ["models/models.h"],
6172 copts = xnnpack_std_cxxopts(),
6173 linkstatic = True,
6174 deps = [
6175 ":XNNPACK",
6176 "@FP16",
6177 "@pthreadpool",
6178 ],
6179)
6180
Marat Dukhanc068bb62019-10-04 13:24:39 -07006181xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006182 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006183 srcs = [
6184 "bench/f32-dwconv-e2e.cc",
6185 "bench/end2end.h",
6186 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006187 deps = MICROKERNEL_BENCHMARK_DEPS + [
6188 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006189 ":fp32_mobilenet_v1",
6190 ":fp32_mobilenet_v2",
6191 ":fp32_mobilenet_v3_large",
6192 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006193 ],
6194)
6195
6196xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006197 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006198 srcs = [
6199 "bench/f32-gemm-e2e.cc",
6200 "bench/end2end.h",
6201 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006202 deps = MICROKERNEL_BENCHMARK_DEPS + [
6203 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006204 ":fp32_mobilenet_v1",
6205 ":fp32_mobilenet_v2",
6206 ":fp32_mobilenet_v3_large",
6207 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006208 ],
6209)
6210
6211xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006212 name = "qs8_gemm_e2e_bench",
6213 srcs = [
6214 "bench/qs8-gemm-e2e.cc",
6215 "bench/end2end.h",
6216 ] + MICROKERNEL_BENCHMARK_HDRS,
6217 deps = MICROKERNEL_BENCHMARK_DEPS + [
6218 ":XNNPACK",
6219 ":qs8_mobilenet_v1",
6220 ":qs8_mobilenet_v2",
6221 ],
6222)
6223
6224xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006225 name = "end2end_bench",
6226 srcs = ["bench/end2end.cc"],
6227 deps = [
6228 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006229 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006230 ":fp16_mobilenet_v1",
6231 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006232 ":fp16_mobilenet_v3_large",
6233 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006234 ":fp32_mobilenet_v1",
6235 ":fp32_mobilenet_v2",
6236 ":fp32_mobilenet_v3_large",
6237 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006238 ":fp32_sparse_mobilenet_v1",
6239 ":fp32_sparse_mobilenet_v2",
6240 ":fp32_sparse_mobilenet_v3_large",
6241 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006242 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006243 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006244 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006245 "@pthreadpool",
6246 ],
6247)
6248
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006249#################### Accuracy evaluation for math functions ####################
6250
6251xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006252 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006253 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006254 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006255 "src/xnnpack/AlignedAllocator.h",
6256 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006257 deps = ACCURACY_EVAL_DEPS + [
6258 ":bench_utils",
6259 "@cpuinfo",
6260 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006261)
6262
Marat Dukhan515c9772019-10-17 18:07:57 -07006263xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006264 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006265 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006266 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006267 "src/xnnpack/AlignedAllocator.h",
6268 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006269 deps = ACCURACY_EVAL_DEPS + [
6270 ":bench_utils",
6271 "@cpuinfo",
6272 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006273)
6274
Marat Dukhan98ba4412019-10-23 02:14:28 -07006275xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006276 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006277 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006278 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006279 "src/xnnpack/AlignedAllocator.h",
6280 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006281 deps = ACCURACY_EVAL_DEPS + [
6282 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006283 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006284 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006285)
6286
6287xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006288 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006289 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006290 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006291 "src/xnnpack/AlignedAllocator.h",
6292 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006293 deps = ACCURACY_EVAL_DEPS + [
6294 ":bench_utils",
6295 "@cpuinfo",
6296 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006297)
6298
Marat Dukhanf44f0222020-12-14 11:53:27 -08006299xnnpack_benchmark(
6300 name = "f32_sigmoid_ulp_eval",
6301 srcs = [
6302 "eval/f32-sigmoid-ulp.cc",
6303 "src/xnnpack/AlignedAllocator.h",
6304 ] + ACCURACY_EVAL_HDRS,
6305 deps = ACCURACY_EVAL_DEPS + [
6306 ":bench_utils",
6307 "@cpuinfo",
6308 ],
6309)
6310
6311xnnpack_benchmark(
6312 name = "f32_sqrt_ulp_eval",
6313 srcs = [
6314 "eval/f32-sqrt-ulp.cc",
6315 "src/xnnpack/AlignedAllocator.h",
6316 ] + ACCURACY_EVAL_HDRS,
6317 deps = ACCURACY_EVAL_DEPS + [
6318 ":bench_utils",
6319 "@cpuinfo",
6320 ],
6321)
6322
6323################### Accuracy verification for math functions ##################
6324
6325xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006326 name = "f32_exp_eval",
6327 srcs = [
6328 "eval/f32-exp.cc",
6329 "src/xnnpack/AlignedAllocator.h",
6330 "src/xnnpack/math-stubs.h",
6331 ] + MICROKERNEL_TEST_HDRS,
6332 automatic = False,
6333 deps = MICROKERNEL_TEST_DEPS,
6334)
6335
6336xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006337 name = "f32_expm1minus_eval",
6338 srcs = [
6339 "eval/f32-expm1minus.cc",
6340 "src/xnnpack/AlignedAllocator.h",
6341 "src/xnnpack/math-stubs.h",
6342 ] + MICROKERNEL_TEST_HDRS,
6343 automatic = False,
6344 deps = MICROKERNEL_TEST_DEPS,
6345)
6346
Marat Dukhan8853b822020-05-07 12:19:01 -07006347xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006348 name = "f32_expminus_eval",
6349 srcs = [
6350 "eval/f32-expminus.cc",
6351 "src/xnnpack/AlignedAllocator.h",
6352 "src/xnnpack/math-stubs.h",
6353 ] + MICROKERNEL_TEST_HDRS,
6354 automatic = False,
6355 deps = MICROKERNEL_TEST_DEPS,
6356)
6357
6358xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006359 name = "f32_roundne_eval",
6360 srcs = [
6361 "eval/f32-roundne.cc",
6362 "src/xnnpack/AlignedAllocator.h",
6363 "src/xnnpack/math-stubs.h",
6364 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006365 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006366 deps = MICROKERNEL_TEST_DEPS,
6367)
6368
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006369xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006370 name = "f32_roundd_eval",
6371 srcs = [
6372 "eval/f32-roundd.cc",
6373 "src/xnnpack/AlignedAllocator.h",
6374 "src/xnnpack/math-stubs.h",
6375 ] + MICROKERNEL_TEST_HDRS,
6376 automatic = False,
6377 deps = MICROKERNEL_TEST_DEPS,
6378)
6379
6380xnnpack_unit_test(
6381 name = "f32_roundu_eval",
6382 srcs = [
6383 "eval/f32-roundu.cc",
6384 "src/xnnpack/AlignedAllocator.h",
6385 "src/xnnpack/math-stubs.h",
6386 ] + MICROKERNEL_TEST_HDRS,
6387 automatic = False,
6388 deps = MICROKERNEL_TEST_DEPS,
6389)
6390
6391xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006392 name = "f32_roundz_eval",
6393 srcs = [
6394 "eval/f32-roundz.cc",
6395 "src/xnnpack/AlignedAllocator.h",
6396 "src/xnnpack/math-stubs.h",
6397 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006398 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006399 deps = MICROKERNEL_TEST_DEPS,
6400)
6401
Marat Dukhan08c4a432019-10-03 09:29:21 -07006402######################### Unit tests for micro-kernels #########################
6403
6404xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006405 name = "f16_dwconv_minmax_test",
6406 srcs = [
6407 "test/f16-dwconv-minmax.cc",
6408 "test/dwconv-microkernel-tester.h",
6409 "src/xnnpack/AlignedAllocator.h",
6410 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6411 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6412)
6413
6414xnnpack_unit_test(
6415 name = "f16_gavgpool_minmax_test",
6416 srcs = [
6417 "test/f16-gavgpool-minmax.cc",
6418 "test/gavgpool-microkernel-tester.h",
6419 "src/xnnpack/AlignedAllocator.h",
6420 ] + MICROKERNEL_TEST_HDRS,
6421 deps = MICROKERNEL_TEST_DEPS,
6422)
6423
6424xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006425 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006426 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006427 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006428 "test/gemm-microkernel-tester.h",
6429 "src/xnnpack/AlignedAllocator.h",
6430 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006431 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006432)
6433
6434xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006435 name = "f16_igemm_minmax_test",
6436 srcs = [
6437 "test/f16-igemm-minmax.cc",
6438 "test/gemm-microkernel-tester.h",
6439 "src/xnnpack/AlignedAllocator.h",
6440 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6441 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6442)
6443
6444xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006445 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006446 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006447 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006448 "test/spmm-microkernel-tester.h",
6449 "src/xnnpack/AlignedAllocator.h",
6450 ] + MICROKERNEL_TEST_HDRS,
6451 deps = MICROKERNEL_TEST_DEPS,
6452)
6453
6454xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006455 name = "f16_vadd_minmax_test",
6456 srcs = [
6457 "test/f16-vadd-minmax.cc",
6458 "test/vbinary-microkernel-tester.h",
6459 ] + MICROKERNEL_TEST_HDRS,
6460 deps = MICROKERNEL_TEST_DEPS,
6461)
6462
6463xnnpack_unit_test(
6464 name = "f16_vaddc_minmax_test",
6465 srcs = [
6466 "test/f16-vaddc-minmax.cc",
6467 "test/vbinaryc-microkernel-tester.h",
6468 ] + MICROKERNEL_TEST_HDRS,
6469 deps = MICROKERNEL_TEST_DEPS,
6470)
6471
6472xnnpack_unit_test(
6473 name = "f16_vclamp_test",
6474 srcs = [
6475 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006476 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006477 ] + MICROKERNEL_TEST_HDRS,
6478 deps = MICROKERNEL_TEST_DEPS,
6479)
6480
6481xnnpack_unit_test(
6482 name = "f16_vdiv_minmax_test",
6483 srcs = [
6484 "test/f16-vdiv-minmax.cc",
6485 "test/vbinary-microkernel-tester.h",
6486 ] + MICROKERNEL_TEST_HDRS,
6487 deps = MICROKERNEL_TEST_DEPS,
6488)
6489
6490xnnpack_unit_test(
6491 name = "f16_vdivc_minmax_test",
6492 srcs = [
6493 "test/f16-vdivc-minmax.cc",
6494 "test/vbinaryc-microkernel-tester.h",
6495 ] + MICROKERNEL_TEST_HDRS,
6496 deps = MICROKERNEL_TEST_DEPS,
6497)
6498
6499xnnpack_unit_test(
6500 name = "f16_vrdivc_minmax_test",
6501 srcs = [
6502 "test/f16-vrdivc-minmax.cc",
6503 "test/vbinaryc-microkernel-tester.h",
6504 ] + MICROKERNEL_TEST_HDRS,
6505 deps = MICROKERNEL_TEST_DEPS,
6506)
6507
6508xnnpack_unit_test(
6509 name = "f16_vhswish_test",
6510 srcs = [
6511 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006512 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006513 ] + MICROKERNEL_TEST_HDRS,
6514 deps = MICROKERNEL_TEST_DEPS,
6515)
6516
6517xnnpack_unit_test(
6518 name = "f16_vmax_test",
6519 srcs = [
6520 "test/f16-vmax.cc",
6521 "test/vbinary-microkernel-tester.h",
6522 ] + MICROKERNEL_TEST_HDRS,
6523 deps = MICROKERNEL_TEST_DEPS,
6524)
6525
6526xnnpack_unit_test(
6527 name = "f16_vmaxc_test",
6528 srcs = [
6529 "test/f16-vmaxc.cc",
6530 "test/vbinaryc-microkernel-tester.h",
6531 ] + MICROKERNEL_TEST_HDRS,
6532 deps = MICROKERNEL_TEST_DEPS,
6533)
6534
6535xnnpack_unit_test(
6536 name = "f16_vmin_test",
6537 srcs = [
6538 "test/f16-vmin.cc",
6539 "test/vbinary-microkernel-tester.h",
6540 ] + MICROKERNEL_TEST_HDRS,
6541 deps = MICROKERNEL_TEST_DEPS,
6542)
6543
6544xnnpack_unit_test(
6545 name = "f16_vminc_test",
6546 srcs = [
6547 "test/f16-vminc.cc",
6548 "test/vbinaryc-microkernel-tester.h",
6549 ] + MICROKERNEL_TEST_HDRS,
6550 deps = MICROKERNEL_TEST_DEPS,
6551)
6552
6553xnnpack_unit_test(
6554 name = "f16_vmul_minmax_test",
6555 srcs = [
6556 "test/f16-vmul-minmax.cc",
6557 "test/vbinary-microkernel-tester.h",
6558 ] + MICROKERNEL_TEST_HDRS,
6559 deps = MICROKERNEL_TEST_DEPS,
6560)
6561
6562xnnpack_unit_test(
6563 name = "f16_vmulc_minmax_test",
6564 srcs = [
6565 "test/f16-vmulc-minmax.cc",
6566 "test/vbinaryc-microkernel-tester.h",
6567 ] + MICROKERNEL_TEST_HDRS,
6568 deps = MICROKERNEL_TEST_DEPS,
6569)
6570
6571xnnpack_unit_test(
6572 name = "f16_vmulcaddc_minmax_test",
6573 srcs = [
6574 "test/f16-vmulcaddc-minmax.cc",
6575 "test/vmulcaddc-microkernel-tester.h",
6576 "src/xnnpack/AlignedAllocator.h",
6577 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6578 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6579)
6580
6581xnnpack_unit_test(
6582 name = "f16_vsub_minmax_test",
6583 srcs = [
6584 "test/f16-vsub-minmax.cc",
6585 "test/vbinary-microkernel-tester.h",
6586 ] + MICROKERNEL_TEST_HDRS,
6587 deps = MICROKERNEL_TEST_DEPS,
6588)
6589
6590xnnpack_unit_test(
6591 name = "f16_vsubc_minmax_test",
6592 srcs = [
6593 "test/f16-vsubc-minmax.cc",
6594 "test/vbinaryc-microkernel-tester.h",
6595 ] + MICROKERNEL_TEST_HDRS,
6596 deps = MICROKERNEL_TEST_DEPS,
6597)
6598
6599xnnpack_unit_test(
6600 name = "f16_vrsubc_minmax_test",
6601 srcs = [
6602 "test/f16-vrsubc-minmax.cc",
6603 "test/vbinaryc-microkernel-tester.h",
6604 ] + MICROKERNEL_TEST_HDRS,
6605 deps = MICROKERNEL_TEST_DEPS,
6606)
6607
6608xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006609 name = "f32_argmaxpool_test",
6610 srcs = [
6611 "test/f32-argmaxpool.cc",
6612 "test/argmaxpool-microkernel-tester.h",
6613 "src/xnnpack/AlignedAllocator.h",
6614 ] + MICROKERNEL_TEST_HDRS,
6615 deps = MICROKERNEL_TEST_DEPS,
6616)
6617
6618xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006619 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006620 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006621 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006622 "test/avgpool-microkernel-tester.h",
6623 "src/xnnpack/AlignedAllocator.h",
6624 ] + MICROKERNEL_TEST_HDRS,
6625 deps = MICROKERNEL_TEST_DEPS,
6626)
6627
6628xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006629 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006630 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006631 "test/f32-ibilinear.cc",
6632 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006633 "src/xnnpack/AlignedAllocator.h",
6634 ] + MICROKERNEL_TEST_HDRS,
6635 deps = MICROKERNEL_TEST_DEPS,
6636)
6637
6638xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006639 name = "f32_ibilinear_chw_test",
6640 srcs = [
6641 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006642 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006643 "src/xnnpack/AlignedAllocator.h",
6644 ] + MICROKERNEL_TEST_HDRS,
6645 deps = MICROKERNEL_TEST_DEPS,
6646)
6647
6648xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006649 name = "f32_igemm_test",
6650 srcs = [
6651 "test/f32-igemm.cc",
6652 "test/gemm-microkernel-tester.h",
6653 "src/xnnpack/AlignedAllocator.h",
6654 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006655 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006656)
6657
6658xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006659 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006660 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006661 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006662 "test/gemm-microkernel-tester.h",
6663 "src/xnnpack/AlignedAllocator.h",
6664 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006665 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006666)
6667
6668xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006669 name = "f32_igemm_minmax_test",
6670 srcs = [
6671 "test/f32-igemm-minmax.cc",
6672 "test/gemm-microkernel-tester.h",
6673 "src/xnnpack/AlignedAllocator.h",
6674 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006675 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006676)
6677
6678xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006679 name = "f32_conv_hwc_test",
6680 srcs = [
6681 "test/f32-conv-hwc.cc",
6682 "test/conv-hwc-microkernel-tester.h",
6683 "src/xnnpack/AlignedAllocator.h",
6684 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006685 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006686)
6687
6688xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006689 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006690 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006691 "test/f32-conv-hwc2chw.cc",
6692 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006693 "src/xnnpack/AlignedAllocator.h",
6694 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006695 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006696)
6697
6698xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006699 name = "f32_dwconv_test",
6700 srcs = [
6701 "test/f32-dwconv.cc",
6702 "test/dwconv-microkernel-tester.h",
6703 "src/xnnpack/AlignedAllocator.h",
6704 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006705 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006706)
6707
6708xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006709 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006710 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006711 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006712 "test/dwconv-microkernel-tester.h",
6713 "src/xnnpack/AlignedAllocator.h",
6714 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006715 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006716)
6717
6718xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006719 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006720 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006721 "test/f32-dwconv2d-chw.cc",
6722 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006723 "src/xnnpack/AlignedAllocator.h",
6724 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006725 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006726)
6727
6728xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006729 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006730 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006731 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006732 "test/gavgpool-microkernel-tester.h",
6733 "src/xnnpack/AlignedAllocator.h",
6734 ] + MICROKERNEL_TEST_HDRS,
6735 deps = MICROKERNEL_TEST_DEPS,
6736)
6737
6738xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006739 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006740 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006741 "test/f32-gavgpool-cw.cc",
6742 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006743 "src/xnnpack/AlignedAllocator.h",
6744 ] + MICROKERNEL_TEST_HDRS,
6745 deps = MICROKERNEL_TEST_DEPS,
6746)
6747
6748xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006749 name = "f32_gemm_test",
6750 srcs = [
6751 "test/f32-gemm.cc",
6752 "test/gemm-microkernel-tester.h",
6753 "src/xnnpack/AlignedAllocator.h",
6754 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006755 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006756)
6757
6758xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006759 name = "f32_gemm_relu_test",
6760 srcs = [
6761 "test/f32-gemm-relu.cc",
6762 "test/gemm-microkernel-tester.h",
6763 "src/xnnpack/AlignedAllocator.h",
6764 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006765 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006766)
6767
6768xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006769 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006770 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006771 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006772 "test/gemm-microkernel-tester.h",
6773 "src/xnnpack/AlignedAllocator.h",
6774 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006775 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006776)
6777
6778xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006779 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006780 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006781 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006782 "test/gemm-microkernel-tester.h",
6783 "src/xnnpack/AlignedAllocator.h",
6784 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006785 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006786)
6787
6788xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006789 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006790 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006791 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006792 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006793 ] + MICROKERNEL_TEST_HDRS,
6794 deps = MICROKERNEL_TEST_DEPS,
6795)
6796
6797xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006798 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006799 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006800 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006801 "test/maxpool-microkernel-tester.h",
6802 ] + MICROKERNEL_TEST_HDRS,
6803 deps = MICROKERNEL_TEST_DEPS,
6804)
6805
6806xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006807 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006808 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006809 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006810 "test/avgpool-microkernel-tester.h",
6811 "src/xnnpack/AlignedAllocator.h",
6812 ] + MICROKERNEL_TEST_HDRS,
6813 deps = MICROKERNEL_TEST_DEPS,
6814)
6815
6816xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006817 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006818 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006819 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006820 "test/gemm-microkernel-tester.h",
6821 "src/xnnpack/AlignedAllocator.h",
6822 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006823 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006824)
6825
6826xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006827 name = "f16_prelu_test",
6828 srcs = [
6829 "test/f16-prelu.cc",
6830 "test/prelu-microkernel-tester.h",
6831 "src/xnnpack/AlignedAllocator.h",
6832 ] + MICROKERNEL_TEST_HDRS,
6833 deps = MICROKERNEL_TEST_DEPS,
6834)
6835
6836xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006837 name = "f32_prelu_test",
6838 srcs = [
6839 "test/f32-prelu.cc",
6840 "test/prelu-microkernel-tester.h",
6841 "src/xnnpack/AlignedAllocator.h",
6842 ] + MICROKERNEL_TEST_HDRS,
6843 deps = MICROKERNEL_TEST_DEPS,
6844)
6845
6846xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006847 name = "f32_raddexpminusmax_test",
6848 srcs = [
6849 "test/f32-raddexpminusmax.cc",
6850 "test/raddexpminusmax-microkernel-tester.h",
6851 ] + MICROKERNEL_TEST_HDRS,
6852 deps = MICROKERNEL_TEST_DEPS,
6853)
6854
6855xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006856 name = "f32_raddextexp_test",
6857 srcs = [
6858 "test/f32-raddextexp.cc",
6859 "test/raddextexp-microkernel-tester.h",
6860 ] + MICROKERNEL_TEST_HDRS,
6861 deps = MICROKERNEL_TEST_DEPS,
6862)
6863
6864xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006865 name = "f32_raddstoreexpminusmax_test",
6866 srcs = [
6867 "test/f32-raddstoreexpminusmax.cc",
6868 "test/raddstoreexpminusmax-microkernel-tester.h",
6869 ] + MICROKERNEL_TEST_HDRS,
6870 deps = MICROKERNEL_TEST_DEPS,
6871)
6872
6873xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006874 name = "f32_rmax_test",
6875 srcs = [
6876 "test/f32-rmax.cc",
6877 "test/rmax-microkernel-tester.h",
6878 ] + MICROKERNEL_TEST_HDRS,
6879 deps = MICROKERNEL_TEST_DEPS,
6880)
6881
6882xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006883 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006884 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006885 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006886 "test/spmm-microkernel-tester.h",
6887 "src/xnnpack/AlignedAllocator.h",
6888 ] + MICROKERNEL_TEST_HDRS,
6889 deps = MICROKERNEL_TEST_DEPS,
6890)
6891
6892xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006893 name = "f32_vabs_test",
6894 srcs = [
6895 "test/f32-vabs.cc",
6896 "test/vunary-microkernel-tester.h",
6897 ] + MICROKERNEL_TEST_HDRS,
6898 deps = MICROKERNEL_TEST_DEPS,
6899)
6900
6901xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006902 name = "f32_vadd_test",
6903 srcs = [
6904 "test/f32-vadd.cc",
6905 "test/vbinary-microkernel-tester.h",
6906 ] + MICROKERNEL_TEST_HDRS,
6907 deps = MICROKERNEL_TEST_DEPS,
6908)
6909
6910xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006911 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006912 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006913 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006914 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006915 ] + MICROKERNEL_TEST_HDRS,
6916 deps = MICROKERNEL_TEST_DEPS,
6917)
6918
6919xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006920 name = "f32_vadd_relu_test",
6921 srcs = [
6922 "test/f32-vadd-relu.cc",
6923 "test/vbinary-microkernel-tester.h",
6924 ] + MICROKERNEL_TEST_HDRS,
6925 deps = MICROKERNEL_TEST_DEPS,
6926)
6927
6928xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006929 name = "f32_vaddc_test",
6930 srcs = [
6931 "test/f32-vaddc.cc",
6932 "test/vbinaryc-microkernel-tester.h",
6933 ] + MICROKERNEL_TEST_HDRS,
6934 deps = MICROKERNEL_TEST_DEPS,
6935)
6936
6937xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006938 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006939 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006940 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006941 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006942 ] + MICROKERNEL_TEST_HDRS,
6943 deps = MICROKERNEL_TEST_DEPS,
6944)
6945
6946xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006947 name = "f32_vaddc_relu_test",
6948 srcs = [
6949 "test/f32-vaddc-relu.cc",
6950 "test/vbinaryc-microkernel-tester.h",
6951 ] + MICROKERNEL_TEST_HDRS,
6952 deps = MICROKERNEL_TEST_DEPS,
6953)
6954
6955xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006956 name = "f32_vclamp_test",
6957 srcs = [
6958 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006959 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006960 ] + MICROKERNEL_TEST_HDRS,
6961 deps = MICROKERNEL_TEST_DEPS,
6962)
6963
6964xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006965 name = "f32_vdiv_test",
6966 srcs = [
6967 "test/f32-vdiv.cc",
6968 "test/vbinary-microkernel-tester.h",
6969 ] + MICROKERNEL_TEST_HDRS,
6970 deps = MICROKERNEL_TEST_DEPS,
6971)
6972
6973xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006974 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006975 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006976 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006977 "test/vbinary-microkernel-tester.h",
6978 ] + MICROKERNEL_TEST_HDRS,
6979 deps = MICROKERNEL_TEST_DEPS,
6980)
6981
6982xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006983 name = "f32_vdiv_relu_test",
6984 srcs = [
6985 "test/f32-vdiv-relu.cc",
6986 "test/vbinary-microkernel-tester.h",
6987 ] + MICROKERNEL_TEST_HDRS,
6988 deps = MICROKERNEL_TEST_DEPS,
6989)
6990
6991xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006992 name = "f32_vdivc_test",
6993 srcs = [
6994 "test/f32-vdivc.cc",
6995 "test/vbinaryc-microkernel-tester.h",
6996 ] + MICROKERNEL_TEST_HDRS,
6997 deps = MICROKERNEL_TEST_DEPS,
6998)
6999
7000xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007001 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007002 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007003 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007004 "test/vbinaryc-microkernel-tester.h",
7005 ] + MICROKERNEL_TEST_HDRS,
7006 deps = MICROKERNEL_TEST_DEPS,
7007)
7008
7009xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007010 name = "f32_vdivc_relu_test",
7011 srcs = [
7012 "test/f32-vdivc-relu.cc",
7013 "test/vbinaryc-microkernel-tester.h",
7014 ] + MICROKERNEL_TEST_HDRS,
7015 deps = MICROKERNEL_TEST_DEPS,
7016)
7017
7018xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007019 name = "f32_vrdivc_test",
7020 srcs = [
7021 "test/f32-vrdivc.cc",
7022 "test/vbinaryc-microkernel-tester.h",
7023 ] + MICROKERNEL_TEST_HDRS,
7024 deps = MICROKERNEL_TEST_DEPS,
7025)
7026
7027xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007028 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007029 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007030 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007031 "test/vbinaryc-microkernel-tester.h",
7032 ] + MICROKERNEL_TEST_HDRS,
7033 deps = MICROKERNEL_TEST_DEPS,
7034)
7035
7036xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007037 name = "f32_vrdivc_relu_test",
7038 srcs = [
7039 "test/f32-vrdivc-relu.cc",
7040 "test/vbinaryc-microkernel-tester.h",
7041 ] + MICROKERNEL_TEST_HDRS,
7042 deps = MICROKERNEL_TEST_DEPS,
7043)
7044
7045xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007046 name = "f32_velu_test",
7047 srcs = [
7048 "test/f32-velu.cc",
7049 "test/vunary-microkernel-tester.h",
7050 ] + MICROKERNEL_TEST_HDRS,
7051 deps = MICROKERNEL_TEST_DEPS,
7052)
7053
7054xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007055 name = "f32_vmax_test",
7056 srcs = [
7057 "test/f32-vmax.cc",
7058 "test/vbinary-microkernel-tester.h",
7059 ] + MICROKERNEL_TEST_HDRS,
7060 deps = MICROKERNEL_TEST_DEPS,
7061)
7062
7063xnnpack_unit_test(
7064 name = "f32_vmaxc_test",
7065 srcs = [
7066 "test/f32-vmaxc.cc",
7067 "test/vbinaryc-microkernel-tester.h",
7068 ] + MICROKERNEL_TEST_HDRS,
7069 deps = MICROKERNEL_TEST_DEPS,
7070)
7071
7072xnnpack_unit_test(
7073 name = "f32_vmin_test",
7074 srcs = [
7075 "test/f32-vmin.cc",
7076 "test/vbinary-microkernel-tester.h",
7077 ] + MICROKERNEL_TEST_HDRS,
7078 deps = MICROKERNEL_TEST_DEPS,
7079)
7080
7081xnnpack_unit_test(
7082 name = "f32_vminc_test",
7083 srcs = [
7084 "test/f32-vminc.cc",
7085 "test/vbinaryc-microkernel-tester.h",
7086 ] + MICROKERNEL_TEST_HDRS,
7087 deps = MICROKERNEL_TEST_DEPS,
7088)
7089
7090xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007091 name = "f32_vmul_test",
7092 srcs = [
7093 "test/f32-vmul.cc",
7094 "test/vbinary-microkernel-tester.h",
7095 ] + MICROKERNEL_TEST_HDRS,
7096 deps = MICROKERNEL_TEST_DEPS,
7097)
7098
7099xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007100 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007101 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007102 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007103 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007104 ] + MICROKERNEL_TEST_HDRS,
7105 deps = MICROKERNEL_TEST_DEPS,
7106)
7107
7108xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007109 name = "f32_vmul_relu_test",
7110 srcs = [
7111 "test/f32-vmul-relu.cc",
7112 "test/vbinary-microkernel-tester.h",
7113 ] + MICROKERNEL_TEST_HDRS,
7114 deps = MICROKERNEL_TEST_DEPS,
7115)
7116
7117xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007118 name = "f32_vmulc_test",
7119 srcs = [
7120 "test/f32-vmulc.cc",
7121 "test/vbinaryc-microkernel-tester.h",
7122 ] + MICROKERNEL_TEST_HDRS,
7123 deps = MICROKERNEL_TEST_DEPS,
7124)
7125
7126xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007127 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007128 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007129 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007130 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007131 ] + MICROKERNEL_TEST_HDRS,
7132 deps = MICROKERNEL_TEST_DEPS,
7133)
7134
7135xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007136 name = "f32_vmulc_relu_test",
7137 srcs = [
7138 "test/f32-vmulc-relu.cc",
7139 "test/vbinaryc-microkernel-tester.h",
7140 ] + MICROKERNEL_TEST_HDRS,
7141 deps = MICROKERNEL_TEST_DEPS,
7142)
7143
7144xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007145 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007146 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007147 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007148 "test/vmulcaddc-microkernel-tester.h",
7149 "src/xnnpack/AlignedAllocator.h",
7150 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007151 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007152)
7153
7154xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007155 name = "f32_vlrelu_test",
7156 srcs = [
7157 "test/f32-vlrelu.cc",
7158 "test/vunary-microkernel-tester.h",
7159 ] + MICROKERNEL_TEST_HDRS,
7160 deps = MICROKERNEL_TEST_DEPS,
7161)
7162
7163xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007164 name = "f32_vneg_test",
7165 srcs = [
7166 "test/f32-vneg.cc",
7167 "test/vunary-microkernel-tester.h",
7168 ] + MICROKERNEL_TEST_HDRS,
7169 deps = MICROKERNEL_TEST_DEPS,
7170)
7171
7172xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007173 name = "f32_vrelu_test",
7174 srcs = [
7175 "test/f32-vrelu.cc",
7176 "test/vunary-microkernel-tester.h",
7177 ] + MICROKERNEL_TEST_HDRS,
7178 deps = MICROKERNEL_TEST_DEPS,
7179)
7180
7181xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007182 name = "f32_vrndne_test",
7183 srcs = [
7184 "test/f32-vrndne.cc",
7185 "test/vunary-microkernel-tester.h",
7186 ] + MICROKERNEL_TEST_HDRS,
7187 deps = MICROKERNEL_TEST_DEPS,
7188)
7189
7190xnnpack_unit_test(
7191 name = "f32_vrndz_test",
7192 srcs = [
7193 "test/f32-vrndz.cc",
7194 "test/vunary-microkernel-tester.h",
7195 ] + MICROKERNEL_TEST_HDRS,
7196 deps = MICROKERNEL_TEST_DEPS,
7197)
7198
7199xnnpack_unit_test(
7200 name = "f32_vrndu_test",
7201 srcs = [
7202 "test/f32-vrndu.cc",
7203 "test/vunary-microkernel-tester.h",
7204 ] + MICROKERNEL_TEST_HDRS,
7205 deps = MICROKERNEL_TEST_DEPS,
7206)
7207
7208xnnpack_unit_test(
7209 name = "f32_vrndd_test",
7210 srcs = [
7211 "test/f32-vrndd.cc",
7212 "test/vunary-microkernel-tester.h",
7213 ] + MICROKERNEL_TEST_HDRS,
7214 deps = MICROKERNEL_TEST_DEPS,
7215)
7216
7217xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007218 name = "f32_vscale_test",
7219 srcs = [
7220 "test/f32-vscale.cc",
7221 "test/vscale-microkernel-tester.h",
7222 ] + MICROKERNEL_TEST_HDRS,
7223 deps = MICROKERNEL_TEST_DEPS,
7224)
7225
7226xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007227 name = "f32_vscaleexpminusmax_test",
7228 srcs = [
7229 "test/f32-vscaleexpminusmax.cc",
7230 "test/vscaleexpminusmax-microkernel-tester.h",
7231 ] + MICROKERNEL_TEST_HDRS,
7232 deps = MICROKERNEL_TEST_DEPS,
7233)
7234
7235xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007236 name = "f32_vscaleextexp_test",
7237 srcs = [
7238 "test/f32-vscaleextexp.cc",
7239 "test/vscaleextexp-microkernel-tester.h",
7240 ] + MICROKERNEL_TEST_HDRS,
7241 deps = MICROKERNEL_TEST_DEPS,
7242)
7243
7244xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007245 name = "f32_vsigmoid_test",
7246 srcs = [
7247 "test/f32-vsigmoid.cc",
7248 "test/vunary-microkernel-tester.h",
7249 ] + MICROKERNEL_TEST_HDRS,
7250 deps = MICROKERNEL_TEST_DEPS,
7251)
7252
7253xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007254 name = "f32_vsqr_test",
7255 srcs = [
7256 "test/f32-vsqr.cc",
7257 "test/vunary-microkernel-tester.h",
7258 ] + MICROKERNEL_TEST_HDRS,
7259 deps = MICROKERNEL_TEST_DEPS,
7260)
7261
7262xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007263 name = "f32_vsqrdiff_test",
7264 srcs = [
7265 "test/f32-vsqrdiff.cc",
7266 "test/vbinary-microkernel-tester.h",
7267 ] + MICROKERNEL_TEST_HDRS,
7268 deps = MICROKERNEL_TEST_DEPS,
7269)
7270
7271xnnpack_unit_test(
7272 name = "f32_vsqrdiffc_test",
7273 srcs = [
7274 "test/f32-vsqrdiffc.cc",
7275 "test/vbinaryc-microkernel-tester.h",
7276 ] + MICROKERNEL_TEST_HDRS,
7277 deps = MICROKERNEL_TEST_DEPS,
7278)
7279
7280xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007281 name = "f32_vsqrt_test",
7282 srcs = [
7283 "test/f32-vsqrt.cc",
7284 "test/vunary-microkernel-tester.h",
7285 ] + MICROKERNEL_TEST_HDRS,
7286 deps = MICROKERNEL_TEST_DEPS,
7287)
7288
7289xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007290 name = "f32_vsub_test",
7291 srcs = [
7292 "test/f32-vsub.cc",
7293 "test/vbinary-microkernel-tester.h",
7294 ] + MICROKERNEL_TEST_HDRS,
7295 deps = MICROKERNEL_TEST_DEPS,
7296)
7297
7298xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007299 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007300 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007301 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007302 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007303 ] + MICROKERNEL_TEST_HDRS,
7304 deps = MICROKERNEL_TEST_DEPS,
7305)
7306
7307xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007308 name = "f32_vsub_relu_test",
7309 srcs = [
7310 "test/f32-vsub-relu.cc",
7311 "test/vbinary-microkernel-tester.h",
7312 ] + MICROKERNEL_TEST_HDRS,
7313 deps = MICROKERNEL_TEST_DEPS,
7314)
7315
7316xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007317 name = "f32_vsubc_test",
7318 srcs = [
7319 "test/f32-vsubc.cc",
7320 "test/vbinaryc-microkernel-tester.h",
7321 ] + MICROKERNEL_TEST_HDRS,
7322 deps = MICROKERNEL_TEST_DEPS,
7323)
7324
7325xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007326 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007327 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007328 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007329 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007330 ] + MICROKERNEL_TEST_HDRS,
7331 deps = MICROKERNEL_TEST_DEPS,
7332)
7333
7334xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007335 name = "f32_vsubc_relu_test",
7336 srcs = [
7337 "test/f32-vsubc-relu.cc",
7338 "test/vbinaryc-microkernel-tester.h",
7339 ] + MICROKERNEL_TEST_HDRS,
7340 deps = MICROKERNEL_TEST_DEPS,
7341)
7342
7343xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007344 name = "f32_vrsubc_test",
7345 srcs = [
7346 "test/f32-vrsubc.cc",
7347 "test/vbinaryc-microkernel-tester.h",
7348 ] + MICROKERNEL_TEST_HDRS,
7349 deps = MICROKERNEL_TEST_DEPS,
7350)
7351
7352xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007353 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007354 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007355 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007356 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007357 ] + MICROKERNEL_TEST_HDRS,
7358 deps = MICROKERNEL_TEST_DEPS,
7359)
7360
7361xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007362 name = "f32_vrsubc_relu_test",
7363 srcs = [
7364 "test/f32-vrsubc-relu.cc",
7365 "test/vbinaryc-microkernel-tester.h",
7366 ] + MICROKERNEL_TEST_HDRS,
7367 deps = MICROKERNEL_TEST_DEPS,
7368)
7369
7370xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007371 name = "qc8_dwconv_minmax_fp32_test",
7372 timeout = "moderate",
7373 srcs = [
7374 "test/qc8-dwconv-minmax-fp32.cc",
7375 "test/dwconv-microkernel-tester.h",
7376 "src/xnnpack/AlignedAllocator.h",
7377 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7378 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7379)
7380
7381xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007382 name = "qc8_gemm_minmax_fp32_test",
7383 timeout = "moderate",
7384 srcs = [
7385 "test/qc8-gemm-minmax-fp32.cc",
7386 "test/gemm-microkernel-tester.h",
7387 "src/xnnpack/AlignedAllocator.h",
7388 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7389 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7390)
7391
7392xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007393 name = "qc8_igemm_minmax_fp32_test",
7394 timeout = "moderate",
7395 srcs = [
7396 "test/qc8-igemm-minmax-fp32.cc",
7397 "test/gemm-microkernel-tester.h",
7398 "src/xnnpack/AlignedAllocator.h",
7399 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7400 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7401)
7402
7403xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007404 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007405 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007406 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007407 "test/dwconv-microkernel-tester.h",
7408 "src/xnnpack/AlignedAllocator.h",
7409 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7410 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7411)
7412
7413xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007414 name = "qs8_dwconv_minmax_fp32_test",
7415 srcs = [
7416 "test/qs8-dwconv-minmax-fp32.cc",
7417 "test/dwconv-microkernel-tester.h",
7418 "src/xnnpack/AlignedAllocator.h",
7419 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7420 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7421)
7422
7423xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007424 name = "qs8_gavgpool_minmax_test",
7425 srcs = [
7426 "test/qs8-gavgpool-minmax.cc",
7427 "test/gavgpool-microkernel-tester.h",
7428 "src/xnnpack/AlignedAllocator.h",
7429 ] + MICROKERNEL_TEST_HDRS,
7430 deps = MICROKERNEL_TEST_DEPS,
7431)
7432
7433xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007434 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007435 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007436 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007437 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007438 "test/gemm-microkernel-tester.h",
7439 "src/xnnpack/AlignedAllocator.h",
7440 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7441 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7442)
7443
7444xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007445 name = "qs8_gemm_minmax_fp32_test",
7446 timeout = "moderate",
7447 srcs = [
7448 "test/qs8-gemm-minmax-fp32.cc",
7449 "test/gemm-microkernel-tester.h",
7450 "src/xnnpack/AlignedAllocator.h",
7451 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7452 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7453)
7454
7455xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007456 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007457 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007458 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007459 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007460 "test/gemm-microkernel-tester.h",
7461 "src/xnnpack/AlignedAllocator.h",
7462 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7463 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7464)
7465
7466xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007467 name = "qs8_igemm_minmax_fp32_test",
7468 timeout = "moderate",
7469 srcs = [
7470 "test/qs8-igemm-minmax-fp32.cc",
7471 "test/gemm-microkernel-tester.h",
7472 "src/xnnpack/AlignedAllocator.h",
7473 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7474 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7475)
7476
7477xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007478 name = "qs8_requantization_test",
7479 srcs = [
7480 "src/xnnpack/requantization-stubs.h",
7481 "test/qs8-requantization.cc",
7482 "test/requantization-tester.h",
7483 ] + MICROKERNEL_TEST_HDRS,
7484 deps = MICROKERNEL_TEST_DEPS,
7485)
7486
7487xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007488 name = "qs8_vadd_minmax_test",
7489 srcs = [
7490 "test/qs8-vadd-minmax.cc",
7491 "test/vadd-microkernel-tester.h",
7492 ] + MICROKERNEL_TEST_HDRS,
7493 deps = MICROKERNEL_TEST_DEPS,
7494)
7495
7496xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007497 name = "qs8_vaddc_minmax_test",
7498 srcs = [
7499 "test/qs8-vaddc-minmax.cc",
7500 "test/vaddc-microkernel-tester.h",
7501 ] + MICROKERNEL_TEST_HDRS,
7502 deps = MICROKERNEL_TEST_DEPS,
7503)
7504
7505xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007506 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007507 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007508 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007509 "test/avgpool-microkernel-tester.h",
7510 "src/xnnpack/AlignedAllocator.h",
7511 ] + MICROKERNEL_TEST_HDRS,
7512 deps = MICROKERNEL_TEST_DEPS,
7513)
7514
7515xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007516 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007517 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007518 "test/qu8-dwconv-minmax.cc",
7519 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007520 "src/xnnpack/AlignedAllocator.h",
7521 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007522 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007523)
7524
7525xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007526 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007527 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007528 "test/qu8-igemm-minmax.cc",
7529 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007530 "src/xnnpack/AlignedAllocator.h",
7531 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007532 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007533)
7534
7535xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007536 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007537 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007538 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007539 "test/gavgpool-microkernel-tester.h",
7540 "src/xnnpack/AlignedAllocator.h",
7541 ] + MICROKERNEL_TEST_HDRS,
7542 deps = MICROKERNEL_TEST_DEPS,
7543)
7544
7545xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007546 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007547 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007548 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007549 "test/gemm-microkernel-tester.h",
7550 "src/xnnpack/AlignedAllocator.h",
7551 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007552 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007553)
7554
7555xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007556 name = "qu8_requantization_test",
7557 srcs = [
7558 "src/xnnpack/requantization-stubs.h",
7559 "test/qu8-requantization.cc",
7560 "test/requantization-tester.h",
7561 ] + MICROKERNEL_TEST_HDRS,
7562 deps = MICROKERNEL_TEST_DEPS,
7563)
7564
7565xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007566 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007567 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007568 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007569 "test/vadd-microkernel-tester.h",
7570 ] + MICROKERNEL_TEST_HDRS,
7571 deps = MICROKERNEL_TEST_DEPS,
7572)
7573
7574xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007575 name = "u8_lut32norm_test",
7576 srcs = [
7577 "test/u8-lut32norm.cc",
7578 "test/lut-norm-microkernel-tester.h",
7579 ] + MICROKERNEL_TEST_HDRS,
7580 deps = MICROKERNEL_TEST_DEPS,
7581)
7582
7583xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007584 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007585 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007586 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007587 "test/maxpool-microkernel-tester.h",
7588 ] + MICROKERNEL_TEST_HDRS,
7589 deps = MICROKERNEL_TEST_DEPS,
7590)
7591
7592xnnpack_unit_test(
7593 name = "u8_rmax_test",
7594 srcs = [
7595 "test/u8-rmax.cc",
7596 "test/rmax-microkernel-tester.h",
7597 ] + MICROKERNEL_TEST_HDRS,
7598 deps = MICROKERNEL_TEST_DEPS,
7599)
7600
7601xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007602 name = "u8_vclamp_test",
7603 srcs = [
7604 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007605 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007606 ] + MICROKERNEL_TEST_HDRS,
7607 deps = MICROKERNEL_TEST_DEPS,
7608)
7609
7610xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007611 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007612 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007613 "test/x32-depthtospace2d-chw2hwc.cc",
7614 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007615 ] + MICROKERNEL_TEST_HDRS,
7616 deps = MICROKERNEL_TEST_DEPS,
7617)
7618
7619xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007620 name = "x32_fill_test",
7621 srcs = [
7622 "test/x32-fill.cc",
7623 "test/fill-microkernel-tester.h",
7624 ] + MICROKERNEL_TEST_HDRS,
7625 deps = MICROKERNEL_TEST_DEPS,
7626)
7627
7628xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007629 name = "x32_packx_test",
7630 srcs = [
7631 "test/x32-packx.cc",
7632 "test/pack-microkernel-tester.h",
7633 "src/xnnpack/AlignedAllocator.h",
7634 ] + MICROKERNEL_TEST_HDRS,
7635 deps = MICROKERNEL_TEST_DEPS,
7636)
7637
7638xnnpack_unit_test(
7639 name = "x32_pad_test",
7640 srcs = [
7641 "test/x32-pad.cc",
7642 "test/pad-microkernel-tester.h",
7643 ] + MICROKERNEL_TEST_HDRS,
7644 deps = MICROKERNEL_TEST_DEPS,
7645)
7646
7647xnnpack_unit_test(
7648 name = "x32_unpool_test",
7649 srcs = [
7650 "test/x32-unpool.cc",
7651 "test/unpool-microkernel-tester.h",
7652 ] + MICROKERNEL_TEST_HDRS,
7653 deps = MICROKERNEL_TEST_DEPS,
7654)
7655
7656xnnpack_unit_test(
7657 name = "x32_zip_test",
7658 srcs = [
7659 "test/x32-zip.cc",
7660 "test/zip-microkernel-tester.h",
7661 ] + MICROKERNEL_TEST_HDRS,
7662 deps = MICROKERNEL_TEST_DEPS,
7663)
7664
7665xnnpack_unit_test(
7666 name = "x8_lut_test",
7667 srcs = [
7668 "test/x8-lut.cc",
7669 "test/lut-microkernel-tester.h",
7670 ] + MICROKERNEL_TEST_HDRS,
7671 deps = MICROKERNEL_TEST_DEPS,
7672)
7673
7674xnnpack_unit_test(
7675 name = "x8_zip_test",
7676 srcs = [
7677 "test/x8-zip.cc",
7678 "test/zip-microkernel-tester.h",
7679 ] + MICROKERNEL_TEST_HDRS,
7680 deps = MICROKERNEL_TEST_DEPS,
7681)
7682
Marat Dukhan20c3b922020-03-10 03:45:06 -07007683########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007684
7685xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007686 name = "operator_size_test",
7687 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007688 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007689)
7690
Marat Dukhan20c3b922020-03-10 03:45:06 -07007691xnnpack_binary(
7692 name = "subgraph_size_test",
7693 srcs = ["test/subgraph-size.c"],
7694 deps = [":XNNPACK"],
7695)
7696
7697########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007698
7699xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007700 name = "abs_nc_test",
7701 srcs = [
7702 "test/abs-nc.cc",
7703 "test/abs-operator-tester.h",
7704 ],
7705 deps = OPERATOR_TEST_DEPS,
7706)
7707
7708xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007709 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007710 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007711 srcs = [
7712 "test/add-nd.cc",
7713 "test/binary-elementwise-operator-tester.h",
7714 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007715 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007716)
7717
7718xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007719 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007720 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007721 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007722 "test/argmax-pooling-operator-tester.h",
7723 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007724 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007725)
7726
7727xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007728 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007729 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007730 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007731 "test/average-pooling-operator-tester.h",
7732 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007733 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007734)
7735
7736xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007737 name = "bankers_rounding_nc_test",
7738 srcs = [
7739 "test/bankers-rounding-nc.cc",
7740 "test/bankers-rounding-operator-tester.h",
7741 ],
7742 deps = OPERATOR_TEST_DEPS,
7743)
7744
7745xnnpack_unit_test(
7746 name = "ceiling_nc_test",
7747 srcs = [
7748 "test/ceiling-nc.cc",
7749 "test/ceiling-operator-tester.h",
7750 ],
7751 deps = OPERATOR_TEST_DEPS,
7752)
7753
7754xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007755 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007756 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007757 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007758 "test/channel-shuffle-operator-tester.h",
7759 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007760 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007761)
7762
7763xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007764 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007765 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007766 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007767 "test/clamp-operator-tester.h",
7768 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007769 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007770)
7771
7772xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007773 name = "constant_pad_nd_test",
7774 srcs = [
7775 "test/constant-pad-nd.cc",
7776 "test/constant-pad-operator-tester.h",
7777 ],
7778 deps = OPERATOR_TEST_DEPS,
7779)
7780
7781xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007782 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007783 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007784 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007785 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007786 "test/convolution-operator-tester.h",
7787 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007788 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007789)
7790
7791xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007792 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007793 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007794 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007795 "test/convolution-nchw.cc",
7796 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007797 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007798 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007799)
7800
7801xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007802 name = "copy_nc_test",
7803 srcs = [
7804 "test/copy-nc.cc",
7805 "test/copy-operator-tester.h",
7806 ],
7807 deps = OPERATOR_TEST_DEPS,
7808)
7809
7810xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007811 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007812 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007813 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007814 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007815 "test/deconvolution-operator-tester.h",
7816 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007817 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007818)
7819
7820xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007821 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007822 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007823 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007824 "test/depth-to-space-operator-tester.h",
7825 ] + OPERATOR_TEST_PARAMS_HDRS,
7826 deps = OPERATOR_TEST_DEPS,
7827)
7828
7829xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007830 name = "depth_to_space_nhwc_test",
7831 srcs = [
7832 "test/depth-to-space-nhwc.cc",
7833 "test/depth-to-space-operator-tester.h",
7834 ] + OPERATOR_TEST_PARAMS_HDRS,
7835 deps = OPERATOR_TEST_DEPS,
7836)
7837
7838xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007839 name = "divide_nd_test",
7840 srcs = [
7841 "test/binary-elementwise-operator-tester.h",
7842 "test/divide-nd.cc",
7843 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007844 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007845)
7846
7847xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007848 name = "elu_nc_test",
7849 srcs = [
7850 "test/elu-nc.cc",
7851 "test/elu-operator-tester.h",
7852 ],
7853 deps = OPERATOR_TEST_DEPS,
7854)
7855
7856xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007857 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007858 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007859 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007860 "test/fully-connected-operator-tester.h",
7861 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007862 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007863)
7864
7865xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007866 name = "floor_nc_test",
7867 srcs = [
7868 "test/floor-nc.cc",
7869 "test/floor-operator-tester.h",
7870 ],
7871 deps = OPERATOR_TEST_DEPS,
7872)
7873
7874xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007875 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007876 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007877 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007878 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007879 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007880 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007881)
7882
7883xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007884 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007885 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007886 "test/global-average-pooling-ncw.cc",
7887 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007888 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007889 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007890)
7891
7892xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007893 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007894 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007895 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007896 "test/hardswish-operator-tester.h",
7897 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007898 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007899)
7900
7901xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007902 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007903 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007904 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007905 "test/leaky-relu-operator-tester.h",
7906 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007907 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007908)
7909
7910xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007911 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007912 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007913 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007914 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007915 "test/max-pooling-operator-tester.h",
7916 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007917 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007918)
7919
7920xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007921 name = "maximum_nd_test",
7922 srcs = [
7923 "test/binary-elementwise-operator-tester.h",
7924 "test/maximum-nd.cc",
7925 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007926 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007927)
7928
7929xnnpack_unit_test(
7930 name = "minimum_nd_test",
7931 srcs = [
7932 "test/binary-elementwise-operator-tester.h",
7933 "test/minimum-nd.cc",
7934 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007935 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007936)
7937
7938xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007939 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007940 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007941 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007942 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007943 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007944 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007945)
7946
7947xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007948 name = "negate_nc_test",
7949 srcs = [
7950 "test/negate-nc.cc",
7951 "test/negate-operator-tester.h",
7952 ],
7953 deps = OPERATOR_TEST_DEPS,
7954)
7955
7956xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007957 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007958 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007959 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007960 "test/prelu-operator-tester.h",
7961 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007962 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007963)
7964
7965xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007966 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007967 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007968 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007969 "test/resize-bilinear-operator-tester.h",
7970 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007971 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007972)
7973
7974xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007975 name = "resize_bilinear_nchw_test",
7976 srcs = [
7977 "test/resize-bilinear-nchw.cc",
7978 "test/resize-bilinear-operator-tester.h",
7979 ] + OPERATOR_TEST_PARAMS_HDRS,
7980 deps = OPERATOR_TEST_DEPS,
7981)
7982
7983xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007984 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007985 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007986 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007987 "test/sigmoid-operator-tester.h",
7988 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007989 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007990)
7991
7992xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007993 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007994 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007995 "test/softmax-nc.cc",
7996 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007997 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007998 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007999)
8000
8001xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008002 name = "square_nc_test",
8003 srcs = [
8004 "test/square-nc.cc",
8005 "test/square-operator-tester.h",
8006 ],
8007 deps = OPERATOR_TEST_DEPS,
8008)
8009
8010xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008011 name = "square_root_nc_test",
8012 srcs = [
8013 "test/square-root-nc.cc",
8014 "test/square-root-operator-tester.h",
8015 ],
8016 deps = OPERATOR_TEST_DEPS,
8017)
8018
8019xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008020 name = "squared_difference_nd_test",
8021 srcs = [
8022 "test/binary-elementwise-operator-tester.h",
8023 "test/squared-difference-nd.cc",
8024 ],
8025 deps = OPERATOR_TEST_DEPS,
8026)
8027
8028xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008029 name = "subtract_nd_test",
8030 srcs = [
8031 "test/binary-elementwise-operator-tester.h",
8032 "test/subtract-nd.cc",
8033 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008034 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008035)
8036
8037xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008038 name = "truncation_nc_test",
8039 srcs = [
8040 "test/truncation-nc.cc",
8041 "test/truncation-operator-tester.h",
8042 ],
8043 deps = OPERATOR_TEST_DEPS,
8044)
8045
8046xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008047 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008048 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008049 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008050 "test/unpooling-operator-tester.h",
8051 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008052 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008053)
8054
Chao Mei6ddfc602020-05-13 22:29:36 -07008055############################### Misc unit tests ###############################
8056
8057xnnpack_unit_test(
8058 name = "memory_planner_test",
8059 srcs = [
8060 "test/memory-planner-test.cc",
8061 ],
8062 deps = [
8063 ":XNNPACK",
8064 ":memory_planner",
8065 ],
8066)
8067
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008068xnnpack_unit_test(
8069 name = "subgraph_nchw_test",
8070 srcs = [
8071 "src/xnnpack/subgraph.h",
8072 "test/subgraph-nchw.cc",
8073 "test/subgraph-tester.h",
8074 ],
8075 deps = [
8076 ":XNNPACK",
8077 ],
8078)
8079
Marat Dukhan08c4a432019-10-03 09:29:21 -07008080############################# Build configurations #############################
8081
Marat Dukhanb8642352019-10-30 15:43:02 -07008082# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008083config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008084 name = "xnn_enable_assembly_explicit_true",
8085 define_values = {"xnn_enable_assembly": "true"},
8086)
8087
8088# Disables usage of assembly kernels.
8089config_setting(
8090 name = "xnn_enable_assembly_explicit_false",
8091 define_values = {"xnn_enable_assembly": "false"},
8092)
8093
Marat Dukhan9de90e02020-06-18 16:04:12 -07008094# Enables usage of sparse inference.
8095config_setting(
8096 name = "xnn_enable_sparse_explicit_true",
8097 define_values = {"xnn_enable_sparse": "true"},
8098)
8099
8100# Disables usage of sparse inference.
8101config_setting(
8102 name = "xnn_enable_sparse_explicit_false",
8103 define_values = {"xnn_enable_sparse": "false"},
8104)
8105
Marat Dukhan05702cf2020-03-26 15:41:33 -07008106# Disables usage of HMP-aware optimizations.
8107config_setting(
8108 name = "xnn_enable_hmp_explicit_false",
8109 define_values = {"xnn_enable_hmp": "false"},
8110)
8111
Chao Mei6ddfc602020-05-13 22:29:36 -07008112# Enable usage of optimized memory allocation
8113config_setting(
8114 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008115 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008116)
8117
8118# Disable usage of optimized memory allocation
8119config_setting(
8120 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008121 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008122)
8123
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008124# Enable QS8 inference in TFLite-specific version
8125config_setting(
8126 name = "xnn_enable_qs8_explicit_true",
8127 define_values = {"xnn_enable_qs8": "true"},
8128)
8129
8130# Disable QS8 inference in TFLite-specific version
8131config_setting(
8132 name = "xnn_enable_qs8_explicit_false",
8133 define_values = {"xnn_enable_qs8": "false"},
8134)
8135
Marat Dukhanb8642352019-10-30 15:43:02 -07008136# Builds with -c dbg
8137config_setting(
8138 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008139 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008140 "compilation_mode": "dbg",
8141 },
8142)
8143
8144# Builds with -c opt
8145config_setting(
8146 name = "optimized_build",
8147 values = {
8148 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008149 },
8150)
8151
8152config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008153 name = "linux_k8",
8154 values = {"cpu": "k8"},
8155)
8156
8157config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008158 name = "linux_arm",
8159 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008160)
8161
8162config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008163 name = "linux_armeabi",
8164 values = {"cpu": "armeabi"},
8165)
8166
8167config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008168 name = "linux_armhf",
8169 values = {"cpu": "armhf"},
8170)
8171
8172config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008173 name = "linux_armv7a",
8174 values = {"cpu": "armv7a"},
8175)
8176
8177config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008178 name = "linux_aarch64",
8179 values = {"cpu": "aarch64"},
8180)
8181
8182config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008183 name = "android",
8184 values = {"crosstool_top": "//external:android/crosstool"},
8185)
8186
8187config_setting(
8188 name = "android_armv7",
8189 values = {
8190 "crosstool_top": "//external:android/crosstool",
8191 "cpu": "armeabi-v7a",
8192 },
8193)
8194
8195config_setting(
8196 name = "android_arm64",
8197 values = {
8198 "crosstool_top": "//external:android/crosstool",
8199 "cpu": "arm64-v8a",
8200 },
8201)
8202
8203config_setting(
8204 name = "android_x86",
8205 values = {
8206 "crosstool_top": "//external:android/crosstool",
8207 "cpu": "x86",
8208 },
8209)
8210
8211config_setting(
8212 name = "android_x86_64",
8213 values = {
8214 "crosstool_top": "//external:android/crosstool",
8215 "cpu": "x86_64",
8216 },
8217)
8218
8219config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008220 name = "windows_x86_64",
8221 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008222)
8223
8224config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008225 name = "windows_x86_64_clang",
8226 values = {
8227 "compiler": "clang-cl",
8228 "cpu": "x64_windows",
8229 },
8230)
8231
8232config_setting(
8233 name = "windows_x86_64_mingw",
8234 values = {
8235 "compiler": "mingw-gcc",
8236 "cpu": "x64_windows",
8237 },
8238)
8239
8240config_setting(
8241 name = "windows_x86_64_msys",
8242 values = {
8243 "compiler": "msys-gcc",
8244 "cpu": "x64_windows",
8245 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008246)
8247
8248config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008249 name = "macos_x86_64",
8250 values = {
8251 "apple_platform_type": "macos",
8252 "cpu": "darwin",
8253 },
8254)
8255
8256config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008257 name = "macos_arm64",
8258 values = {
8259 "apple_platform_type": "macos",
8260 "cpu": "darwin_arm64",
8261 },
8262)
8263
8264config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008265 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008266 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008267)
8268
8269config_setting(
8270 name = "emscripten_wasm",
8271 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008272 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008273 "cpu": "wasm",
8274 },
8275)
8276
8277config_setting(
8278 name = "emscripten_wasmsimd",
8279 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008280 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008281 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008282 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008283 },
8284)
8285
8286config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008287 name = "ios_armv7",
8288 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008289 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008290 "cpu": "ios_armv7",
8291 },
8292)
8293
8294config_setting(
8295 name = "ios_arm64",
8296 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008297 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008298 "cpu": "ios_arm64",
8299 },
8300)
8301
8302config_setting(
8303 name = "ios_arm64e",
8304 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008305 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008306 "cpu": "ios_arm64e",
8307 },
8308)
8309
8310config_setting(
8311 name = "ios_x86",
8312 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008313 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008314 "cpu": "ios_i386",
8315 },
8316)
8317
8318config_setting(
8319 name = "ios_x86_64",
8320 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008321 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008322 "cpu": "ios_x86_64",
8323 },
8324)
8325
8326config_setting(
8327 name = "watchos_armv7k",
8328 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008329 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008330 "cpu": "watchos_armv7k",
8331 },
8332)
8333
8334config_setting(
8335 name = "watchos_arm64_32",
8336 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008337 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008338 "cpu": "watchos_arm64_32",
8339 },
8340)
8341
8342config_setting(
8343 name = "watchos_x86",
8344 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008345 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008346 "cpu": "watchos_i386",
8347 },
8348)
8349
8350config_setting(
8351 name = "watchos_x86_64",
8352 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008353 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008354 "cpu": "watchos_x86_64",
8355 },
8356)
8357
8358config_setting(
8359 name = "tvos_arm64",
8360 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008361 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008362 "cpu": "tvos_arm64",
8363 },
8364)
8365
8366config_setting(
8367 name = "tvos_x86_64",
8368 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008369 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008370 "cpu": "tvos_x86_64",
8371 },
8372)