blob: 0486f800e39fefd89231465bdc4ca759c2945615 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700252 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
474 "src/math/expm1minus-scalar-rr2-p5.c",
475 "src/math/expm1minus-scalar-rr2-p6.c",
Frank Barchard22136062020-11-24 18:44:46 -0800476 "src/math/expminus-scalar-rr2-lut64-p2.c",
477 "src/math/expminus-scalar-rr2-lut2048-p1.c",
478 "src/math/expminus-scalar-rr2-p5.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
483 "src/math/roundne-scalar-nearbyint.c",
484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
489 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700494 "src/params-init.c",
Marat Dukhan57547062021-06-30 16:53:29 -0700495 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
496 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
497 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
498 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
499 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
500 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
501 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
502 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
503 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
504 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
505 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
506 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhand6021542021-06-30 09:04:20 -0700507 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
508 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
509 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
510 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
511 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
512 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
513 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
514 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
515 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
516 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
517 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
518 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
519 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
520 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
521 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
522 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
523 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
524 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
525 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
526 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
528 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
530 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
531 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
532 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
541 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700542 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
543 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700545 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
546 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
552 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
553 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700554 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
555 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
556 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700557 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
558 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
559 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
560 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
561 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
562 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700563 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
564 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700565 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700566 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
567 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700568 "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700569 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
570 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700571 "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700572 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
573 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700574 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700575 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
576 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700577 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700578 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
579 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700580 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700581 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
582 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700583 "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700584 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
585 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700586 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700587 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
588 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700589 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700590 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
591 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700592 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700593 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
594 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700595 "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700596 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
597 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700598 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700599 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
600 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700601 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700602 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
603 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700604 "src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700605 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
606 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700607 "src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700608 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
609 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700610 "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700611 "src/qs8-requantization/fp32-scalar-lrintf.c",
612 "src/qs8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700613 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700614 "src/qs8-requantization/rndna-scalar-signed64.c",
615 "src/qs8-requantization/rndna-scalar-unsigned32.c",
616 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan062bee32021-05-27 20:31:07 -0700617 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700618 "src/qs8-vadd/gen/minmax-scalar-x1.c",
619 "src/qs8-vadd/gen/minmax-scalar-x2.c",
620 "src/qs8-vadd/gen/minmax-scalar-x4.c",
621 "src/qs8-vaddc/gen/minmax-scalar-x1.c",
622 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
623 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700624 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
625 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700626 "src/qu8-dwconv/up1x9-minmax-gemmlowp-scalar.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700627 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
628 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700629 "src/qu8-gemm/2x2-minmax-gemmlowp-scalar.c",
630 "src/qu8-igemm/2x2-minmax-gemmlowp-scalar.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700631 "src/qu8-requantization/fp32-scalar-lrintf.c",
632 "src/qu8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700633 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700634 "src/qu8-requantization/rndna-scalar-signed64.c",
635 "src/qu8-requantization/rndna-scalar-unsigned32.c",
636 "src/qu8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700637 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700638 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700639 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700640 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700641 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700642 "src/x8-lut/scalar.c",
643 "src/x8-zip/x2-scalar.c",
644 "src/x8-zip/x3-scalar.c",
645 "src/x8-zip/x4-scalar.c",
646 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800647 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700648 "src/x32-fill/scalar-float.c",
649 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700650 "src/x32-packx/x2-scalar.c",
651 "src/x32-packx/x3-scalar.c",
652 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700653 "src/x32-pad/scalar-float.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700654 "src/x32-pad/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700655 "src/x32-unpool/scalar.c",
656 "src/x32-zip/x2-scalar.c",
657 "src/x32-zip/x3-scalar.c",
658 "src/x32-zip/x4-scalar.c",
659 "src/x32-zip/xm-scalar.c",
Marat Dukhan048931b2020-11-24 20:53:54 -0800660 "src/xx-copy/memcpy.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700661]
662
Marat Dukhan436ebe62019-12-04 15:10:12 -0800663WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700664 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
665 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700666 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
667 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700668 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
669 "src/f32-dwconv/gen/up1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700670 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
671 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700672 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
673 "src/f32-dwconv/gen/up1x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700674 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
675 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700676 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
677 "src/f32-dwconv/gen/up1x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700678 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
679 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700680 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
681 "src/f32-dwconv/gen/up2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700682 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
683 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700684 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
685 "src/f32-dwconv/gen/up2x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700686 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
687 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700688 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
689 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700690 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
691 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700692 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
693 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
694 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
695 "src/f32-gemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700696 "src/f32-gemm/gen/1x4-relu-wasm.c",
697 "src/f32-gemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700698 "src/f32-gemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700699 "src/f32-gemm/gen/2x4-relu-wasm.c",
700 "src/f32-gemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700701 "src/f32-gemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700702 "src/f32-gemm/gen/4x2-relu-wasm.c",
703 "src/f32-gemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700704 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700705 "src/f32-gemm/gen/4x4-relu-wasm.c",
706 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700707 "src/f32-igemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700708 "src/f32-igemm/gen/1x4-relu-wasm.c",
709 "src/f32-igemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700710 "src/f32-igemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700711 "src/f32-igemm/gen/2x4-relu-wasm.c",
712 "src/f32-igemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700713 "src/f32-igemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700714 "src/f32-igemm/gen/4x2-relu-wasm.c",
715 "src/f32-igemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700716 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700717 "src/f32-igemm/gen/4x4-relu-wasm.c",
718 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700719 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
720 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
721 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700722 "src/f32-prelu/gen/wasm-2x1.c",
723 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700724 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
725 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
726 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700727 "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700728 "src/f32-vbinary/gen/vadd-relu-wasm-x1.c",
729 "src/f32-vbinary/gen/vadd-relu-wasm-x2.c",
730 "src/f32-vbinary/gen/vadd-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700731 "src/f32-vbinary/gen/vadd-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700732 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
733 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
734 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
735 "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700736 "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c",
737 "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c",
738 "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700739 "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700740 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
741 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
742 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
743 "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700744 "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c",
745 "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c",
746 "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700747 "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700748 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
749 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
750 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
751 "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700752 "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c",
753 "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c",
754 "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700755 "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800756 "src/f32-vbinary/gen/vmax-wasm-x1.c",
757 "src/f32-vbinary/gen/vmax-wasm-x2.c",
758 "src/f32-vbinary/gen/vmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700759 "src/f32-vbinary/gen/vmax-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800760 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
761 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
762 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700763 "src/f32-vbinary/gen/vmaxc-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800764 "src/f32-vbinary/gen/vmin-wasm-x1.c",
765 "src/f32-vbinary/gen/vmin-wasm-x2.c",
766 "src/f32-vbinary/gen/vmin-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700767 "src/f32-vbinary/gen/vmin-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800768 "src/f32-vbinary/gen/vminc-wasm-x1.c",
769 "src/f32-vbinary/gen/vminc-wasm-x2.c",
770 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700771 "src/f32-vbinary/gen/vminc-wasm-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700772 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
773 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
774 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700775 "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700776 "src/f32-vbinary/gen/vmul-relu-wasm-x1.c",
777 "src/f32-vbinary/gen/vmul-relu-wasm-x2.c",
778 "src/f32-vbinary/gen/vmul-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700779 "src/f32-vbinary/gen/vmul-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700780 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
781 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
782 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
783 "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700784 "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c",
785 "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c",
786 "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700787 "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700788 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
789 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
790 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
791 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700792 "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c",
793 "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c",
794 "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700795 "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700796 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
797 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
798 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
799 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700800 "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c",
801 "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c",
802 "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700803 "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700804 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
805 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
806 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
807 "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700808 "src/f32-vbinary/gen/vsub-relu-wasm-x1.c",
809 "src/f32-vbinary/gen/vsub-relu-wasm-x2.c",
810 "src/f32-vbinary/gen/vsub-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700811 "src/f32-vbinary/gen/vsub-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700812 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
813 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
814 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
815 "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700816 "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c",
817 "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c",
818 "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700819 "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700820 "src/f32-vclamp/gen/vclamp-wasm-x1.c",
821 "src/f32-vclamp/gen/vclamp-wasm-x2.c",
822 "src/f32-vclamp/gen/vclamp-wasm-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800823 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c",
824 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c",
825 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c",
826 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c",
827 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c",
828 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c",
829 "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c",
830 "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c",
831 "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c",
832 "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c",
833 "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c",
834 "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700835 "src/f32-vhswish/gen/vhswish-wasm-x1.c",
836 "src/f32-vhswish/gen/vhswish-wasm-x2.c",
837 "src/f32-vhswish/gen/vhswish-wasm-x4.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700838 "src/f32-vlrelu/gen/vlrelu-wasm-x1.c",
839 "src/f32-vlrelu/gen/vlrelu-wasm-x2.c",
840 "src/f32-vlrelu/gen/vlrelu-wasm-x4.c",
Frank Barchardd4416d62021-05-17 15:51:37 -0700841 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
842 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
843 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700844 "src/f32-vrelu/gen/vrelu-wasm-x1.c",
845 "src/f32-vrelu/gen/vrelu-wasm-x2.c",
846 "src/f32-vrelu/gen/vrelu-wasm-x4.c",
847 "src/f32-vrelu/gen/vrelu-wasm-x8.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800848]
849
Marat Dukhan290055c2020-06-09 12:24:29 -0700850WASMSIMD_UKERNELS = [
Marat Dukhan40f05522020-07-16 22:33:12 -0700851 "src/f32-argmaxpool/4x-wasmsimd-c4.c",
852 "src/f32-argmaxpool/9p8x-wasmsimd-c4.c",
853 "src/f32-argmaxpool/9x-wasmsimd-c4.c",
Marat Dukhan3b7432d2020-07-16 17:46:32 -0700854 "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c",
855 "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c",
856 "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c",
857 "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard22136062020-11-24 18:44:46 -0800858 "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800859 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700860 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800861 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700862 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700863 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800864 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700865 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800866 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700867 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700868 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800869 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700870 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800871 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700872 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
873 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800874 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700875 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800876 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700877 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700878 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800879 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700880 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800881 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700882 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700883 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800884 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700885 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800886 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700887 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
888 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800889 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
890 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
891 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
892 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
893 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
894 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
895 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
896 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
897 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c",
898 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800899 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
900 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
901 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
902 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c",
903 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
904 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c",
905 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c",
906 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c",
907 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c",
908 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800909 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
910 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
911 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
912 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
913 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
914 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
915 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
916 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
917 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c",
918 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800919 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
920 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
921 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
922 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c",
923 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
924 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c",
925 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c",
926 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c",
927 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c",
928 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c",
Frank Barchardc5704bf2020-12-21 23:09:00 -0800929 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
930 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
931 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
932 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
933 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
934 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
935 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
936 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800937 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
938 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
939 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
940 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c",
941 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
942 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c",
943 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c",
944 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c",
Frank Barchardcadd4222021-01-20 16:27:25 -0800945 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
946 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
947 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
948 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
949 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
950 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
951 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
952 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800953 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
954 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
955 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
956 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c",
957 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
958 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c",
959 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c",
960 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -0800961 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
962 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
963 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
964 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
965 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
966 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
967 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
968 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
969 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
970 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
971 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c",
972 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c",
973 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800974 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
975 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
976 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
977 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
978 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c",
979 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
980 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
981 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c",
982 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
983 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c",
984 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c",
985 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c",
986 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -0800987 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
988 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
989 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
990 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
991 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
992 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
993 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
994 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
995 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
996 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
997 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c",
998 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c",
999 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001000 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1001 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1002 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1003 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1004 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c",
1005 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1006 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1007 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c",
1008 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1009 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c",
1010 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c",
1011 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c",
1012 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001013 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1014 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1015 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1016 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1017 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1018 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1019 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1020 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1021 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1022 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001023 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1024 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1025 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1026 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1027 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c",
1028 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1029 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1030 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c",
1031 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1032 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001033 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1034 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1035 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1036 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1037 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1038 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1039 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1040 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1041 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1042 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001043 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1044 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1045 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1046 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1047 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c",
1048 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1049 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1050 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c",
1051 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1052 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001053 "src/f32-gavgpool-cw/wasmsimd-arm-x4.c",
1054 "src/f32-gavgpool-cw/wasmsimd-x86-x4.c",
Marat Dukhanc6016802020-07-16 18:51:28 -07001055 "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c",
1056 "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c",
1057 "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c",
1058 "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001059 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c",
1060 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c",
1061 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c",
1062 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001063 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
1064 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001065 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c",
1066 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c",
1067 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c",
1068 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001069 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
1070 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001071 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c",
1072 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c",
1073 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c",
1074 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001075 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
1076 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001077 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c",
1078 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c",
1079 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c",
1080 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001081 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
1082 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001083 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c",
1084 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c",
1085 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c",
1086 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001087 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
1088 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001089 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1090 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1091 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1092 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001093 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c",
1094 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
1095 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1096 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001097 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1098 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1099 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1100 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001101 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1102 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1103 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1104 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1105 "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c",
1106 "src/f32-gemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001107 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1108 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1109 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1110 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001111 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c",
1112 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
1113 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1114 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001115 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1116 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1117 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1118 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001119 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c",
1120 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
1121 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1122 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001123 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1124 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1125 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1126 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001127 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1128 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
XNNPACK Team965272b2020-10-23 21:10:15 -07001129 "src/f32-ibilinear-chw/gen/wasmsimd-p4.c",
1130 "src/f32-ibilinear-chw/gen/wasmsimd-p8.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001131 "src/f32-ibilinear/gen/wasmsimd-c4.c",
1132 "src/f32-ibilinear/gen/wasmsimd-c8.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001133 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1134 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1135 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1136 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001137 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c",
1138 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
1139 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1140 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001141 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1142 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1143 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1144 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001145 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1146 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1147 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1148 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1149 "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c",
1150 "src/f32-igemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001151 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1152 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1153 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1154 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001155 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c",
1156 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
1157 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1158 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001159 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1160 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1161 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1162 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001163 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c",
1164 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
1165 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1166 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001167 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1168 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1169 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1170 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001171 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1172 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhanf6e24802020-07-08 22:20:40 -07001173 "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c",
1174 "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c",
Marat Dukhan1483c532020-07-16 18:08:19 -07001175 "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c",
1176 "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c",
1177 "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c",
1178 "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001179 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1180 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001181 "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c",
1182 "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c",
1183 "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001184 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
1185 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001186 "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c",
1187 "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c",
1188 "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c",
1189 "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c",
1190 "src/f32-prelu/gen/wasmsimd-minmax-1x4.c",
1191 "src/f32-prelu/gen/wasmsimd-minmax-1x8.c",
1192 "src/f32-prelu/gen/wasmsimd-minmax-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001193 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
1194 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001195 "src/f32-prelu/gen/wasmsimd-minmax-2x16.c",
1196 "src/f32-prelu/gen/wasmsimd-minmax-4x4.c",
1197 "src/f32-prelu/gen/wasmsimd-minmax-4x8.c",
1198 "src/f32-prelu/gen/wasmsimd-minmax-4x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001199 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001200 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001201 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001202 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c",
1203 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001204 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001205 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c",
1206 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001207 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001208 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c",
1209 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001210 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c",
Marat Dukhan8c417962020-07-08 12:27:50 -07001211 "src/f32-rmax/wasmsimd-arm.c",
1212 "src/f32-rmax/wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001213 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c",
1214 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001215 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c",
1216 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001217 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001218 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c",
1219 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001220 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c",
1221 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001222 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001223 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c",
1224 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001225 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c",
1226 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001227 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001228 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c",
1229 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001230 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c",
1231 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001232 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001233 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c",
1234 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001235 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c",
1236 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001237 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001238 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c",
1239 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001240 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c",
1241 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001242 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001243 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c",
1244 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001245 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c",
1246 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001247 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001248 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c",
1249 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001250 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c",
1251 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001252 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001253 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
1254 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001255 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001256 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
1257 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001258 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001259 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c",
1260 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001261 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001262 "src/f32-vbinary/gen/vadd-wasmsimd-x4.c",
1263 "src/f32-vbinary/gen/vadd-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001264 "src/f32-vbinary/gen/vadd-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001265 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
1266 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001267 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001268 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
1269 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001270 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001271 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c",
1272 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001273 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001274 "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c",
1275 "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001276 "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001277 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
1278 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001279 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001280 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
1281 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001282 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001283 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c",
1284 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001285 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001286 "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c",
1287 "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001288 "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001289 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
1290 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001291 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001292 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
1293 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001294 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001295 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c",
1296 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001297 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001298 "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c",
1299 "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001300 "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001301 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
1302 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001303 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001304 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
1305 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001306 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001307 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
1308 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001309 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001310 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
1311 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001312 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001313 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
1314 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001315 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001316 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
1317 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001318 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001319 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
1320 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001321 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001322 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
1323 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001324 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001325 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
1326 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001327 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001328 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
1329 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001330 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001331 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c",
1332 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001333 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001334 "src/f32-vbinary/gen/vmul-wasmsimd-x4.c",
1335 "src/f32-vbinary/gen/vmul-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001336 "src/f32-vbinary/gen/vmul-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001337 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
1338 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001339 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001340 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
1341 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001342 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001343 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c",
1344 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001345 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001346 "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c",
1347 "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001348 "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001349 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
1350 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001351 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001352 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
1353 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001354 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001355 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c",
1356 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001357 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001358 "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c",
1359 "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001360 "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001361 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
1362 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001363 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001364 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
1365 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001366 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001367 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c",
1368 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001369 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001370 "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c",
1371 "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001372 "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001373 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
1374 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001375 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001376 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
1377 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001378 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001379 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
1380 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001381 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001382 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
1383 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001384 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001385 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c",
1386 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001387 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001388 "src/f32-vbinary/gen/vsub-wasmsimd-x4.c",
1389 "src/f32-vbinary/gen/vsub-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001390 "src/f32-vbinary/gen/vsub-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001391 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
1392 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001393 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001394 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
1395 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001396 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001397 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c",
1398 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001399 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001400 "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c",
1401 "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001402 "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001403 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
1404 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c",
1405 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c",
1406 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001407 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
1408 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c",
1409 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c",
1410 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c",
1411 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c",
1412 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001413 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c",
1414 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c",
1415 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c",
1416 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c",
1417 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c",
1418 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08001419 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c",
1420 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c",
1421 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c",
1422 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c",
1423 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c",
1424 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001425 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c",
1426 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c",
1427 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c",
1428 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c",
1429 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c",
1430 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001431 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1432 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1433 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001434 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1435 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1436 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1437 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001438 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001439 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001440 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001441 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001442 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1443 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1444 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001445 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1446 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1447 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1448 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001449 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1450 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
1451 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1452 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1453 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1454 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
1455 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1456 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1457 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1458 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001459 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1460 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1461 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1462 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1463 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1464 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1465 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1466 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1467 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1468 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1469 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1470 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001471 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1472 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001473 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1474 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1475 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1476 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1477 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1478 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001479 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1480 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1481 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1482 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001483 "src/math/roundd-wasmsimd-addsub.c",
1484 "src/math/roundd-wasmsimd-cvt.c",
1485 "src/math/roundne-wasmsimd-addsub.c",
1486 "src/math/roundu-wasmsimd-addsub.c",
1487 "src/math/roundu-wasmsimd-cvt.c",
1488 "src/math/roundz-wasmsimd-addsub.c",
1489 "src/math/roundz-wasmsimd-cvt.c",
1490 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1491 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhan313eef72021-06-30 16:11:31 -07001492 "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001493 "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1494 "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1495 "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1496 "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1497 "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001498 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001499 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001500 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001501 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001502 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001503 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001504 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001505 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001506 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001507 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001508 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001509 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan69aa6232021-06-30 14:17:26 -07001510 "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1511 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001512 "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1513 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c",
1514 "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1515 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
1516 "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1517 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c",
1518 "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1519 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
1520 "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
1521 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07001522 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
1523 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
1524 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
1526 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
1527 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001528 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001529 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001530 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001531 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001532 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001533 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001534 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001535 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001536 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001537 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001538 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001539 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001540 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001541 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001542 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001543 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001544 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001545 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001546 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001547 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001548 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001549 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001550 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001551 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001552 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001553 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001554 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001555 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001556 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001557 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1558 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
1559 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
1560 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1561 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1562 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1563 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1564 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001565 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001566 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001567 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001568 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001569 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001570 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001571 "src/x32-zip/x2-wasmsimd.c",
1572 "src/x32-zip/x3-wasmsimd.c",
1573 "src/x32-zip/x4-wasmsimd.c",
1574 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001575]
1576
Marat Dukhan08c4a432019-10-03 09:29:21 -07001577# ISA-specific micro-kernels
1578NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001579 "src/f32-argmaxpool/4x-neon-c4.c",
1580 "src/f32-argmaxpool/9p8x-neon-c4.c",
1581 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001582 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1583 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001584 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001585 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001586 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001587 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001588 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001589 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001590 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001591 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001592 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001593 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001595 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001596 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001597 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001598 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1599 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1600 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1601 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1602 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001603 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001604 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001605 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1606 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1607 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001608 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001609 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001610 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1611 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1612 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1613 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1614 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001615 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1616 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1617 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001618 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001619 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001620 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1621 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1622 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001623 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1624 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1625 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1626 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001627 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001628 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1629 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001630 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001631 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001632 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001633 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001634 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1635 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001636 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1637 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1638 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1639 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1640 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1641 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1642 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1643 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001644 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001645 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001646 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001647 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1648 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001649 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001650 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1651 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001652 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001653 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1654 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1655 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1656 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1657 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001658 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1659 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001660 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1661 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001662 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1663 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001664 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1665 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1666 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1667 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1668 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1669 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1670 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1671 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1672 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1673 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1674 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1675 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1676 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1677 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1678 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1679 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001680 "src/f32-ibilinear-chw/gen/neon-p4.c",
1681 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001682 "src/f32-ibilinear/gen/neon-c4.c",
1683 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001684 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001685 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001686 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001687 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1688 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001689 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001690 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1691 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1692 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1693 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001694 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1695 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001696 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1697 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001698 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1699 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001700 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1701 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1702 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001703 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1704 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001705 "src/f32-prelu/gen/neon-1x4.c",
1706 "src/f32-prelu/gen/neon-1x8.c",
1707 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001708 "src/f32-prelu/gen/neon-2x4.c",
1709 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001710 "src/f32-prelu/gen/neon-2x16.c",
1711 "src/f32-prelu/gen/neon-4x4.c",
1712 "src/f32-prelu/gen/neon-4x8.c",
1713 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001714 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001715 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001716 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001717 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1718 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001719 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001720 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1721 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001722 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001723 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1724 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001725 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1726 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1727 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1728 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1729 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1730 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1731 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1732 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1733 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1734 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1735 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1736 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1737 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001738 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001739 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1740 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1741 "src/f32-spmm/gen/4x1-minmax-neon.c",
1742 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1743 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1744 "src/f32-spmm/gen/8x1-minmax-neon.c",
1745 "src/f32-spmm/gen/12x1-minmax-neon.c",
1746 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1747 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1748 "src/f32-spmm/gen/16x1-minmax-neon.c",
1749 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1750 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1751 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001752 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1753 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1754 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1755 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001756 "src/f32-vbinary/gen/vmax-neon-x4.c",
1757 "src/f32-vbinary/gen/vmax-neon-x8.c",
1758 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1759 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1760 "src/f32-vbinary/gen/vmin-neon-x4.c",
1761 "src/f32-vbinary/gen/vmin-neon-x8.c",
1762 "src/f32-vbinary/gen/vminc-neon-x4.c",
1763 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001764 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1765 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1766 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1767 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1768 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1769 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001770 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1771 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1772 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1773 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001774 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1775 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1776 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1777 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001778 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1779 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001780 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1781 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1782 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1783 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1784 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1785 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1786 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1787 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1788 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1789 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1790 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1791 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001792 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1793 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1794 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001795 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1796 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001797 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1798 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001799 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1800 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001801 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1802 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001803 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1804 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1805 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1806 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1807 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1808 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001809 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1810 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1811 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1812 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1813 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1814 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1815 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1816 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1817 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1818 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1819 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1820 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1821 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1822 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1823 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1824 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1825 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1826 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001827 "src/f32-vunary/gen/vabs-neon-x4.c",
1828 "src/f32-vunary/gen/vabs-neon-x8.c",
1829 "src/f32-vunary/gen/vneg-neon-x4.c",
1830 "src/f32-vunary/gen/vneg-neon-x8.c",
1831 "src/f32-vunary/gen/vsqr-neon-x4.c",
1832 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001833 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1834 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001835 "src/math/roundd-neon-addsub.c",
1836 "src/math/roundd-neon-cvt.c",
1837 "src/math/roundne-neon-addsub.c",
1838 "src/math/roundu-neon-addsub.c",
1839 "src/math/roundu-neon-cvt.c",
1840 "src/math/roundz-neon-addsub.c",
1841 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001842 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1843 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1844 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1845 "src/math/sqrt-neon-nr1rsqrts.c",
1846 "src/math/sqrt-neon-nr2rsqrts.c",
1847 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001848 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
1849 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
1850 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
1851 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1852 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1853 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1854 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1855 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001856 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001857 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1858 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001859 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001860 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1861 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001862 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001863 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1864 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001865 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001866 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1867 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001868 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001869 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001870 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001871 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001872 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001873 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001874 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001875 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001876 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001877 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001878 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001879 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001880 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001881 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001882 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001883 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001884 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1885 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1886 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1887 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001888 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1889 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1890 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1891 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001892 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1893 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1894 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001895 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001896 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1897 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001898 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001899 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001900 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1901 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001902 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001903 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1904 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1905 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1906 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1907 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1908 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1909 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1910 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1911 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1912 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1913 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001914 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001915 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1916 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001917 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001918 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001919 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1920 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1921 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1922 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1923 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1924 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1925 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1926 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1927 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1928 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1929 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1930 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1931 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1932 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1933 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1934 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1935 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1936 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1937 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1938 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1939 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1940 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1941 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1942 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1943 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1944 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1945 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1946 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1947 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1948 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1949 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1950 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1951 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1952 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001953 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001954 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1955 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1956 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1957 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1958 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1959 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1960 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1961 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1962 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1963 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1964 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1965 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1966 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1967 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1968 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001969 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001970 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1971 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07001972 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001973 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001974 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1975 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001976 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001977 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1978 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1979 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1980 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1981 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1982 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1983 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1984 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1985 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1986 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1987 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001988 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001989 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1990 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07001991 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001992 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001993 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1994 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1995 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1996 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1997 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1998 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1999 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2000 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2001 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2002 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2003 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2004 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2005 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2006 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2007 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2008 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2009 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2010 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2011 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2012 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2013 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2014 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2015 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2016 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2017 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2018 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2019 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2020 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2021 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2022 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2023 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2024 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2025 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2026 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002027 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002028 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2029 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2030 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2031 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2032 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2033 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2034 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2035 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2036 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2037 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2038 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2039 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002040 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002041 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002042 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07002043 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002044 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2045 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2046 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2047 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2048 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2049 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2050 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2051 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002052 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2053 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002054 "src/qu8-dwconv/up8x9-minmax-gemmlowp-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002055 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2056 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002057 "src/qu8-gemm/4x8-minmax-gemmlowp-neon.c",
2058 "src/qu8-gemm/8x8-minmax-gemmlowp-neon.c",
2059 "src/qu8-igemm/4x8-minmax-gemmlowp-neon.c",
2060 "src/qu8-igemm/8x8-minmax-gemmlowp-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002061 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002062 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002063 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002064 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002065 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002066 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002067 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002068 "src/x8-zip/x2-neon.c",
2069 "src/x8-zip/x3-neon.c",
2070 "src/x8-zip/x4-neon.c",
2071 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002072 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002073 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002074 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002075 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002076 "src/x32-zip/x2-neon.c",
2077 "src/x32-zip/x3-neon.c",
2078 "src/x32-zip/x4-neon.c",
2079 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002080]
2081
2082NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002083 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2084 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2085 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2086 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2087 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2088 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2089 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2090 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2091 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2092 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2093 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2094 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2095 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2096 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2097 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2098 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2099 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2100 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2101 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2102 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2103 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2104 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2105 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2106 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2107 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2108 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2109 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2110 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2111 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2112 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002113 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2114 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002115 "src/f32-ibilinear/gen/neonfma-c4.c",
2116 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002117 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002118 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002119 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002120 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2121 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002122 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2123 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002124 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2125 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002126 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2127 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002128 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002129 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002130 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002131 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2132 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002133 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002134 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2135 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002136 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002137 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2138 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002139 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2140 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2141 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2142 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2143 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2144 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2145 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2146 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2147 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2148 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2149 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2150 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2151 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002152 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2153 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2154 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2155 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2156 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2157 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2158 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2159 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2160 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2161 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2162 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2163 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2164 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002165 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2166 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2167 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2168 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2169 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2170 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2171 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2172 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2173 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2174 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2175 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2176 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002177 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2178 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002179 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2180 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2181 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2182 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2183 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2184 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2185 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2186 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2187 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2188 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2189 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2190 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2191 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2192 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2193 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2194 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2195 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2196 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2197 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2198 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2199 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2200 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2201 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2202 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2203 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2204 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2205 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2206 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2209 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2223 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2224 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2225 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2226 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2227 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2228 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2229 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2230 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2231 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2232 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002233 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2234 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2235 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2236 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2237 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2238 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2239 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2240 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2241 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2242 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2243 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2244 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2245 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2246 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2247 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2248 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2249 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2250 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2251 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2252 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002253 "src/math/exp-neonfma-rr2-lut64-p2.c",
2254 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002255 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2256 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002257 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2258 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2259 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002260 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2261 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2262 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002263 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2264 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2265 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002266 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2267 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2268 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002269 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2270 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2271 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002272 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2273 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2274 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002275 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2276 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2277 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002278 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002279 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002280 "src/math/sqrt-neonfma-nr2fma.c",
2281 "src/math/sqrt-neonfma-nr2fma1adj.c",
2282 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002283]
2284
2285AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002286 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002287 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002288 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002289 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002290 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002291 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002292 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002293 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002294 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002295 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2296 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
2297 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002298 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002299 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002300 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
2301 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
2302 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
2303 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2304 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002305 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2306 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2307 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002308 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002309 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002310 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2311 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2312 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002313 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2314 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2315 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2316 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002317 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002318 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2319 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002320 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002321 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002322 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002323 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002324 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2325 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002326 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2327 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2328 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2329 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2330 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2331 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2332 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2333 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002334 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002335 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002336 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2337 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2338 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2339 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2340 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2341 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2342 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2343 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2344 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2345 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2346 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2347 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2348 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2349 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2350 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2351 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2352 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2353 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2354 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2355 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002356 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2357 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002358 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2359 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002360 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2361 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002362 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2363 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002364 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2365 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002366 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2367 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2368 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2369 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2370 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2371 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002372 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2373 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2374 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2375 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2376 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2377 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2378 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2379 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2380 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2381 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2382 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2383 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2384 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2385 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2386 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2387 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2388 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2389 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002390 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2391 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002392 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002393 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002394 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002395 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002396 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002397 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002398]
2399
Marat Dukhan8853b822020-05-07 12:19:01 -07002400NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002401 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2402 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002403 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2404 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2405 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2406 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2407 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2408 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002409 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002410 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002411 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002412 "src/math/roundz-neonv8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002413 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2414 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2415 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2416 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2417 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2418 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2419 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2420 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002421 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002422 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2423 "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002424 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002425 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2426 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002427 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002428 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2429 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002430 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002431 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2432 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002433 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2434 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2435 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2436 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2437 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2438 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2439 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2440 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002441 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002442 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2443 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002444 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002445 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2446 "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002447 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002448 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2449 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002450 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002451 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2452 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002453]
2454
Marat Dukhan08c4a432019-10-03 09:29:21 -07002455AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchard5a599a62020-06-04 20:12:44 -07002456 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
2457 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
2458 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2459 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002460 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2461 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2462 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2463 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2464 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2465 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2466 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2467 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002468 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2469 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002470 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
2471 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
2472 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2473 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2474 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2475 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
2476 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2477 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2478 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2479 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2480 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2481 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2482 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2483 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2484 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2485 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002486 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2487 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2488 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2489 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2490 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2491 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2492 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2493 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002494 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002495 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002496 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002497 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002498 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002499 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002500 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002501 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002502 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002503 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2504 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2505 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2506 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2507 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2508 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2509 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2510 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2511 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2512 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2513 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2514 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2515 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2516 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2517 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2518 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2519 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2520 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2521 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2522 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2523 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2524 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2525 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2526 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2527 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2528 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2529 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2530 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2531 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002532 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2533 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002534 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2535 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002536 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2537 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002538 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2539 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002540]
2541
Benoit Jacoba9644732020-08-13 12:48:55 -07002542NEONDOT_UKERNELS = [
Marat Dukhane76478b2021-06-28 16:35:40 -07002543 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2544 "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2545 "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2546 "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2547 "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2548 "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2549 "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2550 "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2551 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2552 "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2553 "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2554 "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2555 "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2556 "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2557 "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2558 "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002559 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2560 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002561 "src/qs8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2562 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002563 "src/qs8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2564 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002565 "src/qs8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2566 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002567 "src/qs8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2568 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002569 "src/qs8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2570 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002571 "src/qs8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2572 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002573 "src/qs8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2574 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002575 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2576 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002577 "src/qs8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2578 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002579 "src/qs8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2580 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002581 "src/qs8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2582 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002583 "src/qs8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2584 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002585 "src/qs8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2586 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002587 "src/qs8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2588 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002589 "src/qs8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
2590 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002591]
2592
Marat Dukhan08c4a432019-10-03 09:29:21 -07002593SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -07002594 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
2595 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07002596 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
2597 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002598 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
2599 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
2600 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
2601 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002602 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2603 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002604 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2605 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2606 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2607 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002608 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2609 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002610 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2611 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2612 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002613 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002614 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002615 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2616 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2617 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2618 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2619 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002620 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2621 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2622 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002623 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002624 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002625 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2626 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2627 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002628 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2629 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2630 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2631 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2632 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2633 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2634 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2635 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2636 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2637 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2638 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2639 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2640 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002641 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2642 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2643 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2644 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2645 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2646 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2647 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2648 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002649 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002650 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002651 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002652 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2653 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002654 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2655 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2656 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002657 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2658 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2659 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002660 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2661 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2662 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002663 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2664 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2665 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002666 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2667 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2668 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002669 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2670 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2671 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002672 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2673 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2674 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2675 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002676 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2677 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2678 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002679 "src/f32-ibilinear-chw/gen/sse-p4.c",
2680 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002681 "src/f32-ibilinear/gen/sse-c4.c",
2682 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002683 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2684 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2685 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002686 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2687 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2688 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002689 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2690 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2691 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2692 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002693 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2694 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2695 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002696 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2697 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2698 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002699 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002700 "src/f32-prelu/gen/sse-2x4.c",
2701 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002702 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002703 "src/f32-spmm/gen/4x1-minmax-sse.c",
2704 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002705 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002706 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002707 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2708 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2709 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2710 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2711 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2712 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2713 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2714 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002715 "src/f32-vbinary/gen/vmax-sse-x4.c",
2716 "src/f32-vbinary/gen/vmax-sse-x8.c",
2717 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2718 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2719 "src/f32-vbinary/gen/vmin-sse-x4.c",
2720 "src/f32-vbinary/gen/vmin-sse-x8.c",
2721 "src/f32-vbinary/gen/vminc-sse-x4.c",
2722 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002723 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2724 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2725 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2726 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2727 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2728 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2729 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2730 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002731 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2732 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2733 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2734 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002735 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2736 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2737 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2738 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002739 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2740 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002741 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2742 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002743 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2744 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002745 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2746 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002747 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2748 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002749 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2750 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002751 "src/f32-vunary/gen/vabs-sse-x4.c",
2752 "src/f32-vunary/gen/vabs-sse-x8.c",
2753 "src/f32-vunary/gen/vneg-sse-x4.c",
2754 "src/f32-vunary/gen/vneg-sse-x8.c",
2755 "src/f32-vunary/gen/vsqr-sse-x4.c",
2756 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002757 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002758 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002759 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002760 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002761 "src/math/sqrt-sse-hh1mac.c",
2762 "src/math/sqrt-sse-nr1mac.c",
2763 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002764 "src/x32-fill/sse.c",
2765 "src/x32-packx/x4-sse.c",
2766 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002767]
2768
2769SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002770 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002771 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002772 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002773 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2774 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2775 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2776 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2777 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2778 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2779 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2780 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2781 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2782 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2783 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2784 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002785 "src/f32-prelu/gen/sse2-2x4.c",
2786 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002787 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002788 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002789 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002790 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2791 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002792 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002793 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2794 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002795 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002796 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2797 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002798 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002799 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2800 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2801 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2802 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2803 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2804 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2805 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2806 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2807 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2808 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2809 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2810 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002811 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2812 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002813 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2814 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002815 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2816 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2817 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2818 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2819 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2820 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002821 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2822 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2823 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2824 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2825 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2826 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2827 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2828 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2829 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2830 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2831 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2832 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002833 "src/math/exp-sse2-rr2-lut64-p2.c",
2834 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002835 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002836 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002837 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002838 "src/math/roundd-sse2-cvt.c",
2839 "src/math/roundne-sse2-cvt.c",
2840 "src/math/roundu-sse2-cvt.c",
2841 "src/math/roundz-sse2-cvt.c",
2842 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2843 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2844 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2845 "src/math/sigmoid-sse2-rr2-p5-div.c",
2846 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2847 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002848 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2849 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2850 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2851 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2852 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2853 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002854 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002855 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002856 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002857 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002858 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002859 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002860 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002861 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002862 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002863 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002864 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002865 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002866 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002867 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002868 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002869 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002870 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002871 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002872 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002873 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002874 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002875 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002876 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002877 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002878 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002879 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002880 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002881 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002882 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2883 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002884 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2885 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2886 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2887 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2888 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2889 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2890 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2891 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2892 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
2893 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002894 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2895 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2896 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002897 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2898 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2899 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002900 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002901 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002902 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002903 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002904 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002905 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002906 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002907 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002908 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002909 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002910 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002911 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002912 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002913 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002914 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002915 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002916 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002917 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002918 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002919 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002920 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002921 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002922 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002923 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002924 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002925 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002926 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002927 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002928 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002929 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002930 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002931 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002932 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002933 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002934 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002935 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002936 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002937 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002938 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002939 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002940 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002941 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002942 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2943 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2944 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2945 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002946 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2947 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2948 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2949 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002950 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2951 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002952 "src/qu8-dwconv/up8x9-minmax-gemmlowp-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002953 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2954 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002955 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
2956 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2957 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
2958 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2959 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
2960 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2961 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
2962 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002963 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002964 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
2965 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2966 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
2967 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2968 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
2969 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002970 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002971 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
2972 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2973 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
2974 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2975 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
2976 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2977 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
2978 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002979 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002980 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
2981 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2982 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
2983 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2984 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
2985 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002986 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002987 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002988 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002989 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002990 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002991 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002992 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002993 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002994 "src/x8-zip/x2-sse2.c",
2995 "src/x8-zip/x3-sse2.c",
2996 "src/x8-zip/x4-sse2.c",
2997 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002998 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002999 "src/x32-zip/x2-sse2.c",
3000 "src/x32-zip/x3-sse2.c",
3001 "src/x32-zip/x4-sse2.c",
3002 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07003003]
3004
3005SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07003006 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
3007 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c",
3008 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07003009 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003010 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07003011 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
3012 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c",
3013 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c",
3014 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
3015 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003016 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003017 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c",
3018 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
3019 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
3020 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
3021 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003022 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
3023 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
3024 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003025 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
3026 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c",
3027 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003028 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003029 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003030 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003031 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003032 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003033 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003034 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003035 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003036 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003037 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003038 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003039 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003040 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003041 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003042 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003043 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003044 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003045 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003046 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003047 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003048 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003049 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003050 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003051 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003052 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003053 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3054 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
3055 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3056 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003057 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003058 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003059]
3060
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003061SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08003062 "src/f32-prelu/gen/sse41-2x4.c",
3063 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003064 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
3065 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
3066 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
3067 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
3068 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
3069 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
3070 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
3071 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
3072 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
3073 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
3074 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
3075 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003076 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
3077 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003078 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
3079 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003080 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
3081 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
3082 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
3083 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
3084 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
3085 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003086 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
3087 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
3088 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
3089 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
3090 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
3091 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
3092 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
3093 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
3094 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
3095 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
3096 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
3097 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003098 "src/math/roundd-sse41.c",
3099 "src/math/roundne-sse41.c",
3100 "src/math/roundu-sse41.c",
3101 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003102 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3103 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3104 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3105 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3106 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3107 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3108 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3109 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3110 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3111 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3112 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3113 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003114 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003115 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003116 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003117 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003118 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003119 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003120 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003121 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003122 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003123 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003124 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003125 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003126 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003127 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003128 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003129 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003130 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003131 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003132 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003133 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003134 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003135 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003136 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003137 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003138 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003139 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003140 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003141 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003142 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3143 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3144 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
3145 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003146 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3147 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3148 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
3149 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3150 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3151 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3152 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3153 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3154 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3155 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3156 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3157 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3158 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3159 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3160 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
3161 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3162 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3163 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3164 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3165 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003166 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3167 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3168 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003169 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
3170 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
3171 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003172 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003173 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003174 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003175 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003176 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003177 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003178 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003179 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003180 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003181 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003182 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003183 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003184 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003185 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003186 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003187 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003188 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003189 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003190 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003191 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003192 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003193 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003194 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003195 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003196 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003197 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003198 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003199 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003200 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003201 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003202 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003203 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003204 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003205 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003206 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003207 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003208 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003209 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003210 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003211 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003212 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003213 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003214 "src/qs8-requantization/rndnu-sse4-sra.c",
3215 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003216 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3217 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3218 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3219 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003220 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3221 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3222 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3223 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003224 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3225 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3226 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3227 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003228 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3229 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3230 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3231 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003232 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3233 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3234 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3235 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3236 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3237 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3238 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3239 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003240 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003241 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3242 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3243 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3244 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3245 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3246 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003247 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003248 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3249 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3250 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3251 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3252 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3253 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3254 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3255 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003256 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003257 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3258 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3259 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3260 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3261 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3262 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003263 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003264 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003265 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003266]
3267
Marat Dukhan08c4a432019-10-03 09:29:21 -07003268AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003269 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3270 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003271 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3272 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003273 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3274 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003275 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3276 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3277 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3278 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3279 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3280 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003281 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003282 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3283 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003284 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003285 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003286 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003287 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003288 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3289 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3290 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3291 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3292 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3293 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3294 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3295 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3296 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3297 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3298 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003299 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003300 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3301 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003302 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003303 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003304 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003305 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003306 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3307 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003308 "src/f32-prelu/gen/avx-2x8.c",
3309 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003310 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003311 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3312 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3313 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3314 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3315 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3316 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3317 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3318 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003319 "src/f32-vbinary/gen/vmax-avx-x8.c",
3320 "src/f32-vbinary/gen/vmax-avx-x16.c",
3321 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3322 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3323 "src/f32-vbinary/gen/vmin-avx-x8.c",
3324 "src/f32-vbinary/gen/vmin-avx-x16.c",
3325 "src/f32-vbinary/gen/vminc-avx-x8.c",
3326 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003327 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3328 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3329 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3330 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3331 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3332 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3333 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3334 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003335 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3336 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3337 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3338 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003339 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3340 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3341 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3342 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003343 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3344 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003345 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3346 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3347 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3348 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3349 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3350 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3351 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3352 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3353 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3354 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3355 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3356 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3357 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3358 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3359 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3360 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3361 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3362 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003363 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3364 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003365 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3366 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003367 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3368 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003369 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3370 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003371 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3372 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3373 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3374 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3375 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3376 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003377 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003378 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3379 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3380 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3381 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3382 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3383 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3384 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3385 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3386 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3387 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3388 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3389 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3390 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3391 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3392 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3393 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3394 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3395 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3396 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3397 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003398 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3399 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003400 "src/f32-vunary/gen/vabs-avx-x8.c",
3401 "src/f32-vunary/gen/vabs-avx-x16.c",
3402 "src/f32-vunary/gen/vneg-avx-x8.c",
3403 "src/f32-vunary/gen/vneg-avx-x16.c",
3404 "src/f32-vunary/gen/vsqr-avx-x8.c",
3405 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003406 "src/math/exp-avx-rr2-p5.c",
3407 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3408 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3409 "src/math/expm1minus-avx-rr2-p6.c",
3410 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3411 "src/math/sigmoid-avx-rr2-p5-div.c",
3412 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3413 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003414 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3415 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3416 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3417 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3418 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3419 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3420 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3421 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3422 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3423 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3424 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3425 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003426 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003427 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003428 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003429 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003430 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003431 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003432 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003433 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003434 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003435 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003436 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003437 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003438 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003439 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003440 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003441 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003442 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003443 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003444 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003445 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003446 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003447 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003448 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003449 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003450 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003451 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003452 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003453 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003454 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3455 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3456 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3457 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003458 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3459 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3460 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3461 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3462 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3463 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3464 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3465 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3466 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3467 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3468 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3469 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3470 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3471 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3472 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3473 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3474 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3475 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3476 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3477 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003478 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003479 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003480 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003481 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003482 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003483 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003484 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003485 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003486 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003487 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003488 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003489 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003490 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003491 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003492 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003493 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003494 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003495 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003496 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003497 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003498 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003499 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003500 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003501 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003502 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003503 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003504 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003505 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003506 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003507 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003508 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003509 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003510 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003511 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003512 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003513 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3514 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3515 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3516 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3517 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3518 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3519 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3520 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3521 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3522 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3523 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3524 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3525 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3526 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3527 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3528 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003529 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3530 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3531 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3532 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3533 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3534 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3535 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3536 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3537 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3538 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3539 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3540 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3541 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3542 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3543 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3544 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3545 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3546 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3547 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3548 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3549 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3550 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3551 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3552 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3553 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3554 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3555 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3556 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003557]
3558
Marat Dukhan1566fee2020-08-02 21:55:41 -07003559XOP_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07003560 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3561 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3562 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3563 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3564 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3565 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003566 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003567 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003568 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003569 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003570 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003571 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003572 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003573 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003574 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003575 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003576 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003577 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003578 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003579 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003580 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003581 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003582 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003583 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003584 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003585 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003586 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003587 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003588 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003589 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003590 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003591 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003592 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003593 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003594 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3595 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003596 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3597 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3598 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3599 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3600 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3601 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3602 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3603 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3604 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3605 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003606 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003607 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003608 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003609 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003610 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003611 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003612 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003613 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003614 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003615 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003616 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003617 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003618 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003619 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003620 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003621 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003622 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003623 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003624 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003625 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003626 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003627 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003628 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003629 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003630 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003631 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003632 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003633 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003634 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003635 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003636 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003637 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003638 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003639 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003640 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003641 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3642 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3643 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3644 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3645 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3646 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3647 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3648 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003649 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3650 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3651 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3652 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3653 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3654 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3655 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3656 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3657 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3658 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3659 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3660 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3661 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3662 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3663 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3664 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3665 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3666 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3667 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3668 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3669 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3670 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3671 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3672 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3673 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3674 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3675 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3676 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003677]
3678
Marat Dukhanfda12b82019-11-21 12:27:59 -08003679FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003680 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
3681 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003682 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3683 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003684 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3685 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003686 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
3687 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
3688 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
3689 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
3690 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3691 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003692 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003693 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3694 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3695 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3696 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003697 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003698 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
3699 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003700 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003701 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
3702 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003703 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3704 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3705 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003706 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3707 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3708 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3709 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3710 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3711 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3712 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3713 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3714 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3715 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3716 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3717 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3718 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3719 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003720 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003721 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3722 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3723 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3724 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003725 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003726 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3727 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003728 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003729 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3730 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003731 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3732 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3733 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003734 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3735 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003736 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3737 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3738 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3739 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3740 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3741 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3742 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3743 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003744 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003745 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003746 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003747]
3748
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003749AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003750 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
3751 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003752 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003753 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003754 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003755 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
3756 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003757 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003758 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
3759 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
3760 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003761 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003762 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
3763 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003764 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003765 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003766 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003767 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3768 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003769 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003770 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3771 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3772 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003773 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003774 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3775 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003776 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003777 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003778 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003779 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3780 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003781 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003782 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3783 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3784 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003785 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003786 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3787 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3788 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3789 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3790 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3791 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3792 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3793 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3794 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3795 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3796 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3797 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3798 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3799 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3800 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3801 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3802 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3803 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3804 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3805 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3806 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3807 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3808 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3809 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3810 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3811 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3812 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3813 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3814 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3815 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3816 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3817 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3818 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3819 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3820 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3821 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3822 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3823 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3824 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3825 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003826 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3827 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3828 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3829 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3830 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3831 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3832 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3833 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3834 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3835 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3836 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3837 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3838 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3839 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3840 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3841 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3842 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3843 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3844 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3845 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3846 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3847 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3848 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3849 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003850 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3851 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3852 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3853 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3854 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3855 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3856 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3857 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3858 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3859 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3860 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3861 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3862 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3863 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3864 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3865 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3866 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3867 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3868 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3869 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3870 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3871 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3872 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3873 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3874 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3875 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3876 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3877 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3878 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3879 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003880 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3881 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3882 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003883 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3884 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3885 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3886 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003887 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003888 "src/math/extexp-avx2-p5.c",
3889 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3890 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3891 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3892 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3893 "src/math/sigmoid-avx2-rr1-p5-div.c",
3894 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3895 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3896 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3897 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3898 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3899 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3900 "src/math/sigmoid-avx2-rr2-p5-div.c",
3901 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3902 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07003903 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
3904 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
3905 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
3906 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
3907 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
3908 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
3909 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
3910 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
3911 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
3912 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
3913 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
3914 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003915 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3916 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3917 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3918 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3919 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3920 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07003921 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
3922 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
3923 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003924 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003925 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003926 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003927 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003928 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003929 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003930 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3931 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003932 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003933 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003934 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3935 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003936 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003937 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003938 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003939 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003940 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003941 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003942 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3943 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003944 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003945 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003946 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3947 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003948 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003949 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003950 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003951 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003952 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003953 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003954 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003955 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003956 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003957 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003958 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003959 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003960 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003961 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003962 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003963 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003964 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003965 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003966 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3967 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3968 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3969 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3970 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3971 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3972 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3973 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003974]
3975
Marat Dukhan08c4a432019-10-03 09:29:21 -07003976AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003977 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3978 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003979 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3980 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003981 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3982 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003983 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3984 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3985 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3986 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3987 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3988 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003989 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3990 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3991 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3992 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3993 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3994 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003995 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3996 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3997 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3998 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3999 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4000 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004001 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4002 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4003 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4004 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4005 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4006 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004007 "src/f32-prelu/gen/avx512f-2x16.c",
4008 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004009 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4010 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004011 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004012 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004013 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004014 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4015 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004016 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004017 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4018 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4019 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004020 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004021 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4022 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004023 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004024 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004025 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004026 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4027 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004028 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004029 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4030 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4031 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004032 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004033 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4034 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004035 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004036 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004037 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004038 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4039 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004040 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004041 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4042 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4043 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004044 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004045 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004046 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4047 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4048 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4049 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4050 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4051 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4052 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4053 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004054 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4055 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4056 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4057 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4058 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4059 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4060 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4061 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004062 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4063 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4064 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4065 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4066 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4067 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4068 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4069 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004070 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4071 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4072 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4073 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004074 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4075 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4076 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4077 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004078 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4079 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004080 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4081 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4082 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4083 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4084 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4085 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4086 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4087 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4088 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4089 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4090 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4091 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4092 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4093 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4094 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4095 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004096 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4097 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004098 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4099 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004100 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4101 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004102 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4103 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4104 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4105 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4106 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4107 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4108 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4109 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004110 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004111 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4112 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4113 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4114 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4115 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4116 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4117 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4118 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4119 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4120 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4121 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4122 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4123 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4124 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4125 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4126 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4127 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4128 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4129 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4130 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4131 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4132 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4133 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4134 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004135 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4136 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4137 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4138 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4139 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4140 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4141 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4142 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4143 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4144 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4145 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4146 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4147 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4148 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4149 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4150 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4151 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4152 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4153 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4154 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4155 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4156 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4157 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4158 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4159 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4160 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4161 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4162 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4163 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4164 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4165 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4166 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4167 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4168 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4169 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4170 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4171 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4172 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4173 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4174 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4175 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4176 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4177 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4178 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4179 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4180 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4181 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4182 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004183 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4184 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4185 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4186 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4187 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4188 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4189 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4190 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004191 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4192 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4193 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4194 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4195 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4196 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004197 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4198 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4199 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4200 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4201 "src/math/exp-avx512f-rr2-p5-scalef.c",
4202 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004203 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4204 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004205 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004206 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004207 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004208 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004209 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004210 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004211 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004212 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004213 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004214 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4215 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4216 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4217 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4218 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4219 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4220 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4221 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4222 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4223 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004224 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004225 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004226 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4227 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4228 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4229 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004230 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004231 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004232 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004233]
4234
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004235AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004236 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4237 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4238 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4239 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004240 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4241 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4242 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4243 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4244 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4245 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4246 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4247 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004248 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004249 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004250 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004251 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004252 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004253 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004254 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004255 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004256 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004257 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004258 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004259 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004260 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004261 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004262 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004263 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004264 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004265 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004266 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004267 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004268 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004269 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004270 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004271 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004272]
4273
Frank Barchardbcedc082020-08-17 18:00:51 -07004274WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004275 "src/f32-vrelu/wasm_shr_x1.S",
4276 "src/f32-vrelu/wasm_shr_x2.S",
4277 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004278]
4279
Marat Dukhan08c4a432019-10-03 09:29:21 -07004280AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004281 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004282 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004283 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4284 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004285 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004286 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004287 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004288 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004289 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4290 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004291 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4292 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4293 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4294 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004295]
4296
4297AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004298 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004299 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004300 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004301 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004302 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004303 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004304 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004305 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
4306 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004307 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
4308 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
4309 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
4310 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
4311 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004312 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004313 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004314 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
4315 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004316 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
4317 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004318 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004319 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004320 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004321 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004322 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004323 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4324 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004325 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004326 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004327 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004328 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004329 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004330 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004331 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004332 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4333 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004334 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004335 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004336 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004337 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004338 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004339 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004340 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
4341 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004342 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004343 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
4344 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4345 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004346 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4347 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
4348 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004349 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004350 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004351 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004352 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004353 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4354 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004355 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4356 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
4357 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
4358 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004359 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004360 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004361 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004362 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4363 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004364 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4365 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4366 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4367 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004368 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004369 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004370 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004371 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004372 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004373 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4374 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4375 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4376 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004377 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004378 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004379 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004380 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4381 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4382 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4383 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004384 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4385 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004386 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4387 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4388 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4389 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4390 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004391 "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004392 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4393 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4394 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4395 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4396 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4397 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004398 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4399 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4400 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4401 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4402 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4403 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4404 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4405 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004406 "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004407 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4408 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4409 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4410 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4411 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004412 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4413 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4414 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4415 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004416 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4417 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4418 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4419 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004420 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4421 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004422 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4423 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004424 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4425 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4426 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4427 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4428 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004429 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4430 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4431 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4432 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004433 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004434 "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004435 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004436 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4437 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004438 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4439 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004440 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4441 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4442 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4443 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004444 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4445 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4446 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004447 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004448 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4449 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4450 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4451 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004452 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4453 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4454 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4455 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004456 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4457 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4458 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4459 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004460 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4461 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4462 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4463 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004464 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004465 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004466 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4467 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004468 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4469 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004470 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4471 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4472 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004473 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4474 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004475 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004476]
4477
Marat Dukhan1b354632020-03-23 12:50:22 -07004478INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004479 "src/xnnpack/argmaxpool.h",
4480 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004481 "src/xnnpack/common.h",
4482 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004483 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004484 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004485 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004486 "src/xnnpack/gavgpool.h",
4487 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004488 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004489 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004490 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004491 "src/xnnpack/lut.h",
4492 "src/xnnpack/math.h",
4493 "src/xnnpack/maxpool.h",
4494 "src/xnnpack/packx.h",
4495 "src/xnnpack/pad.h",
4496 "src/xnnpack/params.h",
4497 "src/xnnpack/pavgpool.h",
4498 "src/xnnpack/ppmm.h",
4499 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004500 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004501 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004502 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004503 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004504 "src/xnnpack/spmm.h",
4505 "src/xnnpack/unpool.h",
4506 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004507 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004508 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004509 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004510 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004511 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004512 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004513 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004514]
4515
4516INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004517 "include/xnnpack.h",
4518 "src/xnnpack/allocator.h",
4519 "src/xnnpack/compute.h",
4520 "src/xnnpack/im2col.h",
4521 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004522 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004523 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004524 "src/xnnpack/operator.h",
4525 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004526 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004527 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004528 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004529 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004530]
4531
Marat Dukhan1b354632020-03-23 12:50:22 -07004532ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004533 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004534]
4535
Marat Dukhan1b354632020-03-23 12:50:22 -07004536MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004537 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004538 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004539]
4540
Marat Dukhan1b354632020-03-23 12:50:22 -07004541MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004542 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004543 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004544 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004545 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004546]
4547
4548OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004549 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004550 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004551]
4552
4553WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004554 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004555 "src/xnnpack/operator.h",
4556 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004557]
4558
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004559LOGGING_COPTS = select({
4560 # No logging in optimized mode
4561 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4562 # Full logging in debug mode
4563 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4564 # Error-only logging in default (fastbuild) mode
4565 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4566})
4567
Marat Dukhan3b59de22020-06-03 20:15:19 -07004568LOGGING_SRCS = select({
4569 # No logging in optimized mode
4570 ":optimized_build": [],
4571 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004572 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004573 "src/operator-strings.c",
4574 "src/subgraph-strings.c",
4575 ],
4576})
4577
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004578LOGGING_HDRS = [
4579 "src/xnnpack/log.h",
4580]
4581
Marat Dukhan08c4a432019-10-03 09:29:21 -07004582xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004583 name = "tables",
4584 srcs = TABLE_SRCS,
4585 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004586 gcc_copts = xnnpack_gcc_std_copts(),
4587 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004588)
4589
4590xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004591 name = "scalar_ukernels",
4592 srcs = SCALAR_UKERNELS,
4593 hdrs = INTERNAL_HDRS,
4594 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004595 gcc_copts = xnnpack_gcc_std_copts(),
4596 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004597 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004598 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004599 "@FP16",
4600 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004601 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004602 ],
4603)
4604
4605xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004606 name = "scalar_ukernels_test_mode",
4607 srcs = SCALAR_UKERNELS,
4608 hdrs = INTERNAL_HDRS,
4609 aarch32_copts = ["-marm"],
4610 copts = [
4611 "-UNDEBUG",
4612 "-DXNN_TEST_MODE=1",
4613 ],
4614 gcc_copts = xnnpack_gcc_std_copts(),
4615 msvc_copts = xnnpack_msvc_std_copts(),
4616 deps = [
4617 ":tables",
4618 "@FP16",
4619 "@FXdiv",
4620 "@pthreadpool",
4621 ],
4622)
4623
4624xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004625 name = "wasm_ukernels",
4626 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004627 gcc_copts = xnnpack_gcc_std_copts(),
4628 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004629 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004630 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004631 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004632 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004633 "@FP16",
4634 "@FXdiv",
4635 "@pthreadpool",
4636 ],
4637)
4638
4639xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004640 name = "wasm_ukernels_test_mode",
4641 hdrs = INTERNAL_HDRS,
4642 copts = [
4643 "-UNDEBUG",
4644 "-DXNN_TEST_MODE=1",
4645 ],
4646 gcc_copts = xnnpack_gcc_std_copts(),
4647 msvc_copts = xnnpack_msvc_std_copts(),
4648 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004649 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004650 deps = [
4651 ":tables",
4652 "@FP16",
4653 "@FXdiv",
4654 "@pthreadpool",
4655 ],
4656)
4657
4658xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004659 name = "neon_ukernels",
4660 hdrs = INTERNAL_HDRS,
4661 aarch32_copts = [
4662 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004663 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004664 "-mfpu=neon",
4665 ],
4666 aarch32_srcs = NEON_UKERNELS,
4667 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004668 gcc_copts = xnnpack_gcc_std_copts(),
4669 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004670 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004671 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004672 "@FP16",
4673 "@pthreadpool",
4674 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004675)
4676
4677xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004678 name = "neon_ukernels_test_mode",
4679 hdrs = INTERNAL_HDRS,
4680 aarch32_copts = [
4681 "-marm",
4682 "-march=armv7-a",
4683 "-mfpu=neon",
4684 ],
4685 aarch32_srcs = NEON_UKERNELS,
4686 aarch64_srcs = NEON_UKERNELS,
4687 copts = [
4688 "-UNDEBUG",
4689 "-DXNN_TEST_MODE=1",
4690 ],
4691 gcc_copts = xnnpack_gcc_std_copts(),
4692 msvc_copts = xnnpack_msvc_std_copts(),
4693 deps = [
4694 ":tables",
4695 "@FP16",
4696 "@pthreadpool",
4697 ],
4698)
4699
4700xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004701 name = "neonfma_ukernels",
4702 hdrs = INTERNAL_HDRS,
4703 aarch32_copts = [
4704 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004705 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004706 "-mfpu=neon-vfpv4",
4707 ],
4708 aarch32_srcs = NEONFMA_UKERNELS,
4709 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004710 apple_aarch32_copts = [
4711 "-mcpu=swift",
4712 "-mtune=generic",
4713 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004714 gcc_copts = xnnpack_gcc_std_copts(),
4715 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004716 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004717 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004718 "@FP16",
4719 "@pthreadpool",
4720 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004721)
4722
4723xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004724 name = "neonfma_ukernels_test_mode",
4725 hdrs = INTERNAL_HDRS,
4726 aarch32_copts = [
4727 "-marm",
4728 "-march=armv7-a",
4729 "-mfpu=neon-vfpv4",
4730 ],
4731 aarch32_srcs = NEONFMA_UKERNELS,
4732 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004733 apple_aarch32_copts = [
4734 "-mcpu=swift",
4735 "-mtune=generic",
4736 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004737 copts = [
4738 "-UNDEBUG",
4739 "-DXNN_TEST_MODE=1",
4740 ],
4741 gcc_copts = xnnpack_gcc_std_copts(),
4742 msvc_copts = xnnpack_msvc_std_copts(),
4743 deps = [
4744 ":tables",
4745 "@FP16",
4746 "@pthreadpool",
4747 ],
4748)
4749
4750xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004751 name = "neonv8_ukernels",
4752 hdrs = INTERNAL_HDRS,
4753 aarch32_copts = [
4754 "-marm",
4755 "-march=armv8-a",
4756 "-mfpu=neon-fp-armv8",
4757 ],
4758 aarch32_srcs = NEONV8_UKERNELS,
4759 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004760 apple_aarch32_copts = [
4761 "-mcpu=cyclone",
4762 "-mtune=generic",
4763 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004764 gcc_copts = xnnpack_gcc_std_copts(),
4765 msvc_copts = xnnpack_msvc_std_copts(),
4766 deps = [
4767 ":tables",
4768 "@FP16",
4769 "@pthreadpool",
4770 ],
4771)
4772
4773xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004774 name = "neonv8_ukernels_test_mode",
4775 hdrs = INTERNAL_HDRS,
4776 aarch32_copts = [
4777 "-marm",
4778 "-march=armv8-a",
4779 "-mfpu=neon-fp-armv8",
4780 ],
4781 aarch32_srcs = NEONV8_UKERNELS,
4782 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004783 apple_aarch32_copts = [
4784 "-mcpu=cyclone",
4785 "-mtune=generic",
4786 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004787 copts = [
4788 "-UNDEBUG",
4789 "-DXNN_TEST_MODE=1",
4790 ],
4791 gcc_copts = xnnpack_gcc_std_copts(),
4792 msvc_copts = xnnpack_msvc_std_copts(),
4793 deps = [
4794 ":tables",
4795 "@FP16",
4796 "@pthreadpool",
4797 ],
4798)
4799
4800xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004801 name = "neonfp16arith_ukernels",
4802 hdrs = INTERNAL_HDRS,
4803 aarch64_copts = ["-march=armv8.2-a+fp16"],
4804 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004805 gcc_copts = xnnpack_gcc_std_copts(),
4806 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004807 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004808 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004809 "@FP16",
4810 "@pthreadpool",
4811 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004812)
4813
4814xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004815 name = "neonfp16arith_ukernels_test_mode",
4816 hdrs = INTERNAL_HDRS,
4817 aarch64_copts = ["-march=armv8.2-a+fp16"],
4818 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4819 copts = [
4820 "-UNDEBUG",
4821 "-DXNN_TEST_MODE=1",
4822 ],
4823 gcc_copts = xnnpack_gcc_std_copts(),
4824 msvc_copts = xnnpack_msvc_std_copts(),
4825 deps = [
4826 ":tables",
4827 "@FP16",
4828 "@pthreadpool",
4829 ],
4830)
4831
4832xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004833 name = "neondot_ukernels",
4834 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004835 aarch32_copts = [
4836 "-marm",
4837 "-march=armv8.2-a+dotprod",
4838 "-mfpu=neon-fp-armv8",
4839 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004840 aarch32_srcs = NEONDOT_UKERNELS,
4841 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4842 aarch64_srcs = NEONDOT_UKERNELS,
4843 gcc_copts = xnnpack_gcc_std_copts(),
4844 msvc_copts = xnnpack_msvc_std_copts(),
4845 deps = [
4846 ":tables",
4847 "@FP16",
4848 "@pthreadpool",
4849 ],
4850)
4851
4852xnnpack_cc_library(
4853 name = "neondot_ukernels_test_mode",
4854 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004855 aarch32_copts = [
4856 "-marm",
4857 "-march=armv8.2-a+dotprod",
4858 "-mfpu=neon-fp-armv8",
4859 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004860 aarch32_srcs = NEONDOT_UKERNELS,
4861 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4862 aarch64_srcs = NEONDOT_UKERNELS,
4863 copts = [
4864 "-UNDEBUG",
4865 "-DXNN_TEST_MODE=1",
4866 ],
4867 gcc_copts = xnnpack_gcc_std_copts(),
4868 msvc_copts = xnnpack_msvc_std_copts(),
4869 deps = [
4870 ":tables",
4871 "@FP16",
4872 "@pthreadpool",
4873 ],
4874)
4875
4876xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004877 name = "sse2_ukernels",
4878 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004879 gcc_copts = xnnpack_gcc_std_copts(),
4880 gcc_x86_copts = ["-msse2"],
4881 msvc_copts = xnnpack_msvc_std_copts(),
4882 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004883 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004884 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004885 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004886 "@FP16",
4887 "@pthreadpool",
4888 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004889)
4890
4891xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004892 name = "sse2_ukernels_test_mode",
4893 hdrs = INTERNAL_HDRS,
4894 copts = [
4895 "-UNDEBUG",
4896 "-DXNN_TEST_MODE=1",
4897 ],
4898 gcc_copts = xnnpack_gcc_std_copts(),
4899 gcc_x86_copts = ["-msse2"],
4900 msvc_copts = xnnpack_msvc_std_copts(),
4901 msvc_x86_32_copts = ["/arch:SSE2"],
4902 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4903 deps = [
4904 ":tables",
4905 "@FP16",
4906 "@pthreadpool",
4907 ],
4908)
4909
4910xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004911 name = "ssse3_ukernels",
4912 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004913 gcc_copts = xnnpack_gcc_std_copts(),
4914 gcc_x86_copts = ["-mssse3"],
4915 msvc_copts = xnnpack_msvc_std_copts(),
4916 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004917 x86_srcs = SSSE3_UKERNELS,
4918 deps = [
4919 ":tables",
4920 "@FP16",
4921 "@pthreadpool",
4922 ],
4923)
4924
4925xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004926 name = "ssse3_ukernels_test_mode",
4927 hdrs = INTERNAL_HDRS,
4928 copts = [
4929 "-UNDEBUG",
4930 "-DXNN_TEST_MODE=1",
4931 ],
4932 gcc_copts = xnnpack_gcc_std_copts(),
4933 gcc_x86_copts = ["-mssse3"],
4934 msvc_copts = xnnpack_msvc_std_copts(),
4935 msvc_x86_32_copts = ["/arch:SSE2"],
4936 x86_srcs = SSSE3_UKERNELS,
4937 deps = [
4938 ":tables",
4939 "@FP16",
4940 "@pthreadpool",
4941 ],
4942)
4943
4944xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004945 name = "sse41_ukernels",
4946 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004947 gcc_copts = xnnpack_gcc_std_copts(),
4948 gcc_x86_copts = ["-msse4.1"],
4949 msvc_copts = xnnpack_msvc_std_copts(),
4950 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004951 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004952 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004953 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004954 "@FP16",
4955 "@pthreadpool",
4956 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004957)
4958
4959xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004960 name = "sse41_ukernels_test_mode",
4961 hdrs = INTERNAL_HDRS,
4962 copts = [
4963 "-UNDEBUG",
4964 "-DXNN_TEST_MODE=1",
4965 ],
4966 gcc_copts = xnnpack_gcc_std_copts(),
4967 gcc_x86_copts = ["-msse4.1"],
4968 msvc_copts = xnnpack_msvc_std_copts(),
4969 msvc_x86_32_copts = ["/arch:SSE2"],
4970 x86_srcs = SSE41_UKERNELS,
4971 deps = [
4972 ":tables",
4973 "@FP16",
4974 "@pthreadpool",
4975 ],
4976)
4977
4978xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004979 name = "avx_ukernels",
4980 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004981 gcc_copts = xnnpack_gcc_std_copts(),
4982 gcc_x86_copts = ["-mavx"],
4983 msvc_copts = xnnpack_msvc_std_copts(),
4984 msvc_x86_32_copts = ["/arch:AVX"],
4985 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004986 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004987 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004988 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004989 "@FP16",
4990 "@pthreadpool",
4991 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004992)
4993
4994xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004995 name = "avx_ukernels_test_mode",
4996 hdrs = INTERNAL_HDRS,
4997 copts = [
4998 "-UNDEBUG",
4999 "-DXNN_TEST_MODE=1",
5000 ],
5001 gcc_copts = xnnpack_gcc_std_copts(),
5002 gcc_x86_copts = ["-mavx"],
5003 msvc_copts = xnnpack_msvc_std_copts(),
5004 msvc_x86_32_copts = ["/arch:AVX"],
5005 msvc_x86_64_copts = ["/arch:AVX"],
5006 x86_srcs = AVX_UKERNELS,
5007 deps = [
5008 ":tables",
5009 "@FP16",
5010 "@pthreadpool",
5011 ],
5012)
5013
5014xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005015 name = "xop_ukernels",
5016 hdrs = INTERNAL_HDRS,
5017 gcc_copts = xnnpack_gcc_std_copts(),
5018 gcc_x86_copts = ["-mxop"],
5019 msvc_copts = xnnpack_msvc_std_copts(),
5020 msvc_x86_32_copts = ["/arch:AVX"],
5021 msvc_x86_64_copts = ["/arch:AVX"],
5022 x86_srcs = XOP_UKERNELS,
5023 deps = [
5024 ":tables",
5025 "@FP16",
5026 "@pthreadpool",
5027 ],
5028)
5029
5030xnnpack_cc_library(
5031 name = "xop_ukernels_test_mode",
5032 hdrs = INTERNAL_HDRS,
5033 copts = [
5034 "-UNDEBUG",
5035 "-DXNN_TEST_MODE=1",
5036 ],
5037 gcc_copts = xnnpack_gcc_std_copts(),
5038 gcc_x86_copts = ["-mxop"],
5039 msvc_copts = xnnpack_msvc_std_copts(),
5040 msvc_x86_32_copts = ["/arch:AVX"],
5041 msvc_x86_64_copts = ["/arch:AVX"],
5042 x86_srcs = XOP_UKERNELS,
5043 deps = [
5044 ":tables",
5045 "@FP16",
5046 "@pthreadpool",
5047 ],
5048)
5049
5050xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005051 name = "fma3_ukernels",
5052 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005053 gcc_copts = xnnpack_gcc_std_copts(),
5054 gcc_x86_copts = ["-mfma"],
5055 msvc_copts = xnnpack_msvc_std_copts(),
5056 msvc_x86_32_copts = ["/arch:AVX"],
5057 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005058 x86_srcs = FMA3_UKERNELS,
5059 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005060 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005061 "@FP16",
5062 "@pthreadpool",
5063 ],
5064)
5065
5066xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005067 name = "fma3_ukernels_test_mode",
5068 hdrs = INTERNAL_HDRS,
5069 copts = [
5070 "-UNDEBUG",
5071 "-DXNN_TEST_MODE=1",
5072 ],
5073 gcc_copts = xnnpack_gcc_std_copts(),
5074 gcc_x86_copts = ["-mfma"],
5075 msvc_copts = xnnpack_msvc_std_copts(),
5076 msvc_x86_32_copts = ["/arch:AVX"],
5077 msvc_x86_64_copts = ["/arch:AVX"],
5078 x86_srcs = FMA3_UKERNELS,
5079 deps = [
5080 ":tables",
5081 "@FP16",
5082 "@pthreadpool",
5083 ],
5084)
5085
5086xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005087 name = "avx2_ukernels",
5088 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005089 gcc_copts = xnnpack_gcc_std_copts(),
5090 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005091 "-mfma",
5092 "-mavx2",
5093 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005094 msvc_copts = xnnpack_msvc_std_copts(),
5095 msvc_x86_32_copts = ["/arch:AVX2"],
5096 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005097 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005098 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005099 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005100 "@FP16",
5101 "@pthreadpool",
5102 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005103)
5104
5105xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005106 name = "avx2_ukernels_test_mode",
5107 hdrs = INTERNAL_HDRS,
5108 copts = [
5109 "-UNDEBUG",
5110 "-DXNN_TEST_MODE=1",
5111 ],
5112 gcc_copts = xnnpack_gcc_std_copts(),
5113 gcc_x86_copts = [
5114 "-mfma",
5115 "-mavx2",
5116 ],
5117 msvc_copts = xnnpack_msvc_std_copts(),
5118 msvc_x86_32_copts = ["/arch:AVX2"],
5119 msvc_x86_64_copts = ["/arch:AVX2"],
5120 x86_srcs = AVX2_UKERNELS,
5121 deps = [
5122 ":tables",
5123 "@FP16",
5124 "@pthreadpool",
5125 ],
5126)
5127
5128xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005129 name = "avx512f_ukernels",
5130 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005131 gcc_copts = xnnpack_gcc_std_copts(),
5132 gcc_x86_copts = ["-mavx512f"],
5133 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5134 msvc_copts = xnnpack_msvc_std_copts(),
5135 msvc_x86_32_copts = ["/arch:AVX512"],
5136 msvc_x86_64_copts = ["/arch:AVX512"],
5137 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005138 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005139 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005140 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005141 "@FP16",
5142 "@pthreadpool",
5143 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005144)
5145
5146xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005147 name = "avx512f_ukernels_test_mode",
5148 hdrs = INTERNAL_HDRS,
5149 copts = [
5150 "-UNDEBUG",
5151 "-DXNN_TEST_MODE=1",
5152 ],
5153 gcc_copts = xnnpack_gcc_std_copts(),
5154 gcc_x86_copts = ["-mavx512f"],
5155 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5156 msvc_copts = xnnpack_msvc_std_copts(),
5157 msvc_x86_32_copts = ["/arch:AVX512"],
5158 msvc_x86_64_copts = ["/arch:AVX512"],
5159 msys_copts = ["-fno-asynchronous-unwind-tables"],
5160 x86_srcs = AVX512F_UKERNELS,
5161 deps = [
5162 ":tables",
5163 "@FP16",
5164 "@pthreadpool",
5165 ],
5166)
5167
5168xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005169 name = "avx512skx_ukernels",
5170 hdrs = INTERNAL_HDRS,
5171 gcc_copts = xnnpack_gcc_std_copts(),
5172 gcc_x86_copts = [
5173 "-mavx512f",
5174 "-mavx512cd",
5175 "-mavx512bw",
5176 "-mavx512dq",
5177 "-mavx512vl",
5178 ],
5179 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5180 msvc_copts = xnnpack_msvc_std_copts(),
5181 msvc_x86_32_copts = ["/arch:AVX512"],
5182 msvc_x86_64_copts = ["/arch:AVX512"],
5183 msys_copts = ["-fno-asynchronous-unwind-tables"],
5184 x86_srcs = AVX512SKX_UKERNELS,
5185 deps = [
5186 ":tables",
5187 "@FP16",
5188 "@pthreadpool",
5189 ],
5190)
5191
5192xnnpack_cc_library(
5193 name = "avx512skx_ukernels_test_mode",
5194 hdrs = INTERNAL_HDRS,
5195 copts = [
5196 "-UNDEBUG",
5197 "-DXNN_TEST_MODE=1",
5198 ],
5199 gcc_copts = xnnpack_gcc_std_copts(),
5200 gcc_x86_copts = [
5201 "-mavx512f",
5202 "-mavx512cd",
5203 "-mavx512bw",
5204 "-mavx512dq",
5205 "-mavx512vl",
5206 ],
5207 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5208 msvc_copts = xnnpack_msvc_std_copts(),
5209 msvc_x86_32_copts = ["/arch:AVX512"],
5210 msvc_x86_64_copts = ["/arch:AVX512"],
5211 msys_copts = ["-fno-asynchronous-unwind-tables"],
5212 x86_srcs = AVX512SKX_UKERNELS,
5213 deps = [
5214 ":tables",
5215 "@FP16",
5216 "@pthreadpool",
5217 ],
5218)
5219
5220xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005221 name = "asm_ukernels",
5222 hdrs = ["src/xnnpack/assembly.h"],
5223 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005224 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005225 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005226 wasm_srcs = WASM32_ASM_UKERNELS,
5227 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005228)
5229
Marat Dukhan3b59de22020-06-03 20:15:19 -07005230xnnpack_cc_library(
5231 name = "logging_utils",
5232 srcs = LOGGING_SRCS,
5233 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5234 copts = LOGGING_COPTS + [
5235 "-Isrc",
5236 "-Iinclude",
5237 ] + select({
5238 ":debug_build": [],
5239 "//conditions:default": xnnpack_min_size_copts(),
5240 }),
5241 gcc_copts = xnnpack_gcc_std_copts(),
5242 msvc_copts = xnnpack_msvc_std_copts(),
5243 visibility = xnnpack_visibility(),
5244 deps = [
5245 "@FP16",
5246 "@clog",
5247 "@pthreadpool",
5248 ],
5249)
5250
Marat Dukhan08c4a432019-10-03 09:29:21 -07005251xnnpack_aggregate_library(
5252 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005253 aarch32_ios_deps = [
5254 ":neon_ukernels",
5255 ":neonfma_ukernels",
5256 ":neonv8_ukernels",
5257 ":asm_ukernels",
5258 ],
5259 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005260 ":neon_ukernels",
5261 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005262 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005263 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005264 ":asm_ukernels",
5265 ],
5266 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005267 ":neon_ukernels",
5268 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005269 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005270 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005271 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005272 ":asm_ukernels",
5273 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005274 generic_deps = [
5275 ":scalar_ukernels",
5276 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005277 wasm_deps = [
5278 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005279 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005280 ],
5281 wasmsimd_deps = [
5282 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005283 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005284 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005285 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005286 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005287 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005288 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005289 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005290 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005291 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005292 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005293 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005294 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005295 ],
5296)
5297
Marat Dukhan33fcf782020-05-24 14:27:15 -07005298xnnpack_aggregate_library(
5299 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005300 aarch32_ios_deps = [
5301 ":neon_ukernels_test_mode",
5302 ":neonfma_ukernels_test_mode",
5303 ":neonv8_ukernels_test_mode",
5304 ":asm_ukernels",
5305 ],
5306 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005307 ":neon_ukernels_test_mode",
5308 ":neonfma_ukernels_test_mode",
5309 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005310 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005311 ":asm_ukernels",
5312 ],
5313 aarch64_deps = [
5314 ":neon_ukernels_test_mode",
5315 ":neonfma_ukernels_test_mode",
5316 ":neonv8_ukernels_test_mode",
5317 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005318 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005319 ":asm_ukernels",
5320 ],
5321 generic_deps = [
5322 ":scalar_ukernels_test_mode",
5323 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005324 wasm_deps = [
5325 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005326 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005327 ],
5328 wasmsimd_deps = [
5329 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005330 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005331 ],
5332 x86_deps = [
5333 ":sse2_ukernels_test_mode",
5334 ":ssse3_ukernels_test_mode",
5335 ":sse41_ukernels_test_mode",
5336 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005337 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005338 ":fma3_ukernels_test_mode",
5339 ":avx2_ukernels_test_mode",
5340 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005341 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005342 ],
5343)
5344
Marat Dukhan08c4a432019-10-03 09:29:21 -07005345xnnpack_cc_library(
5346 name = "im2col",
5347 srcs = ["src/im2col.c"],
5348 hdrs = [
5349 "src/xnnpack/common.h",
5350 "src/xnnpack/im2col.h",
5351 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005352 gcc_copts = xnnpack_gcc_std_copts(),
5353 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005354)
5355
5356xnnpack_cc_library(
5357 name = "indirection",
5358 srcs = ["src/indirection.c"],
5359 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005360 gcc_copts = xnnpack_gcc_std_copts(),
5361 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005362 deps = [
5363 "@FP16",
5364 "@FXdiv",
5365 "@pthreadpool",
5366 ],
5367)
5368
5369xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005370 name = "indirection_test_mode",
5371 srcs = ["src/indirection.c"],
5372 hdrs = INTERNAL_HDRS,
5373 copts = [
5374 "-UNDEBUG",
5375 "-DXNN_TEST_MODE=1",
5376 ],
5377 gcc_copts = xnnpack_gcc_std_copts(),
5378 msvc_copts = xnnpack_msvc_std_copts(),
5379 deps = [
5380 "@FP16",
5381 "@FXdiv",
5382 "@pthreadpool",
5383 ],
5384)
5385
5386xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005387 name = "packing",
5388 srcs = ["src/packing.c"],
5389 hdrs = INTERNAL_HDRS,
5390 gcc_copts = xnnpack_gcc_std_copts(),
5391 msvc_copts = xnnpack_msvc_std_copts(),
5392 deps = [
5393 "@FP16",
5394 "@FXdiv",
5395 "@pthreadpool",
5396 ],
5397)
5398
5399xnnpack_cc_library(
5400 name = "packing_test_mode",
5401 srcs = ["src/packing.c"],
5402 hdrs = INTERNAL_HDRS,
5403 copts = [
5404 "-UNDEBUG",
5405 "-DXNN_TEST_MODE=1",
5406 ],
5407 gcc_copts = xnnpack_gcc_std_copts(),
5408 msvc_copts = xnnpack_msvc_std_copts(),
5409 deps = [
5410 "@FP16",
5411 "@FXdiv",
5412 "@pthreadpool",
5413 ],
5414)
5415
5416xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005417 name = "operator_run",
5418 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005419 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005420 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005421 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5422 "//conditions:default": [],
5423 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005424 gcc_copts = xnnpack_gcc_std_copts(),
5425 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005426 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005427 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005428 "@FP16",
5429 "@FXdiv",
5430 "@clog",
5431 "@pthreadpool",
5432 ],
5433)
5434
Chao Mei6ddfc602020-05-13 22:29:36 -07005435xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005436 name = "operator_run_test_mode",
5437 srcs = ["src/operator-run.c"],
5438 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5439 copts = LOGGING_COPTS + [
5440 "-UNDEBUG",
5441 "-DXNN_TEST_MODE=1",
5442 ] + select({
5443 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5444 "//conditions:default": [],
5445 }),
5446 gcc_copts = xnnpack_gcc_std_copts(),
5447 msvc_copts = xnnpack_msvc_std_copts(),
5448 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005449 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005450 "@FP16",
5451 "@FXdiv",
5452 "@clog",
5453 "@pthreadpool",
5454 ],
5455)
5456
5457xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005458 name = "memory_planner",
5459 srcs = ["src/memory-planner.c"],
5460 hdrs = INTERNAL_HDRS,
5461 defines = select({
5462 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5463 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5464 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5465 }),
5466 gcc_copts = xnnpack_gcc_std_copts(),
5467 msvc_copts = xnnpack_msvc_std_copts(),
5468 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005469 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005470 "@pthreadpool",
5471 ],
5472)
5473
Marat Dukhan33fcf782020-05-24 14:27:15 -07005474xnnpack_cc_library(
5475 name = "memory_planner_test_mode",
5476 srcs = ["src/memory-planner.c"],
5477 hdrs = INTERNAL_HDRS,
5478 copts = [
5479 "-UNDEBUG",
5480 "-DXNN_TEST_MODE=1",
5481 ],
5482 defines = select({
5483 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5484 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5485 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5486 }),
5487 gcc_copts = xnnpack_gcc_std_copts(),
5488 msvc_copts = xnnpack_msvc_std_copts(),
5489 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005490 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005491 "@pthreadpool",
5492 ],
5493)
5494
Marat Dukhan08c4a432019-10-03 09:29:21 -07005495cc_library(
5496 name = "enable_assembly",
5497 defines = select({
5498 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5499 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005500 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005501 }),
5502)
5503
Marat Dukhan9de90e02020-06-18 16:04:12 -07005504cc_library(
5505 name = "enable_sparse",
5506 defines = select({
5507 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5508 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005509 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005510 }),
5511)
5512
Marat Dukhancf056b22019-10-07 10:26:29 -07005513xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005514 name = "operators",
5515 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005516 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005517 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005518 ],
5519 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005520 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005521 "-Isrc",
5522 "-Iinclude",
5523 ] + select({
5524 ":debug_build": [],
5525 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005526 }) + select({
5527 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5528 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005529 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005530 gcc_copts = xnnpack_gcc_std_copts(),
5531 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005532 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005533 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005534 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005535 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005536 "@FP16",
5537 "@FXdiv",
5538 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005539 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005540 ],
5541)
5542
Marat Dukhan10a38082020-04-17 03:58:35 -07005543xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005544 name = "operators_test_mode",
5545 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005546 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005547 "src/operator-delete.c",
5548 ],
5549 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5550 copts = LOGGING_COPTS + [
5551 "-Isrc",
5552 "-Iinclude",
5553 "-UNDEBUG",
5554 "-DXNN_TEST_MODE=1",
5555 ] + select({
5556 ":debug_build": [],
5557 "//conditions:default": xnnpack_min_size_copts(),
5558 }) + select({
5559 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5560 "//conditions:default": [],
5561 }),
5562 gcc_copts = xnnpack_gcc_std_copts(),
5563 msvc_copts = xnnpack_msvc_std_copts(),
5564 deps = [
5565 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005566 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005567 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005568 "@FP16",
5569 "@FXdiv",
5570 "@clog",
5571 "@pthreadpool",
5572 ],
5573)
5574
5575xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005576 name = "XNNPACK",
5577 srcs = [
5578 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005579 "src/runtime.c",
5580 "src/subgraph.c",
5581 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005582 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005583 hdrs = ["include/xnnpack.h"],
5584 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005585 "-Isrc",
5586 "-Iinclude",
5587 ] + select({
5588 ":debug_build": [],
5589 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005590 }) + select({
5591 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5592 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005593 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005594 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005595 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005596 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005597 visibility = xnnpack_visibility(),
5598 deps = [
5599 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005600 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005601 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005602 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005603 ":operator_run",
5604 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005605 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005606 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005607 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005608 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005609 ] + select({
5610 ":emscripten": [],
5611 "//conditions:default": ["@cpuinfo"],
5612 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005613)
5614
Marat Dukhan10a38082020-04-17 03:58:35 -07005615xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005616 name = "XNNPACK_test_mode",
5617 srcs = [
5618 "src/init.c",
5619 "src/runtime.c",
5620 "src/subgraph.c",
5621 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005622 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005623 hdrs = ["include/xnnpack.h"],
5624 copts = LOGGING_COPTS + [
5625 "-Isrc",
5626 "-Iinclude",
5627 "-UNDEBUG",
5628 "-DXNN_TEST_MODE=1",
5629 ] + select({
5630 ":debug_build": [],
5631 "//conditions:default": xnnpack_min_size_copts(),
5632 }) + select({
5633 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5634 "//conditions:default": [],
5635 }),
5636 gcc_copts = xnnpack_gcc_std_copts(),
5637 includes = ["include"],
5638 msvc_copts = xnnpack_msvc_std_copts(),
5639 visibility = xnnpack_visibility(),
5640 deps = [
5641 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005642 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005643 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005644 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005645 ":operator_run_test_mode",
5646 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005647 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005648 "@clog",
5649 "@FP16",
5650 "@pthreadpool",
5651 ] + select({
5652 ":emscripten": [],
5653 "//conditions:default": ["@cpuinfo"],
5654 }),
5655)
5656
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005657# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5658# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005659xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005660 name = "xnnpack_for_tflite",
5661 srcs = [
5662 "src/init.c",
5663 "src/runtime.c",
5664 "src/subgraph.c",
5665 "src/tensor.c",
5666 ] + SUBGRAPH_SRCS,
5667 hdrs = ["include/xnnpack.h"],
5668 copts = LOGGING_COPTS + [
5669 "-Isrc",
5670 "-Iinclude",
5671 ] + select({
5672 ":debug_build": [],
5673 "//conditions:default": xnnpack_min_size_copts(),
5674 }) + select({
5675 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5676 "//conditions:default": [],
5677 }),
5678 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005679 "XNN_NO_QU8_OPERATORS",
5680 "XNN_NO_U8_OPERATORS",
5681 "XNN_NO_X8_OPERATORS",
5682 "XNN_NO_F16_OPERATORS",
5683 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005684 ] + select({
5685 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005686 ":xnn_enable_qs8_explicit_false": [
5687 "XNN_NO_QC8_OPERATORS",
5688 "XNN_NO_QS8_OPERATORS",
5689 ],
5690 "//conditions:default": [
5691 "XNN_NO_QC8_OPERATORS",
5692 "XNN_NO_QS8_OPERATORS",
5693 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005694 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005695 gcc_copts = xnnpack_gcc_std_copts(),
5696 includes = ["include"],
5697 msvc_copts = xnnpack_msvc_std_copts(),
5698 visibility = xnnpack_visibility(),
5699 deps = [
5700 ":enable_assembly",
5701 ":enable_sparse",
5702 ":logging_utils",
5703 ":memory_planner",
5704 ":operator_run",
5705 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005706 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005707 "@clog",
5708 "@FP16",
5709 "@pthreadpool",
5710 ] + select({
5711 ":emscripten": [],
5712 "//conditions:default": ["@cpuinfo"],
5713 }),
5714)
5715
5716# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5717# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5718xnnpack_cc_library(
5719 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005720 srcs = [
5721 "src/init.c",
5722 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005723 hdrs = ["include/xnnpack.h"],
5724 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005725 "-Isrc",
5726 "-Iinclude",
5727 ] + select({
5728 ":debug_build": [],
5729 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005730 }) + select({
5731 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5732 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005733 }),
5734 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005735 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005736 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005737 "XNN_NO_U8_OPERATORS",
5738 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005739 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005740 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005741 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005742 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005743 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005744 visibility = xnnpack_visibility(),
5745 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005746 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005747 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005748 ":operator_run",
5749 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005750 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005751 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005752 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005753 ] + select({
5754 ":emscripten": [],
5755 "//conditions:default": ["@cpuinfo"],
5756 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005757)
5758
Marat Dukhancf056b22019-10-07 10:26:29 -07005759xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005760 name = "bench_utils",
5761 srcs = ["bench/utils.cc"],
5762 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005763 deps = [
5764 "@com_google_benchmark//:benchmark",
5765 "@cpuinfo",
5766 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005767)
5768
Frank Barchard7e955972019-10-11 10:34:25 -07005769######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005770
5771xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005772 name = "qs8_gemm_bench",
5773 srcs = [
5774 "bench/gemm.h",
5775 "bench/qs8-gemm.cc",
5776 "src/xnnpack/AlignedAllocator.h",
5777 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005778 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5779 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005780)
5781
5782xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005783 name = "qs8_requantization_bench",
5784 srcs = [
5785 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005786 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005787 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005788 ] + MICROKERNEL_BENCHMARK_HDRS,
5789 deps = MICROKERNEL_BENCHMARK_DEPS,
5790)
5791
5792xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005793 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005794 srcs = [
5795 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005796 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005797 "src/xnnpack/AlignedAllocator.h",
5798 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005799 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005800 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005801)
5802
5803xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005804 name = "qu8_requantization_bench",
5805 srcs = [
5806 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005807 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005808 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005809 ] + MICROKERNEL_BENCHMARK_HDRS,
5810 deps = MICROKERNEL_BENCHMARK_DEPS,
5811)
5812
5813xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005814 name = "f16_igemm_bench",
5815 srcs = [
5816 "bench/f16-igemm.cc",
5817 "bench/conv.h",
5818 "bench/google/conv.h",
5819 "src/xnnpack/AlignedAllocator.h",
5820 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005821 deps = MICROKERNEL_BENCHMARK_DEPS + [
5822 ":indirection",
5823 ":packing",
5824 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005825)
5826
5827xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005828 name = "f16_gemm_bench",
5829 srcs = [
5830 "bench/f16-gemm.cc",
5831 "bench/gemm.h",
5832 "src/xnnpack/AlignedAllocator.h",
5833 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005834 deps = MICROKERNEL_BENCHMARK_DEPS + [
5835 ":packing",
5836 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005837)
5838
5839xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005840 name = "f16_spmm_bench",
5841 srcs = [
5842 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005843 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005844 "src/xnnpack/AlignedAllocator.h",
5845 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005846 deps = MICROKERNEL_BENCHMARK_DEPS,
5847)
5848
5849xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005850 name = "f16_vrelu_bench",
5851 srcs = [
5852 "bench/f16-vrelu.cc",
5853 "src/xnnpack/AlignedAllocator.h",
5854 ] + MICROKERNEL_BENCHMARK_HDRS,
5855 deps = MICROKERNEL_BENCHMARK_DEPS,
5856)
5857
5858xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005859 name = "f32_igemm_bench",
5860 srcs = [
5861 "bench/f32-igemm.cc",
5862 "bench/conv.h",
5863 "src/xnnpack/AlignedAllocator.h",
5864 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005865 deps = MICROKERNEL_BENCHMARK_DEPS + [
5866 ":indirection",
5867 ":packing",
5868 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005869)
5870
5871xnnpack_benchmark(
5872 name = "f32_conv_hwc_bench",
5873 srcs = [
5874 "bench/f32-conv-hwc.cc",
5875 "bench/dconv.h",
5876 "src/xnnpack/AlignedAllocator.h",
5877 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005878 deps = MICROKERNEL_BENCHMARK_DEPS + [
5879 ":packing",
5880 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005881)
5882
5883xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005884 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005885 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005886 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005887 "bench/dconv.h",
5888 "src/xnnpack/AlignedAllocator.h",
5889 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005890 deps = MICROKERNEL_BENCHMARK_DEPS + [
5891 ":packing",
5892 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005893)
5894
5895xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005896 name = "f16_dwconv_bench",
5897 srcs = [
5898 "bench/f16-dwconv.cc",
5899 "bench/dwconv.h",
5900 "bench/google/dwconv.h",
5901 "src/xnnpack/AlignedAllocator.h",
5902 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005903 deps = MICROKERNEL_BENCHMARK_DEPS + [
5904 ":indirection",
5905 ":packing",
5906 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005907)
5908
5909xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005910 name = "f32_dwconv_bench",
5911 srcs = [
5912 "bench/f32-dwconv.cc",
5913 "bench/dwconv.h",
5914 "src/xnnpack/AlignedAllocator.h",
5915 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005916 deps = MICROKERNEL_BENCHMARK_DEPS + [
5917 ":indirection",
5918 ":packing",
5919 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005920)
5921
5922xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005923 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005924 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005925 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005926 "bench/dwconv.h",
5927 "src/xnnpack/AlignedAllocator.h",
5928 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005929 deps = MICROKERNEL_BENCHMARK_DEPS + [
5930 ":indirection",
5931 ":packing",
5932 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005933)
5934
5935xnnpack_benchmark(
5936 name = "f32_gemm_bench",
5937 srcs = [
5938 "bench/f32-gemm.cc",
5939 "bench/gemm.h",
5940 "src/xnnpack/AlignedAllocator.h",
5941 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005942 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005943 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005944)
5945
5946xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005947 name = "f32_raddexpminusmax_bench",
5948 srcs = [
5949 "bench/f32-raddexpminusmax.cc",
5950 "src/xnnpack/AlignedAllocator.h",
5951 ] + MICROKERNEL_BENCHMARK_HDRS,
5952 deps = MICROKERNEL_BENCHMARK_DEPS,
5953)
5954
5955xnnpack_benchmark(
5956 name = "f32_raddextexp_bench",
5957 srcs = [
5958 "bench/f32-raddextexp.cc",
5959 "src/xnnpack/AlignedAllocator.h",
5960 ] + MICROKERNEL_BENCHMARK_HDRS,
5961 deps = MICROKERNEL_BENCHMARK_DEPS,
5962)
5963
5964xnnpack_benchmark(
5965 name = "f32_raddstoreexpminusmax_bench",
5966 srcs = [
5967 "bench/f32-raddstoreexpminusmax.cc",
5968 "src/xnnpack/AlignedAllocator.h",
5969 ] + MICROKERNEL_BENCHMARK_HDRS,
5970 deps = MICROKERNEL_BENCHMARK_DEPS,
5971)
5972
5973xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005974 name = "f32_rmax_bench",
5975 srcs = [
5976 "bench/f32-rmax.cc",
5977 "src/xnnpack/AlignedAllocator.h",
5978 ] + MICROKERNEL_BENCHMARK_HDRS,
5979 deps = MICROKERNEL_BENCHMARK_DEPS,
5980)
5981
5982xnnpack_benchmark(
5983 name = "f32_spmm_bench",
5984 srcs = [
5985 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005986 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005987 "src/xnnpack/AlignedAllocator.h",
5988 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005989 deps = MICROKERNEL_BENCHMARK_DEPS,
5990)
5991
5992xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005993 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005994 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005995 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005996 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005997 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005998 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005999)
6000
6001xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006002 name = "f32_velu_bench",
6003 srcs = [
6004 "bench/f32-velu.cc",
6005 "src/xnnpack/AlignedAllocator.h",
6006 ] + MICROKERNEL_BENCHMARK_HDRS,
6007 deps = MICROKERNEL_BENCHMARK_DEPS,
6008)
6009
6010xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006011 name = "f32_vhswish_bench",
6012 srcs = [
6013 "bench/f32-vhswish.cc",
6014 "src/xnnpack/AlignedAllocator.h",
6015 ] + MICROKERNEL_BENCHMARK_HDRS,
6016 deps = MICROKERNEL_BENCHMARK_DEPS,
6017)
6018
6019xnnpack_benchmark(
6020 name = "f32_vrelu_bench",
6021 srcs = [
6022 "bench/f32-vrelu.cc",
6023 "src/xnnpack/AlignedAllocator.h",
6024 ] + MICROKERNEL_BENCHMARK_HDRS,
6025 deps = MICROKERNEL_BENCHMARK_DEPS,
6026)
6027
6028xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006029 name = "f32_vscaleexpminusmax_bench",
6030 srcs = [
6031 "bench/f32-vscaleexpminusmax.cc",
6032 "src/xnnpack/AlignedAllocator.h",
6033 ] + MICROKERNEL_BENCHMARK_HDRS,
6034 deps = MICROKERNEL_BENCHMARK_DEPS,
6035)
6036
6037xnnpack_benchmark(
6038 name = "f32_vscaleextexp_bench",
6039 srcs = [
6040 "bench/f32-vscaleextexp.cc",
6041 "src/xnnpack/AlignedAllocator.h",
6042 ] + MICROKERNEL_BENCHMARK_HDRS,
6043 deps = MICROKERNEL_BENCHMARK_DEPS,
6044)
6045
6046xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006047 name = "f32_vsigmoid_bench",
6048 srcs = [
6049 "bench/f32-vsigmoid.cc",
6050 "src/xnnpack/AlignedAllocator.h",
6051 ] + MICROKERNEL_BENCHMARK_HDRS,
6052 deps = MICROKERNEL_BENCHMARK_DEPS,
6053)
6054
6055xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006056 name = "f32_vsqrt_bench",
6057 srcs = [
6058 "bench/f32-vsqrt.cc",
6059 "src/xnnpack/AlignedAllocator.h",
6060 ] + MICROKERNEL_BENCHMARK_HDRS,
6061 deps = MICROKERNEL_BENCHMARK_DEPS,
6062)
6063
6064xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006065 name = "f32_im2col_gemm_bench",
6066 srcs = [
6067 "bench/f32-im2col-gemm.cc",
6068 "bench/conv.h",
6069 "src/xnnpack/AlignedAllocator.h",
6070 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006071 deps = MICROKERNEL_BENCHMARK_DEPS + [
6072 ":im2col",
6073 ":packing",
6074 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006075)
6076
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006077xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006078 name = "rounding_bench",
6079 srcs = [
6080 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006081 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006082 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006083 ] + MICROKERNEL_BENCHMARK_HDRS,
6084 deps = MICROKERNEL_BENCHMARK_DEPS,
6085)
6086
Marat Dukhan08c4a432019-10-03 09:29:21 -07006087########################### Benchmarks for operators ###########################
6088
6089xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006090 name = "average_pooling_bench",
6091 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006092 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006093 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006094 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006095)
6096
6097xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006098 name = "bankers_rounding_bench",
6099 srcs = ["bench/bankers-rounding.cc"],
6100 copts = xnnpack_optional_tflite_copts(),
6101 tags = ["nowin32"],
6102 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6103)
6104
6105xnnpack_benchmark(
6106 name = "ceiling_bench",
6107 srcs = ["bench/ceiling.cc"],
6108 copts = xnnpack_optional_tflite_copts(),
6109 tags = ["nowin32"],
6110 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6111)
6112
6113xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006114 name = "channel_shuffle_bench",
6115 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006116 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006117)
6118
6119xnnpack_benchmark(
6120 name = "convolution_bench",
6121 srcs = ["bench/convolution.cc"],
6122 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006123 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006124 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006125)
6126
6127xnnpack_benchmark(
6128 name = "deconvolution_bench",
6129 srcs = ["bench/deconvolution.cc"],
6130 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006131 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006132 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006133)
6134
6135xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006136 name = "elu_bench",
6137 srcs = ["bench/elu.cc"],
6138 copts = xnnpack_optional_tflite_copts(),
6139 tags = ["nowin32"],
6140 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6141)
6142
6143xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006144 name = "floor_bench",
6145 srcs = ["bench/floor.cc"],
6146 copts = xnnpack_optional_tflite_copts(),
6147 tags = ["nowin32"],
6148 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6149)
6150
6151xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006152 name = "global_average_pooling_bench",
6153 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006154 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006155)
6156
6157xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006158 name = "hardswish_bench",
6159 srcs = ["bench/hardswish.cc"],
6160 copts = xnnpack_optional_tflite_copts(),
6161 tags = ["nowin32"],
6162 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6163)
6164
6165xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006166 name = "max_pooling_bench",
6167 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006168 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006169)
6170
6171xnnpack_benchmark(
6172 name = "sigmoid_bench",
6173 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006174 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006175 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006176 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006177)
6178
6179xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006180 name = "prelu_bench",
6181 srcs = ["bench/prelu.cc"],
6182 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006183 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006184 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006185)
6186
6187xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006188 name = "softmax_bench",
6189 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006190 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006191 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006192 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006193)
6194
Marat Dukhan87727142020-06-24 15:24:10 -07006195xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006196 name = "square_root_bench",
6197 srcs = ["bench/square-root.cc"],
6198 copts = xnnpack_optional_tflite_copts(),
6199 tags = ["nowin32"],
6200 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6201)
6202
6203xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006204 name = "truncation_bench",
6205 srcs = ["bench/truncation.cc"],
6206 deps = OPERATOR_BENCHMARK_DEPS,
6207)
6208
Marat Dukhanc068bb62019-10-04 13:24:39 -07006209############################# End-to-end benchmarks ############################
6210
6211cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006212 name = "fp32_mobilenet_v1",
6213 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006214 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006215 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006216 linkstatic = True,
6217 deps = [
6218 ":XNNPACK",
6219 "@pthreadpool",
6220 ],
6221)
6222
6223cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006224 name = "fp32_sparse_mobilenet_v1",
6225 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6226 hdrs = ["models/models.h"],
6227 copts = xnnpack_std_cxxopts(),
6228 linkstatic = True,
6229 deps = [
6230 ":XNNPACK",
6231 "@pthreadpool",
6232 ],
6233)
6234
6235cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006236 name = "fp16_mobilenet_v1",
6237 srcs = ["models/fp16-mobilenet-v1.cc"],
6238 hdrs = ["models/models.h"],
6239 copts = xnnpack_std_cxxopts(),
6240 linkstatic = True,
6241 deps = [
6242 ":XNNPACK",
6243 "@FP16",
6244 "@pthreadpool",
6245 ],
6246)
6247
6248cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006249 name = "qs8_mobilenet_v1",
6250 srcs = ["models/qs8-mobilenet-v1.cc"],
6251 hdrs = ["models/models.h"],
6252 copts = xnnpack_std_cxxopts(),
6253 linkstatic = True,
6254 deps = [
6255 ":XNNPACK",
6256 "@pthreadpool",
6257 ],
6258)
6259
6260cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006261 name = "qs8_mobilenet_v2",
6262 srcs = ["models/qs8-mobilenet-v2.cc"],
6263 hdrs = ["models/models.h"],
6264 copts = xnnpack_std_cxxopts(),
6265 linkstatic = True,
6266 deps = [
6267 ":XNNPACK",
6268 "@pthreadpool",
6269 ],
6270)
6271
6272cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006273 name = "qu8_mobilenet_v1",
6274 srcs = ["models/qu8-mobilenet-v1.cc"],
6275 hdrs = ["models/models.h"],
6276 copts = xnnpack_std_cxxopts(),
6277 linkstatic = True,
6278 deps = [
6279 ":XNNPACK",
6280 "@pthreadpool",
6281 ],
6282)
6283
6284cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006285 name = "fp32_mobilenet_v2",
6286 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006287 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006288 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006289 linkstatic = True,
6290 deps = [
6291 ":XNNPACK",
6292 "@pthreadpool",
6293 ],
6294)
6295
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006296cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006297 name = "fp32_sparse_mobilenet_v2",
6298 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6299 hdrs = ["models/models.h"],
6300 copts = xnnpack_std_cxxopts(),
6301 linkstatic = True,
6302 deps = [
6303 ":XNNPACK",
6304 "@pthreadpool",
6305 ],
6306)
6307
6308cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006309 name = "fp16_mobilenet_v2",
6310 srcs = ["models/fp16-mobilenet-v2.cc"],
6311 hdrs = ["models/models.h"],
6312 copts = xnnpack_std_cxxopts(),
6313 linkstatic = True,
6314 deps = [
6315 ":XNNPACK",
6316 "@FP16",
6317 "@pthreadpool",
6318 ],
6319)
6320
6321cc_library(
6322 name = "fp32_mobilenet_v3_large",
6323 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006324 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006325 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006326 linkstatic = True,
6327 deps = [
6328 ":XNNPACK",
6329 "@pthreadpool",
6330 ],
6331)
6332
6333cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006334 name = "fp32_sparse_mobilenet_v3_large",
6335 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6336 hdrs = ["models/models.h"],
6337 copts = xnnpack_std_cxxopts(),
6338 linkstatic = True,
6339 deps = [
6340 ":XNNPACK",
6341 "@pthreadpool",
6342 ],
6343)
6344
6345cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006346 name = "fp16_mobilenet_v3_large",
6347 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6348 hdrs = ["models/models.h"],
6349 copts = xnnpack_std_cxxopts(),
6350 linkstatic = True,
6351 deps = [
6352 ":XNNPACK",
6353 "@FP16",
6354 "@pthreadpool",
6355 ],
6356)
6357
6358cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006359 name = "fp32_mobilenet_v3_small",
6360 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006361 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006362 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006363 linkstatic = True,
6364 deps = [
6365 ":XNNPACK",
6366 "@pthreadpool",
6367 ],
6368)
6369
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006370cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006371 name = "fp32_sparse_mobilenet_v3_small",
6372 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6373 hdrs = ["models/models.h"],
6374 copts = xnnpack_std_cxxopts(),
6375 linkstatic = True,
6376 deps = [
6377 ":XNNPACK",
6378 "@pthreadpool",
6379 ],
6380)
6381
6382cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006383 name = "fp16_mobilenet_v3_small",
6384 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6385 hdrs = ["models/models.h"],
6386 copts = xnnpack_std_cxxopts(),
6387 linkstatic = True,
6388 deps = [
6389 ":XNNPACK",
6390 "@FP16",
6391 "@pthreadpool",
6392 ],
6393)
6394
Marat Dukhanc068bb62019-10-04 13:24:39 -07006395xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006396 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006397 srcs = [
6398 "bench/f32-dwconv-e2e.cc",
6399 "bench/end2end.h",
6400 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006401 deps = MICROKERNEL_BENCHMARK_DEPS + [
6402 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006403 ":fp32_mobilenet_v1",
6404 ":fp32_mobilenet_v2",
6405 ":fp32_mobilenet_v3_large",
6406 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006407 ],
6408)
6409
6410xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006411 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006412 srcs = [
6413 "bench/f32-gemm-e2e.cc",
6414 "bench/end2end.h",
6415 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006416 deps = MICROKERNEL_BENCHMARK_DEPS + [
6417 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006418 ":fp32_mobilenet_v1",
6419 ":fp32_mobilenet_v2",
6420 ":fp32_mobilenet_v3_large",
6421 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006422 ],
6423)
6424
6425xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006426 name = "qs8_gemm_e2e_bench",
6427 srcs = [
6428 "bench/qs8-gemm-e2e.cc",
6429 "bench/end2end.h",
6430 ] + MICROKERNEL_BENCHMARK_HDRS,
6431 deps = MICROKERNEL_BENCHMARK_DEPS + [
6432 ":XNNPACK",
6433 ":qs8_mobilenet_v1",
6434 ":qs8_mobilenet_v2",
6435 ],
6436)
6437
6438xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006439 name = "end2end_bench",
6440 srcs = ["bench/end2end.cc"],
6441 deps = [
6442 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006443 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006444 ":fp16_mobilenet_v1",
6445 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006446 ":fp16_mobilenet_v3_large",
6447 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006448 ":fp32_mobilenet_v1",
6449 ":fp32_mobilenet_v2",
6450 ":fp32_mobilenet_v3_large",
6451 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006452 ":fp32_sparse_mobilenet_v1",
6453 ":fp32_sparse_mobilenet_v2",
6454 ":fp32_sparse_mobilenet_v3_large",
6455 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006456 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006457 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006458 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006459 "@pthreadpool",
6460 ],
6461)
6462
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006463#################### Accuracy evaluation for math functions ####################
6464
6465xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006466 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006467 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006468 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006469 "src/xnnpack/AlignedAllocator.h",
6470 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006471 deps = ACCURACY_EVAL_DEPS + [
6472 ":bench_utils",
6473 "@cpuinfo",
6474 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006475)
6476
Marat Dukhan515c9772019-10-17 18:07:57 -07006477xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006478 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006479 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006480 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006481 "src/xnnpack/AlignedAllocator.h",
6482 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006483 deps = ACCURACY_EVAL_DEPS + [
6484 ":bench_utils",
6485 "@cpuinfo",
6486 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006487)
6488
Marat Dukhan98ba4412019-10-23 02:14:28 -07006489xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006490 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006491 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006492 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006493 "src/xnnpack/AlignedAllocator.h",
6494 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006495 deps = ACCURACY_EVAL_DEPS + [
6496 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006497 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006498 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006499)
6500
6501xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006502 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006503 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006504 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006505 "src/xnnpack/AlignedAllocator.h",
6506 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006507 deps = ACCURACY_EVAL_DEPS + [
6508 ":bench_utils",
6509 "@cpuinfo",
6510 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006511)
6512
Marat Dukhanf44f0222020-12-14 11:53:27 -08006513xnnpack_benchmark(
6514 name = "f32_sigmoid_ulp_eval",
6515 srcs = [
6516 "eval/f32-sigmoid-ulp.cc",
6517 "src/xnnpack/AlignedAllocator.h",
6518 ] + ACCURACY_EVAL_HDRS,
6519 deps = ACCURACY_EVAL_DEPS + [
6520 ":bench_utils",
6521 "@cpuinfo",
6522 ],
6523)
6524
6525xnnpack_benchmark(
6526 name = "f32_sqrt_ulp_eval",
6527 srcs = [
6528 "eval/f32-sqrt-ulp.cc",
6529 "src/xnnpack/AlignedAllocator.h",
6530 ] + ACCURACY_EVAL_HDRS,
6531 deps = ACCURACY_EVAL_DEPS + [
6532 ":bench_utils",
6533 "@cpuinfo",
6534 ],
6535)
6536
6537################### Accuracy verification for math functions ##################
6538
6539xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006540 name = "f32_exp_eval",
6541 srcs = [
6542 "eval/f32-exp.cc",
6543 "src/xnnpack/AlignedAllocator.h",
6544 "src/xnnpack/math-stubs.h",
6545 ] + MICROKERNEL_TEST_HDRS,
6546 automatic = False,
6547 deps = MICROKERNEL_TEST_DEPS,
6548)
6549
6550xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006551 name = "f32_expm1minus_eval",
6552 srcs = [
6553 "eval/f32-expm1minus.cc",
6554 "src/xnnpack/AlignedAllocator.h",
6555 "src/xnnpack/math-stubs.h",
6556 ] + MICROKERNEL_TEST_HDRS,
6557 automatic = False,
6558 deps = MICROKERNEL_TEST_DEPS,
6559)
6560
Marat Dukhan8853b822020-05-07 12:19:01 -07006561xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006562 name = "f32_expminus_eval",
6563 srcs = [
6564 "eval/f32-expminus.cc",
6565 "src/xnnpack/AlignedAllocator.h",
6566 "src/xnnpack/math-stubs.h",
6567 ] + MICROKERNEL_TEST_HDRS,
6568 automatic = False,
6569 deps = MICROKERNEL_TEST_DEPS,
6570)
6571
6572xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006573 name = "f32_roundne_eval",
6574 srcs = [
6575 "eval/f32-roundne.cc",
6576 "src/xnnpack/AlignedAllocator.h",
6577 "src/xnnpack/math-stubs.h",
6578 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006579 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006580 deps = MICROKERNEL_TEST_DEPS,
6581)
6582
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006583xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006584 name = "f32_roundd_eval",
6585 srcs = [
6586 "eval/f32-roundd.cc",
6587 "src/xnnpack/AlignedAllocator.h",
6588 "src/xnnpack/math-stubs.h",
6589 ] + MICROKERNEL_TEST_HDRS,
6590 automatic = False,
6591 deps = MICROKERNEL_TEST_DEPS,
6592)
6593
6594xnnpack_unit_test(
6595 name = "f32_roundu_eval",
6596 srcs = [
6597 "eval/f32-roundu.cc",
6598 "src/xnnpack/AlignedAllocator.h",
6599 "src/xnnpack/math-stubs.h",
6600 ] + MICROKERNEL_TEST_HDRS,
6601 automatic = False,
6602 deps = MICROKERNEL_TEST_DEPS,
6603)
6604
6605xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006606 name = "f32_roundz_eval",
6607 srcs = [
6608 "eval/f32-roundz.cc",
6609 "src/xnnpack/AlignedAllocator.h",
6610 "src/xnnpack/math-stubs.h",
6611 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006612 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006613 deps = MICROKERNEL_TEST_DEPS,
6614)
6615
Marat Dukhan08c4a432019-10-03 09:29:21 -07006616######################### Unit tests for micro-kernels #########################
6617
6618xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006619 name = "f16_dwconv_minmax_test",
6620 srcs = [
6621 "test/f16-dwconv-minmax.cc",
6622 "test/dwconv-microkernel-tester.h",
6623 "src/xnnpack/AlignedAllocator.h",
6624 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6625 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6626)
6627
6628xnnpack_unit_test(
6629 name = "f16_gavgpool_minmax_test",
6630 srcs = [
6631 "test/f16-gavgpool-minmax.cc",
6632 "test/gavgpool-microkernel-tester.h",
6633 "src/xnnpack/AlignedAllocator.h",
6634 ] + MICROKERNEL_TEST_HDRS,
6635 deps = MICROKERNEL_TEST_DEPS,
6636)
6637
6638xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006639 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006640 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006641 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006642 "test/gemm-microkernel-tester.h",
6643 "src/xnnpack/AlignedAllocator.h",
6644 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006645 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006646)
6647
6648xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006649 name = "f16_igemm_minmax_test",
6650 srcs = [
6651 "test/f16-igemm-minmax.cc",
6652 "test/gemm-microkernel-tester.h",
6653 "src/xnnpack/AlignedAllocator.h",
6654 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6655 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6656)
6657
6658xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006659 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006660 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006661 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006662 "test/spmm-microkernel-tester.h",
6663 "src/xnnpack/AlignedAllocator.h",
6664 ] + MICROKERNEL_TEST_HDRS,
6665 deps = MICROKERNEL_TEST_DEPS,
6666)
6667
6668xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006669 name = "f16_vadd_minmax_test",
6670 srcs = [
6671 "test/f16-vadd-minmax.cc",
6672 "test/vbinary-microkernel-tester.h",
6673 ] + MICROKERNEL_TEST_HDRS,
6674 deps = MICROKERNEL_TEST_DEPS,
6675)
6676
6677xnnpack_unit_test(
6678 name = "f16_vaddc_minmax_test",
6679 srcs = [
6680 "test/f16-vaddc-minmax.cc",
6681 "test/vbinaryc-microkernel-tester.h",
6682 ] + MICROKERNEL_TEST_HDRS,
6683 deps = MICROKERNEL_TEST_DEPS,
6684)
6685
6686xnnpack_unit_test(
6687 name = "f16_vclamp_test",
6688 srcs = [
6689 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006690 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006691 ] + MICROKERNEL_TEST_HDRS,
6692 deps = MICROKERNEL_TEST_DEPS,
6693)
6694
6695xnnpack_unit_test(
6696 name = "f16_vdiv_minmax_test",
6697 srcs = [
6698 "test/f16-vdiv-minmax.cc",
6699 "test/vbinary-microkernel-tester.h",
6700 ] + MICROKERNEL_TEST_HDRS,
6701 deps = MICROKERNEL_TEST_DEPS,
6702)
6703
6704xnnpack_unit_test(
6705 name = "f16_vdivc_minmax_test",
6706 srcs = [
6707 "test/f16-vdivc-minmax.cc",
6708 "test/vbinaryc-microkernel-tester.h",
6709 ] + MICROKERNEL_TEST_HDRS,
6710 deps = MICROKERNEL_TEST_DEPS,
6711)
6712
6713xnnpack_unit_test(
6714 name = "f16_vrdivc_minmax_test",
6715 srcs = [
6716 "test/f16-vrdivc-minmax.cc",
6717 "test/vbinaryc-microkernel-tester.h",
6718 ] + MICROKERNEL_TEST_HDRS,
6719 deps = MICROKERNEL_TEST_DEPS,
6720)
6721
6722xnnpack_unit_test(
6723 name = "f16_vhswish_test",
6724 srcs = [
6725 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006726 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006727 ] + MICROKERNEL_TEST_HDRS,
6728 deps = MICROKERNEL_TEST_DEPS,
6729)
6730
6731xnnpack_unit_test(
6732 name = "f16_vmax_test",
6733 srcs = [
6734 "test/f16-vmax.cc",
6735 "test/vbinary-microkernel-tester.h",
6736 ] + MICROKERNEL_TEST_HDRS,
6737 deps = MICROKERNEL_TEST_DEPS,
6738)
6739
6740xnnpack_unit_test(
6741 name = "f16_vmaxc_test",
6742 srcs = [
6743 "test/f16-vmaxc.cc",
6744 "test/vbinaryc-microkernel-tester.h",
6745 ] + MICROKERNEL_TEST_HDRS,
6746 deps = MICROKERNEL_TEST_DEPS,
6747)
6748
6749xnnpack_unit_test(
6750 name = "f16_vmin_test",
6751 srcs = [
6752 "test/f16-vmin.cc",
6753 "test/vbinary-microkernel-tester.h",
6754 ] + MICROKERNEL_TEST_HDRS,
6755 deps = MICROKERNEL_TEST_DEPS,
6756)
6757
6758xnnpack_unit_test(
6759 name = "f16_vminc_test",
6760 srcs = [
6761 "test/f16-vminc.cc",
6762 "test/vbinaryc-microkernel-tester.h",
6763 ] + MICROKERNEL_TEST_HDRS,
6764 deps = MICROKERNEL_TEST_DEPS,
6765)
6766
6767xnnpack_unit_test(
6768 name = "f16_vmul_minmax_test",
6769 srcs = [
6770 "test/f16-vmul-minmax.cc",
6771 "test/vbinary-microkernel-tester.h",
6772 ] + MICROKERNEL_TEST_HDRS,
6773 deps = MICROKERNEL_TEST_DEPS,
6774)
6775
6776xnnpack_unit_test(
6777 name = "f16_vmulc_minmax_test",
6778 srcs = [
6779 "test/f16-vmulc-minmax.cc",
6780 "test/vbinaryc-microkernel-tester.h",
6781 ] + MICROKERNEL_TEST_HDRS,
6782 deps = MICROKERNEL_TEST_DEPS,
6783)
6784
6785xnnpack_unit_test(
6786 name = "f16_vmulcaddc_minmax_test",
6787 srcs = [
6788 "test/f16-vmulcaddc-minmax.cc",
6789 "test/vmulcaddc-microkernel-tester.h",
6790 "src/xnnpack/AlignedAllocator.h",
6791 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6792 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6793)
6794
6795xnnpack_unit_test(
6796 name = "f16_vsub_minmax_test",
6797 srcs = [
6798 "test/f16-vsub-minmax.cc",
6799 "test/vbinary-microkernel-tester.h",
6800 ] + MICROKERNEL_TEST_HDRS,
6801 deps = MICROKERNEL_TEST_DEPS,
6802)
6803
6804xnnpack_unit_test(
6805 name = "f16_vsubc_minmax_test",
6806 srcs = [
6807 "test/f16-vsubc-minmax.cc",
6808 "test/vbinaryc-microkernel-tester.h",
6809 ] + MICROKERNEL_TEST_HDRS,
6810 deps = MICROKERNEL_TEST_DEPS,
6811)
6812
6813xnnpack_unit_test(
6814 name = "f16_vrsubc_minmax_test",
6815 srcs = [
6816 "test/f16-vrsubc-minmax.cc",
6817 "test/vbinaryc-microkernel-tester.h",
6818 ] + MICROKERNEL_TEST_HDRS,
6819 deps = MICROKERNEL_TEST_DEPS,
6820)
6821
6822xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006823 name = "f32_argmaxpool_test",
6824 srcs = [
6825 "test/f32-argmaxpool.cc",
6826 "test/argmaxpool-microkernel-tester.h",
6827 "src/xnnpack/AlignedAllocator.h",
6828 ] + MICROKERNEL_TEST_HDRS,
6829 deps = MICROKERNEL_TEST_DEPS,
6830)
6831
6832xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006833 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006834 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006835 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006836 "test/avgpool-microkernel-tester.h",
6837 "src/xnnpack/AlignedAllocator.h",
6838 ] + MICROKERNEL_TEST_HDRS,
6839 deps = MICROKERNEL_TEST_DEPS,
6840)
6841
6842xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006843 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006844 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006845 "test/f32-ibilinear.cc",
6846 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006847 "src/xnnpack/AlignedAllocator.h",
6848 ] + MICROKERNEL_TEST_HDRS,
6849 deps = MICROKERNEL_TEST_DEPS,
6850)
6851
6852xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006853 name = "f32_ibilinear_chw_test",
6854 srcs = [
6855 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006856 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006857 "src/xnnpack/AlignedAllocator.h",
6858 ] + MICROKERNEL_TEST_HDRS,
6859 deps = MICROKERNEL_TEST_DEPS,
6860)
6861
6862xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006863 name = "f32_igemm_test",
6864 srcs = [
6865 "test/f32-igemm.cc",
6866 "test/gemm-microkernel-tester.h",
6867 "src/xnnpack/AlignedAllocator.h",
6868 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006869 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006870)
6871
6872xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006873 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006874 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006875 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006876 "test/gemm-microkernel-tester.h",
6877 "src/xnnpack/AlignedAllocator.h",
6878 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006879 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006880)
6881
6882xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006883 name = "f32_igemm_minmax_test",
6884 srcs = [
6885 "test/f32-igemm-minmax.cc",
6886 "test/gemm-microkernel-tester.h",
6887 "src/xnnpack/AlignedAllocator.h",
6888 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006889 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006890)
6891
6892xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006893 name = "f32_conv_hwc_test",
6894 srcs = [
6895 "test/f32-conv-hwc.cc",
6896 "test/conv-hwc-microkernel-tester.h",
6897 "src/xnnpack/AlignedAllocator.h",
6898 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006899 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006900)
6901
6902xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006903 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006904 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006905 "test/f32-conv-hwc2chw.cc",
6906 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006907 "src/xnnpack/AlignedAllocator.h",
6908 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006909 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006910)
6911
6912xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006913 name = "f32_dwconv_test",
6914 srcs = [
6915 "test/f32-dwconv.cc",
6916 "test/dwconv-microkernel-tester.h",
6917 "src/xnnpack/AlignedAllocator.h",
6918 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006919 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006920)
6921
6922xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006923 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006924 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006925 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006926 "test/dwconv-microkernel-tester.h",
6927 "src/xnnpack/AlignedAllocator.h",
6928 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006929 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006930)
6931
6932xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006933 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006934 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006935 "test/f32-dwconv2d-chw.cc",
6936 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006937 "src/xnnpack/AlignedAllocator.h",
6938 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006939 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006940)
6941
6942xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006943 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006944 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006945 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006946 "test/gavgpool-microkernel-tester.h",
6947 "src/xnnpack/AlignedAllocator.h",
6948 ] + MICROKERNEL_TEST_HDRS,
6949 deps = MICROKERNEL_TEST_DEPS,
6950)
6951
6952xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006953 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006954 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006955 "test/f32-gavgpool-cw.cc",
6956 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006957 "src/xnnpack/AlignedAllocator.h",
6958 ] + MICROKERNEL_TEST_HDRS,
6959 deps = MICROKERNEL_TEST_DEPS,
6960)
6961
6962xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006963 name = "f32_gemm_test",
6964 srcs = [
6965 "test/f32-gemm.cc",
6966 "test/gemm-microkernel-tester.h",
6967 "src/xnnpack/AlignedAllocator.h",
6968 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006969 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006970)
6971
6972xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006973 name = "f32_gemm_relu_test",
6974 srcs = [
6975 "test/f32-gemm-relu.cc",
6976 "test/gemm-microkernel-tester.h",
6977 "src/xnnpack/AlignedAllocator.h",
6978 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006979 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006980)
6981
6982xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006983 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006984 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006985 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006986 "test/gemm-microkernel-tester.h",
6987 "src/xnnpack/AlignedAllocator.h",
6988 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006989 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006990)
6991
6992xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006993 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006994 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006995 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006996 "test/gemm-microkernel-tester.h",
6997 "src/xnnpack/AlignedAllocator.h",
6998 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006999 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007000)
7001
7002xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007003 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007004 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007005 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007006 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007007 ] + MICROKERNEL_TEST_HDRS,
7008 deps = MICROKERNEL_TEST_DEPS,
7009)
7010
7011xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007012 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007013 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007014 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007015 "test/maxpool-microkernel-tester.h",
7016 ] + MICROKERNEL_TEST_HDRS,
7017 deps = MICROKERNEL_TEST_DEPS,
7018)
7019
7020xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007021 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007022 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007023 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007024 "test/avgpool-microkernel-tester.h",
7025 "src/xnnpack/AlignedAllocator.h",
7026 ] + MICROKERNEL_TEST_HDRS,
7027 deps = MICROKERNEL_TEST_DEPS,
7028)
7029
7030xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007031 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007032 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007033 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007034 "test/gemm-microkernel-tester.h",
7035 "src/xnnpack/AlignedAllocator.h",
7036 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007037 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007038)
7039
7040xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007041 name = "f16_prelu_test",
7042 srcs = [
7043 "test/f16-prelu.cc",
7044 "test/prelu-microkernel-tester.h",
7045 "src/xnnpack/AlignedAllocator.h",
7046 ] + MICROKERNEL_TEST_HDRS,
7047 deps = MICROKERNEL_TEST_DEPS,
7048)
7049
7050xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007051 name = "f32_prelu_test",
7052 srcs = [
7053 "test/f32-prelu.cc",
7054 "test/prelu-microkernel-tester.h",
7055 "src/xnnpack/AlignedAllocator.h",
7056 ] + MICROKERNEL_TEST_HDRS,
7057 deps = MICROKERNEL_TEST_DEPS,
7058)
7059
7060xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007061 name = "f32_raddexpminusmax_test",
7062 srcs = [
7063 "test/f32-raddexpminusmax.cc",
7064 "test/raddexpminusmax-microkernel-tester.h",
7065 ] + MICROKERNEL_TEST_HDRS,
7066 deps = MICROKERNEL_TEST_DEPS,
7067)
7068
7069xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007070 name = "f32_raddextexp_test",
7071 srcs = [
7072 "test/f32-raddextexp.cc",
7073 "test/raddextexp-microkernel-tester.h",
7074 ] + MICROKERNEL_TEST_HDRS,
7075 deps = MICROKERNEL_TEST_DEPS,
7076)
7077
7078xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007079 name = "f32_raddstoreexpminusmax_test",
7080 srcs = [
7081 "test/f32-raddstoreexpminusmax.cc",
7082 "test/raddstoreexpminusmax-microkernel-tester.h",
7083 ] + MICROKERNEL_TEST_HDRS,
7084 deps = MICROKERNEL_TEST_DEPS,
7085)
7086
7087xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007088 name = "f32_rmax_test",
7089 srcs = [
7090 "test/f32-rmax.cc",
7091 "test/rmax-microkernel-tester.h",
7092 ] + MICROKERNEL_TEST_HDRS,
7093 deps = MICROKERNEL_TEST_DEPS,
7094)
7095
7096xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007097 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007098 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007099 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007100 "test/spmm-microkernel-tester.h",
7101 "src/xnnpack/AlignedAllocator.h",
7102 ] + MICROKERNEL_TEST_HDRS,
7103 deps = MICROKERNEL_TEST_DEPS,
7104)
7105
7106xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007107 name = "f32_vabs_test",
7108 srcs = [
7109 "test/f32-vabs.cc",
7110 "test/vunary-microkernel-tester.h",
7111 ] + MICROKERNEL_TEST_HDRS,
7112 deps = MICROKERNEL_TEST_DEPS,
7113)
7114
7115xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007116 name = "f32_vadd_test",
7117 srcs = [
7118 "test/f32-vadd.cc",
7119 "test/vbinary-microkernel-tester.h",
7120 ] + MICROKERNEL_TEST_HDRS,
7121 deps = MICROKERNEL_TEST_DEPS,
7122)
7123
7124xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007125 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007126 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007127 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007128 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007129 ] + MICROKERNEL_TEST_HDRS,
7130 deps = MICROKERNEL_TEST_DEPS,
7131)
7132
7133xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007134 name = "f32_vadd_relu_test",
7135 srcs = [
7136 "test/f32-vadd-relu.cc",
7137 "test/vbinary-microkernel-tester.h",
7138 ] + MICROKERNEL_TEST_HDRS,
7139 deps = MICROKERNEL_TEST_DEPS,
7140)
7141
7142xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007143 name = "f32_vaddc_test",
7144 srcs = [
7145 "test/f32-vaddc.cc",
7146 "test/vbinaryc-microkernel-tester.h",
7147 ] + MICROKERNEL_TEST_HDRS,
7148 deps = MICROKERNEL_TEST_DEPS,
7149)
7150
7151xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007152 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007153 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007154 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007155 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007156 ] + MICROKERNEL_TEST_HDRS,
7157 deps = MICROKERNEL_TEST_DEPS,
7158)
7159
7160xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007161 name = "f32_vaddc_relu_test",
7162 srcs = [
7163 "test/f32-vaddc-relu.cc",
7164 "test/vbinaryc-microkernel-tester.h",
7165 ] + MICROKERNEL_TEST_HDRS,
7166 deps = MICROKERNEL_TEST_DEPS,
7167)
7168
7169xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007170 name = "f32_vclamp_test",
7171 srcs = [
7172 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007173 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007174 ] + MICROKERNEL_TEST_HDRS,
7175 deps = MICROKERNEL_TEST_DEPS,
7176)
7177
7178xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007179 name = "f32_vdiv_test",
7180 srcs = [
7181 "test/f32-vdiv.cc",
7182 "test/vbinary-microkernel-tester.h",
7183 ] + MICROKERNEL_TEST_HDRS,
7184 deps = MICROKERNEL_TEST_DEPS,
7185)
7186
7187xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007188 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007189 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007190 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007191 "test/vbinary-microkernel-tester.h",
7192 ] + MICROKERNEL_TEST_HDRS,
7193 deps = MICROKERNEL_TEST_DEPS,
7194)
7195
7196xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007197 name = "f32_vdiv_relu_test",
7198 srcs = [
7199 "test/f32-vdiv-relu.cc",
7200 "test/vbinary-microkernel-tester.h",
7201 ] + MICROKERNEL_TEST_HDRS,
7202 deps = MICROKERNEL_TEST_DEPS,
7203)
7204
7205xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007206 name = "f32_vdivc_test",
7207 srcs = [
7208 "test/f32-vdivc.cc",
7209 "test/vbinaryc-microkernel-tester.h",
7210 ] + MICROKERNEL_TEST_HDRS,
7211 deps = MICROKERNEL_TEST_DEPS,
7212)
7213
7214xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007215 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007216 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007217 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007218 "test/vbinaryc-microkernel-tester.h",
7219 ] + MICROKERNEL_TEST_HDRS,
7220 deps = MICROKERNEL_TEST_DEPS,
7221)
7222
7223xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007224 name = "f32_vdivc_relu_test",
7225 srcs = [
7226 "test/f32-vdivc-relu.cc",
7227 "test/vbinaryc-microkernel-tester.h",
7228 ] + MICROKERNEL_TEST_HDRS,
7229 deps = MICROKERNEL_TEST_DEPS,
7230)
7231
7232xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007233 name = "f32_vrdivc_test",
7234 srcs = [
7235 "test/f32-vrdivc.cc",
7236 "test/vbinaryc-microkernel-tester.h",
7237 ] + MICROKERNEL_TEST_HDRS,
7238 deps = MICROKERNEL_TEST_DEPS,
7239)
7240
7241xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007242 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007243 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007244 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007245 "test/vbinaryc-microkernel-tester.h",
7246 ] + MICROKERNEL_TEST_HDRS,
7247 deps = MICROKERNEL_TEST_DEPS,
7248)
7249
7250xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007251 name = "f32_vrdivc_relu_test",
7252 srcs = [
7253 "test/f32-vrdivc-relu.cc",
7254 "test/vbinaryc-microkernel-tester.h",
7255 ] + MICROKERNEL_TEST_HDRS,
7256 deps = MICROKERNEL_TEST_DEPS,
7257)
7258
7259xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007260 name = "f32_velu_test",
7261 srcs = [
7262 "test/f32-velu.cc",
7263 "test/vunary-microkernel-tester.h",
7264 ] + MICROKERNEL_TEST_HDRS,
7265 deps = MICROKERNEL_TEST_DEPS,
7266)
7267
7268xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007269 name = "f32_vmax_test",
7270 srcs = [
7271 "test/f32-vmax.cc",
7272 "test/vbinary-microkernel-tester.h",
7273 ] + MICROKERNEL_TEST_HDRS,
7274 deps = MICROKERNEL_TEST_DEPS,
7275)
7276
7277xnnpack_unit_test(
7278 name = "f32_vmaxc_test",
7279 srcs = [
7280 "test/f32-vmaxc.cc",
7281 "test/vbinaryc-microkernel-tester.h",
7282 ] + MICROKERNEL_TEST_HDRS,
7283 deps = MICROKERNEL_TEST_DEPS,
7284)
7285
7286xnnpack_unit_test(
7287 name = "f32_vmin_test",
7288 srcs = [
7289 "test/f32-vmin.cc",
7290 "test/vbinary-microkernel-tester.h",
7291 ] + MICROKERNEL_TEST_HDRS,
7292 deps = MICROKERNEL_TEST_DEPS,
7293)
7294
7295xnnpack_unit_test(
7296 name = "f32_vminc_test",
7297 srcs = [
7298 "test/f32-vminc.cc",
7299 "test/vbinaryc-microkernel-tester.h",
7300 ] + MICROKERNEL_TEST_HDRS,
7301 deps = MICROKERNEL_TEST_DEPS,
7302)
7303
7304xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007305 name = "f32_vmul_test",
7306 srcs = [
7307 "test/f32-vmul.cc",
7308 "test/vbinary-microkernel-tester.h",
7309 ] + MICROKERNEL_TEST_HDRS,
7310 deps = MICROKERNEL_TEST_DEPS,
7311)
7312
7313xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007314 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007315 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007316 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007317 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007318 ] + MICROKERNEL_TEST_HDRS,
7319 deps = MICROKERNEL_TEST_DEPS,
7320)
7321
7322xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007323 name = "f32_vmul_relu_test",
7324 srcs = [
7325 "test/f32-vmul-relu.cc",
7326 "test/vbinary-microkernel-tester.h",
7327 ] + MICROKERNEL_TEST_HDRS,
7328 deps = MICROKERNEL_TEST_DEPS,
7329)
7330
7331xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007332 name = "f32_vmulc_test",
7333 srcs = [
7334 "test/f32-vmulc.cc",
7335 "test/vbinaryc-microkernel-tester.h",
7336 ] + MICROKERNEL_TEST_HDRS,
7337 deps = MICROKERNEL_TEST_DEPS,
7338)
7339
7340xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007341 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007342 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007343 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007344 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007345 ] + MICROKERNEL_TEST_HDRS,
7346 deps = MICROKERNEL_TEST_DEPS,
7347)
7348
7349xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007350 name = "f32_vmulc_relu_test",
7351 srcs = [
7352 "test/f32-vmulc-relu.cc",
7353 "test/vbinaryc-microkernel-tester.h",
7354 ] + MICROKERNEL_TEST_HDRS,
7355 deps = MICROKERNEL_TEST_DEPS,
7356)
7357
7358xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007359 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007360 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007361 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007362 "test/vmulcaddc-microkernel-tester.h",
7363 "src/xnnpack/AlignedAllocator.h",
7364 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007365 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007366)
7367
7368xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007369 name = "f32_vlrelu_test",
7370 srcs = [
7371 "test/f32-vlrelu.cc",
7372 "test/vunary-microkernel-tester.h",
7373 ] + MICROKERNEL_TEST_HDRS,
7374 deps = MICROKERNEL_TEST_DEPS,
7375)
7376
7377xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007378 name = "f32_vneg_test",
7379 srcs = [
7380 "test/f32-vneg.cc",
7381 "test/vunary-microkernel-tester.h",
7382 ] + MICROKERNEL_TEST_HDRS,
7383 deps = MICROKERNEL_TEST_DEPS,
7384)
7385
7386xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007387 name = "f32_vrelu_test",
7388 srcs = [
7389 "test/f32-vrelu.cc",
7390 "test/vunary-microkernel-tester.h",
7391 ] + MICROKERNEL_TEST_HDRS,
7392 deps = MICROKERNEL_TEST_DEPS,
7393)
7394
7395xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007396 name = "f32_vrndne_test",
7397 srcs = [
7398 "test/f32-vrndne.cc",
7399 "test/vunary-microkernel-tester.h",
7400 ] + MICROKERNEL_TEST_HDRS,
7401 deps = MICROKERNEL_TEST_DEPS,
7402)
7403
7404xnnpack_unit_test(
7405 name = "f32_vrndz_test",
7406 srcs = [
7407 "test/f32-vrndz.cc",
7408 "test/vunary-microkernel-tester.h",
7409 ] + MICROKERNEL_TEST_HDRS,
7410 deps = MICROKERNEL_TEST_DEPS,
7411)
7412
7413xnnpack_unit_test(
7414 name = "f32_vrndu_test",
7415 srcs = [
7416 "test/f32-vrndu.cc",
7417 "test/vunary-microkernel-tester.h",
7418 ] + MICROKERNEL_TEST_HDRS,
7419 deps = MICROKERNEL_TEST_DEPS,
7420)
7421
7422xnnpack_unit_test(
7423 name = "f32_vrndd_test",
7424 srcs = [
7425 "test/f32-vrndd.cc",
7426 "test/vunary-microkernel-tester.h",
7427 ] + MICROKERNEL_TEST_HDRS,
7428 deps = MICROKERNEL_TEST_DEPS,
7429)
7430
7431xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007432 name = "f32_vscale_test",
7433 srcs = [
7434 "test/f32-vscale.cc",
7435 "test/vscale-microkernel-tester.h",
7436 ] + MICROKERNEL_TEST_HDRS,
7437 deps = MICROKERNEL_TEST_DEPS,
7438)
7439
7440xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007441 name = "f32_vscaleexpminusmax_test",
7442 srcs = [
7443 "test/f32-vscaleexpminusmax.cc",
7444 "test/vscaleexpminusmax-microkernel-tester.h",
7445 ] + MICROKERNEL_TEST_HDRS,
7446 deps = MICROKERNEL_TEST_DEPS,
7447)
7448
7449xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007450 name = "f32_vscaleextexp_test",
7451 srcs = [
7452 "test/f32-vscaleextexp.cc",
7453 "test/vscaleextexp-microkernel-tester.h",
7454 ] + MICROKERNEL_TEST_HDRS,
7455 deps = MICROKERNEL_TEST_DEPS,
7456)
7457
7458xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007459 name = "f32_vsigmoid_test",
7460 srcs = [
7461 "test/f32-vsigmoid.cc",
7462 "test/vunary-microkernel-tester.h",
7463 ] + MICROKERNEL_TEST_HDRS,
7464 deps = MICROKERNEL_TEST_DEPS,
7465)
7466
7467xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007468 name = "f32_vsqr_test",
7469 srcs = [
7470 "test/f32-vsqr.cc",
7471 "test/vunary-microkernel-tester.h",
7472 ] + MICROKERNEL_TEST_HDRS,
7473 deps = MICROKERNEL_TEST_DEPS,
7474)
7475
7476xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007477 name = "f32_vsqrdiff_test",
7478 srcs = [
7479 "test/f32-vsqrdiff.cc",
7480 "test/vbinary-microkernel-tester.h",
7481 ] + MICROKERNEL_TEST_HDRS,
7482 deps = MICROKERNEL_TEST_DEPS,
7483)
7484
7485xnnpack_unit_test(
7486 name = "f32_vsqrdiffc_test",
7487 srcs = [
7488 "test/f32-vsqrdiffc.cc",
7489 "test/vbinaryc-microkernel-tester.h",
7490 ] + MICROKERNEL_TEST_HDRS,
7491 deps = MICROKERNEL_TEST_DEPS,
7492)
7493
7494xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007495 name = "f32_vsqrt_test",
7496 srcs = [
7497 "test/f32-vsqrt.cc",
7498 "test/vunary-microkernel-tester.h",
7499 ] + MICROKERNEL_TEST_HDRS,
7500 deps = MICROKERNEL_TEST_DEPS,
7501)
7502
7503xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007504 name = "f32_vsub_test",
7505 srcs = [
7506 "test/f32-vsub.cc",
7507 "test/vbinary-microkernel-tester.h",
7508 ] + MICROKERNEL_TEST_HDRS,
7509 deps = MICROKERNEL_TEST_DEPS,
7510)
7511
7512xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007513 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007514 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007515 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007516 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007517 ] + MICROKERNEL_TEST_HDRS,
7518 deps = MICROKERNEL_TEST_DEPS,
7519)
7520
7521xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007522 name = "f32_vsub_relu_test",
7523 srcs = [
7524 "test/f32-vsub-relu.cc",
7525 "test/vbinary-microkernel-tester.h",
7526 ] + MICROKERNEL_TEST_HDRS,
7527 deps = MICROKERNEL_TEST_DEPS,
7528)
7529
7530xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007531 name = "f32_vsubc_test",
7532 srcs = [
7533 "test/f32-vsubc.cc",
7534 "test/vbinaryc-microkernel-tester.h",
7535 ] + MICROKERNEL_TEST_HDRS,
7536 deps = MICROKERNEL_TEST_DEPS,
7537)
7538
7539xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007540 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007541 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007542 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007543 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007544 ] + MICROKERNEL_TEST_HDRS,
7545 deps = MICROKERNEL_TEST_DEPS,
7546)
7547
7548xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007549 name = "f32_vsubc_relu_test",
7550 srcs = [
7551 "test/f32-vsubc-relu.cc",
7552 "test/vbinaryc-microkernel-tester.h",
7553 ] + MICROKERNEL_TEST_HDRS,
7554 deps = MICROKERNEL_TEST_DEPS,
7555)
7556
7557xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007558 name = "f32_vrsubc_test",
7559 srcs = [
7560 "test/f32-vrsubc.cc",
7561 "test/vbinaryc-microkernel-tester.h",
7562 ] + MICROKERNEL_TEST_HDRS,
7563 deps = MICROKERNEL_TEST_DEPS,
7564)
7565
7566xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007567 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007568 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007569 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007570 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007571 ] + MICROKERNEL_TEST_HDRS,
7572 deps = MICROKERNEL_TEST_DEPS,
7573)
7574
7575xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007576 name = "f32_vrsubc_relu_test",
7577 srcs = [
7578 "test/f32-vrsubc-relu.cc",
7579 "test/vbinaryc-microkernel-tester.h",
7580 ] + MICROKERNEL_TEST_HDRS,
7581 deps = MICROKERNEL_TEST_DEPS,
7582)
7583
7584xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007585 name = "qc8_dwconv_minmax_fp32_test",
7586 timeout = "moderate",
7587 srcs = [
7588 "test/qc8-dwconv-minmax-fp32.cc",
7589 "test/dwconv-microkernel-tester.h",
7590 "src/xnnpack/AlignedAllocator.h",
7591 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7592 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7593)
7594
7595xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007596 name = "qc8_gemm_minmax_fp32_test",
7597 timeout = "moderate",
7598 srcs = [
7599 "test/qc8-gemm-minmax-fp32.cc",
7600 "test/gemm-microkernel-tester.h",
7601 "src/xnnpack/AlignedAllocator.h",
7602 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7603 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7604)
7605
7606xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007607 name = "qc8_igemm_minmax_fp32_test",
7608 timeout = "moderate",
7609 srcs = [
7610 "test/qc8-igemm-minmax-fp32.cc",
7611 "test/gemm-microkernel-tester.h",
7612 "src/xnnpack/AlignedAllocator.h",
7613 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7614 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7615)
7616
7617xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007618 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007619 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007620 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007621 "test/dwconv-microkernel-tester.h",
7622 "src/xnnpack/AlignedAllocator.h",
7623 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7624 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7625)
7626
7627xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007628 name = "qs8_dwconv_minmax_fp32_test",
7629 srcs = [
7630 "test/qs8-dwconv-minmax-fp32.cc",
7631 "test/dwconv-microkernel-tester.h",
7632 "src/xnnpack/AlignedAllocator.h",
7633 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7634 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7635)
7636
7637xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007638 name = "qs8_gavgpool_minmax_test",
7639 srcs = [
7640 "test/qs8-gavgpool-minmax.cc",
7641 "test/gavgpool-microkernel-tester.h",
7642 "src/xnnpack/AlignedAllocator.h",
7643 ] + MICROKERNEL_TEST_HDRS,
7644 deps = MICROKERNEL_TEST_DEPS,
7645)
7646
7647xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007648 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007649 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007650 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007651 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007652 "test/gemm-microkernel-tester.h",
7653 "src/xnnpack/AlignedAllocator.h",
7654 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7655 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7656)
7657
7658xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007659 name = "qs8_gemm_minmax_fp32_test",
7660 timeout = "moderate",
7661 srcs = [
7662 "test/qs8-gemm-minmax-fp32.cc",
7663 "test/gemm-microkernel-tester.h",
7664 "src/xnnpack/AlignedAllocator.h",
7665 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7666 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7667)
7668
7669xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007670 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007671 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007672 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007673 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007674 "test/gemm-microkernel-tester.h",
7675 "src/xnnpack/AlignedAllocator.h",
7676 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7677 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7678)
7679
7680xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007681 name = "qs8_igemm_minmax_fp32_test",
7682 timeout = "moderate",
7683 srcs = [
7684 "test/qs8-igemm-minmax-fp32.cc",
7685 "test/gemm-microkernel-tester.h",
7686 "src/xnnpack/AlignedAllocator.h",
7687 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7688 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7689)
7690
7691xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007692 name = "qs8_requantization_test",
7693 srcs = [
7694 "src/xnnpack/requantization-stubs.h",
7695 "test/qs8-requantization.cc",
7696 "test/requantization-tester.h",
7697 ] + MICROKERNEL_TEST_HDRS,
7698 deps = MICROKERNEL_TEST_DEPS,
7699)
7700
7701xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007702 name = "qs8_vadd_minmax_test",
7703 srcs = [
7704 "test/qs8-vadd-minmax.cc",
7705 "test/vadd-microkernel-tester.h",
7706 ] + MICROKERNEL_TEST_HDRS,
7707 deps = MICROKERNEL_TEST_DEPS,
7708)
7709
7710xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007711 name = "qs8_vaddc_minmax_test",
7712 srcs = [
7713 "test/qs8-vaddc-minmax.cc",
7714 "test/vaddc-microkernel-tester.h",
7715 ] + MICROKERNEL_TEST_HDRS,
7716 deps = MICROKERNEL_TEST_DEPS,
7717)
7718
7719xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007720 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007721 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007722 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007723 "test/avgpool-microkernel-tester.h",
7724 "src/xnnpack/AlignedAllocator.h",
7725 ] + MICROKERNEL_TEST_HDRS,
7726 deps = MICROKERNEL_TEST_DEPS,
7727)
7728
7729xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007730 name = "qu8_dwconv_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007731 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007732 "test/qu8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007733 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007734 "src/xnnpack/AlignedAllocator.h",
7735 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007736 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007737)
7738
7739xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007740 name = "qu8_igemm_minmax_fp32_test",
7741 srcs = [
7742 "test/qu8-igemm-minmax-fp32.cc",
7743 "test/gemm-microkernel-tester.h",
7744 "src/xnnpack/AlignedAllocator.h",
7745 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7746 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7747)
7748
7749xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007750 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007751 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007752 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007753 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007754 "src/xnnpack/AlignedAllocator.h",
7755 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007756 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007757)
7758
7759xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007760 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007761 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007762 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007763 "test/gavgpool-microkernel-tester.h",
7764 "src/xnnpack/AlignedAllocator.h",
7765 ] + MICROKERNEL_TEST_HDRS,
7766 deps = MICROKERNEL_TEST_DEPS,
7767)
7768
7769xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007770 name = "qu8_gemm_minmax_fp32_test",
7771 srcs = [
7772 "test/qu8-gemm-minmax-fp32.cc",
7773 "test/gemm-microkernel-tester.h",
7774 "src/xnnpack/AlignedAllocator.h",
7775 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7776 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7777)
7778
7779xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007780 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007781 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007782 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007783 "test/gemm-microkernel-tester.h",
7784 "src/xnnpack/AlignedAllocator.h",
7785 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007786 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007787)
7788
7789xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007790 name = "qu8_requantization_test",
7791 srcs = [
7792 "src/xnnpack/requantization-stubs.h",
7793 "test/qu8-requantization.cc",
7794 "test/requantization-tester.h",
7795 ] + MICROKERNEL_TEST_HDRS,
7796 deps = MICROKERNEL_TEST_DEPS,
7797)
7798
7799xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007800 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007801 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007802 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007803 "test/vadd-microkernel-tester.h",
7804 ] + MICROKERNEL_TEST_HDRS,
7805 deps = MICROKERNEL_TEST_DEPS,
7806)
7807
7808xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007809 name = "u8_lut32norm_test",
7810 srcs = [
7811 "test/u8-lut32norm.cc",
7812 "test/lut-norm-microkernel-tester.h",
7813 ] + MICROKERNEL_TEST_HDRS,
7814 deps = MICROKERNEL_TEST_DEPS,
7815)
7816
7817xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007818 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007819 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007820 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007821 "test/maxpool-microkernel-tester.h",
7822 ] + MICROKERNEL_TEST_HDRS,
7823 deps = MICROKERNEL_TEST_DEPS,
7824)
7825
7826xnnpack_unit_test(
7827 name = "u8_rmax_test",
7828 srcs = [
7829 "test/u8-rmax.cc",
7830 "test/rmax-microkernel-tester.h",
7831 ] + MICROKERNEL_TEST_HDRS,
7832 deps = MICROKERNEL_TEST_DEPS,
7833)
7834
7835xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007836 name = "u8_vclamp_test",
7837 srcs = [
7838 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007839 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007840 ] + MICROKERNEL_TEST_HDRS,
7841 deps = MICROKERNEL_TEST_DEPS,
7842)
7843
7844xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007845 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007846 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007847 "test/x32-depthtospace2d-chw2hwc.cc",
7848 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007849 ] + MICROKERNEL_TEST_HDRS,
7850 deps = MICROKERNEL_TEST_DEPS,
7851)
7852
7853xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007854 name = "x32_fill_test",
7855 srcs = [
7856 "test/x32-fill.cc",
7857 "test/fill-microkernel-tester.h",
7858 ] + MICROKERNEL_TEST_HDRS,
7859 deps = MICROKERNEL_TEST_DEPS,
7860)
7861
7862xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007863 name = "x32_packx_test",
7864 srcs = [
7865 "test/x32-packx.cc",
7866 "test/pack-microkernel-tester.h",
7867 "src/xnnpack/AlignedAllocator.h",
7868 ] + MICROKERNEL_TEST_HDRS,
7869 deps = MICROKERNEL_TEST_DEPS,
7870)
7871
7872xnnpack_unit_test(
7873 name = "x32_pad_test",
7874 srcs = [
7875 "test/x32-pad.cc",
7876 "test/pad-microkernel-tester.h",
7877 ] + MICROKERNEL_TEST_HDRS,
7878 deps = MICROKERNEL_TEST_DEPS,
7879)
7880
7881xnnpack_unit_test(
7882 name = "x32_unpool_test",
7883 srcs = [
7884 "test/x32-unpool.cc",
7885 "test/unpool-microkernel-tester.h",
7886 ] + MICROKERNEL_TEST_HDRS,
7887 deps = MICROKERNEL_TEST_DEPS,
7888)
7889
7890xnnpack_unit_test(
7891 name = "x32_zip_test",
7892 srcs = [
7893 "test/x32-zip.cc",
7894 "test/zip-microkernel-tester.h",
7895 ] + MICROKERNEL_TEST_HDRS,
7896 deps = MICROKERNEL_TEST_DEPS,
7897)
7898
7899xnnpack_unit_test(
7900 name = "x8_lut_test",
7901 srcs = [
7902 "test/x8-lut.cc",
7903 "test/lut-microkernel-tester.h",
7904 ] + MICROKERNEL_TEST_HDRS,
7905 deps = MICROKERNEL_TEST_DEPS,
7906)
7907
7908xnnpack_unit_test(
7909 name = "x8_zip_test",
7910 srcs = [
7911 "test/x8-zip.cc",
7912 "test/zip-microkernel-tester.h",
7913 ] + MICROKERNEL_TEST_HDRS,
7914 deps = MICROKERNEL_TEST_DEPS,
7915)
7916
Marat Dukhan20c3b922020-03-10 03:45:06 -07007917########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007918
7919xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007920 name = "operator_size_test",
7921 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007922 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007923)
7924
Marat Dukhan20c3b922020-03-10 03:45:06 -07007925xnnpack_binary(
7926 name = "subgraph_size_test",
7927 srcs = ["test/subgraph-size.c"],
7928 deps = [":XNNPACK"],
7929)
7930
7931########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007932
7933xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007934 name = "abs_nc_test",
7935 srcs = [
7936 "test/abs-nc.cc",
7937 "test/abs-operator-tester.h",
7938 ],
7939 deps = OPERATOR_TEST_DEPS,
7940)
7941
7942xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007943 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007944 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007945 srcs = [
7946 "test/add-nd.cc",
7947 "test/binary-elementwise-operator-tester.h",
7948 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007949 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007950)
7951
7952xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007953 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007954 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007955 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007956 "test/argmax-pooling-operator-tester.h",
7957 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007958 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007959)
7960
7961xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007962 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007963 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007964 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007965 "test/average-pooling-operator-tester.h",
7966 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007967 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007968)
7969
7970xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007971 name = "bankers_rounding_nc_test",
7972 srcs = [
7973 "test/bankers-rounding-nc.cc",
7974 "test/bankers-rounding-operator-tester.h",
7975 ],
7976 deps = OPERATOR_TEST_DEPS,
7977)
7978
7979xnnpack_unit_test(
7980 name = "ceiling_nc_test",
7981 srcs = [
7982 "test/ceiling-nc.cc",
7983 "test/ceiling-operator-tester.h",
7984 ],
7985 deps = OPERATOR_TEST_DEPS,
7986)
7987
7988xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007989 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007990 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007991 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007992 "test/channel-shuffle-operator-tester.h",
7993 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007994 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007995)
7996
7997xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007998 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007999 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008000 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008001 "test/clamp-operator-tester.h",
8002 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008003 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008004)
8005
8006xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008007 name = "constant_pad_nd_test",
8008 srcs = [
8009 "test/constant-pad-nd.cc",
8010 "test/constant-pad-operator-tester.h",
8011 ],
8012 deps = OPERATOR_TEST_DEPS,
8013)
8014
8015xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008016 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008017 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008018 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008019 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008020 "test/convolution-operator-tester.h",
8021 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008022 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008023)
8024
8025xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008026 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008027 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008028 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008029 "test/convolution-nchw.cc",
8030 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008031 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008032 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008033)
8034
8035xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008036 name = "copy_nc_test",
8037 srcs = [
8038 "test/copy-nc.cc",
8039 "test/copy-operator-tester.h",
8040 ],
8041 deps = OPERATOR_TEST_DEPS,
8042)
8043
8044xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008045 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008046 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008047 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008048 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008049 "test/deconvolution-operator-tester.h",
8050 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008051 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008052)
8053
8054xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008055 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008056 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008057 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008058 "test/depth-to-space-operator-tester.h",
8059 ] + OPERATOR_TEST_PARAMS_HDRS,
8060 deps = OPERATOR_TEST_DEPS,
8061)
8062
8063xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008064 name = "depth_to_space_nhwc_test",
8065 srcs = [
8066 "test/depth-to-space-nhwc.cc",
8067 "test/depth-to-space-operator-tester.h",
8068 ] + OPERATOR_TEST_PARAMS_HDRS,
8069 deps = OPERATOR_TEST_DEPS,
8070)
8071
8072xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008073 name = "divide_nd_test",
8074 srcs = [
8075 "test/binary-elementwise-operator-tester.h",
8076 "test/divide-nd.cc",
8077 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008078 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008079)
8080
8081xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008082 name = "elu_nc_test",
8083 srcs = [
8084 "test/elu-nc.cc",
8085 "test/elu-operator-tester.h",
8086 ],
8087 deps = OPERATOR_TEST_DEPS,
8088)
8089
8090xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008091 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008092 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008093 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008094 "test/fully-connected-operator-tester.h",
8095 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008096 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008097)
8098
8099xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008100 name = "floor_nc_test",
8101 srcs = [
8102 "test/floor-nc.cc",
8103 "test/floor-operator-tester.h",
8104 ],
8105 deps = OPERATOR_TEST_DEPS,
8106)
8107
8108xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008109 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008110 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008111 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008112 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008113 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008114 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008115)
8116
8117xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008118 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008119 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008120 "test/global-average-pooling-ncw.cc",
8121 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008122 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008123 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008124)
8125
8126xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008127 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008128 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008129 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008130 "test/hardswish-operator-tester.h",
8131 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008132 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008133)
8134
8135xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008136 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008137 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008138 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008139 "test/leaky-relu-operator-tester.h",
8140 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008141 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008142)
8143
8144xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008145 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008146 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008147 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008148 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008149 "test/max-pooling-operator-tester.h",
8150 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008151 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008152)
8153
8154xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008155 name = "maximum_nd_test",
8156 srcs = [
8157 "test/binary-elementwise-operator-tester.h",
8158 "test/maximum-nd.cc",
8159 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008160 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008161)
8162
8163xnnpack_unit_test(
8164 name = "minimum_nd_test",
8165 srcs = [
8166 "test/binary-elementwise-operator-tester.h",
8167 "test/minimum-nd.cc",
8168 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008169 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008170)
8171
8172xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008173 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008174 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008175 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008176 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008177 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008178 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008179)
8180
8181xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008182 name = "negate_nc_test",
8183 srcs = [
8184 "test/negate-nc.cc",
8185 "test/negate-operator-tester.h",
8186 ],
8187 deps = OPERATOR_TEST_DEPS,
8188)
8189
8190xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008191 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008192 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008193 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008194 "test/prelu-operator-tester.h",
8195 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008196 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008197)
8198
8199xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008200 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008201 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008202 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008203 "test/resize-bilinear-operator-tester.h",
8204 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008205 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008206)
8207
8208xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008209 name = "resize_bilinear_nchw_test",
8210 srcs = [
8211 "test/resize-bilinear-nchw.cc",
8212 "test/resize-bilinear-operator-tester.h",
8213 ] + OPERATOR_TEST_PARAMS_HDRS,
8214 deps = OPERATOR_TEST_DEPS,
8215)
8216
8217xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008218 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008219 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008220 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008221 "test/sigmoid-operator-tester.h",
8222 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008223 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008224)
8225
8226xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008227 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008228 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008229 "test/softmax-nc.cc",
8230 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008231 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008232 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008233)
8234
8235xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008236 name = "square_nc_test",
8237 srcs = [
8238 "test/square-nc.cc",
8239 "test/square-operator-tester.h",
8240 ],
8241 deps = OPERATOR_TEST_DEPS,
8242)
8243
8244xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008245 name = "square_root_nc_test",
8246 srcs = [
8247 "test/square-root-nc.cc",
8248 "test/square-root-operator-tester.h",
8249 ],
8250 deps = OPERATOR_TEST_DEPS,
8251)
8252
8253xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008254 name = "squared_difference_nd_test",
8255 srcs = [
8256 "test/binary-elementwise-operator-tester.h",
8257 "test/squared-difference-nd.cc",
8258 ],
8259 deps = OPERATOR_TEST_DEPS,
8260)
8261
8262xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008263 name = "subtract_nd_test",
8264 srcs = [
8265 "test/binary-elementwise-operator-tester.h",
8266 "test/subtract-nd.cc",
8267 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008268 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008269)
8270
8271xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008272 name = "truncation_nc_test",
8273 srcs = [
8274 "test/truncation-nc.cc",
8275 "test/truncation-operator-tester.h",
8276 ],
8277 deps = OPERATOR_TEST_DEPS,
8278)
8279
8280xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008281 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008282 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008283 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008284 "test/unpooling-operator-tester.h",
8285 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008286 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008287)
8288
Chao Mei6ddfc602020-05-13 22:29:36 -07008289############################### Misc unit tests ###############################
8290
8291xnnpack_unit_test(
8292 name = "memory_planner_test",
8293 srcs = [
8294 "test/memory-planner-test.cc",
8295 ],
8296 deps = [
8297 ":XNNPACK",
8298 ":memory_planner",
8299 ],
8300)
8301
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008302xnnpack_unit_test(
8303 name = "subgraph_nchw_test",
8304 srcs = [
8305 "src/xnnpack/subgraph.h",
8306 "test/subgraph-nchw.cc",
8307 "test/subgraph-tester.h",
8308 ],
8309 deps = [
8310 ":XNNPACK",
8311 ],
8312)
8313
Marat Dukhan08c4a432019-10-03 09:29:21 -07008314############################# Build configurations #############################
8315
Marat Dukhanb8642352019-10-30 15:43:02 -07008316# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008317config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008318 name = "xnn_enable_assembly_explicit_true",
8319 define_values = {"xnn_enable_assembly": "true"},
8320)
8321
8322# Disables usage of assembly kernels.
8323config_setting(
8324 name = "xnn_enable_assembly_explicit_false",
8325 define_values = {"xnn_enable_assembly": "false"},
8326)
8327
Marat Dukhan9de90e02020-06-18 16:04:12 -07008328# Enables usage of sparse inference.
8329config_setting(
8330 name = "xnn_enable_sparse_explicit_true",
8331 define_values = {"xnn_enable_sparse": "true"},
8332)
8333
8334# Disables usage of sparse inference.
8335config_setting(
8336 name = "xnn_enable_sparse_explicit_false",
8337 define_values = {"xnn_enable_sparse": "false"},
8338)
8339
Marat Dukhan05702cf2020-03-26 15:41:33 -07008340# Disables usage of HMP-aware optimizations.
8341config_setting(
8342 name = "xnn_enable_hmp_explicit_false",
8343 define_values = {"xnn_enable_hmp": "false"},
8344)
8345
Chao Mei6ddfc602020-05-13 22:29:36 -07008346# Enable usage of optimized memory allocation
8347config_setting(
8348 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008349 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008350)
8351
8352# Disable usage of optimized memory allocation
8353config_setting(
8354 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008355 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008356)
8357
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008358# Enable QS8 inference in TFLite-specific version
8359config_setting(
8360 name = "xnn_enable_qs8_explicit_true",
8361 define_values = {"xnn_enable_qs8": "true"},
8362)
8363
8364# Disable QS8 inference in TFLite-specific version
8365config_setting(
8366 name = "xnn_enable_qs8_explicit_false",
8367 define_values = {"xnn_enable_qs8": "false"},
8368)
8369
Marat Dukhanb8642352019-10-30 15:43:02 -07008370# Builds with -c dbg
8371config_setting(
8372 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008373 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008374 "compilation_mode": "dbg",
8375 },
8376)
8377
8378# Builds with -c opt
8379config_setting(
8380 name = "optimized_build",
8381 values = {
8382 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008383 },
8384)
8385
8386config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008387 name = "linux_k8",
8388 values = {"cpu": "k8"},
8389)
8390
8391config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008392 name = "linux_arm",
8393 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008394)
8395
8396config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008397 name = "linux_armeabi",
8398 values = {"cpu": "armeabi"},
8399)
8400
8401config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008402 name = "linux_armhf",
8403 values = {"cpu": "armhf"},
8404)
8405
8406config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008407 name = "linux_armv7a",
8408 values = {"cpu": "armv7a"},
8409)
8410
8411config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008412 name = "linux_aarch64",
8413 values = {"cpu": "aarch64"},
8414)
8415
8416config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008417 name = "android",
8418 values = {"crosstool_top": "//external:android/crosstool"},
8419)
8420
8421config_setting(
8422 name = "android_armv7",
8423 values = {
8424 "crosstool_top": "//external:android/crosstool",
8425 "cpu": "armeabi-v7a",
8426 },
8427)
8428
8429config_setting(
8430 name = "android_arm64",
8431 values = {
8432 "crosstool_top": "//external:android/crosstool",
8433 "cpu": "arm64-v8a",
8434 },
8435)
8436
8437config_setting(
8438 name = "android_x86",
8439 values = {
8440 "crosstool_top": "//external:android/crosstool",
8441 "cpu": "x86",
8442 },
8443)
8444
8445config_setting(
8446 name = "android_x86_64",
8447 values = {
8448 "crosstool_top": "//external:android/crosstool",
8449 "cpu": "x86_64",
8450 },
8451)
8452
8453config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008454 name = "windows_x86_64",
8455 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008456)
8457
8458config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008459 name = "windows_x86_64_clang",
8460 values = {
8461 "compiler": "clang-cl",
8462 "cpu": "x64_windows",
8463 },
8464)
8465
8466config_setting(
8467 name = "windows_x86_64_mingw",
8468 values = {
8469 "compiler": "mingw-gcc",
8470 "cpu": "x64_windows",
8471 },
8472)
8473
8474config_setting(
8475 name = "windows_x86_64_msys",
8476 values = {
8477 "compiler": "msys-gcc",
8478 "cpu": "x64_windows",
8479 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008480)
8481
8482config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008483 name = "macos_x86_64",
8484 values = {
8485 "apple_platform_type": "macos",
8486 "cpu": "darwin",
8487 },
8488)
8489
8490config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008491 name = "macos_arm64",
8492 values = {
8493 "apple_platform_type": "macos",
8494 "cpu": "darwin_arm64",
8495 },
8496)
8497
8498config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008499 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008500 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008501)
8502
8503config_setting(
8504 name = "emscripten_wasm",
8505 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008506 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008507 "cpu": "wasm",
8508 },
8509)
8510
8511config_setting(
8512 name = "emscripten_wasmsimd",
8513 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008514 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008515 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008516 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008517 },
8518)
8519
8520config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008521 name = "ios_armv7",
8522 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008523 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008524 "cpu": "ios_armv7",
8525 },
8526)
8527
8528config_setting(
8529 name = "ios_arm64",
8530 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008531 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008532 "cpu": "ios_arm64",
8533 },
8534)
8535
8536config_setting(
8537 name = "ios_arm64e",
8538 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008539 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008540 "cpu": "ios_arm64e",
8541 },
8542)
8543
8544config_setting(
8545 name = "ios_x86",
8546 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008547 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008548 "cpu": "ios_i386",
8549 },
8550)
8551
8552config_setting(
8553 name = "ios_x86_64",
8554 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008555 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008556 "cpu": "ios_x86_64",
8557 },
8558)
8559
8560config_setting(
8561 name = "watchos_armv7k",
8562 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008563 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008564 "cpu": "watchos_armv7k",
8565 },
8566)
8567
8568config_setting(
8569 name = "watchos_arm64_32",
8570 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008571 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008572 "cpu": "watchos_arm64_32",
8573 },
8574)
8575
8576config_setting(
8577 name = "watchos_x86",
8578 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008579 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008580 "cpu": "watchos_i386",
8581 },
8582)
8583
8584config_setting(
8585 name = "watchos_x86_64",
8586 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008587 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008588 "cpu": "watchos_x86_64",
8589 },
8590)
8591
8592config_setting(
8593 name = "tvos_arm64",
8594 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008595 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008596 "cpu": "tvos_arm64",
8597 },
8598)
8599
8600config_setting(
8601 name = "tvos_x86_64",
8602 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008603 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008604 "cpu": "tvos_x86_64",
8605 },
8606)