blob: 7c14a1c50571290b7c88b6040b72a0983440c3c8 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
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501 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
502 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
503 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
504 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
505 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
506 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhand6021542021-06-30 09:04:20 -0700507 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
508 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
509 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
510 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
511 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
512 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
513 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
514 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
515 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
516 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
517 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
518 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
519 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
520 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
521 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
522 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
523 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
524 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
525 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
526 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
528 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
530 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
531 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
532 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
541 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700542 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
543 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700545 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
546 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
552 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
553 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700554 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
555 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
556 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700557 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
558 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
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561 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700563 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700566 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700569 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700574 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700575 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700587 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700611 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhand481c282021-05-11 23:48:31 -0700618 "src/qs8-vadd/gen/minmax-scalar-x1.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -0700624 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
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Marat Dukhanc2e8f662021-07-01 17:06:34 -0700626 "src/qu8-dwconv/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700631 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700638 "src/u8-lut32norm/scalar.c",
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Marat Dukhanad71b9a2020-11-20 00:01:51 -0800647 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700648 "src/x32-fill/scalar-float.c",
649 "src/x32-fill/scalar-int.c",
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Marat Dukhan63523d42020-05-22 17:07:33 -0700653 "src/x32-pad/scalar-float.c",
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662
Marat Dukhan436ebe62019-12-04 15:10:12 -0800663WASM_UKERNELS = [
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849
Marat Dukhan290055c2020-06-09 12:24:29 -0700850WASMSIMD_UKERNELS = [
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1430 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001431 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1432 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1433 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001434 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1435 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1436 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1437 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001438 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001439 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001440 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001441 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001442 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1443 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1444 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001445 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1446 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1447 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1448 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001449 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1450 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
1451 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1452 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1453 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1454 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
1455 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1456 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1457 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1458 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001459 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1460 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1461 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1462 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1463 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1464 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1465 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1466 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1467 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1468 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1469 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1470 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001471 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1472 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001473 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1474 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1475 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1476 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1477 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1478 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001479 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1480 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1481 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1482 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001483 "src/math/roundd-wasmsimd-addsub.c",
1484 "src/math/roundd-wasmsimd-cvt.c",
1485 "src/math/roundne-wasmsimd-addsub.c",
1486 "src/math/roundu-wasmsimd-addsub.c",
1487 "src/math/roundu-wasmsimd-cvt.c",
1488 "src/math/roundz-wasmsimd-addsub.c",
1489 "src/math/roundz-wasmsimd-cvt.c",
1490 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1491 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhan313eef72021-06-30 16:11:31 -07001492 "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001493 "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1494 "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1495 "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1496 "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1497 "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001498 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001499 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001500 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001501 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001502 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001503 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001504 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001505 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001506 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001507 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001508 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001509 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan69aa6232021-06-30 14:17:26 -07001510 "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1511 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001512 "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1513 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c",
1514 "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1515 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
1516 "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1517 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c",
1518 "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1519 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
1520 "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
1521 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07001522 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
1523 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
1524 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
1526 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
1527 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001528 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001529 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001530 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001531 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001532 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001533 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001534 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001535 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001536 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001537 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001538 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001539 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001540 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001541 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001542 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001543 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001544 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001545 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001546 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001547 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001548 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001549 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001550 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001551 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001552 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001553 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001554 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001555 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001556 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001557 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1558 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
1559 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
1560 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1561 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1562 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1563 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1564 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001565 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001566 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001567 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001568 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001569 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001570 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001571 "src/x32-zip/x2-wasmsimd.c",
1572 "src/x32-zip/x3-wasmsimd.c",
1573 "src/x32-zip/x4-wasmsimd.c",
1574 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001575]
1576
Marat Dukhan08c4a432019-10-03 09:29:21 -07001577# ISA-specific micro-kernels
1578NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001579 "src/f32-argmaxpool/4x-neon-c4.c",
1580 "src/f32-argmaxpool/9p8x-neon-c4.c",
1581 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001582 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1583 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001584 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001585 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001586 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001587 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001588 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001589 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001590 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001591 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001592 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001593 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001595 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001596 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001597 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001598 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1599 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1600 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1601 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1602 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001603 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001604 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001605 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1606 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1607 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001608 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001609 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001610 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1611 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1612 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1613 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1614 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001615 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1616 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1617 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001618 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001619 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001620 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1621 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1622 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001623 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1624 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1625 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1626 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001627 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001628 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1629 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001630 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001631 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001632 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001633 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001634 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1635 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001636 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1637 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1638 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1639 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1640 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1641 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1642 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1643 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001644 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001645 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001646 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001647 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1648 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001649 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001650 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1651 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001652 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001653 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1654 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1655 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1656 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1657 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001658 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1659 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001660 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1661 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001662 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1663 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001664 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1665 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1666 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1667 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1668 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1669 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1670 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1671 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1672 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1673 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1674 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1675 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1676 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1677 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1678 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1679 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001680 "src/f32-ibilinear-chw/gen/neon-p4.c",
1681 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001682 "src/f32-ibilinear/gen/neon-c4.c",
1683 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001684 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001685 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001686 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001687 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1688 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001689 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001690 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1691 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1692 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1693 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001694 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1695 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001696 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1697 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001698 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1699 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001700 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1701 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1702 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001703 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1704 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001705 "src/f32-prelu/gen/neon-1x4.c",
1706 "src/f32-prelu/gen/neon-1x8.c",
1707 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001708 "src/f32-prelu/gen/neon-2x4.c",
1709 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001710 "src/f32-prelu/gen/neon-2x16.c",
1711 "src/f32-prelu/gen/neon-4x4.c",
1712 "src/f32-prelu/gen/neon-4x8.c",
1713 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001714 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001715 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001716 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001717 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1718 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001719 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001720 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1721 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001722 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001723 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1724 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001725 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1726 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1727 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1728 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1729 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1730 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1731 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1732 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1733 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1734 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1735 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1736 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1737 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001738 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001739 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1740 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1741 "src/f32-spmm/gen/4x1-minmax-neon.c",
1742 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1743 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1744 "src/f32-spmm/gen/8x1-minmax-neon.c",
1745 "src/f32-spmm/gen/12x1-minmax-neon.c",
1746 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1747 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1748 "src/f32-spmm/gen/16x1-minmax-neon.c",
1749 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1750 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1751 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001752 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1753 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1754 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1755 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001756 "src/f32-vbinary/gen/vmax-neon-x4.c",
1757 "src/f32-vbinary/gen/vmax-neon-x8.c",
1758 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1759 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1760 "src/f32-vbinary/gen/vmin-neon-x4.c",
1761 "src/f32-vbinary/gen/vmin-neon-x8.c",
1762 "src/f32-vbinary/gen/vminc-neon-x4.c",
1763 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001764 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1765 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1766 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1767 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1768 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1769 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001770 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1771 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1772 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1773 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001774 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1775 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1776 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1777 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001778 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1779 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001780 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1781 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1782 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1783 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1784 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1785 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1786 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1787 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1788 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1789 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1790 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1791 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001792 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1793 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1794 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001795 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1796 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001797 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1798 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001799 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1800 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001801 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1802 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001803 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1804 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1805 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1806 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1807 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1808 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001809 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1810 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1811 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1812 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1813 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1814 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1815 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1816 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1817 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1818 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1819 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1820 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1821 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1822 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1823 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1824 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1825 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1826 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001827 "src/f32-vunary/gen/vabs-neon-x4.c",
1828 "src/f32-vunary/gen/vabs-neon-x8.c",
1829 "src/f32-vunary/gen/vneg-neon-x4.c",
1830 "src/f32-vunary/gen/vneg-neon-x8.c",
1831 "src/f32-vunary/gen/vsqr-neon-x4.c",
1832 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001833 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1834 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001835 "src/math/roundd-neon-addsub.c",
1836 "src/math/roundd-neon-cvt.c",
1837 "src/math/roundne-neon-addsub.c",
1838 "src/math/roundu-neon-addsub.c",
1839 "src/math/roundu-neon-cvt.c",
1840 "src/math/roundz-neon-addsub.c",
1841 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001842 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1843 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1844 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1845 "src/math/sqrt-neon-nr1rsqrts.c",
1846 "src/math/sqrt-neon-nr2rsqrts.c",
1847 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001848 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
1849 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
1850 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
1851 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1852 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1853 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1854 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1855 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001856 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001857 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1858 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001859 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001860 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1861 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001862 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001863 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1864 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001865 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001866 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1867 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001868 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001869 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001870 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001871 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001872 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001873 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001874 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001875 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001876 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001877 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001878 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001879 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001880 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001881 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001882 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001883 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001884 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1885 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1886 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1887 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001888 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1889 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1890 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1891 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001892 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1893 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1894 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001895 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001896 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1897 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001898 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001899 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001900 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1901 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001902 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001903 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1904 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1905 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1906 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1907 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1908 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1909 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1910 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1911 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1912 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1913 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001914 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001915 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1916 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001917 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001918 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001919 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1920 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1921 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1922 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1923 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1924 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1925 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1926 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1927 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1928 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1929 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1930 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1931 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1932 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1933 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1934 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1935 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1936 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1937 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1938 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1939 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1940 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1941 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1942 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1943 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1944 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1945 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1946 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1947 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1948 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1949 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1950 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1951 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1952 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001953 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001954 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1955 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1956 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1957 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1958 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1959 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1960 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1961 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1962 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1963 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1964 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1965 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1966 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1967 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1968 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001969 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001970 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1971 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07001972 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001973 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001974 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1975 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001976 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001977 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1978 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1979 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1980 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1981 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1982 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1983 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1984 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1985 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1986 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1987 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001988 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001989 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1990 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07001991 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001992 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001993 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1994 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1995 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1996 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1997 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1998 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1999 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2000 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2001 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2002 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2003 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2004 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2005 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2006 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2007 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2008 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2009 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2010 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2011 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2012 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2013 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2014 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2015 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2016 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2017 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2018 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2019 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2020 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2021 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2022 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2023 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2024 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2025 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2026 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002027 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002028 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2029 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2030 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2031 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2032 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2033 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2034 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2035 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2036 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2037 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2038 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2039 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002040 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002041 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002042 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07002043 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002044 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2045 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2046 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2047 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2048 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2049 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2050 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2051 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002052 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2053 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002054 "src/qu8-dwconv/up8x9-minmax-gemmlowp-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002055 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2056 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002057 "src/qu8-gemm/4x8-minmax-gemmlowp-neon.c",
2058 "src/qu8-gemm/8x8-minmax-gemmlowp-neon.c",
2059 "src/qu8-igemm/4x8-minmax-gemmlowp-neon.c",
2060 "src/qu8-igemm/8x8-minmax-gemmlowp-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002061 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002062 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002063 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002064 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002065 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002066 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002067 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002068 "src/x8-zip/x2-neon.c",
2069 "src/x8-zip/x3-neon.c",
2070 "src/x8-zip/x4-neon.c",
2071 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002072 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002073 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002074 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002075 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002076 "src/x32-zip/x2-neon.c",
2077 "src/x32-zip/x3-neon.c",
2078 "src/x32-zip/x4-neon.c",
2079 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002080]
2081
2082NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002083 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2084 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2085 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2086 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2087 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2088 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2089 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2090 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2091 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2092 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2093 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2094 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2095 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2096 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2097 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2098 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2099 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2100 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2101 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2102 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2103 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2104 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2105 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2106 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2107 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2108 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2109 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2110 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2111 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2112 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002113 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2114 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002115 "src/f32-ibilinear/gen/neonfma-c4.c",
2116 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002117 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002118 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002119 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002120 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2121 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002122 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2123 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002124 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2125 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002126 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2127 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002128 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002129 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002130 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002131 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2132 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002133 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002134 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2135 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002136 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002137 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2138 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002139 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2140 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2141 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2142 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2143 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2144 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2145 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2146 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2147 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2148 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2149 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2150 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2151 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002152 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2153 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2154 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2155 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2156 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2157 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2158 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2159 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2160 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2161 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2162 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2163 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2164 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002165 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2166 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2167 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2168 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2169 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2170 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2171 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2172 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2173 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2174 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2175 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2176 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002177 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2178 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002179 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2180 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2181 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2182 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2183 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2184 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2185 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2186 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2187 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2188 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2189 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2190 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2191 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2192 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2193 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2194 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2195 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2196 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2197 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2198 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2199 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2200 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2201 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2202 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2203 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2204 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2205 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2206 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
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2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
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Marat Dukhanb7633f22020-11-20 16:34:56 -08002253 "src/math/exp-neonfma-rr2-lut64-p2.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002260 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002263 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002266 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002269 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2270 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002272 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002275 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
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Marat Dukhan84000762020-06-29 18:38:43 -07002278 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002279 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002280 "src/math/sqrt-neonfma-nr2fma.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002283]
2284
2285AARCH64_NEONFMA_UKERNELS = [
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Marat Dukhan82f0c322020-10-25 19:17:35 -07002305 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan82f0c322020-10-25 19:17:35 -07002309 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
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Marat Dukhan355ab432020-04-09 19:01:52 -07002356 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
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Marat Dukhan355ab432020-04-09 19:01:52 -07002358 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002360 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002362 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
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Frank Barchard846c0c62020-10-26 15:01:39 -07002364 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002366 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07002390 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002392 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002393 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002394 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002395 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002398]
2399
Marat Dukhan8853b822020-05-07 12:19:01 -07002400NEONV8_UKERNELS = [
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Frank Barchard04336c12020-10-22 16:48:55 -07002403 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
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2405 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -07002409 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002410 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002411 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002412 "src/math/roundz-neonv8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002413 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
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2415 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2416 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2417 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2418 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2419 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2420 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002421 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002424 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002425 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2426 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002427 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002428 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002430 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002431 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2432 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002433 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
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2435 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2436 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2437 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2438 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2439 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2440 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002441 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002442 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2443 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002444 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002445 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2446 "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002447 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002448 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2449 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002450 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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Marat Dukhan8853b822020-05-07 12:19:01 -07002453]
2454
Marat Dukhan08c4a432019-10-03 09:29:21 -07002455AARCH64_NEONFP16ARITH_UKERNELS = [
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2458 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2459 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002460 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
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2462 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2463 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2464 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2465 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2466 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2467 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002468 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2469 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002470 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
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2472 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
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2476 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2477 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2478 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2479 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2480 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
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2482 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2483 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2484 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2485 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002486 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2487 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2488 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2489 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2490 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2491 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2492 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2493 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002494 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002495 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002496 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
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2504 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2505 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2506 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2507 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2508 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
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2510 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
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2519 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2520 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2521 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2522 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2523 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2524 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2525 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2526 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
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2529 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2530 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2531 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002532 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2533 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002534 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2535 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002536 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
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Frank Barchardd4416d62021-05-17 15:51:37 -07002538 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2539 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002540]
2541
Benoit Jacoba9644732020-08-13 12:48:55 -07002542NEONDOT_UKERNELS = [
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Benoit Jacoba9644732020-08-13 12:48:55 -07002591]
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002593SSE_UKERNELS = [
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Erich Elsenb1233402020-06-08 15:53:15 -07002596 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002602 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2603 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002604 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2605 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2606 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2607 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002608 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2609 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002610 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2611 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2612 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002613 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002614 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002615 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2616 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2617 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2618 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2619 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002620 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2621 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2622 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002623 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002624 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002625 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2626 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2627 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002628 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2629 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2630 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2631 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2632 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2633 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2634 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2635 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2636 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2637 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2638 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2639 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2640 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002641 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2642 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2643 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2644 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2645 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2646 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2647 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2648 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002649 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002650 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002651 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002652 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2653 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002654 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2655 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2656 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002657 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2658 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2659 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002660 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2661 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2662 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002663 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2664 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2665 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002666 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2667 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2668 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002669 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2670 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2671 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002672 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2673 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2674 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2675 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002676 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2677 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2678 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002679 "src/f32-ibilinear-chw/gen/sse-p4.c",
2680 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002681 "src/f32-ibilinear/gen/sse-c4.c",
2682 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002683 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2684 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2685 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002686 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2687 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2688 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002689 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2690 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2691 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2692 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002693 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2694 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2695 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002696 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2697 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2698 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002699 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002700 "src/f32-prelu/gen/sse-2x4.c",
2701 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002702 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002703 "src/f32-spmm/gen/4x1-minmax-sse.c",
2704 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002705 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002706 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002707 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2708 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2709 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2710 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2711 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2712 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2713 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2714 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002715 "src/f32-vbinary/gen/vmax-sse-x4.c",
2716 "src/f32-vbinary/gen/vmax-sse-x8.c",
2717 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2718 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2719 "src/f32-vbinary/gen/vmin-sse-x4.c",
2720 "src/f32-vbinary/gen/vmin-sse-x8.c",
2721 "src/f32-vbinary/gen/vminc-sse-x4.c",
2722 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002723 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2724 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2725 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2726 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2727 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2728 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2729 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2730 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002731 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2732 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2733 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2734 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002735 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2736 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2737 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2738 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002739 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2740 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002741 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2742 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002743 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2744 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002745 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2746 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002747 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2748 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002749 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2750 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002751 "src/f32-vunary/gen/vabs-sse-x4.c",
2752 "src/f32-vunary/gen/vabs-sse-x8.c",
2753 "src/f32-vunary/gen/vneg-sse-x4.c",
2754 "src/f32-vunary/gen/vneg-sse-x8.c",
2755 "src/f32-vunary/gen/vsqr-sse-x4.c",
2756 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002757 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002758 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002759 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002760 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002761 "src/math/sqrt-sse-hh1mac.c",
2762 "src/math/sqrt-sse-nr1mac.c",
2763 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002764 "src/x32-fill/sse.c",
2765 "src/x32-packx/x4-sse.c",
2766 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002767]
2768
2769SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002770 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002771 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002772 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002773 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2774 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2775 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2776 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2777 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2778 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2779 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2780 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2781 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2782 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2783 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2784 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002785 "src/f32-prelu/gen/sse2-2x4.c",
2786 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002787 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002788 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002789 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002790 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2791 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002792 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002793 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2794 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002795 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002796 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2797 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002798 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002799 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2800 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2801 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2802 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2803 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2804 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2805 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2806 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2807 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2808 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2809 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2810 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002811 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2812 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002813 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2814 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002815 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2816 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2817 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2818 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2819 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2820 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002821 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2822 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2823 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2824 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2825 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2826 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2827 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2828 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2829 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2830 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2831 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2832 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002833 "src/math/exp-sse2-rr2-lut64-p2.c",
2834 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002835 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002836 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002837 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002838 "src/math/roundd-sse2-cvt.c",
2839 "src/math/roundne-sse2-cvt.c",
2840 "src/math/roundu-sse2-cvt.c",
2841 "src/math/roundz-sse2-cvt.c",
2842 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2843 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2844 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2845 "src/math/sigmoid-sse2-rr2-p5-div.c",
2846 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2847 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002848 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2849 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2850 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2851 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2852 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2853 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002854 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002855 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002856 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002857 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002858 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002859 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002860 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002861 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002862 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002863 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002864 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002865 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002866 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002867 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002868 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002869 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002870 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002871 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002872 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002873 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002874 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002875 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002876 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002877 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002878 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002879 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002880 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002881 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002882 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2883 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002884 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2885 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2886 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2887 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2888 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2889 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2890 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2891 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2892 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
2893 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002894 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2895 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2896 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002897 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2898 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2899 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002900 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002901 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002902 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002903 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002904 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002905 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002906 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002907 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002908 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002909 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002910 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002911 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002912 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002913 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002914 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002915 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002916 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002917 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002918 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002919 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002920 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002921 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002922 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002923 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002924 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002925 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002926 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002927 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002928 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002929 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002930 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002931 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002932 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002933 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002934 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002935 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002936 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002937 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002938 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002939 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002940 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002941 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002942 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2943 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2944 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2945 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002946 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2947 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2948 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2949 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002950 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2951 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07002952 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2953 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2954 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2955 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002956 "src/qu8-dwconv/up8x9-minmax-gemmlowp-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002957 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2958 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002959 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
2960 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2961 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
2962 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2963 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
2964 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2965 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
2966 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002967 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002968 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
2969 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2970 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
2971 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2972 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
2973 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002974 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002975 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
2976 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2977 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
2978 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2979 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
2980 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2981 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
2982 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002983 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002984 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
2985 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2986 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
2987 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2988 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
2989 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002990 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002991 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002992 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002993 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002994 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002995 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002996 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002997 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002998 "src/x8-zip/x2-sse2.c",
2999 "src/x8-zip/x3-sse2.c",
3000 "src/x8-zip/x4-sse2.c",
3001 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07003002 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003003 "src/x32-zip/x2-sse2.c",
3004 "src/x32-zip/x3-sse2.c",
3005 "src/x32-zip/x4-sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07003007]
3008
3009SSSE3_UKERNELS = [
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Marat Dukhan159688f2020-08-06 10:34:29 -07003026 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003032 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003034 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003037 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003038 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003039 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003041 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003048 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003050 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
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Marat Dukhan06716242021-05-26 15:56:39 -07003056 "src/qs8-requantization/rndna-ssse3.c",
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3064
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003065SSE41_UKERNELS = [
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07003080 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
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Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003082 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003084 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003102 "src/math/roundd-sse41.c",
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Marat Dukhan98042f22021-06-15 00:43:13 -07003106 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
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3112 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
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3116 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003121 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003122 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003123 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003124 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003143 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003144 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003145 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003146 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
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3148 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003150 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
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3152 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
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3155 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3156 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3157 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3158 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3159 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3160 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
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3162 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3163 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
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3165 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3166 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3167 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3168 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3169 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003170 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3171 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3172 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003173 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
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3175 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003176 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003177 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003178 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003179 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003180 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003181 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003182 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003183 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003184 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003185 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003186 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003187 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003188 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003189 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003190 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003191 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003192 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003193 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003194 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003195 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003196 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003197 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003198 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003199 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003200 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003201 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003202 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003203 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003204 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003205 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003206 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003207 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003208 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003209 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003210 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003211 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003212 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003213 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003214 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003215 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003216 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003217 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003218 "src/qs8-requantization/rndnu-sse4-sra.c",
3219 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003220 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3221 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3222 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3223 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003224 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3225 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3226 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3227 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003228 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3229 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3230 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3231 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003232 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3233 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3234 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3235 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003236 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003237 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003238 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003239 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003240 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003241 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003242 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003243 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003244 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3245 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3246 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3247 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3248 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3249 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3250 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3251 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003252 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003253 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3254 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3255 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3256 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3257 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3258 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003259 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003260 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3261 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3262 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3263 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3264 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3265 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3266 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3267 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003268 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003269 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3270 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3271 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3272 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3273 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3274 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003275 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003276 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003277 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003278]
3279
Marat Dukhan08c4a432019-10-03 09:29:21 -07003280AVX_UKERNELS = [
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Marat Dukhan1c587112020-04-08 20:04:28 -07003283 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003285 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3286 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003287 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3288 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3289 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3290 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3291 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3292 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003293 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003294 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003296 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003297 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003298 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003299 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003300 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
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3303 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
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3305 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
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3307 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
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3309 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3310 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003311 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003312 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3313 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003314 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003315 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003316 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003317 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003318 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3319 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003320 "src/f32-prelu/gen/avx-2x8.c",
3321 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003322 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003323 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
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3325 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3326 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3327 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3328 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3329 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3330 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003331 "src/f32-vbinary/gen/vmax-avx-x8.c",
3332 "src/f32-vbinary/gen/vmax-avx-x16.c",
3333 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3334 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3335 "src/f32-vbinary/gen/vmin-avx-x8.c",
3336 "src/f32-vbinary/gen/vmin-avx-x16.c",
3337 "src/f32-vbinary/gen/vminc-avx-x8.c",
3338 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003339 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3340 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3341 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3342 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3343 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3344 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3345 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3346 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003347 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
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3349 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3350 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003351 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07003355 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3356 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003357 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3358 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
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3361 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3362 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3363 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3364 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3365 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3366 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3367 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3368 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3369 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3370 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3371 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3372 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3373 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3374 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003375 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3376 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003377 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3378 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003379 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3380 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003381 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3382 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003383 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3384 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3385 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3386 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3387 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3388 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003389 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003390 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3391 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3392 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3393 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3394 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3395 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3396 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3397 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3398 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3399 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3400 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3401 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3402 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3403 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3404 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3405 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3406 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3407 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3408 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3409 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003410 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3411 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003412 "src/f32-vunary/gen/vabs-avx-x8.c",
3413 "src/f32-vunary/gen/vabs-avx-x16.c",
3414 "src/f32-vunary/gen/vneg-avx-x8.c",
3415 "src/f32-vunary/gen/vneg-avx-x16.c",
3416 "src/f32-vunary/gen/vsqr-avx-x8.c",
3417 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003418 "src/math/exp-avx-rr2-p5.c",
3419 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3420 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3421 "src/math/expm1minus-avx-rr2-p6.c",
3422 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3423 "src/math/sigmoid-avx-rr2-p5-div.c",
3424 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3425 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003426 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3427 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3428 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3429 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3430 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3431 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3432 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3433 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3434 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3435 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3436 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3437 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003438 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003439 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003440 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003441 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003442 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003443 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003444 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003445 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003446 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003447 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003448 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003449 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003450 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003451 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003452 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003453 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003454 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003455 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003456 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003457 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003458 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003459 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003460 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003461 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003462 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003463 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003464 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003465 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003466 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3467 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3468 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3469 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003470 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3471 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3472 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3473 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3474 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3475 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3476 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3477 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3478 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3479 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3480 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3481 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3482 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3483 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3484 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3485 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3486 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3487 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3488 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3489 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003490 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003491 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003492 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003493 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003494 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003495 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003496 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003497 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003498 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003499 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003500 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003501 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003502 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003503 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003504 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003505 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003506 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003507 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003508 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003509 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003510 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003511 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003512 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003513 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003514 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003515 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003516 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003517 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003518 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003519 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003520 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003521 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003522 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003523 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003524 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003525 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3526 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3527 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3528 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3529 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3530 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3531 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3532 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3533 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3534 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3535 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3536 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3537 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3538 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3539 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3540 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003541 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003542 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003543 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003544 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003545 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003546 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003547 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003548 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003549 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3550 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3551 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3552 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3553 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3554 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3555 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3556 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3557 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3558 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3559 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3560 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3561 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3562 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3563 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3564 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3565 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3566 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3567 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3568 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3569 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3570 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3571 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3572 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3573 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3574 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3575 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3576 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003577]
3578
Marat Dukhan1566fee2020-08-02 21:55:41 -07003579XOP_UKERNELS = [
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3582 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3583 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3584 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3585 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003591 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
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3619 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3620 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3621 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3622 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
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3624 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003654 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003655 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003656 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003657 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003658 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
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3663 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3664 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3665 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3666 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3667 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3668 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003669 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
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3671 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3672 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003673 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
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3677 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
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3679 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3680 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
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3683 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3684 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3685 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3686 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3687 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3688 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3689 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3690 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3691 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3692 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3693 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3694 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3695 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3696 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3697 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
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3700 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003701]
3702
Marat Dukhanfda12b82019-11-21 12:27:59 -08003703FMA3_UKERNELS = [
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Frank Barchard04336c12020-10-22 16:48:55 -07003730 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003755 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
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Marat Dukhan6674d692021-05-05 22:27:00 -07003758 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07003760 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
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Marat Dukhan84000762020-06-29 18:38:43 -07003769 "src/math/sqrt-fma3-nr1fma1adj.c",
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3772
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003773AVX2_UKERNELS = [
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08003798 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
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3814 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
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3820 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3821 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3822 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3823 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3824 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3825 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3826 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3827 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3828 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3829 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3830 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3831 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3832 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3833 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3834 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3835 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3836 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3837 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3838 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3839 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3840 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3841 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3842 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3843 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3844 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3845 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
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3848 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3849 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003850 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
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3852 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3853 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3854 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3855 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3856 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3857 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3858 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3859 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3860 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3861 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3862 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3863 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3864 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3865 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3866 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3867 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3868 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3869 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
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3871 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3872 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07003874 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3875 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3876 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3877 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3878 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3879 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3880 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3881 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3882 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3883 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3884 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3885 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3886 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3887 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3888 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3889 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3890 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3891 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3892 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3893 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3894 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3895 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3896 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3897 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3898 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3899 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3900 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3901 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3902 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3903 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003904 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3905 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3906 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003907 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3908 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3909 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3910 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003911 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003912 "src/math/extexp-avx2-p5.c",
3913 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3914 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3915 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3916 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3917 "src/math/sigmoid-avx2-rr1-p5-div.c",
3918 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3919 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3920 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3921 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3922 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3923 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3924 "src/math/sigmoid-avx2-rr2-p5-div.c",
3925 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3926 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07003927 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
3928 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
3929 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
3930 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
3931 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
3932 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
3933 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
3934 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
3935 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
3936 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
3937 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
3938 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003939 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3940 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3941 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3942 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3943 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3944 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07003945 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
3946 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
3947 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003948 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003949 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003950 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003951 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003952 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003953 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003954 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3955 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003956 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003957 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003958 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3959 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003960 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003961 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003962 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003963 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003964 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003965 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003966 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3967 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003968 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003969 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003970 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3971 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003972 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003973 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003974 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003975 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003976 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003977 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003978 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003979 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003980 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003981 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003982 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003983 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003984 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003985 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003986 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003987 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003988 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003989 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003990 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3991 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3992 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3993 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3994 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3995 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3996 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3997 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07003998 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3999 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4000 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4001 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4002 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4003 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004004]
4005
Marat Dukhan08c4a432019-10-03 09:29:21 -07004006AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004007 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4008 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004009 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4010 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004011 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4012 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004013 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
4014 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
4015 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4016 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4017 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4018 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004019 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4020 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4021 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4022 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4023 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4024 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004025 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4026 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4027 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4028 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4029 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4030 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004031 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4032 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4033 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4034 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4035 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4036 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004037 "src/f32-prelu/gen/avx512f-2x16.c",
4038 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004039 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4040 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004041 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004042 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004043 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004044 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4045 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004046 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004047 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4048 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4049 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004050 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004051 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4052 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004053 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004054 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004055 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004056 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4057 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004058 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004059 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4060 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4061 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004062 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004063 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4064 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004065 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004066 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004067 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004068 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4069 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004070 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004071 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4072 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4073 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004074 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004075 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004076 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4077 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4078 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4079 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4080 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4081 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4082 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4083 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004084 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4085 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4086 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4087 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4088 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4089 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4090 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4091 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004092 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4093 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4094 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4095 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4096 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4097 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4098 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4099 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004100 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4101 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4102 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4103 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004104 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4105 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4106 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4107 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004108 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4109 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004110 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4111 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4112 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4113 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4114 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4115 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4116 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4117 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4118 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4119 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4120 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4121 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4122 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4123 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4124 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4125 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004126 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4127 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004128 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4129 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004130 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4131 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004132 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4133 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4134 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4135 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4136 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4137 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4138 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4139 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004140 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004141 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4142 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4143 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4144 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4145 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4146 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4147 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4148 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4149 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4150 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4151 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4152 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4153 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4154 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4155 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4156 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4157 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4158 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4159 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4160 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4161 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4162 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4163 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4164 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004165 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4166 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4167 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4168 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4169 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4170 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4171 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4172 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4173 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4174 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4175 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4176 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4177 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4178 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4179 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4180 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4181 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4182 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4183 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4184 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4185 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4186 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4187 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4188 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4189 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4190 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4191 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4192 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4193 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4194 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4195 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4196 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4197 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4198 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4199 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4200 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4201 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4202 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4203 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4204 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4205 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4206 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4207 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4208 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4209 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4210 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4211 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4212 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004213 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4214 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4215 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4216 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4217 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4218 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4219 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4220 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004221 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4222 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4223 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4224 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4225 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4226 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004227 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4228 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4229 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4230 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4231 "src/math/exp-avx512f-rr2-p5-scalef.c",
4232 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004233 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4234 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004235 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004236 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004237 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004238 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004239 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004240 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004241 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004242 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004243 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004244 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4245 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4246 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4247 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4248 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4249 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4250 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4251 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4252 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4253 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004254 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004255 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004256 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4257 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4258 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4259 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004260 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004261 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004262 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004263]
4264
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004265AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004266 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4267 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4268 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4269 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004270 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4271 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4272 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4273 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4274 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4275 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4276 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4277 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004278 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004279 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004280 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004281 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004282 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004283 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004284 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004285 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004286 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004287 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004288 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004289 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004290 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004291 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004292 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004293 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004294 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004295 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004296 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004297 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004298 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004299 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004300 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004301 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004302 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4303 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4304 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4305 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4306 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4307 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4308 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4309 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004310]
4311
Frank Barchardbcedc082020-08-17 18:00:51 -07004312WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004313 "src/f32-vrelu/wasm_shr_x1.S",
4314 "src/f32-vrelu/wasm_shr_x2.S",
4315 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004316]
4317
Marat Dukhan08c4a432019-10-03 09:29:21 -07004318AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004319 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004320 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004321 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4322 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
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4477 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004478 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4479 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4480 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4481 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004482 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4483 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4484 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004485 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004486 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4487 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4488 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4489 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004490 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4491 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4492 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4493 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004494 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4495 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4496 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4497 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004498 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4499 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4500 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4501 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004502 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004503 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004504 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4505 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004506 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4507 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004508 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4509 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4510 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004511 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4512 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004513 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004514]
4515
Marat Dukhan1b354632020-03-23 12:50:22 -07004516INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004517 "src/xnnpack/argmaxpool.h",
4518 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004519 "src/xnnpack/common.h",
4520 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004521 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004522 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004523 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004524 "src/xnnpack/gavgpool.h",
4525 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004526 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004527 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004528 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004529 "src/xnnpack/lut.h",
4530 "src/xnnpack/math.h",
4531 "src/xnnpack/maxpool.h",
4532 "src/xnnpack/packx.h",
4533 "src/xnnpack/pad.h",
4534 "src/xnnpack/params.h",
4535 "src/xnnpack/pavgpool.h",
4536 "src/xnnpack/ppmm.h",
4537 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004538 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004539 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004540 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004541 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004542 "src/xnnpack/spmm.h",
4543 "src/xnnpack/unpool.h",
4544 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004545 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004546 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004547 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004548 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004549 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004550 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004551 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004552]
4553
4554INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004555 "include/xnnpack.h",
4556 "src/xnnpack/allocator.h",
4557 "src/xnnpack/compute.h",
4558 "src/xnnpack/im2col.h",
4559 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004560 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004561 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004562 "src/xnnpack/operator.h",
4563 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004564 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004565 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004566 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004567 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004568]
4569
Marat Dukhan1b354632020-03-23 12:50:22 -07004570ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004571 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004572]
4573
Marat Dukhan1b354632020-03-23 12:50:22 -07004574MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004575 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004576 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004577]
4578
Marat Dukhan1b354632020-03-23 12:50:22 -07004579MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004580 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004581 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004582 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004583 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004584]
4585
4586OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004587 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004588 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004589]
4590
4591WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004592 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004593 "src/xnnpack/operator.h",
4594 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004595]
4596
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004597LOGGING_COPTS = select({
4598 # No logging in optimized mode
4599 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4600 # Full logging in debug mode
4601 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4602 # Error-only logging in default (fastbuild) mode
4603 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4604})
4605
Marat Dukhan3b59de22020-06-03 20:15:19 -07004606LOGGING_SRCS = select({
4607 # No logging in optimized mode
4608 ":optimized_build": [],
4609 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004610 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004611 "src/operator-strings.c",
4612 "src/subgraph-strings.c",
4613 ],
4614})
4615
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004616LOGGING_HDRS = [
4617 "src/xnnpack/log.h",
4618]
4619
Marat Dukhan08c4a432019-10-03 09:29:21 -07004620xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004621 name = "tables",
4622 srcs = TABLE_SRCS,
4623 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004624 gcc_copts = xnnpack_gcc_std_copts(),
4625 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004626)
4627
4628xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004629 name = "scalar_ukernels",
4630 srcs = SCALAR_UKERNELS,
4631 hdrs = INTERNAL_HDRS,
4632 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004633 gcc_copts = xnnpack_gcc_std_copts(),
4634 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004635 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004636 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004637 "@FP16",
4638 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004639 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004640 ],
4641)
4642
4643xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004644 name = "scalar_ukernels_test_mode",
4645 srcs = SCALAR_UKERNELS,
4646 hdrs = INTERNAL_HDRS,
4647 aarch32_copts = ["-marm"],
4648 copts = [
4649 "-UNDEBUG",
4650 "-DXNN_TEST_MODE=1",
4651 ],
4652 gcc_copts = xnnpack_gcc_std_copts(),
4653 msvc_copts = xnnpack_msvc_std_copts(),
4654 deps = [
4655 ":tables",
4656 "@FP16",
4657 "@FXdiv",
4658 "@pthreadpool",
4659 ],
4660)
4661
4662xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004663 name = "wasm_ukernels",
4664 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004665 gcc_copts = xnnpack_gcc_std_copts(),
4666 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004667 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004668 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004669 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004670 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004671 "@FP16",
4672 "@FXdiv",
4673 "@pthreadpool",
4674 ],
4675)
4676
4677xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004678 name = "wasm_ukernels_test_mode",
4679 hdrs = INTERNAL_HDRS,
4680 copts = [
4681 "-UNDEBUG",
4682 "-DXNN_TEST_MODE=1",
4683 ],
4684 gcc_copts = xnnpack_gcc_std_copts(),
4685 msvc_copts = xnnpack_msvc_std_copts(),
4686 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004687 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004688 deps = [
4689 ":tables",
4690 "@FP16",
4691 "@FXdiv",
4692 "@pthreadpool",
4693 ],
4694)
4695
4696xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004697 name = "neon_ukernels",
4698 hdrs = INTERNAL_HDRS,
4699 aarch32_copts = [
4700 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004701 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004702 "-mfpu=neon",
4703 ],
4704 aarch32_srcs = NEON_UKERNELS,
4705 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004706 gcc_copts = xnnpack_gcc_std_copts(),
4707 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004708 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004709 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004710 "@FP16",
4711 "@pthreadpool",
4712 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004713)
4714
4715xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004716 name = "neon_ukernels_test_mode",
4717 hdrs = INTERNAL_HDRS,
4718 aarch32_copts = [
4719 "-marm",
4720 "-march=armv7-a",
4721 "-mfpu=neon",
4722 ],
4723 aarch32_srcs = NEON_UKERNELS,
4724 aarch64_srcs = NEON_UKERNELS,
4725 copts = [
4726 "-UNDEBUG",
4727 "-DXNN_TEST_MODE=1",
4728 ],
4729 gcc_copts = xnnpack_gcc_std_copts(),
4730 msvc_copts = xnnpack_msvc_std_copts(),
4731 deps = [
4732 ":tables",
4733 "@FP16",
4734 "@pthreadpool",
4735 ],
4736)
4737
4738xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004739 name = "neonfma_ukernels",
4740 hdrs = INTERNAL_HDRS,
4741 aarch32_copts = [
4742 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004743 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004744 "-mfpu=neon-vfpv4",
4745 ],
4746 aarch32_srcs = NEONFMA_UKERNELS,
4747 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004748 apple_aarch32_copts = [
4749 "-mcpu=swift",
4750 "-mtune=generic",
4751 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004752 gcc_copts = xnnpack_gcc_std_copts(),
4753 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004754 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004755 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004756 "@FP16",
4757 "@pthreadpool",
4758 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004759)
4760
4761xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004762 name = "neonfma_ukernels_test_mode",
4763 hdrs = INTERNAL_HDRS,
4764 aarch32_copts = [
4765 "-marm",
4766 "-march=armv7-a",
4767 "-mfpu=neon-vfpv4",
4768 ],
4769 aarch32_srcs = NEONFMA_UKERNELS,
4770 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004771 apple_aarch32_copts = [
4772 "-mcpu=swift",
4773 "-mtune=generic",
4774 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004775 copts = [
4776 "-UNDEBUG",
4777 "-DXNN_TEST_MODE=1",
4778 ],
4779 gcc_copts = xnnpack_gcc_std_copts(),
4780 msvc_copts = xnnpack_msvc_std_copts(),
4781 deps = [
4782 ":tables",
4783 "@FP16",
4784 "@pthreadpool",
4785 ],
4786)
4787
4788xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004789 name = "neonv8_ukernels",
4790 hdrs = INTERNAL_HDRS,
4791 aarch32_copts = [
4792 "-marm",
4793 "-march=armv8-a",
4794 "-mfpu=neon-fp-armv8",
4795 ],
4796 aarch32_srcs = NEONV8_UKERNELS,
4797 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004798 apple_aarch32_copts = [
4799 "-mcpu=cyclone",
4800 "-mtune=generic",
4801 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004802 gcc_copts = xnnpack_gcc_std_copts(),
4803 msvc_copts = xnnpack_msvc_std_copts(),
4804 deps = [
4805 ":tables",
4806 "@FP16",
4807 "@pthreadpool",
4808 ],
4809)
4810
4811xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004812 name = "neonv8_ukernels_test_mode",
4813 hdrs = INTERNAL_HDRS,
4814 aarch32_copts = [
4815 "-marm",
4816 "-march=armv8-a",
4817 "-mfpu=neon-fp-armv8",
4818 ],
4819 aarch32_srcs = NEONV8_UKERNELS,
4820 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004821 apple_aarch32_copts = [
4822 "-mcpu=cyclone",
4823 "-mtune=generic",
4824 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004825 copts = [
4826 "-UNDEBUG",
4827 "-DXNN_TEST_MODE=1",
4828 ],
4829 gcc_copts = xnnpack_gcc_std_copts(),
4830 msvc_copts = xnnpack_msvc_std_copts(),
4831 deps = [
4832 ":tables",
4833 "@FP16",
4834 "@pthreadpool",
4835 ],
4836)
4837
4838xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004839 name = "neonfp16arith_ukernels",
4840 hdrs = INTERNAL_HDRS,
4841 aarch64_copts = ["-march=armv8.2-a+fp16"],
4842 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004843 gcc_copts = xnnpack_gcc_std_copts(),
4844 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004845 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004846 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004847 "@FP16",
4848 "@pthreadpool",
4849 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004850)
4851
4852xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004853 name = "neonfp16arith_ukernels_test_mode",
4854 hdrs = INTERNAL_HDRS,
4855 aarch64_copts = ["-march=armv8.2-a+fp16"],
4856 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4857 copts = [
4858 "-UNDEBUG",
4859 "-DXNN_TEST_MODE=1",
4860 ],
4861 gcc_copts = xnnpack_gcc_std_copts(),
4862 msvc_copts = xnnpack_msvc_std_copts(),
4863 deps = [
4864 ":tables",
4865 "@FP16",
4866 "@pthreadpool",
4867 ],
4868)
4869
4870xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004871 name = "neondot_ukernels",
4872 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004873 aarch32_copts = [
4874 "-marm",
4875 "-march=armv8.2-a+dotprod",
4876 "-mfpu=neon-fp-armv8",
4877 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004878 aarch32_srcs = NEONDOT_UKERNELS,
4879 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4880 aarch64_srcs = NEONDOT_UKERNELS,
4881 gcc_copts = xnnpack_gcc_std_copts(),
4882 msvc_copts = xnnpack_msvc_std_copts(),
4883 deps = [
4884 ":tables",
4885 "@FP16",
4886 "@pthreadpool",
4887 ],
4888)
4889
4890xnnpack_cc_library(
4891 name = "neondot_ukernels_test_mode",
4892 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004893 aarch32_copts = [
4894 "-marm",
4895 "-march=armv8.2-a+dotprod",
4896 "-mfpu=neon-fp-armv8",
4897 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004898 aarch32_srcs = NEONDOT_UKERNELS,
4899 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4900 aarch64_srcs = NEONDOT_UKERNELS,
4901 copts = [
4902 "-UNDEBUG",
4903 "-DXNN_TEST_MODE=1",
4904 ],
4905 gcc_copts = xnnpack_gcc_std_copts(),
4906 msvc_copts = xnnpack_msvc_std_copts(),
4907 deps = [
4908 ":tables",
4909 "@FP16",
4910 "@pthreadpool",
4911 ],
4912)
4913
4914xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004915 name = "sse2_ukernels",
4916 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004917 gcc_copts = xnnpack_gcc_std_copts(),
4918 gcc_x86_copts = ["-msse2"],
4919 msvc_copts = xnnpack_msvc_std_copts(),
4920 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004921 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004922 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004923 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004924 "@FP16",
4925 "@pthreadpool",
4926 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004927)
4928
4929xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004930 name = "sse2_ukernels_test_mode",
4931 hdrs = INTERNAL_HDRS,
4932 copts = [
4933 "-UNDEBUG",
4934 "-DXNN_TEST_MODE=1",
4935 ],
4936 gcc_copts = xnnpack_gcc_std_copts(),
4937 gcc_x86_copts = ["-msse2"],
4938 msvc_copts = xnnpack_msvc_std_copts(),
4939 msvc_x86_32_copts = ["/arch:SSE2"],
4940 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4941 deps = [
4942 ":tables",
4943 "@FP16",
4944 "@pthreadpool",
4945 ],
4946)
4947
4948xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004949 name = "ssse3_ukernels",
4950 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004951 gcc_copts = xnnpack_gcc_std_copts(),
4952 gcc_x86_copts = ["-mssse3"],
4953 msvc_copts = xnnpack_msvc_std_copts(),
4954 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004955 x86_srcs = SSSE3_UKERNELS,
4956 deps = [
4957 ":tables",
4958 "@FP16",
4959 "@pthreadpool",
4960 ],
4961)
4962
4963xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004964 name = "ssse3_ukernels_test_mode",
4965 hdrs = INTERNAL_HDRS,
4966 copts = [
4967 "-UNDEBUG",
4968 "-DXNN_TEST_MODE=1",
4969 ],
4970 gcc_copts = xnnpack_gcc_std_copts(),
4971 gcc_x86_copts = ["-mssse3"],
4972 msvc_copts = xnnpack_msvc_std_copts(),
4973 msvc_x86_32_copts = ["/arch:SSE2"],
4974 x86_srcs = SSSE3_UKERNELS,
4975 deps = [
4976 ":tables",
4977 "@FP16",
4978 "@pthreadpool",
4979 ],
4980)
4981
4982xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004983 name = "sse41_ukernels",
4984 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004985 gcc_copts = xnnpack_gcc_std_copts(),
4986 gcc_x86_copts = ["-msse4.1"],
4987 msvc_copts = xnnpack_msvc_std_copts(),
4988 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004989 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004990 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004991 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004992 "@FP16",
4993 "@pthreadpool",
4994 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004995)
4996
4997xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004998 name = "sse41_ukernels_test_mode",
4999 hdrs = INTERNAL_HDRS,
5000 copts = [
5001 "-UNDEBUG",
5002 "-DXNN_TEST_MODE=1",
5003 ],
5004 gcc_copts = xnnpack_gcc_std_copts(),
5005 gcc_x86_copts = ["-msse4.1"],
5006 msvc_copts = xnnpack_msvc_std_copts(),
5007 msvc_x86_32_copts = ["/arch:SSE2"],
5008 x86_srcs = SSE41_UKERNELS,
5009 deps = [
5010 ":tables",
5011 "@FP16",
5012 "@pthreadpool",
5013 ],
5014)
5015
5016xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005017 name = "avx_ukernels",
5018 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005019 gcc_copts = xnnpack_gcc_std_copts(),
5020 gcc_x86_copts = ["-mavx"],
5021 msvc_copts = xnnpack_msvc_std_copts(),
5022 msvc_x86_32_copts = ["/arch:AVX"],
5023 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005024 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005025 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005026 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005027 "@FP16",
5028 "@pthreadpool",
5029 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005030)
5031
5032xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005033 name = "avx_ukernels_test_mode",
5034 hdrs = INTERNAL_HDRS,
5035 copts = [
5036 "-UNDEBUG",
5037 "-DXNN_TEST_MODE=1",
5038 ],
5039 gcc_copts = xnnpack_gcc_std_copts(),
5040 gcc_x86_copts = ["-mavx"],
5041 msvc_copts = xnnpack_msvc_std_copts(),
5042 msvc_x86_32_copts = ["/arch:AVX"],
5043 msvc_x86_64_copts = ["/arch:AVX"],
5044 x86_srcs = AVX_UKERNELS,
5045 deps = [
5046 ":tables",
5047 "@FP16",
5048 "@pthreadpool",
5049 ],
5050)
5051
5052xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005053 name = "xop_ukernels",
5054 hdrs = INTERNAL_HDRS,
5055 gcc_copts = xnnpack_gcc_std_copts(),
5056 gcc_x86_copts = ["-mxop"],
5057 msvc_copts = xnnpack_msvc_std_copts(),
5058 msvc_x86_32_copts = ["/arch:AVX"],
5059 msvc_x86_64_copts = ["/arch:AVX"],
5060 x86_srcs = XOP_UKERNELS,
5061 deps = [
5062 ":tables",
5063 "@FP16",
5064 "@pthreadpool",
5065 ],
5066)
5067
5068xnnpack_cc_library(
5069 name = "xop_ukernels_test_mode",
5070 hdrs = INTERNAL_HDRS,
5071 copts = [
5072 "-UNDEBUG",
5073 "-DXNN_TEST_MODE=1",
5074 ],
5075 gcc_copts = xnnpack_gcc_std_copts(),
5076 gcc_x86_copts = ["-mxop"],
5077 msvc_copts = xnnpack_msvc_std_copts(),
5078 msvc_x86_32_copts = ["/arch:AVX"],
5079 msvc_x86_64_copts = ["/arch:AVX"],
5080 x86_srcs = XOP_UKERNELS,
5081 deps = [
5082 ":tables",
5083 "@FP16",
5084 "@pthreadpool",
5085 ],
5086)
5087
5088xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005089 name = "fma3_ukernels",
5090 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005091 gcc_copts = xnnpack_gcc_std_copts(),
5092 gcc_x86_copts = ["-mfma"],
5093 msvc_copts = xnnpack_msvc_std_copts(),
5094 msvc_x86_32_copts = ["/arch:AVX"],
5095 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005096 x86_srcs = FMA3_UKERNELS,
5097 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005098 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005099 "@FP16",
5100 "@pthreadpool",
5101 ],
5102)
5103
5104xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005105 name = "fma3_ukernels_test_mode",
5106 hdrs = INTERNAL_HDRS,
5107 copts = [
5108 "-UNDEBUG",
5109 "-DXNN_TEST_MODE=1",
5110 ],
5111 gcc_copts = xnnpack_gcc_std_copts(),
5112 gcc_x86_copts = ["-mfma"],
5113 msvc_copts = xnnpack_msvc_std_copts(),
5114 msvc_x86_32_copts = ["/arch:AVX"],
5115 msvc_x86_64_copts = ["/arch:AVX"],
5116 x86_srcs = FMA3_UKERNELS,
5117 deps = [
5118 ":tables",
5119 "@FP16",
5120 "@pthreadpool",
5121 ],
5122)
5123
5124xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005125 name = "avx2_ukernels",
5126 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005127 gcc_copts = xnnpack_gcc_std_copts(),
5128 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005129 "-mfma",
5130 "-mavx2",
5131 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005132 msvc_copts = xnnpack_msvc_std_copts(),
5133 msvc_x86_32_copts = ["/arch:AVX2"],
5134 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005135 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005136 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005137 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005138 "@FP16",
5139 "@pthreadpool",
5140 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005141)
5142
5143xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005144 name = "avx2_ukernels_test_mode",
5145 hdrs = INTERNAL_HDRS,
5146 copts = [
5147 "-UNDEBUG",
5148 "-DXNN_TEST_MODE=1",
5149 ],
5150 gcc_copts = xnnpack_gcc_std_copts(),
5151 gcc_x86_copts = [
5152 "-mfma",
5153 "-mavx2",
5154 ],
5155 msvc_copts = xnnpack_msvc_std_copts(),
5156 msvc_x86_32_copts = ["/arch:AVX2"],
5157 msvc_x86_64_copts = ["/arch:AVX2"],
5158 x86_srcs = AVX2_UKERNELS,
5159 deps = [
5160 ":tables",
5161 "@FP16",
5162 "@pthreadpool",
5163 ],
5164)
5165
5166xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005167 name = "avx512f_ukernels",
5168 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005169 gcc_copts = xnnpack_gcc_std_copts(),
5170 gcc_x86_copts = ["-mavx512f"],
5171 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5172 msvc_copts = xnnpack_msvc_std_copts(),
5173 msvc_x86_32_copts = ["/arch:AVX512"],
5174 msvc_x86_64_copts = ["/arch:AVX512"],
5175 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005176 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005177 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005178 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005179 "@FP16",
5180 "@pthreadpool",
5181 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005182)
5183
5184xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005185 name = "avx512f_ukernels_test_mode",
5186 hdrs = INTERNAL_HDRS,
5187 copts = [
5188 "-UNDEBUG",
5189 "-DXNN_TEST_MODE=1",
5190 ],
5191 gcc_copts = xnnpack_gcc_std_copts(),
5192 gcc_x86_copts = ["-mavx512f"],
5193 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5194 msvc_copts = xnnpack_msvc_std_copts(),
5195 msvc_x86_32_copts = ["/arch:AVX512"],
5196 msvc_x86_64_copts = ["/arch:AVX512"],
5197 msys_copts = ["-fno-asynchronous-unwind-tables"],
5198 x86_srcs = AVX512F_UKERNELS,
5199 deps = [
5200 ":tables",
5201 "@FP16",
5202 "@pthreadpool",
5203 ],
5204)
5205
5206xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005207 name = "avx512skx_ukernels",
5208 hdrs = INTERNAL_HDRS,
5209 gcc_copts = xnnpack_gcc_std_copts(),
5210 gcc_x86_copts = [
5211 "-mavx512f",
5212 "-mavx512cd",
5213 "-mavx512bw",
5214 "-mavx512dq",
5215 "-mavx512vl",
5216 ],
5217 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5218 msvc_copts = xnnpack_msvc_std_copts(),
5219 msvc_x86_32_copts = ["/arch:AVX512"],
5220 msvc_x86_64_copts = ["/arch:AVX512"],
5221 msys_copts = ["-fno-asynchronous-unwind-tables"],
5222 x86_srcs = AVX512SKX_UKERNELS,
5223 deps = [
5224 ":tables",
5225 "@FP16",
5226 "@pthreadpool",
5227 ],
5228)
5229
5230xnnpack_cc_library(
5231 name = "avx512skx_ukernels_test_mode",
5232 hdrs = INTERNAL_HDRS,
5233 copts = [
5234 "-UNDEBUG",
5235 "-DXNN_TEST_MODE=1",
5236 ],
5237 gcc_copts = xnnpack_gcc_std_copts(),
5238 gcc_x86_copts = [
5239 "-mavx512f",
5240 "-mavx512cd",
5241 "-mavx512bw",
5242 "-mavx512dq",
5243 "-mavx512vl",
5244 ],
5245 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5246 msvc_copts = xnnpack_msvc_std_copts(),
5247 msvc_x86_32_copts = ["/arch:AVX512"],
5248 msvc_x86_64_copts = ["/arch:AVX512"],
5249 msys_copts = ["-fno-asynchronous-unwind-tables"],
5250 x86_srcs = AVX512SKX_UKERNELS,
5251 deps = [
5252 ":tables",
5253 "@FP16",
5254 "@pthreadpool",
5255 ],
5256)
5257
5258xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005259 name = "asm_ukernels",
5260 hdrs = ["src/xnnpack/assembly.h"],
5261 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005262 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005263 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005264 wasm_srcs = WASM32_ASM_UKERNELS,
5265 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005266)
5267
Marat Dukhan3b59de22020-06-03 20:15:19 -07005268xnnpack_cc_library(
5269 name = "logging_utils",
5270 srcs = LOGGING_SRCS,
5271 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5272 copts = LOGGING_COPTS + [
5273 "-Isrc",
5274 "-Iinclude",
5275 ] + select({
5276 ":debug_build": [],
5277 "//conditions:default": xnnpack_min_size_copts(),
5278 }),
5279 gcc_copts = xnnpack_gcc_std_copts(),
5280 msvc_copts = xnnpack_msvc_std_copts(),
5281 visibility = xnnpack_visibility(),
5282 deps = [
5283 "@FP16",
5284 "@clog",
5285 "@pthreadpool",
5286 ],
5287)
5288
Marat Dukhan08c4a432019-10-03 09:29:21 -07005289xnnpack_aggregate_library(
5290 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005291 aarch32_ios_deps = [
5292 ":neon_ukernels",
5293 ":neonfma_ukernels",
5294 ":neonv8_ukernels",
5295 ":asm_ukernels",
5296 ],
5297 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005298 ":neon_ukernels",
5299 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005300 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005301 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005302 ":asm_ukernels",
5303 ],
5304 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005305 ":neon_ukernels",
5306 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005307 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005308 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005309 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005310 ":asm_ukernels",
5311 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005312 generic_deps = [
5313 ":scalar_ukernels",
5314 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005315 wasm_deps = [
5316 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005317 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005318 ],
5319 wasmsimd_deps = [
5320 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005321 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005322 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005323 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005324 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005325 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005326 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005327 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005328 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005329 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005330 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005331 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005332 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005333 ],
5334)
5335
Marat Dukhan33fcf782020-05-24 14:27:15 -07005336xnnpack_aggregate_library(
5337 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005338 aarch32_ios_deps = [
5339 ":neon_ukernels_test_mode",
5340 ":neonfma_ukernels_test_mode",
5341 ":neonv8_ukernels_test_mode",
5342 ":asm_ukernels",
5343 ],
5344 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005345 ":neon_ukernels_test_mode",
5346 ":neonfma_ukernels_test_mode",
5347 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005348 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005349 ":asm_ukernels",
5350 ],
5351 aarch64_deps = [
5352 ":neon_ukernels_test_mode",
5353 ":neonfma_ukernels_test_mode",
5354 ":neonv8_ukernels_test_mode",
5355 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005356 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005357 ":asm_ukernels",
5358 ],
5359 generic_deps = [
5360 ":scalar_ukernels_test_mode",
5361 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005362 wasm_deps = [
5363 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005364 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005365 ],
5366 wasmsimd_deps = [
5367 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005368 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005369 ],
5370 x86_deps = [
5371 ":sse2_ukernels_test_mode",
5372 ":ssse3_ukernels_test_mode",
5373 ":sse41_ukernels_test_mode",
5374 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005375 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005376 ":fma3_ukernels_test_mode",
5377 ":avx2_ukernels_test_mode",
5378 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005379 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005380 ],
5381)
5382
Marat Dukhan08c4a432019-10-03 09:29:21 -07005383xnnpack_cc_library(
5384 name = "im2col",
5385 srcs = ["src/im2col.c"],
5386 hdrs = [
5387 "src/xnnpack/common.h",
5388 "src/xnnpack/im2col.h",
5389 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005390 gcc_copts = xnnpack_gcc_std_copts(),
5391 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005392)
5393
5394xnnpack_cc_library(
5395 name = "indirection",
5396 srcs = ["src/indirection.c"],
5397 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005398 gcc_copts = xnnpack_gcc_std_copts(),
5399 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005400 deps = [
5401 "@FP16",
5402 "@FXdiv",
5403 "@pthreadpool",
5404 ],
5405)
5406
5407xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005408 name = "indirection_test_mode",
5409 srcs = ["src/indirection.c"],
5410 hdrs = INTERNAL_HDRS,
5411 copts = [
5412 "-UNDEBUG",
5413 "-DXNN_TEST_MODE=1",
5414 ],
5415 gcc_copts = xnnpack_gcc_std_copts(),
5416 msvc_copts = xnnpack_msvc_std_copts(),
5417 deps = [
5418 "@FP16",
5419 "@FXdiv",
5420 "@pthreadpool",
5421 ],
5422)
5423
5424xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005425 name = "packing",
5426 srcs = ["src/packing.c"],
5427 hdrs = INTERNAL_HDRS,
5428 gcc_copts = xnnpack_gcc_std_copts(),
5429 msvc_copts = xnnpack_msvc_std_copts(),
5430 deps = [
5431 "@FP16",
5432 "@FXdiv",
5433 "@pthreadpool",
5434 ],
5435)
5436
5437xnnpack_cc_library(
5438 name = "packing_test_mode",
5439 srcs = ["src/packing.c"],
5440 hdrs = INTERNAL_HDRS,
5441 copts = [
5442 "-UNDEBUG",
5443 "-DXNN_TEST_MODE=1",
5444 ],
5445 gcc_copts = xnnpack_gcc_std_copts(),
5446 msvc_copts = xnnpack_msvc_std_copts(),
5447 deps = [
5448 "@FP16",
5449 "@FXdiv",
5450 "@pthreadpool",
5451 ],
5452)
5453
5454xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005455 name = "operator_run",
5456 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005457 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005458 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005459 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5460 "//conditions:default": [],
5461 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005462 gcc_copts = xnnpack_gcc_std_copts(),
5463 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005464 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005465 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005466 "@FP16",
5467 "@FXdiv",
5468 "@clog",
5469 "@pthreadpool",
5470 ],
5471)
5472
Chao Mei6ddfc602020-05-13 22:29:36 -07005473xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005474 name = "operator_run_test_mode",
5475 srcs = ["src/operator-run.c"],
5476 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5477 copts = LOGGING_COPTS + [
5478 "-UNDEBUG",
5479 "-DXNN_TEST_MODE=1",
5480 ] + select({
5481 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5482 "//conditions:default": [],
5483 }),
5484 gcc_copts = xnnpack_gcc_std_copts(),
5485 msvc_copts = xnnpack_msvc_std_copts(),
5486 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005487 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005488 "@FP16",
5489 "@FXdiv",
5490 "@clog",
5491 "@pthreadpool",
5492 ],
5493)
5494
5495xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005496 name = "memory_planner",
5497 srcs = ["src/memory-planner.c"],
5498 hdrs = INTERNAL_HDRS,
5499 defines = select({
5500 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5501 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5502 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5503 }),
5504 gcc_copts = xnnpack_gcc_std_copts(),
5505 msvc_copts = xnnpack_msvc_std_copts(),
5506 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005507 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005508 "@pthreadpool",
5509 ],
5510)
5511
Marat Dukhan33fcf782020-05-24 14:27:15 -07005512xnnpack_cc_library(
5513 name = "memory_planner_test_mode",
5514 srcs = ["src/memory-planner.c"],
5515 hdrs = INTERNAL_HDRS,
5516 copts = [
5517 "-UNDEBUG",
5518 "-DXNN_TEST_MODE=1",
5519 ],
5520 defines = select({
5521 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5522 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5523 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5524 }),
5525 gcc_copts = xnnpack_gcc_std_copts(),
5526 msvc_copts = xnnpack_msvc_std_copts(),
5527 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005528 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005529 "@pthreadpool",
5530 ],
5531)
5532
Marat Dukhan08c4a432019-10-03 09:29:21 -07005533cc_library(
5534 name = "enable_assembly",
5535 defines = select({
5536 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5537 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005538 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005539 }),
5540)
5541
Marat Dukhan9de90e02020-06-18 16:04:12 -07005542cc_library(
5543 name = "enable_sparse",
5544 defines = select({
5545 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5546 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005547 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005548 }),
5549)
5550
Marat Dukhancf056b22019-10-07 10:26:29 -07005551xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005552 name = "operators",
5553 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005554 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005555 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005556 ],
5557 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005558 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005559 "-Isrc",
5560 "-Iinclude",
5561 ] + select({
5562 ":debug_build": [],
5563 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005564 }) + select({
5565 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5566 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005567 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005568 gcc_copts = xnnpack_gcc_std_copts(),
5569 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005570 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005571 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005572 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005573 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005574 "@FP16",
5575 "@FXdiv",
5576 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005577 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005578 ],
5579)
5580
Marat Dukhan10a38082020-04-17 03:58:35 -07005581xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005582 name = "operators_test_mode",
5583 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005584 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005585 "src/operator-delete.c",
5586 ],
5587 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5588 copts = LOGGING_COPTS + [
5589 "-Isrc",
5590 "-Iinclude",
5591 "-UNDEBUG",
5592 "-DXNN_TEST_MODE=1",
5593 ] + select({
5594 ":debug_build": [],
5595 "//conditions:default": xnnpack_min_size_copts(),
5596 }) + select({
5597 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5598 "//conditions:default": [],
5599 }),
5600 gcc_copts = xnnpack_gcc_std_copts(),
5601 msvc_copts = xnnpack_msvc_std_copts(),
5602 deps = [
5603 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005604 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005605 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005606 "@FP16",
5607 "@FXdiv",
5608 "@clog",
5609 "@pthreadpool",
5610 ],
5611)
5612
5613xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005614 name = "XNNPACK",
5615 srcs = [
5616 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005617 "src/runtime.c",
5618 "src/subgraph.c",
5619 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005620 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005621 hdrs = ["include/xnnpack.h"],
5622 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005623 "-Isrc",
5624 "-Iinclude",
5625 ] + select({
5626 ":debug_build": [],
5627 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005628 }) + select({
5629 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5630 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005631 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005632 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005633 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005634 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005635 visibility = xnnpack_visibility(),
5636 deps = [
5637 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005638 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005639 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005640 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005641 ":operator_run",
5642 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005643 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005644 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005645 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005646 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005647 ] + select({
5648 ":emscripten": [],
5649 "//conditions:default": ["@cpuinfo"],
5650 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005651)
5652
Marat Dukhan10a38082020-04-17 03:58:35 -07005653xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005654 name = "XNNPACK_test_mode",
5655 srcs = [
5656 "src/init.c",
5657 "src/runtime.c",
5658 "src/subgraph.c",
5659 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005660 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005661 hdrs = ["include/xnnpack.h"],
5662 copts = LOGGING_COPTS + [
5663 "-Isrc",
5664 "-Iinclude",
5665 "-UNDEBUG",
5666 "-DXNN_TEST_MODE=1",
5667 ] + select({
5668 ":debug_build": [],
5669 "//conditions:default": xnnpack_min_size_copts(),
5670 }) + select({
5671 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5672 "//conditions:default": [],
5673 }),
5674 gcc_copts = xnnpack_gcc_std_copts(),
5675 includes = ["include"],
5676 msvc_copts = xnnpack_msvc_std_copts(),
5677 visibility = xnnpack_visibility(),
5678 deps = [
5679 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005680 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005681 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005682 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005683 ":operator_run_test_mode",
5684 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005685 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005686 "@clog",
5687 "@FP16",
5688 "@pthreadpool",
5689 ] + select({
5690 ":emscripten": [],
5691 "//conditions:default": ["@cpuinfo"],
5692 }),
5693)
5694
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005695# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5696# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005697xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005698 name = "xnnpack_for_tflite",
5699 srcs = [
5700 "src/init.c",
5701 "src/runtime.c",
5702 "src/subgraph.c",
5703 "src/tensor.c",
5704 ] + SUBGRAPH_SRCS,
5705 hdrs = ["include/xnnpack.h"],
5706 copts = LOGGING_COPTS + [
5707 "-Isrc",
5708 "-Iinclude",
5709 ] + select({
5710 ":debug_build": [],
5711 "//conditions:default": xnnpack_min_size_copts(),
5712 }) + select({
5713 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5714 "//conditions:default": [],
5715 }),
5716 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005717 "XNN_NO_QU8_OPERATORS",
5718 "XNN_NO_U8_OPERATORS",
5719 "XNN_NO_X8_OPERATORS",
5720 "XNN_NO_F16_OPERATORS",
5721 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005722 ] + select({
5723 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005724 ":xnn_enable_qs8_explicit_false": [
5725 "XNN_NO_QC8_OPERATORS",
5726 "XNN_NO_QS8_OPERATORS",
5727 ],
5728 "//conditions:default": [
5729 "XNN_NO_QC8_OPERATORS",
5730 "XNN_NO_QS8_OPERATORS",
5731 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005732 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005733 gcc_copts = xnnpack_gcc_std_copts(),
5734 includes = ["include"],
5735 msvc_copts = xnnpack_msvc_std_copts(),
5736 visibility = xnnpack_visibility(),
5737 deps = [
5738 ":enable_assembly",
5739 ":enable_sparse",
5740 ":logging_utils",
5741 ":memory_planner",
5742 ":operator_run",
5743 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005744 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005745 "@clog",
5746 "@FP16",
5747 "@pthreadpool",
5748 ] + select({
5749 ":emscripten": [],
5750 "//conditions:default": ["@cpuinfo"],
5751 }),
5752)
5753
5754# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5755# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5756xnnpack_cc_library(
5757 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005758 srcs = [
5759 "src/init.c",
5760 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005761 hdrs = ["include/xnnpack.h"],
5762 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005763 "-Isrc",
5764 "-Iinclude",
5765 ] + select({
5766 ":debug_build": [],
5767 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005768 }) + select({
5769 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5770 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005771 }),
5772 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005773 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005774 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005775 "XNN_NO_U8_OPERATORS",
5776 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005777 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005778 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005779 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005780 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005781 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005782 visibility = xnnpack_visibility(),
5783 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005784 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005785 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005786 ":operator_run",
5787 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005788 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005789 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005790 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005791 ] + select({
5792 ":emscripten": [],
5793 "//conditions:default": ["@cpuinfo"],
5794 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005795)
5796
Marat Dukhancf056b22019-10-07 10:26:29 -07005797xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005798 name = "bench_utils",
5799 srcs = ["bench/utils.cc"],
5800 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005801 deps = [
5802 "@com_google_benchmark//:benchmark",
5803 "@cpuinfo",
5804 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005805)
5806
Frank Barchard7e955972019-10-11 10:34:25 -07005807######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005808
5809xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005810 name = "qs8_gemm_bench",
5811 srcs = [
5812 "bench/gemm.h",
5813 "bench/qs8-gemm.cc",
5814 "src/xnnpack/AlignedAllocator.h",
5815 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005816 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5817 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005818)
5819
5820xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005821 name = "qs8_requantization_bench",
5822 srcs = [
5823 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005824 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005825 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005826 ] + MICROKERNEL_BENCHMARK_HDRS,
5827 deps = MICROKERNEL_BENCHMARK_DEPS,
5828)
5829
5830xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005831 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005832 srcs = [
5833 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005834 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005835 "src/xnnpack/AlignedAllocator.h",
5836 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005837 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005838 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005839)
5840
5841xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005842 name = "qu8_requantization_bench",
5843 srcs = [
5844 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005845 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005846 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005847 ] + MICROKERNEL_BENCHMARK_HDRS,
5848 deps = MICROKERNEL_BENCHMARK_DEPS,
5849)
5850
5851xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005852 name = "f16_igemm_bench",
5853 srcs = [
5854 "bench/f16-igemm.cc",
5855 "bench/conv.h",
5856 "bench/google/conv.h",
5857 "src/xnnpack/AlignedAllocator.h",
5858 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005859 deps = MICROKERNEL_BENCHMARK_DEPS + [
5860 ":indirection",
5861 ":packing",
5862 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005863)
5864
5865xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005866 name = "f16_gemm_bench",
5867 srcs = [
5868 "bench/f16-gemm.cc",
5869 "bench/gemm.h",
5870 "src/xnnpack/AlignedAllocator.h",
5871 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005872 deps = MICROKERNEL_BENCHMARK_DEPS + [
5873 ":packing",
5874 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005875)
5876
5877xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005878 name = "f16_spmm_bench",
5879 srcs = [
5880 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005881 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005882 "src/xnnpack/AlignedAllocator.h",
5883 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005884 deps = MICROKERNEL_BENCHMARK_DEPS,
5885)
5886
5887xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005888 name = "f16_vrelu_bench",
5889 srcs = [
5890 "bench/f16-vrelu.cc",
5891 "src/xnnpack/AlignedAllocator.h",
5892 ] + MICROKERNEL_BENCHMARK_HDRS,
5893 deps = MICROKERNEL_BENCHMARK_DEPS,
5894)
5895
5896xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005897 name = "f32_igemm_bench",
5898 srcs = [
5899 "bench/f32-igemm.cc",
5900 "bench/conv.h",
5901 "src/xnnpack/AlignedAllocator.h",
5902 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005903 deps = MICROKERNEL_BENCHMARK_DEPS + [
5904 ":indirection",
5905 ":packing",
5906 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005907)
5908
5909xnnpack_benchmark(
5910 name = "f32_conv_hwc_bench",
5911 srcs = [
5912 "bench/f32-conv-hwc.cc",
5913 "bench/dconv.h",
5914 "src/xnnpack/AlignedAllocator.h",
5915 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005916 deps = MICROKERNEL_BENCHMARK_DEPS + [
5917 ":packing",
5918 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005919)
5920
5921xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005922 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005923 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005924 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005925 "bench/dconv.h",
5926 "src/xnnpack/AlignedAllocator.h",
5927 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005928 deps = MICROKERNEL_BENCHMARK_DEPS + [
5929 ":packing",
5930 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005931)
5932
5933xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005934 name = "f16_dwconv_bench",
5935 srcs = [
5936 "bench/f16-dwconv.cc",
5937 "bench/dwconv.h",
5938 "bench/google/dwconv.h",
5939 "src/xnnpack/AlignedAllocator.h",
5940 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005941 deps = MICROKERNEL_BENCHMARK_DEPS + [
5942 ":indirection",
5943 ":packing",
5944 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005945)
5946
5947xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005948 name = "f32_dwconv_bench",
5949 srcs = [
5950 "bench/f32-dwconv.cc",
5951 "bench/dwconv.h",
5952 "src/xnnpack/AlignedAllocator.h",
5953 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005954 deps = MICROKERNEL_BENCHMARK_DEPS + [
5955 ":indirection",
5956 ":packing",
5957 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005958)
5959
5960xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005961 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005962 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005963 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005964 "bench/dwconv.h",
5965 "src/xnnpack/AlignedAllocator.h",
5966 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005967 deps = MICROKERNEL_BENCHMARK_DEPS + [
5968 ":indirection",
5969 ":packing",
5970 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005971)
5972
5973xnnpack_benchmark(
5974 name = "f32_gemm_bench",
5975 srcs = [
5976 "bench/f32-gemm.cc",
5977 "bench/gemm.h",
5978 "src/xnnpack/AlignedAllocator.h",
5979 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005980 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005981 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005982)
5983
5984xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005985 name = "f32_raddexpminusmax_bench",
5986 srcs = [
5987 "bench/f32-raddexpminusmax.cc",
5988 "src/xnnpack/AlignedAllocator.h",
5989 ] + MICROKERNEL_BENCHMARK_HDRS,
5990 deps = MICROKERNEL_BENCHMARK_DEPS,
5991)
5992
5993xnnpack_benchmark(
5994 name = "f32_raddextexp_bench",
5995 srcs = [
5996 "bench/f32-raddextexp.cc",
5997 "src/xnnpack/AlignedAllocator.h",
5998 ] + MICROKERNEL_BENCHMARK_HDRS,
5999 deps = MICROKERNEL_BENCHMARK_DEPS,
6000)
6001
6002xnnpack_benchmark(
6003 name = "f32_raddstoreexpminusmax_bench",
6004 srcs = [
6005 "bench/f32-raddstoreexpminusmax.cc",
6006 "src/xnnpack/AlignedAllocator.h",
6007 ] + MICROKERNEL_BENCHMARK_HDRS,
6008 deps = MICROKERNEL_BENCHMARK_DEPS,
6009)
6010
6011xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006012 name = "f32_rmax_bench",
6013 srcs = [
6014 "bench/f32-rmax.cc",
6015 "src/xnnpack/AlignedAllocator.h",
6016 ] + MICROKERNEL_BENCHMARK_HDRS,
6017 deps = MICROKERNEL_BENCHMARK_DEPS,
6018)
6019
6020xnnpack_benchmark(
6021 name = "f32_spmm_bench",
6022 srcs = [
6023 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006024 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006025 "src/xnnpack/AlignedAllocator.h",
6026 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006027 deps = MICROKERNEL_BENCHMARK_DEPS,
6028)
6029
6030xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006031 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006032 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006033 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006034 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006035 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006036 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006037)
6038
6039xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006040 name = "f32_velu_bench",
6041 srcs = [
6042 "bench/f32-velu.cc",
6043 "src/xnnpack/AlignedAllocator.h",
6044 ] + MICROKERNEL_BENCHMARK_HDRS,
6045 deps = MICROKERNEL_BENCHMARK_DEPS,
6046)
6047
6048xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006049 name = "f32_vhswish_bench",
6050 srcs = [
6051 "bench/f32-vhswish.cc",
6052 "src/xnnpack/AlignedAllocator.h",
6053 ] + MICROKERNEL_BENCHMARK_HDRS,
6054 deps = MICROKERNEL_BENCHMARK_DEPS,
6055)
6056
6057xnnpack_benchmark(
6058 name = "f32_vrelu_bench",
6059 srcs = [
6060 "bench/f32-vrelu.cc",
6061 "src/xnnpack/AlignedAllocator.h",
6062 ] + MICROKERNEL_BENCHMARK_HDRS,
6063 deps = MICROKERNEL_BENCHMARK_DEPS,
6064)
6065
6066xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006067 name = "f32_vscaleexpminusmax_bench",
6068 srcs = [
6069 "bench/f32-vscaleexpminusmax.cc",
6070 "src/xnnpack/AlignedAllocator.h",
6071 ] + MICROKERNEL_BENCHMARK_HDRS,
6072 deps = MICROKERNEL_BENCHMARK_DEPS,
6073)
6074
6075xnnpack_benchmark(
6076 name = "f32_vscaleextexp_bench",
6077 srcs = [
6078 "bench/f32-vscaleextexp.cc",
6079 "src/xnnpack/AlignedAllocator.h",
6080 ] + MICROKERNEL_BENCHMARK_HDRS,
6081 deps = MICROKERNEL_BENCHMARK_DEPS,
6082)
6083
6084xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006085 name = "f32_vsigmoid_bench",
6086 srcs = [
6087 "bench/f32-vsigmoid.cc",
6088 "src/xnnpack/AlignedAllocator.h",
6089 ] + MICROKERNEL_BENCHMARK_HDRS,
6090 deps = MICROKERNEL_BENCHMARK_DEPS,
6091)
6092
6093xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006094 name = "f32_vsqrt_bench",
6095 srcs = [
6096 "bench/f32-vsqrt.cc",
6097 "src/xnnpack/AlignedAllocator.h",
6098 ] + MICROKERNEL_BENCHMARK_HDRS,
6099 deps = MICROKERNEL_BENCHMARK_DEPS,
6100)
6101
6102xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006103 name = "f32_im2col_gemm_bench",
6104 srcs = [
6105 "bench/f32-im2col-gemm.cc",
6106 "bench/conv.h",
6107 "src/xnnpack/AlignedAllocator.h",
6108 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006109 deps = MICROKERNEL_BENCHMARK_DEPS + [
6110 ":im2col",
6111 ":packing",
6112 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006113)
6114
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006115xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006116 name = "rounding_bench",
6117 srcs = [
6118 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006119 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006120 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006121 ] + MICROKERNEL_BENCHMARK_HDRS,
6122 deps = MICROKERNEL_BENCHMARK_DEPS,
6123)
6124
Marat Dukhan08c4a432019-10-03 09:29:21 -07006125########################### Benchmarks for operators ###########################
6126
6127xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006128 name = "average_pooling_bench",
6129 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006130 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006131 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006132 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006133)
6134
6135xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006136 name = "bankers_rounding_bench",
6137 srcs = ["bench/bankers-rounding.cc"],
6138 copts = xnnpack_optional_tflite_copts(),
6139 tags = ["nowin32"],
6140 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6141)
6142
6143xnnpack_benchmark(
6144 name = "ceiling_bench",
6145 srcs = ["bench/ceiling.cc"],
6146 copts = xnnpack_optional_tflite_copts(),
6147 tags = ["nowin32"],
6148 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6149)
6150
6151xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006152 name = "channel_shuffle_bench",
6153 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006154 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006155)
6156
6157xnnpack_benchmark(
6158 name = "convolution_bench",
6159 srcs = ["bench/convolution.cc"],
6160 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006161 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006162 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006163)
6164
6165xnnpack_benchmark(
6166 name = "deconvolution_bench",
6167 srcs = ["bench/deconvolution.cc"],
6168 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006169 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006170 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006171)
6172
6173xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006174 name = "elu_bench",
6175 srcs = ["bench/elu.cc"],
6176 copts = xnnpack_optional_tflite_copts(),
6177 tags = ["nowin32"],
6178 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6179)
6180
6181xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006182 name = "floor_bench",
6183 srcs = ["bench/floor.cc"],
6184 copts = xnnpack_optional_tflite_copts(),
6185 tags = ["nowin32"],
6186 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6187)
6188
6189xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006190 name = "global_average_pooling_bench",
6191 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006192 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006193)
6194
6195xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006196 name = "hardswish_bench",
6197 srcs = ["bench/hardswish.cc"],
6198 copts = xnnpack_optional_tflite_copts(),
6199 tags = ["nowin32"],
6200 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6201)
6202
6203xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006204 name = "max_pooling_bench",
6205 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006206 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006207)
6208
6209xnnpack_benchmark(
6210 name = "sigmoid_bench",
6211 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006212 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006213 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006214 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006215)
6216
6217xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006218 name = "prelu_bench",
6219 srcs = ["bench/prelu.cc"],
6220 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006221 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006222 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006223)
6224
6225xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006226 name = "softmax_bench",
6227 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006228 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006229 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006230 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006231)
6232
Marat Dukhan87727142020-06-24 15:24:10 -07006233xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006234 name = "square_root_bench",
6235 srcs = ["bench/square-root.cc"],
6236 copts = xnnpack_optional_tflite_copts(),
6237 tags = ["nowin32"],
6238 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6239)
6240
6241xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006242 name = "truncation_bench",
6243 srcs = ["bench/truncation.cc"],
6244 deps = OPERATOR_BENCHMARK_DEPS,
6245)
6246
Marat Dukhanc068bb62019-10-04 13:24:39 -07006247############################# End-to-end benchmarks ############################
6248
6249cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006250 name = "fp32_mobilenet_v1",
6251 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006252 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006253 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006254 linkstatic = True,
6255 deps = [
6256 ":XNNPACK",
6257 "@pthreadpool",
6258 ],
6259)
6260
6261cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006262 name = "fp32_sparse_mobilenet_v1",
6263 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6264 hdrs = ["models/models.h"],
6265 copts = xnnpack_std_cxxopts(),
6266 linkstatic = True,
6267 deps = [
6268 ":XNNPACK",
6269 "@pthreadpool",
6270 ],
6271)
6272
6273cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006274 name = "fp16_mobilenet_v1",
6275 srcs = ["models/fp16-mobilenet-v1.cc"],
6276 hdrs = ["models/models.h"],
6277 copts = xnnpack_std_cxxopts(),
6278 linkstatic = True,
6279 deps = [
6280 ":XNNPACK",
6281 "@FP16",
6282 "@pthreadpool",
6283 ],
6284)
6285
6286cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006287 name = "qs8_mobilenet_v1",
6288 srcs = ["models/qs8-mobilenet-v1.cc"],
6289 hdrs = ["models/models.h"],
6290 copts = xnnpack_std_cxxopts(),
6291 linkstatic = True,
6292 deps = [
6293 ":XNNPACK",
6294 "@pthreadpool",
6295 ],
6296)
6297
6298cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006299 name = "qs8_mobilenet_v2",
6300 srcs = ["models/qs8-mobilenet-v2.cc"],
6301 hdrs = ["models/models.h"],
6302 copts = xnnpack_std_cxxopts(),
6303 linkstatic = True,
6304 deps = [
6305 ":XNNPACK",
6306 "@pthreadpool",
6307 ],
6308)
6309
6310cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006311 name = "qu8_mobilenet_v1",
6312 srcs = ["models/qu8-mobilenet-v1.cc"],
6313 hdrs = ["models/models.h"],
6314 copts = xnnpack_std_cxxopts(),
6315 linkstatic = True,
6316 deps = [
6317 ":XNNPACK",
6318 "@pthreadpool",
6319 ],
6320)
6321
6322cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006323 name = "fp32_mobilenet_v2",
6324 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006325 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006326 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006327 linkstatic = True,
6328 deps = [
6329 ":XNNPACK",
6330 "@pthreadpool",
6331 ],
6332)
6333
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006334cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006335 name = "fp32_sparse_mobilenet_v2",
6336 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6337 hdrs = ["models/models.h"],
6338 copts = xnnpack_std_cxxopts(),
6339 linkstatic = True,
6340 deps = [
6341 ":XNNPACK",
6342 "@pthreadpool",
6343 ],
6344)
6345
6346cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006347 name = "fp16_mobilenet_v2",
6348 srcs = ["models/fp16-mobilenet-v2.cc"],
6349 hdrs = ["models/models.h"],
6350 copts = xnnpack_std_cxxopts(),
6351 linkstatic = True,
6352 deps = [
6353 ":XNNPACK",
6354 "@FP16",
6355 "@pthreadpool",
6356 ],
6357)
6358
6359cc_library(
6360 name = "fp32_mobilenet_v3_large",
6361 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006362 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006363 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006364 linkstatic = True,
6365 deps = [
6366 ":XNNPACK",
6367 "@pthreadpool",
6368 ],
6369)
6370
6371cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006372 name = "fp32_sparse_mobilenet_v3_large",
6373 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6374 hdrs = ["models/models.h"],
6375 copts = xnnpack_std_cxxopts(),
6376 linkstatic = True,
6377 deps = [
6378 ":XNNPACK",
6379 "@pthreadpool",
6380 ],
6381)
6382
6383cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006384 name = "fp16_mobilenet_v3_large",
6385 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6386 hdrs = ["models/models.h"],
6387 copts = xnnpack_std_cxxopts(),
6388 linkstatic = True,
6389 deps = [
6390 ":XNNPACK",
6391 "@FP16",
6392 "@pthreadpool",
6393 ],
6394)
6395
6396cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006397 name = "fp32_mobilenet_v3_small",
6398 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006399 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006400 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006401 linkstatic = True,
6402 deps = [
6403 ":XNNPACK",
6404 "@pthreadpool",
6405 ],
6406)
6407
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006408cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006409 name = "fp32_sparse_mobilenet_v3_small",
6410 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6411 hdrs = ["models/models.h"],
6412 copts = xnnpack_std_cxxopts(),
6413 linkstatic = True,
6414 deps = [
6415 ":XNNPACK",
6416 "@pthreadpool",
6417 ],
6418)
6419
6420cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006421 name = "fp16_mobilenet_v3_small",
6422 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6423 hdrs = ["models/models.h"],
6424 copts = xnnpack_std_cxxopts(),
6425 linkstatic = True,
6426 deps = [
6427 ":XNNPACK",
6428 "@FP16",
6429 "@pthreadpool",
6430 ],
6431)
6432
Marat Dukhanc068bb62019-10-04 13:24:39 -07006433xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006434 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006435 srcs = [
6436 "bench/f32-dwconv-e2e.cc",
6437 "bench/end2end.h",
6438 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006439 deps = MICROKERNEL_BENCHMARK_DEPS + [
6440 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006441 ":fp32_mobilenet_v1",
6442 ":fp32_mobilenet_v2",
6443 ":fp32_mobilenet_v3_large",
6444 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006445 ],
6446)
6447
6448xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006449 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006450 srcs = [
6451 "bench/f32-gemm-e2e.cc",
6452 "bench/end2end.h",
6453 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006454 deps = MICROKERNEL_BENCHMARK_DEPS + [
6455 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006456 ":fp32_mobilenet_v1",
6457 ":fp32_mobilenet_v2",
6458 ":fp32_mobilenet_v3_large",
6459 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006460 ],
6461)
6462
6463xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006464 name = "qs8_gemm_e2e_bench",
6465 srcs = [
6466 "bench/qs8-gemm-e2e.cc",
6467 "bench/end2end.h",
6468 ] + MICROKERNEL_BENCHMARK_HDRS,
6469 deps = MICROKERNEL_BENCHMARK_DEPS + [
6470 ":XNNPACK",
6471 ":qs8_mobilenet_v1",
6472 ":qs8_mobilenet_v2",
6473 ],
6474)
6475
6476xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006477 name = "end2end_bench",
6478 srcs = ["bench/end2end.cc"],
6479 deps = [
6480 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006481 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006482 ":fp16_mobilenet_v1",
6483 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006484 ":fp16_mobilenet_v3_large",
6485 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006486 ":fp32_mobilenet_v1",
6487 ":fp32_mobilenet_v2",
6488 ":fp32_mobilenet_v3_large",
6489 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006490 ":fp32_sparse_mobilenet_v1",
6491 ":fp32_sparse_mobilenet_v2",
6492 ":fp32_sparse_mobilenet_v3_large",
6493 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006494 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006495 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006496 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006497 "@pthreadpool",
6498 ],
6499)
6500
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006501#################### Accuracy evaluation for math functions ####################
6502
6503xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006504 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006505 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006506 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006507 "src/xnnpack/AlignedAllocator.h",
6508 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006509 deps = ACCURACY_EVAL_DEPS + [
6510 ":bench_utils",
6511 "@cpuinfo",
6512 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006513)
6514
Marat Dukhan515c9772019-10-17 18:07:57 -07006515xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006516 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006517 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006518 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006519 "src/xnnpack/AlignedAllocator.h",
6520 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006521 deps = ACCURACY_EVAL_DEPS + [
6522 ":bench_utils",
6523 "@cpuinfo",
6524 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006525)
6526
Marat Dukhan98ba4412019-10-23 02:14:28 -07006527xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006528 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006529 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006530 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006531 "src/xnnpack/AlignedAllocator.h",
6532 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006533 deps = ACCURACY_EVAL_DEPS + [
6534 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006535 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006536 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006537)
6538
6539xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006540 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006541 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006542 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006543 "src/xnnpack/AlignedAllocator.h",
6544 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006545 deps = ACCURACY_EVAL_DEPS + [
6546 ":bench_utils",
6547 "@cpuinfo",
6548 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006549)
6550
Marat Dukhanf44f0222020-12-14 11:53:27 -08006551xnnpack_benchmark(
6552 name = "f32_sigmoid_ulp_eval",
6553 srcs = [
6554 "eval/f32-sigmoid-ulp.cc",
6555 "src/xnnpack/AlignedAllocator.h",
6556 ] + ACCURACY_EVAL_HDRS,
6557 deps = ACCURACY_EVAL_DEPS + [
6558 ":bench_utils",
6559 "@cpuinfo",
6560 ],
6561)
6562
6563xnnpack_benchmark(
6564 name = "f32_sqrt_ulp_eval",
6565 srcs = [
6566 "eval/f32-sqrt-ulp.cc",
6567 "src/xnnpack/AlignedAllocator.h",
6568 ] + ACCURACY_EVAL_HDRS,
6569 deps = ACCURACY_EVAL_DEPS + [
6570 ":bench_utils",
6571 "@cpuinfo",
6572 ],
6573)
6574
6575################### Accuracy verification for math functions ##################
6576
6577xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006578 name = "f32_exp_eval",
6579 srcs = [
6580 "eval/f32-exp.cc",
6581 "src/xnnpack/AlignedAllocator.h",
6582 "src/xnnpack/math-stubs.h",
6583 ] + MICROKERNEL_TEST_HDRS,
6584 automatic = False,
6585 deps = MICROKERNEL_TEST_DEPS,
6586)
6587
6588xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006589 name = "f32_expm1minus_eval",
6590 srcs = [
6591 "eval/f32-expm1minus.cc",
6592 "src/xnnpack/AlignedAllocator.h",
6593 "src/xnnpack/math-stubs.h",
6594 ] + MICROKERNEL_TEST_HDRS,
6595 automatic = False,
6596 deps = MICROKERNEL_TEST_DEPS,
6597)
6598
Marat Dukhan8853b822020-05-07 12:19:01 -07006599xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006600 name = "f32_expminus_eval",
6601 srcs = [
6602 "eval/f32-expminus.cc",
6603 "src/xnnpack/AlignedAllocator.h",
6604 "src/xnnpack/math-stubs.h",
6605 ] + MICROKERNEL_TEST_HDRS,
6606 automatic = False,
6607 deps = MICROKERNEL_TEST_DEPS,
6608)
6609
6610xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006611 name = "f32_roundne_eval",
6612 srcs = [
6613 "eval/f32-roundne.cc",
6614 "src/xnnpack/AlignedAllocator.h",
6615 "src/xnnpack/math-stubs.h",
6616 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006617 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006618 deps = MICROKERNEL_TEST_DEPS,
6619)
6620
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006621xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006622 name = "f32_roundd_eval",
6623 srcs = [
6624 "eval/f32-roundd.cc",
6625 "src/xnnpack/AlignedAllocator.h",
6626 "src/xnnpack/math-stubs.h",
6627 ] + MICROKERNEL_TEST_HDRS,
6628 automatic = False,
6629 deps = MICROKERNEL_TEST_DEPS,
6630)
6631
6632xnnpack_unit_test(
6633 name = "f32_roundu_eval",
6634 srcs = [
6635 "eval/f32-roundu.cc",
6636 "src/xnnpack/AlignedAllocator.h",
6637 "src/xnnpack/math-stubs.h",
6638 ] + MICROKERNEL_TEST_HDRS,
6639 automatic = False,
6640 deps = MICROKERNEL_TEST_DEPS,
6641)
6642
6643xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006644 name = "f32_roundz_eval",
6645 srcs = [
6646 "eval/f32-roundz.cc",
6647 "src/xnnpack/AlignedAllocator.h",
6648 "src/xnnpack/math-stubs.h",
6649 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006650 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006651 deps = MICROKERNEL_TEST_DEPS,
6652)
6653
Marat Dukhan08c4a432019-10-03 09:29:21 -07006654######################### Unit tests for micro-kernels #########################
6655
6656xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006657 name = "f16_dwconv_minmax_test",
6658 srcs = [
6659 "test/f16-dwconv-minmax.cc",
6660 "test/dwconv-microkernel-tester.h",
6661 "src/xnnpack/AlignedAllocator.h",
6662 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6663 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6664)
6665
6666xnnpack_unit_test(
6667 name = "f16_gavgpool_minmax_test",
6668 srcs = [
6669 "test/f16-gavgpool-minmax.cc",
6670 "test/gavgpool-microkernel-tester.h",
6671 "src/xnnpack/AlignedAllocator.h",
6672 ] + MICROKERNEL_TEST_HDRS,
6673 deps = MICROKERNEL_TEST_DEPS,
6674)
6675
6676xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006677 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006678 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006679 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006680 "test/gemm-microkernel-tester.h",
6681 "src/xnnpack/AlignedAllocator.h",
6682 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006683 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006684)
6685
6686xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006687 name = "f16_igemm_minmax_test",
6688 srcs = [
6689 "test/f16-igemm-minmax.cc",
6690 "test/gemm-microkernel-tester.h",
6691 "src/xnnpack/AlignedAllocator.h",
6692 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6693 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6694)
6695
6696xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006697 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006698 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006699 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006700 "test/spmm-microkernel-tester.h",
6701 "src/xnnpack/AlignedAllocator.h",
6702 ] + MICROKERNEL_TEST_HDRS,
6703 deps = MICROKERNEL_TEST_DEPS,
6704)
6705
6706xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006707 name = "f16_vadd_minmax_test",
6708 srcs = [
6709 "test/f16-vadd-minmax.cc",
6710 "test/vbinary-microkernel-tester.h",
6711 ] + MICROKERNEL_TEST_HDRS,
6712 deps = MICROKERNEL_TEST_DEPS,
6713)
6714
6715xnnpack_unit_test(
6716 name = "f16_vaddc_minmax_test",
6717 srcs = [
6718 "test/f16-vaddc-minmax.cc",
6719 "test/vbinaryc-microkernel-tester.h",
6720 ] + MICROKERNEL_TEST_HDRS,
6721 deps = MICROKERNEL_TEST_DEPS,
6722)
6723
6724xnnpack_unit_test(
6725 name = "f16_vclamp_test",
6726 srcs = [
6727 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006728 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006729 ] + MICROKERNEL_TEST_HDRS,
6730 deps = MICROKERNEL_TEST_DEPS,
6731)
6732
6733xnnpack_unit_test(
6734 name = "f16_vdiv_minmax_test",
6735 srcs = [
6736 "test/f16-vdiv-minmax.cc",
6737 "test/vbinary-microkernel-tester.h",
6738 ] + MICROKERNEL_TEST_HDRS,
6739 deps = MICROKERNEL_TEST_DEPS,
6740)
6741
6742xnnpack_unit_test(
6743 name = "f16_vdivc_minmax_test",
6744 srcs = [
6745 "test/f16-vdivc-minmax.cc",
6746 "test/vbinaryc-microkernel-tester.h",
6747 ] + MICROKERNEL_TEST_HDRS,
6748 deps = MICROKERNEL_TEST_DEPS,
6749)
6750
6751xnnpack_unit_test(
6752 name = "f16_vrdivc_minmax_test",
6753 srcs = [
6754 "test/f16-vrdivc-minmax.cc",
6755 "test/vbinaryc-microkernel-tester.h",
6756 ] + MICROKERNEL_TEST_HDRS,
6757 deps = MICROKERNEL_TEST_DEPS,
6758)
6759
6760xnnpack_unit_test(
6761 name = "f16_vhswish_test",
6762 srcs = [
6763 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006764 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006765 ] + MICROKERNEL_TEST_HDRS,
6766 deps = MICROKERNEL_TEST_DEPS,
6767)
6768
6769xnnpack_unit_test(
6770 name = "f16_vmax_test",
6771 srcs = [
6772 "test/f16-vmax.cc",
6773 "test/vbinary-microkernel-tester.h",
6774 ] + MICROKERNEL_TEST_HDRS,
6775 deps = MICROKERNEL_TEST_DEPS,
6776)
6777
6778xnnpack_unit_test(
6779 name = "f16_vmaxc_test",
6780 srcs = [
6781 "test/f16-vmaxc.cc",
6782 "test/vbinaryc-microkernel-tester.h",
6783 ] + MICROKERNEL_TEST_HDRS,
6784 deps = MICROKERNEL_TEST_DEPS,
6785)
6786
6787xnnpack_unit_test(
6788 name = "f16_vmin_test",
6789 srcs = [
6790 "test/f16-vmin.cc",
6791 "test/vbinary-microkernel-tester.h",
6792 ] + MICROKERNEL_TEST_HDRS,
6793 deps = MICROKERNEL_TEST_DEPS,
6794)
6795
6796xnnpack_unit_test(
6797 name = "f16_vminc_test",
6798 srcs = [
6799 "test/f16-vminc.cc",
6800 "test/vbinaryc-microkernel-tester.h",
6801 ] + MICROKERNEL_TEST_HDRS,
6802 deps = MICROKERNEL_TEST_DEPS,
6803)
6804
6805xnnpack_unit_test(
6806 name = "f16_vmul_minmax_test",
6807 srcs = [
6808 "test/f16-vmul-minmax.cc",
6809 "test/vbinary-microkernel-tester.h",
6810 ] + MICROKERNEL_TEST_HDRS,
6811 deps = MICROKERNEL_TEST_DEPS,
6812)
6813
6814xnnpack_unit_test(
6815 name = "f16_vmulc_minmax_test",
6816 srcs = [
6817 "test/f16-vmulc-minmax.cc",
6818 "test/vbinaryc-microkernel-tester.h",
6819 ] + MICROKERNEL_TEST_HDRS,
6820 deps = MICROKERNEL_TEST_DEPS,
6821)
6822
6823xnnpack_unit_test(
6824 name = "f16_vmulcaddc_minmax_test",
6825 srcs = [
6826 "test/f16-vmulcaddc-minmax.cc",
6827 "test/vmulcaddc-microkernel-tester.h",
6828 "src/xnnpack/AlignedAllocator.h",
6829 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6830 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6831)
6832
6833xnnpack_unit_test(
6834 name = "f16_vsub_minmax_test",
6835 srcs = [
6836 "test/f16-vsub-minmax.cc",
6837 "test/vbinary-microkernel-tester.h",
6838 ] + MICROKERNEL_TEST_HDRS,
6839 deps = MICROKERNEL_TEST_DEPS,
6840)
6841
6842xnnpack_unit_test(
6843 name = "f16_vsubc_minmax_test",
6844 srcs = [
6845 "test/f16-vsubc-minmax.cc",
6846 "test/vbinaryc-microkernel-tester.h",
6847 ] + MICROKERNEL_TEST_HDRS,
6848 deps = MICROKERNEL_TEST_DEPS,
6849)
6850
6851xnnpack_unit_test(
6852 name = "f16_vrsubc_minmax_test",
6853 srcs = [
6854 "test/f16-vrsubc-minmax.cc",
6855 "test/vbinaryc-microkernel-tester.h",
6856 ] + MICROKERNEL_TEST_HDRS,
6857 deps = MICROKERNEL_TEST_DEPS,
6858)
6859
6860xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006861 name = "f32_argmaxpool_test",
6862 srcs = [
6863 "test/f32-argmaxpool.cc",
6864 "test/argmaxpool-microkernel-tester.h",
6865 "src/xnnpack/AlignedAllocator.h",
6866 ] + MICROKERNEL_TEST_HDRS,
6867 deps = MICROKERNEL_TEST_DEPS,
6868)
6869
6870xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006871 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006872 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006873 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006874 "test/avgpool-microkernel-tester.h",
6875 "src/xnnpack/AlignedAllocator.h",
6876 ] + MICROKERNEL_TEST_HDRS,
6877 deps = MICROKERNEL_TEST_DEPS,
6878)
6879
6880xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006881 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006882 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006883 "test/f32-ibilinear.cc",
6884 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006885 "src/xnnpack/AlignedAllocator.h",
6886 ] + MICROKERNEL_TEST_HDRS,
6887 deps = MICROKERNEL_TEST_DEPS,
6888)
6889
6890xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006891 name = "f32_ibilinear_chw_test",
6892 srcs = [
6893 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006894 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006895 "src/xnnpack/AlignedAllocator.h",
6896 ] + MICROKERNEL_TEST_HDRS,
6897 deps = MICROKERNEL_TEST_DEPS,
6898)
6899
6900xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006901 name = "f32_igemm_test",
6902 srcs = [
6903 "test/f32-igemm.cc",
6904 "test/gemm-microkernel-tester.h",
6905 "src/xnnpack/AlignedAllocator.h",
6906 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006907 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006908)
6909
6910xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006911 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006912 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006913 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006914 "test/gemm-microkernel-tester.h",
6915 "src/xnnpack/AlignedAllocator.h",
6916 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006917 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006918)
6919
6920xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006921 name = "f32_igemm_minmax_test",
6922 srcs = [
6923 "test/f32-igemm-minmax.cc",
6924 "test/gemm-microkernel-tester.h",
6925 "src/xnnpack/AlignedAllocator.h",
6926 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006927 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006928)
6929
6930xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006931 name = "f32_conv_hwc_test",
6932 srcs = [
6933 "test/f32-conv-hwc.cc",
6934 "test/conv-hwc-microkernel-tester.h",
6935 "src/xnnpack/AlignedAllocator.h",
6936 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006937 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006938)
6939
6940xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006941 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006942 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006943 "test/f32-conv-hwc2chw.cc",
6944 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006945 "src/xnnpack/AlignedAllocator.h",
6946 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006947 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006948)
6949
6950xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006951 name = "f32_dwconv_test",
6952 srcs = [
6953 "test/f32-dwconv.cc",
6954 "test/dwconv-microkernel-tester.h",
6955 "src/xnnpack/AlignedAllocator.h",
6956 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006957 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006958)
6959
6960xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006961 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006962 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006963 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006964 "test/dwconv-microkernel-tester.h",
6965 "src/xnnpack/AlignedAllocator.h",
6966 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006967 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006968)
6969
6970xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006971 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006972 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006973 "test/f32-dwconv2d-chw.cc",
6974 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006975 "src/xnnpack/AlignedAllocator.h",
6976 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006977 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006978)
6979
6980xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006981 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006982 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006983 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006984 "test/gavgpool-microkernel-tester.h",
6985 "src/xnnpack/AlignedAllocator.h",
6986 ] + MICROKERNEL_TEST_HDRS,
6987 deps = MICROKERNEL_TEST_DEPS,
6988)
6989
6990xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006991 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006992 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006993 "test/f32-gavgpool-cw.cc",
6994 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006995 "src/xnnpack/AlignedAllocator.h",
6996 ] + MICROKERNEL_TEST_HDRS,
6997 deps = MICROKERNEL_TEST_DEPS,
6998)
6999
7000xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007001 name = "f32_gemm_test",
7002 srcs = [
7003 "test/f32-gemm.cc",
7004 "test/gemm-microkernel-tester.h",
7005 "src/xnnpack/AlignedAllocator.h",
7006 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007007 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007008)
7009
7010xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007011 name = "f32_gemm_relu_test",
7012 srcs = [
7013 "test/f32-gemm-relu.cc",
7014 "test/gemm-microkernel-tester.h",
7015 "src/xnnpack/AlignedAllocator.h",
7016 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007017 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007018)
7019
7020xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007021 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007022 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007023 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007024 "test/gemm-microkernel-tester.h",
7025 "src/xnnpack/AlignedAllocator.h",
7026 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007027 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007028)
7029
7030xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007031 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007032 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007033 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007034 "test/gemm-microkernel-tester.h",
7035 "src/xnnpack/AlignedAllocator.h",
7036 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007037 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007038)
7039
7040xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007041 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007042 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007043 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007044 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007045 ] + MICROKERNEL_TEST_HDRS,
7046 deps = MICROKERNEL_TEST_DEPS,
7047)
7048
7049xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007050 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007051 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007052 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007053 "test/maxpool-microkernel-tester.h",
7054 ] + MICROKERNEL_TEST_HDRS,
7055 deps = MICROKERNEL_TEST_DEPS,
7056)
7057
7058xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007059 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007060 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007061 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007062 "test/avgpool-microkernel-tester.h",
7063 "src/xnnpack/AlignedAllocator.h",
7064 ] + MICROKERNEL_TEST_HDRS,
7065 deps = MICROKERNEL_TEST_DEPS,
7066)
7067
7068xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007069 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007070 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007071 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007072 "test/gemm-microkernel-tester.h",
7073 "src/xnnpack/AlignedAllocator.h",
7074 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007075 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007076)
7077
7078xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007079 name = "f16_prelu_test",
7080 srcs = [
7081 "test/f16-prelu.cc",
7082 "test/prelu-microkernel-tester.h",
7083 "src/xnnpack/AlignedAllocator.h",
7084 ] + MICROKERNEL_TEST_HDRS,
7085 deps = MICROKERNEL_TEST_DEPS,
7086)
7087
7088xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007089 name = "f32_prelu_test",
7090 srcs = [
7091 "test/f32-prelu.cc",
7092 "test/prelu-microkernel-tester.h",
7093 "src/xnnpack/AlignedAllocator.h",
7094 ] + MICROKERNEL_TEST_HDRS,
7095 deps = MICROKERNEL_TEST_DEPS,
7096)
7097
7098xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007099 name = "f32_raddexpminusmax_test",
7100 srcs = [
7101 "test/f32-raddexpminusmax.cc",
7102 "test/raddexpminusmax-microkernel-tester.h",
7103 ] + MICROKERNEL_TEST_HDRS,
7104 deps = MICROKERNEL_TEST_DEPS,
7105)
7106
7107xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007108 name = "f32_raddextexp_test",
7109 srcs = [
7110 "test/f32-raddextexp.cc",
7111 "test/raddextexp-microkernel-tester.h",
7112 ] + MICROKERNEL_TEST_HDRS,
7113 deps = MICROKERNEL_TEST_DEPS,
7114)
7115
7116xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007117 name = "f32_raddstoreexpminusmax_test",
7118 srcs = [
7119 "test/f32-raddstoreexpminusmax.cc",
7120 "test/raddstoreexpminusmax-microkernel-tester.h",
7121 ] + MICROKERNEL_TEST_HDRS,
7122 deps = MICROKERNEL_TEST_DEPS,
7123)
7124
7125xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007126 name = "f32_rmax_test",
7127 srcs = [
7128 "test/f32-rmax.cc",
7129 "test/rmax-microkernel-tester.h",
7130 ] + MICROKERNEL_TEST_HDRS,
7131 deps = MICROKERNEL_TEST_DEPS,
7132)
7133
7134xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007135 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007136 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007137 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007138 "test/spmm-microkernel-tester.h",
7139 "src/xnnpack/AlignedAllocator.h",
7140 ] + MICROKERNEL_TEST_HDRS,
7141 deps = MICROKERNEL_TEST_DEPS,
7142)
7143
7144xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007145 name = "f32_vabs_test",
7146 srcs = [
7147 "test/f32-vabs.cc",
7148 "test/vunary-microkernel-tester.h",
7149 ] + MICROKERNEL_TEST_HDRS,
7150 deps = MICROKERNEL_TEST_DEPS,
7151)
7152
7153xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007154 name = "f32_vadd_test",
7155 srcs = [
7156 "test/f32-vadd.cc",
7157 "test/vbinary-microkernel-tester.h",
7158 ] + MICROKERNEL_TEST_HDRS,
7159 deps = MICROKERNEL_TEST_DEPS,
7160)
7161
7162xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007163 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007164 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007165 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007166 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007167 ] + MICROKERNEL_TEST_HDRS,
7168 deps = MICROKERNEL_TEST_DEPS,
7169)
7170
7171xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007172 name = "f32_vadd_relu_test",
7173 srcs = [
7174 "test/f32-vadd-relu.cc",
7175 "test/vbinary-microkernel-tester.h",
7176 ] + MICROKERNEL_TEST_HDRS,
7177 deps = MICROKERNEL_TEST_DEPS,
7178)
7179
7180xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007181 name = "f32_vaddc_test",
7182 srcs = [
7183 "test/f32-vaddc.cc",
7184 "test/vbinaryc-microkernel-tester.h",
7185 ] + MICROKERNEL_TEST_HDRS,
7186 deps = MICROKERNEL_TEST_DEPS,
7187)
7188
7189xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007190 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007191 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007192 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007193 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007194 ] + MICROKERNEL_TEST_HDRS,
7195 deps = MICROKERNEL_TEST_DEPS,
7196)
7197
7198xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007199 name = "f32_vaddc_relu_test",
7200 srcs = [
7201 "test/f32-vaddc-relu.cc",
7202 "test/vbinaryc-microkernel-tester.h",
7203 ] + MICROKERNEL_TEST_HDRS,
7204 deps = MICROKERNEL_TEST_DEPS,
7205)
7206
7207xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007208 name = "f32_vclamp_test",
7209 srcs = [
7210 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007211 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007212 ] + MICROKERNEL_TEST_HDRS,
7213 deps = MICROKERNEL_TEST_DEPS,
7214)
7215
7216xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007217 name = "f32_vdiv_test",
7218 srcs = [
7219 "test/f32-vdiv.cc",
7220 "test/vbinary-microkernel-tester.h",
7221 ] + MICROKERNEL_TEST_HDRS,
7222 deps = MICROKERNEL_TEST_DEPS,
7223)
7224
7225xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007226 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007227 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007228 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007229 "test/vbinary-microkernel-tester.h",
7230 ] + MICROKERNEL_TEST_HDRS,
7231 deps = MICROKERNEL_TEST_DEPS,
7232)
7233
7234xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007235 name = "f32_vdiv_relu_test",
7236 srcs = [
7237 "test/f32-vdiv-relu.cc",
7238 "test/vbinary-microkernel-tester.h",
7239 ] + MICROKERNEL_TEST_HDRS,
7240 deps = MICROKERNEL_TEST_DEPS,
7241)
7242
7243xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007244 name = "f32_vdivc_test",
7245 srcs = [
7246 "test/f32-vdivc.cc",
7247 "test/vbinaryc-microkernel-tester.h",
7248 ] + MICROKERNEL_TEST_HDRS,
7249 deps = MICROKERNEL_TEST_DEPS,
7250)
7251
7252xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007253 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007254 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007255 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007256 "test/vbinaryc-microkernel-tester.h",
7257 ] + MICROKERNEL_TEST_HDRS,
7258 deps = MICROKERNEL_TEST_DEPS,
7259)
7260
7261xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007262 name = "f32_vdivc_relu_test",
7263 srcs = [
7264 "test/f32-vdivc-relu.cc",
7265 "test/vbinaryc-microkernel-tester.h",
7266 ] + MICROKERNEL_TEST_HDRS,
7267 deps = MICROKERNEL_TEST_DEPS,
7268)
7269
7270xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007271 name = "f32_vrdivc_test",
7272 srcs = [
7273 "test/f32-vrdivc.cc",
7274 "test/vbinaryc-microkernel-tester.h",
7275 ] + MICROKERNEL_TEST_HDRS,
7276 deps = MICROKERNEL_TEST_DEPS,
7277)
7278
7279xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007280 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007281 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007282 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007283 "test/vbinaryc-microkernel-tester.h",
7284 ] + MICROKERNEL_TEST_HDRS,
7285 deps = MICROKERNEL_TEST_DEPS,
7286)
7287
7288xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007289 name = "f32_vrdivc_relu_test",
7290 srcs = [
7291 "test/f32-vrdivc-relu.cc",
7292 "test/vbinaryc-microkernel-tester.h",
7293 ] + MICROKERNEL_TEST_HDRS,
7294 deps = MICROKERNEL_TEST_DEPS,
7295)
7296
7297xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007298 name = "f32_velu_test",
7299 srcs = [
7300 "test/f32-velu.cc",
7301 "test/vunary-microkernel-tester.h",
7302 ] + MICROKERNEL_TEST_HDRS,
7303 deps = MICROKERNEL_TEST_DEPS,
7304)
7305
7306xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007307 name = "f32_vmax_test",
7308 srcs = [
7309 "test/f32-vmax.cc",
7310 "test/vbinary-microkernel-tester.h",
7311 ] + MICROKERNEL_TEST_HDRS,
7312 deps = MICROKERNEL_TEST_DEPS,
7313)
7314
7315xnnpack_unit_test(
7316 name = "f32_vmaxc_test",
7317 srcs = [
7318 "test/f32-vmaxc.cc",
7319 "test/vbinaryc-microkernel-tester.h",
7320 ] + MICROKERNEL_TEST_HDRS,
7321 deps = MICROKERNEL_TEST_DEPS,
7322)
7323
7324xnnpack_unit_test(
7325 name = "f32_vmin_test",
7326 srcs = [
7327 "test/f32-vmin.cc",
7328 "test/vbinary-microkernel-tester.h",
7329 ] + MICROKERNEL_TEST_HDRS,
7330 deps = MICROKERNEL_TEST_DEPS,
7331)
7332
7333xnnpack_unit_test(
7334 name = "f32_vminc_test",
7335 srcs = [
7336 "test/f32-vminc.cc",
7337 "test/vbinaryc-microkernel-tester.h",
7338 ] + MICROKERNEL_TEST_HDRS,
7339 deps = MICROKERNEL_TEST_DEPS,
7340)
7341
7342xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007343 name = "f32_vmul_test",
7344 srcs = [
7345 "test/f32-vmul.cc",
7346 "test/vbinary-microkernel-tester.h",
7347 ] + MICROKERNEL_TEST_HDRS,
7348 deps = MICROKERNEL_TEST_DEPS,
7349)
7350
7351xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007352 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007353 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007354 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007355 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007356 ] + MICROKERNEL_TEST_HDRS,
7357 deps = MICROKERNEL_TEST_DEPS,
7358)
7359
7360xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007361 name = "f32_vmul_relu_test",
7362 srcs = [
7363 "test/f32-vmul-relu.cc",
7364 "test/vbinary-microkernel-tester.h",
7365 ] + MICROKERNEL_TEST_HDRS,
7366 deps = MICROKERNEL_TEST_DEPS,
7367)
7368
7369xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007370 name = "f32_vmulc_test",
7371 srcs = [
7372 "test/f32-vmulc.cc",
7373 "test/vbinaryc-microkernel-tester.h",
7374 ] + MICROKERNEL_TEST_HDRS,
7375 deps = MICROKERNEL_TEST_DEPS,
7376)
7377
7378xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007379 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007380 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007381 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007382 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007383 ] + MICROKERNEL_TEST_HDRS,
7384 deps = MICROKERNEL_TEST_DEPS,
7385)
7386
7387xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007388 name = "f32_vmulc_relu_test",
7389 srcs = [
7390 "test/f32-vmulc-relu.cc",
7391 "test/vbinaryc-microkernel-tester.h",
7392 ] + MICROKERNEL_TEST_HDRS,
7393 deps = MICROKERNEL_TEST_DEPS,
7394)
7395
7396xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007397 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007398 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007399 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007400 "test/vmulcaddc-microkernel-tester.h",
7401 "src/xnnpack/AlignedAllocator.h",
7402 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007403 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007404)
7405
7406xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007407 name = "f32_vlrelu_test",
7408 srcs = [
7409 "test/f32-vlrelu.cc",
7410 "test/vunary-microkernel-tester.h",
7411 ] + MICROKERNEL_TEST_HDRS,
7412 deps = MICROKERNEL_TEST_DEPS,
7413)
7414
7415xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007416 name = "f32_vneg_test",
7417 srcs = [
7418 "test/f32-vneg.cc",
7419 "test/vunary-microkernel-tester.h",
7420 ] + MICROKERNEL_TEST_HDRS,
7421 deps = MICROKERNEL_TEST_DEPS,
7422)
7423
7424xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007425 name = "f32_vrelu_test",
7426 srcs = [
7427 "test/f32-vrelu.cc",
7428 "test/vunary-microkernel-tester.h",
7429 ] + MICROKERNEL_TEST_HDRS,
7430 deps = MICROKERNEL_TEST_DEPS,
7431)
7432
7433xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007434 name = "f32_vrndne_test",
7435 srcs = [
7436 "test/f32-vrndne.cc",
7437 "test/vunary-microkernel-tester.h",
7438 ] + MICROKERNEL_TEST_HDRS,
7439 deps = MICROKERNEL_TEST_DEPS,
7440)
7441
7442xnnpack_unit_test(
7443 name = "f32_vrndz_test",
7444 srcs = [
7445 "test/f32-vrndz.cc",
7446 "test/vunary-microkernel-tester.h",
7447 ] + MICROKERNEL_TEST_HDRS,
7448 deps = MICROKERNEL_TEST_DEPS,
7449)
7450
7451xnnpack_unit_test(
7452 name = "f32_vrndu_test",
7453 srcs = [
7454 "test/f32-vrndu.cc",
7455 "test/vunary-microkernel-tester.h",
7456 ] + MICROKERNEL_TEST_HDRS,
7457 deps = MICROKERNEL_TEST_DEPS,
7458)
7459
7460xnnpack_unit_test(
7461 name = "f32_vrndd_test",
7462 srcs = [
7463 "test/f32-vrndd.cc",
7464 "test/vunary-microkernel-tester.h",
7465 ] + MICROKERNEL_TEST_HDRS,
7466 deps = MICROKERNEL_TEST_DEPS,
7467)
7468
7469xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007470 name = "f32_vscale_test",
7471 srcs = [
7472 "test/f32-vscale.cc",
7473 "test/vscale-microkernel-tester.h",
7474 ] + MICROKERNEL_TEST_HDRS,
7475 deps = MICROKERNEL_TEST_DEPS,
7476)
7477
7478xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007479 name = "f32_vscaleexpminusmax_test",
7480 srcs = [
7481 "test/f32-vscaleexpminusmax.cc",
7482 "test/vscaleexpminusmax-microkernel-tester.h",
7483 ] + MICROKERNEL_TEST_HDRS,
7484 deps = MICROKERNEL_TEST_DEPS,
7485)
7486
7487xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007488 name = "f32_vscaleextexp_test",
7489 srcs = [
7490 "test/f32-vscaleextexp.cc",
7491 "test/vscaleextexp-microkernel-tester.h",
7492 ] + MICROKERNEL_TEST_HDRS,
7493 deps = MICROKERNEL_TEST_DEPS,
7494)
7495
7496xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007497 name = "f32_vsigmoid_test",
7498 srcs = [
7499 "test/f32-vsigmoid.cc",
7500 "test/vunary-microkernel-tester.h",
7501 ] + MICROKERNEL_TEST_HDRS,
7502 deps = MICROKERNEL_TEST_DEPS,
7503)
7504
7505xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007506 name = "f32_vsqr_test",
7507 srcs = [
7508 "test/f32-vsqr.cc",
7509 "test/vunary-microkernel-tester.h",
7510 ] + MICROKERNEL_TEST_HDRS,
7511 deps = MICROKERNEL_TEST_DEPS,
7512)
7513
7514xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007515 name = "f32_vsqrdiff_test",
7516 srcs = [
7517 "test/f32-vsqrdiff.cc",
7518 "test/vbinary-microkernel-tester.h",
7519 ] + MICROKERNEL_TEST_HDRS,
7520 deps = MICROKERNEL_TEST_DEPS,
7521)
7522
7523xnnpack_unit_test(
7524 name = "f32_vsqrdiffc_test",
7525 srcs = [
7526 "test/f32-vsqrdiffc.cc",
7527 "test/vbinaryc-microkernel-tester.h",
7528 ] + MICROKERNEL_TEST_HDRS,
7529 deps = MICROKERNEL_TEST_DEPS,
7530)
7531
7532xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007533 name = "f32_vsqrt_test",
7534 srcs = [
7535 "test/f32-vsqrt.cc",
7536 "test/vunary-microkernel-tester.h",
7537 ] + MICROKERNEL_TEST_HDRS,
7538 deps = MICROKERNEL_TEST_DEPS,
7539)
7540
7541xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007542 name = "f32_vsub_test",
7543 srcs = [
7544 "test/f32-vsub.cc",
7545 "test/vbinary-microkernel-tester.h",
7546 ] + MICROKERNEL_TEST_HDRS,
7547 deps = MICROKERNEL_TEST_DEPS,
7548)
7549
7550xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007551 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007552 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007553 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007554 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007555 ] + MICROKERNEL_TEST_HDRS,
7556 deps = MICROKERNEL_TEST_DEPS,
7557)
7558
7559xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007560 name = "f32_vsub_relu_test",
7561 srcs = [
7562 "test/f32-vsub-relu.cc",
7563 "test/vbinary-microkernel-tester.h",
7564 ] + MICROKERNEL_TEST_HDRS,
7565 deps = MICROKERNEL_TEST_DEPS,
7566)
7567
7568xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007569 name = "f32_vsubc_test",
7570 srcs = [
7571 "test/f32-vsubc.cc",
7572 "test/vbinaryc-microkernel-tester.h",
7573 ] + MICROKERNEL_TEST_HDRS,
7574 deps = MICROKERNEL_TEST_DEPS,
7575)
7576
7577xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007578 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007579 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007580 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007581 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007582 ] + MICROKERNEL_TEST_HDRS,
7583 deps = MICROKERNEL_TEST_DEPS,
7584)
7585
7586xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007587 name = "f32_vsubc_relu_test",
7588 srcs = [
7589 "test/f32-vsubc-relu.cc",
7590 "test/vbinaryc-microkernel-tester.h",
7591 ] + MICROKERNEL_TEST_HDRS,
7592 deps = MICROKERNEL_TEST_DEPS,
7593)
7594
7595xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007596 name = "f32_vrsubc_test",
7597 srcs = [
7598 "test/f32-vrsubc.cc",
7599 "test/vbinaryc-microkernel-tester.h",
7600 ] + MICROKERNEL_TEST_HDRS,
7601 deps = MICROKERNEL_TEST_DEPS,
7602)
7603
7604xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007605 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007606 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007607 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007608 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007609 ] + MICROKERNEL_TEST_HDRS,
7610 deps = MICROKERNEL_TEST_DEPS,
7611)
7612
7613xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007614 name = "f32_vrsubc_relu_test",
7615 srcs = [
7616 "test/f32-vrsubc-relu.cc",
7617 "test/vbinaryc-microkernel-tester.h",
7618 ] + MICROKERNEL_TEST_HDRS,
7619 deps = MICROKERNEL_TEST_DEPS,
7620)
7621
7622xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007623 name = "qc8_dwconv_minmax_fp32_test",
7624 timeout = "moderate",
7625 srcs = [
7626 "test/qc8-dwconv-minmax-fp32.cc",
7627 "test/dwconv-microkernel-tester.h",
7628 "src/xnnpack/AlignedAllocator.h",
7629 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7630 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7631)
7632
7633xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007634 name = "qc8_gemm_minmax_fp32_test",
7635 timeout = "moderate",
7636 srcs = [
7637 "test/qc8-gemm-minmax-fp32.cc",
7638 "test/gemm-microkernel-tester.h",
7639 "src/xnnpack/AlignedAllocator.h",
7640 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7641 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7642)
7643
7644xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007645 name = "qc8_igemm_minmax_fp32_test",
7646 timeout = "moderate",
7647 srcs = [
7648 "test/qc8-igemm-minmax-fp32.cc",
7649 "test/gemm-microkernel-tester.h",
7650 "src/xnnpack/AlignedAllocator.h",
7651 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7652 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7653)
7654
7655xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007656 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007657 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007658 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007659 "test/dwconv-microkernel-tester.h",
7660 "src/xnnpack/AlignedAllocator.h",
7661 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7662 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7663)
7664
7665xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007666 name = "qs8_dwconv_minmax_fp32_test",
7667 srcs = [
7668 "test/qs8-dwconv-minmax-fp32.cc",
7669 "test/dwconv-microkernel-tester.h",
7670 "src/xnnpack/AlignedAllocator.h",
7671 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7672 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7673)
7674
7675xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007676 name = "qs8_gavgpool_minmax_test",
7677 srcs = [
7678 "test/qs8-gavgpool-minmax.cc",
7679 "test/gavgpool-microkernel-tester.h",
7680 "src/xnnpack/AlignedAllocator.h",
7681 ] + MICROKERNEL_TEST_HDRS,
7682 deps = MICROKERNEL_TEST_DEPS,
7683)
7684
7685xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007686 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007687 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007688 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007689 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007690 "test/gemm-microkernel-tester.h",
7691 "src/xnnpack/AlignedAllocator.h",
7692 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7693 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7694)
7695
7696xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007697 name = "qs8_gemm_minmax_fp32_test",
7698 timeout = "moderate",
7699 srcs = [
7700 "test/qs8-gemm-minmax-fp32.cc",
7701 "test/gemm-microkernel-tester.h",
7702 "src/xnnpack/AlignedAllocator.h",
7703 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7704 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7705)
7706
7707xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007708 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007709 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007710 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007711 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007712 "test/gemm-microkernel-tester.h",
7713 "src/xnnpack/AlignedAllocator.h",
7714 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7715 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7716)
7717
7718xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007719 name = "qs8_igemm_minmax_fp32_test",
7720 timeout = "moderate",
7721 srcs = [
7722 "test/qs8-igemm-minmax-fp32.cc",
7723 "test/gemm-microkernel-tester.h",
7724 "src/xnnpack/AlignedAllocator.h",
7725 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7726 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7727)
7728
7729xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007730 name = "qs8_requantization_test",
7731 srcs = [
7732 "src/xnnpack/requantization-stubs.h",
7733 "test/qs8-requantization.cc",
7734 "test/requantization-tester.h",
7735 ] + MICROKERNEL_TEST_HDRS,
7736 deps = MICROKERNEL_TEST_DEPS,
7737)
7738
7739xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007740 name = "qs8_vadd_minmax_test",
7741 srcs = [
7742 "test/qs8-vadd-minmax.cc",
7743 "test/vadd-microkernel-tester.h",
7744 ] + MICROKERNEL_TEST_HDRS,
7745 deps = MICROKERNEL_TEST_DEPS,
7746)
7747
7748xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007749 name = "qs8_vaddc_minmax_test",
7750 srcs = [
7751 "test/qs8-vaddc-minmax.cc",
7752 "test/vaddc-microkernel-tester.h",
7753 ] + MICROKERNEL_TEST_HDRS,
7754 deps = MICROKERNEL_TEST_DEPS,
7755)
7756
7757xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007758 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007759 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007760 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007761 "test/avgpool-microkernel-tester.h",
7762 "src/xnnpack/AlignedAllocator.h",
7763 ] + MICROKERNEL_TEST_HDRS,
7764 deps = MICROKERNEL_TEST_DEPS,
7765)
7766
7767xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07007768 name = "qu8_dwconv_minmax_fp32_test",
7769 srcs = [
7770 "test/qu8-dwconv-minmax-fp32.cc",
7771 "test/dwconv-microkernel-tester.h",
7772 "src/xnnpack/AlignedAllocator.h",
7773 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7774 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7775)
7776
7777xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007778 name = "qu8_dwconv_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007779 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007780 "test/qu8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007781 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007782 "src/xnnpack/AlignedAllocator.h",
7783 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007784 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007785)
7786
7787xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007788 name = "qu8_igemm_minmax_fp32_test",
7789 srcs = [
7790 "test/qu8-igemm-minmax-fp32.cc",
7791 "test/gemm-microkernel-tester.h",
7792 "src/xnnpack/AlignedAllocator.h",
7793 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7794 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7795)
7796
7797xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007798 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007799 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007800 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007801 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007802 "src/xnnpack/AlignedAllocator.h",
7803 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007804 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007805)
7806
7807xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007808 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007809 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007810 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007811 "test/gavgpool-microkernel-tester.h",
7812 "src/xnnpack/AlignedAllocator.h",
7813 ] + MICROKERNEL_TEST_HDRS,
7814 deps = MICROKERNEL_TEST_DEPS,
7815)
7816
7817xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007818 name = "qu8_gemm_minmax_fp32_test",
7819 srcs = [
7820 "test/qu8-gemm-minmax-fp32.cc",
7821 "test/gemm-microkernel-tester.h",
7822 "src/xnnpack/AlignedAllocator.h",
7823 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7824 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7825)
7826
7827xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007828 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007829 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007830 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007831 "test/gemm-microkernel-tester.h",
7832 "src/xnnpack/AlignedAllocator.h",
7833 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007834 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007835)
7836
7837xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007838 name = "qu8_requantization_test",
7839 srcs = [
7840 "src/xnnpack/requantization-stubs.h",
7841 "test/qu8-requantization.cc",
7842 "test/requantization-tester.h",
7843 ] + MICROKERNEL_TEST_HDRS,
7844 deps = MICROKERNEL_TEST_DEPS,
7845)
7846
7847xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007848 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007849 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007850 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007851 "test/vadd-microkernel-tester.h",
7852 ] + MICROKERNEL_TEST_HDRS,
7853 deps = MICROKERNEL_TEST_DEPS,
7854)
7855
7856xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007857 name = "u8_lut32norm_test",
7858 srcs = [
7859 "test/u8-lut32norm.cc",
7860 "test/lut-norm-microkernel-tester.h",
7861 ] + MICROKERNEL_TEST_HDRS,
7862 deps = MICROKERNEL_TEST_DEPS,
7863)
7864
7865xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007866 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007867 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007868 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007869 "test/maxpool-microkernel-tester.h",
7870 ] + MICROKERNEL_TEST_HDRS,
7871 deps = MICROKERNEL_TEST_DEPS,
7872)
7873
7874xnnpack_unit_test(
7875 name = "u8_rmax_test",
7876 srcs = [
7877 "test/u8-rmax.cc",
7878 "test/rmax-microkernel-tester.h",
7879 ] + MICROKERNEL_TEST_HDRS,
7880 deps = MICROKERNEL_TEST_DEPS,
7881)
7882
7883xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007884 name = "u8_vclamp_test",
7885 srcs = [
7886 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007887 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007888 ] + MICROKERNEL_TEST_HDRS,
7889 deps = MICROKERNEL_TEST_DEPS,
7890)
7891
7892xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007893 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007894 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007895 "test/x32-depthtospace2d-chw2hwc.cc",
7896 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007897 ] + MICROKERNEL_TEST_HDRS,
7898 deps = MICROKERNEL_TEST_DEPS,
7899)
7900
7901xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007902 name = "x32_fill_test",
7903 srcs = [
7904 "test/x32-fill.cc",
7905 "test/fill-microkernel-tester.h",
7906 ] + MICROKERNEL_TEST_HDRS,
7907 deps = MICROKERNEL_TEST_DEPS,
7908)
7909
7910xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007911 name = "x32_packx_test",
7912 srcs = [
7913 "test/x32-packx.cc",
7914 "test/pack-microkernel-tester.h",
7915 "src/xnnpack/AlignedAllocator.h",
7916 ] + MICROKERNEL_TEST_HDRS,
7917 deps = MICROKERNEL_TEST_DEPS,
7918)
7919
7920xnnpack_unit_test(
7921 name = "x32_pad_test",
7922 srcs = [
7923 "test/x32-pad.cc",
7924 "test/pad-microkernel-tester.h",
7925 ] + MICROKERNEL_TEST_HDRS,
7926 deps = MICROKERNEL_TEST_DEPS,
7927)
7928
7929xnnpack_unit_test(
7930 name = "x32_unpool_test",
7931 srcs = [
7932 "test/x32-unpool.cc",
7933 "test/unpool-microkernel-tester.h",
7934 ] + MICROKERNEL_TEST_HDRS,
7935 deps = MICROKERNEL_TEST_DEPS,
7936)
7937
7938xnnpack_unit_test(
7939 name = "x32_zip_test",
7940 srcs = [
7941 "test/x32-zip.cc",
7942 "test/zip-microkernel-tester.h",
7943 ] + MICROKERNEL_TEST_HDRS,
7944 deps = MICROKERNEL_TEST_DEPS,
7945)
7946
7947xnnpack_unit_test(
7948 name = "x8_lut_test",
7949 srcs = [
7950 "test/x8-lut.cc",
7951 "test/lut-microkernel-tester.h",
7952 ] + MICROKERNEL_TEST_HDRS,
7953 deps = MICROKERNEL_TEST_DEPS,
7954)
7955
7956xnnpack_unit_test(
7957 name = "x8_zip_test",
7958 srcs = [
7959 "test/x8-zip.cc",
7960 "test/zip-microkernel-tester.h",
7961 ] + MICROKERNEL_TEST_HDRS,
7962 deps = MICROKERNEL_TEST_DEPS,
7963)
7964
Marat Dukhan20c3b922020-03-10 03:45:06 -07007965########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007966
7967xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007968 name = "operator_size_test",
7969 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007970 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007971)
7972
Marat Dukhan20c3b922020-03-10 03:45:06 -07007973xnnpack_binary(
7974 name = "subgraph_size_test",
7975 srcs = ["test/subgraph-size.c"],
7976 deps = [":XNNPACK"],
7977)
7978
7979########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007980
7981xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007982 name = "abs_nc_test",
7983 srcs = [
7984 "test/abs-nc.cc",
7985 "test/abs-operator-tester.h",
7986 ],
7987 deps = OPERATOR_TEST_DEPS,
7988)
7989
7990xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007991 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007992 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007993 srcs = [
7994 "test/add-nd.cc",
7995 "test/binary-elementwise-operator-tester.h",
7996 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007997 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007998)
7999
8000xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008001 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008002 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008003 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008004 "test/argmax-pooling-operator-tester.h",
8005 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008006 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008007)
8008
8009xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008010 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008011 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008012 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008013 "test/average-pooling-operator-tester.h",
8014 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008015 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008016)
8017
8018xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008019 name = "bankers_rounding_nc_test",
8020 srcs = [
8021 "test/bankers-rounding-nc.cc",
8022 "test/bankers-rounding-operator-tester.h",
8023 ],
8024 deps = OPERATOR_TEST_DEPS,
8025)
8026
8027xnnpack_unit_test(
8028 name = "ceiling_nc_test",
8029 srcs = [
8030 "test/ceiling-nc.cc",
8031 "test/ceiling-operator-tester.h",
8032 ],
8033 deps = OPERATOR_TEST_DEPS,
8034)
8035
8036xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008037 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008038 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008039 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008040 "test/channel-shuffle-operator-tester.h",
8041 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008042 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008043)
8044
8045xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008046 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008047 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008048 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008049 "test/clamp-operator-tester.h",
8050 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008051 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008052)
8053
8054xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008055 name = "constant_pad_nd_test",
8056 srcs = [
8057 "test/constant-pad-nd.cc",
8058 "test/constant-pad-operator-tester.h",
8059 ],
8060 deps = OPERATOR_TEST_DEPS,
8061)
8062
8063xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008064 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008065 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008066 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008067 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008068 "test/convolution-operator-tester.h",
8069 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008070 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008071)
8072
8073xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008074 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008075 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008076 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008077 "test/convolution-nchw.cc",
8078 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008079 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008080 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008081)
8082
8083xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008084 name = "copy_nc_test",
8085 srcs = [
8086 "test/copy-nc.cc",
8087 "test/copy-operator-tester.h",
8088 ],
8089 deps = OPERATOR_TEST_DEPS,
8090)
8091
8092xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008093 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008094 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008095 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008096 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008097 "test/deconvolution-operator-tester.h",
8098 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008099 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008100)
8101
8102xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008103 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008104 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008105 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008106 "test/depth-to-space-operator-tester.h",
8107 ] + OPERATOR_TEST_PARAMS_HDRS,
8108 deps = OPERATOR_TEST_DEPS,
8109)
8110
8111xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008112 name = "depth_to_space_nhwc_test",
8113 srcs = [
8114 "test/depth-to-space-nhwc.cc",
8115 "test/depth-to-space-operator-tester.h",
8116 ] + OPERATOR_TEST_PARAMS_HDRS,
8117 deps = OPERATOR_TEST_DEPS,
8118)
8119
8120xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008121 name = "divide_nd_test",
8122 srcs = [
8123 "test/binary-elementwise-operator-tester.h",
8124 "test/divide-nd.cc",
8125 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008126 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008127)
8128
8129xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008130 name = "elu_nc_test",
8131 srcs = [
8132 "test/elu-nc.cc",
8133 "test/elu-operator-tester.h",
8134 ],
8135 deps = OPERATOR_TEST_DEPS,
8136)
8137
8138xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008139 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008140 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008141 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008142 "test/fully-connected-operator-tester.h",
8143 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008144 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008145)
8146
8147xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008148 name = "floor_nc_test",
8149 srcs = [
8150 "test/floor-nc.cc",
8151 "test/floor-operator-tester.h",
8152 ],
8153 deps = OPERATOR_TEST_DEPS,
8154)
8155
8156xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008157 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008158 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008159 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008160 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008161 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008162 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008163)
8164
8165xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008166 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008167 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008168 "test/global-average-pooling-ncw.cc",
8169 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008170 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008171 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008172)
8173
8174xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008175 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008176 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008177 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008178 "test/hardswish-operator-tester.h",
8179 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008180 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008181)
8182
8183xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008184 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008185 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008186 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008187 "test/leaky-relu-operator-tester.h",
8188 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008189 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008190)
8191
8192xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008193 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008194 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008195 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008196 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008197 "test/max-pooling-operator-tester.h",
8198 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008199 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008200)
8201
8202xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008203 name = "maximum_nd_test",
8204 srcs = [
8205 "test/binary-elementwise-operator-tester.h",
8206 "test/maximum-nd.cc",
8207 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008208 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008209)
8210
8211xnnpack_unit_test(
8212 name = "minimum_nd_test",
8213 srcs = [
8214 "test/binary-elementwise-operator-tester.h",
8215 "test/minimum-nd.cc",
8216 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008217 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008218)
8219
8220xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008221 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008222 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008223 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008224 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008225 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008226 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008227)
8228
8229xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008230 name = "negate_nc_test",
8231 srcs = [
8232 "test/negate-nc.cc",
8233 "test/negate-operator-tester.h",
8234 ],
8235 deps = OPERATOR_TEST_DEPS,
8236)
8237
8238xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008239 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008240 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008241 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008242 "test/prelu-operator-tester.h",
8243 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008244 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008245)
8246
8247xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008248 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008249 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008250 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008251 "test/resize-bilinear-operator-tester.h",
8252 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008253 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008254)
8255
8256xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008257 name = "resize_bilinear_nchw_test",
8258 srcs = [
8259 "test/resize-bilinear-nchw.cc",
8260 "test/resize-bilinear-operator-tester.h",
8261 ] + OPERATOR_TEST_PARAMS_HDRS,
8262 deps = OPERATOR_TEST_DEPS,
8263)
8264
8265xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008266 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008267 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008268 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008269 "test/sigmoid-operator-tester.h",
8270 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008271 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008272)
8273
8274xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008275 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008276 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008277 "test/softmax-nc.cc",
8278 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008279 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008280 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008281)
8282
8283xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008284 name = "square_nc_test",
8285 srcs = [
8286 "test/square-nc.cc",
8287 "test/square-operator-tester.h",
8288 ],
8289 deps = OPERATOR_TEST_DEPS,
8290)
8291
8292xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008293 name = "square_root_nc_test",
8294 srcs = [
8295 "test/square-root-nc.cc",
8296 "test/square-root-operator-tester.h",
8297 ],
8298 deps = OPERATOR_TEST_DEPS,
8299)
8300
8301xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008302 name = "squared_difference_nd_test",
8303 srcs = [
8304 "test/binary-elementwise-operator-tester.h",
8305 "test/squared-difference-nd.cc",
8306 ],
8307 deps = OPERATOR_TEST_DEPS,
8308)
8309
8310xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008311 name = "subtract_nd_test",
8312 srcs = [
8313 "test/binary-elementwise-operator-tester.h",
8314 "test/subtract-nd.cc",
8315 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008316 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008317)
8318
8319xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008320 name = "truncation_nc_test",
8321 srcs = [
8322 "test/truncation-nc.cc",
8323 "test/truncation-operator-tester.h",
8324 ],
8325 deps = OPERATOR_TEST_DEPS,
8326)
8327
8328xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008329 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008330 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008331 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008332 "test/unpooling-operator-tester.h",
8333 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008334 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008335)
8336
Chao Mei6ddfc602020-05-13 22:29:36 -07008337############################### Misc unit tests ###############################
8338
8339xnnpack_unit_test(
8340 name = "memory_planner_test",
8341 srcs = [
8342 "test/memory-planner-test.cc",
8343 ],
8344 deps = [
8345 ":XNNPACK",
8346 ":memory_planner",
8347 ],
8348)
8349
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008350xnnpack_unit_test(
8351 name = "subgraph_nchw_test",
8352 srcs = [
8353 "src/xnnpack/subgraph.h",
8354 "test/subgraph-nchw.cc",
8355 "test/subgraph-tester.h",
8356 ],
8357 deps = [
8358 ":XNNPACK",
8359 ],
8360)
8361
Marat Dukhan08c4a432019-10-03 09:29:21 -07008362############################# Build configurations #############################
8363
Marat Dukhanb8642352019-10-30 15:43:02 -07008364# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008365config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008366 name = "xnn_enable_assembly_explicit_true",
8367 define_values = {"xnn_enable_assembly": "true"},
8368)
8369
8370# Disables usage of assembly kernels.
8371config_setting(
8372 name = "xnn_enable_assembly_explicit_false",
8373 define_values = {"xnn_enable_assembly": "false"},
8374)
8375
Marat Dukhan9de90e02020-06-18 16:04:12 -07008376# Enables usage of sparse inference.
8377config_setting(
8378 name = "xnn_enable_sparse_explicit_true",
8379 define_values = {"xnn_enable_sparse": "true"},
8380)
8381
8382# Disables usage of sparse inference.
8383config_setting(
8384 name = "xnn_enable_sparse_explicit_false",
8385 define_values = {"xnn_enable_sparse": "false"},
8386)
8387
Marat Dukhan05702cf2020-03-26 15:41:33 -07008388# Disables usage of HMP-aware optimizations.
8389config_setting(
8390 name = "xnn_enable_hmp_explicit_false",
8391 define_values = {"xnn_enable_hmp": "false"},
8392)
8393
Chao Mei6ddfc602020-05-13 22:29:36 -07008394# Enable usage of optimized memory allocation
8395config_setting(
8396 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008397 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008398)
8399
8400# Disable usage of optimized memory allocation
8401config_setting(
8402 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008403 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008404)
8405
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008406# Enable QS8 inference in TFLite-specific version
8407config_setting(
8408 name = "xnn_enable_qs8_explicit_true",
8409 define_values = {"xnn_enable_qs8": "true"},
8410)
8411
8412# Disable QS8 inference in TFLite-specific version
8413config_setting(
8414 name = "xnn_enable_qs8_explicit_false",
8415 define_values = {"xnn_enable_qs8": "false"},
8416)
8417
Marat Dukhanb8642352019-10-30 15:43:02 -07008418# Builds with -c dbg
8419config_setting(
8420 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008421 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008422 "compilation_mode": "dbg",
8423 },
8424)
8425
8426# Builds with -c opt
8427config_setting(
8428 name = "optimized_build",
8429 values = {
8430 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008431 },
8432)
8433
8434config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008435 name = "linux_k8",
8436 values = {"cpu": "k8"},
8437)
8438
8439config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008440 name = "linux_arm",
8441 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008442)
8443
8444config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008445 name = "linux_armeabi",
8446 values = {"cpu": "armeabi"},
8447)
8448
8449config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008450 name = "linux_armhf",
8451 values = {"cpu": "armhf"},
8452)
8453
8454config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008455 name = "linux_armv7a",
8456 values = {"cpu": "armv7a"},
8457)
8458
8459config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008460 name = "linux_aarch64",
8461 values = {"cpu": "aarch64"},
8462)
8463
8464config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008465 name = "android",
8466 values = {"crosstool_top": "//external:android/crosstool"},
8467)
8468
8469config_setting(
8470 name = "android_armv7",
8471 values = {
8472 "crosstool_top": "//external:android/crosstool",
8473 "cpu": "armeabi-v7a",
8474 },
8475)
8476
8477config_setting(
8478 name = "android_arm64",
8479 values = {
8480 "crosstool_top": "//external:android/crosstool",
8481 "cpu": "arm64-v8a",
8482 },
8483)
8484
8485config_setting(
8486 name = "android_x86",
8487 values = {
8488 "crosstool_top": "//external:android/crosstool",
8489 "cpu": "x86",
8490 },
8491)
8492
8493config_setting(
8494 name = "android_x86_64",
8495 values = {
8496 "crosstool_top": "//external:android/crosstool",
8497 "cpu": "x86_64",
8498 },
8499)
8500
8501config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008502 name = "windows_x86_64",
8503 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008504)
8505
8506config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008507 name = "windows_x86_64_clang",
8508 values = {
8509 "compiler": "clang-cl",
8510 "cpu": "x64_windows",
8511 },
8512)
8513
8514config_setting(
8515 name = "windows_x86_64_mingw",
8516 values = {
8517 "compiler": "mingw-gcc",
8518 "cpu": "x64_windows",
8519 },
8520)
8521
8522config_setting(
8523 name = "windows_x86_64_msys",
8524 values = {
8525 "compiler": "msys-gcc",
8526 "cpu": "x64_windows",
8527 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008528)
8529
8530config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008531 name = "macos_x86_64",
8532 values = {
8533 "apple_platform_type": "macos",
8534 "cpu": "darwin",
8535 },
8536)
8537
8538config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008539 name = "macos_arm64",
8540 values = {
8541 "apple_platform_type": "macos",
8542 "cpu": "darwin_arm64",
8543 },
8544)
8545
8546config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008547 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008548 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008549)
8550
8551config_setting(
8552 name = "emscripten_wasm",
8553 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008554 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008555 "cpu": "wasm",
8556 },
8557)
8558
8559config_setting(
8560 name = "emscripten_wasmsimd",
8561 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008562 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008563 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008564 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008565 },
8566)
8567
8568config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008569 name = "ios_armv7",
8570 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008571 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008572 "cpu": "ios_armv7",
8573 },
8574)
8575
8576config_setting(
8577 name = "ios_arm64",
8578 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008579 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008580 "cpu": "ios_arm64",
8581 },
8582)
8583
8584config_setting(
8585 name = "ios_arm64e",
8586 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008587 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008588 "cpu": "ios_arm64e",
8589 },
8590)
8591
8592config_setting(
8593 name = "ios_x86",
8594 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008595 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008596 "cpu": "ios_i386",
8597 },
8598)
8599
8600config_setting(
8601 name = "ios_x86_64",
8602 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008603 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008604 "cpu": "ios_x86_64",
8605 },
8606)
8607
8608config_setting(
8609 name = "watchos_armv7k",
8610 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008611 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008612 "cpu": "watchos_armv7k",
8613 },
8614)
8615
8616config_setting(
8617 name = "watchos_arm64_32",
8618 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008619 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008620 "cpu": "watchos_arm64_32",
8621 },
8622)
8623
8624config_setting(
8625 name = "watchos_x86",
8626 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008627 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008628 "cpu": "watchos_i386",
8629 },
8630)
8631
8632config_setting(
8633 name = "watchos_x86_64",
8634 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008635 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008636 "cpu": "watchos_x86_64",
8637 },
8638)
8639
8640config_setting(
8641 name = "tvos_arm64",
8642 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008643 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008644 "cpu": "tvos_arm64",
8645 },
8646)
8647
8648config_setting(
8649 name = "tvos_x86_64",
8650 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008651 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008652 "cpu": "tvos_x86_64",
8653 },
8654)