blob: 772eb3d34148c140ef5a682346bb78268166ab91 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
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501 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
502 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
503 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
504 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
505 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
506 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhand6021542021-06-30 09:04:20 -0700507 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
508 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
509 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
510 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
511 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
512 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
513 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
514 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
515 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
516 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
517 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
518 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
519 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
520 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
521 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
522 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
523 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
524 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
525 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
526 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
528 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
530 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
531 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
532 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
541 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700542 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
543 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700545 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
546 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
552 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
553 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700554 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
555 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
556 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700557 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
558 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
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561 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700563 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700566 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700569 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700574 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700575 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700587 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700611 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhand481c282021-05-11 23:48:31 -0700618 "src/qs8-vadd/gen/minmax-scalar-x1.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -0700624 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
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Marat Dukhanc2e8f662021-07-01 17:06:34 -0700626 "src/qu8-dwconv/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700631 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700638 "src/u8-lut32norm/scalar.c",
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Marat Dukhanad71b9a2020-11-20 00:01:51 -0800647 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700648 "src/x32-fill/scalar-float.c",
649 "src/x32-fill/scalar-int.c",
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Marat Dukhan63523d42020-05-22 17:07:33 -0700653 "src/x32-pad/scalar-float.c",
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662
Marat Dukhan436ebe62019-12-04 15:10:12 -0800663WASM_UKERNELS = [
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849
Marat Dukhan290055c2020-06-09 12:24:29 -0700850WASMSIMD_UKERNELS = [
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1430 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001431 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1432 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1433 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001434 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1435 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1436 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1437 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001438 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001439 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001440 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001441 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001442 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1443 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1444 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001445 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1446 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1447 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1448 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001449 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1450 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
1451 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1452 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1453 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1454 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
1455 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1456 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1457 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1458 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001459 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1460 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1461 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1462 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1463 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1464 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1465 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1466 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1467 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1468 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1469 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1470 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001471 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1472 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001473 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1474 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1475 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1476 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1477 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1478 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001479 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1480 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1481 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1482 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001483 "src/math/roundd-wasmsimd-addsub.c",
1484 "src/math/roundd-wasmsimd-cvt.c",
1485 "src/math/roundne-wasmsimd-addsub.c",
1486 "src/math/roundu-wasmsimd-addsub.c",
1487 "src/math/roundu-wasmsimd-cvt.c",
1488 "src/math/roundz-wasmsimd-addsub.c",
1489 "src/math/roundz-wasmsimd-cvt.c",
1490 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1491 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhan313eef72021-06-30 16:11:31 -07001492 "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001493 "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1494 "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1495 "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1496 "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1497 "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001498 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001499 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001500 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001501 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001502 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001503 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001504 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001505 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001506 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001507 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001508 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001509 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan69aa6232021-06-30 14:17:26 -07001510 "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1511 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001512 "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1513 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c",
1514 "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1515 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
1516 "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1517 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c",
1518 "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1519 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
1520 "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
1521 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07001522 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
1523 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
1524 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
1526 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
1527 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001528 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001529 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001530 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001531 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001532 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001533 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001534 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001535 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001536 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001537 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001538 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001539 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001540 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001541 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001542 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001543 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001544 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001545 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001546 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001547 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001548 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001549 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001550 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001551 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001552 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001553 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001554 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001555 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001556 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001557 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1558 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
1559 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
1560 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1561 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1562 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1563 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1564 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001565 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001566 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001567 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001568 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001569 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001570 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001571 "src/x32-zip/x2-wasmsimd.c",
1572 "src/x32-zip/x3-wasmsimd.c",
1573 "src/x32-zip/x4-wasmsimd.c",
1574 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001575]
1576
Marat Dukhan08c4a432019-10-03 09:29:21 -07001577# ISA-specific micro-kernels
1578NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001579 "src/f32-argmaxpool/4x-neon-c4.c",
1580 "src/f32-argmaxpool/9p8x-neon-c4.c",
1581 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001582 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1583 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001584 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001585 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001586 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001587 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001588 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001589 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001590 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001591 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001592 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001593 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001595 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001596 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001597 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001598 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1599 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1600 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1601 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1602 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001603 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001604 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001605 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1606 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1607 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001608 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001609 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001610 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1611 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1612 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1613 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1614 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001615 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1616 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1617 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001618 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001619 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001620 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1621 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1622 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001623 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1624 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1625 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1626 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001627 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001628 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1629 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001630 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001631 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001632 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001633 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001634 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1635 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001636 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1637 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1638 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1639 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1640 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1641 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1642 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1643 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001644 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001645 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001646 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001647 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1648 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001649 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001650 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1651 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001652 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001653 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1654 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1655 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1656 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1657 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001658 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1659 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001660 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1661 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001662 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1663 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001664 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1665 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1666 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1667 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1668 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1669 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1670 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1671 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1672 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1673 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1674 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1675 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1676 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1677 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1678 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1679 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001680 "src/f32-ibilinear-chw/gen/neon-p4.c",
1681 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001682 "src/f32-ibilinear/gen/neon-c4.c",
1683 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001684 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001685 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001686 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001687 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1688 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001689 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001690 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1691 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1692 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1693 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001694 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1695 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001696 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1697 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001698 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1699 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001700 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1701 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1702 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001703 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1704 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001705 "src/f32-prelu/gen/neon-1x4.c",
1706 "src/f32-prelu/gen/neon-1x8.c",
1707 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001708 "src/f32-prelu/gen/neon-2x4.c",
1709 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001710 "src/f32-prelu/gen/neon-2x16.c",
1711 "src/f32-prelu/gen/neon-4x4.c",
1712 "src/f32-prelu/gen/neon-4x8.c",
1713 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001714 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001715 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001716 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001717 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1718 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001719 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001720 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1721 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001722 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001723 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1724 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001725 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1726 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1727 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1728 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1729 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1730 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1731 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1732 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1733 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1734 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1735 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1736 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1737 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001738 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001739 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1740 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1741 "src/f32-spmm/gen/4x1-minmax-neon.c",
1742 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1743 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1744 "src/f32-spmm/gen/8x1-minmax-neon.c",
1745 "src/f32-spmm/gen/12x1-minmax-neon.c",
1746 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1747 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1748 "src/f32-spmm/gen/16x1-minmax-neon.c",
1749 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1750 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1751 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001752 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1753 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1754 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1755 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001756 "src/f32-vbinary/gen/vmax-neon-x4.c",
1757 "src/f32-vbinary/gen/vmax-neon-x8.c",
1758 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1759 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1760 "src/f32-vbinary/gen/vmin-neon-x4.c",
1761 "src/f32-vbinary/gen/vmin-neon-x8.c",
1762 "src/f32-vbinary/gen/vminc-neon-x4.c",
1763 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001764 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1765 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1766 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1767 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1768 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1769 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001770 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1771 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1772 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1773 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001774 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1775 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1776 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1777 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001778 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1779 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001780 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1781 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1782 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1783 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1784 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1785 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1786 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1787 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1788 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1789 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1790 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1791 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001792 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1793 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1794 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001795 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1796 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001797 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1798 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001799 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1800 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001801 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1802 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001803 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1804 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1805 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1806 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1807 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1808 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001809 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1810 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1811 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1812 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1813 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1814 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1815 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1816 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1817 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1818 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1819 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1820 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1821 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1822 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1823 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1824 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1825 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1826 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001827 "src/f32-vunary/gen/vabs-neon-x4.c",
1828 "src/f32-vunary/gen/vabs-neon-x8.c",
1829 "src/f32-vunary/gen/vneg-neon-x4.c",
1830 "src/f32-vunary/gen/vneg-neon-x8.c",
1831 "src/f32-vunary/gen/vsqr-neon-x4.c",
1832 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001833 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1834 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001835 "src/math/roundd-neon-addsub.c",
1836 "src/math/roundd-neon-cvt.c",
1837 "src/math/roundne-neon-addsub.c",
1838 "src/math/roundu-neon-addsub.c",
1839 "src/math/roundu-neon-cvt.c",
1840 "src/math/roundz-neon-addsub.c",
1841 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001842 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1843 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1844 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1845 "src/math/sqrt-neon-nr1rsqrts.c",
1846 "src/math/sqrt-neon-nr2rsqrts.c",
1847 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001848 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
1849 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
1850 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
1851 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1852 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1853 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1854 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1855 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001856 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001857 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1858 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001859 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001860 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1861 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001862 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001863 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1864 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001865 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001866 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1867 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001868 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001869 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001870 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001871 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001872 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001873 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001874 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001875 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001876 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001877 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001878 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001879 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001880 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001881 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001882 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001883 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001884 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1885 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1886 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1887 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001888 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1889 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1890 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1891 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001892 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1893 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1894 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001895 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001896 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1897 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001898 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001899 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001900 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1901 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001902 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001903 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1904 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1905 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1906 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1907 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1908 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1909 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1910 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1911 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1912 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1913 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001914 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001915 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1916 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001917 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001918 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001919 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1920 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1921 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1922 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1923 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1924 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1925 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1926 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1927 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1928 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1929 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1930 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1931 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1932 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1933 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1934 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1935 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1936 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1937 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1938 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1939 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1940 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1941 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1942 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1943 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1944 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1945 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1946 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1947 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1948 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1949 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1950 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1951 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1952 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001953 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001954 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1955 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1956 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1957 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1958 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1959 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1960 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1961 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1962 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1963 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1964 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1965 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1966 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1967 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1968 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001969 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001970 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1971 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07001972 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001973 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001974 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1975 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001976 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001977 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1978 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1979 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1980 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1981 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1982 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1983 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1984 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1985 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1986 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1987 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001988 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001989 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1990 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07001991 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001992 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001993 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1994 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1995 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1996 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1997 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1998 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1999 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2000 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2001 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2002 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2003 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2004 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2005 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2006 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2007 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2008 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2009 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2010 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2011 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2012 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2013 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2014 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2015 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2016 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2017 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2018 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2019 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2020 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2021 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2022 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2023 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2024 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2025 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2026 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002027 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002028 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2029 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2030 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2031 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2032 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2033 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2034 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2035 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2036 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2037 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2038 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2039 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002040 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002041 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002042 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07002043 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002044 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2045 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2046 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2047 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2048 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2049 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2050 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2051 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002052 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2053 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002054 "src/qu8-dwconv/up8x9-minmax-gemmlowp-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002055 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2056 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002057 "src/qu8-gemm/4x8-minmax-gemmlowp-neon.c",
2058 "src/qu8-gemm/8x8-minmax-gemmlowp-neon.c",
2059 "src/qu8-igemm/4x8-minmax-gemmlowp-neon.c",
2060 "src/qu8-igemm/8x8-minmax-gemmlowp-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002061 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002062 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002063 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002064 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002065 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002066 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002067 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002068 "src/x8-zip/x2-neon.c",
2069 "src/x8-zip/x3-neon.c",
2070 "src/x8-zip/x4-neon.c",
2071 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002072 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002073 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002074 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002075 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002076 "src/x32-zip/x2-neon.c",
2077 "src/x32-zip/x3-neon.c",
2078 "src/x32-zip/x4-neon.c",
2079 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002080]
2081
2082NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002083 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2084 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2085 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2086 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2087 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2088 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2089 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2090 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2091 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2092 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2093 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2094 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2095 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2096 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2097 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2098 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2099 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2100 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2101 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2102 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2103 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2104 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2105 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2106 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2107 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2108 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2109 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2110 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2111 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2112 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002113 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2114 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002115 "src/f32-ibilinear/gen/neonfma-c4.c",
2116 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002117 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002118 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002119 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002120 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2121 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002122 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2123 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002124 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2125 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002126 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2127 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002128 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002129 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002130 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002131 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2132 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002133 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002134 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2135 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002136 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002137 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2138 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002139 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2140 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2141 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2142 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2143 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2144 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2145 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2146 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2147 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2148 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2149 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2150 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2151 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002152 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2153 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2154 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2155 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2156 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2157 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2158 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2159 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2160 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2161 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2162 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2163 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2164 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002165 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2166 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2167 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2168 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2169 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2170 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2171 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2172 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2173 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2174 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2175 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2176 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002177 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2178 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002179 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2180 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2181 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2182 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2183 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2184 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2185 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2186 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2187 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2188 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2189 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2190 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2191 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2192 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2193 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2194 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2195 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2196 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2197 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2198 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2199 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2200 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2201 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2202 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2203 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2204 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2205 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2206 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
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2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
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Marat Dukhanb7633f22020-11-20 16:34:56 -08002253 "src/math/exp-neonfma-rr2-lut64-p2.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002260 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002263 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002266 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002269 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2270 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002272 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002275 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
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Marat Dukhan84000762020-06-29 18:38:43 -07002278 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002279 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002280 "src/math/sqrt-neonfma-nr2fma.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002283]
2284
2285AARCH64_NEONFMA_UKERNELS = [
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Marat Dukhan82f0c322020-10-25 19:17:35 -07002305 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan82f0c322020-10-25 19:17:35 -07002309 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
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Marat Dukhan355ab432020-04-09 19:01:52 -07002356 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
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Marat Dukhan355ab432020-04-09 19:01:52 -07002358 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002360 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002362 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
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Frank Barchard846c0c62020-10-26 15:01:39 -07002364 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002366 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07002390 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002392 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002393 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002394 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002395 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002398]
2399
Marat Dukhan8853b822020-05-07 12:19:01 -07002400NEONV8_UKERNELS = [
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Frank Barchard04336c12020-10-22 16:48:55 -07002403 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
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2405 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -07002409 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002410 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002411 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002412 "src/math/roundz-neonv8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002413 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
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2415 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2416 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2417 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2418 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2419 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2420 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002421 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002424 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002425 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2426 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002427 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002428 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002430 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002431 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2432 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002433 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
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2435 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2436 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2437 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2438 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2439 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2440 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002441 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002442 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2443 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002444 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002445 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2446 "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002447 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002448 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2449 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002450 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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Marat Dukhan8853b822020-05-07 12:19:01 -07002453]
2454
Marat Dukhan08c4a432019-10-03 09:29:21 -07002455AARCH64_NEONFP16ARITH_UKERNELS = [
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2458 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2459 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002460 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
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2462 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2463 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2464 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2465 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2466 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2467 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002468 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2469 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002470 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
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2472 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
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2476 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2477 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2478 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2479 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2480 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
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2482 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2483 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2484 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2485 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002486 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2487 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2488 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2489 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2490 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2491 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2492 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2493 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002494 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002495 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002496 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
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2504 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2505 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2506 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2507 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2508 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
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2510 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
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2519 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2520 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2521 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2522 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2523 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2524 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2525 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2526 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
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2529 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2530 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2531 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002532 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2533 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002534 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2535 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002536 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
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Frank Barchardd4416d62021-05-17 15:51:37 -07002538 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2539 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002540]
2541
Benoit Jacoba9644732020-08-13 12:48:55 -07002542NEONDOT_UKERNELS = [
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Benoit Jacoba9644732020-08-13 12:48:55 -07002591]
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002593SSE_UKERNELS = [
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Erich Elsenb1233402020-06-08 15:53:15 -07002596 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002602 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2603 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002604 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2605 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2606 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2607 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002608 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2609 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002610 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2611 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2612 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002613 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002614 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002615 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2616 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2617 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2618 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2619 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002620 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2621 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2622 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002623 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002624 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002625 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2626 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2627 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002628 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2629 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2630 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2631 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2632 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2633 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2634 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2635 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2636 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2637 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2638 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2639 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2640 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002641 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2642 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2643 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2644 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2645 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2646 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2647 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2648 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002649 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002650 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002651 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002652 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2653 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002654 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2655 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2656 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002657 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2658 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2659 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002660 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2661 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2662 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002663 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2664 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2665 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002666 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2667 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2668 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002669 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2670 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2671 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002672 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2673 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2674 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2675 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002676 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2677 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2678 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002679 "src/f32-ibilinear-chw/gen/sse-p4.c",
2680 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002681 "src/f32-ibilinear/gen/sse-c4.c",
2682 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002683 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2684 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2685 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002686 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2687 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2688 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002689 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2690 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2691 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2692 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002693 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2694 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2695 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002696 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2697 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2698 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002699 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002700 "src/f32-prelu/gen/sse-2x4.c",
2701 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002702 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002703 "src/f32-spmm/gen/4x1-minmax-sse.c",
2704 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002705 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002706 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002707 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2708 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2709 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2710 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2711 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2712 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2713 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2714 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002715 "src/f32-vbinary/gen/vmax-sse-x4.c",
2716 "src/f32-vbinary/gen/vmax-sse-x8.c",
2717 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2718 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2719 "src/f32-vbinary/gen/vmin-sse-x4.c",
2720 "src/f32-vbinary/gen/vmin-sse-x8.c",
2721 "src/f32-vbinary/gen/vminc-sse-x4.c",
2722 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002723 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2724 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2725 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2726 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2727 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2728 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2729 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2730 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002731 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2732 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2733 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2734 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002735 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2736 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2737 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2738 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002739 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2740 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002741 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2742 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002743 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2744 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002745 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2746 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002747 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2748 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002749 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2750 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002751 "src/f32-vunary/gen/vabs-sse-x4.c",
2752 "src/f32-vunary/gen/vabs-sse-x8.c",
2753 "src/f32-vunary/gen/vneg-sse-x4.c",
2754 "src/f32-vunary/gen/vneg-sse-x8.c",
2755 "src/f32-vunary/gen/vsqr-sse-x4.c",
2756 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002757 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002758 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002759 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002760 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002761 "src/math/sqrt-sse-hh1mac.c",
2762 "src/math/sqrt-sse-nr1mac.c",
2763 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002764 "src/x32-fill/sse.c",
2765 "src/x32-packx/x4-sse.c",
2766 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002767]
2768
2769SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002770 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002771 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002772 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002773 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2774 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2775 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2776 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2777 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2778 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2779 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2780 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2781 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2782 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2783 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2784 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002785 "src/f32-prelu/gen/sse2-2x4.c",
2786 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002787 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002788 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002789 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002790 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2791 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002792 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002793 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2794 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002795 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002796 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2797 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002798 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002799 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2800 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2801 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2802 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2803 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2804 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2805 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2806 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2807 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2808 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2809 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2810 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002811 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2812 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002813 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2814 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002815 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2816 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2817 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2818 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2819 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2820 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002821 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2822 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2823 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2824 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2825 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2826 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2827 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2828 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2829 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2830 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2831 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2832 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002833 "src/math/exp-sse2-rr2-lut64-p2.c",
2834 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002835 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002836 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002837 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002838 "src/math/roundd-sse2-cvt.c",
2839 "src/math/roundne-sse2-cvt.c",
2840 "src/math/roundu-sse2-cvt.c",
2841 "src/math/roundz-sse2-cvt.c",
2842 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2843 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2844 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2845 "src/math/sigmoid-sse2-rr2-p5-div.c",
2846 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2847 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002848 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2849 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2850 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2851 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2852 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2853 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002854 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002855 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002856 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002857 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002858 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002859 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002860 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002861 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002862 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002863 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002864 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002865 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002866 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002867 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002868 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002869 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002870 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002871 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002872 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002873 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002874 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002875 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002876 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002877 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002878 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002879 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002880 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002881 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002882 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2883 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002884 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2885 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2886 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2887 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2888 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2889 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2890 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2891 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2892 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
2893 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002894 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2895 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2896 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002897 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2898 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2899 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002900 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002901 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002902 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002903 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002904 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002905 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002906 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002907 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002908 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002909 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002910 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002911 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002912 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002913 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002914 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002915 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002916 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002917 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002918 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002919 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002920 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002921 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002922 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002923 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002924 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002925 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002926 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002927 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002928 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002929 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002930 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002931 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002932 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002933 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002934 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002935 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002936 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002937 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002938 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002939 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002940 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002941 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002942 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2943 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2944 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2945 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002946 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2947 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2948 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2949 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002950 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2951 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07002952 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2953 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2954 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2955 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002956 "src/qu8-dwconv/up8x9-minmax-gemmlowp-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002957 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2958 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002959 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
2960 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2961 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
2962 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2963 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
2964 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2965 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
2966 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002967 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002968 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
2969 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2970 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
2971 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2972 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
2973 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002974 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002975 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
2976 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2977 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
2978 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2979 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
2980 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2981 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
2982 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002983 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07002984 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
2985 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2986 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
2987 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2988 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
2989 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07002990 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002991 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002992 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002993 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002994 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002995 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002996 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002997 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002998 "src/x8-zip/x2-sse2.c",
2999 "src/x8-zip/x3-sse2.c",
3000 "src/x8-zip/x4-sse2.c",
3001 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07003002 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003003 "src/x32-zip/x2-sse2.c",
3004 "src/x32-zip/x3-sse2.c",
3005 "src/x32-zip/x4-sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07003007]
3008
3009SSSE3_UKERNELS = [
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Marat Dukhan159688f2020-08-06 10:34:29 -07003026 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003032 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003034 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003037 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003038 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003039 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003041 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003048 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003050 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
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Marat Dukhan06716242021-05-26 15:56:39 -07003056 "src/qs8-requantization/rndna-ssse3.c",
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3064
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003065SSE41_UKERNELS = [
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07003080 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
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Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003082 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003084 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003102 "src/math/roundd-sse41.c",
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Marat Dukhan98042f22021-06-15 00:43:13 -07003106 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
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3112 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
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3116 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003121 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003122 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003123 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003124 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003143 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003144 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003145 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003146 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
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3148 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003150 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
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3152 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
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3155 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3156 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3157 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3158 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3159 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3160 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
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3162 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3163 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
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3165 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3166 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3167 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3168 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3169 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003170 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3171 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3172 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003173 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
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3175 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003176 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003177 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003178 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003179 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003180 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003181 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003182 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003183 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003184 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003185 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003186 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003187 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003188 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003189 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003190 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003191 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003192 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003193 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003194 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003195 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003196 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003197 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003198 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003199 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003200 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003201 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003202 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003203 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003204 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003205 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003206 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003207 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003208 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003209 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003210 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003211 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003212 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003213 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003214 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003215 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003216 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003217 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003218 "src/qs8-requantization/rndnu-sse4-sra.c",
3219 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003220 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3221 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3222 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3223 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003224 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3225 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3226 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3227 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003228 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3229 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3230 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3231 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003232 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3233 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3234 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3235 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003236 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003237 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003238 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003239 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003240 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003241 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003242 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003243 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003244 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3245 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3246 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3247 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3248 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3249 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3250 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3251 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003252 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003253 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3254 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3255 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3256 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3257 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3258 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003259 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003260 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3261 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3262 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3263 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3264 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3265 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3266 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3267 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003268 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003269 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3270 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3271 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3272 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3273 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3274 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003275 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003276 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003277 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003278]
3279
Marat Dukhan08c4a432019-10-03 09:29:21 -07003280AVX_UKERNELS = [
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Marat Dukhan1c587112020-04-08 20:04:28 -07003283 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003285 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3286 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003287 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3288 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3289 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3290 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3291 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3292 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003293 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003294 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003296 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003297 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003298 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003299 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003300 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
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3303 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
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3305 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
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3307 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
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3309 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3310 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003311 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003312 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3313 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003314 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003315 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003316 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003317 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003318 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3319 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003320 "src/f32-prelu/gen/avx-2x8.c",
3321 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003322 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003323 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
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3325 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3326 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3327 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3328 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3329 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3330 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003331 "src/f32-vbinary/gen/vmax-avx-x8.c",
3332 "src/f32-vbinary/gen/vmax-avx-x16.c",
3333 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3334 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3335 "src/f32-vbinary/gen/vmin-avx-x8.c",
3336 "src/f32-vbinary/gen/vmin-avx-x16.c",
3337 "src/f32-vbinary/gen/vminc-avx-x8.c",
3338 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003339 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3340 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3341 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3342 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3343 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3344 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3345 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3346 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003347 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
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3349 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3350 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003351 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07003355 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3356 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003357 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3358 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
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3361 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3362 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3363 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3364 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3365 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3366 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3367 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3368 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3369 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3370 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3371 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3372 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3373 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3374 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003375 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3376 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003377 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3378 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003379 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3380 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003381 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3382 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003383 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3384 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3385 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3386 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3387 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3388 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003389 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003390 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3391 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3392 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3393 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3394 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3395 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3396 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3397 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3398 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3399 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3400 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3401 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3402 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3403 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3404 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3405 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3406 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3407 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3408 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3409 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003410 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3411 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003412 "src/f32-vunary/gen/vabs-avx-x8.c",
3413 "src/f32-vunary/gen/vabs-avx-x16.c",
3414 "src/f32-vunary/gen/vneg-avx-x8.c",
3415 "src/f32-vunary/gen/vneg-avx-x16.c",
3416 "src/f32-vunary/gen/vsqr-avx-x8.c",
3417 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003418 "src/math/exp-avx-rr2-p5.c",
3419 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3420 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3421 "src/math/expm1minus-avx-rr2-p6.c",
3422 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3423 "src/math/sigmoid-avx-rr2-p5-div.c",
3424 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3425 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003426 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3427 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3428 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3429 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3430 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3431 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3432 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3433 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3434 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3435 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3436 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3437 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003438 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003439 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003440 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003441 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003442 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003443 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003444 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003445 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003446 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003447 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003448 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003449 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003450 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003451 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003452 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003453 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003454 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003455 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003456 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003457 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003458 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003459 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003460 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003461 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003462 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003463 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003464 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003465 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003466 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3467 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3468 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3469 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003470 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3471 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3472 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3473 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3474 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3475 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3476 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3477 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3478 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3479 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3480 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3481 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3482 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3483 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3484 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3485 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3486 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3487 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3488 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3489 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003490 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003491 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003492 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003493 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003494 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003495 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003496 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003497 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003498 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003499 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003500 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003501 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003502 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003503 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003504 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003505 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003506 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003507 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003508 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003509 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003510 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003511 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003512 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003513 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003514 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003515 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003516 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003517 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003518 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003519 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003520 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003521 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003522 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003523 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003524 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003525 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3526 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3527 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3528 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3529 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3530 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3531 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3532 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3533 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3534 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3535 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3536 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3537 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3538 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3539 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3540 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003541 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003542 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003543 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003544 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003545 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003546 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003547 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003548 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003549 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3550 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3551 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3552 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3553 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3554 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3555 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3556 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3557 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3558 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3559 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3560 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3561 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3562 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3563 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3564 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3565 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3566 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3567 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3568 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3569 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3570 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3571 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3572 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3573 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3574 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3575 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3576 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003577]
3578
Marat Dukhan1566fee2020-08-02 21:55:41 -07003579XOP_UKERNELS = [
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3582 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3583 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3584 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3585 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003591 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
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3619 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3620 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3621 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3622 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
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3624 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003654 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003655 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003656 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003657 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003658 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
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3663 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3664 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3665 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3666 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3667 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3668 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003669 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
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3671 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3672 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003673 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
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3677 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
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3679 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3680 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
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3683 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3684 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3685 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3686 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3687 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3688 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3689 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3690 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3691 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3692 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3693 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3694 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3695 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3696 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3697 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
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3700 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003701]
3702
Marat Dukhanfda12b82019-11-21 12:27:59 -08003703FMA3_UKERNELS = [
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Frank Barchard04336c12020-10-22 16:48:55 -07003730 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003755 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
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Marat Dukhan6674d692021-05-05 22:27:00 -07003758 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07003760 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
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Marat Dukhan84000762020-06-29 18:38:43 -07003769 "src/math/sqrt-fma3-nr1fma1adj.c",
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3772
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003773AVX2_UKERNELS = [
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08003798 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
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3814 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
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3820 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3821 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3822 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3823 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3824 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3825 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3826 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3827 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3828 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3829 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3830 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3831 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3832 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3833 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3834 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3835 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3836 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3837 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3838 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3839 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3840 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3841 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3842 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3843 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3844 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3845 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
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3848 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3849 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003850 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
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3852 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3853 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3854 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3855 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3856 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3857 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3858 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3859 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3860 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3861 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3862 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3863 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3864 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3865 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3866 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3867 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3868 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3869 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
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3871 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3872 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07003874 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3875 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3876 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3877 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3878 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3879 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3880 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3881 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3882 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3883 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3884 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3885 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3886 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3887 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3888 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3889 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3890 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3891 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3892 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3893 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3894 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3895 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3896 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3897 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3898 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3899 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3900 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3901 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3902 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3903 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003904 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3905 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3906 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003907 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3908 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3909 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3910 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003911 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003912 "src/math/extexp-avx2-p5.c",
3913 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3914 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3915 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3916 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3917 "src/math/sigmoid-avx2-rr1-p5-div.c",
3918 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3919 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3920 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3921 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3922 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3923 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3924 "src/math/sigmoid-avx2-rr2-p5-div.c",
3925 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3926 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07003927 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
3928 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
3929 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
3930 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
3931 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
3932 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
3933 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
3934 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
3935 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
3936 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
3937 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
3938 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003939 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3940 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3941 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3942 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3943 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3944 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07003945 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
3946 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
3947 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003948 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003949 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003950 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003951 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003952 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003953 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003954 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3955 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003956 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003957 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003958 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3959 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003960 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003961 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003962 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003963 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003964 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003965 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003966 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3967 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003968 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003969 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003970 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3971 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003972 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003973 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003974 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003975 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003976 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003977 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003978 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003979 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003980 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003981 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003982 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003983 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003984 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003985 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003986 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003987 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003988 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003989 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003990 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3991 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3992 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3993 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3994 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3995 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3996 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3997 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07003998 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
3999 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4000 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4001 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4002 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4003 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004004 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4005 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4006 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4007 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4008 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4009 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004010]
4011
Marat Dukhan08c4a432019-10-03 09:29:21 -07004012AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004013 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4014 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004015 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4016 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004017 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4018 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004019 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
4020 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
4021 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4022 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4023 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4024 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004025 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4026 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4027 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4028 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4029 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4030 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004031 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4032 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4033 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4034 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4035 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4036 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004037 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4038 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4039 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4040 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4041 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4042 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004043 "src/f32-prelu/gen/avx512f-2x16.c",
4044 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004045 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4046 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004047 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004048 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004049 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004050 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4051 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004052 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004053 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4054 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4055 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004056 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004057 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4058 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004059 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004060 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004061 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004062 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4063 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004064 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004065 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4066 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4067 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004068 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004069 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4070 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004071 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004072 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004073 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004074 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4075 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004076 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004077 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4078 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4079 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004080 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004081 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004082 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4083 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4084 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4085 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4086 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4087 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4088 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4089 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004090 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4091 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4092 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4093 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4094 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4095 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4096 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4097 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004098 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4099 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4100 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4101 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4102 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4103 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4104 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4105 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004106 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4107 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4108 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4109 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004110 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4111 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4112 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4113 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004114 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4115 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004116 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4117 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4118 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4119 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4120 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4121 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4122 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4123 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4124 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4125 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4126 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4127 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4128 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4129 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4130 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4131 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004132 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4133 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004134 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4135 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004136 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4137 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004138 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4139 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4140 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4141 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4142 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4143 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4144 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4145 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004146 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004147 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4148 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4149 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4150 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4151 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4152 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4153 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4154 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4155 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4156 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4157 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4158 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4159 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4160 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4161 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4162 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4163 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4164 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4165 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4166 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4167 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4168 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4169 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4170 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004171 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4172 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4173 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4174 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4175 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4176 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4177 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4178 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4179 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4180 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4181 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4182 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4183 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4184 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4185 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4186 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4187 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4188 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4189 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4190 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4191 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4192 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4193 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4194 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4195 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4196 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4197 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4198 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4199 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4200 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4201 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4202 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4203 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4204 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4205 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4206 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4207 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4208 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4209 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4210 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4211 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4212 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4213 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4214 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4215 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4216 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4217 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4218 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004219 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4220 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4221 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4222 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4223 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4224 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4225 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4226 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004227 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4228 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4229 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4230 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4231 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4232 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004233 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4234 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4235 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4236 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4237 "src/math/exp-avx512f-rr2-p5-scalef.c",
4238 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004239 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4240 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004241 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004242 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004243 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004244 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004245 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004246 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004247 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004248 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004249 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004250 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4251 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4252 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4253 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4254 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4255 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4256 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4257 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4258 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4259 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004260 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004261 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004262 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4263 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4264 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4265 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004266 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004267 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004268 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004269]
4270
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004271AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004272 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4273 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4274 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4275 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004276 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4277 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4278 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4279 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4280 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4281 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4282 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4283 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004284 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004285 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004286 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004287 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004288 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004289 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004290 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004291 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004292 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004293 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004294 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004295 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004296 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004297 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004298 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004299 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004300 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004301 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004302 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004303 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004304 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004305 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004306 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004307 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhancfd606b2021-07-09 01:18:45 -07004308 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4309 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4310 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4311 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004312 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4313 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4314 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4315 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4316 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4317 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4318 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4319 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004320]
4321
Frank Barchardbcedc082020-08-17 18:00:51 -07004322WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004323 "src/f32-vrelu/wasm_shr_x1.S",
4324 "src/f32-vrelu/wasm_shr_x2.S",
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Frank Barchardd208bec2021-05-28 11:36:39 -07004481 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004482 "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004483 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004484 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4485 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004486 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4487 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004488 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4489 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4490 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4491 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004492 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4493 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4494 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004495 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004496 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4497 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4498 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4499 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004500 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4501 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4502 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4503 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004504 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4505 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4506 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4507 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004508 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4509 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4510 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4511 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004512 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004513 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004514 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4515 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004516 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4517 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004518 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4519 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4520 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004521 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4522 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004523 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004524]
4525
Marat Dukhan1b354632020-03-23 12:50:22 -07004526INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004527 "src/xnnpack/argmaxpool.h",
4528 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004529 "src/xnnpack/common.h",
4530 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004531 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004532 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004533 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004534 "src/xnnpack/gavgpool.h",
4535 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004536 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004537 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004538 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004539 "src/xnnpack/lut.h",
4540 "src/xnnpack/math.h",
4541 "src/xnnpack/maxpool.h",
4542 "src/xnnpack/packx.h",
4543 "src/xnnpack/pad.h",
4544 "src/xnnpack/params.h",
4545 "src/xnnpack/pavgpool.h",
4546 "src/xnnpack/ppmm.h",
4547 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004548 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004549 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004550 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004551 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004552 "src/xnnpack/spmm.h",
4553 "src/xnnpack/unpool.h",
4554 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004555 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004556 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004557 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004558 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004559 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004560 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004561 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004562]
4563
4564INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004565 "include/xnnpack.h",
4566 "src/xnnpack/allocator.h",
4567 "src/xnnpack/compute.h",
4568 "src/xnnpack/im2col.h",
4569 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004570 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004571 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004572 "src/xnnpack/operator.h",
4573 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004574 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004575 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004576 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004577 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004578]
4579
Marat Dukhan1b354632020-03-23 12:50:22 -07004580ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004581 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004582]
4583
Marat Dukhan1b354632020-03-23 12:50:22 -07004584MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004585 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004586 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004587]
4588
Marat Dukhan1b354632020-03-23 12:50:22 -07004589MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004590 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004591 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004592 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004593 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004594]
4595
4596OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004597 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004598 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004599]
4600
4601WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004602 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004603 "src/xnnpack/operator.h",
4604 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004605]
4606
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004607LOGGING_COPTS = select({
4608 # No logging in optimized mode
4609 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4610 # Full logging in debug mode
4611 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4612 # Error-only logging in default (fastbuild) mode
4613 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4614})
4615
Marat Dukhan3b59de22020-06-03 20:15:19 -07004616LOGGING_SRCS = select({
4617 # No logging in optimized mode
4618 ":optimized_build": [],
4619 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004620 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004621 "src/operator-strings.c",
4622 "src/subgraph-strings.c",
4623 ],
4624})
4625
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004626LOGGING_HDRS = [
4627 "src/xnnpack/log.h",
4628]
4629
Marat Dukhan08c4a432019-10-03 09:29:21 -07004630xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004631 name = "tables",
4632 srcs = TABLE_SRCS,
4633 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004634 gcc_copts = xnnpack_gcc_std_copts(),
4635 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004636)
4637
4638xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004639 name = "scalar_ukernels",
4640 srcs = SCALAR_UKERNELS,
4641 hdrs = INTERNAL_HDRS,
4642 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004643 gcc_copts = xnnpack_gcc_std_copts(),
4644 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004645 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004646 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004647 "@FP16",
4648 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004649 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004650 ],
4651)
4652
4653xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004654 name = "scalar_ukernels_test_mode",
4655 srcs = SCALAR_UKERNELS,
4656 hdrs = INTERNAL_HDRS,
4657 aarch32_copts = ["-marm"],
4658 copts = [
4659 "-UNDEBUG",
4660 "-DXNN_TEST_MODE=1",
4661 ],
4662 gcc_copts = xnnpack_gcc_std_copts(),
4663 msvc_copts = xnnpack_msvc_std_copts(),
4664 deps = [
4665 ":tables",
4666 "@FP16",
4667 "@FXdiv",
4668 "@pthreadpool",
4669 ],
4670)
4671
4672xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004673 name = "wasm_ukernels",
4674 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004675 gcc_copts = xnnpack_gcc_std_copts(),
4676 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004677 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004678 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004679 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004680 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004681 "@FP16",
4682 "@FXdiv",
4683 "@pthreadpool",
4684 ],
4685)
4686
4687xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004688 name = "wasm_ukernels_test_mode",
4689 hdrs = INTERNAL_HDRS,
4690 copts = [
4691 "-UNDEBUG",
4692 "-DXNN_TEST_MODE=1",
4693 ],
4694 gcc_copts = xnnpack_gcc_std_copts(),
4695 msvc_copts = xnnpack_msvc_std_copts(),
4696 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004697 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004698 deps = [
4699 ":tables",
4700 "@FP16",
4701 "@FXdiv",
4702 "@pthreadpool",
4703 ],
4704)
4705
4706xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004707 name = "neon_ukernels",
4708 hdrs = INTERNAL_HDRS,
4709 aarch32_copts = [
4710 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004711 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004712 "-mfpu=neon",
4713 ],
4714 aarch32_srcs = NEON_UKERNELS,
4715 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004716 gcc_copts = xnnpack_gcc_std_copts(),
4717 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004718 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004719 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004720 "@FP16",
4721 "@pthreadpool",
4722 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004723)
4724
4725xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004726 name = "neon_ukernels_test_mode",
4727 hdrs = INTERNAL_HDRS,
4728 aarch32_copts = [
4729 "-marm",
4730 "-march=armv7-a",
4731 "-mfpu=neon",
4732 ],
4733 aarch32_srcs = NEON_UKERNELS,
4734 aarch64_srcs = NEON_UKERNELS,
4735 copts = [
4736 "-UNDEBUG",
4737 "-DXNN_TEST_MODE=1",
4738 ],
4739 gcc_copts = xnnpack_gcc_std_copts(),
4740 msvc_copts = xnnpack_msvc_std_copts(),
4741 deps = [
4742 ":tables",
4743 "@FP16",
4744 "@pthreadpool",
4745 ],
4746)
4747
4748xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004749 name = "neonfma_ukernels",
4750 hdrs = INTERNAL_HDRS,
4751 aarch32_copts = [
4752 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004753 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004754 "-mfpu=neon-vfpv4",
4755 ],
4756 aarch32_srcs = NEONFMA_UKERNELS,
4757 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004758 apple_aarch32_copts = [
4759 "-mcpu=swift",
4760 "-mtune=generic",
4761 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004762 gcc_copts = xnnpack_gcc_std_copts(),
4763 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004764 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004765 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004766 "@FP16",
4767 "@pthreadpool",
4768 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004769)
4770
4771xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004772 name = "neonfma_ukernels_test_mode",
4773 hdrs = INTERNAL_HDRS,
4774 aarch32_copts = [
4775 "-marm",
4776 "-march=armv7-a",
4777 "-mfpu=neon-vfpv4",
4778 ],
4779 aarch32_srcs = NEONFMA_UKERNELS,
4780 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004781 apple_aarch32_copts = [
4782 "-mcpu=swift",
4783 "-mtune=generic",
4784 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004785 copts = [
4786 "-UNDEBUG",
4787 "-DXNN_TEST_MODE=1",
4788 ],
4789 gcc_copts = xnnpack_gcc_std_copts(),
4790 msvc_copts = xnnpack_msvc_std_copts(),
4791 deps = [
4792 ":tables",
4793 "@FP16",
4794 "@pthreadpool",
4795 ],
4796)
4797
4798xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004799 name = "neonv8_ukernels",
4800 hdrs = INTERNAL_HDRS,
4801 aarch32_copts = [
4802 "-marm",
4803 "-march=armv8-a",
4804 "-mfpu=neon-fp-armv8",
4805 ],
4806 aarch32_srcs = NEONV8_UKERNELS,
4807 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004808 apple_aarch32_copts = [
4809 "-mcpu=cyclone",
4810 "-mtune=generic",
4811 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004812 gcc_copts = xnnpack_gcc_std_copts(),
4813 msvc_copts = xnnpack_msvc_std_copts(),
4814 deps = [
4815 ":tables",
4816 "@FP16",
4817 "@pthreadpool",
4818 ],
4819)
4820
4821xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004822 name = "neonv8_ukernels_test_mode",
4823 hdrs = INTERNAL_HDRS,
4824 aarch32_copts = [
4825 "-marm",
4826 "-march=armv8-a",
4827 "-mfpu=neon-fp-armv8",
4828 ],
4829 aarch32_srcs = NEONV8_UKERNELS,
4830 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004831 apple_aarch32_copts = [
4832 "-mcpu=cyclone",
4833 "-mtune=generic",
4834 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004835 copts = [
4836 "-UNDEBUG",
4837 "-DXNN_TEST_MODE=1",
4838 ],
4839 gcc_copts = xnnpack_gcc_std_copts(),
4840 msvc_copts = xnnpack_msvc_std_copts(),
4841 deps = [
4842 ":tables",
4843 "@FP16",
4844 "@pthreadpool",
4845 ],
4846)
4847
4848xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004849 name = "neonfp16arith_ukernels",
4850 hdrs = INTERNAL_HDRS,
4851 aarch64_copts = ["-march=armv8.2-a+fp16"],
4852 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004853 gcc_copts = xnnpack_gcc_std_copts(),
4854 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004855 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004856 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004857 "@FP16",
4858 "@pthreadpool",
4859 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004860)
4861
4862xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004863 name = "neonfp16arith_ukernels_test_mode",
4864 hdrs = INTERNAL_HDRS,
4865 aarch64_copts = ["-march=armv8.2-a+fp16"],
4866 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4867 copts = [
4868 "-UNDEBUG",
4869 "-DXNN_TEST_MODE=1",
4870 ],
4871 gcc_copts = xnnpack_gcc_std_copts(),
4872 msvc_copts = xnnpack_msvc_std_copts(),
4873 deps = [
4874 ":tables",
4875 "@FP16",
4876 "@pthreadpool",
4877 ],
4878)
4879
4880xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004881 name = "neondot_ukernels",
4882 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004883 aarch32_copts = [
4884 "-marm",
4885 "-march=armv8.2-a+dotprod",
4886 "-mfpu=neon-fp-armv8",
4887 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004888 aarch32_srcs = NEONDOT_UKERNELS,
4889 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4890 aarch64_srcs = NEONDOT_UKERNELS,
4891 gcc_copts = xnnpack_gcc_std_copts(),
4892 msvc_copts = xnnpack_msvc_std_copts(),
4893 deps = [
4894 ":tables",
4895 "@FP16",
4896 "@pthreadpool",
4897 ],
4898)
4899
4900xnnpack_cc_library(
4901 name = "neondot_ukernels_test_mode",
4902 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004903 aarch32_copts = [
4904 "-marm",
4905 "-march=armv8.2-a+dotprod",
4906 "-mfpu=neon-fp-armv8",
4907 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004908 aarch32_srcs = NEONDOT_UKERNELS,
4909 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4910 aarch64_srcs = NEONDOT_UKERNELS,
4911 copts = [
4912 "-UNDEBUG",
4913 "-DXNN_TEST_MODE=1",
4914 ],
4915 gcc_copts = xnnpack_gcc_std_copts(),
4916 msvc_copts = xnnpack_msvc_std_copts(),
4917 deps = [
4918 ":tables",
4919 "@FP16",
4920 "@pthreadpool",
4921 ],
4922)
4923
4924xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004925 name = "sse2_ukernels",
4926 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004927 gcc_copts = xnnpack_gcc_std_copts(),
4928 gcc_x86_copts = ["-msse2"],
4929 msvc_copts = xnnpack_msvc_std_copts(),
4930 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004931 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004932 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004933 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004934 "@FP16",
4935 "@pthreadpool",
4936 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004937)
4938
4939xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004940 name = "sse2_ukernels_test_mode",
4941 hdrs = INTERNAL_HDRS,
4942 copts = [
4943 "-UNDEBUG",
4944 "-DXNN_TEST_MODE=1",
4945 ],
4946 gcc_copts = xnnpack_gcc_std_copts(),
4947 gcc_x86_copts = ["-msse2"],
4948 msvc_copts = xnnpack_msvc_std_copts(),
4949 msvc_x86_32_copts = ["/arch:SSE2"],
4950 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4951 deps = [
4952 ":tables",
4953 "@FP16",
4954 "@pthreadpool",
4955 ],
4956)
4957
4958xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004959 name = "ssse3_ukernels",
4960 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004961 gcc_copts = xnnpack_gcc_std_copts(),
4962 gcc_x86_copts = ["-mssse3"],
4963 msvc_copts = xnnpack_msvc_std_copts(),
4964 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004965 x86_srcs = SSSE3_UKERNELS,
4966 deps = [
4967 ":tables",
4968 "@FP16",
4969 "@pthreadpool",
4970 ],
4971)
4972
4973xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004974 name = "ssse3_ukernels_test_mode",
4975 hdrs = INTERNAL_HDRS,
4976 copts = [
4977 "-UNDEBUG",
4978 "-DXNN_TEST_MODE=1",
4979 ],
4980 gcc_copts = xnnpack_gcc_std_copts(),
4981 gcc_x86_copts = ["-mssse3"],
4982 msvc_copts = xnnpack_msvc_std_copts(),
4983 msvc_x86_32_copts = ["/arch:SSE2"],
4984 x86_srcs = SSSE3_UKERNELS,
4985 deps = [
4986 ":tables",
4987 "@FP16",
4988 "@pthreadpool",
4989 ],
4990)
4991
4992xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004993 name = "sse41_ukernels",
4994 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004995 gcc_copts = xnnpack_gcc_std_copts(),
4996 gcc_x86_copts = ["-msse4.1"],
4997 msvc_copts = xnnpack_msvc_std_copts(),
4998 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004999 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005000 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005001 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005002 "@FP16",
5003 "@pthreadpool",
5004 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005005)
5006
5007xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005008 name = "sse41_ukernels_test_mode",
5009 hdrs = INTERNAL_HDRS,
5010 copts = [
5011 "-UNDEBUG",
5012 "-DXNN_TEST_MODE=1",
5013 ],
5014 gcc_copts = xnnpack_gcc_std_copts(),
5015 gcc_x86_copts = ["-msse4.1"],
5016 msvc_copts = xnnpack_msvc_std_copts(),
5017 msvc_x86_32_copts = ["/arch:SSE2"],
5018 x86_srcs = SSE41_UKERNELS,
5019 deps = [
5020 ":tables",
5021 "@FP16",
5022 "@pthreadpool",
5023 ],
5024)
5025
5026xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005027 name = "avx_ukernels",
5028 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005029 gcc_copts = xnnpack_gcc_std_copts(),
5030 gcc_x86_copts = ["-mavx"],
5031 msvc_copts = xnnpack_msvc_std_copts(),
5032 msvc_x86_32_copts = ["/arch:AVX"],
5033 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005034 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005035 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005036 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005037 "@FP16",
5038 "@pthreadpool",
5039 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005040)
5041
5042xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005043 name = "avx_ukernels_test_mode",
5044 hdrs = INTERNAL_HDRS,
5045 copts = [
5046 "-UNDEBUG",
5047 "-DXNN_TEST_MODE=1",
5048 ],
5049 gcc_copts = xnnpack_gcc_std_copts(),
5050 gcc_x86_copts = ["-mavx"],
5051 msvc_copts = xnnpack_msvc_std_copts(),
5052 msvc_x86_32_copts = ["/arch:AVX"],
5053 msvc_x86_64_copts = ["/arch:AVX"],
5054 x86_srcs = AVX_UKERNELS,
5055 deps = [
5056 ":tables",
5057 "@FP16",
5058 "@pthreadpool",
5059 ],
5060)
5061
5062xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005063 name = "xop_ukernels",
5064 hdrs = INTERNAL_HDRS,
5065 gcc_copts = xnnpack_gcc_std_copts(),
5066 gcc_x86_copts = ["-mxop"],
5067 msvc_copts = xnnpack_msvc_std_copts(),
5068 msvc_x86_32_copts = ["/arch:AVX"],
5069 msvc_x86_64_copts = ["/arch:AVX"],
5070 x86_srcs = XOP_UKERNELS,
5071 deps = [
5072 ":tables",
5073 "@FP16",
5074 "@pthreadpool",
5075 ],
5076)
5077
5078xnnpack_cc_library(
5079 name = "xop_ukernels_test_mode",
5080 hdrs = INTERNAL_HDRS,
5081 copts = [
5082 "-UNDEBUG",
5083 "-DXNN_TEST_MODE=1",
5084 ],
5085 gcc_copts = xnnpack_gcc_std_copts(),
5086 gcc_x86_copts = ["-mxop"],
5087 msvc_copts = xnnpack_msvc_std_copts(),
5088 msvc_x86_32_copts = ["/arch:AVX"],
5089 msvc_x86_64_copts = ["/arch:AVX"],
5090 x86_srcs = XOP_UKERNELS,
5091 deps = [
5092 ":tables",
5093 "@FP16",
5094 "@pthreadpool",
5095 ],
5096)
5097
5098xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005099 name = "fma3_ukernels",
5100 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005101 gcc_copts = xnnpack_gcc_std_copts(),
5102 gcc_x86_copts = ["-mfma"],
5103 msvc_copts = xnnpack_msvc_std_copts(),
5104 msvc_x86_32_copts = ["/arch:AVX"],
5105 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005106 x86_srcs = FMA3_UKERNELS,
5107 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005108 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005109 "@FP16",
5110 "@pthreadpool",
5111 ],
5112)
5113
5114xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005115 name = "fma3_ukernels_test_mode",
5116 hdrs = INTERNAL_HDRS,
5117 copts = [
5118 "-UNDEBUG",
5119 "-DXNN_TEST_MODE=1",
5120 ],
5121 gcc_copts = xnnpack_gcc_std_copts(),
5122 gcc_x86_copts = ["-mfma"],
5123 msvc_copts = xnnpack_msvc_std_copts(),
5124 msvc_x86_32_copts = ["/arch:AVX"],
5125 msvc_x86_64_copts = ["/arch:AVX"],
5126 x86_srcs = FMA3_UKERNELS,
5127 deps = [
5128 ":tables",
5129 "@FP16",
5130 "@pthreadpool",
5131 ],
5132)
5133
5134xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005135 name = "avx2_ukernels",
5136 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005137 gcc_copts = xnnpack_gcc_std_copts(),
5138 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005139 "-mfma",
5140 "-mavx2",
5141 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005142 msvc_copts = xnnpack_msvc_std_copts(),
5143 msvc_x86_32_copts = ["/arch:AVX2"],
5144 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005145 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005146 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005147 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005148 "@FP16",
5149 "@pthreadpool",
5150 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005151)
5152
5153xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005154 name = "avx2_ukernels_test_mode",
5155 hdrs = INTERNAL_HDRS,
5156 copts = [
5157 "-UNDEBUG",
5158 "-DXNN_TEST_MODE=1",
5159 ],
5160 gcc_copts = xnnpack_gcc_std_copts(),
5161 gcc_x86_copts = [
5162 "-mfma",
5163 "-mavx2",
5164 ],
5165 msvc_copts = xnnpack_msvc_std_copts(),
5166 msvc_x86_32_copts = ["/arch:AVX2"],
5167 msvc_x86_64_copts = ["/arch:AVX2"],
5168 x86_srcs = AVX2_UKERNELS,
5169 deps = [
5170 ":tables",
5171 "@FP16",
5172 "@pthreadpool",
5173 ],
5174)
5175
5176xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005177 name = "avx512f_ukernels",
5178 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005179 gcc_copts = xnnpack_gcc_std_copts(),
5180 gcc_x86_copts = ["-mavx512f"],
5181 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5182 msvc_copts = xnnpack_msvc_std_copts(),
5183 msvc_x86_32_copts = ["/arch:AVX512"],
5184 msvc_x86_64_copts = ["/arch:AVX512"],
5185 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005186 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005187 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005188 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005189 "@FP16",
5190 "@pthreadpool",
5191 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005192)
5193
5194xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005195 name = "avx512f_ukernels_test_mode",
5196 hdrs = INTERNAL_HDRS,
5197 copts = [
5198 "-UNDEBUG",
5199 "-DXNN_TEST_MODE=1",
5200 ],
5201 gcc_copts = xnnpack_gcc_std_copts(),
5202 gcc_x86_copts = ["-mavx512f"],
5203 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5204 msvc_copts = xnnpack_msvc_std_copts(),
5205 msvc_x86_32_copts = ["/arch:AVX512"],
5206 msvc_x86_64_copts = ["/arch:AVX512"],
5207 msys_copts = ["-fno-asynchronous-unwind-tables"],
5208 x86_srcs = AVX512F_UKERNELS,
5209 deps = [
5210 ":tables",
5211 "@FP16",
5212 "@pthreadpool",
5213 ],
5214)
5215
5216xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005217 name = "avx512skx_ukernels",
5218 hdrs = INTERNAL_HDRS,
5219 gcc_copts = xnnpack_gcc_std_copts(),
5220 gcc_x86_copts = [
5221 "-mavx512f",
5222 "-mavx512cd",
5223 "-mavx512bw",
5224 "-mavx512dq",
5225 "-mavx512vl",
5226 ],
5227 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5228 msvc_copts = xnnpack_msvc_std_copts(),
5229 msvc_x86_32_copts = ["/arch:AVX512"],
5230 msvc_x86_64_copts = ["/arch:AVX512"],
5231 msys_copts = ["-fno-asynchronous-unwind-tables"],
5232 x86_srcs = AVX512SKX_UKERNELS,
5233 deps = [
5234 ":tables",
5235 "@FP16",
5236 "@pthreadpool",
5237 ],
5238)
5239
5240xnnpack_cc_library(
5241 name = "avx512skx_ukernels_test_mode",
5242 hdrs = INTERNAL_HDRS,
5243 copts = [
5244 "-UNDEBUG",
5245 "-DXNN_TEST_MODE=1",
5246 ],
5247 gcc_copts = xnnpack_gcc_std_copts(),
5248 gcc_x86_copts = [
5249 "-mavx512f",
5250 "-mavx512cd",
5251 "-mavx512bw",
5252 "-mavx512dq",
5253 "-mavx512vl",
5254 ],
5255 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5256 msvc_copts = xnnpack_msvc_std_copts(),
5257 msvc_x86_32_copts = ["/arch:AVX512"],
5258 msvc_x86_64_copts = ["/arch:AVX512"],
5259 msys_copts = ["-fno-asynchronous-unwind-tables"],
5260 x86_srcs = AVX512SKX_UKERNELS,
5261 deps = [
5262 ":tables",
5263 "@FP16",
5264 "@pthreadpool",
5265 ],
5266)
5267
5268xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005269 name = "asm_ukernels",
5270 hdrs = ["src/xnnpack/assembly.h"],
5271 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005272 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005273 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005274 wasm_srcs = WASM32_ASM_UKERNELS,
5275 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005276)
5277
Marat Dukhan3b59de22020-06-03 20:15:19 -07005278xnnpack_cc_library(
5279 name = "logging_utils",
5280 srcs = LOGGING_SRCS,
5281 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5282 copts = LOGGING_COPTS + [
5283 "-Isrc",
5284 "-Iinclude",
5285 ] + select({
5286 ":debug_build": [],
5287 "//conditions:default": xnnpack_min_size_copts(),
5288 }),
5289 gcc_copts = xnnpack_gcc_std_copts(),
5290 msvc_copts = xnnpack_msvc_std_copts(),
5291 visibility = xnnpack_visibility(),
5292 deps = [
5293 "@FP16",
5294 "@clog",
5295 "@pthreadpool",
5296 ],
5297)
5298
Marat Dukhan08c4a432019-10-03 09:29:21 -07005299xnnpack_aggregate_library(
5300 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005301 aarch32_ios_deps = [
5302 ":neon_ukernels",
5303 ":neonfma_ukernels",
5304 ":neonv8_ukernels",
5305 ":asm_ukernels",
5306 ],
5307 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005308 ":neon_ukernels",
5309 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005310 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005311 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005312 ":asm_ukernels",
5313 ],
5314 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005315 ":neon_ukernels",
5316 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005317 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005318 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005319 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005320 ":asm_ukernels",
5321 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005322 generic_deps = [
5323 ":scalar_ukernels",
5324 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005325 wasm_deps = [
5326 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005327 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005328 ],
5329 wasmsimd_deps = [
5330 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005331 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005332 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005333 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005334 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005335 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005336 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005337 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005338 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005339 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005340 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005341 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005342 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005343 ],
5344)
5345
Marat Dukhan33fcf782020-05-24 14:27:15 -07005346xnnpack_aggregate_library(
5347 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005348 aarch32_ios_deps = [
5349 ":neon_ukernels_test_mode",
5350 ":neonfma_ukernels_test_mode",
5351 ":neonv8_ukernels_test_mode",
5352 ":asm_ukernels",
5353 ],
5354 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005355 ":neon_ukernels_test_mode",
5356 ":neonfma_ukernels_test_mode",
5357 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005358 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005359 ":asm_ukernels",
5360 ],
5361 aarch64_deps = [
5362 ":neon_ukernels_test_mode",
5363 ":neonfma_ukernels_test_mode",
5364 ":neonv8_ukernels_test_mode",
5365 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005366 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005367 ":asm_ukernels",
5368 ],
5369 generic_deps = [
5370 ":scalar_ukernels_test_mode",
5371 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005372 wasm_deps = [
5373 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005374 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005375 ],
5376 wasmsimd_deps = [
5377 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005378 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005379 ],
5380 x86_deps = [
5381 ":sse2_ukernels_test_mode",
5382 ":ssse3_ukernels_test_mode",
5383 ":sse41_ukernels_test_mode",
5384 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005385 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005386 ":fma3_ukernels_test_mode",
5387 ":avx2_ukernels_test_mode",
5388 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005389 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005390 ],
5391)
5392
Marat Dukhan08c4a432019-10-03 09:29:21 -07005393xnnpack_cc_library(
5394 name = "im2col",
5395 srcs = ["src/im2col.c"],
5396 hdrs = [
5397 "src/xnnpack/common.h",
5398 "src/xnnpack/im2col.h",
5399 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005400 gcc_copts = xnnpack_gcc_std_copts(),
5401 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005402)
5403
5404xnnpack_cc_library(
5405 name = "indirection",
5406 srcs = ["src/indirection.c"],
5407 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005408 gcc_copts = xnnpack_gcc_std_copts(),
5409 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005410 deps = [
5411 "@FP16",
5412 "@FXdiv",
5413 "@pthreadpool",
5414 ],
5415)
5416
5417xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005418 name = "indirection_test_mode",
5419 srcs = ["src/indirection.c"],
5420 hdrs = INTERNAL_HDRS,
5421 copts = [
5422 "-UNDEBUG",
5423 "-DXNN_TEST_MODE=1",
5424 ],
5425 gcc_copts = xnnpack_gcc_std_copts(),
5426 msvc_copts = xnnpack_msvc_std_copts(),
5427 deps = [
5428 "@FP16",
5429 "@FXdiv",
5430 "@pthreadpool",
5431 ],
5432)
5433
5434xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005435 name = "packing",
5436 srcs = ["src/packing.c"],
5437 hdrs = INTERNAL_HDRS,
5438 gcc_copts = xnnpack_gcc_std_copts(),
5439 msvc_copts = xnnpack_msvc_std_copts(),
5440 deps = [
5441 "@FP16",
5442 "@FXdiv",
5443 "@pthreadpool",
5444 ],
5445)
5446
5447xnnpack_cc_library(
5448 name = "packing_test_mode",
5449 srcs = ["src/packing.c"],
5450 hdrs = INTERNAL_HDRS,
5451 copts = [
5452 "-UNDEBUG",
5453 "-DXNN_TEST_MODE=1",
5454 ],
5455 gcc_copts = xnnpack_gcc_std_copts(),
5456 msvc_copts = xnnpack_msvc_std_copts(),
5457 deps = [
5458 "@FP16",
5459 "@FXdiv",
5460 "@pthreadpool",
5461 ],
5462)
5463
5464xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005465 name = "operator_run",
5466 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005467 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005468 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005469 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5470 "//conditions:default": [],
5471 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005472 gcc_copts = xnnpack_gcc_std_copts(),
5473 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005474 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005475 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005476 "@FP16",
5477 "@FXdiv",
5478 "@clog",
5479 "@pthreadpool",
5480 ],
5481)
5482
Chao Mei6ddfc602020-05-13 22:29:36 -07005483xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005484 name = "operator_run_test_mode",
5485 srcs = ["src/operator-run.c"],
5486 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5487 copts = LOGGING_COPTS + [
5488 "-UNDEBUG",
5489 "-DXNN_TEST_MODE=1",
5490 ] + select({
5491 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5492 "//conditions:default": [],
5493 }),
5494 gcc_copts = xnnpack_gcc_std_copts(),
5495 msvc_copts = xnnpack_msvc_std_copts(),
5496 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005497 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005498 "@FP16",
5499 "@FXdiv",
5500 "@clog",
5501 "@pthreadpool",
5502 ],
5503)
5504
5505xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005506 name = "memory_planner",
5507 srcs = ["src/memory-planner.c"],
5508 hdrs = INTERNAL_HDRS,
5509 defines = select({
5510 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5511 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5512 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5513 }),
5514 gcc_copts = xnnpack_gcc_std_copts(),
5515 msvc_copts = xnnpack_msvc_std_copts(),
5516 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005517 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005518 "@pthreadpool",
5519 ],
5520)
5521
Marat Dukhan33fcf782020-05-24 14:27:15 -07005522xnnpack_cc_library(
5523 name = "memory_planner_test_mode",
5524 srcs = ["src/memory-planner.c"],
5525 hdrs = INTERNAL_HDRS,
5526 copts = [
5527 "-UNDEBUG",
5528 "-DXNN_TEST_MODE=1",
5529 ],
5530 defines = select({
5531 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5532 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5533 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5534 }),
5535 gcc_copts = xnnpack_gcc_std_copts(),
5536 msvc_copts = xnnpack_msvc_std_copts(),
5537 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005538 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005539 "@pthreadpool",
5540 ],
5541)
5542
Marat Dukhan08c4a432019-10-03 09:29:21 -07005543cc_library(
5544 name = "enable_assembly",
5545 defines = select({
5546 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5547 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005548 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005549 }),
5550)
5551
Marat Dukhan9de90e02020-06-18 16:04:12 -07005552cc_library(
5553 name = "enable_sparse",
5554 defines = select({
5555 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5556 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005557 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005558 }),
5559)
5560
Marat Dukhancf056b22019-10-07 10:26:29 -07005561xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005562 name = "operators",
5563 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005564 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005565 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005566 ],
5567 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005568 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005569 "-Isrc",
5570 "-Iinclude",
5571 ] + select({
5572 ":debug_build": [],
5573 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005574 }) + select({
5575 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5576 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005577 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005578 gcc_copts = xnnpack_gcc_std_copts(),
5579 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005580 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005581 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005582 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005583 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005584 "@FP16",
5585 "@FXdiv",
5586 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005587 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005588 ],
5589)
5590
Marat Dukhan10a38082020-04-17 03:58:35 -07005591xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005592 name = "operators_test_mode",
5593 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005594 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005595 "src/operator-delete.c",
5596 ],
5597 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5598 copts = LOGGING_COPTS + [
5599 "-Isrc",
5600 "-Iinclude",
5601 "-UNDEBUG",
5602 "-DXNN_TEST_MODE=1",
5603 ] + select({
5604 ":debug_build": [],
5605 "//conditions:default": xnnpack_min_size_copts(),
5606 }) + select({
5607 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5608 "//conditions:default": [],
5609 }),
5610 gcc_copts = xnnpack_gcc_std_copts(),
5611 msvc_copts = xnnpack_msvc_std_copts(),
5612 deps = [
5613 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005614 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005615 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005616 "@FP16",
5617 "@FXdiv",
5618 "@clog",
5619 "@pthreadpool",
5620 ],
5621)
5622
5623xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005624 name = "XNNPACK",
5625 srcs = [
5626 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005627 "src/runtime.c",
5628 "src/subgraph.c",
5629 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005630 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005631 hdrs = ["include/xnnpack.h"],
5632 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005633 "-Isrc",
5634 "-Iinclude",
5635 ] + select({
5636 ":debug_build": [],
5637 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005638 }) + select({
5639 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5640 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005641 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005642 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005643 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005644 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005645 visibility = xnnpack_visibility(),
5646 deps = [
5647 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005648 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005649 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005650 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005651 ":operator_run",
5652 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005653 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005654 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005655 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005656 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005657 ] + select({
5658 ":emscripten": [],
5659 "//conditions:default": ["@cpuinfo"],
5660 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005661)
5662
Marat Dukhan10a38082020-04-17 03:58:35 -07005663xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005664 name = "XNNPACK_test_mode",
5665 srcs = [
5666 "src/init.c",
5667 "src/runtime.c",
5668 "src/subgraph.c",
5669 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005670 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005671 hdrs = ["include/xnnpack.h"],
5672 copts = LOGGING_COPTS + [
5673 "-Isrc",
5674 "-Iinclude",
5675 "-UNDEBUG",
5676 "-DXNN_TEST_MODE=1",
5677 ] + select({
5678 ":debug_build": [],
5679 "//conditions:default": xnnpack_min_size_copts(),
5680 }) + select({
5681 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5682 "//conditions:default": [],
5683 }),
5684 gcc_copts = xnnpack_gcc_std_copts(),
5685 includes = ["include"],
5686 msvc_copts = xnnpack_msvc_std_copts(),
5687 visibility = xnnpack_visibility(),
5688 deps = [
5689 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005690 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005691 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005692 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005693 ":operator_run_test_mode",
5694 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005695 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005696 "@clog",
5697 "@FP16",
5698 "@pthreadpool",
5699 ] + select({
5700 ":emscripten": [],
5701 "//conditions:default": ["@cpuinfo"],
5702 }),
5703)
5704
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005705# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5706# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005707xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005708 name = "xnnpack_for_tflite",
5709 srcs = [
5710 "src/init.c",
5711 "src/runtime.c",
5712 "src/subgraph.c",
5713 "src/tensor.c",
5714 ] + SUBGRAPH_SRCS,
5715 hdrs = ["include/xnnpack.h"],
5716 copts = LOGGING_COPTS + [
5717 "-Isrc",
5718 "-Iinclude",
5719 ] + select({
5720 ":debug_build": [],
5721 "//conditions:default": xnnpack_min_size_copts(),
5722 }) + select({
5723 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5724 "//conditions:default": [],
5725 }),
5726 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005727 "XNN_NO_QU8_OPERATORS",
5728 "XNN_NO_U8_OPERATORS",
5729 "XNN_NO_X8_OPERATORS",
5730 "XNN_NO_F16_OPERATORS",
5731 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005732 ] + select({
5733 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005734 ":xnn_enable_qs8_explicit_false": [
5735 "XNN_NO_QC8_OPERATORS",
5736 "XNN_NO_QS8_OPERATORS",
5737 ],
5738 "//conditions:default": [
5739 "XNN_NO_QC8_OPERATORS",
5740 "XNN_NO_QS8_OPERATORS",
5741 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005742 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005743 gcc_copts = xnnpack_gcc_std_copts(),
5744 includes = ["include"],
5745 msvc_copts = xnnpack_msvc_std_copts(),
5746 visibility = xnnpack_visibility(),
5747 deps = [
5748 ":enable_assembly",
5749 ":enable_sparse",
5750 ":logging_utils",
5751 ":memory_planner",
5752 ":operator_run",
5753 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005754 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005755 "@clog",
5756 "@FP16",
5757 "@pthreadpool",
5758 ] + select({
5759 ":emscripten": [],
5760 "//conditions:default": ["@cpuinfo"],
5761 }),
5762)
5763
5764# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5765# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5766xnnpack_cc_library(
5767 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005768 srcs = [
5769 "src/init.c",
5770 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005771 hdrs = ["include/xnnpack.h"],
5772 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005773 "-Isrc",
5774 "-Iinclude",
5775 ] + select({
5776 ":debug_build": [],
5777 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005778 }) + select({
5779 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5780 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005781 }),
5782 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005783 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005784 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005785 "XNN_NO_U8_OPERATORS",
5786 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005787 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005788 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005789 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005790 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005791 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005792 visibility = xnnpack_visibility(),
5793 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005794 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005795 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005796 ":operator_run",
5797 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005798 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005799 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005800 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005801 ] + select({
5802 ":emscripten": [],
5803 "//conditions:default": ["@cpuinfo"],
5804 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005805)
5806
Marat Dukhancf056b22019-10-07 10:26:29 -07005807xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005808 name = "bench_utils",
5809 srcs = ["bench/utils.cc"],
5810 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005811 deps = [
5812 "@com_google_benchmark//:benchmark",
5813 "@cpuinfo",
5814 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005815)
5816
Frank Barchard7e955972019-10-11 10:34:25 -07005817######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005818
5819xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005820 name = "qs8_gemm_bench",
5821 srcs = [
5822 "bench/gemm.h",
5823 "bench/qs8-gemm.cc",
5824 "src/xnnpack/AlignedAllocator.h",
5825 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005826 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5827 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005828)
5829
5830xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005831 name = "qs8_requantization_bench",
5832 srcs = [
5833 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005834 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005835 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005836 ] + MICROKERNEL_BENCHMARK_HDRS,
5837 deps = MICROKERNEL_BENCHMARK_DEPS,
5838)
5839
5840xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005841 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005842 srcs = [
5843 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005844 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005845 "src/xnnpack/AlignedAllocator.h",
5846 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005847 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005848 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005849)
5850
5851xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005852 name = "qu8_requantization_bench",
5853 srcs = [
5854 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005855 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005856 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005857 ] + MICROKERNEL_BENCHMARK_HDRS,
5858 deps = MICROKERNEL_BENCHMARK_DEPS,
5859)
5860
5861xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005862 name = "f16_igemm_bench",
5863 srcs = [
5864 "bench/f16-igemm.cc",
5865 "bench/conv.h",
5866 "bench/google/conv.h",
5867 "src/xnnpack/AlignedAllocator.h",
5868 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005869 deps = MICROKERNEL_BENCHMARK_DEPS + [
5870 ":indirection",
5871 ":packing",
5872 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005873)
5874
5875xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005876 name = "f16_gemm_bench",
5877 srcs = [
5878 "bench/f16-gemm.cc",
5879 "bench/gemm.h",
5880 "src/xnnpack/AlignedAllocator.h",
5881 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005882 deps = MICROKERNEL_BENCHMARK_DEPS + [
5883 ":packing",
5884 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005885)
5886
5887xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005888 name = "f16_spmm_bench",
5889 srcs = [
5890 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005891 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005892 "src/xnnpack/AlignedAllocator.h",
5893 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005894 deps = MICROKERNEL_BENCHMARK_DEPS,
5895)
5896
5897xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005898 name = "f16_vrelu_bench",
5899 srcs = [
5900 "bench/f16-vrelu.cc",
5901 "src/xnnpack/AlignedAllocator.h",
5902 ] + MICROKERNEL_BENCHMARK_HDRS,
5903 deps = MICROKERNEL_BENCHMARK_DEPS,
5904)
5905
5906xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005907 name = "f32_igemm_bench",
5908 srcs = [
5909 "bench/f32-igemm.cc",
5910 "bench/conv.h",
5911 "src/xnnpack/AlignedAllocator.h",
5912 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005913 deps = MICROKERNEL_BENCHMARK_DEPS + [
5914 ":indirection",
5915 ":packing",
5916 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005917)
5918
5919xnnpack_benchmark(
5920 name = "f32_conv_hwc_bench",
5921 srcs = [
5922 "bench/f32-conv-hwc.cc",
5923 "bench/dconv.h",
5924 "src/xnnpack/AlignedAllocator.h",
5925 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005926 deps = MICROKERNEL_BENCHMARK_DEPS + [
5927 ":packing",
5928 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005929)
5930
5931xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005932 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005933 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005934 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005935 "bench/dconv.h",
5936 "src/xnnpack/AlignedAllocator.h",
5937 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005938 deps = MICROKERNEL_BENCHMARK_DEPS + [
5939 ":packing",
5940 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005941)
5942
5943xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005944 name = "f16_dwconv_bench",
5945 srcs = [
5946 "bench/f16-dwconv.cc",
5947 "bench/dwconv.h",
5948 "bench/google/dwconv.h",
5949 "src/xnnpack/AlignedAllocator.h",
5950 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005951 deps = MICROKERNEL_BENCHMARK_DEPS + [
5952 ":indirection",
5953 ":packing",
5954 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005955)
5956
5957xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005958 name = "f32_dwconv_bench",
5959 srcs = [
5960 "bench/f32-dwconv.cc",
5961 "bench/dwconv.h",
5962 "src/xnnpack/AlignedAllocator.h",
5963 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005964 deps = MICROKERNEL_BENCHMARK_DEPS + [
5965 ":indirection",
5966 ":packing",
5967 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005968)
5969
5970xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005971 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005972 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005973 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005974 "bench/dwconv.h",
5975 "src/xnnpack/AlignedAllocator.h",
5976 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005977 deps = MICROKERNEL_BENCHMARK_DEPS + [
5978 ":indirection",
5979 ":packing",
5980 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005981)
5982
5983xnnpack_benchmark(
5984 name = "f32_gemm_bench",
5985 srcs = [
5986 "bench/f32-gemm.cc",
5987 "bench/gemm.h",
5988 "src/xnnpack/AlignedAllocator.h",
5989 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005990 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005991 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005992)
5993
5994xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005995 name = "f32_raddexpminusmax_bench",
5996 srcs = [
5997 "bench/f32-raddexpminusmax.cc",
5998 "src/xnnpack/AlignedAllocator.h",
5999 ] + MICROKERNEL_BENCHMARK_HDRS,
6000 deps = MICROKERNEL_BENCHMARK_DEPS,
6001)
6002
6003xnnpack_benchmark(
6004 name = "f32_raddextexp_bench",
6005 srcs = [
6006 "bench/f32-raddextexp.cc",
6007 "src/xnnpack/AlignedAllocator.h",
6008 ] + MICROKERNEL_BENCHMARK_HDRS,
6009 deps = MICROKERNEL_BENCHMARK_DEPS,
6010)
6011
6012xnnpack_benchmark(
6013 name = "f32_raddstoreexpminusmax_bench",
6014 srcs = [
6015 "bench/f32-raddstoreexpminusmax.cc",
6016 "src/xnnpack/AlignedAllocator.h",
6017 ] + MICROKERNEL_BENCHMARK_HDRS,
6018 deps = MICROKERNEL_BENCHMARK_DEPS,
6019)
6020
6021xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006022 name = "f32_rmax_bench",
6023 srcs = [
6024 "bench/f32-rmax.cc",
6025 "src/xnnpack/AlignedAllocator.h",
6026 ] + MICROKERNEL_BENCHMARK_HDRS,
6027 deps = MICROKERNEL_BENCHMARK_DEPS,
6028)
6029
6030xnnpack_benchmark(
6031 name = "f32_spmm_bench",
6032 srcs = [
6033 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006034 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006035 "src/xnnpack/AlignedAllocator.h",
6036 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006037 deps = MICROKERNEL_BENCHMARK_DEPS,
6038)
6039
6040xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006041 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006042 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006043 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006044 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006045 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006046 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006047)
6048
6049xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006050 name = "f32_velu_bench",
6051 srcs = [
6052 "bench/f32-velu.cc",
6053 "src/xnnpack/AlignedAllocator.h",
6054 ] + MICROKERNEL_BENCHMARK_HDRS,
6055 deps = MICROKERNEL_BENCHMARK_DEPS,
6056)
6057
6058xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006059 name = "f32_vhswish_bench",
6060 srcs = [
6061 "bench/f32-vhswish.cc",
6062 "src/xnnpack/AlignedAllocator.h",
6063 ] + MICROKERNEL_BENCHMARK_HDRS,
6064 deps = MICROKERNEL_BENCHMARK_DEPS,
6065)
6066
6067xnnpack_benchmark(
6068 name = "f32_vrelu_bench",
6069 srcs = [
6070 "bench/f32-vrelu.cc",
6071 "src/xnnpack/AlignedAllocator.h",
6072 ] + MICROKERNEL_BENCHMARK_HDRS,
6073 deps = MICROKERNEL_BENCHMARK_DEPS,
6074)
6075
6076xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006077 name = "f32_vscaleexpminusmax_bench",
6078 srcs = [
6079 "bench/f32-vscaleexpminusmax.cc",
6080 "src/xnnpack/AlignedAllocator.h",
6081 ] + MICROKERNEL_BENCHMARK_HDRS,
6082 deps = MICROKERNEL_BENCHMARK_DEPS,
6083)
6084
6085xnnpack_benchmark(
6086 name = "f32_vscaleextexp_bench",
6087 srcs = [
6088 "bench/f32-vscaleextexp.cc",
6089 "src/xnnpack/AlignedAllocator.h",
6090 ] + MICROKERNEL_BENCHMARK_HDRS,
6091 deps = MICROKERNEL_BENCHMARK_DEPS,
6092)
6093
6094xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006095 name = "f32_vsigmoid_bench",
6096 srcs = [
6097 "bench/f32-vsigmoid.cc",
6098 "src/xnnpack/AlignedAllocator.h",
6099 ] + MICROKERNEL_BENCHMARK_HDRS,
6100 deps = MICROKERNEL_BENCHMARK_DEPS,
6101)
6102
6103xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006104 name = "f32_vsqrt_bench",
6105 srcs = [
6106 "bench/f32-vsqrt.cc",
6107 "src/xnnpack/AlignedAllocator.h",
6108 ] + MICROKERNEL_BENCHMARK_HDRS,
6109 deps = MICROKERNEL_BENCHMARK_DEPS,
6110)
6111
6112xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006113 name = "f32_im2col_gemm_bench",
6114 srcs = [
6115 "bench/f32-im2col-gemm.cc",
6116 "bench/conv.h",
6117 "src/xnnpack/AlignedAllocator.h",
6118 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006119 deps = MICROKERNEL_BENCHMARK_DEPS + [
6120 ":im2col",
6121 ":packing",
6122 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006123)
6124
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006125xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006126 name = "rounding_bench",
6127 srcs = [
6128 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006129 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006130 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006131 ] + MICROKERNEL_BENCHMARK_HDRS,
6132 deps = MICROKERNEL_BENCHMARK_DEPS,
6133)
6134
Marat Dukhan08c4a432019-10-03 09:29:21 -07006135########################### Benchmarks for operators ###########################
6136
6137xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006138 name = "average_pooling_bench",
6139 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006140 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006141 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006142 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006143)
6144
6145xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006146 name = "bankers_rounding_bench",
6147 srcs = ["bench/bankers-rounding.cc"],
6148 copts = xnnpack_optional_tflite_copts(),
6149 tags = ["nowin32"],
6150 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6151)
6152
6153xnnpack_benchmark(
6154 name = "ceiling_bench",
6155 srcs = ["bench/ceiling.cc"],
6156 copts = xnnpack_optional_tflite_copts(),
6157 tags = ["nowin32"],
6158 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6159)
6160
6161xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006162 name = "channel_shuffle_bench",
6163 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006164 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006165)
6166
6167xnnpack_benchmark(
6168 name = "convolution_bench",
6169 srcs = ["bench/convolution.cc"],
6170 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006171 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006172 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006173)
6174
6175xnnpack_benchmark(
6176 name = "deconvolution_bench",
6177 srcs = ["bench/deconvolution.cc"],
6178 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006179 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006180 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006181)
6182
6183xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006184 name = "elu_bench",
6185 srcs = ["bench/elu.cc"],
6186 copts = xnnpack_optional_tflite_copts(),
6187 tags = ["nowin32"],
6188 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6189)
6190
6191xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006192 name = "floor_bench",
6193 srcs = ["bench/floor.cc"],
6194 copts = xnnpack_optional_tflite_copts(),
6195 tags = ["nowin32"],
6196 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6197)
6198
6199xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006200 name = "global_average_pooling_bench",
6201 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006202 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006203)
6204
6205xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006206 name = "hardswish_bench",
6207 srcs = ["bench/hardswish.cc"],
6208 copts = xnnpack_optional_tflite_copts(),
6209 tags = ["nowin32"],
6210 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6211)
6212
6213xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006214 name = "max_pooling_bench",
6215 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006216 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006217)
6218
6219xnnpack_benchmark(
6220 name = "sigmoid_bench",
6221 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006222 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006223 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006224 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006225)
6226
6227xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006228 name = "prelu_bench",
6229 srcs = ["bench/prelu.cc"],
6230 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006231 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006232 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006233)
6234
6235xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006236 name = "softmax_bench",
6237 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006238 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006239 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006240 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006241)
6242
Marat Dukhan87727142020-06-24 15:24:10 -07006243xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006244 name = "square_root_bench",
6245 srcs = ["bench/square-root.cc"],
6246 copts = xnnpack_optional_tflite_copts(),
6247 tags = ["nowin32"],
6248 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6249)
6250
6251xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006252 name = "truncation_bench",
6253 srcs = ["bench/truncation.cc"],
6254 deps = OPERATOR_BENCHMARK_DEPS,
6255)
6256
Marat Dukhanc068bb62019-10-04 13:24:39 -07006257############################# End-to-end benchmarks ############################
6258
6259cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006260 name = "fp32_mobilenet_v1",
6261 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006262 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006263 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006264 linkstatic = True,
6265 deps = [
6266 ":XNNPACK",
6267 "@pthreadpool",
6268 ],
6269)
6270
6271cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006272 name = "fp32_sparse_mobilenet_v1",
6273 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6274 hdrs = ["models/models.h"],
6275 copts = xnnpack_std_cxxopts(),
6276 linkstatic = True,
6277 deps = [
6278 ":XNNPACK",
6279 "@pthreadpool",
6280 ],
6281)
6282
6283cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006284 name = "fp16_mobilenet_v1",
6285 srcs = ["models/fp16-mobilenet-v1.cc"],
6286 hdrs = ["models/models.h"],
6287 copts = xnnpack_std_cxxopts(),
6288 linkstatic = True,
6289 deps = [
6290 ":XNNPACK",
6291 "@FP16",
6292 "@pthreadpool",
6293 ],
6294)
6295
6296cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006297 name = "qs8_mobilenet_v1",
6298 srcs = ["models/qs8-mobilenet-v1.cc"],
6299 hdrs = ["models/models.h"],
6300 copts = xnnpack_std_cxxopts(),
6301 linkstatic = True,
6302 deps = [
6303 ":XNNPACK",
6304 "@pthreadpool",
6305 ],
6306)
6307
6308cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006309 name = "qs8_mobilenet_v2",
6310 srcs = ["models/qs8-mobilenet-v2.cc"],
6311 hdrs = ["models/models.h"],
6312 copts = xnnpack_std_cxxopts(),
6313 linkstatic = True,
6314 deps = [
6315 ":XNNPACK",
6316 "@pthreadpool",
6317 ],
6318)
6319
6320cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006321 name = "qu8_mobilenet_v1",
6322 srcs = ["models/qu8-mobilenet-v1.cc"],
6323 hdrs = ["models/models.h"],
6324 copts = xnnpack_std_cxxopts(),
6325 linkstatic = True,
6326 deps = [
6327 ":XNNPACK",
6328 "@pthreadpool",
6329 ],
6330)
6331
6332cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006333 name = "fp32_mobilenet_v2",
6334 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006335 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006336 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006337 linkstatic = True,
6338 deps = [
6339 ":XNNPACK",
6340 "@pthreadpool",
6341 ],
6342)
6343
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006344cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006345 name = "fp32_sparse_mobilenet_v2",
6346 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6347 hdrs = ["models/models.h"],
6348 copts = xnnpack_std_cxxopts(),
6349 linkstatic = True,
6350 deps = [
6351 ":XNNPACK",
6352 "@pthreadpool",
6353 ],
6354)
6355
6356cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006357 name = "fp16_mobilenet_v2",
6358 srcs = ["models/fp16-mobilenet-v2.cc"],
6359 hdrs = ["models/models.h"],
6360 copts = xnnpack_std_cxxopts(),
6361 linkstatic = True,
6362 deps = [
6363 ":XNNPACK",
6364 "@FP16",
6365 "@pthreadpool",
6366 ],
6367)
6368
6369cc_library(
6370 name = "fp32_mobilenet_v3_large",
6371 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006372 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006373 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006374 linkstatic = True,
6375 deps = [
6376 ":XNNPACK",
6377 "@pthreadpool",
6378 ],
6379)
6380
6381cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006382 name = "fp32_sparse_mobilenet_v3_large",
6383 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6384 hdrs = ["models/models.h"],
6385 copts = xnnpack_std_cxxopts(),
6386 linkstatic = True,
6387 deps = [
6388 ":XNNPACK",
6389 "@pthreadpool",
6390 ],
6391)
6392
6393cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006394 name = "fp16_mobilenet_v3_large",
6395 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6396 hdrs = ["models/models.h"],
6397 copts = xnnpack_std_cxxopts(),
6398 linkstatic = True,
6399 deps = [
6400 ":XNNPACK",
6401 "@FP16",
6402 "@pthreadpool",
6403 ],
6404)
6405
6406cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006407 name = "fp32_mobilenet_v3_small",
6408 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006409 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006410 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006411 linkstatic = True,
6412 deps = [
6413 ":XNNPACK",
6414 "@pthreadpool",
6415 ],
6416)
6417
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006418cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006419 name = "fp32_sparse_mobilenet_v3_small",
6420 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6421 hdrs = ["models/models.h"],
6422 copts = xnnpack_std_cxxopts(),
6423 linkstatic = True,
6424 deps = [
6425 ":XNNPACK",
6426 "@pthreadpool",
6427 ],
6428)
6429
6430cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006431 name = "fp16_mobilenet_v3_small",
6432 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6433 hdrs = ["models/models.h"],
6434 copts = xnnpack_std_cxxopts(),
6435 linkstatic = True,
6436 deps = [
6437 ":XNNPACK",
6438 "@FP16",
6439 "@pthreadpool",
6440 ],
6441)
6442
Marat Dukhanc068bb62019-10-04 13:24:39 -07006443xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006444 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006445 srcs = [
6446 "bench/f32-dwconv-e2e.cc",
6447 "bench/end2end.h",
6448 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006449 deps = MICROKERNEL_BENCHMARK_DEPS + [
6450 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006451 ":fp32_mobilenet_v1",
6452 ":fp32_mobilenet_v2",
6453 ":fp32_mobilenet_v3_large",
6454 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006455 ],
6456)
6457
6458xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006459 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006460 srcs = [
6461 "bench/f32-gemm-e2e.cc",
6462 "bench/end2end.h",
6463 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006464 deps = MICROKERNEL_BENCHMARK_DEPS + [
6465 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006466 ":fp32_mobilenet_v1",
6467 ":fp32_mobilenet_v2",
6468 ":fp32_mobilenet_v3_large",
6469 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006470 ],
6471)
6472
6473xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006474 name = "qs8_gemm_e2e_bench",
6475 srcs = [
6476 "bench/qs8-gemm-e2e.cc",
6477 "bench/end2end.h",
6478 ] + MICROKERNEL_BENCHMARK_HDRS,
6479 deps = MICROKERNEL_BENCHMARK_DEPS + [
6480 ":XNNPACK",
6481 ":qs8_mobilenet_v1",
6482 ":qs8_mobilenet_v2",
6483 ],
6484)
6485
6486xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006487 name = "end2end_bench",
6488 srcs = ["bench/end2end.cc"],
6489 deps = [
6490 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006491 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006492 ":fp16_mobilenet_v1",
6493 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006494 ":fp16_mobilenet_v3_large",
6495 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006496 ":fp32_mobilenet_v1",
6497 ":fp32_mobilenet_v2",
6498 ":fp32_mobilenet_v3_large",
6499 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006500 ":fp32_sparse_mobilenet_v1",
6501 ":fp32_sparse_mobilenet_v2",
6502 ":fp32_sparse_mobilenet_v3_large",
6503 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006504 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006505 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006506 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006507 "@pthreadpool",
6508 ],
6509)
6510
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006511#################### Accuracy evaluation for math functions ####################
6512
6513xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006514 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006515 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006516 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006517 "src/xnnpack/AlignedAllocator.h",
6518 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006519 deps = ACCURACY_EVAL_DEPS + [
6520 ":bench_utils",
6521 "@cpuinfo",
6522 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006523)
6524
Marat Dukhan515c9772019-10-17 18:07:57 -07006525xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006526 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006527 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006528 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006529 "src/xnnpack/AlignedAllocator.h",
6530 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006531 deps = ACCURACY_EVAL_DEPS + [
6532 ":bench_utils",
6533 "@cpuinfo",
6534 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006535)
6536
Marat Dukhan98ba4412019-10-23 02:14:28 -07006537xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006538 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006539 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006540 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006541 "src/xnnpack/AlignedAllocator.h",
6542 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006543 deps = ACCURACY_EVAL_DEPS + [
6544 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006545 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006546 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006547)
6548
6549xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006550 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006551 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006552 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006553 "src/xnnpack/AlignedAllocator.h",
6554 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006555 deps = ACCURACY_EVAL_DEPS + [
6556 ":bench_utils",
6557 "@cpuinfo",
6558 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006559)
6560
Marat Dukhanf44f0222020-12-14 11:53:27 -08006561xnnpack_benchmark(
6562 name = "f32_sigmoid_ulp_eval",
6563 srcs = [
6564 "eval/f32-sigmoid-ulp.cc",
6565 "src/xnnpack/AlignedAllocator.h",
6566 ] + ACCURACY_EVAL_HDRS,
6567 deps = ACCURACY_EVAL_DEPS + [
6568 ":bench_utils",
6569 "@cpuinfo",
6570 ],
6571)
6572
6573xnnpack_benchmark(
6574 name = "f32_sqrt_ulp_eval",
6575 srcs = [
6576 "eval/f32-sqrt-ulp.cc",
6577 "src/xnnpack/AlignedAllocator.h",
6578 ] + ACCURACY_EVAL_HDRS,
6579 deps = ACCURACY_EVAL_DEPS + [
6580 ":bench_utils",
6581 "@cpuinfo",
6582 ],
6583)
6584
6585################### Accuracy verification for math functions ##################
6586
6587xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006588 name = "f32_exp_eval",
6589 srcs = [
6590 "eval/f32-exp.cc",
6591 "src/xnnpack/AlignedAllocator.h",
6592 "src/xnnpack/math-stubs.h",
6593 ] + MICROKERNEL_TEST_HDRS,
6594 automatic = False,
6595 deps = MICROKERNEL_TEST_DEPS,
6596)
6597
6598xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006599 name = "f32_expm1minus_eval",
6600 srcs = [
6601 "eval/f32-expm1minus.cc",
6602 "src/xnnpack/AlignedAllocator.h",
6603 "src/xnnpack/math-stubs.h",
6604 ] + MICROKERNEL_TEST_HDRS,
6605 automatic = False,
6606 deps = MICROKERNEL_TEST_DEPS,
6607)
6608
Marat Dukhan8853b822020-05-07 12:19:01 -07006609xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006610 name = "f32_expminus_eval",
6611 srcs = [
6612 "eval/f32-expminus.cc",
6613 "src/xnnpack/AlignedAllocator.h",
6614 "src/xnnpack/math-stubs.h",
6615 ] + MICROKERNEL_TEST_HDRS,
6616 automatic = False,
6617 deps = MICROKERNEL_TEST_DEPS,
6618)
6619
6620xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006621 name = "f32_roundne_eval",
6622 srcs = [
6623 "eval/f32-roundne.cc",
6624 "src/xnnpack/AlignedAllocator.h",
6625 "src/xnnpack/math-stubs.h",
6626 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006627 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006628 deps = MICROKERNEL_TEST_DEPS,
6629)
6630
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006631xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006632 name = "f32_roundd_eval",
6633 srcs = [
6634 "eval/f32-roundd.cc",
6635 "src/xnnpack/AlignedAllocator.h",
6636 "src/xnnpack/math-stubs.h",
6637 ] + MICROKERNEL_TEST_HDRS,
6638 automatic = False,
6639 deps = MICROKERNEL_TEST_DEPS,
6640)
6641
6642xnnpack_unit_test(
6643 name = "f32_roundu_eval",
6644 srcs = [
6645 "eval/f32-roundu.cc",
6646 "src/xnnpack/AlignedAllocator.h",
6647 "src/xnnpack/math-stubs.h",
6648 ] + MICROKERNEL_TEST_HDRS,
6649 automatic = False,
6650 deps = MICROKERNEL_TEST_DEPS,
6651)
6652
6653xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006654 name = "f32_roundz_eval",
6655 srcs = [
6656 "eval/f32-roundz.cc",
6657 "src/xnnpack/AlignedAllocator.h",
6658 "src/xnnpack/math-stubs.h",
6659 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006660 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006661 deps = MICROKERNEL_TEST_DEPS,
6662)
6663
Marat Dukhan08c4a432019-10-03 09:29:21 -07006664######################### Unit tests for micro-kernels #########################
6665
6666xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006667 name = "f16_dwconv_minmax_test",
6668 srcs = [
6669 "test/f16-dwconv-minmax.cc",
6670 "test/dwconv-microkernel-tester.h",
6671 "src/xnnpack/AlignedAllocator.h",
6672 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6673 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6674)
6675
6676xnnpack_unit_test(
6677 name = "f16_gavgpool_minmax_test",
6678 srcs = [
6679 "test/f16-gavgpool-minmax.cc",
6680 "test/gavgpool-microkernel-tester.h",
6681 "src/xnnpack/AlignedAllocator.h",
6682 ] + MICROKERNEL_TEST_HDRS,
6683 deps = MICROKERNEL_TEST_DEPS,
6684)
6685
6686xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006687 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006688 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006689 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006690 "test/gemm-microkernel-tester.h",
6691 "src/xnnpack/AlignedAllocator.h",
6692 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006693 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006694)
6695
6696xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006697 name = "f16_igemm_minmax_test",
6698 srcs = [
6699 "test/f16-igemm-minmax.cc",
6700 "test/gemm-microkernel-tester.h",
6701 "src/xnnpack/AlignedAllocator.h",
6702 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6703 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6704)
6705
6706xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006707 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006708 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006709 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006710 "test/spmm-microkernel-tester.h",
6711 "src/xnnpack/AlignedAllocator.h",
6712 ] + MICROKERNEL_TEST_HDRS,
6713 deps = MICROKERNEL_TEST_DEPS,
6714)
6715
6716xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006717 name = "f16_vadd_minmax_test",
6718 srcs = [
6719 "test/f16-vadd-minmax.cc",
6720 "test/vbinary-microkernel-tester.h",
6721 ] + MICROKERNEL_TEST_HDRS,
6722 deps = MICROKERNEL_TEST_DEPS,
6723)
6724
6725xnnpack_unit_test(
6726 name = "f16_vaddc_minmax_test",
6727 srcs = [
6728 "test/f16-vaddc-minmax.cc",
6729 "test/vbinaryc-microkernel-tester.h",
6730 ] + MICROKERNEL_TEST_HDRS,
6731 deps = MICROKERNEL_TEST_DEPS,
6732)
6733
6734xnnpack_unit_test(
6735 name = "f16_vclamp_test",
6736 srcs = [
6737 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006738 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006739 ] + MICROKERNEL_TEST_HDRS,
6740 deps = MICROKERNEL_TEST_DEPS,
6741)
6742
6743xnnpack_unit_test(
6744 name = "f16_vdiv_minmax_test",
6745 srcs = [
6746 "test/f16-vdiv-minmax.cc",
6747 "test/vbinary-microkernel-tester.h",
6748 ] + MICROKERNEL_TEST_HDRS,
6749 deps = MICROKERNEL_TEST_DEPS,
6750)
6751
6752xnnpack_unit_test(
6753 name = "f16_vdivc_minmax_test",
6754 srcs = [
6755 "test/f16-vdivc-minmax.cc",
6756 "test/vbinaryc-microkernel-tester.h",
6757 ] + MICROKERNEL_TEST_HDRS,
6758 deps = MICROKERNEL_TEST_DEPS,
6759)
6760
6761xnnpack_unit_test(
6762 name = "f16_vrdivc_minmax_test",
6763 srcs = [
6764 "test/f16-vrdivc-minmax.cc",
6765 "test/vbinaryc-microkernel-tester.h",
6766 ] + MICROKERNEL_TEST_HDRS,
6767 deps = MICROKERNEL_TEST_DEPS,
6768)
6769
6770xnnpack_unit_test(
6771 name = "f16_vhswish_test",
6772 srcs = [
6773 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006774 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006775 ] + MICROKERNEL_TEST_HDRS,
6776 deps = MICROKERNEL_TEST_DEPS,
6777)
6778
6779xnnpack_unit_test(
6780 name = "f16_vmax_test",
6781 srcs = [
6782 "test/f16-vmax.cc",
6783 "test/vbinary-microkernel-tester.h",
6784 ] + MICROKERNEL_TEST_HDRS,
6785 deps = MICROKERNEL_TEST_DEPS,
6786)
6787
6788xnnpack_unit_test(
6789 name = "f16_vmaxc_test",
6790 srcs = [
6791 "test/f16-vmaxc.cc",
6792 "test/vbinaryc-microkernel-tester.h",
6793 ] + MICROKERNEL_TEST_HDRS,
6794 deps = MICROKERNEL_TEST_DEPS,
6795)
6796
6797xnnpack_unit_test(
6798 name = "f16_vmin_test",
6799 srcs = [
6800 "test/f16-vmin.cc",
6801 "test/vbinary-microkernel-tester.h",
6802 ] + MICROKERNEL_TEST_HDRS,
6803 deps = MICROKERNEL_TEST_DEPS,
6804)
6805
6806xnnpack_unit_test(
6807 name = "f16_vminc_test",
6808 srcs = [
6809 "test/f16-vminc.cc",
6810 "test/vbinaryc-microkernel-tester.h",
6811 ] + MICROKERNEL_TEST_HDRS,
6812 deps = MICROKERNEL_TEST_DEPS,
6813)
6814
6815xnnpack_unit_test(
6816 name = "f16_vmul_minmax_test",
6817 srcs = [
6818 "test/f16-vmul-minmax.cc",
6819 "test/vbinary-microkernel-tester.h",
6820 ] + MICROKERNEL_TEST_HDRS,
6821 deps = MICROKERNEL_TEST_DEPS,
6822)
6823
6824xnnpack_unit_test(
6825 name = "f16_vmulc_minmax_test",
6826 srcs = [
6827 "test/f16-vmulc-minmax.cc",
6828 "test/vbinaryc-microkernel-tester.h",
6829 ] + MICROKERNEL_TEST_HDRS,
6830 deps = MICROKERNEL_TEST_DEPS,
6831)
6832
6833xnnpack_unit_test(
6834 name = "f16_vmulcaddc_minmax_test",
6835 srcs = [
6836 "test/f16-vmulcaddc-minmax.cc",
6837 "test/vmulcaddc-microkernel-tester.h",
6838 "src/xnnpack/AlignedAllocator.h",
6839 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6840 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6841)
6842
6843xnnpack_unit_test(
6844 name = "f16_vsub_minmax_test",
6845 srcs = [
6846 "test/f16-vsub-minmax.cc",
6847 "test/vbinary-microkernel-tester.h",
6848 ] + MICROKERNEL_TEST_HDRS,
6849 deps = MICROKERNEL_TEST_DEPS,
6850)
6851
6852xnnpack_unit_test(
6853 name = "f16_vsubc_minmax_test",
6854 srcs = [
6855 "test/f16-vsubc-minmax.cc",
6856 "test/vbinaryc-microkernel-tester.h",
6857 ] + MICROKERNEL_TEST_HDRS,
6858 deps = MICROKERNEL_TEST_DEPS,
6859)
6860
6861xnnpack_unit_test(
6862 name = "f16_vrsubc_minmax_test",
6863 srcs = [
6864 "test/f16-vrsubc-minmax.cc",
6865 "test/vbinaryc-microkernel-tester.h",
6866 ] + MICROKERNEL_TEST_HDRS,
6867 deps = MICROKERNEL_TEST_DEPS,
6868)
6869
6870xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006871 name = "f32_argmaxpool_test",
6872 srcs = [
6873 "test/f32-argmaxpool.cc",
6874 "test/argmaxpool-microkernel-tester.h",
6875 "src/xnnpack/AlignedAllocator.h",
6876 ] + MICROKERNEL_TEST_HDRS,
6877 deps = MICROKERNEL_TEST_DEPS,
6878)
6879
6880xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006881 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006882 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006883 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006884 "test/avgpool-microkernel-tester.h",
6885 "src/xnnpack/AlignedAllocator.h",
6886 ] + MICROKERNEL_TEST_HDRS,
6887 deps = MICROKERNEL_TEST_DEPS,
6888)
6889
6890xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006891 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006892 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006893 "test/f32-ibilinear.cc",
6894 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006895 "src/xnnpack/AlignedAllocator.h",
6896 ] + MICROKERNEL_TEST_HDRS,
6897 deps = MICROKERNEL_TEST_DEPS,
6898)
6899
6900xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006901 name = "f32_ibilinear_chw_test",
6902 srcs = [
6903 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006904 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006905 "src/xnnpack/AlignedAllocator.h",
6906 ] + MICROKERNEL_TEST_HDRS,
6907 deps = MICROKERNEL_TEST_DEPS,
6908)
6909
6910xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006911 name = "f32_igemm_test",
6912 srcs = [
6913 "test/f32-igemm.cc",
6914 "test/gemm-microkernel-tester.h",
6915 "src/xnnpack/AlignedAllocator.h",
6916 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006917 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006918)
6919
6920xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006921 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006922 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006923 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006924 "test/gemm-microkernel-tester.h",
6925 "src/xnnpack/AlignedAllocator.h",
6926 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006927 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006928)
6929
6930xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006931 name = "f32_igemm_minmax_test",
6932 srcs = [
6933 "test/f32-igemm-minmax.cc",
6934 "test/gemm-microkernel-tester.h",
6935 "src/xnnpack/AlignedAllocator.h",
6936 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006937 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006938)
6939
6940xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006941 name = "f32_conv_hwc_test",
6942 srcs = [
6943 "test/f32-conv-hwc.cc",
6944 "test/conv-hwc-microkernel-tester.h",
6945 "src/xnnpack/AlignedAllocator.h",
6946 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006947 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006948)
6949
6950xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006951 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006952 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006953 "test/f32-conv-hwc2chw.cc",
6954 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006955 "src/xnnpack/AlignedAllocator.h",
6956 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006957 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006958)
6959
6960xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006961 name = "f32_dwconv_test",
6962 srcs = [
6963 "test/f32-dwconv.cc",
6964 "test/dwconv-microkernel-tester.h",
6965 "src/xnnpack/AlignedAllocator.h",
6966 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006967 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006968)
6969
6970xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006971 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006972 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006973 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006974 "test/dwconv-microkernel-tester.h",
6975 "src/xnnpack/AlignedAllocator.h",
6976 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006977 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006978)
6979
6980xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006981 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006982 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006983 "test/f32-dwconv2d-chw.cc",
6984 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006985 "src/xnnpack/AlignedAllocator.h",
6986 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006987 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006988)
6989
6990xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006991 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006992 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006993 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006994 "test/gavgpool-microkernel-tester.h",
6995 "src/xnnpack/AlignedAllocator.h",
6996 ] + MICROKERNEL_TEST_HDRS,
6997 deps = MICROKERNEL_TEST_DEPS,
6998)
6999
7000xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007001 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007002 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007003 "test/f32-gavgpool-cw.cc",
7004 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007005 "src/xnnpack/AlignedAllocator.h",
7006 ] + MICROKERNEL_TEST_HDRS,
7007 deps = MICROKERNEL_TEST_DEPS,
7008)
7009
7010xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007011 name = "f32_gemm_test",
7012 srcs = [
7013 "test/f32-gemm.cc",
7014 "test/gemm-microkernel-tester.h",
7015 "src/xnnpack/AlignedAllocator.h",
7016 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007017 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007018)
7019
7020xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007021 name = "f32_gemm_relu_test",
7022 srcs = [
7023 "test/f32-gemm-relu.cc",
7024 "test/gemm-microkernel-tester.h",
7025 "src/xnnpack/AlignedAllocator.h",
7026 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007027 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007028)
7029
7030xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007031 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007032 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007033 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007034 "test/gemm-microkernel-tester.h",
7035 "src/xnnpack/AlignedAllocator.h",
7036 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007037 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007038)
7039
7040xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007041 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007042 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007043 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007044 "test/gemm-microkernel-tester.h",
7045 "src/xnnpack/AlignedAllocator.h",
7046 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007047 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007048)
7049
7050xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007051 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007052 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007053 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007054 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007055 ] + MICROKERNEL_TEST_HDRS,
7056 deps = MICROKERNEL_TEST_DEPS,
7057)
7058
7059xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007060 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007061 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007062 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007063 "test/maxpool-microkernel-tester.h",
7064 ] + MICROKERNEL_TEST_HDRS,
7065 deps = MICROKERNEL_TEST_DEPS,
7066)
7067
7068xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007069 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007070 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007071 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007072 "test/avgpool-microkernel-tester.h",
7073 "src/xnnpack/AlignedAllocator.h",
7074 ] + MICROKERNEL_TEST_HDRS,
7075 deps = MICROKERNEL_TEST_DEPS,
7076)
7077
7078xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007079 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007080 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007081 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007082 "test/gemm-microkernel-tester.h",
7083 "src/xnnpack/AlignedAllocator.h",
7084 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007085 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007086)
7087
7088xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007089 name = "f16_prelu_test",
7090 srcs = [
7091 "test/f16-prelu.cc",
7092 "test/prelu-microkernel-tester.h",
7093 "src/xnnpack/AlignedAllocator.h",
7094 ] + MICROKERNEL_TEST_HDRS,
7095 deps = MICROKERNEL_TEST_DEPS,
7096)
7097
7098xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007099 name = "f32_prelu_test",
7100 srcs = [
7101 "test/f32-prelu.cc",
7102 "test/prelu-microkernel-tester.h",
7103 "src/xnnpack/AlignedAllocator.h",
7104 ] + MICROKERNEL_TEST_HDRS,
7105 deps = MICROKERNEL_TEST_DEPS,
7106)
7107
7108xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007109 name = "f32_raddexpminusmax_test",
7110 srcs = [
7111 "test/f32-raddexpminusmax.cc",
7112 "test/raddexpminusmax-microkernel-tester.h",
7113 ] + MICROKERNEL_TEST_HDRS,
7114 deps = MICROKERNEL_TEST_DEPS,
7115)
7116
7117xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007118 name = "f32_raddextexp_test",
7119 srcs = [
7120 "test/f32-raddextexp.cc",
7121 "test/raddextexp-microkernel-tester.h",
7122 ] + MICROKERNEL_TEST_HDRS,
7123 deps = MICROKERNEL_TEST_DEPS,
7124)
7125
7126xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007127 name = "f32_raddstoreexpminusmax_test",
7128 srcs = [
7129 "test/f32-raddstoreexpminusmax.cc",
7130 "test/raddstoreexpminusmax-microkernel-tester.h",
7131 ] + MICROKERNEL_TEST_HDRS,
7132 deps = MICROKERNEL_TEST_DEPS,
7133)
7134
7135xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007136 name = "f32_rmax_test",
7137 srcs = [
7138 "test/f32-rmax.cc",
7139 "test/rmax-microkernel-tester.h",
7140 ] + MICROKERNEL_TEST_HDRS,
7141 deps = MICROKERNEL_TEST_DEPS,
7142)
7143
7144xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007145 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007146 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007147 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007148 "test/spmm-microkernel-tester.h",
7149 "src/xnnpack/AlignedAllocator.h",
7150 ] + MICROKERNEL_TEST_HDRS,
7151 deps = MICROKERNEL_TEST_DEPS,
7152)
7153
7154xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007155 name = "f32_vabs_test",
7156 srcs = [
7157 "test/f32-vabs.cc",
7158 "test/vunary-microkernel-tester.h",
7159 ] + MICROKERNEL_TEST_HDRS,
7160 deps = MICROKERNEL_TEST_DEPS,
7161)
7162
7163xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007164 name = "f32_vadd_test",
7165 srcs = [
7166 "test/f32-vadd.cc",
7167 "test/vbinary-microkernel-tester.h",
7168 ] + MICROKERNEL_TEST_HDRS,
7169 deps = MICROKERNEL_TEST_DEPS,
7170)
7171
7172xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007173 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007174 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007175 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007176 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007177 ] + MICROKERNEL_TEST_HDRS,
7178 deps = MICROKERNEL_TEST_DEPS,
7179)
7180
7181xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007182 name = "f32_vadd_relu_test",
7183 srcs = [
7184 "test/f32-vadd-relu.cc",
7185 "test/vbinary-microkernel-tester.h",
7186 ] + MICROKERNEL_TEST_HDRS,
7187 deps = MICROKERNEL_TEST_DEPS,
7188)
7189
7190xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007191 name = "f32_vaddc_test",
7192 srcs = [
7193 "test/f32-vaddc.cc",
7194 "test/vbinaryc-microkernel-tester.h",
7195 ] + MICROKERNEL_TEST_HDRS,
7196 deps = MICROKERNEL_TEST_DEPS,
7197)
7198
7199xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007200 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007201 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007202 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007203 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007204 ] + MICROKERNEL_TEST_HDRS,
7205 deps = MICROKERNEL_TEST_DEPS,
7206)
7207
7208xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007209 name = "f32_vaddc_relu_test",
7210 srcs = [
7211 "test/f32-vaddc-relu.cc",
7212 "test/vbinaryc-microkernel-tester.h",
7213 ] + MICROKERNEL_TEST_HDRS,
7214 deps = MICROKERNEL_TEST_DEPS,
7215)
7216
7217xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007218 name = "f32_vclamp_test",
7219 srcs = [
7220 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007221 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007222 ] + MICROKERNEL_TEST_HDRS,
7223 deps = MICROKERNEL_TEST_DEPS,
7224)
7225
7226xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007227 name = "f32_vdiv_test",
7228 srcs = [
7229 "test/f32-vdiv.cc",
7230 "test/vbinary-microkernel-tester.h",
7231 ] + MICROKERNEL_TEST_HDRS,
7232 deps = MICROKERNEL_TEST_DEPS,
7233)
7234
7235xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007236 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007237 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007238 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007239 "test/vbinary-microkernel-tester.h",
7240 ] + MICROKERNEL_TEST_HDRS,
7241 deps = MICROKERNEL_TEST_DEPS,
7242)
7243
7244xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007245 name = "f32_vdiv_relu_test",
7246 srcs = [
7247 "test/f32-vdiv-relu.cc",
7248 "test/vbinary-microkernel-tester.h",
7249 ] + MICROKERNEL_TEST_HDRS,
7250 deps = MICROKERNEL_TEST_DEPS,
7251)
7252
7253xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007254 name = "f32_vdivc_test",
7255 srcs = [
7256 "test/f32-vdivc.cc",
7257 "test/vbinaryc-microkernel-tester.h",
7258 ] + MICROKERNEL_TEST_HDRS,
7259 deps = MICROKERNEL_TEST_DEPS,
7260)
7261
7262xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007263 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007264 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007265 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007266 "test/vbinaryc-microkernel-tester.h",
7267 ] + MICROKERNEL_TEST_HDRS,
7268 deps = MICROKERNEL_TEST_DEPS,
7269)
7270
7271xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007272 name = "f32_vdivc_relu_test",
7273 srcs = [
7274 "test/f32-vdivc-relu.cc",
7275 "test/vbinaryc-microkernel-tester.h",
7276 ] + MICROKERNEL_TEST_HDRS,
7277 deps = MICROKERNEL_TEST_DEPS,
7278)
7279
7280xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007281 name = "f32_vrdivc_test",
7282 srcs = [
7283 "test/f32-vrdivc.cc",
7284 "test/vbinaryc-microkernel-tester.h",
7285 ] + MICROKERNEL_TEST_HDRS,
7286 deps = MICROKERNEL_TEST_DEPS,
7287)
7288
7289xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007290 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007291 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007292 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007293 "test/vbinaryc-microkernel-tester.h",
7294 ] + MICROKERNEL_TEST_HDRS,
7295 deps = MICROKERNEL_TEST_DEPS,
7296)
7297
7298xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007299 name = "f32_vrdivc_relu_test",
7300 srcs = [
7301 "test/f32-vrdivc-relu.cc",
7302 "test/vbinaryc-microkernel-tester.h",
7303 ] + MICROKERNEL_TEST_HDRS,
7304 deps = MICROKERNEL_TEST_DEPS,
7305)
7306
7307xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007308 name = "f32_velu_test",
7309 srcs = [
7310 "test/f32-velu.cc",
7311 "test/vunary-microkernel-tester.h",
7312 ] + MICROKERNEL_TEST_HDRS,
7313 deps = MICROKERNEL_TEST_DEPS,
7314)
7315
7316xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007317 name = "f32_vmax_test",
7318 srcs = [
7319 "test/f32-vmax.cc",
7320 "test/vbinary-microkernel-tester.h",
7321 ] + MICROKERNEL_TEST_HDRS,
7322 deps = MICROKERNEL_TEST_DEPS,
7323)
7324
7325xnnpack_unit_test(
7326 name = "f32_vmaxc_test",
7327 srcs = [
7328 "test/f32-vmaxc.cc",
7329 "test/vbinaryc-microkernel-tester.h",
7330 ] + MICROKERNEL_TEST_HDRS,
7331 deps = MICROKERNEL_TEST_DEPS,
7332)
7333
7334xnnpack_unit_test(
7335 name = "f32_vmin_test",
7336 srcs = [
7337 "test/f32-vmin.cc",
7338 "test/vbinary-microkernel-tester.h",
7339 ] + MICROKERNEL_TEST_HDRS,
7340 deps = MICROKERNEL_TEST_DEPS,
7341)
7342
7343xnnpack_unit_test(
7344 name = "f32_vminc_test",
7345 srcs = [
7346 "test/f32-vminc.cc",
7347 "test/vbinaryc-microkernel-tester.h",
7348 ] + MICROKERNEL_TEST_HDRS,
7349 deps = MICROKERNEL_TEST_DEPS,
7350)
7351
7352xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007353 name = "f32_vmul_test",
7354 srcs = [
7355 "test/f32-vmul.cc",
7356 "test/vbinary-microkernel-tester.h",
7357 ] + MICROKERNEL_TEST_HDRS,
7358 deps = MICROKERNEL_TEST_DEPS,
7359)
7360
7361xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007362 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007363 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007364 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007365 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007366 ] + MICROKERNEL_TEST_HDRS,
7367 deps = MICROKERNEL_TEST_DEPS,
7368)
7369
7370xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007371 name = "f32_vmul_relu_test",
7372 srcs = [
7373 "test/f32-vmul-relu.cc",
7374 "test/vbinary-microkernel-tester.h",
7375 ] + MICROKERNEL_TEST_HDRS,
7376 deps = MICROKERNEL_TEST_DEPS,
7377)
7378
7379xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007380 name = "f32_vmulc_test",
7381 srcs = [
7382 "test/f32-vmulc.cc",
7383 "test/vbinaryc-microkernel-tester.h",
7384 ] + MICROKERNEL_TEST_HDRS,
7385 deps = MICROKERNEL_TEST_DEPS,
7386)
7387
7388xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007389 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007390 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007391 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007392 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007393 ] + MICROKERNEL_TEST_HDRS,
7394 deps = MICROKERNEL_TEST_DEPS,
7395)
7396
7397xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007398 name = "f32_vmulc_relu_test",
7399 srcs = [
7400 "test/f32-vmulc-relu.cc",
7401 "test/vbinaryc-microkernel-tester.h",
7402 ] + MICROKERNEL_TEST_HDRS,
7403 deps = MICROKERNEL_TEST_DEPS,
7404)
7405
7406xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007407 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007408 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007409 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007410 "test/vmulcaddc-microkernel-tester.h",
7411 "src/xnnpack/AlignedAllocator.h",
7412 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007413 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007414)
7415
7416xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007417 name = "f32_vlrelu_test",
7418 srcs = [
7419 "test/f32-vlrelu.cc",
7420 "test/vunary-microkernel-tester.h",
7421 ] + MICROKERNEL_TEST_HDRS,
7422 deps = MICROKERNEL_TEST_DEPS,
7423)
7424
7425xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007426 name = "f32_vneg_test",
7427 srcs = [
7428 "test/f32-vneg.cc",
7429 "test/vunary-microkernel-tester.h",
7430 ] + MICROKERNEL_TEST_HDRS,
7431 deps = MICROKERNEL_TEST_DEPS,
7432)
7433
7434xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007435 name = "f32_vrelu_test",
7436 srcs = [
7437 "test/f32-vrelu.cc",
7438 "test/vunary-microkernel-tester.h",
7439 ] + MICROKERNEL_TEST_HDRS,
7440 deps = MICROKERNEL_TEST_DEPS,
7441)
7442
7443xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007444 name = "f32_vrndne_test",
7445 srcs = [
7446 "test/f32-vrndne.cc",
7447 "test/vunary-microkernel-tester.h",
7448 ] + MICROKERNEL_TEST_HDRS,
7449 deps = MICROKERNEL_TEST_DEPS,
7450)
7451
7452xnnpack_unit_test(
7453 name = "f32_vrndz_test",
7454 srcs = [
7455 "test/f32-vrndz.cc",
7456 "test/vunary-microkernel-tester.h",
7457 ] + MICROKERNEL_TEST_HDRS,
7458 deps = MICROKERNEL_TEST_DEPS,
7459)
7460
7461xnnpack_unit_test(
7462 name = "f32_vrndu_test",
7463 srcs = [
7464 "test/f32-vrndu.cc",
7465 "test/vunary-microkernel-tester.h",
7466 ] + MICROKERNEL_TEST_HDRS,
7467 deps = MICROKERNEL_TEST_DEPS,
7468)
7469
7470xnnpack_unit_test(
7471 name = "f32_vrndd_test",
7472 srcs = [
7473 "test/f32-vrndd.cc",
7474 "test/vunary-microkernel-tester.h",
7475 ] + MICROKERNEL_TEST_HDRS,
7476 deps = MICROKERNEL_TEST_DEPS,
7477)
7478
7479xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007480 name = "f32_vscale_test",
7481 srcs = [
7482 "test/f32-vscale.cc",
7483 "test/vscale-microkernel-tester.h",
7484 ] + MICROKERNEL_TEST_HDRS,
7485 deps = MICROKERNEL_TEST_DEPS,
7486)
7487
7488xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007489 name = "f32_vscaleexpminusmax_test",
7490 srcs = [
7491 "test/f32-vscaleexpminusmax.cc",
7492 "test/vscaleexpminusmax-microkernel-tester.h",
7493 ] + MICROKERNEL_TEST_HDRS,
7494 deps = MICROKERNEL_TEST_DEPS,
7495)
7496
7497xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007498 name = "f32_vscaleextexp_test",
7499 srcs = [
7500 "test/f32-vscaleextexp.cc",
7501 "test/vscaleextexp-microkernel-tester.h",
7502 ] + MICROKERNEL_TEST_HDRS,
7503 deps = MICROKERNEL_TEST_DEPS,
7504)
7505
7506xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007507 name = "f32_vsigmoid_test",
7508 srcs = [
7509 "test/f32-vsigmoid.cc",
7510 "test/vunary-microkernel-tester.h",
7511 ] + MICROKERNEL_TEST_HDRS,
7512 deps = MICROKERNEL_TEST_DEPS,
7513)
7514
7515xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007516 name = "f32_vsqr_test",
7517 srcs = [
7518 "test/f32-vsqr.cc",
7519 "test/vunary-microkernel-tester.h",
7520 ] + MICROKERNEL_TEST_HDRS,
7521 deps = MICROKERNEL_TEST_DEPS,
7522)
7523
7524xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007525 name = "f32_vsqrdiff_test",
7526 srcs = [
7527 "test/f32-vsqrdiff.cc",
7528 "test/vbinary-microkernel-tester.h",
7529 ] + MICROKERNEL_TEST_HDRS,
7530 deps = MICROKERNEL_TEST_DEPS,
7531)
7532
7533xnnpack_unit_test(
7534 name = "f32_vsqrdiffc_test",
7535 srcs = [
7536 "test/f32-vsqrdiffc.cc",
7537 "test/vbinaryc-microkernel-tester.h",
7538 ] + MICROKERNEL_TEST_HDRS,
7539 deps = MICROKERNEL_TEST_DEPS,
7540)
7541
7542xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007543 name = "f32_vsqrt_test",
7544 srcs = [
7545 "test/f32-vsqrt.cc",
7546 "test/vunary-microkernel-tester.h",
7547 ] + MICROKERNEL_TEST_HDRS,
7548 deps = MICROKERNEL_TEST_DEPS,
7549)
7550
7551xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007552 name = "f32_vsub_test",
7553 srcs = [
7554 "test/f32-vsub.cc",
7555 "test/vbinary-microkernel-tester.h",
7556 ] + MICROKERNEL_TEST_HDRS,
7557 deps = MICROKERNEL_TEST_DEPS,
7558)
7559
7560xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007561 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007562 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007563 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007564 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007565 ] + MICROKERNEL_TEST_HDRS,
7566 deps = MICROKERNEL_TEST_DEPS,
7567)
7568
7569xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007570 name = "f32_vsub_relu_test",
7571 srcs = [
7572 "test/f32-vsub-relu.cc",
7573 "test/vbinary-microkernel-tester.h",
7574 ] + MICROKERNEL_TEST_HDRS,
7575 deps = MICROKERNEL_TEST_DEPS,
7576)
7577
7578xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007579 name = "f32_vsubc_test",
7580 srcs = [
7581 "test/f32-vsubc.cc",
7582 "test/vbinaryc-microkernel-tester.h",
7583 ] + MICROKERNEL_TEST_HDRS,
7584 deps = MICROKERNEL_TEST_DEPS,
7585)
7586
7587xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007588 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007589 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007590 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007591 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007592 ] + MICROKERNEL_TEST_HDRS,
7593 deps = MICROKERNEL_TEST_DEPS,
7594)
7595
7596xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007597 name = "f32_vsubc_relu_test",
7598 srcs = [
7599 "test/f32-vsubc-relu.cc",
7600 "test/vbinaryc-microkernel-tester.h",
7601 ] + MICROKERNEL_TEST_HDRS,
7602 deps = MICROKERNEL_TEST_DEPS,
7603)
7604
7605xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007606 name = "f32_vrsubc_test",
7607 srcs = [
7608 "test/f32-vrsubc.cc",
7609 "test/vbinaryc-microkernel-tester.h",
7610 ] + MICROKERNEL_TEST_HDRS,
7611 deps = MICROKERNEL_TEST_DEPS,
7612)
7613
7614xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007615 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007616 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007617 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007618 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007619 ] + MICROKERNEL_TEST_HDRS,
7620 deps = MICROKERNEL_TEST_DEPS,
7621)
7622
7623xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007624 name = "f32_vrsubc_relu_test",
7625 srcs = [
7626 "test/f32-vrsubc-relu.cc",
7627 "test/vbinaryc-microkernel-tester.h",
7628 ] + MICROKERNEL_TEST_HDRS,
7629 deps = MICROKERNEL_TEST_DEPS,
7630)
7631
7632xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007633 name = "qc8_dwconv_minmax_fp32_test",
7634 timeout = "moderate",
7635 srcs = [
7636 "test/qc8-dwconv-minmax-fp32.cc",
7637 "test/dwconv-microkernel-tester.h",
7638 "src/xnnpack/AlignedAllocator.h",
7639 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7640 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7641)
7642
7643xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007644 name = "qc8_gemm_minmax_fp32_test",
7645 timeout = "moderate",
7646 srcs = [
7647 "test/qc8-gemm-minmax-fp32.cc",
7648 "test/gemm-microkernel-tester.h",
7649 "src/xnnpack/AlignedAllocator.h",
7650 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7651 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7652)
7653
7654xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007655 name = "qc8_igemm_minmax_fp32_test",
7656 timeout = "moderate",
7657 srcs = [
7658 "test/qc8-igemm-minmax-fp32.cc",
7659 "test/gemm-microkernel-tester.h",
7660 "src/xnnpack/AlignedAllocator.h",
7661 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7662 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7663)
7664
7665xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007666 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007667 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007668 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007669 "test/dwconv-microkernel-tester.h",
7670 "src/xnnpack/AlignedAllocator.h",
7671 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7672 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7673)
7674
7675xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007676 name = "qs8_dwconv_minmax_fp32_test",
7677 srcs = [
7678 "test/qs8-dwconv-minmax-fp32.cc",
7679 "test/dwconv-microkernel-tester.h",
7680 "src/xnnpack/AlignedAllocator.h",
7681 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7682 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7683)
7684
7685xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007686 name = "qs8_gavgpool_minmax_test",
7687 srcs = [
7688 "test/qs8-gavgpool-minmax.cc",
7689 "test/gavgpool-microkernel-tester.h",
7690 "src/xnnpack/AlignedAllocator.h",
7691 ] + MICROKERNEL_TEST_HDRS,
7692 deps = MICROKERNEL_TEST_DEPS,
7693)
7694
7695xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007696 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007697 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007698 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007699 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007700 "test/gemm-microkernel-tester.h",
7701 "src/xnnpack/AlignedAllocator.h",
7702 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7703 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7704)
7705
7706xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007707 name = "qs8_gemm_minmax_fp32_test",
7708 timeout = "moderate",
7709 srcs = [
7710 "test/qs8-gemm-minmax-fp32.cc",
7711 "test/gemm-microkernel-tester.h",
7712 "src/xnnpack/AlignedAllocator.h",
7713 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7714 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7715)
7716
7717xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007718 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007719 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007720 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007721 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007722 "test/gemm-microkernel-tester.h",
7723 "src/xnnpack/AlignedAllocator.h",
7724 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7725 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7726)
7727
7728xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007729 name = "qs8_igemm_minmax_fp32_test",
7730 timeout = "moderate",
7731 srcs = [
7732 "test/qs8-igemm-minmax-fp32.cc",
7733 "test/gemm-microkernel-tester.h",
7734 "src/xnnpack/AlignedAllocator.h",
7735 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7736 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7737)
7738
7739xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007740 name = "qs8_requantization_test",
7741 srcs = [
7742 "src/xnnpack/requantization-stubs.h",
7743 "test/qs8-requantization.cc",
7744 "test/requantization-tester.h",
7745 ] + MICROKERNEL_TEST_HDRS,
7746 deps = MICROKERNEL_TEST_DEPS,
7747)
7748
7749xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007750 name = "qs8_vadd_minmax_test",
7751 srcs = [
7752 "test/qs8-vadd-minmax.cc",
7753 "test/vadd-microkernel-tester.h",
7754 ] + MICROKERNEL_TEST_HDRS,
7755 deps = MICROKERNEL_TEST_DEPS,
7756)
7757
7758xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007759 name = "qs8_vaddc_minmax_test",
7760 srcs = [
7761 "test/qs8-vaddc-minmax.cc",
7762 "test/vaddc-microkernel-tester.h",
7763 ] + MICROKERNEL_TEST_HDRS,
7764 deps = MICROKERNEL_TEST_DEPS,
7765)
7766
7767xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007768 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007769 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007770 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007771 "test/avgpool-microkernel-tester.h",
7772 "src/xnnpack/AlignedAllocator.h",
7773 ] + MICROKERNEL_TEST_HDRS,
7774 deps = MICROKERNEL_TEST_DEPS,
7775)
7776
7777xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07007778 name = "qu8_dwconv_minmax_fp32_test",
7779 srcs = [
7780 "test/qu8-dwconv-minmax-fp32.cc",
7781 "test/dwconv-microkernel-tester.h",
7782 "src/xnnpack/AlignedAllocator.h",
7783 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7784 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7785)
7786
7787xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007788 name = "qu8_dwconv_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007789 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007790 "test/qu8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007791 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007792 "src/xnnpack/AlignedAllocator.h",
7793 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007794 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007795)
7796
7797xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007798 name = "qu8_igemm_minmax_fp32_test",
7799 srcs = [
7800 "test/qu8-igemm-minmax-fp32.cc",
7801 "test/gemm-microkernel-tester.h",
7802 "src/xnnpack/AlignedAllocator.h",
7803 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7804 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7805)
7806
7807xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007808 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007809 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007810 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007811 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007812 "src/xnnpack/AlignedAllocator.h",
7813 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007814 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007815)
7816
7817xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007818 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007819 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007820 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007821 "test/gavgpool-microkernel-tester.h",
7822 "src/xnnpack/AlignedAllocator.h",
7823 ] + MICROKERNEL_TEST_HDRS,
7824 deps = MICROKERNEL_TEST_DEPS,
7825)
7826
7827xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007828 name = "qu8_gemm_minmax_fp32_test",
7829 srcs = [
7830 "test/qu8-gemm-minmax-fp32.cc",
7831 "test/gemm-microkernel-tester.h",
7832 "src/xnnpack/AlignedAllocator.h",
7833 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7834 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7835)
7836
7837xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007838 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007839 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007840 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007841 "test/gemm-microkernel-tester.h",
7842 "src/xnnpack/AlignedAllocator.h",
7843 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007844 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007845)
7846
7847xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007848 name = "qu8_requantization_test",
7849 srcs = [
7850 "src/xnnpack/requantization-stubs.h",
7851 "test/qu8-requantization.cc",
7852 "test/requantization-tester.h",
7853 ] + MICROKERNEL_TEST_HDRS,
7854 deps = MICROKERNEL_TEST_DEPS,
7855)
7856
7857xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007858 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007859 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007860 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007861 "test/vadd-microkernel-tester.h",
7862 ] + MICROKERNEL_TEST_HDRS,
7863 deps = MICROKERNEL_TEST_DEPS,
7864)
7865
7866xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007867 name = "u8_lut32norm_test",
7868 srcs = [
7869 "test/u8-lut32norm.cc",
7870 "test/lut-norm-microkernel-tester.h",
7871 ] + MICROKERNEL_TEST_HDRS,
7872 deps = MICROKERNEL_TEST_DEPS,
7873)
7874
7875xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007876 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007877 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007878 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007879 "test/maxpool-microkernel-tester.h",
7880 ] + MICROKERNEL_TEST_HDRS,
7881 deps = MICROKERNEL_TEST_DEPS,
7882)
7883
7884xnnpack_unit_test(
7885 name = "u8_rmax_test",
7886 srcs = [
7887 "test/u8-rmax.cc",
7888 "test/rmax-microkernel-tester.h",
7889 ] + MICROKERNEL_TEST_HDRS,
7890 deps = MICROKERNEL_TEST_DEPS,
7891)
7892
7893xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007894 name = "u8_vclamp_test",
7895 srcs = [
7896 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007897 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007898 ] + MICROKERNEL_TEST_HDRS,
7899 deps = MICROKERNEL_TEST_DEPS,
7900)
7901
7902xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007903 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007904 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007905 "test/x32-depthtospace2d-chw2hwc.cc",
7906 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007907 ] + MICROKERNEL_TEST_HDRS,
7908 deps = MICROKERNEL_TEST_DEPS,
7909)
7910
7911xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007912 name = "x32_fill_test",
7913 srcs = [
7914 "test/x32-fill.cc",
7915 "test/fill-microkernel-tester.h",
7916 ] + MICROKERNEL_TEST_HDRS,
7917 deps = MICROKERNEL_TEST_DEPS,
7918)
7919
7920xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007921 name = "x32_packx_test",
7922 srcs = [
7923 "test/x32-packx.cc",
7924 "test/pack-microkernel-tester.h",
7925 "src/xnnpack/AlignedAllocator.h",
7926 ] + MICROKERNEL_TEST_HDRS,
7927 deps = MICROKERNEL_TEST_DEPS,
7928)
7929
7930xnnpack_unit_test(
7931 name = "x32_pad_test",
7932 srcs = [
7933 "test/x32-pad.cc",
7934 "test/pad-microkernel-tester.h",
7935 ] + MICROKERNEL_TEST_HDRS,
7936 deps = MICROKERNEL_TEST_DEPS,
7937)
7938
7939xnnpack_unit_test(
7940 name = "x32_unpool_test",
7941 srcs = [
7942 "test/x32-unpool.cc",
7943 "test/unpool-microkernel-tester.h",
7944 ] + MICROKERNEL_TEST_HDRS,
7945 deps = MICROKERNEL_TEST_DEPS,
7946)
7947
7948xnnpack_unit_test(
7949 name = "x32_zip_test",
7950 srcs = [
7951 "test/x32-zip.cc",
7952 "test/zip-microkernel-tester.h",
7953 ] + MICROKERNEL_TEST_HDRS,
7954 deps = MICROKERNEL_TEST_DEPS,
7955)
7956
7957xnnpack_unit_test(
7958 name = "x8_lut_test",
7959 srcs = [
7960 "test/x8-lut.cc",
7961 "test/lut-microkernel-tester.h",
7962 ] + MICROKERNEL_TEST_HDRS,
7963 deps = MICROKERNEL_TEST_DEPS,
7964)
7965
7966xnnpack_unit_test(
7967 name = "x8_zip_test",
7968 srcs = [
7969 "test/x8-zip.cc",
7970 "test/zip-microkernel-tester.h",
7971 ] + MICROKERNEL_TEST_HDRS,
7972 deps = MICROKERNEL_TEST_DEPS,
7973)
7974
Marat Dukhan20c3b922020-03-10 03:45:06 -07007975########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007976
7977xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007978 name = "operator_size_test",
7979 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007980 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007981)
7982
Marat Dukhan20c3b922020-03-10 03:45:06 -07007983xnnpack_binary(
7984 name = "subgraph_size_test",
7985 srcs = ["test/subgraph-size.c"],
7986 deps = [":XNNPACK"],
7987)
7988
7989########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007990
7991xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007992 name = "abs_nc_test",
7993 srcs = [
7994 "test/abs-nc.cc",
7995 "test/abs-operator-tester.h",
7996 ],
7997 deps = OPERATOR_TEST_DEPS,
7998)
7999
8000xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008001 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008002 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008003 srcs = [
8004 "test/add-nd.cc",
8005 "test/binary-elementwise-operator-tester.h",
8006 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008007 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008008)
8009
8010xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008011 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008012 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008013 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008014 "test/argmax-pooling-operator-tester.h",
8015 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008016 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008017)
8018
8019xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008020 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008021 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008022 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008023 "test/average-pooling-operator-tester.h",
8024 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008025 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008026)
8027
8028xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008029 name = "bankers_rounding_nc_test",
8030 srcs = [
8031 "test/bankers-rounding-nc.cc",
8032 "test/bankers-rounding-operator-tester.h",
8033 ],
8034 deps = OPERATOR_TEST_DEPS,
8035)
8036
8037xnnpack_unit_test(
8038 name = "ceiling_nc_test",
8039 srcs = [
8040 "test/ceiling-nc.cc",
8041 "test/ceiling-operator-tester.h",
8042 ],
8043 deps = OPERATOR_TEST_DEPS,
8044)
8045
8046xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008047 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008048 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008049 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008050 "test/channel-shuffle-operator-tester.h",
8051 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008052 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008053)
8054
8055xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008056 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008057 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008058 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008059 "test/clamp-operator-tester.h",
8060 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008061 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008062)
8063
8064xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008065 name = "constant_pad_nd_test",
8066 srcs = [
8067 "test/constant-pad-nd.cc",
8068 "test/constant-pad-operator-tester.h",
8069 ],
8070 deps = OPERATOR_TEST_DEPS,
8071)
8072
8073xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008074 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008075 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008076 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008077 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008078 "test/convolution-operator-tester.h",
8079 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008080 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008081)
8082
8083xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008084 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008085 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008086 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008087 "test/convolution-nchw.cc",
8088 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008089 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008090 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008091)
8092
8093xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008094 name = "copy_nc_test",
8095 srcs = [
8096 "test/copy-nc.cc",
8097 "test/copy-operator-tester.h",
8098 ],
8099 deps = OPERATOR_TEST_DEPS,
8100)
8101
8102xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008103 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008104 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008105 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008106 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008107 "test/deconvolution-operator-tester.h",
8108 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008109 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008110)
8111
8112xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008113 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008114 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008115 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008116 "test/depth-to-space-operator-tester.h",
8117 ] + OPERATOR_TEST_PARAMS_HDRS,
8118 deps = OPERATOR_TEST_DEPS,
8119)
8120
8121xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008122 name = "depth_to_space_nhwc_test",
8123 srcs = [
8124 "test/depth-to-space-nhwc.cc",
8125 "test/depth-to-space-operator-tester.h",
8126 ] + OPERATOR_TEST_PARAMS_HDRS,
8127 deps = OPERATOR_TEST_DEPS,
8128)
8129
8130xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008131 name = "divide_nd_test",
8132 srcs = [
8133 "test/binary-elementwise-operator-tester.h",
8134 "test/divide-nd.cc",
8135 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008136 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008137)
8138
8139xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008140 name = "elu_nc_test",
8141 srcs = [
8142 "test/elu-nc.cc",
8143 "test/elu-operator-tester.h",
8144 ],
8145 deps = OPERATOR_TEST_DEPS,
8146)
8147
8148xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008149 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008150 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008151 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008152 "test/fully-connected-operator-tester.h",
8153 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008154 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008155)
8156
8157xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008158 name = "floor_nc_test",
8159 srcs = [
8160 "test/floor-nc.cc",
8161 "test/floor-operator-tester.h",
8162 ],
8163 deps = OPERATOR_TEST_DEPS,
8164)
8165
8166xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008167 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008168 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008169 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008170 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008171 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008172 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008173)
8174
8175xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008176 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008177 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008178 "test/global-average-pooling-ncw.cc",
8179 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008180 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008181 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008182)
8183
8184xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008185 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008186 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008187 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008188 "test/hardswish-operator-tester.h",
8189 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008190 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008191)
8192
8193xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008194 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008195 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008196 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008197 "test/leaky-relu-operator-tester.h",
8198 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008199 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008200)
8201
8202xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008203 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008204 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008205 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008206 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008207 "test/max-pooling-operator-tester.h",
8208 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008209 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008210)
8211
8212xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008213 name = "maximum_nd_test",
8214 srcs = [
8215 "test/binary-elementwise-operator-tester.h",
8216 "test/maximum-nd.cc",
8217 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008218 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008219)
8220
8221xnnpack_unit_test(
8222 name = "minimum_nd_test",
8223 srcs = [
8224 "test/binary-elementwise-operator-tester.h",
8225 "test/minimum-nd.cc",
8226 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008227 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008228)
8229
8230xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008231 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008232 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008233 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008234 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008235 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008236 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008237)
8238
8239xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008240 name = "negate_nc_test",
8241 srcs = [
8242 "test/negate-nc.cc",
8243 "test/negate-operator-tester.h",
8244 ],
8245 deps = OPERATOR_TEST_DEPS,
8246)
8247
8248xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008249 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008250 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008251 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008252 "test/prelu-operator-tester.h",
8253 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008254 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008255)
8256
8257xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008258 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008259 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008260 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008261 "test/resize-bilinear-operator-tester.h",
8262 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008263 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008264)
8265
8266xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008267 name = "resize_bilinear_nchw_test",
8268 srcs = [
8269 "test/resize-bilinear-nchw.cc",
8270 "test/resize-bilinear-operator-tester.h",
8271 ] + OPERATOR_TEST_PARAMS_HDRS,
8272 deps = OPERATOR_TEST_DEPS,
8273)
8274
8275xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008276 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008277 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008278 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008279 "test/sigmoid-operator-tester.h",
8280 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008281 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008282)
8283
8284xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008285 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008286 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008287 "test/softmax-nc.cc",
8288 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008289 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008290 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008291)
8292
8293xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008294 name = "square_nc_test",
8295 srcs = [
8296 "test/square-nc.cc",
8297 "test/square-operator-tester.h",
8298 ],
8299 deps = OPERATOR_TEST_DEPS,
8300)
8301
8302xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008303 name = "square_root_nc_test",
8304 srcs = [
8305 "test/square-root-nc.cc",
8306 "test/square-root-operator-tester.h",
8307 ],
8308 deps = OPERATOR_TEST_DEPS,
8309)
8310
8311xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008312 name = "squared_difference_nd_test",
8313 srcs = [
8314 "test/binary-elementwise-operator-tester.h",
8315 "test/squared-difference-nd.cc",
8316 ],
8317 deps = OPERATOR_TEST_DEPS,
8318)
8319
8320xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008321 name = "subtract_nd_test",
8322 srcs = [
8323 "test/binary-elementwise-operator-tester.h",
8324 "test/subtract-nd.cc",
8325 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008326 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008327)
8328
8329xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008330 name = "truncation_nc_test",
8331 srcs = [
8332 "test/truncation-nc.cc",
8333 "test/truncation-operator-tester.h",
8334 ],
8335 deps = OPERATOR_TEST_DEPS,
8336)
8337
8338xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008339 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008340 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008341 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008342 "test/unpooling-operator-tester.h",
8343 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008344 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008345)
8346
Chao Mei6ddfc602020-05-13 22:29:36 -07008347############################### Misc unit tests ###############################
8348
8349xnnpack_unit_test(
8350 name = "memory_planner_test",
8351 srcs = [
8352 "test/memory-planner-test.cc",
8353 ],
8354 deps = [
8355 ":XNNPACK",
8356 ":memory_planner",
8357 ],
8358)
8359
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008360xnnpack_unit_test(
8361 name = "subgraph_nchw_test",
8362 srcs = [
8363 "src/xnnpack/subgraph.h",
8364 "test/subgraph-nchw.cc",
8365 "test/subgraph-tester.h",
8366 ],
8367 deps = [
8368 ":XNNPACK",
8369 ],
8370)
8371
Marat Dukhan08c4a432019-10-03 09:29:21 -07008372############################# Build configurations #############################
8373
Marat Dukhanb8642352019-10-30 15:43:02 -07008374# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008375config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008376 name = "xnn_enable_assembly_explicit_true",
8377 define_values = {"xnn_enable_assembly": "true"},
8378)
8379
8380# Disables usage of assembly kernels.
8381config_setting(
8382 name = "xnn_enable_assembly_explicit_false",
8383 define_values = {"xnn_enable_assembly": "false"},
8384)
8385
Marat Dukhan9de90e02020-06-18 16:04:12 -07008386# Enables usage of sparse inference.
8387config_setting(
8388 name = "xnn_enable_sparse_explicit_true",
8389 define_values = {"xnn_enable_sparse": "true"},
8390)
8391
8392# Disables usage of sparse inference.
8393config_setting(
8394 name = "xnn_enable_sparse_explicit_false",
8395 define_values = {"xnn_enable_sparse": "false"},
8396)
8397
Marat Dukhan05702cf2020-03-26 15:41:33 -07008398# Disables usage of HMP-aware optimizations.
8399config_setting(
8400 name = "xnn_enable_hmp_explicit_false",
8401 define_values = {"xnn_enable_hmp": "false"},
8402)
8403
Chao Mei6ddfc602020-05-13 22:29:36 -07008404# Enable usage of optimized memory allocation
8405config_setting(
8406 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008407 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008408)
8409
8410# Disable usage of optimized memory allocation
8411config_setting(
8412 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008413 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008414)
8415
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008416# Enable QS8 inference in TFLite-specific version
8417config_setting(
8418 name = "xnn_enable_qs8_explicit_true",
8419 define_values = {"xnn_enable_qs8": "true"},
8420)
8421
8422# Disable QS8 inference in TFLite-specific version
8423config_setting(
8424 name = "xnn_enable_qs8_explicit_false",
8425 define_values = {"xnn_enable_qs8": "false"},
8426)
8427
Marat Dukhanb8642352019-10-30 15:43:02 -07008428# Builds with -c dbg
8429config_setting(
8430 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008431 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008432 "compilation_mode": "dbg",
8433 },
8434)
8435
8436# Builds with -c opt
8437config_setting(
8438 name = "optimized_build",
8439 values = {
8440 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008441 },
8442)
8443
8444config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008445 name = "linux_k8",
8446 values = {"cpu": "k8"},
8447)
8448
8449config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008450 name = "linux_arm",
8451 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008452)
8453
8454config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008455 name = "linux_armeabi",
8456 values = {"cpu": "armeabi"},
8457)
8458
8459config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008460 name = "linux_armhf",
8461 values = {"cpu": "armhf"},
8462)
8463
8464config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008465 name = "linux_armv7a",
8466 values = {"cpu": "armv7a"},
8467)
8468
8469config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008470 name = "linux_aarch64",
8471 values = {"cpu": "aarch64"},
8472)
8473
8474config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008475 name = "android",
8476 values = {"crosstool_top": "//external:android/crosstool"},
8477)
8478
8479config_setting(
8480 name = "android_armv7",
8481 values = {
8482 "crosstool_top": "//external:android/crosstool",
8483 "cpu": "armeabi-v7a",
8484 },
8485)
8486
8487config_setting(
8488 name = "android_arm64",
8489 values = {
8490 "crosstool_top": "//external:android/crosstool",
8491 "cpu": "arm64-v8a",
8492 },
8493)
8494
8495config_setting(
8496 name = "android_x86",
8497 values = {
8498 "crosstool_top": "//external:android/crosstool",
8499 "cpu": "x86",
8500 },
8501)
8502
8503config_setting(
8504 name = "android_x86_64",
8505 values = {
8506 "crosstool_top": "//external:android/crosstool",
8507 "cpu": "x86_64",
8508 },
8509)
8510
8511config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008512 name = "windows_x86_64",
8513 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008514)
8515
8516config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008517 name = "windows_x86_64_clang",
8518 values = {
8519 "compiler": "clang-cl",
8520 "cpu": "x64_windows",
8521 },
8522)
8523
8524config_setting(
8525 name = "windows_x86_64_mingw",
8526 values = {
8527 "compiler": "mingw-gcc",
8528 "cpu": "x64_windows",
8529 },
8530)
8531
8532config_setting(
8533 name = "windows_x86_64_msys",
8534 values = {
8535 "compiler": "msys-gcc",
8536 "cpu": "x64_windows",
8537 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008538)
8539
8540config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008541 name = "macos_x86_64",
8542 values = {
8543 "apple_platform_type": "macos",
8544 "cpu": "darwin",
8545 },
8546)
8547
8548config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008549 name = "macos_arm64",
8550 values = {
8551 "apple_platform_type": "macos",
8552 "cpu": "darwin_arm64",
8553 },
8554)
8555
8556config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008557 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008558 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008559)
8560
8561config_setting(
8562 name = "emscripten_wasm",
8563 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008564 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008565 "cpu": "wasm",
8566 },
8567)
8568
8569config_setting(
8570 name = "emscripten_wasmsimd",
8571 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008572 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008573 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008574 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008575 },
8576)
8577
8578config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008579 name = "ios_armv7",
8580 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008581 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008582 "cpu": "ios_armv7",
8583 },
8584)
8585
8586config_setting(
8587 name = "ios_arm64",
8588 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008589 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008590 "cpu": "ios_arm64",
8591 },
8592)
8593
8594config_setting(
8595 name = "ios_arm64e",
8596 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008597 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008598 "cpu": "ios_arm64e",
8599 },
8600)
8601
8602config_setting(
8603 name = "ios_x86",
8604 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008605 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008606 "cpu": "ios_i386",
8607 },
8608)
8609
8610config_setting(
8611 name = "ios_x86_64",
8612 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008613 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008614 "cpu": "ios_x86_64",
8615 },
8616)
8617
8618config_setting(
8619 name = "watchos_armv7k",
8620 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008621 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008622 "cpu": "watchos_armv7k",
8623 },
8624)
8625
8626config_setting(
8627 name = "watchos_arm64_32",
8628 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008629 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008630 "cpu": "watchos_arm64_32",
8631 },
8632)
8633
8634config_setting(
8635 name = "watchos_x86",
8636 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008637 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008638 "cpu": "watchos_i386",
8639 },
8640)
8641
8642config_setting(
8643 name = "watchos_x86_64",
8644 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008645 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008646 "cpu": "watchos_x86_64",
8647 },
8648)
8649
8650config_setting(
8651 name = "tvos_arm64",
8652 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008653 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008654 "cpu": "tvos_arm64",
8655 },
8656)
8657
8658config_setting(
8659 name = "tvos_x86_64",
8660 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008661 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008662 "cpu": "tvos_x86_64",
8663 },
8664)