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Jia Liue1d61962012-02-19 02:03:36 +00001//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//
David Greene509be1f2010-02-09 23:52:19 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +00007//
David Greene509be1f2010-02-09 23:52:19 +00008//===----------------------------------------------------------------------===//
9//
10// This file provides pattern fragments useful for SIMD instructions.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +000015// MMX specific DAG Nodes.
16//===----------------------------------------------------------------------===//
17
18// Low word of MMX to GPR.
19def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,
20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
Bruno Cardoso Lopesab9ae872015-02-05 13:23:07 +000021// GPR to low word of MMX.
22def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1,
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +000024
25//===----------------------------------------------------------------------===//
David Greene509be1f2010-02-09 23:52:19 +000026// MMX Pattern Fragments
27//===----------------------------------------------------------------------===//
28
Dale Johannesendd224d22010-09-30 23:57:10 +000029def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>;
Bruno Cardoso Lopes9e1c4c12015-02-23 15:23:14 +000030def load_mvmmx : PatFrag<(ops node:$ptr),
31 (x86mmx (MMX_X86movw2d (load node:$ptr)))>;
Dale Johannesendd224d22010-09-30 23:57:10 +000032def bc_mmx : PatFrag<(ops node:$in), (x86mmx (bitconvert node:$in))>;
David Greene03264ef2010-07-12 23:41:28 +000033
34//===----------------------------------------------------------------------===//
35// SSE specific DAG Nodes.
36//===----------------------------------------------------------------------===//
37
David Greene03264ef2010-07-12 23:41:28 +000038def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>,
Craig Topperaefaab62014-01-26 04:59:39 +000039 SDTCisFP<1>, SDTCisVT<3, i8>,
40 SDTCisVec<1>]>;
Asaf Badouh2489f352015-12-02 08:17:51 +000041def SDTX86CmpTestSae : SDTypeProfile<1, 3, [SDTCisVT<0, i32>,
42 SDTCisSameAs<1, 2>, SDTCisInt<3>]>;
David Greene03264ef2010-07-12 23:41:28 +000043
44def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
45def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
Nadav Rotem178250a2012-08-19 13:06:16 +000046
47// Commutative and Associative FMIN and FMAX.
48def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,
49 [SDNPCommutative, SDNPAssociative]>;
50def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,
51 [SDNPCommutative, SDNPAssociative]>;
52
David Greene03264ef2010-07-12 23:41:28 +000053def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
54 [SDNPCommutative, SDNPAssociative]>;
55def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
56 [SDNPCommutative, SDNPAssociative]>;
57def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
58 [SDNPCommutative, SDNPAssociative]>;
Benjamin Kramer5bc180c2013-08-04 12:05:16 +000059def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp,
60 [SDNPCommutative, SDNPAssociative]>;
David Greene03264ef2010-07-12 23:41:28 +000061def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
62def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
Asaf Badouheaf2da12015-09-21 10:23:53 +000063def X86frsqrt14s: SDNode<"X86ISD::FRSQRT", SDTFPBinOp>;
64def X86frcp14s : SDNode<"X86ISD::FRCP", SDTFPBinOp>;
Stuart Hastings9f208042011-06-01 04:39:42 +000065def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>;
Duncan Sands0e4fcb82011-09-22 20:15:48 +000066def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
67def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
Craig Topperf984efb2011-11-19 09:02:40 +000068def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
69def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +000070def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>;
Asaf Badouh2489f352015-12-02 08:17:51 +000071def X86comiSae : SDNode<"X86ISD::COMI", SDTX86CmpTestSae>;
David Greene03264ef2010-07-12 23:41:28 +000072def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>;
Asaf Badouh2489f352015-12-02 08:17:51 +000073def X86ucomiSae: SDNode<"X86ISD::UCOMI", SDTX86CmpTestSae>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +000074def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
75//def X86cmpsd : SDNode<"X86ISD::FSETCCsd", SDTX86Cmpsd>;
Simon Pilgrimcae7b942015-06-16 21:40:28 +000076def X86cvtdq2pd: SDNode<"X86ISD::CVTDQ2PD",
77 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
78 SDTCisVT<1, v4i32>]>>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +000079def X86cvtudq2pd: SDNode<"X86ISD::CVTUDQ2PD",
80 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
81 SDTCisVT<1, v4i32>]>>;
David Greene03264ef2010-07-12 23:41:28 +000082def X86pshufb : SDNode<"X86ISD::PSHUFB",
Craig Toppera3ac7382015-11-26 07:58:20 +000083 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i8>, SDTCisSameAs<0,1>,
David Greene03264ef2010-07-12 23:41:28 +000084 SDTCisSameAs<0,2>]>>;
Chandler Carruth6ba97302015-05-30 03:20:59 +000085def X86psadbw : SDNode<"X86ISD::PSADBW",
Craig Topper4c175cd2015-11-26 07:02:21 +000086 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i64>,
87 SDTCVecEltisVT<1, i8>,
88 SDTCisSameSizeAs<0,1>,
Cong Houdb6220f2015-11-24 19:51:26 +000089 SDTCisSameAs<1,2>]>>;
Igor Bregerf3ded812015-08-31 13:09:30 +000090def X86dbpsadbw : SDNode<"X86ISD::DBPSADBW",
Craig Topper4c175cd2015-11-26 07:02:21 +000091 SDTypeProfile<1, 3, [SDTCVecEltisVT<0, i16>,
92 SDTCVecEltisVT<1, i8>,
93 SDTCisSameSizeAs<0,1>,
Igor Bregerf3ded812015-08-31 13:09:30 +000094 SDTCisSameAs<1,2>, SDTCisInt<3>]>>;
Bruno Cardoso Lopes7ba479d2011-07-13 21:36:47 +000095def X86andnp : SDNode<"X86ISD::ANDNP",
Bruno Cardoso Lopes9613b642011-07-13 21:36:51 +000096 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +000097 SDTCisSameAs<0,2>]>>;
Craig Topper81390be2011-11-19 07:33:10 +000098def X86psign : SDNode<"X86ISD::PSIGN",
Craig Topperde6b73b2011-11-19 07:07:26 +000099 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000100 SDTCisSameAs<0,2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000101def X86pextrb : SDNode<"X86ISD::PEXTRB",
Craig Toppera3ac7382015-11-26 07:58:20 +0000102 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v16i8>,
103 SDTCisPtrTy<2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000104def X86pextrw : SDNode<"X86ISD::PEXTRW",
Craig Toppera3ac7382015-11-26 07:58:20 +0000105 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v8i16>,
106 SDTCisPtrTy<2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000107def X86pinsrb : SDNode<"X86ISD::PINSRB",
108 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
109 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
110def X86pinsrw : SDNode<"X86ISD::PINSRW",
111 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
112 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
Filipe Cabecinhas20352212014-04-21 20:07:29 +0000113def X86insertps : SDNode<"X86ISD::INSERTPS",
David Greene03264ef2010-07-12 23:41:28 +0000114 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000115 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000116def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
117 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>;
Elena Demikhovsky8d7e56c2012-04-22 09:39:03 +0000118
David Greene03264ef2010-07-12 23:41:28 +0000119def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
Chris Lattner54e53292010-09-22 00:34:38 +0000120 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
Michael Liao34107b92012-08-14 21:24:47 +0000121
Michael Liao1be96bb2012-10-23 17:34:00 +0000122def X86vzext : SDNode<"X86ISD::VZEXT",
123 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000124 SDTCisInt<0>, SDTCisInt<1>,
125 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000126
127def X86vsext : SDNode<"X86ISD::VSEXT",
128 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000129 SDTCisInt<0>, SDTCisInt<1>,
130 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000131
Igor Breger074a64e2015-07-24 17:24:15 +0000132def SDTVtrunc : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
133 SDTCisInt<0>, SDTCisInt<1>,
134 SDTCisOpSmallerThanOp<0, 1>]>;
135
136def X86vtrunc : SDNode<"X86ISD::VTRUNC", SDTVtrunc>;
137def X86vtruncs : SDNode<"X86ISD::VTRUNCS", SDTVtrunc>;
138def X86vtruncus : SDNode<"X86ISD::VTRUNCUS", SDTVtrunc>;
139
Elena Demikhovskyc5f67262013-12-17 08:33:15 +0000140def X86trunc : SDNode<"X86ISD::TRUNC",
Craig Topperaefaab62014-01-26 04:59:39 +0000141 SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>,
142 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000143def X86vfpext : SDNode<"X86ISD::VFPEXT",
144 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000145 SDTCisFP<0>, SDTCisFP<1>,
146 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liaoe999b862012-10-10 16:53:28 +0000147def X86vfpround: SDNode<"X86ISD::VFPROUND",
148 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000149 SDTCisFP<0>, SDTCisFP<1>,
150 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000151
Asaf Badouh2744d212015-09-20 14:31:19 +0000152def X86fround: SDNode<"X86ISD::VFPROUND",
153 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisFP<1>,SDTCisFP<2>,
154 SDTCVecEltisVT<0, f32>,
155 SDTCVecEltisVT<1, f64>,
156 SDTCVecEltisVT<2, f64>,
157 SDTCisOpSmallerThanOp<0, 1>]>>;
158def X86froundRnd: SDNode<"X86ISD::VFPROUND",
159 SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisFP<1>,SDTCisFP<2>,
160 SDTCVecEltisVT<0, f32>,
161 SDTCVecEltisVT<1, f64>,
162 SDTCVecEltisVT<2, f64>,
163 SDTCisOpSmallerThanOp<0, 1>,
164 SDTCisInt<3>]>>;
165
166def X86fpext : SDNode<"X86ISD::VFPEXT",
167 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisFP<1>,SDTCisFP<2>,
168 SDTCVecEltisVT<0, f64>,
169 SDTCVecEltisVT<1, f32>,
170 SDTCVecEltisVT<2, f32>,
171 SDTCisOpSmallerThanOp<1, 0>]>>;
172
173def X86fpextRnd : SDNode<"X86ISD::VFPEXT",
174 SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisFP<1>,SDTCisFP<2>,
175 SDTCVecEltisVT<0, f64>,
176 SDTCVecEltisVT<1, f32>,
177 SDTCVecEltisVT<2, f32>,
178 SDTCisOpSmallerThanOp<1, 0>,
179 SDTCisInt<3>]>>;
180
Craig Topper09462642012-01-22 19:15:14 +0000181def X86vshldq : SDNode<"X86ISD::VSHLDQ", SDTIntShiftOp>;
182def X86vshrdq : SDNode<"X86ISD::VSRLDQ", SDTIntShiftOp>;
Craig Topper0b7ad762012-01-22 23:36:02 +0000183def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>;
Craig Topperbd4884372012-01-22 22:42:16 +0000184def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;
185def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000186
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000187def X86IntCmpMask : SDTypeProfile<1, 2,
188 [SDTCisVec<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>]>;
189def X86pcmpeqm : SDNode<"X86ISD::PCMPEQM", X86IntCmpMask, [SDNPCommutative]>;
190def X86pcmpgtm : SDNode<"X86ISD::PCMPGTM", X86IntCmpMask>;
191
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000192def X86CmpMaskCC :
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000193 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,
194 SDTCisVec<1>, SDTCisSameAs<2, 1>,
195 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>]>;
196def X86CmpMaskCCRound :
197 SDTypeProfile<1, 4, [SDTCisVec<0>,SDTCVecEltisVT<0, i1>,
198 SDTCisVec<1>, SDTCisSameAs<2, 1>,
199 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>,
200 SDTCisInt<4>]>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000201def X86CmpMaskCCScalar :
202 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
203
Igor Bregerb7e1f9d2015-09-20 15:15:10 +0000204def X86CmpMaskCCScalarRound :
205 SDTypeProfile<1, 4, [SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>,
206 SDTCisInt<4>]>;
207
208def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>;
209def X86cmpmRnd : SDNode<"X86ISD::CMPM_RND", X86CmpMaskCCRound>;
210def X86cmpmu : SDNode<"X86ISD::CMPMU", X86CmpMaskCC>;
211def X86cmpms : SDNode<"X86ISD::FSETCC", X86CmpMaskCCScalar>;
212def X86cmpmsRnd : SDNode<"X86ISD::FSETCC", X86CmpMaskCCScalarRound>;
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000213
Craig Topper09462642012-01-22 19:15:14 +0000214def X86vshl : SDNode<"X86ISD::VSHL",
215 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
216 SDTCisVec<2>]>>;
217def X86vsrl : SDNode<"X86ISD::VSRL",
218 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
219 SDTCisVec<2>]>>;
220def X86vsra : SDNode<"X86ISD::VSRA",
221 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
222 SDTCisVec<2>]>>;
223
224def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;
225def X86vsrli : SDNode<"X86ISD::VSRLI", SDTIntShiftOp>;
226def X86vsrai : SDNode<"X86ISD::VSRAI", SDTIntShiftOp>;
227
Michael Zuckerman2ddcbcf2016-01-12 21:19:17 +0000228def X86vrotli : SDNode<"X86ISD::VROTLI", SDTIntShiftOp>;
Michael Zuckerman298a6802016-01-13 12:39:33 +0000229def X86vrotri : SDNode<"X86ISD::VROTRI", SDTIntShiftOp>;
Michael Zuckerman2ddcbcf2016-01-12 21:19:17 +0000230
Simon Pilgrim86c5e852015-10-17 19:04:24 +0000231def X86vprot : SDNode<"X86ISD::VPROT",
232 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000233 SDTCisSameAs<0,2>]>>;
Simon Pilgrim86c5e852015-10-17 19:04:24 +0000234def X86vproti : SDNode<"X86ISD::VPROTI",
235 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000236 SDTCisVT<2, i8>]>>;
Simon Pilgrim86c5e852015-10-17 19:04:24 +0000237
Simon Pilgrim3d11c992015-09-30 08:17:50 +0000238def X86vpshl : SDNode<"X86ISD::VPSHL",
239 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000240 SDTCisSameAs<0,2>]>>;
Simon Pilgrim3d11c992015-09-30 08:17:50 +0000241def X86vpsha : SDNode<"X86ISD::VPSHA",
242 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000243 SDTCisSameAs<0,2>]>>;
Simon Pilgrim3d11c992015-09-30 08:17:50 +0000244
Simon Pilgrim52d47e52015-10-11 14:15:17 +0000245def X86vpcom : SDNode<"X86ISD::VPCOM",
246 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000247 SDTCisSameAs<0,2>,
248 SDTCisVT<3, i8>]>>;
Simon Pilgrim52d47e52015-10-11 14:15:17 +0000249def X86vpcomu : SDNode<"X86ISD::VPCOMU",
250 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000251 SDTCisSameAs<0,2>,
252 SDTCisVT<3, i8>]>>;
Simon Pilgrim52d47e52015-10-11 14:15:17 +0000253
David Greene03264ef2010-07-12 23:41:28 +0000254def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000255 SDTCisVec<1>,
256 SDTCisSameAs<2, 1>]>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000257def X86addus : SDNode<"X86ISD::ADDUS", SDTIntBinOp>;
Benjamin Kramerb16ccde2012-12-15 16:47:44 +0000258def X86subus : SDNode<"X86ISD::SUBUS", SDTIntBinOp>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000259def X86adds : SDNode<"X86ISD::ADDS", SDTIntBinOp>;
260def X86subs : SDNode<"X86ISD::SUBS", SDTIntBinOp>;
Asaf Badouhc6f3c822015-07-06 14:03:40 +0000261def X86mulhrs : SDNode<"X86ISD::MULHRS" , SDTIntBinOp>;
Asaf Badouh81f03c32015-06-18 12:30:53 +0000262def X86avg : SDNode<"X86ISD::AVG" , SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000263def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000264def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
Elena Demikhovsky40864b62013-08-05 08:52:21 +0000265def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
Igor Breger5ea0a6812015-08-31 13:30:19 +0000266def X86ktest : SDNode<"X86ISD::KTEST", SDTX86CmpPTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000267def X86testm : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000268 SDTCisVec<1>, SDTCisSameAs<2, 1>,
269 SDTCVecEltisVT<0, i1>,
270 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovskya30e4372014-02-05 07:05:03 +0000271def X86testnm : SDNode<"X86ISD::TESTNM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000272 SDTCisVec<1>, SDTCisSameAs<2, 1>,
273 SDTCVecEltisVT<0, i1>,
274 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000275def X86select : SDNode<"X86ISD::SELECT" , SDTSelect>;
David Greene03264ef2010-07-12 23:41:28 +0000276
Craig Topper1d471e32012-02-05 03:14:49 +0000277def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
Craig Toppera3ac7382015-11-26 07:58:20 +0000278 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i64>,
279 SDTCVecEltisVT<1, i32>,
280 SDTCisSameSizeAs<0,1>,
281 SDTCisSameAs<1,2>]>>;
Benjamin Kramer6d2dff62014-04-26 14:12:19 +0000282def X86pmuldq : SDNode<"X86ISD::PMULDQ",
Craig Toppera3ac7382015-11-26 07:58:20 +0000283 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i64>,
284 SDTCVecEltisVT<1, i32>,
285 SDTCisSameSizeAs<0,1>,
286 SDTCisSameAs<1,2>]>>;
Craig Topper1d471e32012-02-05 03:14:49 +0000287
Simon Pilgrimd85cae32015-07-06 20:46:41 +0000288def X86extrqi : SDNode<"X86ISD::EXTRQI",
289 SDTypeProfile<1, 3, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,
290 SDTCisVT<2, i8>, SDTCisVT<3, i8>]>>;
291def X86insertqi : SDNode<"X86ISD::INSERTQI",
292 SDTypeProfile<1, 4, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,
293 SDTCisSameAs<1,2>, SDTCisVT<3, i8>,
294 SDTCisVT<4, i8>]>>;
295
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000296// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
297// translated into one of the target nodes below during lowering.
298// Note: this is a work in progress...
299def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>;
300def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
301 SDTCisSameAs<0,2>]>;
302
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000303def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000304 SDTCisSameSizeAs<0,2>,
305 SDTCisSameNumEltsAs<0,2>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000306def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000307 SDTCisSameAs<0,1>, SDTCisVT<2, i8>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000308def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000309 SDTCisSameAs<0,2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000310def SDTFPBinOpImmRound: SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCisSameAs<0,1>,
311 SDTCisSameAs<0,2>, SDTCisInt<3>, SDTCisInt<4>]>;
Asaf Badouha5b2e5e2015-07-22 12:00:43 +0000312def SDTFPUnaryOpImmRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
313 SDTCisInt<2>, SDTCisInt<3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000314
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000315def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;
Asaf Badouh0d957b82015-11-18 09:42:45 +0000316def SDTVBroadcastm : SDTypeProfile<1, 1, [SDTCisVec<0>,
317 SDTCisInt<0>, SDTCisInt<1>]>;
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000318
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000319def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000320 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000321
Igor Bregerb4bb1902015-10-15 12:33:24 +0000322def SDTTernlog : SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCisSameAs<0,1>,
323 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000324 SDTCisVT<4, i8>]>;
Igor Bregerb4bb1902015-10-15 12:33:24 +0000325
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000326def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc.
327 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisInt<3>]>;
328
Asaf Badouh402ebb32015-06-03 13:41:48 +0000329def SDTFPUnaryOpRound : SDTypeProfile<1, 2, [ // fsqrt_round, fgetexp_round, etc.
330 SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisInt<2>]>;
331
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000332def SDTFma : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
333 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000334def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
335 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>, SDTCisInt<4>]>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000336def STDFp1SrcRm : SDTypeProfile<1, 2, [SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000337 SDTCisVec<0>, SDTCisVT<2, i32>]>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000338def STDFp2SrcRm : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000339 SDTCisVec<0>, SDTCisVT<3, i32>]>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000340def STDFp3SrcRm : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000341 SDTCisVec<0>, SDTCisVT<3, i32>, SDTCisVT<4, i32>]>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000342
Craig Topper8fb09f02013-01-28 06:48:25 +0000343def X86PAlignr : SDNode<"X86ISD::PALIGNR", SDTShuff3OpI>;
Adam Nemet2f10cc62014-08-05 17:22:55 +0000344def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
Igor Breger0dcd8bc2015-09-03 09:05:31 +0000345
346def X86Abs : SDNode<"X86ISD::ABS", SDTIntUnaryOp>;
347def X86Conflict : SDNode<"X86ISD::CONFLICT", SDTIntUnaryOp>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000348
349def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>;
350def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>;
351def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>;
352
Elena Demikhovsky9e380862015-06-03 10:56:40 +0000353def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>;
354def X86Shuf128 : SDNode<"X86ISD::SHUF128", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000355
356def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
357def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;
358def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;
359
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000360def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
361def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
362
363def X86Movlhps : SDNode<"X86ISD::MOVLHPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000364def X86Movlhpd : SDNode<"X86ISD::MOVLHPD", SDTShuff2Op>;
Bruno Cardoso Lopes03e4c352010-08-31 21:15:21 +0000365def X86Movhlps : SDNode<"X86ISD::MOVHLPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000366
Bruno Cardoso Lopesb3825212010-09-01 05:08:25 +0000367def X86Movlps : SDNode<"X86ISD::MOVLPS", SDTShuff2Op>;
368def X86Movlpd : SDNode<"X86ISD::MOVLPD", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000369
Craig Toppera3ac7382015-11-26 07:58:20 +0000370def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
371 SDTCisSameSizeAs<0,1>,
372 SDTCisSameAs<1,2>]>;
Chandler Carruth8366ceb2014-06-20 01:05:28 +0000373def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
374def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>;
375
Craig Topper8d4ba192011-12-06 08:21:25 +0000376def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;
377def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000378
Igor Bregerf7fd5472015-07-21 07:11:28 +0000379def X86vpmaddubsw : SDNode<"X86ISD::VPMADDUBSW" , SDTPack>;
380def X86vpmaddwd : SDNode<"X86ISD::VPMADDWD" , SDTPack>;
381
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000382def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>;
Chandler Carruthed5dfff2014-09-22 22:29:42 +0000383def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>;
Craig Topperecae4762015-11-29 22:53:22 +0000384def X86VPermv : SDNode<"X86ISD::VPERMV",
385 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisInt<1>,
386 SDTCisSameNumEltsAs<0,1>,
387 SDTCisSameSizeAs<0,1>,
388 SDTCisSameAs<0,2>]>>;
Chandler Carruthed5dfff2014-09-22 22:29:42 +0000389def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;
Craig Topper05858f52015-11-26 20:02:01 +0000390def X86VPermt2 : SDNode<"X86ISD::VPERMV3",
391 SDTypeProfile<1, 3, [SDTCisVec<0>,
Elena Demikhovskyf07df9f2015-11-25 08:17:56 +0000392 SDTCisSameAs<0,1>, SDTCisInt<2>,
393 SDTCisVec<2>, SDTCisSameNumEltsAs<0, 2>,
Craig Toppera3ac7382015-11-26 07:58:20 +0000394 SDTCisSameSizeAs<0,2>,
Elena Demikhovskyf07df9f2015-11-25 08:17:56 +0000395 SDTCisSameAs<0,3>]>, []>;
Elena Demikhovskyf07df9f2015-11-25 08:17:56 +0000396
Craig Topperaad5f112015-11-30 00:13:24 +0000397def X86VPermi2X : SDNode<"X86ISD::VPERMIV3",
398 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisInt<1>,
399 SDTCisVec<1>, SDTCisSameNumEltsAs<0, 1>,
400 SDTCisSameSizeAs<0,1>,
401 SDTCisSameAs<0,2>,
402 SDTCisSameAs<0,3>]>, []>;
403
Igor Bregerb4bb1902015-10-15 12:33:24 +0000404def X86vpternlog : SDNode<"X86ISD::VPTERNLOG", SDTTernlog>;
Bruno Cardoso Lopesb878caa2011-07-21 01:55:47 +0000405
Craig Topper0a672ea2011-11-30 07:47:51 +0000406def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;
Bruno Cardoso Lopesf15dfe52011-08-12 21:48:26 +0000407
Igor Breger1e58e8a2015-09-02 11:18:55 +0000408def X86VFixupimm : SDNode<"X86ISD::VFIXUPIMM", SDTFPBinOpImmRound>;
409def X86VRange : SDNode<"X86ISD::VRANGE", SDTFPBinOpImmRound>;
410def X86VReduce : SDNode<"X86ISD::VREDUCE", SDTFPUnaryOpImmRound>;
411def X86VRndScale : SDNode<"X86ISD::VRNDSCALE", SDTFPUnaryOpImmRound>;
412def X86VGetMant : SDNode<"X86ISD::VGETMANT", SDTFPUnaryOpImmRound>;
Craig Topper9d1deb42015-11-26 18:31:19 +0000413def X86Vfpclass : SDNode<"X86ISD::VFPCLASS",
Asaf Badouh572bbce2015-09-20 08:46:07 +0000414 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,
Craig Topper00096562015-11-26 19:41:34 +0000415 SDTCisVec<1>, SDTCisFP<1>,
416 SDTCisSameNumEltsAs<0,1>,
417 SDTCisVT<2, i32>]>, []>;
418def X86Vfpclasss : SDNode<"X86ISD::VFPCLASSS",
419 SDTypeProfile<1, 2, [SDTCisVT<0, i1>,
420 SDTCisFP<1>, SDTCisVT<2, i32>]>,[]>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000421
Elena Demikhovskyad9c3962015-05-18 06:42:57 +0000422def X86SubVBroadcast : SDNode<"X86ISD::SUBV_BROADCAST",
423 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
424 SDTCisSubVecOfVec<1, 0>]>, []>;
Igor Bregerfa798a92015-11-02 07:39:36 +0000425// SDTCisSubVecOfVec restriction cannot be applied for 128 bit version of VBROADCASTI32x2.
426def X86SubV32x2Broadcast : SDNode<"X86ISD::SUBV_BROADCAST",
Craig Topper9d1deb42015-11-26 18:31:19 +0000427 SDTypeProfile<1, 1, [SDTCisVec<0>,
428 SDTCisSameAs<0,1>]>, []>;
Igor Bregerfa798a92015-11-02 07:39:36 +0000429
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000430def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>;
Asaf Badouh0d957b82015-11-18 09:42:45 +0000431def X86VBroadcastm : SDNode<"X86ISD::VBROADCASTM", SDTVBroadcastm>;
Elena Demikhovsky89529742013-09-12 08:55:00 +0000432def X86Vinsert : SDNode<"X86ISD::VINSERT", SDTypeProfile<1, 3,
Craig Topper9d1deb42015-11-26 18:31:19 +0000433 [SDTCisSameAs<0, 1>, SDTCisEltOfVec<2, 1>,
434 SDTCisPtrTy<3>]>, []>;
Elena Demikhovsky9f423d62014-02-10 07:02:39 +0000435def X86Vextract : SDNode<"X86ISD::VEXTRACT", SDTypeProfile<1, 2,
Craig Topper9d1deb42015-11-26 18:31:19 +0000436 [SDTCisEltOfVec<0, 1>, SDTCisVec<1>,
437 SDTCisPtrTy<2>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000438
Elena Demikhovskycd3c1c42012-12-05 09:24:57 +0000439def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>;
Chandler Carruth204ad4c2014-09-15 20:09:47 +0000440
441def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>;
442
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000443def X86faddRnd : SDNode<"X86ISD::FADD_RND", SDTFPBinOpRound>;
444def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>;
445def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>;
446def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;
Igor Breger4c4cd782015-09-20 09:13:41 +0000447def X86fmaxRnd : SDNode<"X86ISD::FMAX_RND", SDTFPBinOpRound>;
448def X86scalef : SDNode<"X86ISD::SCALEF", SDTFPBinOpRound>;
449def X86fminRnd : SDNode<"X86ISD::FMIN_RND", SDTFPBinOpRound>;
450def X86fsqrtRnd : SDNode<"X86ISD::FSQRT_RND", SDTFPUnaryOpRound>;
451def X86fsqrtRnds : SDNode<"X86ISD::FSQRT_RND", STDFp2SrcRm>;
Igor Breger8352a0d2015-07-28 06:53:28 +0000452def X86fgetexpRnd : SDNode<"X86ISD::FGETEXP_RND", SDTFPUnaryOpRound>;
453def X86fgetexpRnds : SDNode<"X86ISD::FGETEXP_RND", STDFp2SrcRm>;
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000454
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000455def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;
456def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
457def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFma>;
458def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFma>;
Craig Toppera999c662012-08-29 07:18:25 +0000459def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFma>;
460def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFma>;
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000461
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000462def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound>;
463def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound>;
464def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound>;
465def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound>;
466def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound>;
467def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound>;
468
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000469def X86rsqrt28 : SDNode<"X86ISD::RSQRT28", STDFp1SrcRm>;
470def X86rcp28 : SDNode<"X86ISD::RCP28", STDFp1SrcRm>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000471def X86exp2 : SDNode<"X86ISD::EXP2", STDFp1SrcRm>;
472
Igor Breger1e58e8a2015-09-02 11:18:55 +0000473def X86rsqrt28s : SDNode<"X86ISD::RSQRT28", STDFp2SrcRm>;
474def X86rcp28s : SDNode<"X86ISD::RCP28", STDFp2SrcRm>;
Asaf Badouha5b2e5e2015-07-22 12:00:43 +0000475def X86RndScales : SDNode<"X86ISD::VRNDSCALE", STDFp3SrcRm>;
Igor Breger1e58e8a2015-09-02 11:18:55 +0000476def X86Reduces : SDNode<"X86ISD::VREDUCE", STDFp3SrcRm>;
477def X86GetMants : SDNode<"X86ISD::VGETMANT", STDFp3SrcRm>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000478
Craig Topperab47fe42012-08-06 06:22:36 +0000479def SDT_PCMPISTRI : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
480 SDTCisVT<2, v16i8>, SDTCisVT<3, v16i8>,
481 SDTCisVT<4, i8>]>;
482def SDT_PCMPESTRI : SDTypeProfile<2, 5, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
483 SDTCisVT<2, v16i8>, SDTCisVT<3, i32>,
484 SDTCisVT<4, v16i8>, SDTCisVT<5, i32>,
485 SDTCisVT<6, i8>]>;
486
487def X86pcmpistri : SDNode<"X86ISD::PCMPISTRI", SDT_PCMPISTRI>;
488def X86pcmpestri : SDNode<"X86ISD::PCMPESTRI", SDT_PCMPESTRI>;
489
Elena Demikhovskyba5ab322015-06-22 11:16:30 +0000490def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 1,
491 [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>;
492def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 1,
493 [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>;
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000494
Igor Bregerabe4a792015-06-14 12:44:55 +0000495def SDTintToFPRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisFP<0>,
Craig Topper9d1deb42015-11-26 18:31:19 +0000496 SDTCisSameAs<0,1>, SDTCisInt<2>,
497 SDTCisVT<3, i32>]>;
Igor Bregerabe4a792015-06-14 12:44:55 +0000498
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000499def SDTDoubleToInt: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
500 SDTCisInt<0>, SDTCVecEltisVT<1, f64>]>;
501def SDTFloatToInt: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
502 SDTCisInt<0>, SDTCVecEltisVT<1, f32>]>;
503
504def SDTDoubleToIntRnd: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
505 SDTCisInt<0>, SDTCVecEltisVT<1, f64>]>;
Asaf Badouh2744d212015-09-20 14:31:19 +0000506def SDTSDoubleToIntRnd: SDTypeProfile<1, 2, [SDTCisInt<0>,SDTCisFP<1>,
507 SDTCVecEltisVT<1, f64>, SDTCisInt<2>]>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000508def SDTFloatToIntRnd: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
509 SDTCisInt<0>, SDTCVecEltisVT<1, f32>]>;
Asaf Badouh2744d212015-09-20 14:31:19 +0000510def SDTSFloatToIntRnd: SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisFP<1>,
511 SDTCVecEltisVT<1, f32>, SDTCisInt<2>]>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000512def SDTVintToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
513 SDTCisFP<0>, SDTCVecEltisVT<1, i32>,
514 SDTCisInt<2>]>;
515def SDTVlongToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
516 SDTCisFP<0>, SDTCVecEltisVT<1, i64>,
517 SDTCisInt<2>]>;
518
519def SDTVFPToIntRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
520 SDTCisFP<1>, SDTCVecEltisVT<0, i32>,
521 SDTCisInt<2>]>;
522def SDTVFPToLongRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
523 SDTCisFP<1>, SDTCVecEltisVT<0, i64>,
524 SDTCisInt<2>]>;
525
526// Scalar
527def X86SintToFpRnd : SDNode<"X86ISD::SINT_TO_FP_RND", SDTintToFPRound>;
528def X86UintToFpRnd : SDNode<"X86ISD::UINT_TO_FP_RND", SDTintToFPRound>;
529
Asaf Badouh2744d212015-09-20 14:31:19 +0000530def X86cvttss2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTSFloatToIntRnd>;
531def X86cvttss2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTSFloatToIntRnd>;
532def X86cvttsd2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTSDoubleToIntRnd>;
533def X86cvttsd2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTSDoubleToIntRnd>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000534// Vector with rounding mode
535
536// cvtt fp-to-int staff
537def X86VFpToSintRnd : SDNode<"ISD::FP_TO_SINT", SDTVFPToIntRound>;
538def X86VFpToUintRnd : SDNode<"ISD::FP_TO_UINT", SDTVFPToIntRound>;
539def X86VFpToSlongRnd : SDNode<"ISD::FP_TO_SINT", SDTVFPToLongRound>;
540def X86VFpToUlongRnd : SDNode<"ISD::FP_TO_UINT", SDTVFPToLongRound>;
541
542def X86VSintToFpRnd : SDNode<"ISD::SINT_TO_FP", SDTVintToFPRound>;
543def X86VUintToFpRnd : SDNode<"ISD::UINT_TO_FP", SDTVintToFPRound>;
544def X86VSlongToFpRnd : SDNode<"ISD::SINT_TO_FP", SDTVlongToFPRound>;
545def X86VUlongToFpRnd : SDNode<"ISD::UINT_TO_FP", SDTVlongToFPRound>;
546
547// cvt fp-to-int staff
548def X86cvtps2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTFloatToIntRnd>;
549def X86cvtps2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTFloatToIntRnd>;
550def X86cvtpd2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTDoubleToIntRnd>;
551def X86cvtpd2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTDoubleToIntRnd>;
552
553// Vector without rounding mode
554def X86cvtps2Int : SDNode<"X86ISD::FP_TO_SINT_RND", SDTFloatToInt>;
555def X86cvtps2UInt : SDNode<"X86ISD::FP_TO_UINT_RND", SDTFloatToInt>;
556def X86cvtpd2Int : SDNode<"X86ISD::FP_TO_SINT_RND", SDTDoubleToInt>;
557def X86cvtpd2UInt : SDNode<"X86ISD::FP_TO_UINT_RND", SDTDoubleToInt>;
558
Asaf Badouh7c522452015-10-22 14:01:16 +0000559def X86cvtph2ps : SDNode<"ISD::FP16_TO_FP",
560 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
561 SDTCVecEltisVT<0, f32>,
562 SDTCVecEltisVT<1, i16>,
Craig Topper9d1deb42015-11-26 18:31:19 +0000563 SDTCisFP<0>,
564 SDTCisVT<2, i32>]> >;
Asaf Badouh7c522452015-10-22 14:01:16 +0000565
Asaf Badouhc7cb8802015-10-27 15:37:17 +0000566def X86cvtps2ph : SDNode<"ISD::FP_TO_FP16",
567 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisVec<1>,
568 SDTCVecEltisVT<0, i16>,
569 SDTCVecEltisVT<1, f32>,
Craig Topper9d1deb42015-11-26 18:31:19 +0000570 SDTCisFP<1>, SDTCisVT<2, i32>,
571 SDTCisVT<3, i32>]> >;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000572def X86vfpextRnd : SDNode<"X86ISD::VFPEXT",
573 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
574 SDTCisFP<0>, SDTCisFP<1>,
Craig Topper9d1deb42015-11-26 18:31:19 +0000575 SDTCVecEltisVT<0, f64>,
576 SDTCVecEltisVT<1, f32>,
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000577 SDTCisOpSmallerThanOp<1, 0>,
Craig Topper9d1deb42015-11-26 18:31:19 +0000578 SDTCisVT<2, i32>]>>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000579def X86vfproundRnd: SDNode<"X86ISD::VFPROUND",
580 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
581 SDTCisFP<0>, SDTCisFP<1>,
582 SDTCVecEltisVT<0, f32>,
583 SDTCVecEltisVT<1, f64>,
Craig Topper9d1deb42015-11-26 18:31:19 +0000584 SDTCisOpSmallerThanOp<0, 1>,
585 SDTCisVT<2, i32>]>>;
Igor Bregerabe4a792015-06-14 12:44:55 +0000586
Igor Breger756c2892015-12-27 13:56:16 +0000587def X86cvt2mask : SDNode<"X86ISD::CVT2MASK", SDTIntTruncOp>;
588
David Greene03264ef2010-07-12 23:41:28 +0000589//===----------------------------------------------------------------------===//
590// SSE Complex Patterns
591//===----------------------------------------------------------------------===//
592
593// These are 'extloads' from a scalar to the low element of a vector, zeroing
594// the top elements. These are used for the SSE 'ss' and 'sd' instruction
595// forms.
Sanjay Patel85030aa2015-10-13 16:23:00 +0000596def sse_load_f32 : ComplexPattern<v4f32, 5, "selectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000597 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
598 SDNPWantRoot]>;
Sanjay Patel85030aa2015-10-13 16:23:00 +0000599def sse_load_f64 : ComplexPattern<v2f64, 5, "selectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000600 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
601 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000602
603def ssmem : Operand<v4f32> {
604 let PrintMethod = "printf32mem";
605 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000606 let ParserMatchClass = X86Mem32AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000607 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000608}
609def sdmem : Operand<v2f64> {
610 let PrintMethod = "printf64mem";
611 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000612 let ParserMatchClass = X86Mem64AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000613 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000614}
615
616//===----------------------------------------------------------------------===//
617// SSE pattern fragments
618//===----------------------------------------------------------------------===//
619
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000620// 128-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000621// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000622def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>;
623def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000624def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>;
625
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000626// 256-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000627// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000628def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>;
629def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000630def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>;
631
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000632// 512-bit load pattern fragments
633def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>;
634def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>;
Robert Khasanov7ca7df02014-08-04 14:35:15 +0000635def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>;
636def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>;
Elena Demikhovsky1f3ed412013-10-22 09:19:28 +0000637def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000638def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>;
639
640// 128-/256-/512-bit extload pattern fragments
Michael Liao400f7ef2012-09-10 18:33:51 +0000641def extloadv2f32 : PatFrag<(ops node:$ptr), (v2f64 (extloadvf32 node:$ptr))>;
642def extloadv4f32 : PatFrag<(ops node:$ptr), (v4f64 (extloadvf32 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000643def extloadv8f32 : PatFrag<(ops node:$ptr), (v8f64 (extloadvf32 node:$ptr))>;
Michael Liao400f7ef2012-09-10 18:33:51 +0000644
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000645// These are needed to match a scalar load that is used in a vector-only
646// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
647// The memory operand is required to be a 128-bit load, so it must be converted
648// from a vector to a scalar.
649def loadf32_128 : PatFrag<(ops node:$ptr),
Matt Arsenaultfbd9bbf2015-12-11 19:20:16 +0000650 (f32 (extractelt (loadv4f32 node:$ptr), (iPTR 0)))>;
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000651def loadf64_128 : PatFrag<(ops node:$ptr),
Matt Arsenaultfbd9bbf2015-12-11 19:20:16 +0000652 (f64 (extractelt (loadv2f64 node:$ptr), (iPTR 0)))>;
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000653
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000654// Like 'store', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000655def alignedstore : PatFrag<(ops node:$val, node:$ptr),
656 (store node:$val, node:$ptr), [{
657 return cast<StoreSDNode>(N)->getAlignment() >= 16;
658}]>;
659
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000660// Like 'store', but always requires 256-bit vector alignment.
661def alignedstore256 : PatFrag<(ops node:$val, node:$ptr),
662 (store node:$val, node:$ptr), [{
663 return cast<StoreSDNode>(N)->getAlignment() >= 32;
664}]>;
665
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000666// Like 'store', but always requires 512-bit vector alignment.
667def alignedstore512 : PatFrag<(ops node:$val, node:$ptr),
668 (store node:$val, node:$ptr), [{
669 return cast<StoreSDNode>(N)->getAlignment() >= 64;
670}]>;
671
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000672// Like 'load', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000673def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
674 return cast<LoadSDNode>(N)->getAlignment() >= 16;
675}]>;
676
Chad Rosiera281afc2012-03-09 02:00:48 +0000677// Like 'X86vzload', but always requires 128-bit vector alignment.
678def alignedX86vzload : PatFrag<(ops node:$ptr), (X86vzload node:$ptr), [{
679 return cast<MemSDNode>(N)->getAlignment() >= 16;
680}]>;
681
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000682// Like 'load', but always requires 256-bit vector alignment.
683def alignedload256 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
684 return cast<LoadSDNode>(N)->getAlignment() >= 32;
685}]>;
686
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000687// Like 'load', but always requires 512-bit vector alignment.
688def alignedload512 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
689 return cast<LoadSDNode>(N)->getAlignment() >= 64;
690}]>;
691
David Greene03264ef2010-07-12 23:41:28 +0000692def alignedloadfsf32 : PatFrag<(ops node:$ptr),
693 (f32 (alignedload node:$ptr))>;
694def alignedloadfsf64 : PatFrag<(ops node:$ptr),
695 (f64 (alignedload node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000696
697// 128-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000698// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000699def alignedloadv4f32 : PatFrag<(ops node:$ptr),
700 (v4f32 (alignedload node:$ptr))>;
701def alignedloadv2f64 : PatFrag<(ops node:$ptr),
702 (v2f64 (alignedload node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000703def alignedloadv2i64 : PatFrag<(ops node:$ptr),
704 (v2i64 (alignedload node:$ptr))>;
705
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000706// 256-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000707// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000708def alignedloadv8f32 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000709 (v8f32 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000710def alignedloadv4f64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000711 (v4f64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000712def alignedloadv4i64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000713 (v4i64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000714
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000715// 512-bit aligned load pattern fragments
716def alignedloadv16f32 : PatFrag<(ops node:$ptr),
717 (v16f32 (alignedload512 node:$ptr))>;
Elena Demikhovsky3ce8dbb2013-08-18 13:08:57 +0000718def alignedloadv16i32 : PatFrag<(ops node:$ptr),
719 (v16i32 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000720def alignedloadv8f64 : PatFrag<(ops node:$ptr),
721 (v8f64 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000722def alignedloadv8i64 : PatFrag<(ops node:$ptr),
723 (v8i64 (alignedload512 node:$ptr))>;
724
David Greene03264ef2010-07-12 23:41:28 +0000725// Like 'load', but uses special alignment checks suitable for use in
726// memory operands in most SSE instructions, which are required to
727// be naturally aligned on some targets but not on others. If the subtarget
728// allows unaligned accesses, match any load, though this may require
729// setting a feature bit in the processor (on startup, for example).
730// Opteron 10h and later implement such a feature.
731def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{
Sanjay Patelffd039b2015-02-03 17:13:04 +0000732 return Subtarget->hasSSEUnalignedMem()
David Greene03264ef2010-07-12 23:41:28 +0000733 || cast<LoadSDNode>(N)->getAlignment() >= 16;
734}]>;
735
736def memopfsf32 : PatFrag<(ops node:$ptr), (f32 (memop node:$ptr))>;
737def memopfsf64 : PatFrag<(ops node:$ptr), (f64 (memop node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000738
739// 128-bit memop pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000740// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000741def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;
742def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000743def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000744
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000745// These are needed to match a scalar memop that is used in a vector-only
746// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
747// The memory operand is required to be a 128-bit load, so it must be converted
748// from a vector to a scalar.
749def memopfsf32_128 : PatFrag<(ops node:$ptr),
Matt Arsenaultfbd9bbf2015-12-11 19:20:16 +0000750 (f32 (extractelt (memopv4f32 node:$ptr), (iPTR 0)))>;
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000751def memopfsf64_128 : PatFrag<(ops node:$ptr),
Matt Arsenaultfbd9bbf2015-12-11 19:20:16 +0000752 (f64 (extractelt (memopv2f64 node:$ptr), (iPTR 0)))>;
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000753
754
David Greene03264ef2010-07-12 23:41:28 +0000755// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
756// 16-byte boundary.
757// FIXME: 8 byte alignment for mmx reads is not required
758def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
759 return cast<LoadSDNode>(N)->getAlignment() >= 8;
760}]>;
761
Dale Johannesendd224d22010-09-30 23:57:10 +0000762def memopmmx : PatFrag<(ops node:$ptr), (x86mmx (memop64 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000763
Elena Demikhovsky6a1a3572015-06-28 10:53:29 +0000764def mgatherv4i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
765 (masked_gather node:$src1, node:$src2, node:$src3) , [{
766 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
767 return (Mgt->getIndex().getValueType() == MVT::v4i32 ||
768 Mgt->getBasePtr().getValueType() == MVT::v4i32);
769 return false;
770}]>;
771
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000772def mgatherv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
773 (masked_gather node:$src1, node:$src2, node:$src3) , [{
774 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
775 return (Mgt->getIndex().getValueType() == MVT::v8i32 ||
776 Mgt->getBasePtr().getValueType() == MVT::v8i32);
777 return false;
778}]>;
779
Elena Demikhovsky6a1a3572015-06-28 10:53:29 +0000780def mgatherv2i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
781 (masked_gather node:$src1, node:$src2, node:$src3) , [{
782 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
783 return (Mgt->getIndex().getValueType() == MVT::v2i64 ||
784 Mgt->getBasePtr().getValueType() == MVT::v2i64);
785 return false;
786}]>;
787def mgatherv4i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
788 (masked_gather node:$src1, node:$src2, node:$src3) , [{
789 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
790 return (Mgt->getIndex().getValueType() == MVT::v4i64 ||
791 Mgt->getBasePtr().getValueType() == MVT::v4i64);
792 return false;
793}]>;
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000794def mgatherv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
795 (masked_gather node:$src1, node:$src2, node:$src3) , [{
796 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
797 return (Mgt->getIndex().getValueType() == MVT::v8i64 ||
798 Mgt->getBasePtr().getValueType() == MVT::v8i64);
799 return false;
800}]>;
801def mgatherv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
802 (masked_gather node:$src1, node:$src2, node:$src3) , [{
803 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
804 return (Mgt->getIndex().getValueType() == MVT::v16i32 ||
805 Mgt->getBasePtr().getValueType() == MVT::v16i32);
806 return false;
807}]>;
808
Elena Demikhovsky30bc4ca2015-06-29 12:14:24 +0000809def mscatterv2i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
810 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
811 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
812 return (Sc->getIndex().getValueType() == MVT::v2i64 ||
813 Sc->getBasePtr().getValueType() == MVT::v2i64);
814 return false;
815}]>;
816
817def mscatterv4i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
818 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
819 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
820 return (Sc->getIndex().getValueType() == MVT::v4i32 ||
821 Sc->getBasePtr().getValueType() == MVT::v4i32);
822 return false;
823}]>;
824
825def mscatterv4i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
826 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
827 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
828 return (Sc->getIndex().getValueType() == MVT::v4i64 ||
829 Sc->getBasePtr().getValueType() == MVT::v4i64);
830 return false;
831}]>;
832
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000833def mscatterv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
834 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
835 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
836 return (Sc->getIndex().getValueType() == MVT::v8i32 ||
837 Sc->getBasePtr().getValueType() == MVT::v8i32);
838 return false;
839}]>;
840
841def mscatterv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
842 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
843 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
844 return (Sc->getIndex().getValueType() == MVT::v8i64 ||
845 Sc->getBasePtr().getValueType() == MVT::v8i64);
846 return false;
847}]>;
848def mscatterv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
849 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
850 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
851 return (Sc->getIndex().getValueType() == MVT::v16i32 ||
852 Sc->getBasePtr().getValueType() == MVT::v16i32);
853 return false;
854}]>;
855
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000856// 128-bit bitconvert pattern fragments
David Greene03264ef2010-07-12 23:41:28 +0000857def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>;
858def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>;
859def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>;
860def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>;
861def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;
862def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;
863
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000864// 256-bit bitconvert pattern fragments
Craig Topper682b8502011-11-02 04:42:13 +0000865def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;
866def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000867def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;
Bruno Cardoso Lopes1021b4a2011-07-13 01:15:33 +0000868def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;
Elena Demikhovsky3629b4a2014-01-06 08:45:54 +0000869def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000870
Craig Topper8c929622013-08-16 06:07:34 +0000871// 512-bit bitconvert pattern fragments
872def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>;
873def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000874def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;
875def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>;
Craig Topper8c929622013-08-16 06:07:34 +0000876
David Greene03264ef2010-07-12 23:41:28 +0000877def vzmovl_v2i64 : PatFrag<(ops node:$src),
878 (bitconvert (v2i64 (X86vzmovl
879 (v2i64 (scalar_to_vector (loadi64 node:$src))))))>;
880def vzmovl_v4i32 : PatFrag<(ops node:$src),
881 (bitconvert (v4i32 (X86vzmovl
882 (v4i32 (scalar_to_vector (loadi32 node:$src))))))>;
883
884def vzload_v2i64 : PatFrag<(ops node:$src),
885 (bitconvert (v2i64 (X86vzload node:$src)))>;
886
887
888def fp32imm0 : PatLeaf<(f32 fpimm), [{
889 return N->isExactlyValue(+0.0);
890}]>;
891
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000892def I8Imm : SDNodeXForm<imm, [{
893 // Transformation function: get the low 8 bits.
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000894 return getI8Imm((uint8_t)N->getZExtValue(), SDLoc(N));
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000895}]>;
896
897def FROUND_NO_EXC : ImmLeaf<i32, [{ return Imm == 8; }]>;
Adam Nemet50b83f02014-08-14 17:13:26 +0000898def FROUND_CURRENT : ImmLeaf<i32, [{
899 return Imm == X86::STATIC_ROUNDING::CUR_DIRECTION;
900}]>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000901
David Greene03264ef2010-07-12 23:41:28 +0000902// BYTE_imm - Transform bit immediates into byte immediates.
903def BYTE_imm : SDNodeXForm<imm, [{
904 // Transformation function: imm >> 3
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000905 return getI32Imm(N->getZExtValue() >> 3, SDLoc(N));
David Greene03264ef2010-07-12 23:41:28 +0000906}]>;
907
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000908// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index
909// to VEXTRACTF128/VEXTRACTI128 imm.
910def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000911 return getI8Imm(X86::getExtractVEXTRACT128Immediate(N), SDLoc(N));
David Greenec4da1102011-02-03 15:50:00 +0000912}]>;
913
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000914// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to
915// VINSERTF128/VINSERTI128 imm.
916def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000917 return getI8Imm(X86::getInsertVINSERT128Immediate(N), SDLoc(N));
David Greene653f1ee2011-02-04 16:08:29 +0000918}]>;
919
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000920// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index
921// to VEXTRACTF64x4 imm.
922def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000923 return getI8Imm(X86::getExtractVEXTRACT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000924}]>;
925
926// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to
927// VINSERTF64x4 imm.
928def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000929 return getI8Imm(X86::getInsertVINSERT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000930}]>;
931
932def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index),
David Greenec4da1102011-02-03 15:50:00 +0000933 (extract_subvector node:$bigvec,
934 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000935 return X86::isVEXTRACT128Index(N);
936}], EXTRACT_get_vextract128_imm>;
David Greene653f1ee2011-02-04 16:08:29 +0000937
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000938def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
David Greene653f1ee2011-02-04 16:08:29 +0000939 node:$index),
940 (insert_subvector node:$bigvec, node:$smallvec,
941 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000942 return X86::isVINSERT128Index(N);
943}], INSERT_get_vinsert128_imm>;
944
945
946def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index),
947 (extract_subvector node:$bigvec,
948 node:$index), [{
949 return X86::isVEXTRACT256Index(N);
950}], EXTRACT_get_vextract256_imm>;
951
952def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
953 node:$index),
954 (insert_subvector node:$bigvec, node:$smallvec,
955 node:$index), [{
956 return X86::isVINSERT256Index(N);
957}], INSERT_get_vinsert256_imm>;
Bruno Cardoso Lopes123dff02011-07-25 23:05:25 +0000958
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000959def masked_load_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
960 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000961 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
962 return Load->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000963 return false;
964}]>;
965
966def masked_load_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
967 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000968 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
969 return Load->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000970 return false;
971}]>;
972
973def masked_load_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
974 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000975 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
976 return Load->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000977 return false;
978}]>;
979
980def masked_load_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
981 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000982 return isa<MaskedLoadSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000983}]>;
984
Igor Breger074a64e2015-07-24 17:24:15 +0000985// masked store fragments.
986// X86mstore can't be implemented in core DAG files because some targets
987// doesn't support vector type ( llvm-tblgen will fail)
988def X86mstore : PatFrag<(ops node:$src1, node:$src2, node:$src3),
989 (masked_store node:$src1, node:$src2, node:$src3), [{
990 return !cast<MaskedStoreSDNode>(N)->isTruncatingStore();
991}]>;
992
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000993def masked_store_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +0000994 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000995 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
996 return Store->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000997 return false;
998}]>;
999
1000def masked_store_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +00001001 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +00001002 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
1003 return Store->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +00001004 return false;
1005}]>;
1006
1007def masked_store_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +00001008 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +00001009 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
1010 return Store->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +00001011 return false;
1012}]>;
1013
1014def masked_store_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +00001015 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +00001016 return isa<MaskedStoreSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +00001017}]>;
1018
Igor Breger074a64e2015-07-24 17:24:15 +00001019// masked truncstore fragments
1020// X86mtruncstore can't be implemented in core DAG files because some targets
1021// doesn't support vector type ( llvm-tblgen will fail)
1022def X86mtruncstore : PatFrag<(ops node:$src1, node:$src2, node:$src3),
1023 (masked_store node:$src1, node:$src2, node:$src3), [{
1024 return cast<MaskedStoreSDNode>(N)->isTruncatingStore();
1025}]>;
1026def masked_truncstorevi8 :
1027 PatFrag<(ops node:$src1, node:$src2, node:$src3),
1028 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{
1029 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;
1030}]>;
1031def masked_truncstorevi16 :
1032 PatFrag<(ops node:$src1, node:$src2, node:$src3),
1033 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{
1034 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;
1035}]>;
1036def masked_truncstorevi32 :
1037 PatFrag<(ops node:$src1, node:$src2, node:$src3),
1038 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{
1039 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;
1040}]>;