blob: 949c3d93929080c6d04950602fd551fe9c25aea3 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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475 "src/math/expm1minus-scalar-rr2-p6.c",
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477 "src/math/expminus-scalar-rr2-lut2048-p1.c",
478 "src/math/expminus-scalar-rr2-p5.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
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484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
489 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700494 "src/params-init.c",
Marat Dukhan57547062021-06-30 16:53:29 -0700495 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
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497 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
498 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
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500 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
501 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
502 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
503 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
504 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
505 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
506 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhand6021542021-06-30 09:04:20 -0700507 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
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509 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
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511 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
512 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
513 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
514 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
515 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
516 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
517 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
518 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
519 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
520 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
521 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
522 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
523 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
524 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
525 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
526 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
528 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
530 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
531 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
532 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
541 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700542 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
543 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700545 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
546 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
552 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
553 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700554 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
555 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
556 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700557 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
558 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
559 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
560 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
561 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
562 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700563 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
564 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700565 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700566 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
567 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700568 "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700569 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
570 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700571 "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700572 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
573 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700574 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700575 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
576 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700577 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700578 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
579 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700580 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700581 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
582 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700583 "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700584 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
585 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700586 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700587 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
588 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700589 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700590 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
591 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700592 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700593 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
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597 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700598 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700608 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700610 "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700611 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan06716242021-05-26 15:56:39 -0700614 "src/qs8-requantization/rndna-scalar-signed64.c",
615 "src/qs8-requantization/rndna-scalar-unsigned32.c",
616 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan062bee32021-05-27 20:31:07 -0700617 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700618 "src/qs8-vadd/gen/minmax-scalar-x1.c",
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620 "src/qs8-vadd/gen/minmax-scalar-x4.c",
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622 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
623 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700624 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
625 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700626 "src/qu8-dwconv/up1x9-minmax-gemmlowp-scalar.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700627 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
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Marat Dukhanc2e8f662021-07-01 17:06:34 -0700629 "src/qu8-gemm/2x2-minmax-gemmlowp-scalar.c",
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638 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
639 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
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641 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
642 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
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644 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
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648 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
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651 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
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655 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
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660 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
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662 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700663 "src/qu8-requantization/fp32-scalar-lrintf.c",
664 "src/qu8-requantization/fp32-scalar-magic.c",
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667 "src/qu8-requantization/rndna-scalar-unsigned32.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700670 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700671 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700672 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700673 "src/u8-vclamp/scalar-x4.c",
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678 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800679 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700680 "src/x32-fill/scalar-float.c",
681 "src/x32-fill/scalar-int.c",
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Marat Dukhan63523d42020-05-22 17:07:33 -0700685 "src/x32-pad/scalar-float.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700687 "src/x32-unpool/scalar.c",
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690 "src/x32-zip/x4-scalar.c",
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Marat Dukhan048931b2020-11-24 20:53:54 -0800692 "src/xx-copy/memcpy.c",
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694
Marat Dukhan436ebe62019-12-04 15:10:12 -0800695WASM_UKERNELS = [
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001477 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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1520 "src/math/roundz-wasmsimd-addsub.c",
1521 "src/math/roundz-wasmsimd-cvt.c",
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Marat Dukhane3b78762020-07-16 20:02:58 -07001621 "src/x32-zip/x2-wasmsimd.c",
1622 "src/x32-zip/x3-wasmsimd.c",
1623 "src/x32-zip/x4-wasmsimd.c",
1624 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001625]
1626
Marat Dukhan08c4a432019-10-03 09:29:21 -07001627# ISA-specific micro-kernels
1628NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001629 "src/f32-argmaxpool/4x-neon-c4.c",
1630 "src/f32-argmaxpool/9p8x-neon-c4.c",
1631 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001632 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1633 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001634 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001635 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001636 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001637 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001638 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001639 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001640 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001641 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001642 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001643 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001644 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001645 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001646 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001647 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001648 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1649 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1650 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1651 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1652 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001653 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001654 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001655 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1656 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1657 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001658 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001659 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001660 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1661 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1662 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1663 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1664 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001665 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1666 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1667 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001668 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001669 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001670 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1671 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1672 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001673 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1674 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1675 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1676 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001677 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001678 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1679 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001680 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001681 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001682 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001683 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001684 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1685 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001686 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1687 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1688 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1689 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1690 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1691 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1692 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1693 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001694 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001695 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001696 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001697 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1698 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001699 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001700 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1701 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001702 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001703 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1704 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1705 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1706 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1707 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001708 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1709 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1711 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001712 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1713 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001714 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1715 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1716 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1717 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1718 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1719 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1720 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1721 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1722 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1723 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1724 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1725 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1726 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1727 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1728 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1729 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001730 "src/f32-ibilinear-chw/gen/neon-p4.c",
1731 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001732 "src/f32-ibilinear/gen/neon-c4.c",
1733 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001734 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001735 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001736 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001737 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1738 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001739 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001740 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1741 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1742 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1743 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001744 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1745 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001746 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1747 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001748 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1749 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001750 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1751 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1752 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001753 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1754 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001755 "src/f32-prelu/gen/neon-1x4.c",
1756 "src/f32-prelu/gen/neon-1x8.c",
1757 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001758 "src/f32-prelu/gen/neon-2x4.c",
1759 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001760 "src/f32-prelu/gen/neon-2x16.c",
1761 "src/f32-prelu/gen/neon-4x4.c",
1762 "src/f32-prelu/gen/neon-4x8.c",
1763 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001764 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001765 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001766 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001767 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1768 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001769 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001770 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1771 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001772 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001773 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1774 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001775 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1776 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1777 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1778 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1779 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1780 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1781 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1782 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1783 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1784 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1785 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1786 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1787 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001788 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001789 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1790 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1791 "src/f32-spmm/gen/4x1-minmax-neon.c",
1792 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1793 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1794 "src/f32-spmm/gen/8x1-minmax-neon.c",
1795 "src/f32-spmm/gen/12x1-minmax-neon.c",
1796 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1797 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1798 "src/f32-spmm/gen/16x1-minmax-neon.c",
1799 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1800 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1801 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001802 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1803 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1804 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1805 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001806 "src/f32-vbinary/gen/vmax-neon-x4.c",
1807 "src/f32-vbinary/gen/vmax-neon-x8.c",
1808 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1809 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1810 "src/f32-vbinary/gen/vmin-neon-x4.c",
1811 "src/f32-vbinary/gen/vmin-neon-x8.c",
1812 "src/f32-vbinary/gen/vminc-neon-x4.c",
1813 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001814 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1815 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1816 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1817 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1818 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1819 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001820 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1821 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1822 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1823 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001824 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1825 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1826 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1827 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001828 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1829 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001830 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1831 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1832 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1833 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1834 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1835 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1836 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1837 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1838 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1839 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1840 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1841 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001842 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1843 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1844 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001845 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1846 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001847 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1848 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001849 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1850 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001851 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1852 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001853 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1854 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1855 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1856 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1857 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1858 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001859 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1860 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1861 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1862 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1863 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1864 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1865 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1866 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1867 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1868 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1869 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1870 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1871 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1872 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1873 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1874 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1875 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1876 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001877 "src/f32-vunary/gen/vabs-neon-x4.c",
1878 "src/f32-vunary/gen/vabs-neon-x8.c",
1879 "src/f32-vunary/gen/vneg-neon-x4.c",
1880 "src/f32-vunary/gen/vneg-neon-x8.c",
1881 "src/f32-vunary/gen/vsqr-neon-x4.c",
1882 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001883 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1884 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001885 "src/math/roundd-neon-addsub.c",
1886 "src/math/roundd-neon-cvt.c",
1887 "src/math/roundne-neon-addsub.c",
1888 "src/math/roundu-neon-addsub.c",
1889 "src/math/roundu-neon-cvt.c",
1890 "src/math/roundz-neon-addsub.c",
1891 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001892 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1893 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1894 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1895 "src/math/sqrt-neon-nr1rsqrts.c",
1896 "src/math/sqrt-neon-nr2rsqrts.c",
1897 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001898 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
1899 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
1900 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
1901 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1902 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1903 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1904 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1905 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001906 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001907 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1908 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001909 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001910 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1911 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001912 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001913 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1914 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001915 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001916 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1917 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001918 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001919 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001920 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001921 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001922 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001923 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001924 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001925 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001926 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001927 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001928 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001929 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001930 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001931 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001932 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001933 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001934 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1935 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1936 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1937 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001938 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1939 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1940 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1941 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001942 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1943 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1944 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001945 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001946 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1947 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001948 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001949 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001950 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1951 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001952 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001953 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1954 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1955 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1956 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1957 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1958 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1959 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1960 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1961 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1962 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1963 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001964 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001965 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1966 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001967 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001968 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001969 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1970 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1971 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1972 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1973 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1974 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1975 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1976 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1977 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1978 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1979 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1980 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1981 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1982 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1983 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1984 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1985 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1986 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1987 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1988 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1989 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1990 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1991 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1992 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1993 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1994 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1995 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1996 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1997 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1998 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1999 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2000 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2001 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2002 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002003 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002004 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2005 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2006 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2007 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2008 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2009 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2010 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2011 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2012 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2013 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2014 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2015 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
2016 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2017 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2018 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002019 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002020 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2021 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002022 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002023 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002024 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
2025 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002026 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002027 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2028 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2029 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2030 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2031 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2032 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2033 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2034 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2035 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2036 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2037 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002038 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002039 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2040 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002041 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002042 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002043 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
2044 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2045 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2046 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2047 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2048 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2049 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2050 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2051 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2052 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2053 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2054 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2055 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2056 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2057 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2058 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2059 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2060 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2061 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2062 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2063 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2064 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2065 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2066 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2067 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2068 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2069 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2070 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2071 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2072 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2073 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2074 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2075 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2076 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002077 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002078 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2079 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2080 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2081 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2082 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2083 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2084 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2085 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2086 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2087 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2088 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2089 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002090 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002091 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002092 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07002093 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002094 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2095 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2096 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2097 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2098 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2099 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2100 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2101 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002102 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2103 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002104 "src/qu8-dwconv/up8x9-minmax-gemmlowp-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002105 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2106 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002107 "src/qu8-gemm/4x8-minmax-gemmlowp-neon.c",
2108 "src/qu8-gemm/8x8-minmax-gemmlowp-neon.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002109 "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2110 "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002111 "src/qu8-igemm/4x8-minmax-gemmlowp-neon.c",
2112 "src/qu8-igemm/8x8-minmax-gemmlowp-neon.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002113 "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2114 "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002115 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002116 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002117 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002118 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002119 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002120 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002121 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002122 "src/x8-zip/x2-neon.c",
2123 "src/x8-zip/x3-neon.c",
2124 "src/x8-zip/x4-neon.c",
2125 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002126 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002127 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002128 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002129 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002130 "src/x32-zip/x2-neon.c",
2131 "src/x32-zip/x3-neon.c",
2132 "src/x32-zip/x4-neon.c",
2133 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002134]
2135
2136NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002137 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2138 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2139 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2140 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2141 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2142 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2143 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2144 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2145 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2146 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2147 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2148 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2149 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2150 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2151 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2152 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2153 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2154 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2155 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2156 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2157 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2158 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2159 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2160 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2161 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2162 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2163 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2164 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2165 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2166 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002167 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2168 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002169 "src/f32-ibilinear/gen/neonfma-c4.c",
2170 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002171 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002172 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002173 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002174 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2175 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002176 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2177 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002178 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2179 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002180 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2181 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002182 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002183 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002184 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002185 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2186 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002187 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002188 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2189 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002190 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002191 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2192 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002193 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2194 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2195 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2196 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2197 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2198 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2199 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2200 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2201 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2202 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2203 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2204 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2205 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002206 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2207 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2208 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2209 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2210 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2211 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2212 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2213 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2214 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2215 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2216 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2217 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2218 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002219 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2220 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2221 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2222 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2223 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2224 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2225 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2226 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2227 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2228 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2229 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2230 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002231 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2232 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002233 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2234 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2235 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2236 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2237 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2238 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2239 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2240 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2241 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2242 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2243 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2244 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2245 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2246 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2247 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2248 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2249 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2250 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2251 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2252 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2253 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2254 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2255 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2256 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2257 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2258 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2259 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2260 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2261 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2262 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2263 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2264 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2265 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2266 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2267 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2268 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2269 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2270 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2271 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2272 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2273 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2274 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2275 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2276 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2277 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2278 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2279 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2280 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2281 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2282 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2283 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2284 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2285 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2286 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002287 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2288 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2289 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2290 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2291 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2292 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2293 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2294 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2295 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2296 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2297 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2298 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2299 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2300 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2301 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2302 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2303 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2304 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2305 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2306 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002307 "src/math/exp-neonfma-rr2-lut64-p2.c",
2308 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002309 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2310 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002311 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2312 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2313 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002314 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2315 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2316 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002317 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2318 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2319 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002320 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2321 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2322 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002323 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2324 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2325 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002326 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2327 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2328 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002329 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2330 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2331 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002332 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002333 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002334 "src/math/sqrt-neonfma-nr2fma.c",
2335 "src/math/sqrt-neonfma-nr2fma1adj.c",
2336 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002337]
2338
2339AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002340 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002341 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002342 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
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Marat Dukhan56b10cd2020-05-18 09:35:49 -07002344 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002346 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
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Marat Dukhan1f29b802020-05-15 23:46:39 -07002348 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002349 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan1268a242020-10-24 00:36:32 -07002352 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
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Marat Dukhan1268a242020-10-24 00:36:32 -07002354 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2358 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002359 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002362 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002363 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002364 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
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Marat Dukhan149f0ea2020-10-26 12:50:33 -07002367 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002371 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002372 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002374 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002375 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002376 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002377 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002378 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2379 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002380 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2381 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
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2383 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
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2385 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002388 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002389 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002390 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2391 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2392 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2393 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2394 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2395 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2396 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2397 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2398 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2399 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2400 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
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2402 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
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Marat Dukhan355ab432020-04-09 19:01:52 -07002410 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2411 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002412 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2413 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002414 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2415 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002416 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2417 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002418 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2419 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002420 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2421 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2422 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2423 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2424 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2425 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002426 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2427 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2428 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2429 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2430 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2431 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2432 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2433 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
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2435 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2436 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
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2438 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2439 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2440 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2441 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2442 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07002444 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002448 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002449 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002451 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002452]
2453
Marat Dukhan8853b822020-05-07 12:19:01 -07002454NEONV8_UKERNELS = [
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002504 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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Marat Dukhan8853b822020-05-07 12:19:01 -07002511]
2512
Marat Dukhan08c4a432019-10-03 09:29:21 -07002513AARCH64_NEONFP16ARITH_UKERNELS = [
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2542 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
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2562 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2563 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002598]
2599
Benoit Jacoba9644732020-08-13 12:48:55 -07002600NEONDOT_UKERNELS = [
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2605 "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2606 "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2607 "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2608 "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2609 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2610 "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2611 "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2612 "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2613 "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2614 "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2615 "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2616 "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002617 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2618 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002619 "src/qs8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2620 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002621 "src/qs8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2622 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002623 "src/qs8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2624 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002625 "src/qs8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2626 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002627 "src/qs8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2628 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002629 "src/qs8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2630 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002631 "src/qs8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2632 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002633 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2634 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002635 "src/qs8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2636 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002637 "src/qs8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2638 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002639 "src/qs8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2640 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002641 "src/qs8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2642 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002643 "src/qs8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2644 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002645 "src/qs8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2646 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002647 "src/qs8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
2648 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002649]
2650
Marat Dukhan08c4a432019-10-03 09:29:21 -07002651SSE_UKERNELS = [
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Erich Elsenb1233402020-06-08 15:53:15 -07002654 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002656 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
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2658 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002660 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002662 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
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2664 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2665 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002666 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002668 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
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Marat Dukhan470078a2020-10-23 22:36:52 -07002671 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
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Marat Dukhan470078a2020-10-23 22:36:52 -07002673 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
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2676 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2677 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002678 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002681 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002682 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002683 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
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Marat Dukhand0503892020-10-30 08:22:04 -07002686 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
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2688 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2689 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2690 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2691 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2692 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
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2695 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
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Marat Dukhanccca2142020-10-30 17:32:45 -07002699 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
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Marat Dukhanccca2142020-10-30 17:32:45 -07002707 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
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Marat Dukhan1f29b802020-05-15 23:46:39 -07002709 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002710 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002712 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002718 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
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Marat Dukhan802fcae2020-12-11 14:37:25 -08002721 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002724 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
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2726 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002727 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002730 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
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Marat Dukhan802fcae2020-12-11 14:37:25 -08002734 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
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Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002737 "src/f32-ibilinear-chw/gen/sse-p4.c",
2738 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002739 "src/f32-ibilinear/gen/sse-c4.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002741 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
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2743 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002744 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002747 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
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Marat Dukhan99936602020-04-11 16:47:01 -07002754 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002757 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002758 "src/f32-prelu/gen/sse-2x4.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002760 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002761 "src/f32-spmm/gen/4x1-minmax-sse.c",
2762 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002763 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002764 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002765 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
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2767 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2768 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2769 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2770 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2771 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2772 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002773 "src/f32-vbinary/gen/vmax-sse-x4.c",
2774 "src/f32-vbinary/gen/vmax-sse-x8.c",
2775 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2776 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2777 "src/f32-vbinary/gen/vmin-sse-x4.c",
2778 "src/f32-vbinary/gen/vmin-sse-x8.c",
2779 "src/f32-vbinary/gen/vminc-sse-x4.c",
2780 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002781 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
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2785 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
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Marat Dukhan13bafb02020-06-05 00:43:11 -07002789 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
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2791 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
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Marat Dukhan91cd2b72020-04-09 23:57:31 -07002793 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07002797 "src/f32-vclamp/gen/vclamp-sse-x4.c",
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Marat Dukhan6674d692021-05-05 22:27:00 -07002799 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2800 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002801 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
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Marat Dukhan99936602020-04-11 16:47:01 -07002803 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07002805 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2806 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002807 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2808 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002809 "src/f32-vunary/gen/vabs-sse-x4.c",
2810 "src/f32-vunary/gen/vabs-sse-x8.c",
2811 "src/f32-vunary/gen/vneg-sse-x4.c",
2812 "src/f32-vunary/gen/vneg-sse-x8.c",
2813 "src/f32-vunary/gen/vsqr-sse-x4.c",
2814 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002815 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002816 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002817 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002818 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002819 "src/math/sqrt-sse-hh1mac.c",
2820 "src/math/sqrt-sse-nr1mac.c",
2821 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002822 "src/x32-fill/sse.c",
2823 "src/x32-packx/x4-sse.c",
2824 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002825]
2826
2827SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002828 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002829 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002830 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002831 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2832 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2833 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2834 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2835 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2836 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2837 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2838 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2839 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2840 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2841 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2842 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002843 "src/f32-prelu/gen/sse2-2x4.c",
2844 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002845 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002846 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002847 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002848 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2849 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002850 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002851 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2852 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002853 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002854 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2855 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002856 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002857 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2858 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2859 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2860 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2861 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2862 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2863 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2864 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2865 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2866 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2867 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2868 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002869 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2870 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002871 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2872 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002873 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2874 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2875 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2876 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2877 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2878 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002879 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2880 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2881 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2882 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2883 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2884 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2885 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2886 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2887 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2888 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2889 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2890 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002891 "src/math/exp-sse2-rr2-lut64-p2.c",
2892 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002893 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002894 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002895 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002896 "src/math/roundd-sse2-cvt.c",
2897 "src/math/roundne-sse2-cvt.c",
2898 "src/math/roundu-sse2-cvt.c",
2899 "src/math/roundz-sse2-cvt.c",
2900 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2901 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2902 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2903 "src/math/sigmoid-sse2-rr2-p5-div.c",
2904 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2905 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002906 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2907 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2908 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2909 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2910 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2911 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002912 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002913 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002914 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002915 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002916 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002917 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002918 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002919 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002920 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002921 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002922 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002923 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002924 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002925 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002926 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002927 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002928 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002929 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002930 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002931 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002932 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002933 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002934 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002935 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002936 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002937 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002938 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002939 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002940 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2941 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002942 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2943 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2944 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2945 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2946 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2947 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2948 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2949 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2950 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
2951 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002952 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2953 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2954 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002955 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2956 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2957 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002958 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002959 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002960 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002961 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002962 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002963 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002964 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002965 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002966 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002967 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002968 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002969 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002970 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002971 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002972 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002973 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002974 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002975 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002976 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002977 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002978 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002979 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002980 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002981 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002982 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002983 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002984 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002985 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002986 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002987 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002988 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002989 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002990 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002991 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002992 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002993 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002994 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002995 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
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Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002997 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002998 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002999 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003000 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07003004 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07003008 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
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Marat Dukhanf0f28812021-07-08 22:34:20 -07003010 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
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Marat Dukhanef47f8d2021-07-02 15:08:32 -07003017 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
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3021 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
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Marat Dukhancdbe9a32021-07-01 23:52:04 -07003025 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003026 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
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Marat Dukhancdbe9a32021-07-01 23:52:04 -07003032 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003033 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
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Marat Dukhancdbe9a32021-07-01 23:52:04 -07003041 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003042 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
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3047 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003048 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07003049 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003050 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003051 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003052 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07003053 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003054 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003055 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003056 "src/x8-zip/x2-sse2.c",
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3058 "src/x8-zip/x4-sse2.c",
3059 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07003060 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003061 "src/x32-zip/x2-sse2.c",
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3063 "src/x32-zip/x4-sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07003065]
3066
3067SSSE3_UKERNELS = [
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3122
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003123SSE41_UKERNELS = [
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Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003140 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003142 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003160 "src/math/roundd-sse41.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003208 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
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3211 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3212 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3213 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3214 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3215 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3216 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
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3218 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3219 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3220 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3221 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
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Marat Dukhan159688f2020-08-06 10:34:29 -07003228 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003248 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003249 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003251 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003252 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003256 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003257 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003269 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003270 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003273 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003274 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003275 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003276 "src/qs8-requantization/rndnu-sse4-sra.c",
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Marat Dukhand9f3ad42020-08-10 12:30:58 -07003278 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
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Marat Dukhanbb9225e2020-09-06 22:40:56 -07003282 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07003286 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
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3337
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Frank Barchard04336c12020-10-22 16:48:55 -07003356 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003357 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003358 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3359 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3360 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3361 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3362 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3363 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3364 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3365 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3366 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3367 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3368 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003369 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003370 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3371 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003372 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003373 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003374 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003375 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003376 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3377 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003378 "src/f32-prelu/gen/avx-2x8.c",
3379 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003380 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003381 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3382 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3383 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3384 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3385 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3386 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3387 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3388 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003389 "src/f32-vbinary/gen/vmax-avx-x8.c",
3390 "src/f32-vbinary/gen/vmax-avx-x16.c",
3391 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3392 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3393 "src/f32-vbinary/gen/vmin-avx-x8.c",
3394 "src/f32-vbinary/gen/vmin-avx-x16.c",
3395 "src/f32-vbinary/gen/vminc-avx-x8.c",
3396 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003397 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3398 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3399 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3400 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3401 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3402 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3403 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3404 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003405 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3406 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3407 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3408 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003409 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3410 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3411 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3412 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003413 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3414 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003415 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3416 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3417 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3418 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3419 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3420 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3421 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3422 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3423 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3424 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3425 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3426 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3427 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3428 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3429 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3430 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3431 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3432 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003433 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3434 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003435 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3436 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003437 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3438 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003439 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3440 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003441 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3442 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3443 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3444 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3445 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3446 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003447 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003448 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3449 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3450 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3451 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3452 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3453 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3454 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3455 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3456 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3457 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3458 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3459 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3460 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3461 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3462 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3463 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3464 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3465 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3466 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3467 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003468 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3469 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003470 "src/f32-vunary/gen/vabs-avx-x8.c",
3471 "src/f32-vunary/gen/vabs-avx-x16.c",
3472 "src/f32-vunary/gen/vneg-avx-x8.c",
3473 "src/f32-vunary/gen/vneg-avx-x16.c",
3474 "src/f32-vunary/gen/vsqr-avx-x8.c",
3475 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003476 "src/math/exp-avx-rr2-p5.c",
3477 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3478 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3479 "src/math/expm1minus-avx-rr2-p6.c",
3480 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3481 "src/math/sigmoid-avx-rr2-p5-div.c",
3482 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3483 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003484 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3485 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3486 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3487 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3488 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3489 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3490 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3491 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3492 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3493 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3494 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3495 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003496 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003497 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003498 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003499 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003500 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003501 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003502 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003503 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003504 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003505 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003506 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003507 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003508 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003509 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003510 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003511 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003512 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003513 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003514 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003515 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003516 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003517 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003518 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003519 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003520 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003521 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003522 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003523 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003524 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3525 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3526 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3527 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003528 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3529 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3530 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3531 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3532 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3533 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3534 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3535 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3536 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3537 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3538 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3539 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3540 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3541 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3542 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3543 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3544 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3545 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3546 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3547 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003548 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003549 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003550 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003551 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003552 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003553 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003554 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003555 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003556 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003557 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003558 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003559 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003560 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003561 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003562 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003563 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003564 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003565 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003566 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003567 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003568 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003569 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003570 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003571 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003572 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003573 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003574 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003575 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003576 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003577 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003578 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003579 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003580 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003581 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003582 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003583 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3584 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3585 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3586 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3587 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3588 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3589 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3590 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3591 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3592 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3593 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3594 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3595 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3596 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3597 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3598 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003599 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003600 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003601 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003602 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003603 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003604 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003605 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003606 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003607 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3608 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3609 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3610 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3611 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3612 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3613 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3614 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3615 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3616 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3617 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3618 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3619 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3620 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3621 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3622 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3623 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3624 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3625 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3626 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3627 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3628 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3629 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3630 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3631 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3632 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3633 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3634 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003635]
3636
Marat Dukhan1566fee2020-08-02 21:55:41 -07003637XOP_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07003638 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3639 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3640 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3641 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3642 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3643 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003644 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003645 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003646 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003647 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003648 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003649 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003650 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003651 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003652 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003653 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003654 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003655 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003656 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003657 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003658 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003659 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003660 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003661 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003662 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003663 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003664 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003665 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003666 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003667 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003668 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003669 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003670 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003671 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003672 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3673 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003674 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3675 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3676 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3677 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3678 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3679 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3680 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3681 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3682 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3683 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003684 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003685 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003686 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003687 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003688 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003689 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003690 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003691 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003692 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003693 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003694 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003695 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003696 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003697 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003698 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003699 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003700 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003701 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003702 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003703 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003704 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003705 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003706 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003707 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003708 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003709 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003710 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003711 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003712 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003713 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003714 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003715 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003716 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003717 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003718 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003719 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3720 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3721 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3722 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3723 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3724 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3725 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3726 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003727 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3728 "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3729 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3730 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003731 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3732 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3733 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3734 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3735 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3736 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3737 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3738 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3739 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3740 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3741 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3742 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3743 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3744 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3745 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3746 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3747 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3748 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3749 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3750 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3751 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3752 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3753 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3754 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3755 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3756 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3757 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3758 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003759]
3760
Marat Dukhanfda12b82019-11-21 12:27:59 -08003761FMA3_UKERNELS = [
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Marat Dukhan1c587112020-04-08 20:04:28 -07003764 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3765 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003766 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3767 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003768 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
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3770 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
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3772 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3773 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003774 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003775 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
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3778 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003782 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003783 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003785 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003788 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3789 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3790 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3791 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3792 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3793 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3794 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3795 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3796 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3797 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3798 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3799 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3800 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3801 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003802 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003803 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3804 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3805 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3806 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003807 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003808 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3809 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003810 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003811 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3812 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003813 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3814 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3815 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003816 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3817 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003818 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3819 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3820 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3821 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3822 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3823 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3824 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3825 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003826 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003827 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003828 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003829]
3830
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003831AVX2_UKERNELS = [
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3833 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003834 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003835 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003836 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003837 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003839 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003840 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003843 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003844 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08003847 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003848 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003849 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3850 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003851 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003852 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3853 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3854 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003855 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003856 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3857 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003858 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003859 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003860 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003861 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003863 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003864 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
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3866 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003867 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003868 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
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3870 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3871 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3872 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3873 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3874 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3875 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3876 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3877 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3878 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3879 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3880 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3881 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3882 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3883 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3884 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3885 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3886 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3887 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3888 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3889 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
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3891 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3892 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3893 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3894 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3895 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3896 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3897 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3898 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3899 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3900 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3901 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3902 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3903 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3904 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3905 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3906 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3907 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003908 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3909 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3910 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3911 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3912 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3913 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3914 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3915 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3916 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3917 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3918 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3919 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3920 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3921 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3922 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3923 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3924 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3925 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3926 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3927 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3928 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3929 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3930 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3931 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003932 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3933 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3934 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3935 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3936 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3937 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3938 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3939 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3940 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3941 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3942 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3943 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3944 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3945 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3946 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3947 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3948 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3949 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3950 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3951 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3952 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3953 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3954 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3955 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3956 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3957 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3958 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3959 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3960 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3961 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003962 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3963 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3964 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003965 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3966 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3967 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3968 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003969 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003970 "src/math/extexp-avx2-p5.c",
3971 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3972 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3973 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3974 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3975 "src/math/sigmoid-avx2-rr1-p5-div.c",
3976 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3977 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3978 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3979 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3980 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3981 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3982 "src/math/sigmoid-avx2-rr2-p5-div.c",
3983 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3984 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07003985 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
3986 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
3987 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
3988 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
3989 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
3990 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
3991 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
3992 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
3993 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
3994 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
3995 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
3996 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003997 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3998 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3999 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4000 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
4001 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4002 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07004003 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4004 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4005 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004006 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004007 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004008 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004009 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004010 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004011 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004012 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
4013 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004014 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004015 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004016 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
4017 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004018 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004019 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004020 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004021 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004022 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004023 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004024 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
4025 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004026 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004027 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004028 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
4029 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004030 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004031 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004032 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004033 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004034 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004035 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004036 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004037 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004038 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004039 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004040 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004041 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004042 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004043 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004044 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004045 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004046 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004047 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07004048 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4049 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4050 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
4051 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
4052 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4053 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
4054 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
4055 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07004056 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4057 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4058 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4059 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4060 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4061 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004062 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4063 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4064 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4065 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4066 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4067 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004068]
4069
Marat Dukhan08c4a432019-10-03 09:29:21 -07004070AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004071 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4072 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004073 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4074 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004075 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4076 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004077 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
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4079 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4080 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4081 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4082 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004083 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4084 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4085 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4086 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4087 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4088 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004089 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4090 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4091 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4092 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4093 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4094 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004095 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4096 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4097 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4098 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4099 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4100 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004101 "src/f32-prelu/gen/avx512f-2x16.c",
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08004103 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07004105 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004106 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08004108 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07004110 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004111 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07004114 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004115 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08004120 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07004122 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004123 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
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4125 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004126 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004127 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4128 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004129 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004130 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004131 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004132 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4133 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004134 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004135 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4136 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4137 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004138 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004139 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004140 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4141 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4142 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4143 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4144 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4145 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4146 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4147 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004148 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4149 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4150 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4151 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4152 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4153 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4154 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4155 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004156 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4157 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4158 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4159 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4160 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4161 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4162 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4163 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004164 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4165 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4166 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4167 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004168 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4169 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4170 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4171 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004172 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4173 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004174 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4175 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4176 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4177 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4178 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4179 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4180 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4181 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4182 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4183 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4184 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4185 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4186 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4187 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4188 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4189 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004190 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4191 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004192 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4193 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004194 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4195 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004196 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4197 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4198 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4199 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4200 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4201 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4202 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4203 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004204 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004205 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4206 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4207 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4208 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4209 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4210 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4211 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4212 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4213 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4214 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4215 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4216 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4217 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4218 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4219 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4220 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4221 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4222 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4223 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4224 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4225 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4226 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4227 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4228 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004229 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4230 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4231 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4232 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4233 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4234 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4235 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4236 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4237 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4238 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4239 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4240 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4241 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4242 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4243 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4244 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4245 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4246 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4247 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4248 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4249 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4250 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4251 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4252 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4253 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4254 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4255 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4256 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4257 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4258 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4259 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4260 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4261 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4262 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4263 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4264 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4265 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4266 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4267 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4268 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4269 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4270 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4271 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4272 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4273 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4274 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4275 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4276 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004277 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4278 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4279 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4280 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4281 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4282 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4283 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4284 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004285 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4286 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4287 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4288 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4289 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4290 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004291 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4292 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4293 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4294 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4295 "src/math/exp-avx512f-rr2-p5-scalef.c",
4296 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004297 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4298 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004299 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004300 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004301 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004302 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004303 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004304 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004305 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004306 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004307 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004308 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4309 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4310 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4311 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4312 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4313 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4314 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4315 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4316 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4317 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004318 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004319 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004320 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4321 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4322 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4323 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004324 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004325 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004326 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004327]
4328
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004329AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004330 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
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4332 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4333 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004334 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4335 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4336 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4337 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4338 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4339 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4340 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4341 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004342 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004343 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004344 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004345 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004346 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004347 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004348 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004349 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004350 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004351 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004352 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004353 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004354 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004355 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004356 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004357 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004358 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004359 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004360 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004361 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004362 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004363 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004364 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004365 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhancfd606b2021-07-09 01:18:45 -07004366 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4367 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4368 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4369 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004370 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4371 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4372 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4373 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4374 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4375 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4376 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4377 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004378]
4379
Frank Barchardbcedc082020-08-17 18:00:51 -07004380WASM32_ASM_UKERNELS = [
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4382 "src/f32-vrelu/wasm_shr_x2.S",
4383 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004384]
4385
Marat Dukhan08c4a432019-10-03 09:29:21 -07004386AARCH32_ASM_UKERNELS = [
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Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004388 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004389 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4390 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004391 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004392 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004393 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004394 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004395 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4396 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004397 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4398 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4399 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4400 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004401]
4402
4403AARCH64_ASM_UKERNELS = [
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Frank Barchardbddfbcd2020-04-15 12:32:41 -07004408 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
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Frank Barchard97374612021-06-07 11:51:07 -07004410 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004411 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
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Frank Barchard80fc5f42021-06-07 10:43:16 -07004418 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004422 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004424 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004425 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004426 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
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Frank Barchard04336c12020-10-22 16:48:55 -07004428 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004431 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004432 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
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Frank Barchard04336c12020-10-22 16:48:55 -07004435 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
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Frank Barchard04336c12020-10-22 16:48:55 -07004440 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004442 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
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Frank Barchard143a1102021-06-15 09:15:34 -07004455 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004456 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004457 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004458 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
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Frank Barchard04336c12020-10-22 16:48:55 -07004461 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004466 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
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Frank Barchardf10af6c2021-06-30 12:42:29 -07004490 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4491 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004492 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4493 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4494 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4495 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4496 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004497 "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004498 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4499 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4500 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4501 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4502 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4503 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004504 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4505 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4506 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4507 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4508 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4509 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4510 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4511 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004512 "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004513 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4514 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4515 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4516 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4517 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004518 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4519 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4520 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4521 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004522 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4523 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4524 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4525 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004526 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4527 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004528 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4529 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004530 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4531 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4532 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4533 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4534 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004535 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4536 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4537 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4538 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004539 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004540 "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004541 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004542 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4543 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004544 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4545 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004546 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4547 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4548 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4549 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004550 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4551 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4552 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004553 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004554 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4555 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4556 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4557 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004558 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4559 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4560 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4561 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004562 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4563 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4564 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4565 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004566 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4567 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4568 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4569 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004570 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004571 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004572 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4573 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004574 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4575 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004576 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4577 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4578 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004579 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4580 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004581 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004582]
4583
Marat Dukhan1b354632020-03-23 12:50:22 -07004584INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004585 "src/xnnpack/argmaxpool.h",
4586 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004587 "src/xnnpack/common.h",
4588 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004589 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004590 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004591 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004592 "src/xnnpack/gavgpool.h",
4593 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004594 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004595 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004596 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004597 "src/xnnpack/lut.h",
4598 "src/xnnpack/math.h",
4599 "src/xnnpack/maxpool.h",
4600 "src/xnnpack/packx.h",
4601 "src/xnnpack/pad.h",
4602 "src/xnnpack/params.h",
4603 "src/xnnpack/pavgpool.h",
4604 "src/xnnpack/ppmm.h",
4605 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004606 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004607 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004608 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004609 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004610 "src/xnnpack/spmm.h",
4611 "src/xnnpack/unpool.h",
4612 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004613 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004614 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004615 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004616 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004617 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004618 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004619 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004620]
4621
4622INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004623 "include/xnnpack.h",
4624 "src/xnnpack/allocator.h",
4625 "src/xnnpack/compute.h",
4626 "src/xnnpack/im2col.h",
4627 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004628 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004629 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004630 "src/xnnpack/operator.h",
4631 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004632 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004633 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004634 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004635 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004636]
4637
Marat Dukhan1b354632020-03-23 12:50:22 -07004638ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004639 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004640]
4641
Marat Dukhan1b354632020-03-23 12:50:22 -07004642MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004643 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004644 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004645]
4646
Marat Dukhan1b354632020-03-23 12:50:22 -07004647MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004648 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004649 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004650 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004651 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004652]
4653
4654OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004655 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004656 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004657]
4658
4659WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004660 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004661 "src/xnnpack/operator.h",
4662 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004663]
4664
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004665LOGGING_COPTS = select({
4666 # No logging in optimized mode
4667 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4668 # Full logging in debug mode
4669 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4670 # Error-only logging in default (fastbuild) mode
4671 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4672})
4673
Marat Dukhan3b59de22020-06-03 20:15:19 -07004674LOGGING_SRCS = select({
4675 # No logging in optimized mode
4676 ":optimized_build": [],
4677 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004678 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004679 "src/operator-strings.c",
4680 "src/subgraph-strings.c",
4681 ],
4682})
4683
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004684LOGGING_HDRS = [
4685 "src/xnnpack/log.h",
4686]
4687
Marat Dukhan08c4a432019-10-03 09:29:21 -07004688xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004689 name = "tables",
4690 srcs = TABLE_SRCS,
4691 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004692 gcc_copts = xnnpack_gcc_std_copts(),
4693 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004694)
4695
4696xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004697 name = "scalar_ukernels",
4698 srcs = SCALAR_UKERNELS,
4699 hdrs = INTERNAL_HDRS,
4700 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004701 gcc_copts = xnnpack_gcc_std_copts(),
4702 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004703 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004704 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004705 "@FP16",
4706 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004707 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004708 ],
4709)
4710
4711xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004712 name = "scalar_ukernels_test_mode",
4713 srcs = SCALAR_UKERNELS,
4714 hdrs = INTERNAL_HDRS,
4715 aarch32_copts = ["-marm"],
4716 copts = [
4717 "-UNDEBUG",
4718 "-DXNN_TEST_MODE=1",
4719 ],
4720 gcc_copts = xnnpack_gcc_std_copts(),
4721 msvc_copts = xnnpack_msvc_std_copts(),
4722 deps = [
4723 ":tables",
4724 "@FP16",
4725 "@FXdiv",
4726 "@pthreadpool",
4727 ],
4728)
4729
4730xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004731 name = "wasm_ukernels",
4732 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004733 gcc_copts = xnnpack_gcc_std_copts(),
4734 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004735 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004736 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004737 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004738 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004739 "@FP16",
4740 "@FXdiv",
4741 "@pthreadpool",
4742 ],
4743)
4744
4745xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004746 name = "wasm_ukernels_test_mode",
4747 hdrs = INTERNAL_HDRS,
4748 copts = [
4749 "-UNDEBUG",
4750 "-DXNN_TEST_MODE=1",
4751 ],
4752 gcc_copts = xnnpack_gcc_std_copts(),
4753 msvc_copts = xnnpack_msvc_std_copts(),
4754 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004755 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004756 deps = [
4757 ":tables",
4758 "@FP16",
4759 "@FXdiv",
4760 "@pthreadpool",
4761 ],
4762)
4763
4764xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004765 name = "neon_ukernels",
4766 hdrs = INTERNAL_HDRS,
4767 aarch32_copts = [
4768 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004769 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004770 "-mfpu=neon",
4771 ],
4772 aarch32_srcs = NEON_UKERNELS,
4773 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004774 gcc_copts = xnnpack_gcc_std_copts(),
4775 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004776 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004777 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004778 "@FP16",
4779 "@pthreadpool",
4780 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004781)
4782
4783xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004784 name = "neon_ukernels_test_mode",
4785 hdrs = INTERNAL_HDRS,
4786 aarch32_copts = [
4787 "-marm",
4788 "-march=armv7-a",
4789 "-mfpu=neon",
4790 ],
4791 aarch32_srcs = NEON_UKERNELS,
4792 aarch64_srcs = NEON_UKERNELS,
4793 copts = [
4794 "-UNDEBUG",
4795 "-DXNN_TEST_MODE=1",
4796 ],
4797 gcc_copts = xnnpack_gcc_std_copts(),
4798 msvc_copts = xnnpack_msvc_std_copts(),
4799 deps = [
4800 ":tables",
4801 "@FP16",
4802 "@pthreadpool",
4803 ],
4804)
4805
4806xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004807 name = "neonfma_ukernels",
4808 hdrs = INTERNAL_HDRS,
4809 aarch32_copts = [
4810 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004811 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004812 "-mfpu=neon-vfpv4",
4813 ],
4814 aarch32_srcs = NEONFMA_UKERNELS,
4815 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004816 apple_aarch32_copts = [
4817 "-mcpu=swift",
4818 "-mtune=generic",
4819 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004820 gcc_copts = xnnpack_gcc_std_copts(),
4821 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004822 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004823 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004824 "@FP16",
4825 "@pthreadpool",
4826 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004827)
4828
4829xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004830 name = "neonfma_ukernels_test_mode",
4831 hdrs = INTERNAL_HDRS,
4832 aarch32_copts = [
4833 "-marm",
4834 "-march=armv7-a",
4835 "-mfpu=neon-vfpv4",
4836 ],
4837 aarch32_srcs = NEONFMA_UKERNELS,
4838 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004839 apple_aarch32_copts = [
4840 "-mcpu=swift",
4841 "-mtune=generic",
4842 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004843 copts = [
4844 "-UNDEBUG",
4845 "-DXNN_TEST_MODE=1",
4846 ],
4847 gcc_copts = xnnpack_gcc_std_copts(),
4848 msvc_copts = xnnpack_msvc_std_copts(),
4849 deps = [
4850 ":tables",
4851 "@FP16",
4852 "@pthreadpool",
4853 ],
4854)
4855
4856xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004857 name = "neonv8_ukernels",
4858 hdrs = INTERNAL_HDRS,
4859 aarch32_copts = [
4860 "-marm",
4861 "-march=armv8-a",
4862 "-mfpu=neon-fp-armv8",
4863 ],
4864 aarch32_srcs = NEONV8_UKERNELS,
4865 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004866 apple_aarch32_copts = [
4867 "-mcpu=cyclone",
4868 "-mtune=generic",
4869 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004870 gcc_copts = xnnpack_gcc_std_copts(),
4871 msvc_copts = xnnpack_msvc_std_copts(),
4872 deps = [
4873 ":tables",
4874 "@FP16",
4875 "@pthreadpool",
4876 ],
4877)
4878
4879xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004880 name = "neonv8_ukernels_test_mode",
4881 hdrs = INTERNAL_HDRS,
4882 aarch32_copts = [
4883 "-marm",
4884 "-march=armv8-a",
4885 "-mfpu=neon-fp-armv8",
4886 ],
4887 aarch32_srcs = NEONV8_UKERNELS,
4888 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004889 apple_aarch32_copts = [
4890 "-mcpu=cyclone",
4891 "-mtune=generic",
4892 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004893 copts = [
4894 "-UNDEBUG",
4895 "-DXNN_TEST_MODE=1",
4896 ],
4897 gcc_copts = xnnpack_gcc_std_copts(),
4898 msvc_copts = xnnpack_msvc_std_copts(),
4899 deps = [
4900 ":tables",
4901 "@FP16",
4902 "@pthreadpool",
4903 ],
4904)
4905
4906xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004907 name = "neonfp16arith_ukernels",
4908 hdrs = INTERNAL_HDRS,
4909 aarch64_copts = ["-march=armv8.2-a+fp16"],
4910 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004911 gcc_copts = xnnpack_gcc_std_copts(),
4912 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004913 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004914 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004915 "@FP16",
4916 "@pthreadpool",
4917 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004918)
4919
4920xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004921 name = "neonfp16arith_ukernels_test_mode",
4922 hdrs = INTERNAL_HDRS,
4923 aarch64_copts = ["-march=armv8.2-a+fp16"],
4924 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4925 copts = [
4926 "-UNDEBUG",
4927 "-DXNN_TEST_MODE=1",
4928 ],
4929 gcc_copts = xnnpack_gcc_std_copts(),
4930 msvc_copts = xnnpack_msvc_std_copts(),
4931 deps = [
4932 ":tables",
4933 "@FP16",
4934 "@pthreadpool",
4935 ],
4936)
4937
4938xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004939 name = "neondot_ukernels",
4940 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004941 aarch32_copts = [
4942 "-marm",
4943 "-march=armv8.2-a+dotprod",
4944 "-mfpu=neon-fp-armv8",
4945 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004946 aarch32_srcs = NEONDOT_UKERNELS,
4947 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4948 aarch64_srcs = NEONDOT_UKERNELS,
4949 gcc_copts = xnnpack_gcc_std_copts(),
4950 msvc_copts = xnnpack_msvc_std_copts(),
4951 deps = [
4952 ":tables",
4953 "@FP16",
4954 "@pthreadpool",
4955 ],
4956)
4957
4958xnnpack_cc_library(
4959 name = "neondot_ukernels_test_mode",
4960 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004961 aarch32_copts = [
4962 "-marm",
4963 "-march=armv8.2-a+dotprod",
4964 "-mfpu=neon-fp-armv8",
4965 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004966 aarch32_srcs = NEONDOT_UKERNELS,
4967 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4968 aarch64_srcs = NEONDOT_UKERNELS,
4969 copts = [
4970 "-UNDEBUG",
4971 "-DXNN_TEST_MODE=1",
4972 ],
4973 gcc_copts = xnnpack_gcc_std_copts(),
4974 msvc_copts = xnnpack_msvc_std_copts(),
4975 deps = [
4976 ":tables",
4977 "@FP16",
4978 "@pthreadpool",
4979 ],
4980)
4981
4982xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004983 name = "sse2_ukernels",
4984 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004985 gcc_copts = xnnpack_gcc_std_copts(),
4986 gcc_x86_copts = ["-msse2"],
4987 msvc_copts = xnnpack_msvc_std_copts(),
4988 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004989 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004990 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004991 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004992 "@FP16",
4993 "@pthreadpool",
4994 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004995)
4996
4997xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004998 name = "sse2_ukernels_test_mode",
4999 hdrs = INTERNAL_HDRS,
5000 copts = [
5001 "-UNDEBUG",
5002 "-DXNN_TEST_MODE=1",
5003 ],
5004 gcc_copts = xnnpack_gcc_std_copts(),
5005 gcc_x86_copts = ["-msse2"],
5006 msvc_copts = xnnpack_msvc_std_copts(),
5007 msvc_x86_32_copts = ["/arch:SSE2"],
5008 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
5009 deps = [
5010 ":tables",
5011 "@FP16",
5012 "@pthreadpool",
5013 ],
5014)
5015
5016xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005017 name = "ssse3_ukernels",
5018 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005019 gcc_copts = xnnpack_gcc_std_copts(),
5020 gcc_x86_copts = ["-mssse3"],
5021 msvc_copts = xnnpack_msvc_std_copts(),
5022 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005023 x86_srcs = SSSE3_UKERNELS,
5024 deps = [
5025 ":tables",
5026 "@FP16",
5027 "@pthreadpool",
5028 ],
5029)
5030
5031xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005032 name = "ssse3_ukernels_test_mode",
5033 hdrs = INTERNAL_HDRS,
5034 copts = [
5035 "-UNDEBUG",
5036 "-DXNN_TEST_MODE=1",
5037 ],
5038 gcc_copts = xnnpack_gcc_std_copts(),
5039 gcc_x86_copts = ["-mssse3"],
5040 msvc_copts = xnnpack_msvc_std_copts(),
5041 msvc_x86_32_copts = ["/arch:SSE2"],
5042 x86_srcs = SSSE3_UKERNELS,
5043 deps = [
5044 ":tables",
5045 "@FP16",
5046 "@pthreadpool",
5047 ],
5048)
5049
5050xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005051 name = "sse41_ukernels",
5052 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005053 gcc_copts = xnnpack_gcc_std_copts(),
5054 gcc_x86_copts = ["-msse4.1"],
5055 msvc_copts = xnnpack_msvc_std_copts(),
5056 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005057 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005058 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005059 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005060 "@FP16",
5061 "@pthreadpool",
5062 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005063)
5064
5065xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005066 name = "sse41_ukernels_test_mode",
5067 hdrs = INTERNAL_HDRS,
5068 copts = [
5069 "-UNDEBUG",
5070 "-DXNN_TEST_MODE=1",
5071 ],
5072 gcc_copts = xnnpack_gcc_std_copts(),
5073 gcc_x86_copts = ["-msse4.1"],
5074 msvc_copts = xnnpack_msvc_std_copts(),
5075 msvc_x86_32_copts = ["/arch:SSE2"],
5076 x86_srcs = SSE41_UKERNELS,
5077 deps = [
5078 ":tables",
5079 "@FP16",
5080 "@pthreadpool",
5081 ],
5082)
5083
5084xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005085 name = "avx_ukernels",
5086 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005087 gcc_copts = xnnpack_gcc_std_copts(),
5088 gcc_x86_copts = ["-mavx"],
5089 msvc_copts = xnnpack_msvc_std_copts(),
5090 msvc_x86_32_copts = ["/arch:AVX"],
5091 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005092 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005093 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005094 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005095 "@FP16",
5096 "@pthreadpool",
5097 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005098)
5099
5100xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005101 name = "avx_ukernels_test_mode",
5102 hdrs = INTERNAL_HDRS,
5103 copts = [
5104 "-UNDEBUG",
5105 "-DXNN_TEST_MODE=1",
5106 ],
5107 gcc_copts = xnnpack_gcc_std_copts(),
5108 gcc_x86_copts = ["-mavx"],
5109 msvc_copts = xnnpack_msvc_std_copts(),
5110 msvc_x86_32_copts = ["/arch:AVX"],
5111 msvc_x86_64_copts = ["/arch:AVX"],
5112 x86_srcs = AVX_UKERNELS,
5113 deps = [
5114 ":tables",
5115 "@FP16",
5116 "@pthreadpool",
5117 ],
5118)
5119
5120xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005121 name = "xop_ukernels",
5122 hdrs = INTERNAL_HDRS,
5123 gcc_copts = xnnpack_gcc_std_copts(),
5124 gcc_x86_copts = ["-mxop"],
5125 msvc_copts = xnnpack_msvc_std_copts(),
5126 msvc_x86_32_copts = ["/arch:AVX"],
5127 msvc_x86_64_copts = ["/arch:AVX"],
5128 x86_srcs = XOP_UKERNELS,
5129 deps = [
5130 ":tables",
5131 "@FP16",
5132 "@pthreadpool",
5133 ],
5134)
5135
5136xnnpack_cc_library(
5137 name = "xop_ukernels_test_mode",
5138 hdrs = INTERNAL_HDRS,
5139 copts = [
5140 "-UNDEBUG",
5141 "-DXNN_TEST_MODE=1",
5142 ],
5143 gcc_copts = xnnpack_gcc_std_copts(),
5144 gcc_x86_copts = ["-mxop"],
5145 msvc_copts = xnnpack_msvc_std_copts(),
5146 msvc_x86_32_copts = ["/arch:AVX"],
5147 msvc_x86_64_copts = ["/arch:AVX"],
5148 x86_srcs = XOP_UKERNELS,
5149 deps = [
5150 ":tables",
5151 "@FP16",
5152 "@pthreadpool",
5153 ],
5154)
5155
5156xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005157 name = "fma3_ukernels",
5158 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005159 gcc_copts = xnnpack_gcc_std_copts(),
5160 gcc_x86_copts = ["-mfma"],
5161 msvc_copts = xnnpack_msvc_std_copts(),
5162 msvc_x86_32_copts = ["/arch:AVX"],
5163 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005164 x86_srcs = FMA3_UKERNELS,
5165 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005166 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005167 "@FP16",
5168 "@pthreadpool",
5169 ],
5170)
5171
5172xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005173 name = "fma3_ukernels_test_mode",
5174 hdrs = INTERNAL_HDRS,
5175 copts = [
5176 "-UNDEBUG",
5177 "-DXNN_TEST_MODE=1",
5178 ],
5179 gcc_copts = xnnpack_gcc_std_copts(),
5180 gcc_x86_copts = ["-mfma"],
5181 msvc_copts = xnnpack_msvc_std_copts(),
5182 msvc_x86_32_copts = ["/arch:AVX"],
5183 msvc_x86_64_copts = ["/arch:AVX"],
5184 x86_srcs = FMA3_UKERNELS,
5185 deps = [
5186 ":tables",
5187 "@FP16",
5188 "@pthreadpool",
5189 ],
5190)
5191
5192xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005193 name = "avx2_ukernels",
5194 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005195 gcc_copts = xnnpack_gcc_std_copts(),
5196 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005197 "-mfma",
5198 "-mavx2",
5199 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005200 msvc_copts = xnnpack_msvc_std_copts(),
5201 msvc_x86_32_copts = ["/arch:AVX2"],
5202 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005203 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005204 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005205 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005206 "@FP16",
5207 "@pthreadpool",
5208 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005209)
5210
5211xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005212 name = "avx2_ukernels_test_mode",
5213 hdrs = INTERNAL_HDRS,
5214 copts = [
5215 "-UNDEBUG",
5216 "-DXNN_TEST_MODE=1",
5217 ],
5218 gcc_copts = xnnpack_gcc_std_copts(),
5219 gcc_x86_copts = [
5220 "-mfma",
5221 "-mavx2",
5222 ],
5223 msvc_copts = xnnpack_msvc_std_copts(),
5224 msvc_x86_32_copts = ["/arch:AVX2"],
5225 msvc_x86_64_copts = ["/arch:AVX2"],
5226 x86_srcs = AVX2_UKERNELS,
5227 deps = [
5228 ":tables",
5229 "@FP16",
5230 "@pthreadpool",
5231 ],
5232)
5233
5234xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005235 name = "avx512f_ukernels",
5236 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005237 gcc_copts = xnnpack_gcc_std_copts(),
5238 gcc_x86_copts = ["-mavx512f"],
5239 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5240 msvc_copts = xnnpack_msvc_std_copts(),
5241 msvc_x86_32_copts = ["/arch:AVX512"],
5242 msvc_x86_64_copts = ["/arch:AVX512"],
5243 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005244 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005245 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005246 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005247 "@FP16",
5248 "@pthreadpool",
5249 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005250)
5251
5252xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005253 name = "avx512f_ukernels_test_mode",
5254 hdrs = INTERNAL_HDRS,
5255 copts = [
5256 "-UNDEBUG",
5257 "-DXNN_TEST_MODE=1",
5258 ],
5259 gcc_copts = xnnpack_gcc_std_copts(),
5260 gcc_x86_copts = ["-mavx512f"],
5261 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5262 msvc_copts = xnnpack_msvc_std_copts(),
5263 msvc_x86_32_copts = ["/arch:AVX512"],
5264 msvc_x86_64_copts = ["/arch:AVX512"],
5265 msys_copts = ["-fno-asynchronous-unwind-tables"],
5266 x86_srcs = AVX512F_UKERNELS,
5267 deps = [
5268 ":tables",
5269 "@FP16",
5270 "@pthreadpool",
5271 ],
5272)
5273
5274xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005275 name = "avx512skx_ukernels",
5276 hdrs = INTERNAL_HDRS,
5277 gcc_copts = xnnpack_gcc_std_copts(),
5278 gcc_x86_copts = [
5279 "-mavx512f",
5280 "-mavx512cd",
5281 "-mavx512bw",
5282 "-mavx512dq",
5283 "-mavx512vl",
5284 ],
5285 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5286 msvc_copts = xnnpack_msvc_std_copts(),
5287 msvc_x86_32_copts = ["/arch:AVX512"],
5288 msvc_x86_64_copts = ["/arch:AVX512"],
5289 msys_copts = ["-fno-asynchronous-unwind-tables"],
5290 x86_srcs = AVX512SKX_UKERNELS,
5291 deps = [
5292 ":tables",
5293 "@FP16",
5294 "@pthreadpool",
5295 ],
5296)
5297
5298xnnpack_cc_library(
5299 name = "avx512skx_ukernels_test_mode",
5300 hdrs = INTERNAL_HDRS,
5301 copts = [
5302 "-UNDEBUG",
5303 "-DXNN_TEST_MODE=1",
5304 ],
5305 gcc_copts = xnnpack_gcc_std_copts(),
5306 gcc_x86_copts = [
5307 "-mavx512f",
5308 "-mavx512cd",
5309 "-mavx512bw",
5310 "-mavx512dq",
5311 "-mavx512vl",
5312 ],
5313 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5314 msvc_copts = xnnpack_msvc_std_copts(),
5315 msvc_x86_32_copts = ["/arch:AVX512"],
5316 msvc_x86_64_copts = ["/arch:AVX512"],
5317 msys_copts = ["-fno-asynchronous-unwind-tables"],
5318 x86_srcs = AVX512SKX_UKERNELS,
5319 deps = [
5320 ":tables",
5321 "@FP16",
5322 "@pthreadpool",
5323 ],
5324)
5325
5326xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005327 name = "asm_ukernels",
5328 hdrs = ["src/xnnpack/assembly.h"],
5329 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005330 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005331 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005332 wasm_srcs = WASM32_ASM_UKERNELS,
5333 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005334)
5335
Marat Dukhan3b59de22020-06-03 20:15:19 -07005336xnnpack_cc_library(
5337 name = "logging_utils",
5338 srcs = LOGGING_SRCS,
5339 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5340 copts = LOGGING_COPTS + [
5341 "-Isrc",
5342 "-Iinclude",
5343 ] + select({
5344 ":debug_build": [],
5345 "//conditions:default": xnnpack_min_size_copts(),
5346 }),
5347 gcc_copts = xnnpack_gcc_std_copts(),
5348 msvc_copts = xnnpack_msvc_std_copts(),
5349 visibility = xnnpack_visibility(),
5350 deps = [
5351 "@FP16",
5352 "@clog",
5353 "@pthreadpool",
5354 ],
5355)
5356
Marat Dukhan08c4a432019-10-03 09:29:21 -07005357xnnpack_aggregate_library(
5358 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005359 aarch32_ios_deps = [
5360 ":neon_ukernels",
5361 ":neonfma_ukernels",
5362 ":neonv8_ukernels",
5363 ":asm_ukernels",
5364 ],
5365 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005366 ":neon_ukernels",
5367 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005368 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005369 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005370 ":asm_ukernels",
5371 ],
5372 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005373 ":neon_ukernels",
5374 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005375 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005376 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005377 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005378 ":asm_ukernels",
5379 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005380 generic_deps = [
5381 ":scalar_ukernels",
5382 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005383 wasm_deps = [
5384 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005385 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005386 ],
5387 wasmsimd_deps = [
5388 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005389 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005390 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005391 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005392 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005393 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005394 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005395 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005396 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005397 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005398 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005399 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005400 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005401 ],
5402)
5403
Marat Dukhan33fcf782020-05-24 14:27:15 -07005404xnnpack_aggregate_library(
5405 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005406 aarch32_ios_deps = [
5407 ":neon_ukernels_test_mode",
5408 ":neonfma_ukernels_test_mode",
5409 ":neonv8_ukernels_test_mode",
5410 ":asm_ukernels",
5411 ],
5412 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005413 ":neon_ukernels_test_mode",
5414 ":neonfma_ukernels_test_mode",
5415 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005416 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005417 ":asm_ukernels",
5418 ],
5419 aarch64_deps = [
5420 ":neon_ukernels_test_mode",
5421 ":neonfma_ukernels_test_mode",
5422 ":neonv8_ukernels_test_mode",
5423 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005424 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005425 ":asm_ukernels",
5426 ],
5427 generic_deps = [
5428 ":scalar_ukernels_test_mode",
5429 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005430 wasm_deps = [
5431 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005432 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005433 ],
5434 wasmsimd_deps = [
5435 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005436 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005437 ],
5438 x86_deps = [
5439 ":sse2_ukernels_test_mode",
5440 ":ssse3_ukernels_test_mode",
5441 ":sse41_ukernels_test_mode",
5442 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005443 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005444 ":fma3_ukernels_test_mode",
5445 ":avx2_ukernels_test_mode",
5446 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005447 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005448 ],
5449)
5450
Marat Dukhan08c4a432019-10-03 09:29:21 -07005451xnnpack_cc_library(
5452 name = "im2col",
5453 srcs = ["src/im2col.c"],
5454 hdrs = [
5455 "src/xnnpack/common.h",
5456 "src/xnnpack/im2col.h",
5457 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005458 gcc_copts = xnnpack_gcc_std_copts(),
5459 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005460)
5461
5462xnnpack_cc_library(
5463 name = "indirection",
5464 srcs = ["src/indirection.c"],
5465 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005466 gcc_copts = xnnpack_gcc_std_copts(),
5467 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005468 deps = [
5469 "@FP16",
5470 "@FXdiv",
5471 "@pthreadpool",
5472 ],
5473)
5474
5475xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005476 name = "indirection_test_mode",
5477 srcs = ["src/indirection.c"],
5478 hdrs = INTERNAL_HDRS,
5479 copts = [
5480 "-UNDEBUG",
5481 "-DXNN_TEST_MODE=1",
5482 ],
5483 gcc_copts = xnnpack_gcc_std_copts(),
5484 msvc_copts = xnnpack_msvc_std_copts(),
5485 deps = [
5486 "@FP16",
5487 "@FXdiv",
5488 "@pthreadpool",
5489 ],
5490)
5491
5492xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005493 name = "packing",
5494 srcs = ["src/packing.c"],
5495 hdrs = INTERNAL_HDRS,
5496 gcc_copts = xnnpack_gcc_std_copts(),
5497 msvc_copts = xnnpack_msvc_std_copts(),
5498 deps = [
5499 "@FP16",
5500 "@FXdiv",
5501 "@pthreadpool",
5502 ],
5503)
5504
5505xnnpack_cc_library(
5506 name = "packing_test_mode",
5507 srcs = ["src/packing.c"],
5508 hdrs = INTERNAL_HDRS,
5509 copts = [
5510 "-UNDEBUG",
5511 "-DXNN_TEST_MODE=1",
5512 ],
5513 gcc_copts = xnnpack_gcc_std_copts(),
5514 msvc_copts = xnnpack_msvc_std_copts(),
5515 deps = [
5516 "@FP16",
5517 "@FXdiv",
5518 "@pthreadpool",
5519 ],
5520)
5521
5522xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005523 name = "operator_run",
5524 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005525 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005526 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005527 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5528 "//conditions:default": [],
5529 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005530 gcc_copts = xnnpack_gcc_std_copts(),
5531 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005532 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005533 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005534 "@FP16",
5535 "@FXdiv",
5536 "@clog",
5537 "@pthreadpool",
5538 ],
5539)
5540
Chao Mei6ddfc602020-05-13 22:29:36 -07005541xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005542 name = "operator_run_test_mode",
5543 srcs = ["src/operator-run.c"],
5544 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5545 copts = LOGGING_COPTS + [
5546 "-UNDEBUG",
5547 "-DXNN_TEST_MODE=1",
5548 ] + select({
5549 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5550 "//conditions:default": [],
5551 }),
5552 gcc_copts = xnnpack_gcc_std_copts(),
5553 msvc_copts = xnnpack_msvc_std_copts(),
5554 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005555 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005556 "@FP16",
5557 "@FXdiv",
5558 "@clog",
5559 "@pthreadpool",
5560 ],
5561)
5562
5563xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005564 name = "memory_planner",
5565 srcs = ["src/memory-planner.c"],
5566 hdrs = INTERNAL_HDRS,
5567 defines = select({
5568 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5569 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5570 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5571 }),
5572 gcc_copts = xnnpack_gcc_std_copts(),
5573 msvc_copts = xnnpack_msvc_std_copts(),
5574 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005575 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005576 "@pthreadpool",
5577 ],
5578)
5579
Marat Dukhan33fcf782020-05-24 14:27:15 -07005580xnnpack_cc_library(
5581 name = "memory_planner_test_mode",
5582 srcs = ["src/memory-planner.c"],
5583 hdrs = INTERNAL_HDRS,
5584 copts = [
5585 "-UNDEBUG",
5586 "-DXNN_TEST_MODE=1",
5587 ],
5588 defines = select({
5589 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5590 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5591 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5592 }),
5593 gcc_copts = xnnpack_gcc_std_copts(),
5594 msvc_copts = xnnpack_msvc_std_copts(),
5595 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005596 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005597 "@pthreadpool",
5598 ],
5599)
5600
Marat Dukhan08c4a432019-10-03 09:29:21 -07005601cc_library(
5602 name = "enable_assembly",
5603 defines = select({
5604 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5605 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005606 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005607 }),
5608)
5609
Marat Dukhan9de90e02020-06-18 16:04:12 -07005610cc_library(
5611 name = "enable_sparse",
5612 defines = select({
5613 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5614 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005615 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005616 }),
5617)
5618
Marat Dukhancf056b22019-10-07 10:26:29 -07005619xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005620 name = "operators",
5621 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005622 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005623 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005624 ],
5625 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005626 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005627 "-Isrc",
5628 "-Iinclude",
5629 ] + select({
5630 ":debug_build": [],
5631 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005632 }) + select({
5633 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5634 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005635 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005636 gcc_copts = xnnpack_gcc_std_copts(),
5637 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005638 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005639 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005640 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005641 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005642 "@FP16",
5643 "@FXdiv",
5644 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005645 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005646 ],
5647)
5648
Marat Dukhan10a38082020-04-17 03:58:35 -07005649xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005650 name = "operators_test_mode",
5651 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005652 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005653 "src/operator-delete.c",
5654 ],
5655 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5656 copts = LOGGING_COPTS + [
5657 "-Isrc",
5658 "-Iinclude",
5659 "-UNDEBUG",
5660 "-DXNN_TEST_MODE=1",
5661 ] + select({
5662 ":debug_build": [],
5663 "//conditions:default": xnnpack_min_size_copts(),
5664 }) + select({
5665 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5666 "//conditions:default": [],
5667 }),
5668 gcc_copts = xnnpack_gcc_std_copts(),
5669 msvc_copts = xnnpack_msvc_std_copts(),
5670 deps = [
5671 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005672 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005673 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005674 "@FP16",
5675 "@FXdiv",
5676 "@clog",
5677 "@pthreadpool",
5678 ],
5679)
5680
5681xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005682 name = "XNNPACK",
5683 srcs = [
5684 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005685 "src/runtime.c",
5686 "src/subgraph.c",
5687 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005688 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005689 hdrs = ["include/xnnpack.h"],
5690 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005691 "-Isrc",
5692 "-Iinclude",
5693 ] + select({
5694 ":debug_build": [],
5695 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005696 }) + select({
5697 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5698 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005699 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005700 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005701 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005702 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005703 visibility = xnnpack_visibility(),
5704 deps = [
5705 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005706 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005707 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005708 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005709 ":operator_run",
5710 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005711 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005712 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005713 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005714 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005715 ] + select({
5716 ":emscripten": [],
5717 "//conditions:default": ["@cpuinfo"],
5718 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005719)
5720
Marat Dukhan10a38082020-04-17 03:58:35 -07005721xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005722 name = "XNNPACK_test_mode",
5723 srcs = [
5724 "src/init.c",
5725 "src/runtime.c",
5726 "src/subgraph.c",
5727 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005728 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005729 hdrs = ["include/xnnpack.h"],
5730 copts = LOGGING_COPTS + [
5731 "-Isrc",
5732 "-Iinclude",
5733 "-UNDEBUG",
5734 "-DXNN_TEST_MODE=1",
5735 ] + select({
5736 ":debug_build": [],
5737 "//conditions:default": xnnpack_min_size_copts(),
5738 }) + select({
5739 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5740 "//conditions:default": [],
5741 }),
5742 gcc_copts = xnnpack_gcc_std_copts(),
5743 includes = ["include"],
5744 msvc_copts = xnnpack_msvc_std_copts(),
5745 visibility = xnnpack_visibility(),
5746 deps = [
5747 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005748 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005749 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005750 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005751 ":operator_run_test_mode",
5752 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005753 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005754 "@clog",
5755 "@FP16",
5756 "@pthreadpool",
5757 ] + select({
5758 ":emscripten": [],
5759 "//conditions:default": ["@cpuinfo"],
5760 }),
5761)
5762
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005763# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5764# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005765xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005766 name = "xnnpack_for_tflite",
5767 srcs = [
5768 "src/init.c",
5769 "src/runtime.c",
5770 "src/subgraph.c",
5771 "src/tensor.c",
5772 ] + SUBGRAPH_SRCS,
5773 hdrs = ["include/xnnpack.h"],
5774 copts = LOGGING_COPTS + [
5775 "-Isrc",
5776 "-Iinclude",
5777 ] + select({
5778 ":debug_build": [],
5779 "//conditions:default": xnnpack_min_size_copts(),
5780 }) + select({
5781 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5782 "//conditions:default": [],
5783 }),
5784 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005785 "XNN_NO_U8_OPERATORS",
5786 "XNN_NO_X8_OPERATORS",
5787 "XNN_NO_F16_OPERATORS",
5788 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005789 ] + select({
5790 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005791 ":xnn_enable_qs8_explicit_false": [
5792 "XNN_NO_QC8_OPERATORS",
5793 "XNN_NO_QS8_OPERATORS",
5794 ],
5795 "//conditions:default": [
5796 "XNN_NO_QC8_OPERATORS",
5797 "XNN_NO_QS8_OPERATORS",
5798 ],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07005799 }) + select({
5800 ":xnn_enable_qu8_explicit_true": [],
5801 ":xnn_enable_qu8_explicit_false": [
5802 "XNN_NO_QU8_OPERATORS",
5803 ],
5804 "//conditions:default": [
5805 "XNN_NO_QU8_OPERATORS",
5806 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005807 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005808 gcc_copts = xnnpack_gcc_std_copts(),
5809 includes = ["include"],
5810 msvc_copts = xnnpack_msvc_std_copts(),
5811 visibility = xnnpack_visibility(),
5812 deps = [
5813 ":enable_assembly",
5814 ":enable_sparse",
5815 ":logging_utils",
5816 ":memory_planner",
5817 ":operator_run",
5818 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005819 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005820 "@clog",
5821 "@FP16",
5822 "@pthreadpool",
5823 ] + select({
5824 ":emscripten": [],
5825 "//conditions:default": ["@cpuinfo"],
5826 }),
5827)
5828
5829# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5830# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5831xnnpack_cc_library(
5832 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005833 srcs = [
5834 "src/init.c",
5835 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005836 hdrs = ["include/xnnpack.h"],
5837 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005838 "-Isrc",
5839 "-Iinclude",
5840 ] + select({
5841 ":debug_build": [],
5842 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005843 }) + select({
5844 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5845 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005846 }),
5847 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005848 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005849 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005850 "XNN_NO_U8_OPERATORS",
5851 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005852 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005853 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005854 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005855 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005856 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005857 visibility = xnnpack_visibility(),
5858 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005859 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005860 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005861 ":operator_run",
5862 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005863 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005864 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005865 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005866 ] + select({
5867 ":emscripten": [],
5868 "//conditions:default": ["@cpuinfo"],
5869 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005870)
5871
Marat Dukhancf056b22019-10-07 10:26:29 -07005872xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005873 name = "bench_utils",
5874 srcs = ["bench/utils.cc"],
5875 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005876 deps = [
5877 "@com_google_benchmark//:benchmark",
5878 "@cpuinfo",
5879 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005880)
5881
Frank Barchard7e955972019-10-11 10:34:25 -07005882######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005883
5884xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005885 name = "qs8_gemm_bench",
5886 srcs = [
5887 "bench/gemm.h",
5888 "bench/qs8-gemm.cc",
5889 "src/xnnpack/AlignedAllocator.h",
5890 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005891 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5892 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005893)
5894
5895xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005896 name = "qs8_requantization_bench",
5897 srcs = [
5898 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005899 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005900 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005901 ] + MICROKERNEL_BENCHMARK_HDRS,
5902 deps = MICROKERNEL_BENCHMARK_DEPS,
5903)
5904
5905xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005906 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005907 srcs = [
5908 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005909 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005910 "src/xnnpack/AlignedAllocator.h",
5911 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005912 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005913 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005914)
5915
5916xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005917 name = "qu8_requantization_bench",
5918 srcs = [
5919 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005920 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005921 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005922 ] + MICROKERNEL_BENCHMARK_HDRS,
5923 deps = MICROKERNEL_BENCHMARK_DEPS,
5924)
5925
5926xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005927 name = "f16_igemm_bench",
5928 srcs = [
5929 "bench/f16-igemm.cc",
5930 "bench/conv.h",
5931 "bench/google/conv.h",
5932 "src/xnnpack/AlignedAllocator.h",
5933 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005934 deps = MICROKERNEL_BENCHMARK_DEPS + [
5935 ":indirection",
5936 ":packing",
5937 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005938)
5939
5940xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005941 name = "f16_gemm_bench",
5942 srcs = [
5943 "bench/f16-gemm.cc",
5944 "bench/gemm.h",
5945 "src/xnnpack/AlignedAllocator.h",
5946 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005947 deps = MICROKERNEL_BENCHMARK_DEPS + [
5948 ":packing",
5949 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005950)
5951
5952xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005953 name = "f16_spmm_bench",
5954 srcs = [
5955 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005956 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005957 "src/xnnpack/AlignedAllocator.h",
5958 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005959 deps = MICROKERNEL_BENCHMARK_DEPS,
5960)
5961
5962xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005963 name = "f16_vrelu_bench",
5964 srcs = [
5965 "bench/f16-vrelu.cc",
5966 "src/xnnpack/AlignedAllocator.h",
5967 ] + MICROKERNEL_BENCHMARK_HDRS,
5968 deps = MICROKERNEL_BENCHMARK_DEPS,
5969)
5970
5971xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005972 name = "f32_igemm_bench",
5973 srcs = [
5974 "bench/f32-igemm.cc",
5975 "bench/conv.h",
5976 "src/xnnpack/AlignedAllocator.h",
5977 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005978 deps = MICROKERNEL_BENCHMARK_DEPS + [
5979 ":indirection",
5980 ":packing",
5981 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005982)
5983
5984xnnpack_benchmark(
5985 name = "f32_conv_hwc_bench",
5986 srcs = [
5987 "bench/f32-conv-hwc.cc",
5988 "bench/dconv.h",
5989 "src/xnnpack/AlignedAllocator.h",
5990 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005991 deps = MICROKERNEL_BENCHMARK_DEPS + [
5992 ":packing",
5993 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005994)
5995
5996xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005997 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005998 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005999 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07006000 "bench/dconv.h",
6001 "src/xnnpack/AlignedAllocator.h",
6002 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006003 deps = MICROKERNEL_BENCHMARK_DEPS + [
6004 ":packing",
6005 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07006006)
6007
6008xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07006009 name = "f16_dwconv_bench",
6010 srcs = [
6011 "bench/f16-dwconv.cc",
6012 "bench/dwconv.h",
6013 "bench/google/dwconv.h",
6014 "src/xnnpack/AlignedAllocator.h",
6015 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006016 deps = MICROKERNEL_BENCHMARK_DEPS + [
6017 ":indirection",
6018 ":packing",
6019 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07006020)
6021
6022xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006023 name = "f32_dwconv_bench",
6024 srcs = [
6025 "bench/f32-dwconv.cc",
6026 "bench/dwconv.h",
6027 "src/xnnpack/AlignedAllocator.h",
6028 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006029 deps = MICROKERNEL_BENCHMARK_DEPS + [
6030 ":indirection",
6031 ":packing",
6032 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006033)
6034
6035xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006036 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006037 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006038 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006039 "bench/dwconv.h",
6040 "src/xnnpack/AlignedAllocator.h",
6041 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006042 deps = MICROKERNEL_BENCHMARK_DEPS + [
6043 ":indirection",
6044 ":packing",
6045 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006046)
6047
6048xnnpack_benchmark(
6049 name = "f32_gemm_bench",
6050 srcs = [
6051 "bench/f32-gemm.cc",
6052 "bench/gemm.h",
6053 "src/xnnpack/AlignedAllocator.h",
6054 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006055 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006056 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006057)
6058
6059xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006060 name = "f32_raddexpminusmax_bench",
6061 srcs = [
6062 "bench/f32-raddexpminusmax.cc",
6063 "src/xnnpack/AlignedAllocator.h",
6064 ] + MICROKERNEL_BENCHMARK_HDRS,
6065 deps = MICROKERNEL_BENCHMARK_DEPS,
6066)
6067
6068xnnpack_benchmark(
6069 name = "f32_raddextexp_bench",
6070 srcs = [
6071 "bench/f32-raddextexp.cc",
6072 "src/xnnpack/AlignedAllocator.h",
6073 ] + MICROKERNEL_BENCHMARK_HDRS,
6074 deps = MICROKERNEL_BENCHMARK_DEPS,
6075)
6076
6077xnnpack_benchmark(
6078 name = "f32_raddstoreexpminusmax_bench",
6079 srcs = [
6080 "bench/f32-raddstoreexpminusmax.cc",
6081 "src/xnnpack/AlignedAllocator.h",
6082 ] + MICROKERNEL_BENCHMARK_HDRS,
6083 deps = MICROKERNEL_BENCHMARK_DEPS,
6084)
6085
6086xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006087 name = "f32_rmax_bench",
6088 srcs = [
6089 "bench/f32-rmax.cc",
6090 "src/xnnpack/AlignedAllocator.h",
6091 ] + MICROKERNEL_BENCHMARK_HDRS,
6092 deps = MICROKERNEL_BENCHMARK_DEPS,
6093)
6094
6095xnnpack_benchmark(
6096 name = "f32_spmm_bench",
6097 srcs = [
6098 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006099 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006100 "src/xnnpack/AlignedAllocator.h",
6101 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006102 deps = MICROKERNEL_BENCHMARK_DEPS,
6103)
6104
6105xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006106 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006107 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006108 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006109 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006110 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006111 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006112)
6113
6114xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006115 name = "f32_velu_bench",
6116 srcs = [
6117 "bench/f32-velu.cc",
6118 "src/xnnpack/AlignedAllocator.h",
6119 ] + MICROKERNEL_BENCHMARK_HDRS,
6120 deps = MICROKERNEL_BENCHMARK_DEPS,
6121)
6122
6123xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006124 name = "f32_vhswish_bench",
6125 srcs = [
6126 "bench/f32-vhswish.cc",
6127 "src/xnnpack/AlignedAllocator.h",
6128 ] + MICROKERNEL_BENCHMARK_HDRS,
6129 deps = MICROKERNEL_BENCHMARK_DEPS,
6130)
6131
6132xnnpack_benchmark(
6133 name = "f32_vrelu_bench",
6134 srcs = [
6135 "bench/f32-vrelu.cc",
6136 "src/xnnpack/AlignedAllocator.h",
6137 ] + MICROKERNEL_BENCHMARK_HDRS,
6138 deps = MICROKERNEL_BENCHMARK_DEPS,
6139)
6140
6141xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006142 name = "f32_vscaleexpminusmax_bench",
6143 srcs = [
6144 "bench/f32-vscaleexpminusmax.cc",
6145 "src/xnnpack/AlignedAllocator.h",
6146 ] + MICROKERNEL_BENCHMARK_HDRS,
6147 deps = MICROKERNEL_BENCHMARK_DEPS,
6148)
6149
6150xnnpack_benchmark(
6151 name = "f32_vscaleextexp_bench",
6152 srcs = [
6153 "bench/f32-vscaleextexp.cc",
6154 "src/xnnpack/AlignedAllocator.h",
6155 ] + MICROKERNEL_BENCHMARK_HDRS,
6156 deps = MICROKERNEL_BENCHMARK_DEPS,
6157)
6158
6159xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006160 name = "f32_vsigmoid_bench",
6161 srcs = [
6162 "bench/f32-vsigmoid.cc",
6163 "src/xnnpack/AlignedAllocator.h",
6164 ] + MICROKERNEL_BENCHMARK_HDRS,
6165 deps = MICROKERNEL_BENCHMARK_DEPS,
6166)
6167
6168xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006169 name = "f32_vsqrt_bench",
6170 srcs = [
6171 "bench/f32-vsqrt.cc",
6172 "src/xnnpack/AlignedAllocator.h",
6173 ] + MICROKERNEL_BENCHMARK_HDRS,
6174 deps = MICROKERNEL_BENCHMARK_DEPS,
6175)
6176
6177xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006178 name = "f32_im2col_gemm_bench",
6179 srcs = [
6180 "bench/f32-im2col-gemm.cc",
6181 "bench/conv.h",
6182 "src/xnnpack/AlignedAllocator.h",
6183 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006184 deps = MICROKERNEL_BENCHMARK_DEPS + [
6185 ":im2col",
6186 ":packing",
6187 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006188)
6189
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006190xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006191 name = "rounding_bench",
6192 srcs = [
6193 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006194 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006195 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006196 ] + MICROKERNEL_BENCHMARK_HDRS,
6197 deps = MICROKERNEL_BENCHMARK_DEPS,
6198)
6199
Marat Dukhan08c4a432019-10-03 09:29:21 -07006200########################### Benchmarks for operators ###########################
6201
6202xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006203 name = "average_pooling_bench",
6204 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006205 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006206 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006207 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006208)
6209
6210xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006211 name = "bankers_rounding_bench",
6212 srcs = ["bench/bankers-rounding.cc"],
6213 copts = xnnpack_optional_tflite_copts(),
6214 tags = ["nowin32"],
6215 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6216)
6217
6218xnnpack_benchmark(
6219 name = "ceiling_bench",
6220 srcs = ["bench/ceiling.cc"],
6221 copts = xnnpack_optional_tflite_copts(),
6222 tags = ["nowin32"],
6223 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6224)
6225
6226xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006227 name = "channel_shuffle_bench",
6228 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006229 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006230)
6231
6232xnnpack_benchmark(
6233 name = "convolution_bench",
6234 srcs = ["bench/convolution.cc"],
6235 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006236 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006237 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006238)
6239
6240xnnpack_benchmark(
6241 name = "deconvolution_bench",
6242 srcs = ["bench/deconvolution.cc"],
6243 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006244 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006245 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006246)
6247
6248xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006249 name = "elu_bench",
6250 srcs = ["bench/elu.cc"],
6251 copts = xnnpack_optional_tflite_copts(),
6252 tags = ["nowin32"],
6253 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6254)
6255
6256xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006257 name = "floor_bench",
6258 srcs = ["bench/floor.cc"],
6259 copts = xnnpack_optional_tflite_copts(),
6260 tags = ["nowin32"],
6261 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6262)
6263
6264xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006265 name = "global_average_pooling_bench",
6266 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006267 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006268)
6269
6270xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006271 name = "hardswish_bench",
6272 srcs = ["bench/hardswish.cc"],
6273 copts = xnnpack_optional_tflite_copts(),
6274 tags = ["nowin32"],
6275 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6276)
6277
6278xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006279 name = "max_pooling_bench",
6280 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006281 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006282)
6283
6284xnnpack_benchmark(
6285 name = "sigmoid_bench",
6286 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006287 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006288 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006289 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006290)
6291
6292xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006293 name = "prelu_bench",
6294 srcs = ["bench/prelu.cc"],
6295 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006296 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006297 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006298)
6299
6300xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006301 name = "softmax_bench",
6302 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006303 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006304 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006305 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006306)
6307
Marat Dukhan87727142020-06-24 15:24:10 -07006308xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006309 name = "square_root_bench",
6310 srcs = ["bench/square-root.cc"],
6311 copts = xnnpack_optional_tflite_copts(),
6312 tags = ["nowin32"],
6313 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6314)
6315
6316xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006317 name = "truncation_bench",
6318 srcs = ["bench/truncation.cc"],
6319 deps = OPERATOR_BENCHMARK_DEPS,
6320)
6321
Marat Dukhanc068bb62019-10-04 13:24:39 -07006322############################# End-to-end benchmarks ############################
6323
6324cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006325 name = "fp32_mobilenet_v1",
6326 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006327 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006328 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006329 linkstatic = True,
6330 deps = [
6331 ":XNNPACK",
6332 "@pthreadpool",
6333 ],
6334)
6335
6336cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006337 name = "fp32_sparse_mobilenet_v1",
6338 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6339 hdrs = ["models/models.h"],
6340 copts = xnnpack_std_cxxopts(),
6341 linkstatic = True,
6342 deps = [
6343 ":XNNPACK",
6344 "@pthreadpool",
6345 ],
6346)
6347
6348cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006349 name = "fp16_mobilenet_v1",
6350 srcs = ["models/fp16-mobilenet-v1.cc"],
6351 hdrs = ["models/models.h"],
6352 copts = xnnpack_std_cxxopts(),
6353 linkstatic = True,
6354 deps = [
6355 ":XNNPACK",
6356 "@FP16",
6357 "@pthreadpool",
6358 ],
6359)
6360
6361cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006362 name = "qs8_mobilenet_v1",
6363 srcs = ["models/qs8-mobilenet-v1.cc"],
6364 hdrs = ["models/models.h"],
6365 copts = xnnpack_std_cxxopts(),
6366 linkstatic = True,
6367 deps = [
6368 ":XNNPACK",
6369 "@pthreadpool",
6370 ],
6371)
6372
6373cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006374 name = "qs8_mobilenet_v2",
6375 srcs = ["models/qs8-mobilenet-v2.cc"],
6376 hdrs = ["models/models.h"],
6377 copts = xnnpack_std_cxxopts(),
6378 linkstatic = True,
6379 deps = [
6380 ":XNNPACK",
6381 "@pthreadpool",
6382 ],
6383)
6384
6385cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006386 name = "qu8_mobilenet_v1",
6387 srcs = ["models/qu8-mobilenet-v1.cc"],
6388 hdrs = ["models/models.h"],
6389 copts = xnnpack_std_cxxopts(),
6390 linkstatic = True,
6391 deps = [
6392 ":XNNPACK",
6393 "@pthreadpool",
6394 ],
6395)
6396
6397cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006398 name = "fp32_mobilenet_v2",
6399 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006400 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006401 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006402 linkstatic = True,
6403 deps = [
6404 ":XNNPACK",
6405 "@pthreadpool",
6406 ],
6407)
6408
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006409cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006410 name = "fp32_sparse_mobilenet_v2",
6411 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6412 hdrs = ["models/models.h"],
6413 copts = xnnpack_std_cxxopts(),
6414 linkstatic = True,
6415 deps = [
6416 ":XNNPACK",
6417 "@pthreadpool",
6418 ],
6419)
6420
6421cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006422 name = "fp16_mobilenet_v2",
6423 srcs = ["models/fp16-mobilenet-v2.cc"],
6424 hdrs = ["models/models.h"],
6425 copts = xnnpack_std_cxxopts(),
6426 linkstatic = True,
6427 deps = [
6428 ":XNNPACK",
6429 "@FP16",
6430 "@pthreadpool",
6431 ],
6432)
6433
6434cc_library(
6435 name = "fp32_mobilenet_v3_large",
6436 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006437 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006438 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006439 linkstatic = True,
6440 deps = [
6441 ":XNNPACK",
6442 "@pthreadpool",
6443 ],
6444)
6445
6446cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006447 name = "fp32_sparse_mobilenet_v3_large",
6448 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6449 hdrs = ["models/models.h"],
6450 copts = xnnpack_std_cxxopts(),
6451 linkstatic = True,
6452 deps = [
6453 ":XNNPACK",
6454 "@pthreadpool",
6455 ],
6456)
6457
6458cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006459 name = "fp16_mobilenet_v3_large",
6460 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6461 hdrs = ["models/models.h"],
6462 copts = xnnpack_std_cxxopts(),
6463 linkstatic = True,
6464 deps = [
6465 ":XNNPACK",
6466 "@FP16",
6467 "@pthreadpool",
6468 ],
6469)
6470
6471cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006472 name = "fp32_mobilenet_v3_small",
6473 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006474 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006475 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006476 linkstatic = True,
6477 deps = [
6478 ":XNNPACK",
6479 "@pthreadpool",
6480 ],
6481)
6482
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006483cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006484 name = "fp32_sparse_mobilenet_v3_small",
6485 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6486 hdrs = ["models/models.h"],
6487 copts = xnnpack_std_cxxopts(),
6488 linkstatic = True,
6489 deps = [
6490 ":XNNPACK",
6491 "@pthreadpool",
6492 ],
6493)
6494
6495cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006496 name = "fp16_mobilenet_v3_small",
6497 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6498 hdrs = ["models/models.h"],
6499 copts = xnnpack_std_cxxopts(),
6500 linkstatic = True,
6501 deps = [
6502 ":XNNPACK",
6503 "@FP16",
6504 "@pthreadpool",
6505 ],
6506)
6507
Marat Dukhanc068bb62019-10-04 13:24:39 -07006508xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006509 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006510 srcs = [
6511 "bench/f32-dwconv-e2e.cc",
6512 "bench/end2end.h",
6513 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006514 deps = MICROKERNEL_BENCHMARK_DEPS + [
6515 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006516 ":fp32_mobilenet_v1",
6517 ":fp32_mobilenet_v2",
6518 ":fp32_mobilenet_v3_large",
6519 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006520 ],
6521)
6522
6523xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006524 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006525 srcs = [
6526 "bench/f32-gemm-e2e.cc",
6527 "bench/end2end.h",
6528 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006529 deps = MICROKERNEL_BENCHMARK_DEPS + [
6530 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006531 ":fp32_mobilenet_v1",
6532 ":fp32_mobilenet_v2",
6533 ":fp32_mobilenet_v3_large",
6534 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006535 ],
6536)
6537
6538xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006539 name = "qs8_gemm_e2e_bench",
6540 srcs = [
6541 "bench/qs8-gemm-e2e.cc",
6542 "bench/end2end.h",
6543 ] + MICROKERNEL_BENCHMARK_HDRS,
6544 deps = MICROKERNEL_BENCHMARK_DEPS + [
6545 ":XNNPACK",
6546 ":qs8_mobilenet_v1",
6547 ":qs8_mobilenet_v2",
6548 ],
6549)
6550
6551xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006552 name = "end2end_bench",
6553 srcs = ["bench/end2end.cc"],
6554 deps = [
6555 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006556 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006557 ":fp16_mobilenet_v1",
6558 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006559 ":fp16_mobilenet_v3_large",
6560 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006561 ":fp32_mobilenet_v1",
6562 ":fp32_mobilenet_v2",
6563 ":fp32_mobilenet_v3_large",
6564 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006565 ":fp32_sparse_mobilenet_v1",
6566 ":fp32_sparse_mobilenet_v2",
6567 ":fp32_sparse_mobilenet_v3_large",
6568 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006569 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006570 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006571 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006572 "@pthreadpool",
6573 ],
6574)
6575
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006576#################### Accuracy evaluation for math functions ####################
6577
6578xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006579 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006580 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006581 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006582 "src/xnnpack/AlignedAllocator.h",
6583 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006584 deps = ACCURACY_EVAL_DEPS + [
6585 ":bench_utils",
6586 "@cpuinfo",
6587 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006588)
6589
Marat Dukhan515c9772019-10-17 18:07:57 -07006590xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006591 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006592 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006593 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006594 "src/xnnpack/AlignedAllocator.h",
6595 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006596 deps = ACCURACY_EVAL_DEPS + [
6597 ":bench_utils",
6598 "@cpuinfo",
6599 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006600)
6601
Marat Dukhan98ba4412019-10-23 02:14:28 -07006602xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006603 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006604 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006605 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006606 "src/xnnpack/AlignedAllocator.h",
6607 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006608 deps = ACCURACY_EVAL_DEPS + [
6609 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006610 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006611 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006612)
6613
6614xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006615 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006616 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006617 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006618 "src/xnnpack/AlignedAllocator.h",
6619 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006620 deps = ACCURACY_EVAL_DEPS + [
6621 ":bench_utils",
6622 "@cpuinfo",
6623 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006624)
6625
Marat Dukhanf44f0222020-12-14 11:53:27 -08006626xnnpack_benchmark(
6627 name = "f32_sigmoid_ulp_eval",
6628 srcs = [
6629 "eval/f32-sigmoid-ulp.cc",
6630 "src/xnnpack/AlignedAllocator.h",
6631 ] + ACCURACY_EVAL_HDRS,
6632 deps = ACCURACY_EVAL_DEPS + [
6633 ":bench_utils",
6634 "@cpuinfo",
6635 ],
6636)
6637
6638xnnpack_benchmark(
6639 name = "f32_sqrt_ulp_eval",
6640 srcs = [
6641 "eval/f32-sqrt-ulp.cc",
6642 "src/xnnpack/AlignedAllocator.h",
6643 ] + ACCURACY_EVAL_HDRS,
6644 deps = ACCURACY_EVAL_DEPS + [
6645 ":bench_utils",
6646 "@cpuinfo",
6647 ],
6648)
6649
6650################### Accuracy verification for math functions ##################
6651
6652xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006653 name = "f32_exp_eval",
6654 srcs = [
6655 "eval/f32-exp.cc",
6656 "src/xnnpack/AlignedAllocator.h",
6657 "src/xnnpack/math-stubs.h",
6658 ] + MICROKERNEL_TEST_HDRS,
6659 automatic = False,
6660 deps = MICROKERNEL_TEST_DEPS,
6661)
6662
6663xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006664 name = "f32_expm1minus_eval",
6665 srcs = [
6666 "eval/f32-expm1minus.cc",
6667 "src/xnnpack/AlignedAllocator.h",
6668 "src/xnnpack/math-stubs.h",
6669 ] + MICROKERNEL_TEST_HDRS,
6670 automatic = False,
6671 deps = MICROKERNEL_TEST_DEPS,
6672)
6673
Marat Dukhan8853b822020-05-07 12:19:01 -07006674xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006675 name = "f32_expminus_eval",
6676 srcs = [
6677 "eval/f32-expminus.cc",
6678 "src/xnnpack/AlignedAllocator.h",
6679 "src/xnnpack/math-stubs.h",
6680 ] + MICROKERNEL_TEST_HDRS,
6681 automatic = False,
6682 deps = MICROKERNEL_TEST_DEPS,
6683)
6684
6685xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006686 name = "f32_roundne_eval",
6687 srcs = [
6688 "eval/f32-roundne.cc",
6689 "src/xnnpack/AlignedAllocator.h",
6690 "src/xnnpack/math-stubs.h",
6691 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006692 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006693 deps = MICROKERNEL_TEST_DEPS,
6694)
6695
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006696xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006697 name = "f32_roundd_eval",
6698 srcs = [
6699 "eval/f32-roundd.cc",
6700 "src/xnnpack/AlignedAllocator.h",
6701 "src/xnnpack/math-stubs.h",
6702 ] + MICROKERNEL_TEST_HDRS,
6703 automatic = False,
6704 deps = MICROKERNEL_TEST_DEPS,
6705)
6706
6707xnnpack_unit_test(
6708 name = "f32_roundu_eval",
6709 srcs = [
6710 "eval/f32-roundu.cc",
6711 "src/xnnpack/AlignedAllocator.h",
6712 "src/xnnpack/math-stubs.h",
6713 ] + MICROKERNEL_TEST_HDRS,
6714 automatic = False,
6715 deps = MICROKERNEL_TEST_DEPS,
6716)
6717
6718xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006719 name = "f32_roundz_eval",
6720 srcs = [
6721 "eval/f32-roundz.cc",
6722 "src/xnnpack/AlignedAllocator.h",
6723 "src/xnnpack/math-stubs.h",
6724 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006725 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006726 deps = MICROKERNEL_TEST_DEPS,
6727)
6728
Marat Dukhan08c4a432019-10-03 09:29:21 -07006729######################### Unit tests for micro-kernels #########################
6730
6731xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006732 name = "f16_dwconv_minmax_test",
6733 srcs = [
6734 "test/f16-dwconv-minmax.cc",
6735 "test/dwconv-microkernel-tester.h",
6736 "src/xnnpack/AlignedAllocator.h",
6737 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6738 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6739)
6740
6741xnnpack_unit_test(
6742 name = "f16_gavgpool_minmax_test",
6743 srcs = [
6744 "test/f16-gavgpool-minmax.cc",
6745 "test/gavgpool-microkernel-tester.h",
6746 "src/xnnpack/AlignedAllocator.h",
6747 ] + MICROKERNEL_TEST_HDRS,
6748 deps = MICROKERNEL_TEST_DEPS,
6749)
6750
6751xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006752 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006753 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006754 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006755 "test/gemm-microkernel-tester.h",
6756 "src/xnnpack/AlignedAllocator.h",
6757 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006758 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006759)
6760
6761xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006762 name = "f16_igemm_minmax_test",
6763 srcs = [
6764 "test/f16-igemm-minmax.cc",
6765 "test/gemm-microkernel-tester.h",
6766 "src/xnnpack/AlignedAllocator.h",
6767 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6768 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6769)
6770
6771xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006772 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006773 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006774 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006775 "test/spmm-microkernel-tester.h",
6776 "src/xnnpack/AlignedAllocator.h",
6777 ] + MICROKERNEL_TEST_HDRS,
6778 deps = MICROKERNEL_TEST_DEPS,
6779)
6780
6781xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006782 name = "f16_vadd_minmax_test",
6783 srcs = [
6784 "test/f16-vadd-minmax.cc",
6785 "test/vbinary-microkernel-tester.h",
6786 ] + MICROKERNEL_TEST_HDRS,
6787 deps = MICROKERNEL_TEST_DEPS,
6788)
6789
6790xnnpack_unit_test(
6791 name = "f16_vaddc_minmax_test",
6792 srcs = [
6793 "test/f16-vaddc-minmax.cc",
6794 "test/vbinaryc-microkernel-tester.h",
6795 ] + MICROKERNEL_TEST_HDRS,
6796 deps = MICROKERNEL_TEST_DEPS,
6797)
6798
6799xnnpack_unit_test(
6800 name = "f16_vclamp_test",
6801 srcs = [
6802 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006803 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006804 ] + MICROKERNEL_TEST_HDRS,
6805 deps = MICROKERNEL_TEST_DEPS,
6806)
6807
6808xnnpack_unit_test(
6809 name = "f16_vdiv_minmax_test",
6810 srcs = [
6811 "test/f16-vdiv-minmax.cc",
6812 "test/vbinary-microkernel-tester.h",
6813 ] + MICROKERNEL_TEST_HDRS,
6814 deps = MICROKERNEL_TEST_DEPS,
6815)
6816
6817xnnpack_unit_test(
6818 name = "f16_vdivc_minmax_test",
6819 srcs = [
6820 "test/f16-vdivc-minmax.cc",
6821 "test/vbinaryc-microkernel-tester.h",
6822 ] + MICROKERNEL_TEST_HDRS,
6823 deps = MICROKERNEL_TEST_DEPS,
6824)
6825
6826xnnpack_unit_test(
6827 name = "f16_vrdivc_minmax_test",
6828 srcs = [
6829 "test/f16-vrdivc-minmax.cc",
6830 "test/vbinaryc-microkernel-tester.h",
6831 ] + MICROKERNEL_TEST_HDRS,
6832 deps = MICROKERNEL_TEST_DEPS,
6833)
6834
6835xnnpack_unit_test(
6836 name = "f16_vhswish_test",
6837 srcs = [
6838 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006839 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006840 ] + MICROKERNEL_TEST_HDRS,
6841 deps = MICROKERNEL_TEST_DEPS,
6842)
6843
6844xnnpack_unit_test(
6845 name = "f16_vmax_test",
6846 srcs = [
6847 "test/f16-vmax.cc",
6848 "test/vbinary-microkernel-tester.h",
6849 ] + MICROKERNEL_TEST_HDRS,
6850 deps = MICROKERNEL_TEST_DEPS,
6851)
6852
6853xnnpack_unit_test(
6854 name = "f16_vmaxc_test",
6855 srcs = [
6856 "test/f16-vmaxc.cc",
6857 "test/vbinaryc-microkernel-tester.h",
6858 ] + MICROKERNEL_TEST_HDRS,
6859 deps = MICROKERNEL_TEST_DEPS,
6860)
6861
6862xnnpack_unit_test(
6863 name = "f16_vmin_test",
6864 srcs = [
6865 "test/f16-vmin.cc",
6866 "test/vbinary-microkernel-tester.h",
6867 ] + MICROKERNEL_TEST_HDRS,
6868 deps = MICROKERNEL_TEST_DEPS,
6869)
6870
6871xnnpack_unit_test(
6872 name = "f16_vminc_test",
6873 srcs = [
6874 "test/f16-vminc.cc",
6875 "test/vbinaryc-microkernel-tester.h",
6876 ] + MICROKERNEL_TEST_HDRS,
6877 deps = MICROKERNEL_TEST_DEPS,
6878)
6879
6880xnnpack_unit_test(
6881 name = "f16_vmul_minmax_test",
6882 srcs = [
6883 "test/f16-vmul-minmax.cc",
6884 "test/vbinary-microkernel-tester.h",
6885 ] + MICROKERNEL_TEST_HDRS,
6886 deps = MICROKERNEL_TEST_DEPS,
6887)
6888
6889xnnpack_unit_test(
6890 name = "f16_vmulc_minmax_test",
6891 srcs = [
6892 "test/f16-vmulc-minmax.cc",
6893 "test/vbinaryc-microkernel-tester.h",
6894 ] + MICROKERNEL_TEST_HDRS,
6895 deps = MICROKERNEL_TEST_DEPS,
6896)
6897
6898xnnpack_unit_test(
6899 name = "f16_vmulcaddc_minmax_test",
6900 srcs = [
6901 "test/f16-vmulcaddc-minmax.cc",
6902 "test/vmulcaddc-microkernel-tester.h",
6903 "src/xnnpack/AlignedAllocator.h",
6904 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6905 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6906)
6907
6908xnnpack_unit_test(
6909 name = "f16_vsub_minmax_test",
6910 srcs = [
6911 "test/f16-vsub-minmax.cc",
6912 "test/vbinary-microkernel-tester.h",
6913 ] + MICROKERNEL_TEST_HDRS,
6914 deps = MICROKERNEL_TEST_DEPS,
6915)
6916
6917xnnpack_unit_test(
6918 name = "f16_vsubc_minmax_test",
6919 srcs = [
6920 "test/f16-vsubc-minmax.cc",
6921 "test/vbinaryc-microkernel-tester.h",
6922 ] + MICROKERNEL_TEST_HDRS,
6923 deps = MICROKERNEL_TEST_DEPS,
6924)
6925
6926xnnpack_unit_test(
6927 name = "f16_vrsubc_minmax_test",
6928 srcs = [
6929 "test/f16-vrsubc-minmax.cc",
6930 "test/vbinaryc-microkernel-tester.h",
6931 ] + MICROKERNEL_TEST_HDRS,
6932 deps = MICROKERNEL_TEST_DEPS,
6933)
6934
6935xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006936 name = "f32_argmaxpool_test",
6937 srcs = [
6938 "test/f32-argmaxpool.cc",
6939 "test/argmaxpool-microkernel-tester.h",
6940 "src/xnnpack/AlignedAllocator.h",
6941 ] + MICROKERNEL_TEST_HDRS,
6942 deps = MICROKERNEL_TEST_DEPS,
6943)
6944
6945xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006946 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006947 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006948 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006949 "test/avgpool-microkernel-tester.h",
6950 "src/xnnpack/AlignedAllocator.h",
6951 ] + MICROKERNEL_TEST_HDRS,
6952 deps = MICROKERNEL_TEST_DEPS,
6953)
6954
6955xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006956 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006957 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006958 "test/f32-ibilinear.cc",
6959 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006960 "src/xnnpack/AlignedAllocator.h",
6961 ] + MICROKERNEL_TEST_HDRS,
6962 deps = MICROKERNEL_TEST_DEPS,
6963)
6964
6965xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006966 name = "f32_ibilinear_chw_test",
6967 srcs = [
6968 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006969 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006970 "src/xnnpack/AlignedAllocator.h",
6971 ] + MICROKERNEL_TEST_HDRS,
6972 deps = MICROKERNEL_TEST_DEPS,
6973)
6974
6975xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006976 name = "f32_igemm_test",
6977 srcs = [
6978 "test/f32-igemm.cc",
6979 "test/gemm-microkernel-tester.h",
6980 "src/xnnpack/AlignedAllocator.h",
6981 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006982 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006983)
6984
6985xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006986 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006987 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006988 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006989 "test/gemm-microkernel-tester.h",
6990 "src/xnnpack/AlignedAllocator.h",
6991 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006992 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006993)
6994
6995xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006996 name = "f32_igemm_minmax_test",
6997 srcs = [
6998 "test/f32-igemm-minmax.cc",
6999 "test/gemm-microkernel-tester.h",
7000 "src/xnnpack/AlignedAllocator.h",
7001 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007002 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07007003)
7004
7005xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007006 name = "f32_conv_hwc_test",
7007 srcs = [
7008 "test/f32-conv-hwc.cc",
7009 "test/conv-hwc-microkernel-tester.h",
7010 "src/xnnpack/AlignedAllocator.h",
7011 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007012 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007013)
7014
7015xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007016 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007017 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007018 "test/f32-conv-hwc2chw.cc",
7019 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007020 "src/xnnpack/AlignedAllocator.h",
7021 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007022 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007023)
7024
7025xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007026 name = "f32_dwconv_test",
7027 srcs = [
7028 "test/f32-dwconv.cc",
7029 "test/dwconv-microkernel-tester.h",
7030 "src/xnnpack/AlignedAllocator.h",
7031 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007032 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007033)
7034
7035xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007036 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007037 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007038 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007039 "test/dwconv-microkernel-tester.h",
7040 "src/xnnpack/AlignedAllocator.h",
7041 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007042 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007043)
7044
7045xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07007046 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007047 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07007048 "test/f32-dwconv2d-chw.cc",
7049 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007050 "src/xnnpack/AlignedAllocator.h",
7051 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007052 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007053)
7054
7055xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007056 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007057 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007058 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007059 "test/gavgpool-microkernel-tester.h",
7060 "src/xnnpack/AlignedAllocator.h",
7061 ] + MICROKERNEL_TEST_HDRS,
7062 deps = MICROKERNEL_TEST_DEPS,
7063)
7064
7065xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007066 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007067 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007068 "test/f32-gavgpool-cw.cc",
7069 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007070 "src/xnnpack/AlignedAllocator.h",
7071 ] + MICROKERNEL_TEST_HDRS,
7072 deps = MICROKERNEL_TEST_DEPS,
7073)
7074
7075xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007076 name = "f32_gemm_test",
7077 srcs = [
7078 "test/f32-gemm.cc",
7079 "test/gemm-microkernel-tester.h",
7080 "src/xnnpack/AlignedAllocator.h",
7081 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007082 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007083)
7084
7085xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007086 name = "f32_gemm_relu_test",
7087 srcs = [
7088 "test/f32-gemm-relu.cc",
7089 "test/gemm-microkernel-tester.h",
7090 "src/xnnpack/AlignedAllocator.h",
7091 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007092 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007093)
7094
7095xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007096 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007097 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007098 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007099 "test/gemm-microkernel-tester.h",
7100 "src/xnnpack/AlignedAllocator.h",
7101 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007102 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007103)
7104
7105xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007106 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007107 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007108 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007109 "test/gemm-microkernel-tester.h",
7110 "src/xnnpack/AlignedAllocator.h",
7111 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007112 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007113)
7114
7115xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007116 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007117 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007118 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007119 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007120 ] + MICROKERNEL_TEST_HDRS,
7121 deps = MICROKERNEL_TEST_DEPS,
7122)
7123
7124xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007125 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007126 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007127 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007128 "test/maxpool-microkernel-tester.h",
7129 ] + MICROKERNEL_TEST_HDRS,
7130 deps = MICROKERNEL_TEST_DEPS,
7131)
7132
7133xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007134 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007135 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007136 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007137 "test/avgpool-microkernel-tester.h",
7138 "src/xnnpack/AlignedAllocator.h",
7139 ] + MICROKERNEL_TEST_HDRS,
7140 deps = MICROKERNEL_TEST_DEPS,
7141)
7142
7143xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007144 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007145 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007146 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007147 "test/gemm-microkernel-tester.h",
7148 "src/xnnpack/AlignedAllocator.h",
7149 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007150 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007151)
7152
7153xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007154 name = "f16_prelu_test",
7155 srcs = [
7156 "test/f16-prelu.cc",
7157 "test/prelu-microkernel-tester.h",
7158 "src/xnnpack/AlignedAllocator.h",
7159 ] + MICROKERNEL_TEST_HDRS,
7160 deps = MICROKERNEL_TEST_DEPS,
7161)
7162
7163xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007164 name = "f32_prelu_test",
7165 srcs = [
7166 "test/f32-prelu.cc",
7167 "test/prelu-microkernel-tester.h",
7168 "src/xnnpack/AlignedAllocator.h",
7169 ] + MICROKERNEL_TEST_HDRS,
7170 deps = MICROKERNEL_TEST_DEPS,
7171)
7172
7173xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007174 name = "f32_raddexpminusmax_test",
7175 srcs = [
7176 "test/f32-raddexpminusmax.cc",
7177 "test/raddexpminusmax-microkernel-tester.h",
7178 ] + MICROKERNEL_TEST_HDRS,
7179 deps = MICROKERNEL_TEST_DEPS,
7180)
7181
7182xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007183 name = "f32_raddextexp_test",
7184 srcs = [
7185 "test/f32-raddextexp.cc",
7186 "test/raddextexp-microkernel-tester.h",
7187 ] + MICROKERNEL_TEST_HDRS,
7188 deps = MICROKERNEL_TEST_DEPS,
7189)
7190
7191xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007192 name = "f32_raddstoreexpminusmax_test",
7193 srcs = [
7194 "test/f32-raddstoreexpminusmax.cc",
7195 "test/raddstoreexpminusmax-microkernel-tester.h",
7196 ] + MICROKERNEL_TEST_HDRS,
7197 deps = MICROKERNEL_TEST_DEPS,
7198)
7199
7200xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007201 name = "f32_rmax_test",
7202 srcs = [
7203 "test/f32-rmax.cc",
7204 "test/rmax-microkernel-tester.h",
7205 ] + MICROKERNEL_TEST_HDRS,
7206 deps = MICROKERNEL_TEST_DEPS,
7207)
7208
7209xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007210 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007211 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007212 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007213 "test/spmm-microkernel-tester.h",
7214 "src/xnnpack/AlignedAllocator.h",
7215 ] + MICROKERNEL_TEST_HDRS,
7216 deps = MICROKERNEL_TEST_DEPS,
7217)
7218
7219xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007220 name = "f32_vabs_test",
7221 srcs = [
7222 "test/f32-vabs.cc",
7223 "test/vunary-microkernel-tester.h",
7224 ] + MICROKERNEL_TEST_HDRS,
7225 deps = MICROKERNEL_TEST_DEPS,
7226)
7227
7228xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007229 name = "f32_vadd_test",
7230 srcs = [
7231 "test/f32-vadd.cc",
7232 "test/vbinary-microkernel-tester.h",
7233 ] + MICROKERNEL_TEST_HDRS,
7234 deps = MICROKERNEL_TEST_DEPS,
7235)
7236
7237xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007238 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007239 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007240 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007241 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007242 ] + MICROKERNEL_TEST_HDRS,
7243 deps = MICROKERNEL_TEST_DEPS,
7244)
7245
7246xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007247 name = "f32_vadd_relu_test",
7248 srcs = [
7249 "test/f32-vadd-relu.cc",
7250 "test/vbinary-microkernel-tester.h",
7251 ] + MICROKERNEL_TEST_HDRS,
7252 deps = MICROKERNEL_TEST_DEPS,
7253)
7254
7255xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007256 name = "f32_vaddc_test",
7257 srcs = [
7258 "test/f32-vaddc.cc",
7259 "test/vbinaryc-microkernel-tester.h",
7260 ] + MICROKERNEL_TEST_HDRS,
7261 deps = MICROKERNEL_TEST_DEPS,
7262)
7263
7264xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007265 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007266 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007267 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007268 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007269 ] + MICROKERNEL_TEST_HDRS,
7270 deps = MICROKERNEL_TEST_DEPS,
7271)
7272
7273xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007274 name = "f32_vaddc_relu_test",
7275 srcs = [
7276 "test/f32-vaddc-relu.cc",
7277 "test/vbinaryc-microkernel-tester.h",
7278 ] + MICROKERNEL_TEST_HDRS,
7279 deps = MICROKERNEL_TEST_DEPS,
7280)
7281
7282xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007283 name = "f32_vclamp_test",
7284 srcs = [
7285 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007286 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007287 ] + MICROKERNEL_TEST_HDRS,
7288 deps = MICROKERNEL_TEST_DEPS,
7289)
7290
7291xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007292 name = "f32_vdiv_test",
7293 srcs = [
7294 "test/f32-vdiv.cc",
7295 "test/vbinary-microkernel-tester.h",
7296 ] + MICROKERNEL_TEST_HDRS,
7297 deps = MICROKERNEL_TEST_DEPS,
7298)
7299
7300xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007301 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007302 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007303 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007304 "test/vbinary-microkernel-tester.h",
7305 ] + MICROKERNEL_TEST_HDRS,
7306 deps = MICROKERNEL_TEST_DEPS,
7307)
7308
7309xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007310 name = "f32_vdiv_relu_test",
7311 srcs = [
7312 "test/f32-vdiv-relu.cc",
7313 "test/vbinary-microkernel-tester.h",
7314 ] + MICROKERNEL_TEST_HDRS,
7315 deps = MICROKERNEL_TEST_DEPS,
7316)
7317
7318xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007319 name = "f32_vdivc_test",
7320 srcs = [
7321 "test/f32-vdivc.cc",
7322 "test/vbinaryc-microkernel-tester.h",
7323 ] + MICROKERNEL_TEST_HDRS,
7324 deps = MICROKERNEL_TEST_DEPS,
7325)
7326
7327xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007328 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007329 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007330 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007331 "test/vbinaryc-microkernel-tester.h",
7332 ] + MICROKERNEL_TEST_HDRS,
7333 deps = MICROKERNEL_TEST_DEPS,
7334)
7335
7336xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007337 name = "f32_vdivc_relu_test",
7338 srcs = [
7339 "test/f32-vdivc-relu.cc",
7340 "test/vbinaryc-microkernel-tester.h",
7341 ] + MICROKERNEL_TEST_HDRS,
7342 deps = MICROKERNEL_TEST_DEPS,
7343)
7344
7345xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007346 name = "f32_vrdivc_test",
7347 srcs = [
7348 "test/f32-vrdivc.cc",
7349 "test/vbinaryc-microkernel-tester.h",
7350 ] + MICROKERNEL_TEST_HDRS,
7351 deps = MICROKERNEL_TEST_DEPS,
7352)
7353
7354xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007355 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007356 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007357 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007358 "test/vbinaryc-microkernel-tester.h",
7359 ] + MICROKERNEL_TEST_HDRS,
7360 deps = MICROKERNEL_TEST_DEPS,
7361)
7362
7363xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007364 name = "f32_vrdivc_relu_test",
7365 srcs = [
7366 "test/f32-vrdivc-relu.cc",
7367 "test/vbinaryc-microkernel-tester.h",
7368 ] + MICROKERNEL_TEST_HDRS,
7369 deps = MICROKERNEL_TEST_DEPS,
7370)
7371
7372xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007373 name = "f32_velu_test",
7374 srcs = [
7375 "test/f32-velu.cc",
7376 "test/vunary-microkernel-tester.h",
7377 ] + MICROKERNEL_TEST_HDRS,
7378 deps = MICROKERNEL_TEST_DEPS,
7379)
7380
7381xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007382 name = "f32_vmax_test",
7383 srcs = [
7384 "test/f32-vmax.cc",
7385 "test/vbinary-microkernel-tester.h",
7386 ] + MICROKERNEL_TEST_HDRS,
7387 deps = MICROKERNEL_TEST_DEPS,
7388)
7389
7390xnnpack_unit_test(
7391 name = "f32_vmaxc_test",
7392 srcs = [
7393 "test/f32-vmaxc.cc",
7394 "test/vbinaryc-microkernel-tester.h",
7395 ] + MICROKERNEL_TEST_HDRS,
7396 deps = MICROKERNEL_TEST_DEPS,
7397)
7398
7399xnnpack_unit_test(
7400 name = "f32_vmin_test",
7401 srcs = [
7402 "test/f32-vmin.cc",
7403 "test/vbinary-microkernel-tester.h",
7404 ] + MICROKERNEL_TEST_HDRS,
7405 deps = MICROKERNEL_TEST_DEPS,
7406)
7407
7408xnnpack_unit_test(
7409 name = "f32_vminc_test",
7410 srcs = [
7411 "test/f32-vminc.cc",
7412 "test/vbinaryc-microkernel-tester.h",
7413 ] + MICROKERNEL_TEST_HDRS,
7414 deps = MICROKERNEL_TEST_DEPS,
7415)
7416
7417xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007418 name = "f32_vmul_test",
7419 srcs = [
7420 "test/f32-vmul.cc",
7421 "test/vbinary-microkernel-tester.h",
7422 ] + MICROKERNEL_TEST_HDRS,
7423 deps = MICROKERNEL_TEST_DEPS,
7424)
7425
7426xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007427 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007428 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007429 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007430 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007431 ] + MICROKERNEL_TEST_HDRS,
7432 deps = MICROKERNEL_TEST_DEPS,
7433)
7434
7435xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007436 name = "f32_vmul_relu_test",
7437 srcs = [
7438 "test/f32-vmul-relu.cc",
7439 "test/vbinary-microkernel-tester.h",
7440 ] + MICROKERNEL_TEST_HDRS,
7441 deps = MICROKERNEL_TEST_DEPS,
7442)
7443
7444xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007445 name = "f32_vmulc_test",
7446 srcs = [
7447 "test/f32-vmulc.cc",
7448 "test/vbinaryc-microkernel-tester.h",
7449 ] + MICROKERNEL_TEST_HDRS,
7450 deps = MICROKERNEL_TEST_DEPS,
7451)
7452
7453xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007454 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007455 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007456 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007457 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007458 ] + MICROKERNEL_TEST_HDRS,
7459 deps = MICROKERNEL_TEST_DEPS,
7460)
7461
7462xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007463 name = "f32_vmulc_relu_test",
7464 srcs = [
7465 "test/f32-vmulc-relu.cc",
7466 "test/vbinaryc-microkernel-tester.h",
7467 ] + MICROKERNEL_TEST_HDRS,
7468 deps = MICROKERNEL_TEST_DEPS,
7469)
7470
7471xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007472 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007473 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007474 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007475 "test/vmulcaddc-microkernel-tester.h",
7476 "src/xnnpack/AlignedAllocator.h",
7477 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007478 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007479)
7480
7481xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007482 name = "f32_vlrelu_test",
7483 srcs = [
7484 "test/f32-vlrelu.cc",
7485 "test/vunary-microkernel-tester.h",
7486 ] + MICROKERNEL_TEST_HDRS,
7487 deps = MICROKERNEL_TEST_DEPS,
7488)
7489
7490xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007491 name = "f32_vneg_test",
7492 srcs = [
7493 "test/f32-vneg.cc",
7494 "test/vunary-microkernel-tester.h",
7495 ] + MICROKERNEL_TEST_HDRS,
7496 deps = MICROKERNEL_TEST_DEPS,
7497)
7498
7499xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007500 name = "f32_vrelu_test",
7501 srcs = [
7502 "test/f32-vrelu.cc",
7503 "test/vunary-microkernel-tester.h",
7504 ] + MICROKERNEL_TEST_HDRS,
7505 deps = MICROKERNEL_TEST_DEPS,
7506)
7507
7508xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007509 name = "f32_vrndne_test",
7510 srcs = [
7511 "test/f32-vrndne.cc",
7512 "test/vunary-microkernel-tester.h",
7513 ] + MICROKERNEL_TEST_HDRS,
7514 deps = MICROKERNEL_TEST_DEPS,
7515)
7516
7517xnnpack_unit_test(
7518 name = "f32_vrndz_test",
7519 srcs = [
7520 "test/f32-vrndz.cc",
7521 "test/vunary-microkernel-tester.h",
7522 ] + MICROKERNEL_TEST_HDRS,
7523 deps = MICROKERNEL_TEST_DEPS,
7524)
7525
7526xnnpack_unit_test(
7527 name = "f32_vrndu_test",
7528 srcs = [
7529 "test/f32-vrndu.cc",
7530 "test/vunary-microkernel-tester.h",
7531 ] + MICROKERNEL_TEST_HDRS,
7532 deps = MICROKERNEL_TEST_DEPS,
7533)
7534
7535xnnpack_unit_test(
7536 name = "f32_vrndd_test",
7537 srcs = [
7538 "test/f32-vrndd.cc",
7539 "test/vunary-microkernel-tester.h",
7540 ] + MICROKERNEL_TEST_HDRS,
7541 deps = MICROKERNEL_TEST_DEPS,
7542)
7543
7544xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007545 name = "f32_vscale_test",
7546 srcs = [
7547 "test/f32-vscale.cc",
7548 "test/vscale-microkernel-tester.h",
7549 ] + MICROKERNEL_TEST_HDRS,
7550 deps = MICROKERNEL_TEST_DEPS,
7551)
7552
7553xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007554 name = "f32_vscaleexpminusmax_test",
7555 srcs = [
7556 "test/f32-vscaleexpminusmax.cc",
7557 "test/vscaleexpminusmax-microkernel-tester.h",
7558 ] + MICROKERNEL_TEST_HDRS,
7559 deps = MICROKERNEL_TEST_DEPS,
7560)
7561
7562xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007563 name = "f32_vscaleextexp_test",
7564 srcs = [
7565 "test/f32-vscaleextexp.cc",
7566 "test/vscaleextexp-microkernel-tester.h",
7567 ] + MICROKERNEL_TEST_HDRS,
7568 deps = MICROKERNEL_TEST_DEPS,
7569)
7570
7571xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007572 name = "f32_vsigmoid_test",
7573 srcs = [
7574 "test/f32-vsigmoid.cc",
7575 "test/vunary-microkernel-tester.h",
7576 ] + MICROKERNEL_TEST_HDRS,
7577 deps = MICROKERNEL_TEST_DEPS,
7578)
7579
7580xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007581 name = "f32_vsqr_test",
7582 srcs = [
7583 "test/f32-vsqr.cc",
7584 "test/vunary-microkernel-tester.h",
7585 ] + MICROKERNEL_TEST_HDRS,
7586 deps = MICROKERNEL_TEST_DEPS,
7587)
7588
7589xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007590 name = "f32_vsqrdiff_test",
7591 srcs = [
7592 "test/f32-vsqrdiff.cc",
7593 "test/vbinary-microkernel-tester.h",
7594 ] + MICROKERNEL_TEST_HDRS,
7595 deps = MICROKERNEL_TEST_DEPS,
7596)
7597
7598xnnpack_unit_test(
7599 name = "f32_vsqrdiffc_test",
7600 srcs = [
7601 "test/f32-vsqrdiffc.cc",
7602 "test/vbinaryc-microkernel-tester.h",
7603 ] + MICROKERNEL_TEST_HDRS,
7604 deps = MICROKERNEL_TEST_DEPS,
7605)
7606
7607xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007608 name = "f32_vsqrt_test",
7609 srcs = [
7610 "test/f32-vsqrt.cc",
7611 "test/vunary-microkernel-tester.h",
7612 ] + MICROKERNEL_TEST_HDRS,
7613 deps = MICROKERNEL_TEST_DEPS,
7614)
7615
7616xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007617 name = "f32_vsub_test",
7618 srcs = [
7619 "test/f32-vsub.cc",
7620 "test/vbinary-microkernel-tester.h",
7621 ] + MICROKERNEL_TEST_HDRS,
7622 deps = MICROKERNEL_TEST_DEPS,
7623)
7624
7625xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007626 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007627 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007628 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007629 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007630 ] + MICROKERNEL_TEST_HDRS,
7631 deps = MICROKERNEL_TEST_DEPS,
7632)
7633
7634xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007635 name = "f32_vsub_relu_test",
7636 srcs = [
7637 "test/f32-vsub-relu.cc",
7638 "test/vbinary-microkernel-tester.h",
7639 ] + MICROKERNEL_TEST_HDRS,
7640 deps = MICROKERNEL_TEST_DEPS,
7641)
7642
7643xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007644 name = "f32_vsubc_test",
7645 srcs = [
7646 "test/f32-vsubc.cc",
7647 "test/vbinaryc-microkernel-tester.h",
7648 ] + MICROKERNEL_TEST_HDRS,
7649 deps = MICROKERNEL_TEST_DEPS,
7650)
7651
7652xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007653 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007654 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007655 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007656 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007657 ] + MICROKERNEL_TEST_HDRS,
7658 deps = MICROKERNEL_TEST_DEPS,
7659)
7660
7661xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007662 name = "f32_vsubc_relu_test",
7663 srcs = [
7664 "test/f32-vsubc-relu.cc",
7665 "test/vbinaryc-microkernel-tester.h",
7666 ] + MICROKERNEL_TEST_HDRS,
7667 deps = MICROKERNEL_TEST_DEPS,
7668)
7669
7670xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007671 name = "f32_vrsubc_test",
7672 srcs = [
7673 "test/f32-vrsubc.cc",
7674 "test/vbinaryc-microkernel-tester.h",
7675 ] + MICROKERNEL_TEST_HDRS,
7676 deps = MICROKERNEL_TEST_DEPS,
7677)
7678
7679xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007680 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007681 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007682 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007683 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007684 ] + MICROKERNEL_TEST_HDRS,
7685 deps = MICROKERNEL_TEST_DEPS,
7686)
7687
7688xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007689 name = "f32_vrsubc_relu_test",
7690 srcs = [
7691 "test/f32-vrsubc-relu.cc",
7692 "test/vbinaryc-microkernel-tester.h",
7693 ] + MICROKERNEL_TEST_HDRS,
7694 deps = MICROKERNEL_TEST_DEPS,
7695)
7696
7697xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007698 name = "qc8_dwconv_minmax_fp32_test",
7699 timeout = "moderate",
7700 srcs = [
7701 "test/qc8-dwconv-minmax-fp32.cc",
7702 "test/dwconv-microkernel-tester.h",
7703 "src/xnnpack/AlignedAllocator.h",
7704 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7705 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7706)
7707
7708xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007709 name = "qc8_gemm_minmax_fp32_test",
7710 timeout = "moderate",
7711 srcs = [
7712 "test/qc8-gemm-minmax-fp32.cc",
7713 "test/gemm-microkernel-tester.h",
7714 "src/xnnpack/AlignedAllocator.h",
7715 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7716 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7717)
7718
7719xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007720 name = "qc8_igemm_minmax_fp32_test",
7721 timeout = "moderate",
7722 srcs = [
7723 "test/qc8-igemm-minmax-fp32.cc",
7724 "test/gemm-microkernel-tester.h",
7725 "src/xnnpack/AlignedAllocator.h",
7726 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7727 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7728)
7729
7730xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007731 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007732 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007733 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007734 "test/dwconv-microkernel-tester.h",
7735 "src/xnnpack/AlignedAllocator.h",
7736 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7737 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7738)
7739
7740xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007741 name = "qs8_dwconv_minmax_fp32_test",
7742 srcs = [
7743 "test/qs8-dwconv-minmax-fp32.cc",
7744 "test/dwconv-microkernel-tester.h",
7745 "src/xnnpack/AlignedAllocator.h",
7746 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7747 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7748)
7749
7750xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007751 name = "qs8_gavgpool_minmax_test",
7752 srcs = [
7753 "test/qs8-gavgpool-minmax.cc",
7754 "test/gavgpool-microkernel-tester.h",
7755 "src/xnnpack/AlignedAllocator.h",
7756 ] + MICROKERNEL_TEST_HDRS,
7757 deps = MICROKERNEL_TEST_DEPS,
7758)
7759
7760xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007761 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007762 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007763 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007764 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007765 "test/gemm-microkernel-tester.h",
7766 "src/xnnpack/AlignedAllocator.h",
7767 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7768 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7769)
7770
7771xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007772 name = "qs8_gemm_minmax_fp32_test",
7773 timeout = "moderate",
7774 srcs = [
7775 "test/qs8-gemm-minmax-fp32.cc",
7776 "test/gemm-microkernel-tester.h",
7777 "src/xnnpack/AlignedAllocator.h",
7778 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7779 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7780)
7781
7782xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007783 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007784 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007785 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007786 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007787 "test/gemm-microkernel-tester.h",
7788 "src/xnnpack/AlignedAllocator.h",
7789 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7790 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7791)
7792
7793xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007794 name = "qs8_igemm_minmax_fp32_test",
7795 timeout = "moderate",
7796 srcs = [
7797 "test/qs8-igemm-minmax-fp32.cc",
7798 "test/gemm-microkernel-tester.h",
7799 "src/xnnpack/AlignedAllocator.h",
7800 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7801 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7802)
7803
7804xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007805 name = "qs8_requantization_test",
7806 srcs = [
7807 "src/xnnpack/requantization-stubs.h",
7808 "test/qs8-requantization.cc",
7809 "test/requantization-tester.h",
7810 ] + MICROKERNEL_TEST_HDRS,
7811 deps = MICROKERNEL_TEST_DEPS,
7812)
7813
7814xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007815 name = "qs8_vadd_minmax_test",
7816 srcs = [
7817 "test/qs8-vadd-minmax.cc",
7818 "test/vadd-microkernel-tester.h",
7819 ] + MICROKERNEL_TEST_HDRS,
7820 deps = MICROKERNEL_TEST_DEPS,
7821)
7822
7823xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007824 name = "qs8_vaddc_minmax_test",
7825 srcs = [
7826 "test/qs8-vaddc-minmax.cc",
7827 "test/vaddc-microkernel-tester.h",
7828 ] + MICROKERNEL_TEST_HDRS,
7829 deps = MICROKERNEL_TEST_DEPS,
7830)
7831
7832xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007833 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007834 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007835 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007836 "test/avgpool-microkernel-tester.h",
7837 "src/xnnpack/AlignedAllocator.h",
7838 ] + MICROKERNEL_TEST_HDRS,
7839 deps = MICROKERNEL_TEST_DEPS,
7840)
7841
7842xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07007843 name = "qu8_dwconv_minmax_fp32_test",
7844 srcs = [
7845 "test/qu8-dwconv-minmax-fp32.cc",
7846 "test/dwconv-microkernel-tester.h",
7847 "src/xnnpack/AlignedAllocator.h",
7848 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7849 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7850)
7851
7852xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007853 name = "qu8_dwconv_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007854 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007855 "test/qu8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007856 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007857 "src/xnnpack/AlignedAllocator.h",
7858 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007859 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007860)
7861
7862xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007863 name = "qu8_igemm_minmax_fp32_test",
7864 srcs = [
7865 "test/qu8-igemm-minmax-fp32.cc",
7866 "test/gemm-microkernel-tester.h",
7867 "src/xnnpack/AlignedAllocator.h",
7868 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7869 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7870)
7871
7872xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007873 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007874 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007875 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007876 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007877 "src/xnnpack/AlignedAllocator.h",
7878 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007879 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007880)
7881
7882xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007883 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007884 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007885 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007886 "test/gavgpool-microkernel-tester.h",
7887 "src/xnnpack/AlignedAllocator.h",
7888 ] + MICROKERNEL_TEST_HDRS,
7889 deps = MICROKERNEL_TEST_DEPS,
7890)
7891
7892xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007893 name = "qu8_gemm_minmax_fp32_test",
7894 srcs = [
7895 "test/qu8-gemm-minmax-fp32.cc",
7896 "test/gemm-microkernel-tester.h",
7897 "src/xnnpack/AlignedAllocator.h",
7898 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7899 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7900)
7901
7902xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007903 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007904 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007905 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007906 "test/gemm-microkernel-tester.h",
7907 "src/xnnpack/AlignedAllocator.h",
7908 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007909 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007910)
7911
7912xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007913 name = "qu8_requantization_test",
7914 srcs = [
7915 "src/xnnpack/requantization-stubs.h",
7916 "test/qu8-requantization.cc",
7917 "test/requantization-tester.h",
7918 ] + MICROKERNEL_TEST_HDRS,
7919 deps = MICROKERNEL_TEST_DEPS,
7920)
7921
7922xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007923 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007924 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007925 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007926 "test/vadd-microkernel-tester.h",
7927 ] + MICROKERNEL_TEST_HDRS,
7928 deps = MICROKERNEL_TEST_DEPS,
7929)
7930
7931xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007932 name = "u8_lut32norm_test",
7933 srcs = [
7934 "test/u8-lut32norm.cc",
7935 "test/lut-norm-microkernel-tester.h",
7936 ] + MICROKERNEL_TEST_HDRS,
7937 deps = MICROKERNEL_TEST_DEPS,
7938)
7939
7940xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007941 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007942 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007943 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007944 "test/maxpool-microkernel-tester.h",
7945 ] + MICROKERNEL_TEST_HDRS,
7946 deps = MICROKERNEL_TEST_DEPS,
7947)
7948
7949xnnpack_unit_test(
7950 name = "u8_rmax_test",
7951 srcs = [
7952 "test/u8-rmax.cc",
7953 "test/rmax-microkernel-tester.h",
7954 ] + MICROKERNEL_TEST_HDRS,
7955 deps = MICROKERNEL_TEST_DEPS,
7956)
7957
7958xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007959 name = "u8_vclamp_test",
7960 srcs = [
7961 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007962 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007963 ] + MICROKERNEL_TEST_HDRS,
7964 deps = MICROKERNEL_TEST_DEPS,
7965)
7966
7967xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007968 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007969 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007970 "test/x32-depthtospace2d-chw2hwc.cc",
7971 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007972 ] + MICROKERNEL_TEST_HDRS,
7973 deps = MICROKERNEL_TEST_DEPS,
7974)
7975
7976xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007977 name = "x32_fill_test",
7978 srcs = [
7979 "test/x32-fill.cc",
7980 "test/fill-microkernel-tester.h",
7981 ] + MICROKERNEL_TEST_HDRS,
7982 deps = MICROKERNEL_TEST_DEPS,
7983)
7984
7985xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007986 name = "x32_packx_test",
7987 srcs = [
7988 "test/x32-packx.cc",
7989 "test/pack-microkernel-tester.h",
7990 "src/xnnpack/AlignedAllocator.h",
7991 ] + MICROKERNEL_TEST_HDRS,
7992 deps = MICROKERNEL_TEST_DEPS,
7993)
7994
7995xnnpack_unit_test(
7996 name = "x32_pad_test",
7997 srcs = [
7998 "test/x32-pad.cc",
7999 "test/pad-microkernel-tester.h",
8000 ] + MICROKERNEL_TEST_HDRS,
8001 deps = MICROKERNEL_TEST_DEPS,
8002)
8003
8004xnnpack_unit_test(
8005 name = "x32_unpool_test",
8006 srcs = [
8007 "test/x32-unpool.cc",
8008 "test/unpool-microkernel-tester.h",
8009 ] + MICROKERNEL_TEST_HDRS,
8010 deps = MICROKERNEL_TEST_DEPS,
8011)
8012
8013xnnpack_unit_test(
8014 name = "x32_zip_test",
8015 srcs = [
8016 "test/x32-zip.cc",
8017 "test/zip-microkernel-tester.h",
8018 ] + MICROKERNEL_TEST_HDRS,
8019 deps = MICROKERNEL_TEST_DEPS,
8020)
8021
8022xnnpack_unit_test(
8023 name = "x8_lut_test",
8024 srcs = [
8025 "test/x8-lut.cc",
8026 "test/lut-microkernel-tester.h",
8027 ] + MICROKERNEL_TEST_HDRS,
8028 deps = MICROKERNEL_TEST_DEPS,
8029)
8030
8031xnnpack_unit_test(
8032 name = "x8_zip_test",
8033 srcs = [
8034 "test/x8-zip.cc",
8035 "test/zip-microkernel-tester.h",
8036 ] + MICROKERNEL_TEST_HDRS,
8037 deps = MICROKERNEL_TEST_DEPS,
8038)
8039
Marat Dukhan20c3b922020-03-10 03:45:06 -07008040########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008041
8042xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07008043 name = "operator_size_test",
8044 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008045 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008046)
8047
Marat Dukhan20c3b922020-03-10 03:45:06 -07008048xnnpack_binary(
8049 name = "subgraph_size_test",
8050 srcs = ["test/subgraph-size.c"],
8051 deps = [":XNNPACK"],
8052)
8053
8054########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008055
8056xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008057 name = "abs_nc_test",
8058 srcs = [
8059 "test/abs-nc.cc",
8060 "test/abs-operator-tester.h",
8061 ],
8062 deps = OPERATOR_TEST_DEPS,
8063)
8064
8065xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008066 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008067 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008068 srcs = [
8069 "test/add-nd.cc",
8070 "test/binary-elementwise-operator-tester.h",
8071 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008072 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008073)
8074
8075xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008076 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008077 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008078 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008079 "test/argmax-pooling-operator-tester.h",
8080 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008081 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008082)
8083
8084xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008085 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008086 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008087 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008088 "test/average-pooling-operator-tester.h",
8089 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008090 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008091)
8092
8093xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008094 name = "bankers_rounding_nc_test",
8095 srcs = [
8096 "test/bankers-rounding-nc.cc",
8097 "test/bankers-rounding-operator-tester.h",
8098 ],
8099 deps = OPERATOR_TEST_DEPS,
8100)
8101
8102xnnpack_unit_test(
8103 name = "ceiling_nc_test",
8104 srcs = [
8105 "test/ceiling-nc.cc",
8106 "test/ceiling-operator-tester.h",
8107 ],
8108 deps = OPERATOR_TEST_DEPS,
8109)
8110
8111xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008112 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008113 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008114 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008115 "test/channel-shuffle-operator-tester.h",
8116 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008117 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008118)
8119
8120xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008121 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008122 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008123 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008124 "test/clamp-operator-tester.h",
8125 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008126 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008127)
8128
8129xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008130 name = "constant_pad_nd_test",
8131 srcs = [
8132 "test/constant-pad-nd.cc",
8133 "test/constant-pad-operator-tester.h",
8134 ],
8135 deps = OPERATOR_TEST_DEPS,
8136)
8137
8138xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008139 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008140 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008141 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008142 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008143 "test/convolution-operator-tester.h",
8144 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008145 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008146)
8147
8148xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008149 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008150 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008151 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008152 "test/convolution-nchw.cc",
8153 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008154 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008155 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008156)
8157
8158xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008159 name = "copy_nc_test",
8160 srcs = [
8161 "test/copy-nc.cc",
8162 "test/copy-operator-tester.h",
8163 ],
8164 deps = OPERATOR_TEST_DEPS,
8165)
8166
8167xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008168 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008169 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008170 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008171 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008172 "test/deconvolution-operator-tester.h",
8173 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008174 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008175)
8176
8177xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008178 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008179 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008180 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008181 "test/depth-to-space-operator-tester.h",
8182 ] + OPERATOR_TEST_PARAMS_HDRS,
8183 deps = OPERATOR_TEST_DEPS,
8184)
8185
8186xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008187 name = "depth_to_space_nhwc_test",
8188 srcs = [
8189 "test/depth-to-space-nhwc.cc",
8190 "test/depth-to-space-operator-tester.h",
8191 ] + OPERATOR_TEST_PARAMS_HDRS,
8192 deps = OPERATOR_TEST_DEPS,
8193)
8194
8195xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008196 name = "divide_nd_test",
8197 srcs = [
8198 "test/binary-elementwise-operator-tester.h",
8199 "test/divide-nd.cc",
8200 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008201 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008202)
8203
8204xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008205 name = "elu_nc_test",
8206 srcs = [
8207 "test/elu-nc.cc",
8208 "test/elu-operator-tester.h",
8209 ],
8210 deps = OPERATOR_TEST_DEPS,
8211)
8212
8213xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008214 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008215 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008216 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008217 "test/fully-connected-operator-tester.h",
8218 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008219 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008220)
8221
8222xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008223 name = "floor_nc_test",
8224 srcs = [
8225 "test/floor-nc.cc",
8226 "test/floor-operator-tester.h",
8227 ],
8228 deps = OPERATOR_TEST_DEPS,
8229)
8230
8231xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008232 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008233 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008234 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008235 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008236 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008237 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008238)
8239
8240xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008241 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008242 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008243 "test/global-average-pooling-ncw.cc",
8244 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008245 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008246 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008247)
8248
8249xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008250 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008251 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008252 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008253 "test/hardswish-operator-tester.h",
8254 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008255 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008256)
8257
8258xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008259 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008260 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008261 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008262 "test/leaky-relu-operator-tester.h",
8263 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008264 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008265)
8266
8267xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008268 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008269 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008270 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008271 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008272 "test/max-pooling-operator-tester.h",
8273 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008274 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008275)
8276
8277xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008278 name = "maximum_nd_test",
8279 srcs = [
8280 "test/binary-elementwise-operator-tester.h",
8281 "test/maximum-nd.cc",
8282 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008283 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008284)
8285
8286xnnpack_unit_test(
8287 name = "minimum_nd_test",
8288 srcs = [
8289 "test/binary-elementwise-operator-tester.h",
8290 "test/minimum-nd.cc",
8291 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008292 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008293)
8294
8295xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008296 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008297 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008298 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008299 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008300 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008301 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008302)
8303
8304xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008305 name = "negate_nc_test",
8306 srcs = [
8307 "test/negate-nc.cc",
8308 "test/negate-operator-tester.h",
8309 ],
8310 deps = OPERATOR_TEST_DEPS,
8311)
8312
8313xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008314 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008315 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008316 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008317 "test/prelu-operator-tester.h",
8318 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008319 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008320)
8321
8322xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008323 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008324 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008325 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008326 "test/resize-bilinear-operator-tester.h",
8327 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008328 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008329)
8330
8331xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008332 name = "resize_bilinear_nchw_test",
8333 srcs = [
8334 "test/resize-bilinear-nchw.cc",
8335 "test/resize-bilinear-operator-tester.h",
8336 ] + OPERATOR_TEST_PARAMS_HDRS,
8337 deps = OPERATOR_TEST_DEPS,
8338)
8339
8340xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008341 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008342 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008343 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008344 "test/sigmoid-operator-tester.h",
8345 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008346 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008347)
8348
8349xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008350 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008351 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008352 "test/softmax-nc.cc",
8353 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008354 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008355 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008356)
8357
8358xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008359 name = "square_nc_test",
8360 srcs = [
8361 "test/square-nc.cc",
8362 "test/square-operator-tester.h",
8363 ],
8364 deps = OPERATOR_TEST_DEPS,
8365)
8366
8367xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008368 name = "square_root_nc_test",
8369 srcs = [
8370 "test/square-root-nc.cc",
8371 "test/square-root-operator-tester.h",
8372 ],
8373 deps = OPERATOR_TEST_DEPS,
8374)
8375
8376xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008377 name = "squared_difference_nd_test",
8378 srcs = [
8379 "test/binary-elementwise-operator-tester.h",
8380 "test/squared-difference-nd.cc",
8381 ],
8382 deps = OPERATOR_TEST_DEPS,
8383)
8384
8385xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008386 name = "subtract_nd_test",
8387 srcs = [
8388 "test/binary-elementwise-operator-tester.h",
8389 "test/subtract-nd.cc",
8390 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008391 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008392)
8393
8394xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008395 name = "truncation_nc_test",
8396 srcs = [
8397 "test/truncation-nc.cc",
8398 "test/truncation-operator-tester.h",
8399 ],
8400 deps = OPERATOR_TEST_DEPS,
8401)
8402
8403xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008404 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008405 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008406 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008407 "test/unpooling-operator-tester.h",
8408 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008409 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008410)
8411
Chao Mei6ddfc602020-05-13 22:29:36 -07008412############################### Misc unit tests ###############################
8413
8414xnnpack_unit_test(
8415 name = "memory_planner_test",
8416 srcs = [
8417 "test/memory-planner-test.cc",
8418 ],
8419 deps = [
8420 ":XNNPACK",
8421 ":memory_planner",
8422 ],
8423)
8424
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008425xnnpack_unit_test(
8426 name = "subgraph_nchw_test",
8427 srcs = [
8428 "src/xnnpack/subgraph.h",
8429 "test/subgraph-nchw.cc",
8430 "test/subgraph-tester.h",
8431 ],
8432 deps = [
8433 ":XNNPACK",
8434 ],
8435)
8436
Marat Dukhan08c4a432019-10-03 09:29:21 -07008437############################# Build configurations #############################
8438
Marat Dukhanb8642352019-10-30 15:43:02 -07008439# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008440config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008441 name = "xnn_enable_assembly_explicit_true",
8442 define_values = {"xnn_enable_assembly": "true"},
8443)
8444
8445# Disables usage of assembly kernels.
8446config_setting(
8447 name = "xnn_enable_assembly_explicit_false",
8448 define_values = {"xnn_enable_assembly": "false"},
8449)
8450
Marat Dukhan9de90e02020-06-18 16:04:12 -07008451# Enables usage of sparse inference.
8452config_setting(
8453 name = "xnn_enable_sparse_explicit_true",
8454 define_values = {"xnn_enable_sparse": "true"},
8455)
8456
8457# Disables usage of sparse inference.
8458config_setting(
8459 name = "xnn_enable_sparse_explicit_false",
8460 define_values = {"xnn_enable_sparse": "false"},
8461)
8462
Marat Dukhan05702cf2020-03-26 15:41:33 -07008463# Disables usage of HMP-aware optimizations.
8464config_setting(
8465 name = "xnn_enable_hmp_explicit_false",
8466 define_values = {"xnn_enable_hmp": "false"},
8467)
8468
Chao Mei6ddfc602020-05-13 22:29:36 -07008469# Enable usage of optimized memory allocation
8470config_setting(
8471 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008472 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008473)
8474
8475# Disable usage of optimized memory allocation
8476config_setting(
8477 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008478 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008479)
8480
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008481# Enable QS8 inference in TFLite-specific version
8482config_setting(
8483 name = "xnn_enable_qs8_explicit_true",
8484 define_values = {"xnn_enable_qs8": "true"},
8485)
8486
8487# Disable QS8 inference in TFLite-specific version
8488config_setting(
8489 name = "xnn_enable_qs8_explicit_false",
8490 define_values = {"xnn_enable_qs8": "false"},
8491)
8492
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008493# Enable QU8 inference in TFLite-specific version
8494config_setting(
8495 name = "xnn_enable_qu8_explicit_true",
8496 define_values = {"xnn_enable_qu8": "true"},
8497)
8498
8499# Disable QU8 inference in TFLite-specific version
8500config_setting(
8501 name = "xnn_enable_qu8_explicit_false",
8502 define_values = {"xnn_enable_qu8": "false"},
8503)
8504
Marat Dukhanb8642352019-10-30 15:43:02 -07008505# Builds with -c dbg
8506config_setting(
8507 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008508 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008509 "compilation_mode": "dbg",
8510 },
8511)
8512
8513# Builds with -c opt
8514config_setting(
8515 name = "optimized_build",
8516 values = {
8517 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008518 },
8519)
8520
8521config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008522 name = "linux_k8",
8523 values = {"cpu": "k8"},
8524)
8525
8526config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008527 name = "linux_arm",
8528 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008529)
8530
8531config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008532 name = "linux_armeabi",
8533 values = {"cpu": "armeabi"},
8534)
8535
8536config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008537 name = "linux_armhf",
8538 values = {"cpu": "armhf"},
8539)
8540
8541config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008542 name = "linux_armv7a",
8543 values = {"cpu": "armv7a"},
8544)
8545
8546config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008547 name = "linux_aarch64",
8548 values = {"cpu": "aarch64"},
8549)
8550
8551config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008552 name = "android",
8553 values = {"crosstool_top": "//external:android/crosstool"},
8554)
8555
8556config_setting(
8557 name = "android_armv7",
8558 values = {
8559 "crosstool_top": "//external:android/crosstool",
8560 "cpu": "armeabi-v7a",
8561 },
8562)
8563
8564config_setting(
8565 name = "android_arm64",
8566 values = {
8567 "crosstool_top": "//external:android/crosstool",
8568 "cpu": "arm64-v8a",
8569 },
8570)
8571
8572config_setting(
8573 name = "android_x86",
8574 values = {
8575 "crosstool_top": "//external:android/crosstool",
8576 "cpu": "x86",
8577 },
8578)
8579
8580config_setting(
8581 name = "android_x86_64",
8582 values = {
8583 "crosstool_top": "//external:android/crosstool",
8584 "cpu": "x86_64",
8585 },
8586)
8587
8588config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008589 name = "windows_x86_64",
8590 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008591)
8592
8593config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008594 name = "windows_x86_64_clang",
8595 values = {
8596 "compiler": "clang-cl",
8597 "cpu": "x64_windows",
8598 },
8599)
8600
8601config_setting(
8602 name = "windows_x86_64_mingw",
8603 values = {
8604 "compiler": "mingw-gcc",
8605 "cpu": "x64_windows",
8606 },
8607)
8608
8609config_setting(
8610 name = "windows_x86_64_msys",
8611 values = {
8612 "compiler": "msys-gcc",
8613 "cpu": "x64_windows",
8614 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008615)
8616
8617config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008618 name = "macos_x86_64",
8619 values = {
8620 "apple_platform_type": "macos",
8621 "cpu": "darwin",
8622 },
8623)
8624
8625config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008626 name = "macos_arm64",
8627 values = {
8628 "apple_platform_type": "macos",
8629 "cpu": "darwin_arm64",
8630 },
8631)
8632
8633config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008634 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008635 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008636)
8637
8638config_setting(
8639 name = "emscripten_wasm",
8640 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008641 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008642 "cpu": "wasm",
8643 },
8644)
8645
8646config_setting(
8647 name = "emscripten_wasmsimd",
8648 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008649 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008650 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008651 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008652 },
8653)
8654
8655config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008656 name = "ios_armv7",
8657 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008658 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008659 "cpu": "ios_armv7",
8660 },
8661)
8662
8663config_setting(
8664 name = "ios_arm64",
8665 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008666 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008667 "cpu": "ios_arm64",
8668 },
8669)
8670
8671config_setting(
8672 name = "ios_arm64e",
8673 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008674 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008675 "cpu": "ios_arm64e",
8676 },
8677)
8678
8679config_setting(
8680 name = "ios_x86",
8681 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008682 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008683 "cpu": "ios_i386",
8684 },
8685)
8686
8687config_setting(
8688 name = "ios_x86_64",
8689 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008690 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008691 "cpu": "ios_x86_64",
8692 },
8693)
8694
8695config_setting(
8696 name = "watchos_armv7k",
8697 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008698 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008699 "cpu": "watchos_armv7k",
8700 },
8701)
8702
8703config_setting(
8704 name = "watchos_arm64_32",
8705 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008706 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008707 "cpu": "watchos_arm64_32",
8708 },
8709)
8710
8711config_setting(
8712 name = "watchos_x86",
8713 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008714 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008715 "cpu": "watchos_i386",
8716 },
8717)
8718
8719config_setting(
8720 name = "watchos_x86_64",
8721 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008722 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008723 "cpu": "watchos_x86_64",
8724 },
8725)
8726
8727config_setting(
8728 name = "tvos_arm64",
8729 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008730 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008731 "cpu": "tvos_arm64",
8732 },
8733)
8734
8735config_setting(
8736 name = "tvos_x86_64",
8737 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008738 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008739 "cpu": "tvos_x86_64",
8740 },
8741)