blob: e81d679adf5127c89f85b07115dfc85db7478a87 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700252 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
474 "src/math/expm1minus-scalar-rr2-p5.c",
475 "src/math/expm1minus-scalar-rr2-p6.c",
Frank Barchard22136062020-11-24 18:44:46 -0800476 "src/math/expminus-scalar-rr2-lut64-p2.c",
477 "src/math/expminus-scalar-rr2-lut2048-p1.c",
478 "src/math/expminus-scalar-rr2-p5.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
483 "src/math/roundne-scalar-nearbyint.c",
484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
489 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700494 "src/params-init.c",
Marat Dukhan57547062021-06-30 16:53:29 -0700495 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
496 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
497 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
498 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
499 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
500 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
501 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
502 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
503 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
504 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
505 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
506 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhand6021542021-06-30 09:04:20 -0700507 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
508 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
509 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
510 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
511 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
512 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
513 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
514 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
515 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
516 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
517 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
518 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
519 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
520 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
521 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
522 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
523 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
524 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
525 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
526 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
528 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
530 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
531 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
532 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
541 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700542 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
543 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700545 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
546 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
552 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
553 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700554 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
555 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
556 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700557 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
558 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
559 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
560 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
561 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
562 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700563 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
564 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700565 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700566 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
567 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700568 "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700569 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
570 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700571 "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700572 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
573 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700574 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700575 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
576 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700577 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700578 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
579 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700580 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700581 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
582 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700583 "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700584 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
585 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700586 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700587 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
588 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700589 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700590 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
591 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700592 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700593 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
594 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700595 "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700596 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
597 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700598 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700599 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
600 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700601 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700602 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
603 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700604 "src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700605 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
606 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700607 "src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700608 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
609 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700610 "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700611 "src/qs8-requantization/fp32-scalar-lrintf.c",
612 "src/qs8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700613 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700614 "src/qs8-requantization/rndna-scalar-signed64.c",
615 "src/qs8-requantization/rndna-scalar-unsigned32.c",
616 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan062bee32021-05-27 20:31:07 -0700617 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700618 "src/qs8-vadd/gen/minmax-scalar-x1.c",
619 "src/qs8-vadd/gen/minmax-scalar-x2.c",
620 "src/qs8-vadd/gen/minmax-scalar-x4.c",
621 "src/qs8-vaddc/gen/minmax-scalar-x1.c",
622 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
623 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700624 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
625 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1f714282021-07-15 15:41:32 -0700626 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
627 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
628 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
629 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
630 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
631 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
632 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
633 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
634 "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
635 "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
636 "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
637 "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700638 "src/qu8-dwconv/up1x9-minmax-gemmlowp-scalar.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700639 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
640 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700641 "src/qu8-gemm/2x2-minmax-gemmlowp-scalar.c",
Marat Dukhan927d4742021-07-15 13:42:49 -0700642 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
643 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
644 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
645 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
646 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
647 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
648 "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
649 "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
650 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
651 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
652 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
653 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
654 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
655 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
656 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
657 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700658 "src/qu8-igemm/2x2-minmax-gemmlowp-scalar.c",
Marat Dukhan927d4742021-07-15 13:42:49 -0700659 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
660 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
661 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
662 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
663 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
664 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
665 "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
666 "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
667 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
668 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
669 "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
670 "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
671 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
672 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
673 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
674 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700675 "src/qu8-requantization/fp32-scalar-lrintf.c",
676 "src/qu8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700677 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700678 "src/qu8-requantization/rndna-scalar-signed64.c",
679 "src/qu8-requantization/rndna-scalar-unsigned32.c",
680 "src/qu8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700681 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700682 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700683 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700684 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700685 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700686 "src/x8-lut/scalar.c",
687 "src/x8-zip/x2-scalar.c",
688 "src/x8-zip/x3-scalar.c",
689 "src/x8-zip/x4-scalar.c",
690 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800691 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700692 "src/x32-fill/scalar-float.c",
693 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700694 "src/x32-packx/x2-scalar.c",
695 "src/x32-packx/x3-scalar.c",
696 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700697 "src/x32-pad/scalar-float.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700698 "src/x32-pad/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700699 "src/x32-unpool/scalar.c",
700 "src/x32-zip/x2-scalar.c",
701 "src/x32-zip/x3-scalar.c",
702 "src/x32-zip/x4-scalar.c",
703 "src/x32-zip/xm-scalar.c",
Marat Dukhan048931b2020-11-24 20:53:54 -0800704 "src/xx-copy/memcpy.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700705]
706
Marat Dukhan436ebe62019-12-04 15:10:12 -0800707WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700708 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
709 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700710 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
711 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700712 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
713 "src/f32-dwconv/gen/up1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700714 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
715 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700716 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
717 "src/f32-dwconv/gen/up1x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700718 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
719 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700720 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
721 "src/f32-dwconv/gen/up1x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700722 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
723 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700724 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
725 "src/f32-dwconv/gen/up2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700726 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
727 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700728 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
729 "src/f32-dwconv/gen/up2x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700730 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
731 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700732 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
733 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700734 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
735 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700736 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
737 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
738 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
739 "src/f32-gemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700740 "src/f32-gemm/gen/1x4-relu-wasm.c",
741 "src/f32-gemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700742 "src/f32-gemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700743 "src/f32-gemm/gen/2x4-relu-wasm.c",
744 "src/f32-gemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700745 "src/f32-gemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700746 "src/f32-gemm/gen/4x2-relu-wasm.c",
747 "src/f32-gemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700748 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700749 "src/f32-gemm/gen/4x4-relu-wasm.c",
750 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700751 "src/f32-igemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700752 "src/f32-igemm/gen/1x4-relu-wasm.c",
753 "src/f32-igemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700754 "src/f32-igemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700755 "src/f32-igemm/gen/2x4-relu-wasm.c",
756 "src/f32-igemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700757 "src/f32-igemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700758 "src/f32-igemm/gen/4x2-relu-wasm.c",
759 "src/f32-igemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700760 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700761 "src/f32-igemm/gen/4x4-relu-wasm.c",
762 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700763 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
764 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
765 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700766 "src/f32-prelu/gen/wasm-2x1.c",
767 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700768 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
769 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
770 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700771 "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700772 "src/f32-vbinary/gen/vadd-relu-wasm-x1.c",
773 "src/f32-vbinary/gen/vadd-relu-wasm-x2.c",
774 "src/f32-vbinary/gen/vadd-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700775 "src/f32-vbinary/gen/vadd-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700776 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
777 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
778 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
779 "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700780 "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c",
781 "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c",
782 "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700783 "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700784 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
785 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
786 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
787 "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700788 "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c",
789 "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c",
790 "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700791 "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700792 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
793 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
794 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
795 "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700796 "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c",
797 "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c",
798 "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700799 "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800800 "src/f32-vbinary/gen/vmax-wasm-x1.c",
801 "src/f32-vbinary/gen/vmax-wasm-x2.c",
802 "src/f32-vbinary/gen/vmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700803 "src/f32-vbinary/gen/vmax-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800804 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
805 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
806 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700807 "src/f32-vbinary/gen/vmaxc-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800808 "src/f32-vbinary/gen/vmin-wasm-x1.c",
809 "src/f32-vbinary/gen/vmin-wasm-x2.c",
810 "src/f32-vbinary/gen/vmin-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700811 "src/f32-vbinary/gen/vmin-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800812 "src/f32-vbinary/gen/vminc-wasm-x1.c",
813 "src/f32-vbinary/gen/vminc-wasm-x2.c",
814 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700815 "src/f32-vbinary/gen/vminc-wasm-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700816 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
817 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
818 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700819 "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700820 "src/f32-vbinary/gen/vmul-relu-wasm-x1.c",
821 "src/f32-vbinary/gen/vmul-relu-wasm-x2.c",
822 "src/f32-vbinary/gen/vmul-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700823 "src/f32-vbinary/gen/vmul-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700824 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
825 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
826 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
827 "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700828 "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c",
829 "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c",
830 "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700831 "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700832 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
833 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
834 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
835 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700836 "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c",
837 "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c",
838 "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700839 "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700840 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
841 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
842 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
843 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700844 "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c",
845 "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c",
846 "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700847 "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700848 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
849 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
850 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
851 "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700852 "src/f32-vbinary/gen/vsub-relu-wasm-x1.c",
853 "src/f32-vbinary/gen/vsub-relu-wasm-x2.c",
854 "src/f32-vbinary/gen/vsub-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700855 "src/f32-vbinary/gen/vsub-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700856 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
857 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
858 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
859 "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700860 "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c",
861 "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c",
862 "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700863 "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700864 "src/f32-vclamp/gen/vclamp-wasm-x1.c",
865 "src/f32-vclamp/gen/vclamp-wasm-x2.c",
866 "src/f32-vclamp/gen/vclamp-wasm-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800867 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c",
868 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c",
869 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c",
870 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c",
871 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c",
872 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c",
873 "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c",
874 "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c",
875 "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c",
876 "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c",
877 "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c",
878 "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700879 "src/f32-vhswish/gen/vhswish-wasm-x1.c",
880 "src/f32-vhswish/gen/vhswish-wasm-x2.c",
881 "src/f32-vhswish/gen/vhswish-wasm-x4.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700882 "src/f32-vlrelu/gen/vlrelu-wasm-x1.c",
883 "src/f32-vlrelu/gen/vlrelu-wasm-x2.c",
884 "src/f32-vlrelu/gen/vlrelu-wasm-x4.c",
Frank Barchardd4416d62021-05-17 15:51:37 -0700885 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
886 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
887 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700888 "src/f32-vrelu/gen/vrelu-wasm-x1.c",
889 "src/f32-vrelu/gen/vrelu-wasm-x2.c",
890 "src/f32-vrelu/gen/vrelu-wasm-x4.c",
891 "src/f32-vrelu/gen/vrelu-wasm-x8.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800892]
893
Marat Dukhan290055c2020-06-09 12:24:29 -0700894WASMSIMD_UKERNELS = [
Marat Dukhan40f05522020-07-16 22:33:12 -0700895 "src/f32-argmaxpool/4x-wasmsimd-c4.c",
896 "src/f32-argmaxpool/9p8x-wasmsimd-c4.c",
897 "src/f32-argmaxpool/9x-wasmsimd-c4.c",
Marat Dukhan3b7432d2020-07-16 17:46:32 -0700898 "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c",
899 "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c",
900 "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c",
901 "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard22136062020-11-24 18:44:46 -0800902 "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800903 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700904 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800905 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700906 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700907 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800908 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700909 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800910 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700911 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700912 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800913 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700914 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800915 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700916 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
917 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800918 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700919 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800920 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700921 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700922 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800923 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700924 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800925 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700926 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700927 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800928 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700929 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800930 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700931 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
932 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800933 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
934 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
935 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
936 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
937 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
938 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
939 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
940 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
941 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c",
942 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800943 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
944 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
945 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
946 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c",
947 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
948 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c",
949 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c",
950 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c",
951 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c",
952 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800953 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
954 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
955 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
956 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
957 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
958 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
959 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
960 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
961 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c",
962 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800963 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
964 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
965 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
966 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c",
967 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
968 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c",
969 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c",
970 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c",
971 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c",
972 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c",
Frank Barchardc5704bf2020-12-21 23:09:00 -0800973 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
974 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
975 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
976 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
977 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
978 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
979 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
980 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800981 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
982 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
983 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
984 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c",
985 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
986 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c",
987 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c",
988 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c",
Frank Barchardcadd4222021-01-20 16:27:25 -0800989 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
990 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
991 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
992 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
993 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
994 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
995 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
996 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800997 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
998 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
999 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1000 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c",
1001 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1002 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c",
1003 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c",
1004 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -08001005 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1006 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1007 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1008 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1009 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1010 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1011 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1012 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1013 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1014 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
1015 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c",
1016 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c",
1017 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001018 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1019 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1020 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1021 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1022 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c",
1023 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1024 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1025 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c",
1026 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1027 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c",
1028 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c",
1029 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c",
1030 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -08001031 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1032 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1033 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1034 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1035 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1036 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1037 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1038 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1039 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1040 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
1041 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c",
1042 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c",
1043 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001044 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1045 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1046 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1047 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1048 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c",
1049 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1050 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1051 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c",
1052 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1053 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c",
1054 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c",
1055 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c",
1056 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001057 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1058 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1059 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1060 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1061 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1062 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1063 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1064 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1065 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1066 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001067 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1068 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1069 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1070 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1071 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c",
1072 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1073 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1074 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c",
1075 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1076 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001077 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1078 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1079 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1080 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1081 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1082 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1083 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1084 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1085 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1086 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001087 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1088 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1089 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1090 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1091 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c",
1092 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1093 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1094 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c",
1095 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1096 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001097 "src/f32-gavgpool-cw/wasmsimd-arm-x4.c",
1098 "src/f32-gavgpool-cw/wasmsimd-x86-x4.c",
Marat Dukhanc6016802020-07-16 18:51:28 -07001099 "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c",
1100 "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c",
1101 "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c",
1102 "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001103 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c",
1104 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c",
1105 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c",
1106 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001107 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
1108 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001109 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c",
1110 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c",
1111 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c",
1112 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001113 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
1114 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001115 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c",
1116 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c",
1117 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c",
1118 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001119 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
1120 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001121 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c",
1122 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c",
1123 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c",
1124 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001125 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
1126 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001127 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c",
1128 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c",
1129 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c",
1130 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001131 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
1132 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001133 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1134 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1135 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1136 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001137 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c",
1138 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
1139 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1140 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001141 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1142 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1143 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1144 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001145 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1146 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1147 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1148 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1149 "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c",
1150 "src/f32-gemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001151 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1152 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1153 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1154 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001155 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c",
1156 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
1157 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1158 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001159 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1160 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1161 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1162 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001163 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c",
1164 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
1165 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1166 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001167 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1168 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1169 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1170 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001171 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1172 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
XNNPACK Team965272b2020-10-23 21:10:15 -07001173 "src/f32-ibilinear-chw/gen/wasmsimd-p4.c",
1174 "src/f32-ibilinear-chw/gen/wasmsimd-p8.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001175 "src/f32-ibilinear/gen/wasmsimd-c4.c",
1176 "src/f32-ibilinear/gen/wasmsimd-c8.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001177 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1178 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1179 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1180 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001181 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c",
1182 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
1183 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1184 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001185 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1186 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1187 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1188 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001189 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1190 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1191 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1192 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1193 "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c",
1194 "src/f32-igemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001195 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1196 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1197 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1198 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001199 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c",
1200 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
1201 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1202 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001203 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1204 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1205 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1206 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001207 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c",
1208 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
1209 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1210 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001211 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1212 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1213 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1214 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001215 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1216 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhanf6e24802020-07-08 22:20:40 -07001217 "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c",
1218 "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c",
Marat Dukhan1483c532020-07-16 18:08:19 -07001219 "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c",
1220 "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c",
1221 "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c",
1222 "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001223 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1224 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001225 "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c",
1226 "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c",
1227 "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001228 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
1229 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001230 "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c",
1231 "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c",
1232 "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c",
1233 "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c",
1234 "src/f32-prelu/gen/wasmsimd-minmax-1x4.c",
1235 "src/f32-prelu/gen/wasmsimd-minmax-1x8.c",
1236 "src/f32-prelu/gen/wasmsimd-minmax-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001237 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
1238 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001239 "src/f32-prelu/gen/wasmsimd-minmax-2x16.c",
1240 "src/f32-prelu/gen/wasmsimd-minmax-4x4.c",
1241 "src/f32-prelu/gen/wasmsimd-minmax-4x8.c",
1242 "src/f32-prelu/gen/wasmsimd-minmax-4x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001243 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001244 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001245 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001246 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c",
1247 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001248 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001249 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c",
1250 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001251 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001252 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c",
1253 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001254 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c",
Marat Dukhan8c417962020-07-08 12:27:50 -07001255 "src/f32-rmax/wasmsimd-arm.c",
1256 "src/f32-rmax/wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001257 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c",
1258 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001259 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c",
1260 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001261 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001262 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c",
1263 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001264 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c",
1265 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001266 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001267 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c",
1268 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001269 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c",
1270 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001271 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001272 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c",
1273 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001274 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c",
1275 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001276 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001277 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c",
1278 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001279 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c",
1280 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001281 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001282 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c",
1283 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001284 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c",
1285 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001286 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001287 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c",
1288 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001289 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c",
1290 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001291 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001292 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c",
1293 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001294 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c",
1295 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001296 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001297 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
1298 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001299 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001300 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
1301 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001302 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001303 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c",
1304 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001305 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001306 "src/f32-vbinary/gen/vadd-wasmsimd-x4.c",
1307 "src/f32-vbinary/gen/vadd-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001308 "src/f32-vbinary/gen/vadd-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001309 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
1310 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001311 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001312 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
1313 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001314 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001315 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c",
1316 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001317 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001318 "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c",
1319 "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001320 "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001321 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
1322 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001323 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001324 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
1325 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001326 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001327 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c",
1328 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001329 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001330 "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c",
1331 "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001332 "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001333 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
1334 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001335 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001336 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
1337 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001338 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001339 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c",
1340 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001341 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001342 "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c",
1343 "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001344 "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001345 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
1346 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001347 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001348 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
1349 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001350 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001351 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
1352 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001353 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001354 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
1355 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001356 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001357 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
1358 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001359 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001360 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
1361 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001362 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001363 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
1364 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001365 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001366 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
1367 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001368 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001369 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
1370 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001371 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001372 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
1373 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001374 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001375 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c",
1376 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001377 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001378 "src/f32-vbinary/gen/vmul-wasmsimd-x4.c",
1379 "src/f32-vbinary/gen/vmul-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001380 "src/f32-vbinary/gen/vmul-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001381 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
1382 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001383 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001384 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
1385 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001386 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001387 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c",
1388 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001389 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001390 "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c",
1391 "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001392 "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001393 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
1394 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001395 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001396 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
1397 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001398 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001399 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c",
1400 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001401 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001402 "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c",
1403 "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001404 "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001405 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
1406 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001407 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001408 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
1409 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001410 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001411 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c",
1412 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001413 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001414 "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c",
1415 "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001416 "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001417 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
1418 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001419 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001420 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
1421 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001422 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001423 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
1424 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001425 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001426 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
1427 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001428 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001429 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c",
1430 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001431 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001432 "src/f32-vbinary/gen/vsub-wasmsimd-x4.c",
1433 "src/f32-vbinary/gen/vsub-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001434 "src/f32-vbinary/gen/vsub-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001435 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
1436 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001437 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001438 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
1439 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001440 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001441 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c",
1442 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001443 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001444 "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c",
1445 "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001446 "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001447 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
1448 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c",
1449 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c",
1450 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001451 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
1452 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c",
1453 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c",
1454 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c",
1455 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c",
1456 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001457 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c",
1458 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c",
1459 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c",
1460 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c",
1461 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c",
1462 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08001463 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c",
1464 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c",
1465 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c",
1466 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c",
1467 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c",
1468 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001469 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c",
1470 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c",
1471 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c",
1472 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c",
1473 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c",
1474 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001475 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1476 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1477 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001478 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1479 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1480 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1481 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001482 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001483 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001484 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001485 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001486 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1487 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1488 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001489 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1490 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1491 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1492 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001493 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1494 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
1495 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1496 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1497 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1498 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
1499 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1500 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1501 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1502 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001503 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1504 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1505 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1506 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1507 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1508 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1509 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1510 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1511 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1512 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1513 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1514 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001515 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1516 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001517 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1518 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1519 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1520 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1521 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1522 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001523 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1524 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1525 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1526 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001527 "src/math/roundd-wasmsimd-addsub.c",
1528 "src/math/roundd-wasmsimd-cvt.c",
1529 "src/math/roundne-wasmsimd-addsub.c",
1530 "src/math/roundu-wasmsimd-addsub.c",
1531 "src/math/roundu-wasmsimd-cvt.c",
1532 "src/math/roundz-wasmsimd-addsub.c",
1533 "src/math/roundz-wasmsimd-cvt.c",
1534 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1535 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhan313eef72021-06-30 16:11:31 -07001536 "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001537 "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1538 "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1539 "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1540 "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1541 "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001542 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001543 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001544 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001545 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001546 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001547 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001548 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001549 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001550 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001551 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001552 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001553 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan69aa6232021-06-30 14:17:26 -07001554 "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1555 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001556 "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1557 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c",
1558 "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1559 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
1560 "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1561 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c",
1562 "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1563 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
1564 "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
1565 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07001566 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
1567 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
1568 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001569 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
1570 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
1571 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001572 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001573 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001574 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001575 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001576 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001577 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001578 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001579 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001580 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001581 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001582 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001583 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001584 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001585 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001586 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001587 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001588 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001589 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001590 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001591 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001592 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001593 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001594 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001595 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001596 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001597 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001598 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001599 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001600 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001601 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1602 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
1603 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
1604 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1605 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1606 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1607 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1608 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhanf6011352021-07-15 15:11:14 -07001609 "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1610 "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1611 "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1612 "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1613 "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1614 "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan43bee052021-07-14 20:57:18 -07001615 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
1616 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
1617 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
1618 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
1619 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
1620 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
1621 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
1622 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
1623 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
1624 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
1625 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
1626 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001627 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001628 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001629 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001630 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001631 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001632 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001633 "src/x32-zip/x2-wasmsimd.c",
1634 "src/x32-zip/x3-wasmsimd.c",
1635 "src/x32-zip/x4-wasmsimd.c",
1636 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001637]
1638
Marat Dukhan08c4a432019-10-03 09:29:21 -07001639# ISA-specific micro-kernels
1640NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001641 "src/f32-argmaxpool/4x-neon-c4.c",
1642 "src/f32-argmaxpool/9p8x-neon-c4.c",
1643 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001644 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1645 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001646 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001647 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001648 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001649 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001650 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001651 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001652 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001653 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001654 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001655 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001656 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001657 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001658 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001659 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001660 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1661 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1662 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1663 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1664 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001665 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001666 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001667 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1668 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1669 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001670 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001671 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001672 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1673 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1674 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1675 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1676 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001677 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1678 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1679 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001680 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001681 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001682 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1683 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1684 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001685 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1686 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1687 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1688 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001689 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001690 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1691 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001692 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001693 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001694 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001695 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001696 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1697 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001698 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1699 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1700 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1701 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1702 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1703 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1704 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1705 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001706 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001707 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001708 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001709 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1710 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001711 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001712 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1713 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001714 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001715 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1716 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1717 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1718 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1719 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001720 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1721 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001722 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1723 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001724 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1725 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001726 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1727 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1728 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1729 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1730 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1731 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1732 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1733 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1734 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1735 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1736 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1737 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1738 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1739 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1740 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1741 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001742 "src/f32-ibilinear-chw/gen/neon-p4.c",
1743 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001744 "src/f32-ibilinear/gen/neon-c4.c",
1745 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001746 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001747 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001748 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001749 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1750 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001751 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001752 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1753 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1754 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1755 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001756 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1757 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001758 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1759 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001760 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1761 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001762 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1763 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1764 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001765 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1766 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001767 "src/f32-prelu/gen/neon-1x4.c",
1768 "src/f32-prelu/gen/neon-1x8.c",
1769 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001770 "src/f32-prelu/gen/neon-2x4.c",
1771 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001772 "src/f32-prelu/gen/neon-2x16.c",
1773 "src/f32-prelu/gen/neon-4x4.c",
1774 "src/f32-prelu/gen/neon-4x8.c",
1775 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001776 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001777 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001778 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001779 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1780 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001781 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001782 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1783 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001784 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001785 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1786 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001787 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1788 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1789 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1790 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1791 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1792 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1793 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1794 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1795 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1796 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1797 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1798 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1799 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001800 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001801 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1802 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1803 "src/f32-spmm/gen/4x1-minmax-neon.c",
1804 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1805 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1806 "src/f32-spmm/gen/8x1-minmax-neon.c",
1807 "src/f32-spmm/gen/12x1-minmax-neon.c",
1808 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1809 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1810 "src/f32-spmm/gen/16x1-minmax-neon.c",
1811 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1812 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1813 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001814 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1815 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1816 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1817 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001818 "src/f32-vbinary/gen/vmax-neon-x4.c",
1819 "src/f32-vbinary/gen/vmax-neon-x8.c",
1820 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1821 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1822 "src/f32-vbinary/gen/vmin-neon-x4.c",
1823 "src/f32-vbinary/gen/vmin-neon-x8.c",
1824 "src/f32-vbinary/gen/vminc-neon-x4.c",
1825 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001826 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1827 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1828 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1829 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1830 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1831 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001832 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1833 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1834 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1835 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001836 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1837 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1838 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1839 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001840 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1841 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001842 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1843 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1844 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1845 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1846 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1847 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1848 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1849 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1850 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1851 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1852 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1853 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001854 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1855 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1856 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001857 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1858 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001859 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1860 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001861 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1862 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001863 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1864 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001865 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1866 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1867 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1868 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1869 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1870 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001871 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1872 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1873 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1874 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1875 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1876 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1877 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1878 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1879 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1880 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1881 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1882 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1883 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1884 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1885 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1886 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1887 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1888 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001889 "src/f32-vunary/gen/vabs-neon-x4.c",
1890 "src/f32-vunary/gen/vabs-neon-x8.c",
1891 "src/f32-vunary/gen/vneg-neon-x4.c",
1892 "src/f32-vunary/gen/vneg-neon-x8.c",
1893 "src/f32-vunary/gen/vsqr-neon-x4.c",
1894 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001895 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1896 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001897 "src/math/roundd-neon-addsub.c",
1898 "src/math/roundd-neon-cvt.c",
1899 "src/math/roundne-neon-addsub.c",
1900 "src/math/roundu-neon-addsub.c",
1901 "src/math/roundu-neon-cvt.c",
1902 "src/math/roundz-neon-addsub.c",
1903 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001904 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1905 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1906 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1907 "src/math/sqrt-neon-nr1rsqrts.c",
1908 "src/math/sqrt-neon-nr2rsqrts.c",
1909 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001910 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
1911 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
1912 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
1913 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1914 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1915 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1916 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1917 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001918 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001919 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1920 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001921 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001922 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1923 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001924 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001925 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1926 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001927 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001928 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1929 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001930 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001931 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001932 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001933 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001934 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001935 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001936 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001937 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001938 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001939 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001940 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001941 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001942 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001943 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001944 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001945 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001946 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1947 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1948 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1949 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001950 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1951 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1952 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1953 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001954 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1955 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1956 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001957 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001958 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1959 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001960 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001961 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001962 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1963 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001964 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001965 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1966 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1967 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1968 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1969 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1970 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1971 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1972 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1973 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1974 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1975 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001976 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001977 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1978 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001979 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001980 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001981 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1982 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1983 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1984 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1985 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1986 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1987 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1988 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1989 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1990 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1991 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1992 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1993 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1994 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1995 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1996 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1997 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1998 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1999 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2000 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2001 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2002 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2003 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2004 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2005 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2006 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2007 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2008 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2009 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2010 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2011 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2012 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2013 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2014 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002015 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002016 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2017 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2018 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2019 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2020 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2021 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2022 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2023 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2024 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2025 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2026 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2027 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
2028 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2029 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2030 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002031 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002032 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2033 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002034 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002035 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002036 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
2037 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002038 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002039 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2040 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2041 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2042 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2043 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2044 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2045 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2046 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2047 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2048 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2049 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002050 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002051 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2052 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002053 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002054 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002055 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
2056 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2057 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2058 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2059 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2060 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2061 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2062 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2063 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2064 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2065 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2066 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2067 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2068 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2069 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2070 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2071 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2072 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2073 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2074 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2075 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2076 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2077 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2078 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2079 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2080 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2081 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2082 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2083 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2084 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2085 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2086 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2087 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2088 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002089 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002090 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2091 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2092 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2093 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2094 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2095 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2096 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2097 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2098 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2099 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2100 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2101 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002102 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002103 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002104 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07002105 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002106 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2107 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2108 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2109 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2110 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2111 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2112 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2113 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002114 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2115 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002116 "src/qu8-dwconv/up8x9-minmax-gemmlowp-neon.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002117 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
2118 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
2119 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
2120 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
2121 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
2122 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
2123 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
2124 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002125 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2126 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002127 "src/qu8-gemm/4x8-minmax-gemmlowp-neon.c",
2128 "src/qu8-gemm/8x8-minmax-gemmlowp-neon.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002129 "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2130 "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07002131 "src/qu8-igemm/4x8-minmax-gemmlowp-neon.c",
2132 "src/qu8-igemm/8x8-minmax-gemmlowp-neon.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002133 "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2134 "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002135 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002136 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002137 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002138 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002139 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002140 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002141 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002142 "src/x8-zip/x2-neon.c",
2143 "src/x8-zip/x3-neon.c",
2144 "src/x8-zip/x4-neon.c",
2145 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002146 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002147 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002148 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002149 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002150 "src/x32-zip/x2-neon.c",
2151 "src/x32-zip/x3-neon.c",
2152 "src/x32-zip/x4-neon.c",
2153 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002154]
2155
2156NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002157 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2158 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2159 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2160 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2161 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2162 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2163 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2164 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2165 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2166 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2167 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2168 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2169 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2170 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2171 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2172 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2173 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2174 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2175 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2176 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2177 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2178 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2179 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2180 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2181 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2182 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2183 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2184 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2185 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2186 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002187 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2188 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002189 "src/f32-ibilinear/gen/neonfma-c4.c",
2190 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002191 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002192 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002193 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002194 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2195 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002196 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2197 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002198 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2199 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002200 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2201 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002202 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002203 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002204 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002205 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2206 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002207 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002208 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2209 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002210 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002211 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2212 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002213 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2214 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2215 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2216 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2217 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2218 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2219 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2220 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2221 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2222 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2223 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2224 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2225 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002226 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2227 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2228 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2229 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2230 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2231 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2232 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2233 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2234 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2235 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2236 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2237 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2238 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002239 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2240 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2241 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2242 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2243 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2244 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2245 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2246 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2247 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2248 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2249 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2250 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002251 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2252 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002253 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2254 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2255 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2256 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2257 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2258 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2259 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2260 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2261 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2262 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2263 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2264 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2265 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2266 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2267 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2268 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2269 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2270 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2271 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2272 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2273 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2274 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2275 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2276 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2277 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2278 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2279 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2280 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2281 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2282 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2283 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2284 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2285 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2286 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2287 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2288 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2289 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2290 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2291 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2292 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2293 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2294 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2295 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2296 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2297 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2298 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2299 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2300 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2301 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2302 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2303 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2304 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2305 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2306 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002307 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2308 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2309 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2310 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2311 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2312 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2313 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2314 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2315 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2316 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2317 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2318 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2319 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2320 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2321 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2322 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2323 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2324 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2325 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2326 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002327 "src/math/exp-neonfma-rr2-lut64-p2.c",
2328 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002329 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2330 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002331 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2332 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2333 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002334 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2335 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2336 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002337 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2338 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2339 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002340 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2341 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2342 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002343 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2344 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2345 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002346 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2347 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2348 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002349 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2350 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2351 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002352 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002353 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002354 "src/math/sqrt-neonfma-nr2fma.c",
2355 "src/math/sqrt-neonfma-nr2fma1adj.c",
2356 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002357]
2358
2359AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002360 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002361 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002362 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002363 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002364 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002365 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002366 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002367 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002368 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002369 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2370 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
2371 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002372 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002373 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002374 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
2375 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
2376 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
2377 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2378 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002379 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2380 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2381 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002382 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002383 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002384 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2385 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2386 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002387 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2388 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2389 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2390 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002391 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002392 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2393 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002394 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002395 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002396 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002397 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002398 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2399 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002400 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2401 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2402 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2403 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2404 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2405 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2406 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2407 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002408 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002409 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002410 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2411 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2412 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2413 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2414 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2415 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2416 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2417 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2418 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2419 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2420 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2421 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2422 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2423 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2424 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2425 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2426 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2427 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2428 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2429 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002430 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2431 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002432 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2433 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002434 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2435 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002436 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2437 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002438 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2439 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002440 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2441 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2442 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2443 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2444 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2445 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002446 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2447 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2448 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2449 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2450 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2451 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2452 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2453 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2454 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2455 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2456 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2457 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2458 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2459 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2460 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2461 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2462 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2463 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002464 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2465 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002466 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002467 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002468 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002469 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002470 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002471 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002472]
2473
Marat Dukhan8853b822020-05-07 12:19:01 -07002474NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002475 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2476 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002477 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2478 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2479 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2480 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2481 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2482 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002483 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002484 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002485 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002486 "src/math/roundz-neonv8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002487 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2488 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2489 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2490 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2491 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2492 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2493 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2494 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002495 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002496 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2497 "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002498 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002499 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2500 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002501 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002502 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2503 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002504 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002505 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2506 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002507 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2508 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2509 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2510 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2511 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2512 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2513 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2514 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002515 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002516 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2517 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002518 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002519 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2520 "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002521 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002522 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2523 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002524 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002525 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2526 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002527 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2528 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2529 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2530 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2531 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2532 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2533 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2534 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002535 "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2536 "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
2537 "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2538 "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002539]
2540
Marat Dukhan08c4a432019-10-03 09:29:21 -07002541AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchard5a599a62020-06-04 20:12:44 -07002542 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
2543 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
2544 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2545 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002546 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2547 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2548 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2549 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2550 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2551 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2552 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2553 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002554 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2555 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002556 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
2557 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
2558 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2559 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2560 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2561 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
2562 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2563 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2564 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2565 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2566 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2567 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2568 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2569 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2570 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2571 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002572 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2573 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2574 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2575 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2576 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2577 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2578 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2579 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002580 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002581 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002582 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002583 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002584 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002585 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002586 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002587 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002588 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002589 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2590 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2591 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2592 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2593 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2594 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2595 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2596 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2597 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2598 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2599 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2600 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2601 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2602 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2603 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2604 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2605 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2606 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2607 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2608 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2609 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2610 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2611 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2612 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2613 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2614 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2615 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2616 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2617 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002618 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2619 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002620 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2621 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002622 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2623 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002624 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2625 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002626]
2627
Benoit Jacoba9644732020-08-13 12:48:55 -07002628NEONDOT_UKERNELS = [
Marat Dukhane76478b2021-06-28 16:35:40 -07002629 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2630 "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2631 "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2632 "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2633 "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2634 "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2635 "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2636 "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2637 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2638 "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2639 "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2640 "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2641 "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2642 "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2643 "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2644 "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002645 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2646 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002647 "src/qs8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2648 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002649 "src/qs8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2650 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002651 "src/qs8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2652 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002653 "src/qs8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2654 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002655 "src/qs8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2656 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002657 "src/qs8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2658 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002659 "src/qs8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2660 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002661 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2662 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002663 "src/qs8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2664 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002665 "src/qs8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2666 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002667 "src/qs8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2668 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002669 "src/qs8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2670 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002671 "src/qs8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2672 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002673 "src/qs8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2674 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002675 "src/qs8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
2676 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002677]
2678
Marat Dukhan08c4a432019-10-03 09:29:21 -07002679SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -07002680 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
2681 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07002682 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
2683 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002684 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
2685 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
2686 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
2687 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002688 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2689 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002690 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2691 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2692 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2693 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002694 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2695 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002696 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2697 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2698 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002699 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002700 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002701 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2702 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2703 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2704 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2705 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002706 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2707 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2708 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002709 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002710 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002711 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2712 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2713 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002714 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2715 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2716 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2717 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2718 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2719 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2720 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2721 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2722 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2723 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2724 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2725 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2726 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002727 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2728 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2729 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2730 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2731 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2732 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2733 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2734 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002735 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002736 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002737 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002738 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2739 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002740 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2741 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2742 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002743 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2744 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2745 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002746 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2747 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2748 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002749 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2750 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2751 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002752 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2753 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2754 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002755 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2756 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2757 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002758 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2759 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2760 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2761 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002762 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2763 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2764 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002765 "src/f32-ibilinear-chw/gen/sse-p4.c",
2766 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002767 "src/f32-ibilinear/gen/sse-c4.c",
2768 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002769 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2770 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2771 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002772 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2773 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2774 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002775 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2776 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2777 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2778 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002779 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2780 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2781 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002782 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2783 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2784 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002785 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002786 "src/f32-prelu/gen/sse-2x4.c",
2787 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002788 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002789 "src/f32-spmm/gen/4x1-minmax-sse.c",
2790 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002791 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002792 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002793 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2794 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2795 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2796 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2797 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2798 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2799 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2800 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002801 "src/f32-vbinary/gen/vmax-sse-x4.c",
2802 "src/f32-vbinary/gen/vmax-sse-x8.c",
2803 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2804 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2805 "src/f32-vbinary/gen/vmin-sse-x4.c",
2806 "src/f32-vbinary/gen/vmin-sse-x8.c",
2807 "src/f32-vbinary/gen/vminc-sse-x4.c",
2808 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002809 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2810 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2811 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2812 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2813 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2814 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2815 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2816 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002817 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2818 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2819 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2820 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002821 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2822 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2823 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2824 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002825 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2826 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002827 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2828 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002829 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2830 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002831 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2832 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002833 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2834 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002835 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2836 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002837 "src/f32-vunary/gen/vabs-sse-x4.c",
2838 "src/f32-vunary/gen/vabs-sse-x8.c",
2839 "src/f32-vunary/gen/vneg-sse-x4.c",
2840 "src/f32-vunary/gen/vneg-sse-x8.c",
2841 "src/f32-vunary/gen/vsqr-sse-x4.c",
2842 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002843 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002844 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002845 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002846 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002847 "src/math/sqrt-sse-hh1mac.c",
2848 "src/math/sqrt-sse-nr1mac.c",
2849 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002850 "src/x32-fill/sse.c",
2851 "src/x32-packx/x4-sse.c",
2852 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002853]
2854
2855SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002856 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002857 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002858 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002859 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2860 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2861 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2862 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2863 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2864 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2865 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2866 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2867 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2868 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2869 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2870 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002871 "src/f32-prelu/gen/sse2-2x4.c",
2872 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002873 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002874 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002875 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002876 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2877 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002878 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002879 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2880 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002881 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002882 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2883 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002884 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002885 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2886 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2887 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2888 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2889 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2890 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2891 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2892 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2893 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2894 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2895 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2896 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002897 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2898 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002899 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2900 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002901 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2902 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2903 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2904 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2905 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2906 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002907 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2908 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2909 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2910 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2911 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2912 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2913 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2914 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2915 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2916 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2917 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2918 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002919 "src/math/exp-sse2-rr2-lut64-p2.c",
2920 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002921 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002922 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002923 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002924 "src/math/roundd-sse2-cvt.c",
2925 "src/math/roundne-sse2-cvt.c",
2926 "src/math/roundu-sse2-cvt.c",
2927 "src/math/roundz-sse2-cvt.c",
2928 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2929 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2930 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2931 "src/math/sigmoid-sse2-rr2-p5-div.c",
2932 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2933 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002934 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2935 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2936 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2937 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2938 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2939 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002940 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002941 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002942 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002943 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002944 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002945 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002946 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002947 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002948 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002949 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002950 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002951 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002952 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002953 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002954 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002955 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002956 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002957 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002958 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002959 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002960 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002961 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002962 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002963 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002964 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002965 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002966 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002967 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002968 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2969 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002970 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2971 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2972 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2973 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2974 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2975 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2976 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2977 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2978 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
2979 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002980 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2981 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2982 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002983 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2984 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2985 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002986 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002987 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002988 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002989 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002990 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002991 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002992 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002993 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002994 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002995 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002996 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002997 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002998 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002999 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003000 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003001 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003002 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003003 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003004 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003005 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003006 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003007 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003008 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003009 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003010 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003011 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003012 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003013 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003014 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003015 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003016 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003017 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003018 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003019 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003020 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003021 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003022 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003023 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003024 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07003025 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003026 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003027 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003028 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
3029 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
3030 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
3031 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003032 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
3033 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
3034 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
3035 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003036 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
3037 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003038 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
3039 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
3040 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
3041 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanc2e8f662021-07-01 17:06:34 -07003042 "src/qu8-dwconv/up8x9-minmax-gemmlowp-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003043 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
3044 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003045 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
3046 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
3047 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
3048 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
3049 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
3050 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
3051 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
3052 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003053 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003054 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
3055 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
3056 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
3057 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
3058 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
3059 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003060 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003061 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
3062 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
3063 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
3064 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
3065 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
3066 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
3067 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
3068 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003069 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003070 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
3071 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
3072 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
3073 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
3074 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
3075 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003076 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07003077 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003078 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003079 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003080 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07003081 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003082 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003083 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003084 "src/x8-zip/x2-sse2.c",
3085 "src/x8-zip/x3-sse2.c",
3086 "src/x8-zip/x4-sse2.c",
3087 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07003088 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003089 "src/x32-zip/x2-sse2.c",
3090 "src/x32-zip/x3-sse2.c",
3091 "src/x32-zip/x4-sse2.c",
3092 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07003093]
3094
3095SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07003096 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
3097 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c",
3098 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07003099 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003100 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07003101 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
3102 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c",
3103 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c",
3104 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
3105 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003106 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003107 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c",
3108 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
3109 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
3110 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
3111 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003112 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
3113 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
3114 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003115 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
3116 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c",
3117 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003118 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003119 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003120 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003121 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003122 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003123 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003124 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003125 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003126 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003127 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003128 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003129 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003130 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003131 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003132 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003133 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003134 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003135 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003136 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003137 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003138 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003139 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003140 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003141 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003142 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003143 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3144 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
3145 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3146 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003147 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003148 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003149]
3150
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003151SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08003152 "src/f32-prelu/gen/sse41-2x4.c",
3153 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003154 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
3155 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
3156 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
3157 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
3158 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
3159 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
3160 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
3161 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
3162 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
3163 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
3164 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
3165 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003166 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
3167 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003168 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
3169 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003170 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
3171 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
3172 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
3173 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
3174 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
3175 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003176 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
3177 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
3178 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
3179 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
3180 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
3181 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
3182 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
3183 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
3184 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
3185 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
3186 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
3187 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003188 "src/math/roundd-sse41.c",
3189 "src/math/roundne-sse41.c",
3190 "src/math/roundu-sse41.c",
3191 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003192 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3193 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3194 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3195 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3196 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3197 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3198 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3199 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3200 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3201 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3202 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3203 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003204 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003205 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003206 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003207 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003208 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003209 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003210 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003211 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003212 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003213 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003214 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003215 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003216 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003217 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003218 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003219 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003220 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003221 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003222 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003223 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003224 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003225 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003226 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003227 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003228 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003229 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003230 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003231 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003232 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3233 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3234 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
3235 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003236 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3237 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3238 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
3239 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3240 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3241 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3242 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3243 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3244 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3245 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3246 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3247 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3248 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3249 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3250 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
3251 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3252 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3253 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3254 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3255 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003256 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3257 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3258 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003259 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
3260 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
3261 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003262 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003263 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003264 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003265 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003266 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003267 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003268 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003269 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003270 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003271 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003272 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003273 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003274 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003275 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003276 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003277 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003278 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003279 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003280 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003281 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003282 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003283 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003284 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003285 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003286 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003287 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003288 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003289 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003290 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003291 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003292 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003293 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003294 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003295 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003296 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003297 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003298 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003299 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003300 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003301 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003302 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003303 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003304 "src/qs8-requantization/rndnu-sse4-sra.c",
3305 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003306 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3307 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3308 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3309 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003310 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3311 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3312 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3313 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003314 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3315 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3316 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3317 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003318 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3319 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3320 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3321 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003322 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003323 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003324 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003325 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003326 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003327 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003328 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003329 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003330 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3331 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3332 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3333 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3334 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3335 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3336 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3337 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003338 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003339 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3340 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3341 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3342 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3343 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3344 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003345 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003346 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3347 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3348 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3349 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3350 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3351 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3352 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3353 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003354 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003355 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3356 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3357 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3358 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3359 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3360 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003361 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003362 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003363 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003364]
3365
Marat Dukhan08c4a432019-10-03 09:29:21 -07003366AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003367 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3368 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003369 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3370 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003371 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3372 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003373 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3374 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3375 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3376 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3377 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3378 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003379 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003380 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3381 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003382 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003383 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003384 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003385 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003386 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3387 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3388 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3389 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3390 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3391 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3392 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3393 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3394 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3395 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3396 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003397 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003398 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3399 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003400 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003401 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003402 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003403 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003404 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3405 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003406 "src/f32-prelu/gen/avx-2x8.c",
3407 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003408 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003409 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3410 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3411 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3412 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3413 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3414 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3415 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3416 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003417 "src/f32-vbinary/gen/vmax-avx-x8.c",
3418 "src/f32-vbinary/gen/vmax-avx-x16.c",
3419 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3420 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3421 "src/f32-vbinary/gen/vmin-avx-x8.c",
3422 "src/f32-vbinary/gen/vmin-avx-x16.c",
3423 "src/f32-vbinary/gen/vminc-avx-x8.c",
3424 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003425 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3426 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3427 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3428 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3429 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3430 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3431 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3432 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003433 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3434 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3435 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3436 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003437 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3438 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3439 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3440 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003441 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3442 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003443 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3444 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3445 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3446 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3447 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3448 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3449 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3450 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3451 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3452 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3453 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3454 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3455 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3456 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3457 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3458 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3459 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3460 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003461 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3462 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003463 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3464 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003465 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3466 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003467 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3468 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003469 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3470 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3471 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3472 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3473 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3474 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003475 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003476 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3477 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3478 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3479 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3480 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3481 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3482 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3483 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3484 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3485 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3486 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3487 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3488 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3489 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3490 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3491 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3492 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3493 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3494 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3495 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003496 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3497 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003498 "src/f32-vunary/gen/vabs-avx-x8.c",
3499 "src/f32-vunary/gen/vabs-avx-x16.c",
3500 "src/f32-vunary/gen/vneg-avx-x8.c",
3501 "src/f32-vunary/gen/vneg-avx-x16.c",
3502 "src/f32-vunary/gen/vsqr-avx-x8.c",
3503 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003504 "src/math/exp-avx-rr2-p5.c",
3505 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3506 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3507 "src/math/expm1minus-avx-rr2-p6.c",
3508 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3509 "src/math/sigmoid-avx-rr2-p5-div.c",
3510 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3511 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003512 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3513 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3514 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3515 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3516 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3517 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3518 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3519 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3520 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3521 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3522 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3523 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003524 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003525 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003526 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003527 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003528 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003529 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003530 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003531 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003532 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003533 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003534 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003535 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003536 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003537 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003538 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003539 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003540 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003541 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003542 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003543 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003544 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003545 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003546 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003547 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003548 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003549 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003550 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003551 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003552 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3553 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3554 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3555 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003556 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3557 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3558 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3559 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3560 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3561 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3562 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3563 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3564 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3565 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3566 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3567 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3568 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3569 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3570 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3571 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3572 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3573 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3574 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3575 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003576 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003577 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003578 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003579 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003580 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003581 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003582 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003583 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003584 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003585 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003586 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003587 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003588 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003589 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003590 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003591 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003592 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003593 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003594 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003595 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003596 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003597 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003598 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003599 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003600 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003601 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003602 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003603 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003604 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003605 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003606 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003607 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003608 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003609 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003610 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003611 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3612 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3613 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3614 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3615 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3616 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3617 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3618 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3619 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3620 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3621 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3622 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3623 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3624 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3625 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3626 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003627 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003628 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003629 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003630 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003631 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003632 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003633 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003634 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003635 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3636 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3637 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3638 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3639 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3640 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3641 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3642 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3643 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3644 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3645 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3646 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3647 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3648 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3649 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3650 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3651 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3652 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3653 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3654 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3655 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3656 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3657 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3658 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3659 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3660 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3661 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3662 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003663]
3664
Marat Dukhan1566fee2020-08-02 21:55:41 -07003665XOP_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07003666 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3667 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3668 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3669 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3670 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3671 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003672 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003673 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003674 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003675 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003676 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003677 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003678 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003679 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003680 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003681 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003682 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003683 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003684 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003685 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003686 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003687 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003688 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003689 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003690 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003691 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003692 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003693 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003694 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003695 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003696 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003697 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003698 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003699 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003700 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3701 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003702 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3703 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3704 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3705 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3706 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3707 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3708 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3709 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3710 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3711 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003712 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003713 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003714 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003715 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003716 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003717 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003718 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003719 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003720 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003721 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003722 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003723 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003724 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003725 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003726 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003727 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003728 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003729 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003730 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003731 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003732 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003733 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003734 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003735 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003736 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003737 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003738 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003739 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003740 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003741 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003742 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003743 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003744 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003745 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003746 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003747 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3748 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3749 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3750 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3751 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3752 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3753 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3754 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003755 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3756 "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3757 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3758 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003759 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3760 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3761 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3762 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3763 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3764 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3765 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3766 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3767 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3768 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3769 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3770 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3771 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3772 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3773 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3774 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3775 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3776 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3777 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3778 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3779 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3780 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3781 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3782 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3783 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3784 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3785 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3786 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003787]
3788
Marat Dukhanfda12b82019-11-21 12:27:59 -08003789FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003790 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
3791 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003792 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3793 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003794 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3795 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003796 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
3797 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
3798 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
3799 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
3800 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3801 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003802 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003803 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3804 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3805 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3806 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003807 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003808 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
3809 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003810 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003811 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
3812 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003813 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3814 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3815 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003816 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3817 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3818 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3819 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3820 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3821 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3822 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3823 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3824 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3825 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3826 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3827 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3828 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3829 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003830 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003831 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3832 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3833 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3834 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003835 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003836 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3837 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003838 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003839 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3840 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003841 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3842 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3843 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003844 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3845 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003846 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3847 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3848 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3849 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3850 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3851 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3852 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3853 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003854 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003855 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003856 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003857]
3858
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003859AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003860 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
3861 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003862 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003863 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003864 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003865 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
3866 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003867 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003868 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
3869 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
3870 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003871 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003872 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
3873 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003874 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003875 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003876 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003877 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3878 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003879 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003880 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3881 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3882 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003883 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003884 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3885 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003886 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003887 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003888 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003889 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3890 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003891 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003892 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3893 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3894 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003895 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003896 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3897 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3898 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3899 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3900 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3901 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3902 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3903 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3904 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3905 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3906 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3907 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3908 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3909 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3910 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3911 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3912 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3913 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3914 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3915 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3916 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3917 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3918 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3919 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3920 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3921 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3922 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3923 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3924 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3925 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3926 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3927 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3928 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3929 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3930 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3931 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3932 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3933 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3934 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3935 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003936 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3937 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3938 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3939 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3940 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3941 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3942 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3943 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3944 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3945 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3946 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3947 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3948 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3949 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3950 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3951 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3952 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3953 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3954 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3955 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3956 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3957 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3958 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3959 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003960 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3961 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3962 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3963 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3964 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3965 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3966 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3967 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3968 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3969 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3970 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3971 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3972 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3973 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3974 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3975 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3976 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3977 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3978 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3979 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3980 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3981 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3982 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3983 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3984 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3985 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3986 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3987 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3988 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3989 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003990 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3991 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3992 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003993 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3994 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3995 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3996 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003997 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003998 "src/math/extexp-avx2-p5.c",
3999 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
4000 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
4001 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
4002 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
4003 "src/math/sigmoid-avx2-rr1-p5-div.c",
4004 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
4005 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
4006 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
4007 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
4008 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
4009 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
4010 "src/math/sigmoid-avx2-rr2-p5-div.c",
4011 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
4012 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07004013 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4014 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4015 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
4016 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4017 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
4018 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4019 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
4020 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
4021 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
4022 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4023 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
4024 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004025 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4026 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
4027 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4028 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
4029 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4030 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07004031 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4032 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4033 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004034 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004035 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004036 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004037 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004038 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004039 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004040 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
4041 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004042 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004043 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004044 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
4045 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004046 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004047 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004048 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004049 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004050 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004051 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004052 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
4053 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004054 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004055 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004056 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
4057 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004058 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004059 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004060 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004061 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004062 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004063 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004064 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004065 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004066 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004067 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004068 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004069 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004070 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004071 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004072 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004073 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004074 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004075 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07004076 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4077 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4078 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
4079 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
4080 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4081 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
4082 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
4083 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07004084 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4085 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4086 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4087 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4088 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4089 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004090 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4091 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4092 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4093 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4094 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4095 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004096]
4097
Marat Dukhan08c4a432019-10-03 09:29:21 -07004098AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004099 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4100 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004101 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4102 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004103 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4104 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004105 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
4106 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
4107 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4108 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4109 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4110 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004111 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4112 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4113 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4114 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4115 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4116 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004117 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4118 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4119 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4120 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4121 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4122 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004123 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4124 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4125 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4126 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4127 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4128 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004129 "src/f32-prelu/gen/avx512f-2x16.c",
4130 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004131 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4132 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004133 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004134 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004135 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004136 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4137 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004138 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004139 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4140 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4141 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004142 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004143 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4144 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004145 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004146 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004147 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004148 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4149 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004150 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004151 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4152 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4153 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004154 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004155 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4156 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004157 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004158 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004159 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004160 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4161 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004162 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004163 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4164 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4165 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004166 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004167 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004168 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4169 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4170 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4171 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4172 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4173 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4174 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4175 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004176 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4177 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4178 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4179 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4180 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4181 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4182 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4183 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004184 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4185 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4186 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4187 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4188 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4189 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4190 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4191 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004192 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4193 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4194 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4195 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004196 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4197 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4198 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4199 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004200 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4201 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004202 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4203 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4204 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4205 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4206 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4207 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4208 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4209 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4210 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4211 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4212 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4213 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4214 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4215 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4216 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4217 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004218 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4219 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004220 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4221 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004222 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4223 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004224 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4225 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4226 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4227 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4228 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4229 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4230 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4231 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004232 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004233 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4234 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4235 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4236 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4237 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4238 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4239 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4240 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4241 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4242 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4243 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4244 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4245 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4246 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4247 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4248 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4249 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4250 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4251 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4252 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4253 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4254 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4255 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4256 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004257 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4258 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4259 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4260 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4261 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4262 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4263 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4264 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4265 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4266 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4267 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4268 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4269 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4270 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4271 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4272 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4273 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4274 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4275 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4276 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4277 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4278 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4279 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4280 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4281 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4282 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4283 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4284 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4285 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4286 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4287 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4288 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4289 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4290 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4291 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4292 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4293 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4294 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4295 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4296 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4297 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4298 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4299 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4300 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4301 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4302 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4303 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4304 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004305 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4306 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4307 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4308 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4309 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4310 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4311 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4312 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004313 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4314 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4315 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4316 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4317 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4318 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004319 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4320 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4321 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4322 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4323 "src/math/exp-avx512f-rr2-p5-scalef.c",
4324 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004325 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4326 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004327 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004328 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004329 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004330 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004331 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004332 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004333 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004334 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004335 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004336 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4337 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4338 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4339 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4340 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4341 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4342 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4343 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4344 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4345 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004346 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004347 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004348 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4349 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4350 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4351 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004352 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004353 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004354 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004355]
4356
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004357AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004358 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4359 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4360 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4361 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004362 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4363 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4364 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4365 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4366 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4367 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4368 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4369 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004370 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004371 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004372 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004373 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004374 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004375 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004376 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004377 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004378 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004379 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004380 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004381 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004382 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004383 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004384 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004385 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004386 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004387 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004388 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004389 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004390 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004391 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004392 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004393 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhancfd606b2021-07-09 01:18:45 -07004394 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4395 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4396 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4397 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004398 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4399 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4400 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4401 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4402 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4403 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4404 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4405 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004406]
4407
Frank Barchardbcedc082020-08-17 18:00:51 -07004408WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004409 "src/f32-vrelu/wasm_shr_x1.S",
4410 "src/f32-vrelu/wasm_shr_x2.S",
4411 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004412]
4413
Marat Dukhan08c4a432019-10-03 09:29:21 -07004414AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004415 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004416 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004417 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4418 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004419 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004420 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004421 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004422 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004423 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4424 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004425 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4426 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4427 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4428 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004429]
4430
4431AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004432 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004433 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004434 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004435 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004436 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004437 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004438 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004439 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
4440 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004441 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
4442 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
4443 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
4444 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
4445 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004446 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004447 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004448 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
4449 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004450 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
4451 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004452 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004453 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004454 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004455 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004456 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004457 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4458 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004459 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004460 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004461 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004462 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004463 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004464 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004465 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004466 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4467 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004468 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004469 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004470 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004471 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004472 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004473 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004474 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
4475 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004476 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004477 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
4478 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4479 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004480 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4481 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
4482 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004483 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004484 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004485 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004486 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004487 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4488 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004489 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4490 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
4491 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
4492 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004493 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004494 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004495 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004496 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4497 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004498 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4499 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4500 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4501 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004502 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004503 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004504 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004505 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004506 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004507 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4508 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4509 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4510 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004511 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004512 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004513 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004514 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4515 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4516 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4517 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004518 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4519 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004520 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4521 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4522 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4523 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4524 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004525 "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004526 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4527 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4528 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4529 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4530 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4531 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004532 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4533 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4534 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4535 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4536 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4537 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4538 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4539 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004540 "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004541 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4542 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4543 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4544 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4545 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004546 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4547 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4548 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4549 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004550 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4551 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4552 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4553 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004554 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4555 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004556 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4557 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004558 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4559 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4560 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4561 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4562 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004563 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4564 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4565 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4566 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004567 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004568 "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004569 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004570 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4571 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004572 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4573 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004574 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4575 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4576 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4577 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004578 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4579 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4580 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004581 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004582 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4583 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4584 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4585 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004586 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4587 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4588 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4589 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004590 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4591 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4592 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4593 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004594 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4595 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4596 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4597 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004598 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004599 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004600 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4601 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004602 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4603 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004604 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4605 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4606 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004607 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4608 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004609 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004610]
4611
Marat Dukhan1b354632020-03-23 12:50:22 -07004612INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004613 "src/xnnpack/argmaxpool.h",
4614 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004615 "src/xnnpack/common.h",
4616 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004617 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004618 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004619 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004620 "src/xnnpack/gavgpool.h",
4621 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004622 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004623 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004624 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004625 "src/xnnpack/lut.h",
4626 "src/xnnpack/math.h",
4627 "src/xnnpack/maxpool.h",
4628 "src/xnnpack/packx.h",
4629 "src/xnnpack/pad.h",
4630 "src/xnnpack/params.h",
4631 "src/xnnpack/pavgpool.h",
4632 "src/xnnpack/ppmm.h",
4633 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004634 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004635 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004636 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004637 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004638 "src/xnnpack/spmm.h",
4639 "src/xnnpack/unpool.h",
4640 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004641 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004642 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004643 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004644 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004645 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004646 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004647 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004648]
4649
4650INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004651 "include/xnnpack.h",
4652 "src/xnnpack/allocator.h",
4653 "src/xnnpack/compute.h",
4654 "src/xnnpack/im2col.h",
4655 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004656 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004657 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004658 "src/xnnpack/operator.h",
4659 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004660 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004661 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004662 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004663 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004664]
4665
Marat Dukhan1b354632020-03-23 12:50:22 -07004666ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004667 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004668]
4669
Marat Dukhan1b354632020-03-23 12:50:22 -07004670MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004671 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004672 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004673]
4674
Marat Dukhan1b354632020-03-23 12:50:22 -07004675MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004676 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004677 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004678 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004679 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004680]
4681
4682OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004683 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004684 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004685]
4686
4687WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004688 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004689 "src/xnnpack/operator.h",
4690 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004691]
4692
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004693LOGGING_COPTS = select({
4694 # No logging in optimized mode
4695 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4696 # Full logging in debug mode
4697 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4698 # Error-only logging in default (fastbuild) mode
4699 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4700})
4701
Marat Dukhan3b59de22020-06-03 20:15:19 -07004702LOGGING_SRCS = select({
4703 # No logging in optimized mode
4704 ":optimized_build": [],
4705 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004706 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004707 "src/operator-strings.c",
4708 "src/subgraph-strings.c",
4709 ],
4710})
4711
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004712LOGGING_HDRS = [
4713 "src/xnnpack/log.h",
4714]
4715
Marat Dukhan08c4a432019-10-03 09:29:21 -07004716xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004717 name = "tables",
4718 srcs = TABLE_SRCS,
4719 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004720 gcc_copts = xnnpack_gcc_std_copts(),
4721 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004722)
4723
4724xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004725 name = "scalar_ukernels",
4726 srcs = SCALAR_UKERNELS,
4727 hdrs = INTERNAL_HDRS,
4728 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004729 gcc_copts = xnnpack_gcc_std_copts(),
4730 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004731 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004732 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004733 "@FP16",
4734 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004735 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004736 ],
4737)
4738
4739xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004740 name = "scalar_ukernels_test_mode",
4741 srcs = SCALAR_UKERNELS,
4742 hdrs = INTERNAL_HDRS,
4743 aarch32_copts = ["-marm"],
4744 copts = [
4745 "-UNDEBUG",
4746 "-DXNN_TEST_MODE=1",
4747 ],
4748 gcc_copts = xnnpack_gcc_std_copts(),
4749 msvc_copts = xnnpack_msvc_std_copts(),
4750 deps = [
4751 ":tables",
4752 "@FP16",
4753 "@FXdiv",
4754 "@pthreadpool",
4755 ],
4756)
4757
4758xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004759 name = "wasm_ukernels",
4760 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004761 gcc_copts = xnnpack_gcc_std_copts(),
4762 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004763 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004764 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004765 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004766 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004767 "@FP16",
4768 "@FXdiv",
4769 "@pthreadpool",
4770 ],
4771)
4772
4773xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004774 name = "wasm_ukernels_test_mode",
4775 hdrs = INTERNAL_HDRS,
4776 copts = [
4777 "-UNDEBUG",
4778 "-DXNN_TEST_MODE=1",
4779 ],
4780 gcc_copts = xnnpack_gcc_std_copts(),
4781 msvc_copts = xnnpack_msvc_std_copts(),
4782 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004783 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004784 deps = [
4785 ":tables",
4786 "@FP16",
4787 "@FXdiv",
4788 "@pthreadpool",
4789 ],
4790)
4791
4792xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004793 name = "neon_ukernels",
4794 hdrs = INTERNAL_HDRS,
4795 aarch32_copts = [
4796 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004797 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004798 "-mfpu=neon",
4799 ],
4800 aarch32_srcs = NEON_UKERNELS,
4801 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004802 gcc_copts = xnnpack_gcc_std_copts(),
4803 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004804 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004805 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004806 "@FP16",
4807 "@pthreadpool",
4808 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004809)
4810
4811xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004812 name = "neon_ukernels_test_mode",
4813 hdrs = INTERNAL_HDRS,
4814 aarch32_copts = [
4815 "-marm",
4816 "-march=armv7-a",
4817 "-mfpu=neon",
4818 ],
4819 aarch32_srcs = NEON_UKERNELS,
4820 aarch64_srcs = NEON_UKERNELS,
4821 copts = [
4822 "-UNDEBUG",
4823 "-DXNN_TEST_MODE=1",
4824 ],
4825 gcc_copts = xnnpack_gcc_std_copts(),
4826 msvc_copts = xnnpack_msvc_std_copts(),
4827 deps = [
4828 ":tables",
4829 "@FP16",
4830 "@pthreadpool",
4831 ],
4832)
4833
4834xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004835 name = "neonfma_ukernels",
4836 hdrs = INTERNAL_HDRS,
4837 aarch32_copts = [
4838 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004839 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004840 "-mfpu=neon-vfpv4",
4841 ],
4842 aarch32_srcs = NEONFMA_UKERNELS,
4843 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004844 apple_aarch32_copts = [
4845 "-mcpu=swift",
4846 "-mtune=generic",
4847 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004848 gcc_copts = xnnpack_gcc_std_copts(),
4849 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004850 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004851 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004852 "@FP16",
4853 "@pthreadpool",
4854 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004855)
4856
4857xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004858 name = "neonfma_ukernels_test_mode",
4859 hdrs = INTERNAL_HDRS,
4860 aarch32_copts = [
4861 "-marm",
4862 "-march=armv7-a",
4863 "-mfpu=neon-vfpv4",
4864 ],
4865 aarch32_srcs = NEONFMA_UKERNELS,
4866 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004867 apple_aarch32_copts = [
4868 "-mcpu=swift",
4869 "-mtune=generic",
4870 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004871 copts = [
4872 "-UNDEBUG",
4873 "-DXNN_TEST_MODE=1",
4874 ],
4875 gcc_copts = xnnpack_gcc_std_copts(),
4876 msvc_copts = xnnpack_msvc_std_copts(),
4877 deps = [
4878 ":tables",
4879 "@FP16",
4880 "@pthreadpool",
4881 ],
4882)
4883
4884xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004885 name = "neonv8_ukernels",
4886 hdrs = INTERNAL_HDRS,
4887 aarch32_copts = [
4888 "-marm",
4889 "-march=armv8-a",
4890 "-mfpu=neon-fp-armv8",
4891 ],
4892 aarch32_srcs = NEONV8_UKERNELS,
4893 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004894 apple_aarch32_copts = [
4895 "-mcpu=cyclone",
4896 "-mtune=generic",
4897 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004898 gcc_copts = xnnpack_gcc_std_copts(),
4899 msvc_copts = xnnpack_msvc_std_copts(),
4900 deps = [
4901 ":tables",
4902 "@FP16",
4903 "@pthreadpool",
4904 ],
4905)
4906
4907xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004908 name = "neonv8_ukernels_test_mode",
4909 hdrs = INTERNAL_HDRS,
4910 aarch32_copts = [
4911 "-marm",
4912 "-march=armv8-a",
4913 "-mfpu=neon-fp-armv8",
4914 ],
4915 aarch32_srcs = NEONV8_UKERNELS,
4916 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004917 apple_aarch32_copts = [
4918 "-mcpu=cyclone",
4919 "-mtune=generic",
4920 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004921 copts = [
4922 "-UNDEBUG",
4923 "-DXNN_TEST_MODE=1",
4924 ],
4925 gcc_copts = xnnpack_gcc_std_copts(),
4926 msvc_copts = xnnpack_msvc_std_copts(),
4927 deps = [
4928 ":tables",
4929 "@FP16",
4930 "@pthreadpool",
4931 ],
4932)
4933
4934xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004935 name = "neonfp16arith_ukernels",
4936 hdrs = INTERNAL_HDRS,
4937 aarch64_copts = ["-march=armv8.2-a+fp16"],
4938 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004939 gcc_copts = xnnpack_gcc_std_copts(),
4940 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004941 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004942 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004943 "@FP16",
4944 "@pthreadpool",
4945 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004946)
4947
4948xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004949 name = "neonfp16arith_ukernels_test_mode",
4950 hdrs = INTERNAL_HDRS,
4951 aarch64_copts = ["-march=armv8.2-a+fp16"],
4952 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4953 copts = [
4954 "-UNDEBUG",
4955 "-DXNN_TEST_MODE=1",
4956 ],
4957 gcc_copts = xnnpack_gcc_std_copts(),
4958 msvc_copts = xnnpack_msvc_std_copts(),
4959 deps = [
4960 ":tables",
4961 "@FP16",
4962 "@pthreadpool",
4963 ],
4964)
4965
4966xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004967 name = "neondot_ukernels",
4968 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004969 aarch32_copts = [
4970 "-marm",
4971 "-march=armv8.2-a+dotprod",
4972 "-mfpu=neon-fp-armv8",
4973 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004974 aarch32_srcs = NEONDOT_UKERNELS,
4975 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4976 aarch64_srcs = NEONDOT_UKERNELS,
4977 gcc_copts = xnnpack_gcc_std_copts(),
4978 msvc_copts = xnnpack_msvc_std_copts(),
4979 deps = [
4980 ":tables",
4981 "@FP16",
4982 "@pthreadpool",
4983 ],
4984)
4985
4986xnnpack_cc_library(
4987 name = "neondot_ukernels_test_mode",
4988 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004989 aarch32_copts = [
4990 "-marm",
4991 "-march=armv8.2-a+dotprod",
4992 "-mfpu=neon-fp-armv8",
4993 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004994 aarch32_srcs = NEONDOT_UKERNELS,
4995 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4996 aarch64_srcs = NEONDOT_UKERNELS,
4997 copts = [
4998 "-UNDEBUG",
4999 "-DXNN_TEST_MODE=1",
5000 ],
5001 gcc_copts = xnnpack_gcc_std_copts(),
5002 msvc_copts = xnnpack_msvc_std_copts(),
5003 deps = [
5004 ":tables",
5005 "@FP16",
5006 "@pthreadpool",
5007 ],
5008)
5009
5010xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005011 name = "sse2_ukernels",
5012 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005013 gcc_copts = xnnpack_gcc_std_copts(),
5014 gcc_x86_copts = ["-msse2"],
5015 msvc_copts = xnnpack_msvc_std_copts(),
5016 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005017 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005018 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005019 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005020 "@FP16",
5021 "@pthreadpool",
5022 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005023)
5024
5025xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005026 name = "sse2_ukernels_test_mode",
5027 hdrs = INTERNAL_HDRS,
5028 copts = [
5029 "-UNDEBUG",
5030 "-DXNN_TEST_MODE=1",
5031 ],
5032 gcc_copts = xnnpack_gcc_std_copts(),
5033 gcc_x86_copts = ["-msse2"],
5034 msvc_copts = xnnpack_msvc_std_copts(),
5035 msvc_x86_32_copts = ["/arch:SSE2"],
5036 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
5037 deps = [
5038 ":tables",
5039 "@FP16",
5040 "@pthreadpool",
5041 ],
5042)
5043
5044xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005045 name = "ssse3_ukernels",
5046 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005047 gcc_copts = xnnpack_gcc_std_copts(),
5048 gcc_x86_copts = ["-mssse3"],
5049 msvc_copts = xnnpack_msvc_std_copts(),
5050 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005051 x86_srcs = SSSE3_UKERNELS,
5052 deps = [
5053 ":tables",
5054 "@FP16",
5055 "@pthreadpool",
5056 ],
5057)
5058
5059xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005060 name = "ssse3_ukernels_test_mode",
5061 hdrs = INTERNAL_HDRS,
5062 copts = [
5063 "-UNDEBUG",
5064 "-DXNN_TEST_MODE=1",
5065 ],
5066 gcc_copts = xnnpack_gcc_std_copts(),
5067 gcc_x86_copts = ["-mssse3"],
5068 msvc_copts = xnnpack_msvc_std_copts(),
5069 msvc_x86_32_copts = ["/arch:SSE2"],
5070 x86_srcs = SSSE3_UKERNELS,
5071 deps = [
5072 ":tables",
5073 "@FP16",
5074 "@pthreadpool",
5075 ],
5076)
5077
5078xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005079 name = "sse41_ukernels",
5080 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005081 gcc_copts = xnnpack_gcc_std_copts(),
5082 gcc_x86_copts = ["-msse4.1"],
5083 msvc_copts = xnnpack_msvc_std_copts(),
5084 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005085 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005086 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005087 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005088 "@FP16",
5089 "@pthreadpool",
5090 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005091)
5092
5093xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005094 name = "sse41_ukernels_test_mode",
5095 hdrs = INTERNAL_HDRS,
5096 copts = [
5097 "-UNDEBUG",
5098 "-DXNN_TEST_MODE=1",
5099 ],
5100 gcc_copts = xnnpack_gcc_std_copts(),
5101 gcc_x86_copts = ["-msse4.1"],
5102 msvc_copts = xnnpack_msvc_std_copts(),
5103 msvc_x86_32_copts = ["/arch:SSE2"],
5104 x86_srcs = SSE41_UKERNELS,
5105 deps = [
5106 ":tables",
5107 "@FP16",
5108 "@pthreadpool",
5109 ],
5110)
5111
5112xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005113 name = "avx_ukernels",
5114 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005115 gcc_copts = xnnpack_gcc_std_copts(),
5116 gcc_x86_copts = ["-mavx"],
5117 msvc_copts = xnnpack_msvc_std_copts(),
5118 msvc_x86_32_copts = ["/arch:AVX"],
5119 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005120 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005121 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005122 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005123 "@FP16",
5124 "@pthreadpool",
5125 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005126)
5127
5128xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005129 name = "avx_ukernels_test_mode",
5130 hdrs = INTERNAL_HDRS,
5131 copts = [
5132 "-UNDEBUG",
5133 "-DXNN_TEST_MODE=1",
5134 ],
5135 gcc_copts = xnnpack_gcc_std_copts(),
5136 gcc_x86_copts = ["-mavx"],
5137 msvc_copts = xnnpack_msvc_std_copts(),
5138 msvc_x86_32_copts = ["/arch:AVX"],
5139 msvc_x86_64_copts = ["/arch:AVX"],
5140 x86_srcs = AVX_UKERNELS,
5141 deps = [
5142 ":tables",
5143 "@FP16",
5144 "@pthreadpool",
5145 ],
5146)
5147
5148xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005149 name = "xop_ukernels",
5150 hdrs = INTERNAL_HDRS,
5151 gcc_copts = xnnpack_gcc_std_copts(),
5152 gcc_x86_copts = ["-mxop"],
5153 msvc_copts = xnnpack_msvc_std_copts(),
5154 msvc_x86_32_copts = ["/arch:AVX"],
5155 msvc_x86_64_copts = ["/arch:AVX"],
5156 x86_srcs = XOP_UKERNELS,
5157 deps = [
5158 ":tables",
5159 "@FP16",
5160 "@pthreadpool",
5161 ],
5162)
5163
5164xnnpack_cc_library(
5165 name = "xop_ukernels_test_mode",
5166 hdrs = INTERNAL_HDRS,
5167 copts = [
5168 "-UNDEBUG",
5169 "-DXNN_TEST_MODE=1",
5170 ],
5171 gcc_copts = xnnpack_gcc_std_copts(),
5172 gcc_x86_copts = ["-mxop"],
5173 msvc_copts = xnnpack_msvc_std_copts(),
5174 msvc_x86_32_copts = ["/arch:AVX"],
5175 msvc_x86_64_copts = ["/arch:AVX"],
5176 x86_srcs = XOP_UKERNELS,
5177 deps = [
5178 ":tables",
5179 "@FP16",
5180 "@pthreadpool",
5181 ],
5182)
5183
5184xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005185 name = "fma3_ukernels",
5186 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005187 gcc_copts = xnnpack_gcc_std_copts(),
5188 gcc_x86_copts = ["-mfma"],
5189 msvc_copts = xnnpack_msvc_std_copts(),
5190 msvc_x86_32_copts = ["/arch:AVX"],
5191 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005192 x86_srcs = FMA3_UKERNELS,
5193 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005194 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005195 "@FP16",
5196 "@pthreadpool",
5197 ],
5198)
5199
5200xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005201 name = "fma3_ukernels_test_mode",
5202 hdrs = INTERNAL_HDRS,
5203 copts = [
5204 "-UNDEBUG",
5205 "-DXNN_TEST_MODE=1",
5206 ],
5207 gcc_copts = xnnpack_gcc_std_copts(),
5208 gcc_x86_copts = ["-mfma"],
5209 msvc_copts = xnnpack_msvc_std_copts(),
5210 msvc_x86_32_copts = ["/arch:AVX"],
5211 msvc_x86_64_copts = ["/arch:AVX"],
5212 x86_srcs = FMA3_UKERNELS,
5213 deps = [
5214 ":tables",
5215 "@FP16",
5216 "@pthreadpool",
5217 ],
5218)
5219
5220xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005221 name = "avx2_ukernels",
5222 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005223 gcc_copts = xnnpack_gcc_std_copts(),
5224 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005225 "-mfma",
5226 "-mavx2",
5227 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005228 msvc_copts = xnnpack_msvc_std_copts(),
5229 msvc_x86_32_copts = ["/arch:AVX2"],
5230 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005231 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005232 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005233 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005234 "@FP16",
5235 "@pthreadpool",
5236 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005237)
5238
5239xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005240 name = "avx2_ukernels_test_mode",
5241 hdrs = INTERNAL_HDRS,
5242 copts = [
5243 "-UNDEBUG",
5244 "-DXNN_TEST_MODE=1",
5245 ],
5246 gcc_copts = xnnpack_gcc_std_copts(),
5247 gcc_x86_copts = [
5248 "-mfma",
5249 "-mavx2",
5250 ],
5251 msvc_copts = xnnpack_msvc_std_copts(),
5252 msvc_x86_32_copts = ["/arch:AVX2"],
5253 msvc_x86_64_copts = ["/arch:AVX2"],
5254 x86_srcs = AVX2_UKERNELS,
5255 deps = [
5256 ":tables",
5257 "@FP16",
5258 "@pthreadpool",
5259 ],
5260)
5261
5262xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005263 name = "avx512f_ukernels",
5264 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005265 gcc_copts = xnnpack_gcc_std_copts(),
5266 gcc_x86_copts = ["-mavx512f"],
5267 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5268 msvc_copts = xnnpack_msvc_std_copts(),
5269 msvc_x86_32_copts = ["/arch:AVX512"],
5270 msvc_x86_64_copts = ["/arch:AVX512"],
5271 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005272 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005273 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005274 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005275 "@FP16",
5276 "@pthreadpool",
5277 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005278)
5279
5280xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005281 name = "avx512f_ukernels_test_mode",
5282 hdrs = INTERNAL_HDRS,
5283 copts = [
5284 "-UNDEBUG",
5285 "-DXNN_TEST_MODE=1",
5286 ],
5287 gcc_copts = xnnpack_gcc_std_copts(),
5288 gcc_x86_copts = ["-mavx512f"],
5289 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5290 msvc_copts = xnnpack_msvc_std_copts(),
5291 msvc_x86_32_copts = ["/arch:AVX512"],
5292 msvc_x86_64_copts = ["/arch:AVX512"],
5293 msys_copts = ["-fno-asynchronous-unwind-tables"],
5294 x86_srcs = AVX512F_UKERNELS,
5295 deps = [
5296 ":tables",
5297 "@FP16",
5298 "@pthreadpool",
5299 ],
5300)
5301
5302xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005303 name = "avx512skx_ukernels",
5304 hdrs = INTERNAL_HDRS,
5305 gcc_copts = xnnpack_gcc_std_copts(),
5306 gcc_x86_copts = [
5307 "-mavx512f",
5308 "-mavx512cd",
5309 "-mavx512bw",
5310 "-mavx512dq",
5311 "-mavx512vl",
5312 ],
5313 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5314 msvc_copts = xnnpack_msvc_std_copts(),
5315 msvc_x86_32_copts = ["/arch:AVX512"],
5316 msvc_x86_64_copts = ["/arch:AVX512"],
5317 msys_copts = ["-fno-asynchronous-unwind-tables"],
5318 x86_srcs = AVX512SKX_UKERNELS,
5319 deps = [
5320 ":tables",
5321 "@FP16",
5322 "@pthreadpool",
5323 ],
5324)
5325
5326xnnpack_cc_library(
5327 name = "avx512skx_ukernels_test_mode",
5328 hdrs = INTERNAL_HDRS,
5329 copts = [
5330 "-UNDEBUG",
5331 "-DXNN_TEST_MODE=1",
5332 ],
5333 gcc_copts = xnnpack_gcc_std_copts(),
5334 gcc_x86_copts = [
5335 "-mavx512f",
5336 "-mavx512cd",
5337 "-mavx512bw",
5338 "-mavx512dq",
5339 "-mavx512vl",
5340 ],
5341 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5342 msvc_copts = xnnpack_msvc_std_copts(),
5343 msvc_x86_32_copts = ["/arch:AVX512"],
5344 msvc_x86_64_copts = ["/arch:AVX512"],
5345 msys_copts = ["-fno-asynchronous-unwind-tables"],
5346 x86_srcs = AVX512SKX_UKERNELS,
5347 deps = [
5348 ":tables",
5349 "@FP16",
5350 "@pthreadpool",
5351 ],
5352)
5353
5354xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005355 name = "asm_ukernels",
5356 hdrs = ["src/xnnpack/assembly.h"],
5357 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005358 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005359 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005360 wasm_srcs = WASM32_ASM_UKERNELS,
5361 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005362)
5363
Marat Dukhan3b59de22020-06-03 20:15:19 -07005364xnnpack_cc_library(
5365 name = "logging_utils",
5366 srcs = LOGGING_SRCS,
5367 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5368 copts = LOGGING_COPTS + [
5369 "-Isrc",
5370 "-Iinclude",
5371 ] + select({
5372 ":debug_build": [],
5373 "//conditions:default": xnnpack_min_size_copts(),
5374 }),
5375 gcc_copts = xnnpack_gcc_std_copts(),
5376 msvc_copts = xnnpack_msvc_std_copts(),
5377 visibility = xnnpack_visibility(),
5378 deps = [
5379 "@FP16",
5380 "@clog",
5381 "@pthreadpool",
5382 ],
5383)
5384
Marat Dukhan08c4a432019-10-03 09:29:21 -07005385xnnpack_aggregate_library(
5386 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005387 aarch32_ios_deps = [
5388 ":neon_ukernels",
5389 ":neonfma_ukernels",
5390 ":neonv8_ukernels",
5391 ":asm_ukernels",
5392 ],
5393 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005394 ":neon_ukernels",
5395 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005396 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005397 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005398 ":asm_ukernels",
5399 ],
5400 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005401 ":neon_ukernels",
5402 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005403 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005404 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005405 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005406 ":asm_ukernels",
5407 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005408 generic_deps = [
5409 ":scalar_ukernels",
5410 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005411 wasm_deps = [
5412 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005413 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005414 ],
5415 wasmsimd_deps = [
5416 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005417 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005418 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005419 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005420 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005421 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005422 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005423 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005424 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005425 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005426 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005427 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005428 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005429 ],
5430)
5431
Marat Dukhan33fcf782020-05-24 14:27:15 -07005432xnnpack_aggregate_library(
5433 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005434 aarch32_ios_deps = [
5435 ":neon_ukernels_test_mode",
5436 ":neonfma_ukernels_test_mode",
5437 ":neonv8_ukernels_test_mode",
5438 ":asm_ukernels",
5439 ],
5440 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005441 ":neon_ukernels_test_mode",
5442 ":neonfma_ukernels_test_mode",
5443 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005444 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005445 ":asm_ukernels",
5446 ],
5447 aarch64_deps = [
5448 ":neon_ukernels_test_mode",
5449 ":neonfma_ukernels_test_mode",
5450 ":neonv8_ukernels_test_mode",
5451 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005452 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005453 ":asm_ukernels",
5454 ],
5455 generic_deps = [
5456 ":scalar_ukernels_test_mode",
5457 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005458 wasm_deps = [
5459 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005460 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005461 ],
5462 wasmsimd_deps = [
5463 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005464 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005465 ],
5466 x86_deps = [
5467 ":sse2_ukernels_test_mode",
5468 ":ssse3_ukernels_test_mode",
5469 ":sse41_ukernels_test_mode",
5470 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005471 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005472 ":fma3_ukernels_test_mode",
5473 ":avx2_ukernels_test_mode",
5474 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005475 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005476 ],
5477)
5478
Marat Dukhan08c4a432019-10-03 09:29:21 -07005479xnnpack_cc_library(
5480 name = "im2col",
5481 srcs = ["src/im2col.c"],
5482 hdrs = [
5483 "src/xnnpack/common.h",
5484 "src/xnnpack/im2col.h",
5485 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005486 gcc_copts = xnnpack_gcc_std_copts(),
5487 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005488)
5489
5490xnnpack_cc_library(
5491 name = "indirection",
5492 srcs = ["src/indirection.c"],
5493 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005494 gcc_copts = xnnpack_gcc_std_copts(),
5495 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005496 deps = [
5497 "@FP16",
5498 "@FXdiv",
5499 "@pthreadpool",
5500 ],
5501)
5502
5503xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005504 name = "indirection_test_mode",
5505 srcs = ["src/indirection.c"],
5506 hdrs = INTERNAL_HDRS,
5507 copts = [
5508 "-UNDEBUG",
5509 "-DXNN_TEST_MODE=1",
5510 ],
5511 gcc_copts = xnnpack_gcc_std_copts(),
5512 msvc_copts = xnnpack_msvc_std_copts(),
5513 deps = [
5514 "@FP16",
5515 "@FXdiv",
5516 "@pthreadpool",
5517 ],
5518)
5519
5520xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005521 name = "packing",
5522 srcs = ["src/packing.c"],
5523 hdrs = INTERNAL_HDRS,
5524 gcc_copts = xnnpack_gcc_std_copts(),
5525 msvc_copts = xnnpack_msvc_std_copts(),
5526 deps = [
5527 "@FP16",
5528 "@FXdiv",
5529 "@pthreadpool",
5530 ],
5531)
5532
5533xnnpack_cc_library(
5534 name = "packing_test_mode",
5535 srcs = ["src/packing.c"],
5536 hdrs = INTERNAL_HDRS,
5537 copts = [
5538 "-UNDEBUG",
5539 "-DXNN_TEST_MODE=1",
5540 ],
5541 gcc_copts = xnnpack_gcc_std_copts(),
5542 msvc_copts = xnnpack_msvc_std_copts(),
5543 deps = [
5544 "@FP16",
5545 "@FXdiv",
5546 "@pthreadpool",
5547 ],
5548)
5549
5550xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005551 name = "operator_run",
5552 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005553 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005554 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005555 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5556 "//conditions:default": [],
5557 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005558 gcc_copts = xnnpack_gcc_std_copts(),
5559 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005560 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005561 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005562 "@FP16",
5563 "@FXdiv",
5564 "@clog",
5565 "@pthreadpool",
5566 ],
5567)
5568
Chao Mei6ddfc602020-05-13 22:29:36 -07005569xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005570 name = "operator_run_test_mode",
5571 srcs = ["src/operator-run.c"],
5572 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5573 copts = LOGGING_COPTS + [
5574 "-UNDEBUG",
5575 "-DXNN_TEST_MODE=1",
5576 ] + select({
5577 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5578 "//conditions:default": [],
5579 }),
5580 gcc_copts = xnnpack_gcc_std_copts(),
5581 msvc_copts = xnnpack_msvc_std_copts(),
5582 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005583 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005584 "@FP16",
5585 "@FXdiv",
5586 "@clog",
5587 "@pthreadpool",
5588 ],
5589)
5590
5591xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005592 name = "memory_planner",
5593 srcs = ["src/memory-planner.c"],
5594 hdrs = INTERNAL_HDRS,
5595 defines = select({
5596 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5597 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5598 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5599 }),
5600 gcc_copts = xnnpack_gcc_std_copts(),
5601 msvc_copts = xnnpack_msvc_std_copts(),
5602 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005603 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005604 "@pthreadpool",
5605 ],
5606)
5607
Marat Dukhan33fcf782020-05-24 14:27:15 -07005608xnnpack_cc_library(
5609 name = "memory_planner_test_mode",
5610 srcs = ["src/memory-planner.c"],
5611 hdrs = INTERNAL_HDRS,
5612 copts = [
5613 "-UNDEBUG",
5614 "-DXNN_TEST_MODE=1",
5615 ],
5616 defines = select({
5617 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5618 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5619 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5620 }),
5621 gcc_copts = xnnpack_gcc_std_copts(),
5622 msvc_copts = xnnpack_msvc_std_copts(),
5623 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005624 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005625 "@pthreadpool",
5626 ],
5627)
5628
Marat Dukhan08c4a432019-10-03 09:29:21 -07005629cc_library(
5630 name = "enable_assembly",
5631 defines = select({
5632 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5633 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005634 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005635 }),
5636)
5637
Marat Dukhan9de90e02020-06-18 16:04:12 -07005638cc_library(
5639 name = "enable_sparse",
5640 defines = select({
5641 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5642 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005643 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005644 }),
5645)
5646
Marat Dukhancf056b22019-10-07 10:26:29 -07005647xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005648 name = "operators",
5649 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005650 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005651 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005652 ],
5653 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005654 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005655 "-Isrc",
5656 "-Iinclude",
5657 ] + select({
5658 ":debug_build": [],
5659 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005660 }) + select({
5661 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5662 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005663 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005664 gcc_copts = xnnpack_gcc_std_copts(),
5665 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005666 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005667 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005668 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005669 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005670 "@FP16",
5671 "@FXdiv",
5672 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005673 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005674 ],
5675)
5676
Marat Dukhan10a38082020-04-17 03:58:35 -07005677xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005678 name = "operators_test_mode",
5679 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005680 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005681 "src/operator-delete.c",
5682 ],
5683 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5684 copts = LOGGING_COPTS + [
5685 "-Isrc",
5686 "-Iinclude",
5687 "-UNDEBUG",
5688 "-DXNN_TEST_MODE=1",
5689 ] + select({
5690 ":debug_build": [],
5691 "//conditions:default": xnnpack_min_size_copts(),
5692 }) + select({
5693 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5694 "//conditions:default": [],
5695 }),
5696 gcc_copts = xnnpack_gcc_std_copts(),
5697 msvc_copts = xnnpack_msvc_std_copts(),
5698 deps = [
5699 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005700 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005701 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005702 "@FP16",
5703 "@FXdiv",
5704 "@clog",
5705 "@pthreadpool",
5706 ],
5707)
5708
5709xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005710 name = "XNNPACK",
5711 srcs = [
5712 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005713 "src/runtime.c",
5714 "src/subgraph.c",
5715 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005716 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005717 hdrs = ["include/xnnpack.h"],
5718 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005719 "-Isrc",
5720 "-Iinclude",
5721 ] + select({
5722 ":debug_build": [],
5723 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005724 }) + select({
5725 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5726 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005727 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005728 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005729 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005730 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005731 visibility = xnnpack_visibility(),
5732 deps = [
5733 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005734 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005735 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005736 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005737 ":operator_run",
5738 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005739 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005740 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005741 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005742 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005743 ] + select({
5744 ":emscripten": [],
5745 "//conditions:default": ["@cpuinfo"],
5746 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005747)
5748
Marat Dukhan10a38082020-04-17 03:58:35 -07005749xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005750 name = "XNNPACK_test_mode",
5751 srcs = [
5752 "src/init.c",
5753 "src/runtime.c",
5754 "src/subgraph.c",
5755 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005756 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005757 hdrs = ["include/xnnpack.h"],
5758 copts = LOGGING_COPTS + [
5759 "-Isrc",
5760 "-Iinclude",
5761 "-UNDEBUG",
5762 "-DXNN_TEST_MODE=1",
5763 ] + select({
5764 ":debug_build": [],
5765 "//conditions:default": xnnpack_min_size_copts(),
5766 }) + select({
5767 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5768 "//conditions:default": [],
5769 }),
5770 gcc_copts = xnnpack_gcc_std_copts(),
5771 includes = ["include"],
5772 msvc_copts = xnnpack_msvc_std_copts(),
5773 visibility = xnnpack_visibility(),
5774 deps = [
5775 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005776 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005777 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005778 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005779 ":operator_run_test_mode",
5780 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005781 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005782 "@clog",
5783 "@FP16",
5784 "@pthreadpool",
5785 ] + select({
5786 ":emscripten": [],
5787 "//conditions:default": ["@cpuinfo"],
5788 }),
5789)
5790
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005791# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5792# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005793xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005794 name = "xnnpack_for_tflite",
5795 srcs = [
5796 "src/init.c",
5797 "src/runtime.c",
5798 "src/subgraph.c",
5799 "src/tensor.c",
5800 ] + SUBGRAPH_SRCS,
5801 hdrs = ["include/xnnpack.h"],
5802 copts = LOGGING_COPTS + [
5803 "-Isrc",
5804 "-Iinclude",
5805 ] + select({
5806 ":debug_build": [],
5807 "//conditions:default": xnnpack_min_size_copts(),
5808 }) + select({
5809 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5810 "//conditions:default": [],
5811 }),
5812 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005813 "XNN_NO_U8_OPERATORS",
5814 "XNN_NO_X8_OPERATORS",
5815 "XNN_NO_F16_OPERATORS",
5816 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005817 ] + select({
5818 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005819 ":xnn_enable_qs8_explicit_false": [
5820 "XNN_NO_QC8_OPERATORS",
5821 "XNN_NO_QS8_OPERATORS",
5822 ],
5823 "//conditions:default": [
5824 "XNN_NO_QC8_OPERATORS",
5825 "XNN_NO_QS8_OPERATORS",
5826 ],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07005827 }) + select({
5828 ":xnn_enable_qu8_explicit_true": [],
5829 ":xnn_enable_qu8_explicit_false": [
5830 "XNN_NO_QU8_OPERATORS",
5831 ],
5832 "//conditions:default": [
5833 "XNN_NO_QU8_OPERATORS",
5834 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005835 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005836 gcc_copts = xnnpack_gcc_std_copts(),
5837 includes = ["include"],
5838 msvc_copts = xnnpack_msvc_std_copts(),
5839 visibility = xnnpack_visibility(),
5840 deps = [
5841 ":enable_assembly",
5842 ":enable_sparse",
5843 ":logging_utils",
5844 ":memory_planner",
5845 ":operator_run",
5846 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005847 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005848 "@clog",
5849 "@FP16",
5850 "@pthreadpool",
5851 ] + select({
5852 ":emscripten": [],
5853 "//conditions:default": ["@cpuinfo"],
5854 }),
5855)
5856
5857# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5858# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5859xnnpack_cc_library(
5860 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005861 srcs = [
5862 "src/init.c",
5863 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005864 hdrs = ["include/xnnpack.h"],
5865 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005866 "-Isrc",
5867 "-Iinclude",
5868 ] + select({
5869 ":debug_build": [],
5870 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005871 }) + select({
5872 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5873 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005874 }),
5875 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005876 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005877 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005878 "XNN_NO_U8_OPERATORS",
5879 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005880 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005881 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005882 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005883 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005884 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005885 visibility = xnnpack_visibility(),
5886 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005887 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005888 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005889 ":operator_run",
5890 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005891 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005892 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005893 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005894 ] + select({
5895 ":emscripten": [],
5896 "//conditions:default": ["@cpuinfo"],
5897 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005898)
5899
Marat Dukhancf056b22019-10-07 10:26:29 -07005900xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005901 name = "bench_utils",
5902 srcs = ["bench/utils.cc"],
5903 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005904 deps = [
5905 "@com_google_benchmark//:benchmark",
5906 "@cpuinfo",
5907 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005908)
5909
Frank Barchard7e955972019-10-11 10:34:25 -07005910######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005911
5912xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005913 name = "qs8_gemm_bench",
5914 srcs = [
5915 "bench/gemm.h",
5916 "bench/qs8-gemm.cc",
5917 "src/xnnpack/AlignedAllocator.h",
5918 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005919 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5920 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005921)
5922
5923xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005924 name = "qs8_requantization_bench",
5925 srcs = [
5926 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005927 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005928 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005929 ] + MICROKERNEL_BENCHMARK_HDRS,
5930 deps = MICROKERNEL_BENCHMARK_DEPS,
5931)
5932
5933xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005934 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005935 srcs = [
5936 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005937 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005938 "src/xnnpack/AlignedAllocator.h",
5939 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005940 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005941 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005942)
5943
5944xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005945 name = "qu8_requantization_bench",
5946 srcs = [
5947 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005948 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005949 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005950 ] + MICROKERNEL_BENCHMARK_HDRS,
5951 deps = MICROKERNEL_BENCHMARK_DEPS,
5952)
5953
5954xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005955 name = "f16_igemm_bench",
5956 srcs = [
5957 "bench/f16-igemm.cc",
5958 "bench/conv.h",
5959 "bench/google/conv.h",
5960 "src/xnnpack/AlignedAllocator.h",
5961 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005962 deps = MICROKERNEL_BENCHMARK_DEPS + [
5963 ":indirection",
5964 ":packing",
5965 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005966)
5967
5968xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005969 name = "f16_gemm_bench",
5970 srcs = [
5971 "bench/f16-gemm.cc",
5972 "bench/gemm.h",
5973 "src/xnnpack/AlignedAllocator.h",
5974 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005975 deps = MICROKERNEL_BENCHMARK_DEPS + [
5976 ":packing",
5977 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005978)
5979
5980xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005981 name = "f16_spmm_bench",
5982 srcs = [
5983 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005984 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005985 "src/xnnpack/AlignedAllocator.h",
5986 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005987 deps = MICROKERNEL_BENCHMARK_DEPS,
5988)
5989
5990xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005991 name = "f16_vrelu_bench",
5992 srcs = [
5993 "bench/f16-vrelu.cc",
5994 "src/xnnpack/AlignedAllocator.h",
5995 ] + MICROKERNEL_BENCHMARK_HDRS,
5996 deps = MICROKERNEL_BENCHMARK_DEPS,
5997)
5998
5999xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006000 name = "f32_igemm_bench",
6001 srcs = [
6002 "bench/f32-igemm.cc",
6003 "bench/conv.h",
6004 "src/xnnpack/AlignedAllocator.h",
6005 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006006 deps = MICROKERNEL_BENCHMARK_DEPS + [
6007 ":indirection",
6008 ":packing",
6009 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006010)
6011
6012xnnpack_benchmark(
6013 name = "f32_conv_hwc_bench",
6014 srcs = [
6015 "bench/f32-conv-hwc.cc",
6016 "bench/dconv.h",
6017 "src/xnnpack/AlignedAllocator.h",
6018 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006019 deps = MICROKERNEL_BENCHMARK_DEPS + [
6020 ":packing",
6021 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006022)
6023
6024xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006025 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07006026 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006027 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07006028 "bench/dconv.h",
6029 "src/xnnpack/AlignedAllocator.h",
6030 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006031 deps = MICROKERNEL_BENCHMARK_DEPS + [
6032 ":packing",
6033 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07006034)
6035
6036xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07006037 name = "f16_dwconv_bench",
6038 srcs = [
6039 "bench/f16-dwconv.cc",
6040 "bench/dwconv.h",
6041 "bench/google/dwconv.h",
6042 "src/xnnpack/AlignedAllocator.h",
6043 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006044 deps = MICROKERNEL_BENCHMARK_DEPS + [
6045 ":indirection",
6046 ":packing",
6047 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07006048)
6049
6050xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006051 name = "f32_dwconv_bench",
6052 srcs = [
6053 "bench/f32-dwconv.cc",
6054 "bench/dwconv.h",
6055 "src/xnnpack/AlignedAllocator.h",
6056 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006057 deps = MICROKERNEL_BENCHMARK_DEPS + [
6058 ":indirection",
6059 ":packing",
6060 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006061)
6062
6063xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006064 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006065 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006066 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006067 "bench/dwconv.h",
6068 "src/xnnpack/AlignedAllocator.h",
6069 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006070 deps = MICROKERNEL_BENCHMARK_DEPS + [
6071 ":indirection",
6072 ":packing",
6073 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006074)
6075
6076xnnpack_benchmark(
6077 name = "f32_gemm_bench",
6078 srcs = [
6079 "bench/f32-gemm.cc",
6080 "bench/gemm.h",
6081 "src/xnnpack/AlignedAllocator.h",
6082 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006083 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006084 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006085)
6086
6087xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006088 name = "f32_raddexpminusmax_bench",
6089 srcs = [
6090 "bench/f32-raddexpminusmax.cc",
6091 "src/xnnpack/AlignedAllocator.h",
6092 ] + MICROKERNEL_BENCHMARK_HDRS,
6093 deps = MICROKERNEL_BENCHMARK_DEPS,
6094)
6095
6096xnnpack_benchmark(
6097 name = "f32_raddextexp_bench",
6098 srcs = [
6099 "bench/f32-raddextexp.cc",
6100 "src/xnnpack/AlignedAllocator.h",
6101 ] + MICROKERNEL_BENCHMARK_HDRS,
6102 deps = MICROKERNEL_BENCHMARK_DEPS,
6103)
6104
6105xnnpack_benchmark(
6106 name = "f32_raddstoreexpminusmax_bench",
6107 srcs = [
6108 "bench/f32-raddstoreexpminusmax.cc",
6109 "src/xnnpack/AlignedAllocator.h",
6110 ] + MICROKERNEL_BENCHMARK_HDRS,
6111 deps = MICROKERNEL_BENCHMARK_DEPS,
6112)
6113
6114xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006115 name = "f32_rmax_bench",
6116 srcs = [
6117 "bench/f32-rmax.cc",
6118 "src/xnnpack/AlignedAllocator.h",
6119 ] + MICROKERNEL_BENCHMARK_HDRS,
6120 deps = MICROKERNEL_BENCHMARK_DEPS,
6121)
6122
6123xnnpack_benchmark(
6124 name = "f32_spmm_bench",
6125 srcs = [
6126 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006127 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006128 "src/xnnpack/AlignedAllocator.h",
6129 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006130 deps = MICROKERNEL_BENCHMARK_DEPS,
6131)
6132
6133xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006134 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006135 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006136 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006137 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006138 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006139 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006140)
6141
6142xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006143 name = "f32_velu_bench",
6144 srcs = [
6145 "bench/f32-velu.cc",
6146 "src/xnnpack/AlignedAllocator.h",
6147 ] + MICROKERNEL_BENCHMARK_HDRS,
6148 deps = MICROKERNEL_BENCHMARK_DEPS,
6149)
6150
6151xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006152 name = "f32_vhswish_bench",
6153 srcs = [
6154 "bench/f32-vhswish.cc",
6155 "src/xnnpack/AlignedAllocator.h",
6156 ] + MICROKERNEL_BENCHMARK_HDRS,
6157 deps = MICROKERNEL_BENCHMARK_DEPS,
6158)
6159
6160xnnpack_benchmark(
6161 name = "f32_vrelu_bench",
6162 srcs = [
6163 "bench/f32-vrelu.cc",
6164 "src/xnnpack/AlignedAllocator.h",
6165 ] + MICROKERNEL_BENCHMARK_HDRS,
6166 deps = MICROKERNEL_BENCHMARK_DEPS,
6167)
6168
6169xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006170 name = "f32_vscaleexpminusmax_bench",
6171 srcs = [
6172 "bench/f32-vscaleexpminusmax.cc",
6173 "src/xnnpack/AlignedAllocator.h",
6174 ] + MICROKERNEL_BENCHMARK_HDRS,
6175 deps = MICROKERNEL_BENCHMARK_DEPS,
6176)
6177
6178xnnpack_benchmark(
6179 name = "f32_vscaleextexp_bench",
6180 srcs = [
6181 "bench/f32-vscaleextexp.cc",
6182 "src/xnnpack/AlignedAllocator.h",
6183 ] + MICROKERNEL_BENCHMARK_HDRS,
6184 deps = MICROKERNEL_BENCHMARK_DEPS,
6185)
6186
6187xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006188 name = "f32_vsigmoid_bench",
6189 srcs = [
6190 "bench/f32-vsigmoid.cc",
6191 "src/xnnpack/AlignedAllocator.h",
6192 ] + MICROKERNEL_BENCHMARK_HDRS,
6193 deps = MICROKERNEL_BENCHMARK_DEPS,
6194)
6195
6196xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006197 name = "f32_vsqrt_bench",
6198 srcs = [
6199 "bench/f32-vsqrt.cc",
6200 "src/xnnpack/AlignedAllocator.h",
6201 ] + MICROKERNEL_BENCHMARK_HDRS,
6202 deps = MICROKERNEL_BENCHMARK_DEPS,
6203)
6204
6205xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006206 name = "f32_im2col_gemm_bench",
6207 srcs = [
6208 "bench/f32-im2col-gemm.cc",
6209 "bench/conv.h",
6210 "src/xnnpack/AlignedAllocator.h",
6211 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006212 deps = MICROKERNEL_BENCHMARK_DEPS + [
6213 ":im2col",
6214 ":packing",
6215 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006216)
6217
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006218xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006219 name = "rounding_bench",
6220 srcs = [
6221 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006222 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006223 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006224 ] + MICROKERNEL_BENCHMARK_HDRS,
6225 deps = MICROKERNEL_BENCHMARK_DEPS,
6226)
6227
Marat Dukhan08c4a432019-10-03 09:29:21 -07006228########################### Benchmarks for operators ###########################
6229
6230xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006231 name = "average_pooling_bench",
6232 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006233 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006234 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006235 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006236)
6237
6238xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006239 name = "bankers_rounding_bench",
6240 srcs = ["bench/bankers-rounding.cc"],
6241 copts = xnnpack_optional_tflite_copts(),
6242 tags = ["nowin32"],
6243 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6244)
6245
6246xnnpack_benchmark(
6247 name = "ceiling_bench",
6248 srcs = ["bench/ceiling.cc"],
6249 copts = xnnpack_optional_tflite_copts(),
6250 tags = ["nowin32"],
6251 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6252)
6253
6254xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006255 name = "channel_shuffle_bench",
6256 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006257 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006258)
6259
6260xnnpack_benchmark(
6261 name = "convolution_bench",
6262 srcs = ["bench/convolution.cc"],
6263 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006264 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006265 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006266)
6267
6268xnnpack_benchmark(
6269 name = "deconvolution_bench",
6270 srcs = ["bench/deconvolution.cc"],
6271 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006272 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006273 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006274)
6275
6276xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006277 name = "elu_bench",
6278 srcs = ["bench/elu.cc"],
6279 copts = xnnpack_optional_tflite_copts(),
6280 tags = ["nowin32"],
6281 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6282)
6283
6284xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006285 name = "floor_bench",
6286 srcs = ["bench/floor.cc"],
6287 copts = xnnpack_optional_tflite_copts(),
6288 tags = ["nowin32"],
6289 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6290)
6291
6292xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006293 name = "global_average_pooling_bench",
6294 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006295 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006296)
6297
6298xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006299 name = "hardswish_bench",
6300 srcs = ["bench/hardswish.cc"],
6301 copts = xnnpack_optional_tflite_copts(),
6302 tags = ["nowin32"],
6303 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6304)
6305
6306xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006307 name = "max_pooling_bench",
6308 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006309 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006310)
6311
6312xnnpack_benchmark(
6313 name = "sigmoid_bench",
6314 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006315 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006316 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006317 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006318)
6319
6320xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006321 name = "prelu_bench",
6322 srcs = ["bench/prelu.cc"],
6323 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006324 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006325 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006326)
6327
6328xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006329 name = "softmax_bench",
6330 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006331 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006332 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006333 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006334)
6335
Marat Dukhan87727142020-06-24 15:24:10 -07006336xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006337 name = "square_root_bench",
6338 srcs = ["bench/square-root.cc"],
6339 copts = xnnpack_optional_tflite_copts(),
6340 tags = ["nowin32"],
6341 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6342)
6343
6344xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006345 name = "truncation_bench",
6346 srcs = ["bench/truncation.cc"],
6347 deps = OPERATOR_BENCHMARK_DEPS,
6348)
6349
Marat Dukhanc068bb62019-10-04 13:24:39 -07006350############################# End-to-end benchmarks ############################
6351
6352cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006353 name = "fp32_mobilenet_v1",
6354 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006355 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006356 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006357 linkstatic = True,
6358 deps = [
6359 ":XNNPACK",
6360 "@pthreadpool",
6361 ],
6362)
6363
6364cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006365 name = "fp32_sparse_mobilenet_v1",
6366 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6367 hdrs = ["models/models.h"],
6368 copts = xnnpack_std_cxxopts(),
6369 linkstatic = True,
6370 deps = [
6371 ":XNNPACK",
6372 "@pthreadpool",
6373 ],
6374)
6375
6376cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006377 name = "fp16_mobilenet_v1",
6378 srcs = ["models/fp16-mobilenet-v1.cc"],
6379 hdrs = ["models/models.h"],
6380 copts = xnnpack_std_cxxopts(),
6381 linkstatic = True,
6382 deps = [
6383 ":XNNPACK",
6384 "@FP16",
6385 "@pthreadpool",
6386 ],
6387)
6388
6389cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006390 name = "qs8_mobilenet_v1",
6391 srcs = ["models/qs8-mobilenet-v1.cc"],
6392 hdrs = ["models/models.h"],
6393 copts = xnnpack_std_cxxopts(),
6394 linkstatic = True,
6395 deps = [
6396 ":XNNPACK",
6397 "@pthreadpool",
6398 ],
6399)
6400
6401cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006402 name = "qs8_mobilenet_v2",
6403 srcs = ["models/qs8-mobilenet-v2.cc"],
6404 hdrs = ["models/models.h"],
6405 copts = xnnpack_std_cxxopts(),
6406 linkstatic = True,
6407 deps = [
6408 ":XNNPACK",
6409 "@pthreadpool",
6410 ],
6411)
6412
6413cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006414 name = "qu8_mobilenet_v1",
6415 srcs = ["models/qu8-mobilenet-v1.cc"],
6416 hdrs = ["models/models.h"],
6417 copts = xnnpack_std_cxxopts(),
6418 linkstatic = True,
6419 deps = [
6420 ":XNNPACK",
6421 "@pthreadpool",
6422 ],
6423)
6424
6425cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006426 name = "fp32_mobilenet_v2",
6427 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006428 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006429 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006430 linkstatic = True,
6431 deps = [
6432 ":XNNPACK",
6433 "@pthreadpool",
6434 ],
6435)
6436
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006437cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006438 name = "fp32_sparse_mobilenet_v2",
6439 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6440 hdrs = ["models/models.h"],
6441 copts = xnnpack_std_cxxopts(),
6442 linkstatic = True,
6443 deps = [
6444 ":XNNPACK",
6445 "@pthreadpool",
6446 ],
6447)
6448
6449cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006450 name = "fp16_mobilenet_v2",
6451 srcs = ["models/fp16-mobilenet-v2.cc"],
6452 hdrs = ["models/models.h"],
6453 copts = xnnpack_std_cxxopts(),
6454 linkstatic = True,
6455 deps = [
6456 ":XNNPACK",
6457 "@FP16",
6458 "@pthreadpool",
6459 ],
6460)
6461
6462cc_library(
6463 name = "fp32_mobilenet_v3_large",
6464 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006465 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006466 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006467 linkstatic = True,
6468 deps = [
6469 ":XNNPACK",
6470 "@pthreadpool",
6471 ],
6472)
6473
6474cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006475 name = "fp32_sparse_mobilenet_v3_large",
6476 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6477 hdrs = ["models/models.h"],
6478 copts = xnnpack_std_cxxopts(),
6479 linkstatic = True,
6480 deps = [
6481 ":XNNPACK",
6482 "@pthreadpool",
6483 ],
6484)
6485
6486cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006487 name = "fp16_mobilenet_v3_large",
6488 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6489 hdrs = ["models/models.h"],
6490 copts = xnnpack_std_cxxopts(),
6491 linkstatic = True,
6492 deps = [
6493 ":XNNPACK",
6494 "@FP16",
6495 "@pthreadpool",
6496 ],
6497)
6498
6499cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006500 name = "fp32_mobilenet_v3_small",
6501 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006502 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006503 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006504 linkstatic = True,
6505 deps = [
6506 ":XNNPACK",
6507 "@pthreadpool",
6508 ],
6509)
6510
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006511cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006512 name = "fp32_sparse_mobilenet_v3_small",
6513 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6514 hdrs = ["models/models.h"],
6515 copts = xnnpack_std_cxxopts(),
6516 linkstatic = True,
6517 deps = [
6518 ":XNNPACK",
6519 "@pthreadpool",
6520 ],
6521)
6522
6523cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006524 name = "fp16_mobilenet_v3_small",
6525 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6526 hdrs = ["models/models.h"],
6527 copts = xnnpack_std_cxxopts(),
6528 linkstatic = True,
6529 deps = [
6530 ":XNNPACK",
6531 "@FP16",
6532 "@pthreadpool",
6533 ],
6534)
6535
Marat Dukhanc068bb62019-10-04 13:24:39 -07006536xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006537 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006538 srcs = [
6539 "bench/f32-dwconv-e2e.cc",
6540 "bench/end2end.h",
6541 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006542 deps = MICROKERNEL_BENCHMARK_DEPS + [
6543 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006544 ":fp32_mobilenet_v1",
6545 ":fp32_mobilenet_v2",
6546 ":fp32_mobilenet_v3_large",
6547 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006548 ],
6549)
6550
6551xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006552 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006553 srcs = [
6554 "bench/f32-gemm-e2e.cc",
6555 "bench/end2end.h",
6556 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006557 deps = MICROKERNEL_BENCHMARK_DEPS + [
6558 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006559 ":fp32_mobilenet_v1",
6560 ":fp32_mobilenet_v2",
6561 ":fp32_mobilenet_v3_large",
6562 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006563 ],
6564)
6565
6566xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006567 name = "qs8_gemm_e2e_bench",
6568 srcs = [
6569 "bench/qs8-gemm-e2e.cc",
6570 "bench/end2end.h",
6571 ] + MICROKERNEL_BENCHMARK_HDRS,
6572 deps = MICROKERNEL_BENCHMARK_DEPS + [
6573 ":XNNPACK",
6574 ":qs8_mobilenet_v1",
6575 ":qs8_mobilenet_v2",
6576 ],
6577)
6578
6579xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006580 name = "end2end_bench",
6581 srcs = ["bench/end2end.cc"],
6582 deps = [
6583 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006584 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006585 ":fp16_mobilenet_v1",
6586 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006587 ":fp16_mobilenet_v3_large",
6588 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006589 ":fp32_mobilenet_v1",
6590 ":fp32_mobilenet_v2",
6591 ":fp32_mobilenet_v3_large",
6592 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006593 ":fp32_sparse_mobilenet_v1",
6594 ":fp32_sparse_mobilenet_v2",
6595 ":fp32_sparse_mobilenet_v3_large",
6596 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006597 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006598 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006599 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006600 "@pthreadpool",
6601 ],
6602)
6603
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006604#################### Accuracy evaluation for math functions ####################
6605
6606xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006607 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006608 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006609 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006610 "src/xnnpack/AlignedAllocator.h",
6611 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006612 deps = ACCURACY_EVAL_DEPS + [
6613 ":bench_utils",
6614 "@cpuinfo",
6615 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006616)
6617
Marat Dukhan515c9772019-10-17 18:07:57 -07006618xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006619 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006620 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006621 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006622 "src/xnnpack/AlignedAllocator.h",
6623 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006624 deps = ACCURACY_EVAL_DEPS + [
6625 ":bench_utils",
6626 "@cpuinfo",
6627 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006628)
6629
Marat Dukhan98ba4412019-10-23 02:14:28 -07006630xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006631 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006632 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006633 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006634 "src/xnnpack/AlignedAllocator.h",
6635 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006636 deps = ACCURACY_EVAL_DEPS + [
6637 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006638 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006639 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006640)
6641
6642xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006643 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006644 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006645 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006646 "src/xnnpack/AlignedAllocator.h",
6647 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006648 deps = ACCURACY_EVAL_DEPS + [
6649 ":bench_utils",
6650 "@cpuinfo",
6651 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006652)
6653
Marat Dukhanf44f0222020-12-14 11:53:27 -08006654xnnpack_benchmark(
6655 name = "f32_sigmoid_ulp_eval",
6656 srcs = [
6657 "eval/f32-sigmoid-ulp.cc",
6658 "src/xnnpack/AlignedAllocator.h",
6659 ] + ACCURACY_EVAL_HDRS,
6660 deps = ACCURACY_EVAL_DEPS + [
6661 ":bench_utils",
6662 "@cpuinfo",
6663 ],
6664)
6665
6666xnnpack_benchmark(
6667 name = "f32_sqrt_ulp_eval",
6668 srcs = [
6669 "eval/f32-sqrt-ulp.cc",
6670 "src/xnnpack/AlignedAllocator.h",
6671 ] + ACCURACY_EVAL_HDRS,
6672 deps = ACCURACY_EVAL_DEPS + [
6673 ":bench_utils",
6674 "@cpuinfo",
6675 ],
6676)
6677
6678################### Accuracy verification for math functions ##################
6679
6680xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006681 name = "f32_exp_eval",
6682 srcs = [
6683 "eval/f32-exp.cc",
6684 "src/xnnpack/AlignedAllocator.h",
6685 "src/xnnpack/math-stubs.h",
6686 ] + MICROKERNEL_TEST_HDRS,
6687 automatic = False,
6688 deps = MICROKERNEL_TEST_DEPS,
6689)
6690
6691xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006692 name = "f32_expm1minus_eval",
6693 srcs = [
6694 "eval/f32-expm1minus.cc",
6695 "src/xnnpack/AlignedAllocator.h",
6696 "src/xnnpack/math-stubs.h",
6697 ] + MICROKERNEL_TEST_HDRS,
6698 automatic = False,
6699 deps = MICROKERNEL_TEST_DEPS,
6700)
6701
Marat Dukhan8853b822020-05-07 12:19:01 -07006702xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006703 name = "f32_expminus_eval",
6704 srcs = [
6705 "eval/f32-expminus.cc",
6706 "src/xnnpack/AlignedAllocator.h",
6707 "src/xnnpack/math-stubs.h",
6708 ] + MICROKERNEL_TEST_HDRS,
6709 automatic = False,
6710 deps = MICROKERNEL_TEST_DEPS,
6711)
6712
6713xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006714 name = "f32_roundne_eval",
6715 srcs = [
6716 "eval/f32-roundne.cc",
6717 "src/xnnpack/AlignedAllocator.h",
6718 "src/xnnpack/math-stubs.h",
6719 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006720 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006721 deps = MICROKERNEL_TEST_DEPS,
6722)
6723
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006724xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006725 name = "f32_roundd_eval",
6726 srcs = [
6727 "eval/f32-roundd.cc",
6728 "src/xnnpack/AlignedAllocator.h",
6729 "src/xnnpack/math-stubs.h",
6730 ] + MICROKERNEL_TEST_HDRS,
6731 automatic = False,
6732 deps = MICROKERNEL_TEST_DEPS,
6733)
6734
6735xnnpack_unit_test(
6736 name = "f32_roundu_eval",
6737 srcs = [
6738 "eval/f32-roundu.cc",
6739 "src/xnnpack/AlignedAllocator.h",
6740 "src/xnnpack/math-stubs.h",
6741 ] + MICROKERNEL_TEST_HDRS,
6742 automatic = False,
6743 deps = MICROKERNEL_TEST_DEPS,
6744)
6745
6746xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006747 name = "f32_roundz_eval",
6748 srcs = [
6749 "eval/f32-roundz.cc",
6750 "src/xnnpack/AlignedAllocator.h",
6751 "src/xnnpack/math-stubs.h",
6752 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006753 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006754 deps = MICROKERNEL_TEST_DEPS,
6755)
6756
Marat Dukhan08c4a432019-10-03 09:29:21 -07006757######################### Unit tests for micro-kernels #########################
6758
6759xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006760 name = "f16_dwconv_minmax_test",
6761 srcs = [
6762 "test/f16-dwconv-minmax.cc",
6763 "test/dwconv-microkernel-tester.h",
6764 "src/xnnpack/AlignedAllocator.h",
6765 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6766 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6767)
6768
6769xnnpack_unit_test(
6770 name = "f16_gavgpool_minmax_test",
6771 srcs = [
6772 "test/f16-gavgpool-minmax.cc",
6773 "test/gavgpool-microkernel-tester.h",
6774 "src/xnnpack/AlignedAllocator.h",
6775 ] + MICROKERNEL_TEST_HDRS,
6776 deps = MICROKERNEL_TEST_DEPS,
6777)
6778
6779xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006780 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006781 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006782 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006783 "test/gemm-microkernel-tester.h",
6784 "src/xnnpack/AlignedAllocator.h",
6785 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006786 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006787)
6788
6789xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006790 name = "f16_igemm_minmax_test",
6791 srcs = [
6792 "test/f16-igemm-minmax.cc",
6793 "test/gemm-microkernel-tester.h",
6794 "src/xnnpack/AlignedAllocator.h",
6795 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6796 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6797)
6798
6799xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006800 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006801 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006802 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006803 "test/spmm-microkernel-tester.h",
6804 "src/xnnpack/AlignedAllocator.h",
6805 ] + MICROKERNEL_TEST_HDRS,
6806 deps = MICROKERNEL_TEST_DEPS,
6807)
6808
6809xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006810 name = "f16_vadd_minmax_test",
6811 srcs = [
6812 "test/f16-vadd-minmax.cc",
6813 "test/vbinary-microkernel-tester.h",
6814 ] + MICROKERNEL_TEST_HDRS,
6815 deps = MICROKERNEL_TEST_DEPS,
6816)
6817
6818xnnpack_unit_test(
6819 name = "f16_vaddc_minmax_test",
6820 srcs = [
6821 "test/f16-vaddc-minmax.cc",
6822 "test/vbinaryc-microkernel-tester.h",
6823 ] + MICROKERNEL_TEST_HDRS,
6824 deps = MICROKERNEL_TEST_DEPS,
6825)
6826
6827xnnpack_unit_test(
6828 name = "f16_vclamp_test",
6829 srcs = [
6830 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006831 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006832 ] + MICROKERNEL_TEST_HDRS,
6833 deps = MICROKERNEL_TEST_DEPS,
6834)
6835
6836xnnpack_unit_test(
6837 name = "f16_vdiv_minmax_test",
6838 srcs = [
6839 "test/f16-vdiv-minmax.cc",
6840 "test/vbinary-microkernel-tester.h",
6841 ] + MICROKERNEL_TEST_HDRS,
6842 deps = MICROKERNEL_TEST_DEPS,
6843)
6844
6845xnnpack_unit_test(
6846 name = "f16_vdivc_minmax_test",
6847 srcs = [
6848 "test/f16-vdivc-minmax.cc",
6849 "test/vbinaryc-microkernel-tester.h",
6850 ] + MICROKERNEL_TEST_HDRS,
6851 deps = MICROKERNEL_TEST_DEPS,
6852)
6853
6854xnnpack_unit_test(
6855 name = "f16_vrdivc_minmax_test",
6856 srcs = [
6857 "test/f16-vrdivc-minmax.cc",
6858 "test/vbinaryc-microkernel-tester.h",
6859 ] + MICROKERNEL_TEST_HDRS,
6860 deps = MICROKERNEL_TEST_DEPS,
6861)
6862
6863xnnpack_unit_test(
6864 name = "f16_vhswish_test",
6865 srcs = [
6866 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006867 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006868 ] + MICROKERNEL_TEST_HDRS,
6869 deps = MICROKERNEL_TEST_DEPS,
6870)
6871
6872xnnpack_unit_test(
6873 name = "f16_vmax_test",
6874 srcs = [
6875 "test/f16-vmax.cc",
6876 "test/vbinary-microkernel-tester.h",
6877 ] + MICROKERNEL_TEST_HDRS,
6878 deps = MICROKERNEL_TEST_DEPS,
6879)
6880
6881xnnpack_unit_test(
6882 name = "f16_vmaxc_test",
6883 srcs = [
6884 "test/f16-vmaxc.cc",
6885 "test/vbinaryc-microkernel-tester.h",
6886 ] + MICROKERNEL_TEST_HDRS,
6887 deps = MICROKERNEL_TEST_DEPS,
6888)
6889
6890xnnpack_unit_test(
6891 name = "f16_vmin_test",
6892 srcs = [
6893 "test/f16-vmin.cc",
6894 "test/vbinary-microkernel-tester.h",
6895 ] + MICROKERNEL_TEST_HDRS,
6896 deps = MICROKERNEL_TEST_DEPS,
6897)
6898
6899xnnpack_unit_test(
6900 name = "f16_vminc_test",
6901 srcs = [
6902 "test/f16-vminc.cc",
6903 "test/vbinaryc-microkernel-tester.h",
6904 ] + MICROKERNEL_TEST_HDRS,
6905 deps = MICROKERNEL_TEST_DEPS,
6906)
6907
6908xnnpack_unit_test(
6909 name = "f16_vmul_minmax_test",
6910 srcs = [
6911 "test/f16-vmul-minmax.cc",
6912 "test/vbinary-microkernel-tester.h",
6913 ] + MICROKERNEL_TEST_HDRS,
6914 deps = MICROKERNEL_TEST_DEPS,
6915)
6916
6917xnnpack_unit_test(
6918 name = "f16_vmulc_minmax_test",
6919 srcs = [
6920 "test/f16-vmulc-minmax.cc",
6921 "test/vbinaryc-microkernel-tester.h",
6922 ] + MICROKERNEL_TEST_HDRS,
6923 deps = MICROKERNEL_TEST_DEPS,
6924)
6925
6926xnnpack_unit_test(
6927 name = "f16_vmulcaddc_minmax_test",
6928 srcs = [
6929 "test/f16-vmulcaddc-minmax.cc",
6930 "test/vmulcaddc-microkernel-tester.h",
6931 "src/xnnpack/AlignedAllocator.h",
6932 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6933 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6934)
6935
6936xnnpack_unit_test(
6937 name = "f16_vsub_minmax_test",
6938 srcs = [
6939 "test/f16-vsub-minmax.cc",
6940 "test/vbinary-microkernel-tester.h",
6941 ] + MICROKERNEL_TEST_HDRS,
6942 deps = MICROKERNEL_TEST_DEPS,
6943)
6944
6945xnnpack_unit_test(
6946 name = "f16_vsubc_minmax_test",
6947 srcs = [
6948 "test/f16-vsubc-minmax.cc",
6949 "test/vbinaryc-microkernel-tester.h",
6950 ] + MICROKERNEL_TEST_HDRS,
6951 deps = MICROKERNEL_TEST_DEPS,
6952)
6953
6954xnnpack_unit_test(
6955 name = "f16_vrsubc_minmax_test",
6956 srcs = [
6957 "test/f16-vrsubc-minmax.cc",
6958 "test/vbinaryc-microkernel-tester.h",
6959 ] + MICROKERNEL_TEST_HDRS,
6960 deps = MICROKERNEL_TEST_DEPS,
6961)
6962
6963xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006964 name = "f32_argmaxpool_test",
6965 srcs = [
6966 "test/f32-argmaxpool.cc",
6967 "test/argmaxpool-microkernel-tester.h",
6968 "src/xnnpack/AlignedAllocator.h",
6969 ] + MICROKERNEL_TEST_HDRS,
6970 deps = MICROKERNEL_TEST_DEPS,
6971)
6972
6973xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006974 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006975 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006976 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006977 "test/avgpool-microkernel-tester.h",
6978 "src/xnnpack/AlignedAllocator.h",
6979 ] + MICROKERNEL_TEST_HDRS,
6980 deps = MICROKERNEL_TEST_DEPS,
6981)
6982
6983xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006984 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006985 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006986 "test/f32-ibilinear.cc",
6987 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006988 "src/xnnpack/AlignedAllocator.h",
6989 ] + MICROKERNEL_TEST_HDRS,
6990 deps = MICROKERNEL_TEST_DEPS,
6991)
6992
6993xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006994 name = "f32_ibilinear_chw_test",
6995 srcs = [
6996 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006997 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006998 "src/xnnpack/AlignedAllocator.h",
6999 ] + MICROKERNEL_TEST_HDRS,
7000 deps = MICROKERNEL_TEST_DEPS,
7001)
7002
7003xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007004 name = "f32_igemm_test",
7005 srcs = [
7006 "test/f32-igemm.cc",
7007 "test/gemm-microkernel-tester.h",
7008 "src/xnnpack/AlignedAllocator.h",
7009 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007010 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007011)
7012
7013xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007014 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007015 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07007016 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007017 "test/gemm-microkernel-tester.h",
7018 "src/xnnpack/AlignedAllocator.h",
7019 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007020 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007021)
7022
7023xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07007024 name = "f32_igemm_minmax_test",
7025 srcs = [
7026 "test/f32-igemm-minmax.cc",
7027 "test/gemm-microkernel-tester.h",
7028 "src/xnnpack/AlignedAllocator.h",
7029 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007030 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07007031)
7032
7033xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007034 name = "f32_conv_hwc_test",
7035 srcs = [
7036 "test/f32-conv-hwc.cc",
7037 "test/conv-hwc-microkernel-tester.h",
7038 "src/xnnpack/AlignedAllocator.h",
7039 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007040 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007041)
7042
7043xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007044 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007045 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007046 "test/f32-conv-hwc2chw.cc",
7047 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007048 "src/xnnpack/AlignedAllocator.h",
7049 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007050 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007051)
7052
7053xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007054 name = "f32_dwconv_test",
7055 srcs = [
7056 "test/f32-dwconv.cc",
7057 "test/dwconv-microkernel-tester.h",
7058 "src/xnnpack/AlignedAllocator.h",
7059 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007060 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007061)
7062
7063xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007064 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007065 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007066 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007067 "test/dwconv-microkernel-tester.h",
7068 "src/xnnpack/AlignedAllocator.h",
7069 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007070 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007071)
7072
7073xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07007074 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007075 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07007076 "test/f32-dwconv2d-chw.cc",
7077 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007078 "src/xnnpack/AlignedAllocator.h",
7079 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007080 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007081)
7082
7083xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007084 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007085 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007086 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007087 "test/gavgpool-microkernel-tester.h",
7088 "src/xnnpack/AlignedAllocator.h",
7089 ] + MICROKERNEL_TEST_HDRS,
7090 deps = MICROKERNEL_TEST_DEPS,
7091)
7092
7093xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007094 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007095 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007096 "test/f32-gavgpool-cw.cc",
7097 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007098 "src/xnnpack/AlignedAllocator.h",
7099 ] + MICROKERNEL_TEST_HDRS,
7100 deps = MICROKERNEL_TEST_DEPS,
7101)
7102
7103xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007104 name = "f32_gemm_test",
7105 srcs = [
7106 "test/f32-gemm.cc",
7107 "test/gemm-microkernel-tester.h",
7108 "src/xnnpack/AlignedAllocator.h",
7109 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007110 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007111)
7112
7113xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007114 name = "f32_gemm_relu_test",
7115 srcs = [
7116 "test/f32-gemm-relu.cc",
7117 "test/gemm-microkernel-tester.h",
7118 "src/xnnpack/AlignedAllocator.h",
7119 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007120 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007121)
7122
7123xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007124 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007125 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007126 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007127 "test/gemm-microkernel-tester.h",
7128 "src/xnnpack/AlignedAllocator.h",
7129 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007130 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007131)
7132
7133xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007134 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007135 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007136 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007137 "test/gemm-microkernel-tester.h",
7138 "src/xnnpack/AlignedAllocator.h",
7139 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007140 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007141)
7142
7143xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007144 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007145 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007146 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007147 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007148 ] + MICROKERNEL_TEST_HDRS,
7149 deps = MICROKERNEL_TEST_DEPS,
7150)
7151
7152xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007153 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007154 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007155 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007156 "test/maxpool-microkernel-tester.h",
7157 ] + MICROKERNEL_TEST_HDRS,
7158 deps = MICROKERNEL_TEST_DEPS,
7159)
7160
7161xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007162 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007163 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007164 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007165 "test/avgpool-microkernel-tester.h",
7166 "src/xnnpack/AlignedAllocator.h",
7167 ] + MICROKERNEL_TEST_HDRS,
7168 deps = MICROKERNEL_TEST_DEPS,
7169)
7170
7171xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007172 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007173 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007174 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007175 "test/gemm-microkernel-tester.h",
7176 "src/xnnpack/AlignedAllocator.h",
7177 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007178 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007179)
7180
7181xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007182 name = "f16_prelu_test",
7183 srcs = [
7184 "test/f16-prelu.cc",
7185 "test/prelu-microkernel-tester.h",
7186 "src/xnnpack/AlignedAllocator.h",
7187 ] + MICROKERNEL_TEST_HDRS,
7188 deps = MICROKERNEL_TEST_DEPS,
7189)
7190
7191xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007192 name = "f32_prelu_test",
7193 srcs = [
7194 "test/f32-prelu.cc",
7195 "test/prelu-microkernel-tester.h",
7196 "src/xnnpack/AlignedAllocator.h",
7197 ] + MICROKERNEL_TEST_HDRS,
7198 deps = MICROKERNEL_TEST_DEPS,
7199)
7200
7201xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007202 name = "f32_raddexpminusmax_test",
7203 srcs = [
7204 "test/f32-raddexpminusmax.cc",
7205 "test/raddexpminusmax-microkernel-tester.h",
7206 ] + MICROKERNEL_TEST_HDRS,
7207 deps = MICROKERNEL_TEST_DEPS,
7208)
7209
7210xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007211 name = "f32_raddextexp_test",
7212 srcs = [
7213 "test/f32-raddextexp.cc",
7214 "test/raddextexp-microkernel-tester.h",
7215 ] + MICROKERNEL_TEST_HDRS,
7216 deps = MICROKERNEL_TEST_DEPS,
7217)
7218
7219xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007220 name = "f32_raddstoreexpminusmax_test",
7221 srcs = [
7222 "test/f32-raddstoreexpminusmax.cc",
7223 "test/raddstoreexpminusmax-microkernel-tester.h",
7224 ] + MICROKERNEL_TEST_HDRS,
7225 deps = MICROKERNEL_TEST_DEPS,
7226)
7227
7228xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007229 name = "f32_rmax_test",
7230 srcs = [
7231 "test/f32-rmax.cc",
7232 "test/rmax-microkernel-tester.h",
7233 ] + MICROKERNEL_TEST_HDRS,
7234 deps = MICROKERNEL_TEST_DEPS,
7235)
7236
7237xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007238 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007239 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007240 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007241 "test/spmm-microkernel-tester.h",
7242 "src/xnnpack/AlignedAllocator.h",
7243 ] + MICROKERNEL_TEST_HDRS,
7244 deps = MICROKERNEL_TEST_DEPS,
7245)
7246
7247xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007248 name = "f32_vabs_test",
7249 srcs = [
7250 "test/f32-vabs.cc",
7251 "test/vunary-microkernel-tester.h",
7252 ] + MICROKERNEL_TEST_HDRS,
7253 deps = MICROKERNEL_TEST_DEPS,
7254)
7255
7256xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007257 name = "f32_vadd_test",
7258 srcs = [
7259 "test/f32-vadd.cc",
7260 "test/vbinary-microkernel-tester.h",
7261 ] + MICROKERNEL_TEST_HDRS,
7262 deps = MICROKERNEL_TEST_DEPS,
7263)
7264
7265xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007266 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007267 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007268 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007269 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007270 ] + MICROKERNEL_TEST_HDRS,
7271 deps = MICROKERNEL_TEST_DEPS,
7272)
7273
7274xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007275 name = "f32_vadd_relu_test",
7276 srcs = [
7277 "test/f32-vadd-relu.cc",
7278 "test/vbinary-microkernel-tester.h",
7279 ] + MICROKERNEL_TEST_HDRS,
7280 deps = MICROKERNEL_TEST_DEPS,
7281)
7282
7283xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007284 name = "f32_vaddc_test",
7285 srcs = [
7286 "test/f32-vaddc.cc",
7287 "test/vbinaryc-microkernel-tester.h",
7288 ] + MICROKERNEL_TEST_HDRS,
7289 deps = MICROKERNEL_TEST_DEPS,
7290)
7291
7292xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007293 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007294 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007295 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007296 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007297 ] + MICROKERNEL_TEST_HDRS,
7298 deps = MICROKERNEL_TEST_DEPS,
7299)
7300
7301xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007302 name = "f32_vaddc_relu_test",
7303 srcs = [
7304 "test/f32-vaddc-relu.cc",
7305 "test/vbinaryc-microkernel-tester.h",
7306 ] + MICROKERNEL_TEST_HDRS,
7307 deps = MICROKERNEL_TEST_DEPS,
7308)
7309
7310xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007311 name = "f32_vclamp_test",
7312 srcs = [
7313 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007314 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007315 ] + MICROKERNEL_TEST_HDRS,
7316 deps = MICROKERNEL_TEST_DEPS,
7317)
7318
7319xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007320 name = "f32_vdiv_test",
7321 srcs = [
7322 "test/f32-vdiv.cc",
7323 "test/vbinary-microkernel-tester.h",
7324 ] + MICROKERNEL_TEST_HDRS,
7325 deps = MICROKERNEL_TEST_DEPS,
7326)
7327
7328xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007329 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007330 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007331 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007332 "test/vbinary-microkernel-tester.h",
7333 ] + MICROKERNEL_TEST_HDRS,
7334 deps = MICROKERNEL_TEST_DEPS,
7335)
7336
7337xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007338 name = "f32_vdiv_relu_test",
7339 srcs = [
7340 "test/f32-vdiv-relu.cc",
7341 "test/vbinary-microkernel-tester.h",
7342 ] + MICROKERNEL_TEST_HDRS,
7343 deps = MICROKERNEL_TEST_DEPS,
7344)
7345
7346xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007347 name = "f32_vdivc_test",
7348 srcs = [
7349 "test/f32-vdivc.cc",
7350 "test/vbinaryc-microkernel-tester.h",
7351 ] + MICROKERNEL_TEST_HDRS,
7352 deps = MICROKERNEL_TEST_DEPS,
7353)
7354
7355xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007356 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007357 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007358 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007359 "test/vbinaryc-microkernel-tester.h",
7360 ] + MICROKERNEL_TEST_HDRS,
7361 deps = MICROKERNEL_TEST_DEPS,
7362)
7363
7364xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007365 name = "f32_vdivc_relu_test",
7366 srcs = [
7367 "test/f32-vdivc-relu.cc",
7368 "test/vbinaryc-microkernel-tester.h",
7369 ] + MICROKERNEL_TEST_HDRS,
7370 deps = MICROKERNEL_TEST_DEPS,
7371)
7372
7373xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007374 name = "f32_vrdivc_test",
7375 srcs = [
7376 "test/f32-vrdivc.cc",
7377 "test/vbinaryc-microkernel-tester.h",
7378 ] + MICROKERNEL_TEST_HDRS,
7379 deps = MICROKERNEL_TEST_DEPS,
7380)
7381
7382xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007383 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007384 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007385 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007386 "test/vbinaryc-microkernel-tester.h",
7387 ] + MICROKERNEL_TEST_HDRS,
7388 deps = MICROKERNEL_TEST_DEPS,
7389)
7390
7391xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007392 name = "f32_vrdivc_relu_test",
7393 srcs = [
7394 "test/f32-vrdivc-relu.cc",
7395 "test/vbinaryc-microkernel-tester.h",
7396 ] + MICROKERNEL_TEST_HDRS,
7397 deps = MICROKERNEL_TEST_DEPS,
7398)
7399
7400xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007401 name = "f32_velu_test",
7402 srcs = [
7403 "test/f32-velu.cc",
7404 "test/vunary-microkernel-tester.h",
7405 ] + MICROKERNEL_TEST_HDRS,
7406 deps = MICROKERNEL_TEST_DEPS,
7407)
7408
7409xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007410 name = "f32_vmax_test",
7411 srcs = [
7412 "test/f32-vmax.cc",
7413 "test/vbinary-microkernel-tester.h",
7414 ] + MICROKERNEL_TEST_HDRS,
7415 deps = MICROKERNEL_TEST_DEPS,
7416)
7417
7418xnnpack_unit_test(
7419 name = "f32_vmaxc_test",
7420 srcs = [
7421 "test/f32-vmaxc.cc",
7422 "test/vbinaryc-microkernel-tester.h",
7423 ] + MICROKERNEL_TEST_HDRS,
7424 deps = MICROKERNEL_TEST_DEPS,
7425)
7426
7427xnnpack_unit_test(
7428 name = "f32_vmin_test",
7429 srcs = [
7430 "test/f32-vmin.cc",
7431 "test/vbinary-microkernel-tester.h",
7432 ] + MICROKERNEL_TEST_HDRS,
7433 deps = MICROKERNEL_TEST_DEPS,
7434)
7435
7436xnnpack_unit_test(
7437 name = "f32_vminc_test",
7438 srcs = [
7439 "test/f32-vminc.cc",
7440 "test/vbinaryc-microkernel-tester.h",
7441 ] + MICROKERNEL_TEST_HDRS,
7442 deps = MICROKERNEL_TEST_DEPS,
7443)
7444
7445xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007446 name = "f32_vmul_test",
7447 srcs = [
7448 "test/f32-vmul.cc",
7449 "test/vbinary-microkernel-tester.h",
7450 ] + MICROKERNEL_TEST_HDRS,
7451 deps = MICROKERNEL_TEST_DEPS,
7452)
7453
7454xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007455 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007456 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007457 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007458 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007459 ] + MICROKERNEL_TEST_HDRS,
7460 deps = MICROKERNEL_TEST_DEPS,
7461)
7462
7463xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007464 name = "f32_vmul_relu_test",
7465 srcs = [
7466 "test/f32-vmul-relu.cc",
7467 "test/vbinary-microkernel-tester.h",
7468 ] + MICROKERNEL_TEST_HDRS,
7469 deps = MICROKERNEL_TEST_DEPS,
7470)
7471
7472xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007473 name = "f32_vmulc_test",
7474 srcs = [
7475 "test/f32-vmulc.cc",
7476 "test/vbinaryc-microkernel-tester.h",
7477 ] + MICROKERNEL_TEST_HDRS,
7478 deps = MICROKERNEL_TEST_DEPS,
7479)
7480
7481xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007482 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007483 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007484 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007485 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007486 ] + MICROKERNEL_TEST_HDRS,
7487 deps = MICROKERNEL_TEST_DEPS,
7488)
7489
7490xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007491 name = "f32_vmulc_relu_test",
7492 srcs = [
7493 "test/f32-vmulc-relu.cc",
7494 "test/vbinaryc-microkernel-tester.h",
7495 ] + MICROKERNEL_TEST_HDRS,
7496 deps = MICROKERNEL_TEST_DEPS,
7497)
7498
7499xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007500 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007501 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007502 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007503 "test/vmulcaddc-microkernel-tester.h",
7504 "src/xnnpack/AlignedAllocator.h",
7505 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007506 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007507)
7508
7509xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007510 name = "f32_vlrelu_test",
7511 srcs = [
7512 "test/f32-vlrelu.cc",
7513 "test/vunary-microkernel-tester.h",
7514 ] + MICROKERNEL_TEST_HDRS,
7515 deps = MICROKERNEL_TEST_DEPS,
7516)
7517
7518xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007519 name = "f32_vneg_test",
7520 srcs = [
7521 "test/f32-vneg.cc",
7522 "test/vunary-microkernel-tester.h",
7523 ] + MICROKERNEL_TEST_HDRS,
7524 deps = MICROKERNEL_TEST_DEPS,
7525)
7526
7527xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007528 name = "f32_vrelu_test",
7529 srcs = [
7530 "test/f32-vrelu.cc",
7531 "test/vunary-microkernel-tester.h",
7532 ] + MICROKERNEL_TEST_HDRS,
7533 deps = MICROKERNEL_TEST_DEPS,
7534)
7535
7536xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007537 name = "f32_vrndne_test",
7538 srcs = [
7539 "test/f32-vrndne.cc",
7540 "test/vunary-microkernel-tester.h",
7541 ] + MICROKERNEL_TEST_HDRS,
7542 deps = MICROKERNEL_TEST_DEPS,
7543)
7544
7545xnnpack_unit_test(
7546 name = "f32_vrndz_test",
7547 srcs = [
7548 "test/f32-vrndz.cc",
7549 "test/vunary-microkernel-tester.h",
7550 ] + MICROKERNEL_TEST_HDRS,
7551 deps = MICROKERNEL_TEST_DEPS,
7552)
7553
7554xnnpack_unit_test(
7555 name = "f32_vrndu_test",
7556 srcs = [
7557 "test/f32-vrndu.cc",
7558 "test/vunary-microkernel-tester.h",
7559 ] + MICROKERNEL_TEST_HDRS,
7560 deps = MICROKERNEL_TEST_DEPS,
7561)
7562
7563xnnpack_unit_test(
7564 name = "f32_vrndd_test",
7565 srcs = [
7566 "test/f32-vrndd.cc",
7567 "test/vunary-microkernel-tester.h",
7568 ] + MICROKERNEL_TEST_HDRS,
7569 deps = MICROKERNEL_TEST_DEPS,
7570)
7571
7572xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007573 name = "f32_vscale_test",
7574 srcs = [
7575 "test/f32-vscale.cc",
7576 "test/vscale-microkernel-tester.h",
7577 ] + MICROKERNEL_TEST_HDRS,
7578 deps = MICROKERNEL_TEST_DEPS,
7579)
7580
7581xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007582 name = "f32_vscaleexpminusmax_test",
7583 srcs = [
7584 "test/f32-vscaleexpminusmax.cc",
7585 "test/vscaleexpminusmax-microkernel-tester.h",
7586 ] + MICROKERNEL_TEST_HDRS,
7587 deps = MICROKERNEL_TEST_DEPS,
7588)
7589
7590xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007591 name = "f32_vscaleextexp_test",
7592 srcs = [
7593 "test/f32-vscaleextexp.cc",
7594 "test/vscaleextexp-microkernel-tester.h",
7595 ] + MICROKERNEL_TEST_HDRS,
7596 deps = MICROKERNEL_TEST_DEPS,
7597)
7598
7599xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007600 name = "f32_vsigmoid_test",
7601 srcs = [
7602 "test/f32-vsigmoid.cc",
7603 "test/vunary-microkernel-tester.h",
7604 ] + MICROKERNEL_TEST_HDRS,
7605 deps = MICROKERNEL_TEST_DEPS,
7606)
7607
7608xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007609 name = "f32_vsqr_test",
7610 srcs = [
7611 "test/f32-vsqr.cc",
7612 "test/vunary-microkernel-tester.h",
7613 ] + MICROKERNEL_TEST_HDRS,
7614 deps = MICROKERNEL_TEST_DEPS,
7615)
7616
7617xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007618 name = "f32_vsqrdiff_test",
7619 srcs = [
7620 "test/f32-vsqrdiff.cc",
7621 "test/vbinary-microkernel-tester.h",
7622 ] + MICROKERNEL_TEST_HDRS,
7623 deps = MICROKERNEL_TEST_DEPS,
7624)
7625
7626xnnpack_unit_test(
7627 name = "f32_vsqrdiffc_test",
7628 srcs = [
7629 "test/f32-vsqrdiffc.cc",
7630 "test/vbinaryc-microkernel-tester.h",
7631 ] + MICROKERNEL_TEST_HDRS,
7632 deps = MICROKERNEL_TEST_DEPS,
7633)
7634
7635xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007636 name = "f32_vsqrt_test",
7637 srcs = [
7638 "test/f32-vsqrt.cc",
7639 "test/vunary-microkernel-tester.h",
7640 ] + MICROKERNEL_TEST_HDRS,
7641 deps = MICROKERNEL_TEST_DEPS,
7642)
7643
7644xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007645 name = "f32_vsub_test",
7646 srcs = [
7647 "test/f32-vsub.cc",
7648 "test/vbinary-microkernel-tester.h",
7649 ] + MICROKERNEL_TEST_HDRS,
7650 deps = MICROKERNEL_TEST_DEPS,
7651)
7652
7653xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007654 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007655 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007656 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007657 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007658 ] + MICROKERNEL_TEST_HDRS,
7659 deps = MICROKERNEL_TEST_DEPS,
7660)
7661
7662xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007663 name = "f32_vsub_relu_test",
7664 srcs = [
7665 "test/f32-vsub-relu.cc",
7666 "test/vbinary-microkernel-tester.h",
7667 ] + MICROKERNEL_TEST_HDRS,
7668 deps = MICROKERNEL_TEST_DEPS,
7669)
7670
7671xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007672 name = "f32_vsubc_test",
7673 srcs = [
7674 "test/f32-vsubc.cc",
7675 "test/vbinaryc-microkernel-tester.h",
7676 ] + MICROKERNEL_TEST_HDRS,
7677 deps = MICROKERNEL_TEST_DEPS,
7678)
7679
7680xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007681 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007682 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007683 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007684 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007685 ] + MICROKERNEL_TEST_HDRS,
7686 deps = MICROKERNEL_TEST_DEPS,
7687)
7688
7689xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007690 name = "f32_vsubc_relu_test",
7691 srcs = [
7692 "test/f32-vsubc-relu.cc",
7693 "test/vbinaryc-microkernel-tester.h",
7694 ] + MICROKERNEL_TEST_HDRS,
7695 deps = MICROKERNEL_TEST_DEPS,
7696)
7697
7698xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007699 name = "f32_vrsubc_test",
7700 srcs = [
7701 "test/f32-vrsubc.cc",
7702 "test/vbinaryc-microkernel-tester.h",
7703 ] + MICROKERNEL_TEST_HDRS,
7704 deps = MICROKERNEL_TEST_DEPS,
7705)
7706
7707xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007708 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007709 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007710 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007711 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007712 ] + MICROKERNEL_TEST_HDRS,
7713 deps = MICROKERNEL_TEST_DEPS,
7714)
7715
7716xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007717 name = "f32_vrsubc_relu_test",
7718 srcs = [
7719 "test/f32-vrsubc-relu.cc",
7720 "test/vbinaryc-microkernel-tester.h",
7721 ] + MICROKERNEL_TEST_HDRS,
7722 deps = MICROKERNEL_TEST_DEPS,
7723)
7724
7725xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007726 name = "qc8_dwconv_minmax_fp32_test",
7727 timeout = "moderate",
7728 srcs = [
7729 "test/qc8-dwconv-minmax-fp32.cc",
7730 "test/dwconv-microkernel-tester.h",
7731 "src/xnnpack/AlignedAllocator.h",
7732 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7733 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7734)
7735
7736xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007737 name = "qc8_gemm_minmax_fp32_test",
7738 timeout = "moderate",
7739 srcs = [
7740 "test/qc8-gemm-minmax-fp32.cc",
7741 "test/gemm-microkernel-tester.h",
7742 "src/xnnpack/AlignedAllocator.h",
7743 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7744 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7745)
7746
7747xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007748 name = "qc8_igemm_minmax_fp32_test",
7749 timeout = "moderate",
7750 srcs = [
7751 "test/qc8-igemm-minmax-fp32.cc",
7752 "test/gemm-microkernel-tester.h",
7753 "src/xnnpack/AlignedAllocator.h",
7754 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7755 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7756)
7757
7758xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007759 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007760 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007761 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007762 "test/dwconv-microkernel-tester.h",
7763 "src/xnnpack/AlignedAllocator.h",
7764 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7765 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7766)
7767
7768xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007769 name = "qs8_dwconv_minmax_fp32_test",
7770 srcs = [
7771 "test/qs8-dwconv-minmax-fp32.cc",
7772 "test/dwconv-microkernel-tester.h",
7773 "src/xnnpack/AlignedAllocator.h",
7774 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7775 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7776)
7777
7778xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007779 name = "qs8_gavgpool_minmax_test",
7780 srcs = [
7781 "test/qs8-gavgpool-minmax.cc",
7782 "test/gavgpool-microkernel-tester.h",
7783 "src/xnnpack/AlignedAllocator.h",
7784 ] + MICROKERNEL_TEST_HDRS,
7785 deps = MICROKERNEL_TEST_DEPS,
7786)
7787
7788xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007789 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007790 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007791 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007792 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007793 "test/gemm-microkernel-tester.h",
7794 "src/xnnpack/AlignedAllocator.h",
7795 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7796 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7797)
7798
7799xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007800 name = "qs8_gemm_minmax_fp32_test",
7801 timeout = "moderate",
7802 srcs = [
7803 "test/qs8-gemm-minmax-fp32.cc",
7804 "test/gemm-microkernel-tester.h",
7805 "src/xnnpack/AlignedAllocator.h",
7806 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7807 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7808)
7809
7810xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007811 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007812 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007813 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007814 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007815 "test/gemm-microkernel-tester.h",
7816 "src/xnnpack/AlignedAllocator.h",
7817 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7818 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7819)
7820
7821xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007822 name = "qs8_igemm_minmax_fp32_test",
7823 timeout = "moderate",
7824 srcs = [
7825 "test/qs8-igemm-minmax-fp32.cc",
7826 "test/gemm-microkernel-tester.h",
7827 "src/xnnpack/AlignedAllocator.h",
7828 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7829 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7830)
7831
7832xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007833 name = "qs8_requantization_test",
7834 srcs = [
7835 "src/xnnpack/requantization-stubs.h",
7836 "test/qs8-requantization.cc",
7837 "test/requantization-tester.h",
7838 ] + MICROKERNEL_TEST_HDRS,
7839 deps = MICROKERNEL_TEST_DEPS,
7840)
7841
7842xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007843 name = "qs8_vadd_minmax_test",
7844 srcs = [
7845 "test/qs8-vadd-minmax.cc",
7846 "test/vadd-microkernel-tester.h",
7847 ] + MICROKERNEL_TEST_HDRS,
7848 deps = MICROKERNEL_TEST_DEPS,
7849)
7850
7851xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007852 name = "qs8_vaddc_minmax_test",
7853 srcs = [
7854 "test/qs8-vaddc-minmax.cc",
7855 "test/vaddc-microkernel-tester.h",
7856 ] + MICROKERNEL_TEST_HDRS,
7857 deps = MICROKERNEL_TEST_DEPS,
7858)
7859
7860xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007861 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007862 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007863 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007864 "test/avgpool-microkernel-tester.h",
7865 "src/xnnpack/AlignedAllocator.h",
7866 ] + MICROKERNEL_TEST_HDRS,
7867 deps = MICROKERNEL_TEST_DEPS,
7868)
7869
7870xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07007871 name = "qu8_dwconv_minmax_fp32_test",
7872 srcs = [
7873 "test/qu8-dwconv-minmax-fp32.cc",
7874 "test/dwconv-microkernel-tester.h",
7875 "src/xnnpack/AlignedAllocator.h",
7876 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7877 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7878)
7879
7880xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007881 name = "qu8_dwconv_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007882 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007883 "test/qu8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007884 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007885 "src/xnnpack/AlignedAllocator.h",
7886 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007887 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007888)
7889
7890xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007891 name = "qu8_igemm_minmax_fp32_test",
7892 srcs = [
7893 "test/qu8-igemm-minmax-fp32.cc",
7894 "test/gemm-microkernel-tester.h",
7895 "src/xnnpack/AlignedAllocator.h",
7896 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7897 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7898)
7899
7900xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007901 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007902 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007903 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007904 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007905 "src/xnnpack/AlignedAllocator.h",
7906 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007907 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007908)
7909
7910xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007911 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007912 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007913 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007914 "test/gavgpool-microkernel-tester.h",
7915 "src/xnnpack/AlignedAllocator.h",
7916 ] + MICROKERNEL_TEST_HDRS,
7917 deps = MICROKERNEL_TEST_DEPS,
7918)
7919
7920xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007921 name = "qu8_gemm_minmax_fp32_test",
7922 srcs = [
7923 "test/qu8-gemm-minmax-fp32.cc",
7924 "test/gemm-microkernel-tester.h",
7925 "src/xnnpack/AlignedAllocator.h",
7926 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7927 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7928)
7929
7930xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007931 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007932 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007933 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007934 "test/gemm-microkernel-tester.h",
7935 "src/xnnpack/AlignedAllocator.h",
7936 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007937 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007938)
7939
7940xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007941 name = "qu8_requantization_test",
7942 srcs = [
7943 "src/xnnpack/requantization-stubs.h",
7944 "test/qu8-requantization.cc",
7945 "test/requantization-tester.h",
7946 ] + MICROKERNEL_TEST_HDRS,
7947 deps = MICROKERNEL_TEST_DEPS,
7948)
7949
7950xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007951 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007952 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007953 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007954 "test/vadd-microkernel-tester.h",
7955 ] + MICROKERNEL_TEST_HDRS,
7956 deps = MICROKERNEL_TEST_DEPS,
7957)
7958
7959xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007960 name = "u8_lut32norm_test",
7961 srcs = [
7962 "test/u8-lut32norm.cc",
7963 "test/lut-norm-microkernel-tester.h",
7964 ] + MICROKERNEL_TEST_HDRS,
7965 deps = MICROKERNEL_TEST_DEPS,
7966)
7967
7968xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007969 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007970 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007971 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007972 "test/maxpool-microkernel-tester.h",
7973 ] + MICROKERNEL_TEST_HDRS,
7974 deps = MICROKERNEL_TEST_DEPS,
7975)
7976
7977xnnpack_unit_test(
7978 name = "u8_rmax_test",
7979 srcs = [
7980 "test/u8-rmax.cc",
7981 "test/rmax-microkernel-tester.h",
7982 ] + MICROKERNEL_TEST_HDRS,
7983 deps = MICROKERNEL_TEST_DEPS,
7984)
7985
7986xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007987 name = "u8_vclamp_test",
7988 srcs = [
7989 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007990 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007991 ] + MICROKERNEL_TEST_HDRS,
7992 deps = MICROKERNEL_TEST_DEPS,
7993)
7994
7995xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007996 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007997 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007998 "test/x32-depthtospace2d-chw2hwc.cc",
7999 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08008000 ] + MICROKERNEL_TEST_HDRS,
8001 deps = MICROKERNEL_TEST_DEPS,
8002)
8003
8004xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07008005 name = "x32_fill_test",
8006 srcs = [
8007 "test/x32-fill.cc",
8008 "test/fill-microkernel-tester.h",
8009 ] + MICROKERNEL_TEST_HDRS,
8010 deps = MICROKERNEL_TEST_DEPS,
8011)
8012
8013xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008014 name = "x32_packx_test",
8015 srcs = [
8016 "test/x32-packx.cc",
8017 "test/pack-microkernel-tester.h",
8018 "src/xnnpack/AlignedAllocator.h",
8019 ] + MICROKERNEL_TEST_HDRS,
8020 deps = MICROKERNEL_TEST_DEPS,
8021)
8022
8023xnnpack_unit_test(
8024 name = "x32_pad_test",
8025 srcs = [
8026 "test/x32-pad.cc",
8027 "test/pad-microkernel-tester.h",
8028 ] + MICROKERNEL_TEST_HDRS,
8029 deps = MICROKERNEL_TEST_DEPS,
8030)
8031
8032xnnpack_unit_test(
8033 name = "x32_unpool_test",
8034 srcs = [
8035 "test/x32-unpool.cc",
8036 "test/unpool-microkernel-tester.h",
8037 ] + MICROKERNEL_TEST_HDRS,
8038 deps = MICROKERNEL_TEST_DEPS,
8039)
8040
8041xnnpack_unit_test(
8042 name = "x32_zip_test",
8043 srcs = [
8044 "test/x32-zip.cc",
8045 "test/zip-microkernel-tester.h",
8046 ] + MICROKERNEL_TEST_HDRS,
8047 deps = MICROKERNEL_TEST_DEPS,
8048)
8049
8050xnnpack_unit_test(
8051 name = "x8_lut_test",
8052 srcs = [
8053 "test/x8-lut.cc",
8054 "test/lut-microkernel-tester.h",
8055 ] + MICROKERNEL_TEST_HDRS,
8056 deps = MICROKERNEL_TEST_DEPS,
8057)
8058
8059xnnpack_unit_test(
8060 name = "x8_zip_test",
8061 srcs = [
8062 "test/x8-zip.cc",
8063 "test/zip-microkernel-tester.h",
8064 ] + MICROKERNEL_TEST_HDRS,
8065 deps = MICROKERNEL_TEST_DEPS,
8066)
8067
Marat Dukhan20c3b922020-03-10 03:45:06 -07008068########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008069
8070xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07008071 name = "operator_size_test",
8072 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008073 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008074)
8075
Marat Dukhan20c3b922020-03-10 03:45:06 -07008076xnnpack_binary(
8077 name = "subgraph_size_test",
8078 srcs = ["test/subgraph-size.c"],
8079 deps = [":XNNPACK"],
8080)
8081
8082########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008083
8084xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008085 name = "abs_nc_test",
8086 srcs = [
8087 "test/abs-nc.cc",
8088 "test/abs-operator-tester.h",
8089 ],
8090 deps = OPERATOR_TEST_DEPS,
8091)
8092
8093xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008094 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008095 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008096 srcs = [
8097 "test/add-nd.cc",
8098 "test/binary-elementwise-operator-tester.h",
8099 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008100 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008101)
8102
8103xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008104 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008105 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008106 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008107 "test/argmax-pooling-operator-tester.h",
8108 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008109 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008110)
8111
8112xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008113 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008114 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008115 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008116 "test/average-pooling-operator-tester.h",
8117 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008118 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008119)
8120
8121xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008122 name = "bankers_rounding_nc_test",
8123 srcs = [
8124 "test/bankers-rounding-nc.cc",
8125 "test/bankers-rounding-operator-tester.h",
8126 ],
8127 deps = OPERATOR_TEST_DEPS,
8128)
8129
8130xnnpack_unit_test(
8131 name = "ceiling_nc_test",
8132 srcs = [
8133 "test/ceiling-nc.cc",
8134 "test/ceiling-operator-tester.h",
8135 ],
8136 deps = OPERATOR_TEST_DEPS,
8137)
8138
8139xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008140 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008141 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008142 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008143 "test/channel-shuffle-operator-tester.h",
8144 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008145 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008146)
8147
8148xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008149 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008150 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008151 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008152 "test/clamp-operator-tester.h",
8153 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008154 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008155)
8156
8157xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008158 name = "constant_pad_nd_test",
8159 srcs = [
8160 "test/constant-pad-nd.cc",
8161 "test/constant-pad-operator-tester.h",
8162 ],
8163 deps = OPERATOR_TEST_DEPS,
8164)
8165
8166xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008167 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008168 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008169 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008170 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008171 "test/convolution-operator-tester.h",
8172 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008173 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008174)
8175
8176xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008177 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008178 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008179 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008180 "test/convolution-nchw.cc",
8181 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008182 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008183 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008184)
8185
8186xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008187 name = "copy_nc_test",
8188 srcs = [
8189 "test/copy-nc.cc",
8190 "test/copy-operator-tester.h",
8191 ],
8192 deps = OPERATOR_TEST_DEPS,
8193)
8194
8195xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008196 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008197 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008198 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008199 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008200 "test/deconvolution-operator-tester.h",
8201 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008202 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008203)
8204
8205xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008206 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008207 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008208 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008209 "test/depth-to-space-operator-tester.h",
8210 ] + OPERATOR_TEST_PARAMS_HDRS,
8211 deps = OPERATOR_TEST_DEPS,
8212)
8213
8214xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008215 name = "depth_to_space_nhwc_test",
8216 srcs = [
8217 "test/depth-to-space-nhwc.cc",
8218 "test/depth-to-space-operator-tester.h",
8219 ] + OPERATOR_TEST_PARAMS_HDRS,
8220 deps = OPERATOR_TEST_DEPS,
8221)
8222
8223xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008224 name = "divide_nd_test",
8225 srcs = [
8226 "test/binary-elementwise-operator-tester.h",
8227 "test/divide-nd.cc",
8228 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008229 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008230)
8231
8232xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008233 name = "elu_nc_test",
8234 srcs = [
8235 "test/elu-nc.cc",
8236 "test/elu-operator-tester.h",
8237 ],
8238 deps = OPERATOR_TEST_DEPS,
8239)
8240
8241xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008242 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008243 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008244 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008245 "test/fully-connected-operator-tester.h",
8246 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008247 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008248)
8249
8250xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008251 name = "floor_nc_test",
8252 srcs = [
8253 "test/floor-nc.cc",
8254 "test/floor-operator-tester.h",
8255 ],
8256 deps = OPERATOR_TEST_DEPS,
8257)
8258
8259xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008260 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008261 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008262 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008263 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008264 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008265 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008266)
8267
8268xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008269 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008270 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008271 "test/global-average-pooling-ncw.cc",
8272 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008273 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008274 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008275)
8276
8277xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008278 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008279 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008280 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008281 "test/hardswish-operator-tester.h",
8282 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008283 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008284)
8285
8286xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008287 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008288 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008289 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008290 "test/leaky-relu-operator-tester.h",
8291 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008292 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008293)
8294
8295xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008296 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008297 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008298 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008299 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008300 "test/max-pooling-operator-tester.h",
8301 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008302 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008303)
8304
8305xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008306 name = "maximum_nd_test",
8307 srcs = [
8308 "test/binary-elementwise-operator-tester.h",
8309 "test/maximum-nd.cc",
8310 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008311 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008312)
8313
8314xnnpack_unit_test(
8315 name = "minimum_nd_test",
8316 srcs = [
8317 "test/binary-elementwise-operator-tester.h",
8318 "test/minimum-nd.cc",
8319 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008320 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008321)
8322
8323xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008324 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008325 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008326 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008327 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008328 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008329 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008330)
8331
8332xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008333 name = "negate_nc_test",
8334 srcs = [
8335 "test/negate-nc.cc",
8336 "test/negate-operator-tester.h",
8337 ],
8338 deps = OPERATOR_TEST_DEPS,
8339)
8340
8341xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008342 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008343 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008344 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008345 "test/prelu-operator-tester.h",
8346 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008347 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008348)
8349
8350xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008351 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008352 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008353 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008354 "test/resize-bilinear-operator-tester.h",
8355 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008356 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008357)
8358
8359xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008360 name = "resize_bilinear_nchw_test",
8361 srcs = [
8362 "test/resize-bilinear-nchw.cc",
8363 "test/resize-bilinear-operator-tester.h",
8364 ] + OPERATOR_TEST_PARAMS_HDRS,
8365 deps = OPERATOR_TEST_DEPS,
8366)
8367
8368xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008369 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008370 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008371 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008372 "test/sigmoid-operator-tester.h",
8373 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008374 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008375)
8376
8377xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008378 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008379 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008380 "test/softmax-nc.cc",
8381 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008382 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008383 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008384)
8385
8386xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008387 name = "square_nc_test",
8388 srcs = [
8389 "test/square-nc.cc",
8390 "test/square-operator-tester.h",
8391 ],
8392 deps = OPERATOR_TEST_DEPS,
8393)
8394
8395xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008396 name = "square_root_nc_test",
8397 srcs = [
8398 "test/square-root-nc.cc",
8399 "test/square-root-operator-tester.h",
8400 ],
8401 deps = OPERATOR_TEST_DEPS,
8402)
8403
8404xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008405 name = "squared_difference_nd_test",
8406 srcs = [
8407 "test/binary-elementwise-operator-tester.h",
8408 "test/squared-difference-nd.cc",
8409 ],
8410 deps = OPERATOR_TEST_DEPS,
8411)
8412
8413xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008414 name = "subtract_nd_test",
8415 srcs = [
8416 "test/binary-elementwise-operator-tester.h",
8417 "test/subtract-nd.cc",
8418 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008419 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008420)
8421
8422xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008423 name = "truncation_nc_test",
8424 srcs = [
8425 "test/truncation-nc.cc",
8426 "test/truncation-operator-tester.h",
8427 ],
8428 deps = OPERATOR_TEST_DEPS,
8429)
8430
8431xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008432 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008433 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008434 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008435 "test/unpooling-operator-tester.h",
8436 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008437 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008438)
8439
Chao Mei6ddfc602020-05-13 22:29:36 -07008440############################### Misc unit tests ###############################
8441
8442xnnpack_unit_test(
8443 name = "memory_planner_test",
8444 srcs = [
8445 "test/memory-planner-test.cc",
8446 ],
8447 deps = [
8448 ":XNNPACK",
8449 ":memory_planner",
8450 ],
8451)
8452
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008453xnnpack_unit_test(
8454 name = "subgraph_nchw_test",
8455 srcs = [
8456 "src/xnnpack/subgraph.h",
8457 "test/subgraph-nchw.cc",
8458 "test/subgraph-tester.h",
8459 ],
8460 deps = [
8461 ":XNNPACK",
8462 ],
8463)
8464
Marat Dukhan08c4a432019-10-03 09:29:21 -07008465############################# Build configurations #############################
8466
Marat Dukhanb8642352019-10-30 15:43:02 -07008467# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008468config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008469 name = "xnn_enable_assembly_explicit_true",
8470 define_values = {"xnn_enable_assembly": "true"},
8471)
8472
8473# Disables usage of assembly kernels.
8474config_setting(
8475 name = "xnn_enable_assembly_explicit_false",
8476 define_values = {"xnn_enable_assembly": "false"},
8477)
8478
Marat Dukhan9de90e02020-06-18 16:04:12 -07008479# Enables usage of sparse inference.
8480config_setting(
8481 name = "xnn_enable_sparse_explicit_true",
8482 define_values = {"xnn_enable_sparse": "true"},
8483)
8484
8485# Disables usage of sparse inference.
8486config_setting(
8487 name = "xnn_enable_sparse_explicit_false",
8488 define_values = {"xnn_enable_sparse": "false"},
8489)
8490
Marat Dukhan05702cf2020-03-26 15:41:33 -07008491# Disables usage of HMP-aware optimizations.
8492config_setting(
8493 name = "xnn_enable_hmp_explicit_false",
8494 define_values = {"xnn_enable_hmp": "false"},
8495)
8496
Chao Mei6ddfc602020-05-13 22:29:36 -07008497# Enable usage of optimized memory allocation
8498config_setting(
8499 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008500 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008501)
8502
8503# Disable usage of optimized memory allocation
8504config_setting(
8505 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008506 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008507)
8508
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008509# Enable QS8 inference in TFLite-specific version
8510config_setting(
8511 name = "xnn_enable_qs8_explicit_true",
8512 define_values = {"xnn_enable_qs8": "true"},
8513)
8514
8515# Disable QS8 inference in TFLite-specific version
8516config_setting(
8517 name = "xnn_enable_qs8_explicit_false",
8518 define_values = {"xnn_enable_qs8": "false"},
8519)
8520
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008521# Enable QU8 inference in TFLite-specific version
8522config_setting(
8523 name = "xnn_enable_qu8_explicit_true",
8524 define_values = {"xnn_enable_qu8": "true"},
8525)
8526
8527# Disable QU8 inference in TFLite-specific version
8528config_setting(
8529 name = "xnn_enable_qu8_explicit_false",
8530 define_values = {"xnn_enable_qu8": "false"},
8531)
8532
Marat Dukhanb8642352019-10-30 15:43:02 -07008533# Builds with -c dbg
8534config_setting(
8535 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008536 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008537 "compilation_mode": "dbg",
8538 },
8539)
8540
8541# Builds with -c opt
8542config_setting(
8543 name = "optimized_build",
8544 values = {
8545 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008546 },
8547)
8548
8549config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008550 name = "linux_k8",
8551 values = {"cpu": "k8"},
8552)
8553
8554config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008555 name = "linux_arm",
8556 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008557)
8558
8559config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008560 name = "linux_armeabi",
8561 values = {"cpu": "armeabi"},
8562)
8563
8564config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008565 name = "linux_armhf",
8566 values = {"cpu": "armhf"},
8567)
8568
8569config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008570 name = "linux_armv7a",
8571 values = {"cpu": "armv7a"},
8572)
8573
8574config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008575 name = "linux_aarch64",
8576 values = {"cpu": "aarch64"},
8577)
8578
8579config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008580 name = "android",
8581 values = {"crosstool_top": "//external:android/crosstool"},
8582)
8583
8584config_setting(
8585 name = "android_armv7",
8586 values = {
8587 "crosstool_top": "//external:android/crosstool",
8588 "cpu": "armeabi-v7a",
8589 },
8590)
8591
8592config_setting(
8593 name = "android_arm64",
8594 values = {
8595 "crosstool_top": "//external:android/crosstool",
8596 "cpu": "arm64-v8a",
8597 },
8598)
8599
8600config_setting(
8601 name = "android_x86",
8602 values = {
8603 "crosstool_top": "//external:android/crosstool",
8604 "cpu": "x86",
8605 },
8606)
8607
8608config_setting(
8609 name = "android_x86_64",
8610 values = {
8611 "crosstool_top": "//external:android/crosstool",
8612 "cpu": "x86_64",
8613 },
8614)
8615
8616config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008617 name = "windows_x86_64",
8618 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008619)
8620
8621config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008622 name = "windows_x86_64_clang",
8623 values = {
8624 "compiler": "clang-cl",
8625 "cpu": "x64_windows",
8626 },
8627)
8628
8629config_setting(
8630 name = "windows_x86_64_mingw",
8631 values = {
8632 "compiler": "mingw-gcc",
8633 "cpu": "x64_windows",
8634 },
8635)
8636
8637config_setting(
8638 name = "windows_x86_64_msys",
8639 values = {
8640 "compiler": "msys-gcc",
8641 "cpu": "x64_windows",
8642 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008643)
8644
8645config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008646 name = "macos_x86_64",
8647 values = {
8648 "apple_platform_type": "macos",
8649 "cpu": "darwin",
8650 },
8651)
8652
8653config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008654 name = "macos_arm64",
8655 values = {
8656 "apple_platform_type": "macos",
8657 "cpu": "darwin_arm64",
8658 },
8659)
8660
8661config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008662 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008663 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008664)
8665
8666config_setting(
8667 name = "emscripten_wasm",
8668 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008669 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008670 "cpu": "wasm",
8671 },
8672)
8673
8674config_setting(
8675 name = "emscripten_wasmsimd",
8676 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008677 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008678 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008679 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008680 },
8681)
8682
8683config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008684 name = "ios_armv7",
8685 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008686 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008687 "cpu": "ios_armv7",
8688 },
8689)
8690
8691config_setting(
8692 name = "ios_arm64",
8693 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008694 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008695 "cpu": "ios_arm64",
8696 },
8697)
8698
8699config_setting(
8700 name = "ios_arm64e",
8701 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008702 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008703 "cpu": "ios_arm64e",
8704 },
8705)
8706
8707config_setting(
8708 name = "ios_x86",
8709 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008710 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008711 "cpu": "ios_i386",
8712 },
8713)
8714
8715config_setting(
8716 name = "ios_x86_64",
8717 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008718 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008719 "cpu": "ios_x86_64",
8720 },
8721)
8722
8723config_setting(
8724 name = "watchos_armv7k",
8725 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008726 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008727 "cpu": "watchos_armv7k",
8728 },
8729)
8730
8731config_setting(
8732 name = "watchos_arm64_32",
8733 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008734 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008735 "cpu": "watchos_arm64_32",
8736 },
8737)
8738
8739config_setting(
8740 name = "watchos_x86",
8741 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008742 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008743 "cpu": "watchos_i386",
8744 },
8745)
8746
8747config_setting(
8748 name = "watchos_x86_64",
8749 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008750 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008751 "cpu": "watchos_x86_64",
8752 },
8753)
8754
8755config_setting(
8756 name = "tvos_arm64",
8757 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008758 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008759 "cpu": "tvos_arm64",
8760 },
8761)
8762
8763config_setting(
8764 name = "tvos_x86_64",
8765 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008766 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008767 "cpu": "tvos_x86_64",
8768 },
8769)