blob: 9db490a4d94b5028d4100d364639a9c4dae61a80 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
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527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
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529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
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533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
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544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
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547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07001475 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
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Marat Dukhand816f622020-07-15 10:14:39 -07001480 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001486 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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Marat Dukhan66d99e92020-07-16 12:56:21 -07001627 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001628 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001629 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001630 "src/x32-zip/x2-wasmsimd.c",
1631 "src/x32-zip/x3-wasmsimd.c",
1632 "src/x32-zip/x4-wasmsimd.c",
1633 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001634]
1635
Marat Dukhan08c4a432019-10-03 09:29:21 -07001636# ISA-specific micro-kernels
1637NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001638 "src/f32-argmaxpool/4x-neon-c4.c",
1639 "src/f32-argmaxpool/9p8x-neon-c4.c",
1640 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001641 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1642 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001643 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001644 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001645 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001646 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001647 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001648 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001649 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001650 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001651 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001652 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001653 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001654 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001655 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001656 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001657 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1658 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1659 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1660 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1661 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001662 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001663 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001664 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1665 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1666 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001667 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001668 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001669 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1670 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1671 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1672 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1673 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001674 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1675 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1676 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001677 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001678 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001679 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1680 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1681 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001682 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1683 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1684 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1685 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001686 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001687 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1688 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001689 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001690 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001691 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001692 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001693 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1694 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001695 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1696 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1697 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1698 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1699 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1700 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1701 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1702 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001703 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001704 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001705 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001706 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1707 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001708 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001709 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1710 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001711 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001712 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1713 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1714 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1715 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1716 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001717 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1718 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001719 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1720 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001721 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1722 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001723 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1724 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1725 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1726 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1727 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1728 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1729 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1730 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1731 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1732 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1733 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1734 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1735 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1736 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1737 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1738 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001739 "src/f32-ibilinear-chw/gen/neon-p4.c",
1740 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001741 "src/f32-ibilinear/gen/neon-c4.c",
1742 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001743 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001744 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001745 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001746 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1747 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001748 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001749 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1750 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1751 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1752 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001753 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1754 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001755 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1756 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001757 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1758 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001759 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1760 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1761 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001762 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1763 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001764 "src/f32-prelu/gen/neon-1x4.c",
1765 "src/f32-prelu/gen/neon-1x8.c",
1766 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001767 "src/f32-prelu/gen/neon-2x4.c",
1768 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001769 "src/f32-prelu/gen/neon-2x16.c",
1770 "src/f32-prelu/gen/neon-4x4.c",
1771 "src/f32-prelu/gen/neon-4x8.c",
1772 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001773 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001774 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001775 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001776 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1777 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001778 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001779 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1780 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001781 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001782 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1783 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001784 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1785 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1786 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1787 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1788 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1789 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1790 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1791 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1792 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1793 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1794 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1795 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1796 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001797 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001798 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1799 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1800 "src/f32-spmm/gen/4x1-minmax-neon.c",
1801 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1802 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1803 "src/f32-spmm/gen/8x1-minmax-neon.c",
1804 "src/f32-spmm/gen/12x1-minmax-neon.c",
1805 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1806 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1807 "src/f32-spmm/gen/16x1-minmax-neon.c",
1808 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1809 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1810 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001811 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1812 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1813 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1814 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001815 "src/f32-vbinary/gen/vmax-neon-x4.c",
1816 "src/f32-vbinary/gen/vmax-neon-x8.c",
1817 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1818 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1819 "src/f32-vbinary/gen/vmin-neon-x4.c",
1820 "src/f32-vbinary/gen/vmin-neon-x8.c",
1821 "src/f32-vbinary/gen/vminc-neon-x4.c",
1822 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001823 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1824 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1825 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1826 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1827 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1828 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001829 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1830 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1831 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1832 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001833 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1834 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1835 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1836 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001837 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1838 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001839 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1840 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1841 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1842 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1843 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1844 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1845 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1846 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1847 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1848 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1849 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1850 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001851 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1852 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1853 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001854 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1855 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001856 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1857 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001858 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1859 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001860 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1861 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001862 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1863 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1864 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1865 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1866 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1867 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001868 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1869 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1870 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1871 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1872 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1873 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1874 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1875 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1876 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1877 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1878 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1879 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1880 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1881 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1882 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1883 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1884 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1885 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001886 "src/f32-vunary/gen/vabs-neon-x4.c",
1887 "src/f32-vunary/gen/vabs-neon-x8.c",
1888 "src/f32-vunary/gen/vneg-neon-x4.c",
1889 "src/f32-vunary/gen/vneg-neon-x8.c",
1890 "src/f32-vunary/gen/vsqr-neon-x4.c",
1891 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001892 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1893 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001894 "src/math/roundd-neon-addsub.c",
1895 "src/math/roundd-neon-cvt.c",
1896 "src/math/roundne-neon-addsub.c",
1897 "src/math/roundu-neon-addsub.c",
1898 "src/math/roundu-neon-cvt.c",
1899 "src/math/roundz-neon-addsub.c",
1900 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001901 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1902 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1903 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1904 "src/math/sqrt-neon-nr1rsqrts.c",
1905 "src/math/sqrt-neon-nr2rsqrts.c",
1906 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001907 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
1908 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
1909 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
1910 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1911 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1912 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1913 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1914 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001915 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001916 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1917 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001918 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001919 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1920 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001921 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001922 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1923 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001924 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001925 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1926 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001927 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001928 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001929 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001930 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001931 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001932 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001933 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001934 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001935 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001936 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001937 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001938 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001939 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001940 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001941 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001942 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001943 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001944 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001945 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001946 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001947 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1948 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1949 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1950 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001951 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1952 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1953 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1954 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001955 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1956 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1957 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001958 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001959 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1960 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001961 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001962 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001963 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1964 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001965 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001966 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1967 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1968 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1969 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1970 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1971 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1972 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1973 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1974 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1975 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1976 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001977 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001978 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1979 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001980 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001981 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001982 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1983 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1984 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1985 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1986 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1987 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1988 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1989 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1990 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1991 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1992 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1993 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1994 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1995 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1996 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1997 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1998 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1999 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2000 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2001 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2002 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2003 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2004 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2005 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2006 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2007 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2008 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2009 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2010 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2011 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2012 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2013 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2014 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2015 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002016 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002017 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2018 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2019 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2020 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2021 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2022 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2023 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2024 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2025 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2026 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2027 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2028 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
2029 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2030 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2031 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002032 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002033 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2034 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002035 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002036 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002037 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
2038 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002039 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002040 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2041 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2042 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2043 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2044 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2045 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2046 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2047 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2048 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2049 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2050 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002051 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002052 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2053 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002054 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002055 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002056 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
2057 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2058 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2059 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2060 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2061 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2062 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2063 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2064 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2065 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2066 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2067 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2068 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2069 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2070 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2071 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2072 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2073 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2074 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2075 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2076 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2077 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2078 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2079 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2080 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2081 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2082 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2083 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2084 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2085 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2086 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2087 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2088 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2089 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002090 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002091 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2092 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2093 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2094 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2095 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2096 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2097 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2098 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2099 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2100 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2101 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2102 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002103 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002104 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002105 "src/qs8-requantization/rndna-neon.c",
Marat Dukhand3d818c2021-07-16 17:56:54 -07002106 "src/qs8-requantization/rndnu-neon-mull.c",
2107 "src/qs8-requantization/rndnu-neon-qdmulh.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002108 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2109 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2110 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2111 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2112 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2113 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2114 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2115 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002116 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2117 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002118 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
2119 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
2120 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
2121 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
2122 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
2123 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
2124 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
2125 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002126 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2127 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002128 "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2129 "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002130 "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2131 "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002132 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002133 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002134 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002135 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002136 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002137 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002138 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002139 "src/x8-zip/x2-neon.c",
2140 "src/x8-zip/x3-neon.c",
2141 "src/x8-zip/x4-neon.c",
2142 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002143 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002144 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002145 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002146 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002147 "src/x32-zip/x2-neon.c",
2148 "src/x32-zip/x3-neon.c",
2149 "src/x32-zip/x4-neon.c",
2150 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002151]
2152
2153NEONFMA_UKERNELS = [
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2156 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2157 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2158 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
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2163 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
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2166 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
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2176 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2177 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
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2181 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2182 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2183 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002184 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2185 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002191 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002193 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002195 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002197 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
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Marat Dukhan8137e4c2020-01-25 12:56:58 -08002199 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002200 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
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2206 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
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2212 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2213 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2214 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2215 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2216 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2217 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2218 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2219 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2220 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2221 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2222 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002223 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2224 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2225 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2226 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2227 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2228 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2229 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2230 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2231 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2232 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2233 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2234 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2235 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002236 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2237 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2238 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
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2240 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2241 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2242 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2243 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2244 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2245 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2246 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2247 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002248 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2249 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002250 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
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2253 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2254 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2255 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2256 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2257 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2258 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2259 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2260 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2261 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2262 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2263 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2264 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2265 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2266 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
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2268 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
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2270 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2271 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2272 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2273 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2274 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2275 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2276 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2277 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2278 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2279 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2280 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2281 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2282 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2283 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2284 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2285 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2286 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2287 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2288 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2289 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
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2291 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2292 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2293 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2294 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2295 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2296 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2297 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2298 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2299 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2300 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2301 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2302 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07002304 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2305 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2306 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2307 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2308 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2309 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2310 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2311 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2312 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2313 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2314 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2315 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2316 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2317 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2318 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2319 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2320 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2321 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2322 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2323 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002324 "src/math/exp-neonfma-rr2-lut64-p2.c",
2325 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002326 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2327 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002328 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2329 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2330 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002331 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2332 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2333 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002334 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2335 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2336 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002337 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2338 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2339 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002340 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2341 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2342 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002343 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2344 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2345 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002346 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2347 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2348 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002349 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002350 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002351 "src/math/sqrt-neonfma-nr2fma.c",
2352 "src/math/sqrt-neonfma-nr2fma1adj.c",
2353 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002354]
2355
2356AARCH64_NEONFMA_UKERNELS = [
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Frank Barchardbeca6522020-10-30 22:34:35 -07002406 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002407 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2408 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2409 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2410 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2411 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2412 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2413 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2414 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2415 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2416 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2417 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2418 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2419 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2420 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2421 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2422 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2423 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2424 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2425 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2426 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002427 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2428 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002429 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2430 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002431 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2432 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002433 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2434 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002435 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2436 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002437 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2438 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2439 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2440 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2441 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2442 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002443 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2444 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2445 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2446 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2447 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2448 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2449 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2450 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2451 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2452 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2453 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2454 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2455 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2456 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2457 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2458 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2459 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2460 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002461 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2462 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002463 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002464 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002465 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002466 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002467 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002468 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002469]
2470
Marat Dukhan8853b822020-05-07 12:19:01 -07002471NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002472 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2473 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002474 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2475 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2476 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2477 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2478 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2479 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002480 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002481 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002482 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002483 "src/math/roundz-neonv8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002484 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2485 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2486 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2487 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2488 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2489 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2490 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2491 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002492 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002493 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2494 "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002495 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002496 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2497 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002498 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002499 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2500 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002501 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002502 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2503 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002504 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2505 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2506 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2507 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2508 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2509 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2510 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2511 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002512 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002513 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2514 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002515 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002516 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2517 "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002518 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002519 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2520 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002521 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002522 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2523 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002524 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2525 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2526 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2527 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2528 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2529 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2530 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2531 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002532 "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2533 "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
2534 "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2535 "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002536]
2537
Marat Dukhan08c4a432019-10-03 09:29:21 -07002538AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchard5a599a62020-06-04 20:12:44 -07002539 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
2540 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
2541 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2542 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002543 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2544 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2545 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2546 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2547 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2548 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2549 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2550 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002551 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2552 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002553 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
2554 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
2555 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2556 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2557 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2558 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
2559 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2560 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2561 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2562 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2563 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2564 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2565 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2566 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2567 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2568 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002569 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2570 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2571 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2572 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2573 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2574 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2575 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2576 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002577 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002578 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002579 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
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Frank Barchardbeca6522020-10-30 22:34:35 -07002581 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002582 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
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Frank Barchardbeca6522020-10-30 22:34:35 -07002585 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
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2587 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2588 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2589 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2590 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2591 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2592 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2593 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2594 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2595 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
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2601 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
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2603 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2604 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2605 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2606 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2607 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2608 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2609 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2610 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2611 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2612 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2613 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2614 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002615 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2616 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002617 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2618 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002619 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2620 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002621 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2622 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002623]
2624
Benoit Jacoba9644732020-08-13 12:48:55 -07002625NEONDOT_UKERNELS = [
Marat Dukhane76478b2021-06-28 16:35:40 -07002626 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2627 "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2628 "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2629 "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2630 "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2631 "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2632 "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2633 "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2634 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2635 "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2636 "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2637 "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2638 "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2639 "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2640 "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2641 "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002642 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2643 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002644 "src/qs8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2645 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002646 "src/qs8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2647 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002648 "src/qs8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2649 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002650 "src/qs8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2651 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002652 "src/qs8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2653 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002654 "src/qs8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2655 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002656 "src/qs8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2657 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002658 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2659 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002660 "src/qs8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2661 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002662 "src/qs8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2663 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002664 "src/qs8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2665 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002666 "src/qs8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2667 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002668 "src/qs8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2669 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002670 "src/qs8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2671 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002672 "src/qs8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
2673 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002674]
2675
Marat Dukhan08c4a432019-10-03 09:29:21 -07002676SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -07002677 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
2678 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07002679 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
2680 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002681 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
2682 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
2683 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
2684 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002685 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2686 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002687 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2688 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2689 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2690 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002691 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2692 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002693 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2694 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2695 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002696 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002697 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002698 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2699 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2700 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2701 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2702 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002703 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2704 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2705 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002706 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002707 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002708 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2709 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2710 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002711 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2712 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2713 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2714 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2715 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2716 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2717 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2718 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2719 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2720 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2721 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2722 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2723 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002724 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2725 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2726 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2727 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2728 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2729 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2730 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2731 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002732 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002733 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002734 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002735 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2736 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002737 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2738 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2739 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002740 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2741 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2742 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002743 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2744 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2745 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002746 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2747 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2748 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002749 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2750 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2751 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002752 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2753 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2754 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002755 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2756 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
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2758 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002759 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2760 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2761 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002762 "src/f32-ibilinear-chw/gen/sse-p4.c",
2763 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002764 "src/f32-ibilinear/gen/sse-c4.c",
2765 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002766 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2767 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2768 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002769 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2770 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2771 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002772 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2773 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2774 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2775 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002776 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2777 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2778 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002779 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2780 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2781 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002782 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002783 "src/f32-prelu/gen/sse-2x4.c",
2784 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002785 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002786 "src/f32-spmm/gen/4x1-minmax-sse.c",
2787 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002788 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002789 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002790 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2791 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2792 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2793 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2794 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2795 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2796 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2797 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002798 "src/f32-vbinary/gen/vmax-sse-x4.c",
2799 "src/f32-vbinary/gen/vmax-sse-x8.c",
2800 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2801 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2802 "src/f32-vbinary/gen/vmin-sse-x4.c",
2803 "src/f32-vbinary/gen/vmin-sse-x8.c",
2804 "src/f32-vbinary/gen/vminc-sse-x4.c",
2805 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002806 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2807 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2808 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2809 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2810 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2811 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2812 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2813 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002814 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2815 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2816 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2817 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002818 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2819 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2820 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2821 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002822 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2823 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002824 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2825 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002826 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2827 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002828 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2829 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002830 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2831 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002832 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2833 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002834 "src/f32-vunary/gen/vabs-sse-x4.c",
2835 "src/f32-vunary/gen/vabs-sse-x8.c",
2836 "src/f32-vunary/gen/vneg-sse-x4.c",
2837 "src/f32-vunary/gen/vneg-sse-x8.c",
2838 "src/f32-vunary/gen/vsqr-sse-x4.c",
2839 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002840 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002841 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002842 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002843 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002844 "src/math/sqrt-sse-hh1mac.c",
2845 "src/math/sqrt-sse-nr1mac.c",
2846 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002847 "src/x32-fill/sse.c",
2848 "src/x32-packx/x4-sse.c",
2849 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002850]
2851
2852SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002853 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002854 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002855 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002856 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2857 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2858 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2859 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2860 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2861 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2862 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2863 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2864 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2865 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2866 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2867 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002868 "src/f32-prelu/gen/sse2-2x4.c",
2869 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002870 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002871 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002872 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002873 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2874 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002875 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002876 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2877 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002878 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002879 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2880 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002881 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002882 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2883 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2884 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2885 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2886 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2887 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2888 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2889 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2890 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2891 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2892 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2893 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002894 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2895 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002896 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2897 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002898 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2899 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2900 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2901 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2902 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2903 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002904 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2905 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2906 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2907 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2908 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2909 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2910 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2911 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2912 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2913 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2914 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2915 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002916 "src/math/exp-sse2-rr2-lut64-p2.c",
2917 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002918 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002919 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002920 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002921 "src/math/roundd-sse2-cvt.c",
2922 "src/math/roundne-sse2-cvt.c",
2923 "src/math/roundu-sse2-cvt.c",
2924 "src/math/roundz-sse2-cvt.c",
2925 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2926 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2927 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2928 "src/math/sigmoid-sse2-rr2-p5-div.c",
2929 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2930 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002931 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2932 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2933 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2934 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2935 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2936 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002937 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002938 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002939 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002940 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002941 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002942 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002943 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002944 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002945 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002946 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002947 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002948 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002949 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002950 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002951 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002952 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002953 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002954 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002955 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002956 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002957 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002958 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002959 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002960 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002961 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002962 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002963 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002964 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002965 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2966 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002967 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2968 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2969 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2970 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2971 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2972 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2973 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2974 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2975 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
2976 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002977 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2978 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2979 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002980 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2981 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2982 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002983 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002984 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002985 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002986 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002987 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002988 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002989 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002990 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002991 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002992 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002993 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002994 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002995 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002996 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002997 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002998 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002999 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003000 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003001 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003002 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003003 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003004 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003005 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003006 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07003029 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhancdbe9a32021-07-01 23:52:04 -07003065 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07003073 "src/qu8-requantization/fp32-sse2.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07003076 "src/qu8-vadd/minmax-sse2.c",
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Marat Dukhan57dccd82020-04-14 00:53:10 -07003084 "src/x32-unpool/sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07003089]
3090
3091SSSE3_UKERNELS = [
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Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003147SSE41_UKERNELS = [
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3195 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3196 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3197 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3198 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3199 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003201 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003202 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003203 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003204 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003205 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003206 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003207 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003208 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003209 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003210 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003214 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003216 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003218 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003220 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003226 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
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3230 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
3231 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003232 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3233 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3234 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
3235 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3236 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3237 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3238 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3239 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3240 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3241 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3242 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3243 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3244 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3245 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3246 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
3247 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3248 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3249 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3250 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3251 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003252 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3253 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3254 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003255 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
3256 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
3257 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003258 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003259 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003260 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003261 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003262 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003263 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003264 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003265 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003266 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003267 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003268 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003270 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003271 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003272 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003273 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003274 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003275 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003276 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003277 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003278 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003279 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003280 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003281 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003282 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003283 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003286 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003288 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003289 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003291 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003292 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003293 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003294 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003295 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003296 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003297 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003298 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003299 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003300 "src/qs8-requantization/rndnu-sse4-sra.c",
3301 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003302 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3303 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3304 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3305 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003306 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3307 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07003310 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
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Marat Dukhanf0f28812021-07-08 22:34:20 -07003318 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003319 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003320 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003321 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003322 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003323 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003324 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
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Marat Dukhanef47f8d2021-07-02 15:08:32 -07003342 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
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Marat Dukhan06716242021-05-26 15:56:39 -07003359 "src/qu8-requantization/rndna-sse4.c",
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3361
Marat Dukhan08c4a432019-10-03 09:29:21 -07003362AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003363 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3364 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003365 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3366 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003367 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3368 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003369 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3370 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3371 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3372 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3373 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3374 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003375 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003376 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3377 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003378 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003379 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003380 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003381 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003382 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3383 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3384 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3385 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3386 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3387 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3388 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3389 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3390 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3391 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3392 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003393 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003394 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3395 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003396 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003397 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003398 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003399 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003400 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3401 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003402 "src/f32-prelu/gen/avx-2x8.c",
3403 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003404 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003405 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3406 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3407 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3408 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3409 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3410 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3411 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3412 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003413 "src/f32-vbinary/gen/vmax-avx-x8.c",
3414 "src/f32-vbinary/gen/vmax-avx-x16.c",
3415 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3416 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3417 "src/f32-vbinary/gen/vmin-avx-x8.c",
3418 "src/f32-vbinary/gen/vmin-avx-x16.c",
3419 "src/f32-vbinary/gen/vminc-avx-x8.c",
3420 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003421 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3422 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3423 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3424 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3425 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3426 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3427 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3428 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003429 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3430 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3431 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3432 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003433 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3434 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3435 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3436 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003437 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3438 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003439 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3440 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3441 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3442 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3443 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3444 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3445 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3446 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3447 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3448 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3449 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3450 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3451 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3452 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3453 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3454 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3455 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3456 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003457 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3458 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003459 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3460 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003461 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3462 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003463 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3464 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003465 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3466 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3467 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3468 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3469 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3470 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003471 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003472 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3473 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3474 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3475 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3476 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3477 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3478 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3479 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3480 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3481 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3482 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3483 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3484 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3485 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3486 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3487 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3488 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3489 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3490 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3491 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003492 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3493 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003494 "src/f32-vunary/gen/vabs-avx-x8.c",
3495 "src/f32-vunary/gen/vabs-avx-x16.c",
3496 "src/f32-vunary/gen/vneg-avx-x8.c",
3497 "src/f32-vunary/gen/vneg-avx-x16.c",
3498 "src/f32-vunary/gen/vsqr-avx-x8.c",
3499 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003500 "src/math/exp-avx-rr2-p5.c",
3501 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3502 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3503 "src/math/expm1minus-avx-rr2-p6.c",
3504 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3505 "src/math/sigmoid-avx-rr2-p5-div.c",
3506 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3507 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003508 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3509 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3510 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3511 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3512 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3513 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3514 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3515 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3516 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3517 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3518 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3519 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003520 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003521 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003522 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003523 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003524 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003525 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003526 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003527 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003528 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003529 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003530 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003531 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003532 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003533 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003534 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003535 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003536 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003537 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003538 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003539 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003540 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003541 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003542 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003543 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003544 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003545 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003546 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003547 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003548 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3549 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3550 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3551 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003552 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3553 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3554 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3555 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3556 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3557 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3558 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3559 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3560 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3561 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3562 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3563 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3564 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3565 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3566 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3567 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3568 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3569 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3570 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3571 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003572 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003573 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003574 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003575 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003576 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003577 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003578 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003579 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003580 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003581 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003582 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003583 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003584 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003585 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003586 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003587 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003588 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003589 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003590 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003591 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003592 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003593 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003594 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003595 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003596 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003597 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003598 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003599 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003600 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003601 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003602 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003603 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003604 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003605 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003606 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003607 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3608 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3609 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3610 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3611 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3612 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3613 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3614 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3615 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3616 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3617 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3618 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3619 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3620 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3621 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3622 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003623 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003624 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003625 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003626 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003627 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003628 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003629 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003630 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003631 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3632 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3633 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3634 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3635 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3636 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3637 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3638 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3639 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3640 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3641 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3642 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3643 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3644 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3645 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3646 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3647 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3648 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3649 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3650 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3651 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3652 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3653 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3654 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3655 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3656 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3657 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3658 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003659]
3660
Marat Dukhan1566fee2020-08-02 21:55:41 -07003661XOP_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07003662 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3663 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3664 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3665 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3666 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3667 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003668 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003669 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003670 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003671 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003672 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003673 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003674 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003675 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003676 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003677 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003678 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003679 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003680 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003681 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003682 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003683 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003684 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003685 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003686 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003687 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003688 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003689 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003690 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003691 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003692 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003693 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003694 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003695 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003696 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3697 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003698 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3699 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3700 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3701 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3702 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3703 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3704 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3705 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3706 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3707 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003708 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003709 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003710 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003711 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003712 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003713 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003714 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003715 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003716 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003717 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003718 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003719 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003720 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003721 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003722 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003723 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003724 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003725 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003726 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003727 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003728 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003729 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003730 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003731 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003732 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003733 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003734 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003735 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003736 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003737 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003738 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003739 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003740 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003741 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003742 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003743 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3744 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3745 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3746 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3747 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3748 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3749 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3750 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003751 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3752 "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3753 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3754 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003755 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3756 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3757 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3758 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3759 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3760 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3761 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3762 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3763 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3764 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3765 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3766 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3767 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3768 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3769 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3770 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3771 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3772 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3773 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3774 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3775 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3776 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3777 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3778 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3779 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3780 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3781 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3782 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003783]
3784
Marat Dukhanfda12b82019-11-21 12:27:59 -08003785FMA3_UKERNELS = [
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Marat Dukhan1c587112020-04-08 20:04:28 -07003788 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3789 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003790 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3791 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003792 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
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3794 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
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3796 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3797 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003798 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003799 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3800 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3801 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3802 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003803 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003806 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003807 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003809 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3810 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3811 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003812 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3813 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3814 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3815 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3816 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3817 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3818 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3819 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3820 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3821 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3822 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3823 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3824 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3825 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003826 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003827 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3828 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3829 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3830 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003831 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003832 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3833 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003834 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003835 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3836 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003837 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3838 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3839 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003840 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3841 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003842 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3843 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3844 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3845 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3846 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3847 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3848 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3849 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003850 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003851 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003852 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003853]
3854
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003855AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003856 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003858 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003859 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003860 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003861 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003863 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003864 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003867 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003868 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003870 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003871 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003872 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003873 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3874 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003875 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003876 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3877 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3878 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003879 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003880 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3881 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003882 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003883 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003884 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003885 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003887 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003888 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
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3890 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003891 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003892 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3893 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3894 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3895 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3896 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3897 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3898 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3899 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3900 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3901 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3902 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3903 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3904 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3905 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3906 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3907 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3908 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3909 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3910 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3911 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3912 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3913 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3914 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3915 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3916 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3917 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3918 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3919 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3920 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3921 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3922 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3923 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3924 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3925 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3926 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3927 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3928 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3929 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3930 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3931 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003932 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3933 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3934 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3935 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3936 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3937 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3938 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3939 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3940 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3941 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3942 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3943 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3944 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3945 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3946 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3947 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3948 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3949 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3950 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3951 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3952 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3953 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3954 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3955 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003956 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3957 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3958 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3959 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3960 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3961 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3962 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3963 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3964 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3965 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3966 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3967 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3968 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3969 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3970 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3971 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3972 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3973 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3974 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3975 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3976 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3977 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3978 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3979 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3980 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3981 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3982 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3983 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3984 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3985 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003986 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3987 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3988 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003989 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3990 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3991 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3992 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003993 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003994 "src/math/extexp-avx2-p5.c",
3995 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3996 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3997 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3998 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3999 "src/math/sigmoid-avx2-rr1-p5-div.c",
4000 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
4001 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
4002 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
4003 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
4004 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
4005 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
4006 "src/math/sigmoid-avx2-rr2-p5-div.c",
4007 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
4008 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07004009 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4010 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4011 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
4012 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4013 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
4014 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4015 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
4016 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
4017 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
4018 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4019 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
4020 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004021 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4022 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
4023 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4024 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
4025 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4026 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07004027 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4028 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4029 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004030 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004031 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004032 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004033 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004034 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004035 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004036 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
4037 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004038 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004039 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004040 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
4041 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004042 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004043 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004044 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004045 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004046 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004047 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004048 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
4049 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004050 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004051 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004052 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
4053 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004054 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004055 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004056 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004057 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004058 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004059 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004060 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004061 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004062 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004063 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004064 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004065 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004066 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004067 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004068 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004069 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004070 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004071 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07004072 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4073 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4074 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
4075 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
4076 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4077 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
4078 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
4079 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07004080 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4081 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4082 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4083 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4084 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4085 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004086 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4087 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4088 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4089 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4090 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4091 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004092]
4093
Marat Dukhan08c4a432019-10-03 09:29:21 -07004094AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004095 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4096 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004097 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4098 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004099 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4100 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004101 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
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4103 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4104 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4105 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4106 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004107 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4108 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4109 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4110 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4111 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4112 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004113 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4114 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4115 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4116 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4117 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4118 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004119 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4120 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4121 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4122 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4123 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4124 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004125 "src/f32-prelu/gen/avx512f-2x16.c",
4126 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004127 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4128 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004129 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004130 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08004132 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07004134 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004135 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
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4137 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004138 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004139 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4140 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004141 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004142 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004143 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004144 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4145 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004146 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004147 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4148 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4149 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004150 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004151 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4152 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004153 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004154 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004155 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004156 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4157 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004158 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004159 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4160 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4161 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004162 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004163 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004164 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4165 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4166 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4167 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4168 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4169 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4170 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4171 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004172 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4173 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4174 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4175 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4176 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4177 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4178 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4179 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004180 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4181 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4182 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4183 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4184 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4185 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4186 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4187 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004188 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4189 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4190 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4191 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004192 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4193 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4194 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4195 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004196 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4197 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004198 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4199 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4200 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4201 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4202 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4203 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4204 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4205 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4206 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4207 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4208 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4209 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4210 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4211 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4212 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4213 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004214 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4215 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004216 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4217 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004218 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4219 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004220 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4221 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4222 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4223 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4224 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4225 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4226 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4227 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004228 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004229 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4230 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4231 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4232 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4233 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4234 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4235 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4236 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4237 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4238 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4239 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4240 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4241 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4242 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4243 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4244 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4245 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4246 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4247 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4248 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4249 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4250 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4251 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4252 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004253 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4254 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4255 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4256 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4257 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4258 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4259 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4260 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4261 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4262 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4263 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4264 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4265 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4266 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4267 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4268 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4269 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4270 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4271 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4272 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4273 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4274 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4275 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4276 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4277 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4278 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4279 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4280 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4281 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4282 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4283 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4284 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4285 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4286 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4287 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4288 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4289 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4290 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4291 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4292 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4293 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4294 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4295 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4296 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4297 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4298 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4299 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4300 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004301 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4302 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4303 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4304 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4305 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4306 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4307 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4308 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004309 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4310 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4311 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4312 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4313 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4314 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004315 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4316 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4317 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4318 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4319 "src/math/exp-avx512f-rr2-p5-scalef.c",
4320 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004321 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4322 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004323 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004324 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004325 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004326 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004327 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004328 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004329 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004330 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004331 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004332 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4333 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4334 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4335 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4336 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4337 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4338 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4339 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
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Marat Dukhan36173d22020-10-15 17:14:26 -07004342 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
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4345 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
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4347 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07004350 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004351]
4352
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004353AVX512SKX_UKERNELS = [
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Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004402]
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Frank Barchardbcedc082020-08-17 18:00:51 -07004404WASM32_ASM_UKERNELS = [
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Frank Barchardbcedc082020-08-17 18:00:51 -07004408]
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Marat Dukhan08c4a432019-10-03 09:29:21 -07004410AARCH32_ASM_UKERNELS = [
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4427AARCH64_ASM_UKERNELS = [
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4504 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4505 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4506 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004507 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004508 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004509 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004510 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4511 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4512 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4513 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004514 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4515 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004516 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4517 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4518 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4519 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4520 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004521 "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004522 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4523 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4524 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4525 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4526 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4527 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004528 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4529 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4530 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4531 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4532 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4533 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4534 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4535 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004536 "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004537 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4538 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4539 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4540 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4541 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004542 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4543 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4544 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4545 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004546 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4547 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4548 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4549 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004550 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4551 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004552 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4553 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004554 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4555 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4556 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4557 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4558 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004559 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4560 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4561 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4562 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004563 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004564 "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004565 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004566 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4567 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004568 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4569 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004570 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4571 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4572 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4573 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004574 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4575 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4576 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004577 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004578 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4579 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4580 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4581 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004582 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4583 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4584 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4585 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004586 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4587 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4588 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4589 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004590 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4591 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4592 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4593 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004594 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004595 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004596 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4597 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004598 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4599 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004600 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4601 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4602 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004603 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4604 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004605 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004606]
4607
Marat Dukhan1b354632020-03-23 12:50:22 -07004608INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004609 "src/xnnpack/argmaxpool.h",
4610 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004611 "src/xnnpack/common.h",
4612 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004613 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004614 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004615 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004616 "src/xnnpack/gavgpool.h",
4617 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004618 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004619 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004620 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004621 "src/xnnpack/lut.h",
4622 "src/xnnpack/math.h",
4623 "src/xnnpack/maxpool.h",
4624 "src/xnnpack/packx.h",
4625 "src/xnnpack/pad.h",
4626 "src/xnnpack/params.h",
4627 "src/xnnpack/pavgpool.h",
4628 "src/xnnpack/ppmm.h",
4629 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004630 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004631 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004632 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004633 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004634 "src/xnnpack/spmm.h",
4635 "src/xnnpack/unpool.h",
4636 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004637 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004638 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004639 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004640 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004641 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004642 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004643 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004644]
4645
4646INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004647 "include/xnnpack.h",
4648 "src/xnnpack/allocator.h",
4649 "src/xnnpack/compute.h",
4650 "src/xnnpack/im2col.h",
4651 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004652 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004653 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004654 "src/xnnpack/operator.h",
4655 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004656 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004657 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004658 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004659 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004660]
4661
Marat Dukhan1b354632020-03-23 12:50:22 -07004662ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004663 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004664]
4665
Marat Dukhan1b354632020-03-23 12:50:22 -07004666MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004667 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004668 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004669]
4670
Marat Dukhan1b354632020-03-23 12:50:22 -07004671MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004672 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004673 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004674 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004675 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004676]
4677
4678OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004679 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004680 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004681]
4682
4683WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004684 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004685 "src/xnnpack/operator.h",
4686 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004687]
4688
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004689LOGGING_COPTS = select({
4690 # No logging in optimized mode
4691 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4692 # Full logging in debug mode
4693 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4694 # Error-only logging in default (fastbuild) mode
4695 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4696})
4697
Marat Dukhan3b59de22020-06-03 20:15:19 -07004698LOGGING_SRCS = select({
4699 # No logging in optimized mode
4700 ":optimized_build": [],
4701 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004702 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004703 "src/operator-strings.c",
4704 "src/subgraph-strings.c",
4705 ],
4706})
4707
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004708LOGGING_HDRS = [
4709 "src/xnnpack/log.h",
4710]
4711
Marat Dukhan08c4a432019-10-03 09:29:21 -07004712xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004713 name = "tables",
4714 srcs = TABLE_SRCS,
4715 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004716 gcc_copts = xnnpack_gcc_std_copts(),
4717 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004718)
4719
4720xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004721 name = "scalar_ukernels",
4722 srcs = SCALAR_UKERNELS,
4723 hdrs = INTERNAL_HDRS,
4724 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004725 gcc_copts = xnnpack_gcc_std_copts(),
4726 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004727 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004728 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004729 "@FP16",
4730 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004731 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004732 ],
4733)
4734
4735xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004736 name = "scalar_ukernels_test_mode",
4737 srcs = SCALAR_UKERNELS,
4738 hdrs = INTERNAL_HDRS,
4739 aarch32_copts = ["-marm"],
4740 copts = [
4741 "-UNDEBUG",
4742 "-DXNN_TEST_MODE=1",
4743 ],
4744 gcc_copts = xnnpack_gcc_std_copts(),
4745 msvc_copts = xnnpack_msvc_std_copts(),
4746 deps = [
4747 ":tables",
4748 "@FP16",
4749 "@FXdiv",
4750 "@pthreadpool",
4751 ],
4752)
4753
4754xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004755 name = "wasm_ukernels",
4756 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004757 gcc_copts = xnnpack_gcc_std_copts(),
4758 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004759 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004760 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004761 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004762 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004763 "@FP16",
4764 "@FXdiv",
4765 "@pthreadpool",
4766 ],
4767)
4768
4769xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004770 name = "wasm_ukernels_test_mode",
4771 hdrs = INTERNAL_HDRS,
4772 copts = [
4773 "-UNDEBUG",
4774 "-DXNN_TEST_MODE=1",
4775 ],
4776 gcc_copts = xnnpack_gcc_std_copts(),
4777 msvc_copts = xnnpack_msvc_std_copts(),
4778 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004779 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004780 deps = [
4781 ":tables",
4782 "@FP16",
4783 "@FXdiv",
4784 "@pthreadpool",
4785 ],
4786)
4787
4788xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004789 name = "neon_ukernels",
4790 hdrs = INTERNAL_HDRS,
4791 aarch32_copts = [
4792 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004793 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004794 "-mfpu=neon",
4795 ],
4796 aarch32_srcs = NEON_UKERNELS,
4797 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004798 gcc_copts = xnnpack_gcc_std_copts(),
4799 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004800 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004801 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004802 "@FP16",
4803 "@pthreadpool",
4804 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004805)
4806
4807xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004808 name = "neon_ukernels_test_mode",
4809 hdrs = INTERNAL_HDRS,
4810 aarch32_copts = [
4811 "-marm",
4812 "-march=armv7-a",
4813 "-mfpu=neon",
4814 ],
4815 aarch32_srcs = NEON_UKERNELS,
4816 aarch64_srcs = NEON_UKERNELS,
4817 copts = [
4818 "-UNDEBUG",
4819 "-DXNN_TEST_MODE=1",
4820 ],
4821 gcc_copts = xnnpack_gcc_std_copts(),
4822 msvc_copts = xnnpack_msvc_std_copts(),
4823 deps = [
4824 ":tables",
4825 "@FP16",
4826 "@pthreadpool",
4827 ],
4828)
4829
4830xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004831 name = "neonfma_ukernels",
4832 hdrs = INTERNAL_HDRS,
4833 aarch32_copts = [
4834 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004835 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004836 "-mfpu=neon-vfpv4",
4837 ],
4838 aarch32_srcs = NEONFMA_UKERNELS,
4839 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004840 apple_aarch32_copts = [
4841 "-mcpu=swift",
4842 "-mtune=generic",
4843 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004844 gcc_copts = xnnpack_gcc_std_copts(),
4845 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004846 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004847 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004848 "@FP16",
4849 "@pthreadpool",
4850 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004851)
4852
4853xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004854 name = "neonfma_ukernels_test_mode",
4855 hdrs = INTERNAL_HDRS,
4856 aarch32_copts = [
4857 "-marm",
4858 "-march=armv7-a",
4859 "-mfpu=neon-vfpv4",
4860 ],
4861 aarch32_srcs = NEONFMA_UKERNELS,
4862 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004863 apple_aarch32_copts = [
4864 "-mcpu=swift",
4865 "-mtune=generic",
4866 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004867 copts = [
4868 "-UNDEBUG",
4869 "-DXNN_TEST_MODE=1",
4870 ],
4871 gcc_copts = xnnpack_gcc_std_copts(),
4872 msvc_copts = xnnpack_msvc_std_copts(),
4873 deps = [
4874 ":tables",
4875 "@FP16",
4876 "@pthreadpool",
4877 ],
4878)
4879
4880xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004881 name = "neonv8_ukernels",
4882 hdrs = INTERNAL_HDRS,
4883 aarch32_copts = [
4884 "-marm",
4885 "-march=armv8-a",
4886 "-mfpu=neon-fp-armv8",
4887 ],
4888 aarch32_srcs = NEONV8_UKERNELS,
4889 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004890 apple_aarch32_copts = [
4891 "-mcpu=cyclone",
4892 "-mtune=generic",
4893 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004894 gcc_copts = xnnpack_gcc_std_copts(),
4895 msvc_copts = xnnpack_msvc_std_copts(),
4896 deps = [
4897 ":tables",
4898 "@FP16",
4899 "@pthreadpool",
4900 ],
4901)
4902
4903xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004904 name = "neonv8_ukernels_test_mode",
4905 hdrs = INTERNAL_HDRS,
4906 aarch32_copts = [
4907 "-marm",
4908 "-march=armv8-a",
4909 "-mfpu=neon-fp-armv8",
4910 ],
4911 aarch32_srcs = NEONV8_UKERNELS,
4912 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004913 apple_aarch32_copts = [
4914 "-mcpu=cyclone",
4915 "-mtune=generic",
4916 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004917 copts = [
4918 "-UNDEBUG",
4919 "-DXNN_TEST_MODE=1",
4920 ],
4921 gcc_copts = xnnpack_gcc_std_copts(),
4922 msvc_copts = xnnpack_msvc_std_copts(),
4923 deps = [
4924 ":tables",
4925 "@FP16",
4926 "@pthreadpool",
4927 ],
4928)
4929
4930xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004931 name = "neonfp16arith_ukernels",
4932 hdrs = INTERNAL_HDRS,
4933 aarch64_copts = ["-march=armv8.2-a+fp16"],
4934 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004935 gcc_copts = xnnpack_gcc_std_copts(),
4936 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004937 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004938 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004939 "@FP16",
4940 "@pthreadpool",
4941 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004942)
4943
4944xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004945 name = "neonfp16arith_ukernels_test_mode",
4946 hdrs = INTERNAL_HDRS,
4947 aarch64_copts = ["-march=armv8.2-a+fp16"],
4948 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4949 copts = [
4950 "-UNDEBUG",
4951 "-DXNN_TEST_MODE=1",
4952 ],
4953 gcc_copts = xnnpack_gcc_std_copts(),
4954 msvc_copts = xnnpack_msvc_std_copts(),
4955 deps = [
4956 ":tables",
4957 "@FP16",
4958 "@pthreadpool",
4959 ],
4960)
4961
4962xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004963 name = "neondot_ukernels",
4964 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004965 aarch32_copts = [
4966 "-marm",
4967 "-march=armv8.2-a+dotprod",
4968 "-mfpu=neon-fp-armv8",
4969 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004970 aarch32_srcs = NEONDOT_UKERNELS,
4971 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4972 aarch64_srcs = NEONDOT_UKERNELS,
4973 gcc_copts = xnnpack_gcc_std_copts(),
4974 msvc_copts = xnnpack_msvc_std_copts(),
4975 deps = [
4976 ":tables",
4977 "@FP16",
4978 "@pthreadpool",
4979 ],
4980)
4981
4982xnnpack_cc_library(
4983 name = "neondot_ukernels_test_mode",
4984 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004985 aarch32_copts = [
4986 "-marm",
4987 "-march=armv8.2-a+dotprod",
4988 "-mfpu=neon-fp-armv8",
4989 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004990 aarch32_srcs = NEONDOT_UKERNELS,
4991 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4992 aarch64_srcs = NEONDOT_UKERNELS,
4993 copts = [
4994 "-UNDEBUG",
4995 "-DXNN_TEST_MODE=1",
4996 ],
4997 gcc_copts = xnnpack_gcc_std_copts(),
4998 msvc_copts = xnnpack_msvc_std_copts(),
4999 deps = [
5000 ":tables",
5001 "@FP16",
5002 "@pthreadpool",
5003 ],
5004)
5005
5006xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005007 name = "sse2_ukernels",
5008 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005009 gcc_copts = xnnpack_gcc_std_copts(),
5010 gcc_x86_copts = ["-msse2"],
5011 msvc_copts = xnnpack_msvc_std_copts(),
5012 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005013 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005014 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005015 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005016 "@FP16",
5017 "@pthreadpool",
5018 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005019)
5020
5021xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005022 name = "sse2_ukernels_test_mode",
5023 hdrs = INTERNAL_HDRS,
5024 copts = [
5025 "-UNDEBUG",
5026 "-DXNN_TEST_MODE=1",
5027 ],
5028 gcc_copts = xnnpack_gcc_std_copts(),
5029 gcc_x86_copts = ["-msse2"],
5030 msvc_copts = xnnpack_msvc_std_copts(),
5031 msvc_x86_32_copts = ["/arch:SSE2"],
5032 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
5033 deps = [
5034 ":tables",
5035 "@FP16",
5036 "@pthreadpool",
5037 ],
5038)
5039
5040xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005041 name = "ssse3_ukernels",
5042 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005043 gcc_copts = xnnpack_gcc_std_copts(),
5044 gcc_x86_copts = ["-mssse3"],
5045 msvc_copts = xnnpack_msvc_std_copts(),
5046 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005047 x86_srcs = SSSE3_UKERNELS,
5048 deps = [
5049 ":tables",
5050 "@FP16",
5051 "@pthreadpool",
5052 ],
5053)
5054
5055xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005056 name = "ssse3_ukernels_test_mode",
5057 hdrs = INTERNAL_HDRS,
5058 copts = [
5059 "-UNDEBUG",
5060 "-DXNN_TEST_MODE=1",
5061 ],
5062 gcc_copts = xnnpack_gcc_std_copts(),
5063 gcc_x86_copts = ["-mssse3"],
5064 msvc_copts = xnnpack_msvc_std_copts(),
5065 msvc_x86_32_copts = ["/arch:SSE2"],
5066 x86_srcs = SSSE3_UKERNELS,
5067 deps = [
5068 ":tables",
5069 "@FP16",
5070 "@pthreadpool",
5071 ],
5072)
5073
5074xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005075 name = "sse41_ukernels",
5076 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005077 gcc_copts = xnnpack_gcc_std_copts(),
5078 gcc_x86_copts = ["-msse4.1"],
5079 msvc_copts = xnnpack_msvc_std_copts(),
5080 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005081 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005082 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005083 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005084 "@FP16",
5085 "@pthreadpool",
5086 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005087)
5088
5089xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005090 name = "sse41_ukernels_test_mode",
5091 hdrs = INTERNAL_HDRS,
5092 copts = [
5093 "-UNDEBUG",
5094 "-DXNN_TEST_MODE=1",
5095 ],
5096 gcc_copts = xnnpack_gcc_std_copts(),
5097 gcc_x86_copts = ["-msse4.1"],
5098 msvc_copts = xnnpack_msvc_std_copts(),
5099 msvc_x86_32_copts = ["/arch:SSE2"],
5100 x86_srcs = SSE41_UKERNELS,
5101 deps = [
5102 ":tables",
5103 "@FP16",
5104 "@pthreadpool",
5105 ],
5106)
5107
5108xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005109 name = "avx_ukernels",
5110 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005111 gcc_copts = xnnpack_gcc_std_copts(),
5112 gcc_x86_copts = ["-mavx"],
5113 msvc_copts = xnnpack_msvc_std_copts(),
5114 msvc_x86_32_copts = ["/arch:AVX"],
5115 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005116 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005117 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005118 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005119 "@FP16",
5120 "@pthreadpool",
5121 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005122)
5123
5124xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005125 name = "avx_ukernels_test_mode",
5126 hdrs = INTERNAL_HDRS,
5127 copts = [
5128 "-UNDEBUG",
5129 "-DXNN_TEST_MODE=1",
5130 ],
5131 gcc_copts = xnnpack_gcc_std_copts(),
5132 gcc_x86_copts = ["-mavx"],
5133 msvc_copts = xnnpack_msvc_std_copts(),
5134 msvc_x86_32_copts = ["/arch:AVX"],
5135 msvc_x86_64_copts = ["/arch:AVX"],
5136 x86_srcs = AVX_UKERNELS,
5137 deps = [
5138 ":tables",
5139 "@FP16",
5140 "@pthreadpool",
5141 ],
5142)
5143
5144xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005145 name = "xop_ukernels",
5146 hdrs = INTERNAL_HDRS,
5147 gcc_copts = xnnpack_gcc_std_copts(),
5148 gcc_x86_copts = ["-mxop"],
5149 msvc_copts = xnnpack_msvc_std_copts(),
5150 msvc_x86_32_copts = ["/arch:AVX"],
5151 msvc_x86_64_copts = ["/arch:AVX"],
5152 x86_srcs = XOP_UKERNELS,
5153 deps = [
5154 ":tables",
5155 "@FP16",
5156 "@pthreadpool",
5157 ],
5158)
5159
5160xnnpack_cc_library(
5161 name = "xop_ukernels_test_mode",
5162 hdrs = INTERNAL_HDRS,
5163 copts = [
5164 "-UNDEBUG",
5165 "-DXNN_TEST_MODE=1",
5166 ],
5167 gcc_copts = xnnpack_gcc_std_copts(),
5168 gcc_x86_copts = ["-mxop"],
5169 msvc_copts = xnnpack_msvc_std_copts(),
5170 msvc_x86_32_copts = ["/arch:AVX"],
5171 msvc_x86_64_copts = ["/arch:AVX"],
5172 x86_srcs = XOP_UKERNELS,
5173 deps = [
5174 ":tables",
5175 "@FP16",
5176 "@pthreadpool",
5177 ],
5178)
5179
5180xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005181 name = "fma3_ukernels",
5182 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005183 gcc_copts = xnnpack_gcc_std_copts(),
5184 gcc_x86_copts = ["-mfma"],
5185 msvc_copts = xnnpack_msvc_std_copts(),
5186 msvc_x86_32_copts = ["/arch:AVX"],
5187 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005188 x86_srcs = FMA3_UKERNELS,
5189 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005190 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005191 "@FP16",
5192 "@pthreadpool",
5193 ],
5194)
5195
5196xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005197 name = "fma3_ukernels_test_mode",
5198 hdrs = INTERNAL_HDRS,
5199 copts = [
5200 "-UNDEBUG",
5201 "-DXNN_TEST_MODE=1",
5202 ],
5203 gcc_copts = xnnpack_gcc_std_copts(),
5204 gcc_x86_copts = ["-mfma"],
5205 msvc_copts = xnnpack_msvc_std_copts(),
5206 msvc_x86_32_copts = ["/arch:AVX"],
5207 msvc_x86_64_copts = ["/arch:AVX"],
5208 x86_srcs = FMA3_UKERNELS,
5209 deps = [
5210 ":tables",
5211 "@FP16",
5212 "@pthreadpool",
5213 ],
5214)
5215
5216xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005217 name = "avx2_ukernels",
5218 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005219 gcc_copts = xnnpack_gcc_std_copts(),
5220 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005221 "-mfma",
5222 "-mavx2",
5223 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005224 msvc_copts = xnnpack_msvc_std_copts(),
5225 msvc_x86_32_copts = ["/arch:AVX2"],
5226 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005227 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005228 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005229 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005230 "@FP16",
5231 "@pthreadpool",
5232 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005233)
5234
5235xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005236 name = "avx2_ukernels_test_mode",
5237 hdrs = INTERNAL_HDRS,
5238 copts = [
5239 "-UNDEBUG",
5240 "-DXNN_TEST_MODE=1",
5241 ],
5242 gcc_copts = xnnpack_gcc_std_copts(),
5243 gcc_x86_copts = [
5244 "-mfma",
5245 "-mavx2",
5246 ],
5247 msvc_copts = xnnpack_msvc_std_copts(),
5248 msvc_x86_32_copts = ["/arch:AVX2"],
5249 msvc_x86_64_copts = ["/arch:AVX2"],
5250 x86_srcs = AVX2_UKERNELS,
5251 deps = [
5252 ":tables",
5253 "@FP16",
5254 "@pthreadpool",
5255 ],
5256)
5257
5258xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005259 name = "avx512f_ukernels",
5260 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005261 gcc_copts = xnnpack_gcc_std_copts(),
5262 gcc_x86_copts = ["-mavx512f"],
5263 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5264 msvc_copts = xnnpack_msvc_std_copts(),
5265 msvc_x86_32_copts = ["/arch:AVX512"],
5266 msvc_x86_64_copts = ["/arch:AVX512"],
5267 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005268 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005269 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005270 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005271 "@FP16",
5272 "@pthreadpool",
5273 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005274)
5275
5276xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005277 name = "avx512f_ukernels_test_mode",
5278 hdrs = INTERNAL_HDRS,
5279 copts = [
5280 "-UNDEBUG",
5281 "-DXNN_TEST_MODE=1",
5282 ],
5283 gcc_copts = xnnpack_gcc_std_copts(),
5284 gcc_x86_copts = ["-mavx512f"],
5285 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5286 msvc_copts = xnnpack_msvc_std_copts(),
5287 msvc_x86_32_copts = ["/arch:AVX512"],
5288 msvc_x86_64_copts = ["/arch:AVX512"],
5289 msys_copts = ["-fno-asynchronous-unwind-tables"],
5290 x86_srcs = AVX512F_UKERNELS,
5291 deps = [
5292 ":tables",
5293 "@FP16",
5294 "@pthreadpool",
5295 ],
5296)
5297
5298xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005299 name = "avx512skx_ukernels",
5300 hdrs = INTERNAL_HDRS,
5301 gcc_copts = xnnpack_gcc_std_copts(),
5302 gcc_x86_copts = [
5303 "-mavx512f",
5304 "-mavx512cd",
5305 "-mavx512bw",
5306 "-mavx512dq",
5307 "-mavx512vl",
5308 ],
5309 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5310 msvc_copts = xnnpack_msvc_std_copts(),
5311 msvc_x86_32_copts = ["/arch:AVX512"],
5312 msvc_x86_64_copts = ["/arch:AVX512"],
5313 msys_copts = ["-fno-asynchronous-unwind-tables"],
5314 x86_srcs = AVX512SKX_UKERNELS,
5315 deps = [
5316 ":tables",
5317 "@FP16",
5318 "@pthreadpool",
5319 ],
5320)
5321
5322xnnpack_cc_library(
5323 name = "avx512skx_ukernels_test_mode",
5324 hdrs = INTERNAL_HDRS,
5325 copts = [
5326 "-UNDEBUG",
5327 "-DXNN_TEST_MODE=1",
5328 ],
5329 gcc_copts = xnnpack_gcc_std_copts(),
5330 gcc_x86_copts = [
5331 "-mavx512f",
5332 "-mavx512cd",
5333 "-mavx512bw",
5334 "-mavx512dq",
5335 "-mavx512vl",
5336 ],
5337 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5338 msvc_copts = xnnpack_msvc_std_copts(),
5339 msvc_x86_32_copts = ["/arch:AVX512"],
5340 msvc_x86_64_copts = ["/arch:AVX512"],
5341 msys_copts = ["-fno-asynchronous-unwind-tables"],
5342 x86_srcs = AVX512SKX_UKERNELS,
5343 deps = [
5344 ":tables",
5345 "@FP16",
5346 "@pthreadpool",
5347 ],
5348)
5349
5350xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005351 name = "asm_ukernels",
5352 hdrs = ["src/xnnpack/assembly.h"],
5353 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005354 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005355 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005356 wasm_srcs = WASM32_ASM_UKERNELS,
5357 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005358)
5359
Marat Dukhan3b59de22020-06-03 20:15:19 -07005360xnnpack_cc_library(
5361 name = "logging_utils",
5362 srcs = LOGGING_SRCS,
5363 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5364 copts = LOGGING_COPTS + [
5365 "-Isrc",
5366 "-Iinclude",
5367 ] + select({
5368 ":debug_build": [],
5369 "//conditions:default": xnnpack_min_size_copts(),
5370 }),
5371 gcc_copts = xnnpack_gcc_std_copts(),
5372 msvc_copts = xnnpack_msvc_std_copts(),
5373 visibility = xnnpack_visibility(),
5374 deps = [
5375 "@FP16",
5376 "@clog",
5377 "@pthreadpool",
5378 ],
5379)
5380
Marat Dukhan08c4a432019-10-03 09:29:21 -07005381xnnpack_aggregate_library(
5382 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005383 aarch32_ios_deps = [
5384 ":neon_ukernels",
5385 ":neonfma_ukernels",
5386 ":neonv8_ukernels",
5387 ":asm_ukernels",
5388 ],
5389 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005390 ":neon_ukernels",
5391 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005392 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005393 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005394 ":asm_ukernels",
5395 ],
5396 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005397 ":neon_ukernels",
5398 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005399 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005400 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005401 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005402 ":asm_ukernels",
5403 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005404 generic_deps = [
5405 ":scalar_ukernels",
5406 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005407 wasm_deps = [
5408 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005409 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005410 ],
5411 wasmsimd_deps = [
5412 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005413 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005414 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005415 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005416 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005417 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005418 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005419 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005420 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005421 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005422 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005423 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005424 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005425 ],
5426)
5427
Marat Dukhan33fcf782020-05-24 14:27:15 -07005428xnnpack_aggregate_library(
5429 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005430 aarch32_ios_deps = [
5431 ":neon_ukernels_test_mode",
5432 ":neonfma_ukernels_test_mode",
5433 ":neonv8_ukernels_test_mode",
5434 ":asm_ukernels",
5435 ],
5436 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005437 ":neon_ukernels_test_mode",
5438 ":neonfma_ukernels_test_mode",
5439 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005440 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005441 ":asm_ukernels",
5442 ],
5443 aarch64_deps = [
5444 ":neon_ukernels_test_mode",
5445 ":neonfma_ukernels_test_mode",
5446 ":neonv8_ukernels_test_mode",
5447 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005448 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005449 ":asm_ukernels",
5450 ],
5451 generic_deps = [
5452 ":scalar_ukernels_test_mode",
5453 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005454 wasm_deps = [
5455 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005456 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005457 ],
5458 wasmsimd_deps = [
5459 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005460 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005461 ],
5462 x86_deps = [
5463 ":sse2_ukernels_test_mode",
5464 ":ssse3_ukernels_test_mode",
5465 ":sse41_ukernels_test_mode",
5466 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005467 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005468 ":fma3_ukernels_test_mode",
5469 ":avx2_ukernels_test_mode",
5470 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005471 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005472 ],
5473)
5474
Marat Dukhan08c4a432019-10-03 09:29:21 -07005475xnnpack_cc_library(
5476 name = "im2col",
5477 srcs = ["src/im2col.c"],
5478 hdrs = [
5479 "src/xnnpack/common.h",
5480 "src/xnnpack/im2col.h",
5481 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005482 gcc_copts = xnnpack_gcc_std_copts(),
5483 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005484)
5485
5486xnnpack_cc_library(
5487 name = "indirection",
5488 srcs = ["src/indirection.c"],
5489 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005490 gcc_copts = xnnpack_gcc_std_copts(),
5491 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005492 deps = [
5493 "@FP16",
5494 "@FXdiv",
5495 "@pthreadpool",
5496 ],
5497)
5498
5499xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005500 name = "indirection_test_mode",
5501 srcs = ["src/indirection.c"],
5502 hdrs = INTERNAL_HDRS,
5503 copts = [
5504 "-UNDEBUG",
5505 "-DXNN_TEST_MODE=1",
5506 ],
5507 gcc_copts = xnnpack_gcc_std_copts(),
5508 msvc_copts = xnnpack_msvc_std_copts(),
5509 deps = [
5510 "@FP16",
5511 "@FXdiv",
5512 "@pthreadpool",
5513 ],
5514)
5515
5516xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005517 name = "packing",
5518 srcs = ["src/packing.c"],
5519 hdrs = INTERNAL_HDRS,
5520 gcc_copts = xnnpack_gcc_std_copts(),
5521 msvc_copts = xnnpack_msvc_std_copts(),
5522 deps = [
5523 "@FP16",
5524 "@FXdiv",
5525 "@pthreadpool",
5526 ],
5527)
5528
5529xnnpack_cc_library(
5530 name = "packing_test_mode",
5531 srcs = ["src/packing.c"],
5532 hdrs = INTERNAL_HDRS,
5533 copts = [
5534 "-UNDEBUG",
5535 "-DXNN_TEST_MODE=1",
5536 ],
5537 gcc_copts = xnnpack_gcc_std_copts(),
5538 msvc_copts = xnnpack_msvc_std_copts(),
5539 deps = [
5540 "@FP16",
5541 "@FXdiv",
5542 "@pthreadpool",
5543 ],
5544)
5545
5546xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005547 name = "operator_run",
5548 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005549 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005550 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005551 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5552 "//conditions:default": [],
5553 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005554 gcc_copts = xnnpack_gcc_std_copts(),
5555 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005556 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005557 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005558 "@FP16",
5559 "@FXdiv",
5560 "@clog",
5561 "@pthreadpool",
5562 ],
5563)
5564
Chao Mei6ddfc602020-05-13 22:29:36 -07005565xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005566 name = "operator_run_test_mode",
5567 srcs = ["src/operator-run.c"],
5568 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5569 copts = LOGGING_COPTS + [
5570 "-UNDEBUG",
5571 "-DXNN_TEST_MODE=1",
5572 ] + select({
5573 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5574 "//conditions:default": [],
5575 }),
5576 gcc_copts = xnnpack_gcc_std_copts(),
5577 msvc_copts = xnnpack_msvc_std_copts(),
5578 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005579 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005580 "@FP16",
5581 "@FXdiv",
5582 "@clog",
5583 "@pthreadpool",
5584 ],
5585)
5586
5587xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005588 name = "memory_planner",
5589 srcs = ["src/memory-planner.c"],
5590 hdrs = INTERNAL_HDRS,
5591 defines = select({
5592 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5593 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5594 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5595 }),
5596 gcc_copts = xnnpack_gcc_std_copts(),
5597 msvc_copts = xnnpack_msvc_std_copts(),
5598 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005599 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005600 "@pthreadpool",
5601 ],
5602)
5603
Marat Dukhan33fcf782020-05-24 14:27:15 -07005604xnnpack_cc_library(
5605 name = "memory_planner_test_mode",
5606 srcs = ["src/memory-planner.c"],
5607 hdrs = INTERNAL_HDRS,
5608 copts = [
5609 "-UNDEBUG",
5610 "-DXNN_TEST_MODE=1",
5611 ],
5612 defines = select({
5613 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5614 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5615 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5616 }),
5617 gcc_copts = xnnpack_gcc_std_copts(),
5618 msvc_copts = xnnpack_msvc_std_copts(),
5619 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005620 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005621 "@pthreadpool",
5622 ],
5623)
5624
Marat Dukhan08c4a432019-10-03 09:29:21 -07005625cc_library(
5626 name = "enable_assembly",
5627 defines = select({
5628 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5629 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005630 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005631 }),
5632)
5633
Marat Dukhan9de90e02020-06-18 16:04:12 -07005634cc_library(
5635 name = "enable_sparse",
5636 defines = select({
5637 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5638 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005639 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005640 }),
5641)
5642
Marat Dukhancf056b22019-10-07 10:26:29 -07005643xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005644 name = "operators",
5645 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005646 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005647 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005648 ],
5649 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005650 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005651 "-Isrc",
5652 "-Iinclude",
5653 ] + select({
5654 ":debug_build": [],
5655 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005656 }) + select({
5657 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5658 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005659 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005660 gcc_copts = xnnpack_gcc_std_copts(),
5661 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005662 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005663 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005664 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005665 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005666 "@FP16",
5667 "@FXdiv",
5668 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005669 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005670 ],
5671)
5672
Marat Dukhan10a38082020-04-17 03:58:35 -07005673xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005674 name = "operators_test_mode",
5675 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005676 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005677 "src/operator-delete.c",
5678 ],
5679 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5680 copts = LOGGING_COPTS + [
5681 "-Isrc",
5682 "-Iinclude",
5683 "-UNDEBUG",
5684 "-DXNN_TEST_MODE=1",
5685 ] + select({
5686 ":debug_build": [],
5687 "//conditions:default": xnnpack_min_size_copts(),
5688 }) + select({
5689 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5690 "//conditions:default": [],
5691 }),
5692 gcc_copts = xnnpack_gcc_std_copts(),
5693 msvc_copts = xnnpack_msvc_std_copts(),
5694 deps = [
5695 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005696 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005697 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005698 "@FP16",
5699 "@FXdiv",
5700 "@clog",
5701 "@pthreadpool",
5702 ],
5703)
5704
5705xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005706 name = "XNNPACK",
5707 srcs = [
5708 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005709 "src/runtime.c",
5710 "src/subgraph.c",
5711 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005712 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005713 hdrs = ["include/xnnpack.h"],
5714 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005715 "-Isrc",
5716 "-Iinclude",
5717 ] + select({
5718 ":debug_build": [],
5719 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005720 }) + select({
5721 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5722 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005723 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005724 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005725 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005726 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005727 visibility = xnnpack_visibility(),
5728 deps = [
5729 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005730 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005731 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005732 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005733 ":operator_run",
5734 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005735 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005736 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005737 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005738 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005739 ] + select({
5740 ":emscripten": [],
5741 "//conditions:default": ["@cpuinfo"],
5742 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005743)
5744
Marat Dukhan10a38082020-04-17 03:58:35 -07005745xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005746 name = "XNNPACK_test_mode",
5747 srcs = [
5748 "src/init.c",
5749 "src/runtime.c",
5750 "src/subgraph.c",
5751 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005752 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005753 hdrs = ["include/xnnpack.h"],
5754 copts = LOGGING_COPTS + [
5755 "-Isrc",
5756 "-Iinclude",
5757 "-UNDEBUG",
5758 "-DXNN_TEST_MODE=1",
5759 ] + select({
5760 ":debug_build": [],
5761 "//conditions:default": xnnpack_min_size_copts(),
5762 }) + select({
5763 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5764 "//conditions:default": [],
5765 }),
5766 gcc_copts = xnnpack_gcc_std_copts(),
5767 includes = ["include"],
5768 msvc_copts = xnnpack_msvc_std_copts(),
5769 visibility = xnnpack_visibility(),
5770 deps = [
5771 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005772 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005773 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005774 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005775 ":operator_run_test_mode",
5776 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005777 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005778 "@clog",
5779 "@FP16",
5780 "@pthreadpool",
5781 ] + select({
5782 ":emscripten": [],
5783 "//conditions:default": ["@cpuinfo"],
5784 }),
5785)
5786
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005787# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5788# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005789xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005790 name = "xnnpack_for_tflite",
5791 srcs = [
5792 "src/init.c",
5793 "src/runtime.c",
5794 "src/subgraph.c",
5795 "src/tensor.c",
5796 ] + SUBGRAPH_SRCS,
5797 hdrs = ["include/xnnpack.h"],
5798 copts = LOGGING_COPTS + [
5799 "-Isrc",
5800 "-Iinclude",
5801 ] + select({
5802 ":debug_build": [],
5803 "//conditions:default": xnnpack_min_size_copts(),
5804 }) + select({
5805 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5806 "//conditions:default": [],
5807 }),
5808 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005809 "XNN_NO_U8_OPERATORS",
5810 "XNN_NO_X8_OPERATORS",
5811 "XNN_NO_F16_OPERATORS",
5812 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005813 ] + select({
5814 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005815 ":xnn_enable_qs8_explicit_false": [
5816 "XNN_NO_QC8_OPERATORS",
5817 "XNN_NO_QS8_OPERATORS",
5818 ],
5819 "//conditions:default": [
5820 "XNN_NO_QC8_OPERATORS",
5821 "XNN_NO_QS8_OPERATORS",
5822 ],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07005823 }) + select({
5824 ":xnn_enable_qu8_explicit_true": [],
5825 ":xnn_enable_qu8_explicit_false": [
5826 "XNN_NO_QU8_OPERATORS",
5827 ],
5828 "//conditions:default": [
5829 "XNN_NO_QU8_OPERATORS",
5830 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005831 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005832 gcc_copts = xnnpack_gcc_std_copts(),
5833 includes = ["include"],
5834 msvc_copts = xnnpack_msvc_std_copts(),
5835 visibility = xnnpack_visibility(),
5836 deps = [
5837 ":enable_assembly",
5838 ":enable_sparse",
5839 ":logging_utils",
5840 ":memory_planner",
5841 ":operator_run",
5842 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005843 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005844 "@clog",
5845 "@FP16",
5846 "@pthreadpool",
5847 ] + select({
5848 ":emscripten": [],
5849 "//conditions:default": ["@cpuinfo"],
5850 }),
5851)
5852
5853# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5854# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5855xnnpack_cc_library(
5856 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005857 srcs = [
5858 "src/init.c",
5859 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005860 hdrs = ["include/xnnpack.h"],
5861 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005862 "-Isrc",
5863 "-Iinclude",
5864 ] + select({
5865 ":debug_build": [],
5866 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005867 }) + select({
5868 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5869 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005870 }),
5871 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005872 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005873 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005874 "XNN_NO_U8_OPERATORS",
5875 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005876 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005877 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005878 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005879 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005880 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005881 visibility = xnnpack_visibility(),
5882 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005883 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005884 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005885 ":operator_run",
5886 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005887 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005888 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005889 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005890 ] + select({
5891 ":emscripten": [],
5892 "//conditions:default": ["@cpuinfo"],
5893 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005894)
5895
Marat Dukhancf056b22019-10-07 10:26:29 -07005896xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005897 name = "bench_utils",
5898 srcs = ["bench/utils.cc"],
5899 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005900 deps = [
5901 "@com_google_benchmark//:benchmark",
5902 "@cpuinfo",
5903 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005904)
5905
Frank Barchard7e955972019-10-11 10:34:25 -07005906######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005907
5908xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005909 name = "qs8_gemm_bench",
5910 srcs = [
5911 "bench/gemm.h",
5912 "bench/qs8-gemm.cc",
5913 "src/xnnpack/AlignedAllocator.h",
5914 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005915 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5916 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005917)
5918
5919xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005920 name = "qs8_requantization_bench",
5921 srcs = [
5922 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005923 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005924 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005925 ] + MICROKERNEL_BENCHMARK_HDRS,
5926 deps = MICROKERNEL_BENCHMARK_DEPS,
5927)
5928
5929xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005930 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005931 srcs = [
5932 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005933 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005934 "src/xnnpack/AlignedAllocator.h",
5935 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005936 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005937 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005938)
5939
5940xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005941 name = "qu8_requantization_bench",
5942 srcs = [
5943 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005944 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005945 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005946 ] + MICROKERNEL_BENCHMARK_HDRS,
5947 deps = MICROKERNEL_BENCHMARK_DEPS,
5948)
5949
5950xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005951 name = "f16_igemm_bench",
5952 srcs = [
5953 "bench/f16-igemm.cc",
5954 "bench/conv.h",
5955 "bench/google/conv.h",
5956 "src/xnnpack/AlignedAllocator.h",
5957 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005958 deps = MICROKERNEL_BENCHMARK_DEPS + [
5959 ":indirection",
5960 ":packing",
5961 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005962)
5963
5964xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005965 name = "f16_gemm_bench",
5966 srcs = [
5967 "bench/f16-gemm.cc",
5968 "bench/gemm.h",
5969 "src/xnnpack/AlignedAllocator.h",
5970 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005971 deps = MICROKERNEL_BENCHMARK_DEPS + [
5972 ":packing",
5973 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005974)
5975
5976xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005977 name = "f16_spmm_bench",
5978 srcs = [
5979 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005980 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005981 "src/xnnpack/AlignedAllocator.h",
5982 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005983 deps = MICROKERNEL_BENCHMARK_DEPS,
5984)
5985
5986xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005987 name = "f16_vrelu_bench",
5988 srcs = [
5989 "bench/f16-vrelu.cc",
5990 "src/xnnpack/AlignedAllocator.h",
5991 ] + MICROKERNEL_BENCHMARK_HDRS,
5992 deps = MICROKERNEL_BENCHMARK_DEPS,
5993)
5994
5995xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005996 name = "f32_igemm_bench",
5997 srcs = [
5998 "bench/f32-igemm.cc",
5999 "bench/conv.h",
6000 "src/xnnpack/AlignedAllocator.h",
6001 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006002 deps = MICROKERNEL_BENCHMARK_DEPS + [
6003 ":indirection",
6004 ":packing",
6005 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006006)
6007
6008xnnpack_benchmark(
6009 name = "f32_conv_hwc_bench",
6010 srcs = [
6011 "bench/f32-conv-hwc.cc",
6012 "bench/dconv.h",
6013 "src/xnnpack/AlignedAllocator.h",
6014 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006015 deps = MICROKERNEL_BENCHMARK_DEPS + [
6016 ":packing",
6017 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006018)
6019
6020xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006021 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07006022 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006023 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07006024 "bench/dconv.h",
6025 "src/xnnpack/AlignedAllocator.h",
6026 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006027 deps = MICROKERNEL_BENCHMARK_DEPS + [
6028 ":packing",
6029 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07006030)
6031
6032xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07006033 name = "f16_dwconv_bench",
6034 srcs = [
6035 "bench/f16-dwconv.cc",
6036 "bench/dwconv.h",
6037 "bench/google/dwconv.h",
6038 "src/xnnpack/AlignedAllocator.h",
6039 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006040 deps = MICROKERNEL_BENCHMARK_DEPS + [
6041 ":indirection",
6042 ":packing",
6043 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07006044)
6045
6046xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006047 name = "f32_dwconv_bench",
6048 srcs = [
6049 "bench/f32-dwconv.cc",
6050 "bench/dwconv.h",
6051 "src/xnnpack/AlignedAllocator.h",
6052 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006053 deps = MICROKERNEL_BENCHMARK_DEPS + [
6054 ":indirection",
6055 ":packing",
6056 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006057)
6058
6059xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006060 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006061 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006062 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006063 "bench/dwconv.h",
6064 "src/xnnpack/AlignedAllocator.h",
6065 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006066 deps = MICROKERNEL_BENCHMARK_DEPS + [
6067 ":indirection",
6068 ":packing",
6069 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006070)
6071
6072xnnpack_benchmark(
6073 name = "f32_gemm_bench",
6074 srcs = [
6075 "bench/f32-gemm.cc",
6076 "bench/gemm.h",
6077 "src/xnnpack/AlignedAllocator.h",
6078 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006079 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006080 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006081)
6082
6083xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006084 name = "f32_raddexpminusmax_bench",
6085 srcs = [
6086 "bench/f32-raddexpminusmax.cc",
6087 "src/xnnpack/AlignedAllocator.h",
6088 ] + MICROKERNEL_BENCHMARK_HDRS,
6089 deps = MICROKERNEL_BENCHMARK_DEPS,
6090)
6091
6092xnnpack_benchmark(
6093 name = "f32_raddextexp_bench",
6094 srcs = [
6095 "bench/f32-raddextexp.cc",
6096 "src/xnnpack/AlignedAllocator.h",
6097 ] + MICROKERNEL_BENCHMARK_HDRS,
6098 deps = MICROKERNEL_BENCHMARK_DEPS,
6099)
6100
6101xnnpack_benchmark(
6102 name = "f32_raddstoreexpminusmax_bench",
6103 srcs = [
6104 "bench/f32-raddstoreexpminusmax.cc",
6105 "src/xnnpack/AlignedAllocator.h",
6106 ] + MICROKERNEL_BENCHMARK_HDRS,
6107 deps = MICROKERNEL_BENCHMARK_DEPS,
6108)
6109
6110xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006111 name = "f32_rmax_bench",
6112 srcs = [
6113 "bench/f32-rmax.cc",
6114 "src/xnnpack/AlignedAllocator.h",
6115 ] + MICROKERNEL_BENCHMARK_HDRS,
6116 deps = MICROKERNEL_BENCHMARK_DEPS,
6117)
6118
6119xnnpack_benchmark(
6120 name = "f32_spmm_bench",
6121 srcs = [
6122 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006123 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006124 "src/xnnpack/AlignedAllocator.h",
6125 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006126 deps = MICROKERNEL_BENCHMARK_DEPS,
6127)
6128
6129xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006130 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006131 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006132 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006133 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006134 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006135 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006136)
6137
6138xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006139 name = "f32_velu_bench",
6140 srcs = [
6141 "bench/f32-velu.cc",
6142 "src/xnnpack/AlignedAllocator.h",
6143 ] + MICROKERNEL_BENCHMARK_HDRS,
6144 deps = MICROKERNEL_BENCHMARK_DEPS,
6145)
6146
6147xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006148 name = "f32_vhswish_bench",
6149 srcs = [
6150 "bench/f32-vhswish.cc",
6151 "src/xnnpack/AlignedAllocator.h",
6152 ] + MICROKERNEL_BENCHMARK_HDRS,
6153 deps = MICROKERNEL_BENCHMARK_DEPS,
6154)
6155
6156xnnpack_benchmark(
6157 name = "f32_vrelu_bench",
6158 srcs = [
6159 "bench/f32-vrelu.cc",
6160 "src/xnnpack/AlignedAllocator.h",
6161 ] + MICROKERNEL_BENCHMARK_HDRS,
6162 deps = MICROKERNEL_BENCHMARK_DEPS,
6163)
6164
6165xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006166 name = "f32_vscaleexpminusmax_bench",
6167 srcs = [
6168 "bench/f32-vscaleexpminusmax.cc",
6169 "src/xnnpack/AlignedAllocator.h",
6170 ] + MICROKERNEL_BENCHMARK_HDRS,
6171 deps = MICROKERNEL_BENCHMARK_DEPS,
6172)
6173
6174xnnpack_benchmark(
6175 name = "f32_vscaleextexp_bench",
6176 srcs = [
6177 "bench/f32-vscaleextexp.cc",
6178 "src/xnnpack/AlignedAllocator.h",
6179 ] + MICROKERNEL_BENCHMARK_HDRS,
6180 deps = MICROKERNEL_BENCHMARK_DEPS,
6181)
6182
6183xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006184 name = "f32_vsigmoid_bench",
6185 srcs = [
6186 "bench/f32-vsigmoid.cc",
6187 "src/xnnpack/AlignedAllocator.h",
6188 ] + MICROKERNEL_BENCHMARK_HDRS,
6189 deps = MICROKERNEL_BENCHMARK_DEPS,
6190)
6191
6192xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006193 name = "f32_vsqrt_bench",
6194 srcs = [
6195 "bench/f32-vsqrt.cc",
6196 "src/xnnpack/AlignedAllocator.h",
6197 ] + MICROKERNEL_BENCHMARK_HDRS,
6198 deps = MICROKERNEL_BENCHMARK_DEPS,
6199)
6200
6201xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006202 name = "f32_im2col_gemm_bench",
6203 srcs = [
6204 "bench/f32-im2col-gemm.cc",
6205 "bench/conv.h",
6206 "src/xnnpack/AlignedAllocator.h",
6207 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006208 deps = MICROKERNEL_BENCHMARK_DEPS + [
6209 ":im2col",
6210 ":packing",
6211 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006212)
6213
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006214xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006215 name = "rounding_bench",
6216 srcs = [
6217 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006218 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006219 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006220 ] + MICROKERNEL_BENCHMARK_HDRS,
6221 deps = MICROKERNEL_BENCHMARK_DEPS,
6222)
6223
Marat Dukhan08c4a432019-10-03 09:29:21 -07006224########################### Benchmarks for operators ###########################
6225
6226xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006227 name = "average_pooling_bench",
6228 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006229 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006230 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006231 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006232)
6233
6234xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006235 name = "bankers_rounding_bench",
6236 srcs = ["bench/bankers-rounding.cc"],
6237 copts = xnnpack_optional_tflite_copts(),
6238 tags = ["nowin32"],
6239 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6240)
6241
6242xnnpack_benchmark(
6243 name = "ceiling_bench",
6244 srcs = ["bench/ceiling.cc"],
6245 copts = xnnpack_optional_tflite_copts(),
6246 tags = ["nowin32"],
6247 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6248)
6249
6250xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006251 name = "channel_shuffle_bench",
6252 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006253 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006254)
6255
6256xnnpack_benchmark(
6257 name = "convolution_bench",
6258 srcs = ["bench/convolution.cc"],
6259 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006260 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006261 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006262)
6263
6264xnnpack_benchmark(
6265 name = "deconvolution_bench",
6266 srcs = ["bench/deconvolution.cc"],
6267 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006268 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006269 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006270)
6271
6272xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006273 name = "elu_bench",
6274 srcs = ["bench/elu.cc"],
6275 copts = xnnpack_optional_tflite_copts(),
6276 tags = ["nowin32"],
6277 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6278)
6279
6280xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006281 name = "floor_bench",
6282 srcs = ["bench/floor.cc"],
6283 copts = xnnpack_optional_tflite_copts(),
6284 tags = ["nowin32"],
6285 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6286)
6287
6288xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006289 name = "global_average_pooling_bench",
6290 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006291 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006292)
6293
6294xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006295 name = "hardswish_bench",
6296 srcs = ["bench/hardswish.cc"],
6297 copts = xnnpack_optional_tflite_copts(),
6298 tags = ["nowin32"],
6299 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6300)
6301
6302xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006303 name = "max_pooling_bench",
6304 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006305 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006306)
6307
6308xnnpack_benchmark(
6309 name = "sigmoid_bench",
6310 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006311 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006312 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006313 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006314)
6315
6316xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006317 name = "prelu_bench",
6318 srcs = ["bench/prelu.cc"],
6319 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006320 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006321 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006322)
6323
6324xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006325 name = "softmax_bench",
6326 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006327 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006328 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006329 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006330)
6331
Marat Dukhan87727142020-06-24 15:24:10 -07006332xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006333 name = "square_root_bench",
6334 srcs = ["bench/square-root.cc"],
6335 copts = xnnpack_optional_tflite_copts(),
6336 tags = ["nowin32"],
6337 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6338)
6339
6340xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006341 name = "truncation_bench",
6342 srcs = ["bench/truncation.cc"],
6343 deps = OPERATOR_BENCHMARK_DEPS,
6344)
6345
Marat Dukhanc068bb62019-10-04 13:24:39 -07006346############################# End-to-end benchmarks ############################
6347
6348cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006349 name = "fp32_mobilenet_v1",
6350 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006351 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006352 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006353 linkstatic = True,
6354 deps = [
6355 ":XNNPACK",
6356 "@pthreadpool",
6357 ],
6358)
6359
6360cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006361 name = "fp32_sparse_mobilenet_v1",
6362 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6363 hdrs = ["models/models.h"],
6364 copts = xnnpack_std_cxxopts(),
6365 linkstatic = True,
6366 deps = [
6367 ":XNNPACK",
6368 "@pthreadpool",
6369 ],
6370)
6371
6372cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006373 name = "fp16_mobilenet_v1",
6374 srcs = ["models/fp16-mobilenet-v1.cc"],
6375 hdrs = ["models/models.h"],
6376 copts = xnnpack_std_cxxopts(),
6377 linkstatic = True,
6378 deps = [
6379 ":XNNPACK",
6380 "@FP16",
6381 "@pthreadpool",
6382 ],
6383)
6384
6385cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006386 name = "qs8_mobilenet_v1",
6387 srcs = ["models/qs8-mobilenet-v1.cc"],
6388 hdrs = ["models/models.h"],
6389 copts = xnnpack_std_cxxopts(),
6390 linkstatic = True,
6391 deps = [
6392 ":XNNPACK",
6393 "@pthreadpool",
6394 ],
6395)
6396
6397cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006398 name = "qs8_mobilenet_v2",
6399 srcs = ["models/qs8-mobilenet-v2.cc"],
6400 hdrs = ["models/models.h"],
6401 copts = xnnpack_std_cxxopts(),
6402 linkstatic = True,
6403 deps = [
6404 ":XNNPACK",
6405 "@pthreadpool",
6406 ],
6407)
6408
6409cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006410 name = "qu8_mobilenet_v1",
6411 srcs = ["models/qu8-mobilenet-v1.cc"],
6412 hdrs = ["models/models.h"],
6413 copts = xnnpack_std_cxxopts(),
6414 linkstatic = True,
6415 deps = [
6416 ":XNNPACK",
6417 "@pthreadpool",
6418 ],
6419)
6420
6421cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006422 name = "fp32_mobilenet_v2",
6423 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006424 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006425 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006426 linkstatic = True,
6427 deps = [
6428 ":XNNPACK",
6429 "@pthreadpool",
6430 ],
6431)
6432
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006433cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006434 name = "fp32_sparse_mobilenet_v2",
6435 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6436 hdrs = ["models/models.h"],
6437 copts = xnnpack_std_cxxopts(),
6438 linkstatic = True,
6439 deps = [
6440 ":XNNPACK",
6441 "@pthreadpool",
6442 ],
6443)
6444
6445cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006446 name = "fp16_mobilenet_v2",
6447 srcs = ["models/fp16-mobilenet-v2.cc"],
6448 hdrs = ["models/models.h"],
6449 copts = xnnpack_std_cxxopts(),
6450 linkstatic = True,
6451 deps = [
6452 ":XNNPACK",
6453 "@FP16",
6454 "@pthreadpool",
6455 ],
6456)
6457
6458cc_library(
6459 name = "fp32_mobilenet_v3_large",
6460 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006461 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006462 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006463 linkstatic = True,
6464 deps = [
6465 ":XNNPACK",
6466 "@pthreadpool",
6467 ],
6468)
6469
6470cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006471 name = "fp32_sparse_mobilenet_v3_large",
6472 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6473 hdrs = ["models/models.h"],
6474 copts = xnnpack_std_cxxopts(),
6475 linkstatic = True,
6476 deps = [
6477 ":XNNPACK",
6478 "@pthreadpool",
6479 ],
6480)
6481
6482cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006483 name = "fp16_mobilenet_v3_large",
6484 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6485 hdrs = ["models/models.h"],
6486 copts = xnnpack_std_cxxopts(),
6487 linkstatic = True,
6488 deps = [
6489 ":XNNPACK",
6490 "@FP16",
6491 "@pthreadpool",
6492 ],
6493)
6494
6495cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006496 name = "fp32_mobilenet_v3_small",
6497 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006498 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006499 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006500 linkstatic = True,
6501 deps = [
6502 ":XNNPACK",
6503 "@pthreadpool",
6504 ],
6505)
6506
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006507cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006508 name = "fp32_sparse_mobilenet_v3_small",
6509 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6510 hdrs = ["models/models.h"],
6511 copts = xnnpack_std_cxxopts(),
6512 linkstatic = True,
6513 deps = [
6514 ":XNNPACK",
6515 "@pthreadpool",
6516 ],
6517)
6518
6519cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006520 name = "fp16_mobilenet_v3_small",
6521 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6522 hdrs = ["models/models.h"],
6523 copts = xnnpack_std_cxxopts(),
6524 linkstatic = True,
6525 deps = [
6526 ":XNNPACK",
6527 "@FP16",
6528 "@pthreadpool",
6529 ],
6530)
6531
Marat Dukhanc068bb62019-10-04 13:24:39 -07006532xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006533 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006534 srcs = [
6535 "bench/f32-dwconv-e2e.cc",
6536 "bench/end2end.h",
6537 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006538 deps = MICROKERNEL_BENCHMARK_DEPS + [
6539 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006540 ":fp32_mobilenet_v1",
6541 ":fp32_mobilenet_v2",
6542 ":fp32_mobilenet_v3_large",
6543 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006544 ],
6545)
6546
6547xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006548 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006549 srcs = [
6550 "bench/f32-gemm-e2e.cc",
6551 "bench/end2end.h",
6552 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006553 deps = MICROKERNEL_BENCHMARK_DEPS + [
6554 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006555 ":fp32_mobilenet_v1",
6556 ":fp32_mobilenet_v2",
6557 ":fp32_mobilenet_v3_large",
6558 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006559 ],
6560)
6561
6562xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006563 name = "qs8_gemm_e2e_bench",
6564 srcs = [
6565 "bench/qs8-gemm-e2e.cc",
6566 "bench/end2end.h",
6567 ] + MICROKERNEL_BENCHMARK_HDRS,
6568 deps = MICROKERNEL_BENCHMARK_DEPS + [
6569 ":XNNPACK",
6570 ":qs8_mobilenet_v1",
6571 ":qs8_mobilenet_v2",
6572 ],
6573)
6574
6575xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006576 name = "end2end_bench",
6577 srcs = ["bench/end2end.cc"],
6578 deps = [
6579 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006580 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006581 ":fp16_mobilenet_v1",
6582 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006583 ":fp16_mobilenet_v3_large",
6584 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006585 ":fp32_mobilenet_v1",
6586 ":fp32_mobilenet_v2",
6587 ":fp32_mobilenet_v3_large",
6588 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006589 ":fp32_sparse_mobilenet_v1",
6590 ":fp32_sparse_mobilenet_v2",
6591 ":fp32_sparse_mobilenet_v3_large",
6592 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006593 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006594 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006595 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006596 "@pthreadpool",
6597 ],
6598)
6599
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006600#################### Accuracy evaluation for math functions ####################
6601
6602xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006603 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006604 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006605 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006606 "src/xnnpack/AlignedAllocator.h",
6607 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006608 deps = ACCURACY_EVAL_DEPS + [
6609 ":bench_utils",
6610 "@cpuinfo",
6611 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006612)
6613
Marat Dukhan515c9772019-10-17 18:07:57 -07006614xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006615 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006616 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006617 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006618 "src/xnnpack/AlignedAllocator.h",
6619 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006620 deps = ACCURACY_EVAL_DEPS + [
6621 ":bench_utils",
6622 "@cpuinfo",
6623 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006624)
6625
Marat Dukhan98ba4412019-10-23 02:14:28 -07006626xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006627 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006628 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006629 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006630 "src/xnnpack/AlignedAllocator.h",
6631 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006632 deps = ACCURACY_EVAL_DEPS + [
6633 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006634 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006635 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006636)
6637
6638xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006639 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006640 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006641 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006642 "src/xnnpack/AlignedAllocator.h",
6643 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006644 deps = ACCURACY_EVAL_DEPS + [
6645 ":bench_utils",
6646 "@cpuinfo",
6647 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006648)
6649
Marat Dukhanf44f0222020-12-14 11:53:27 -08006650xnnpack_benchmark(
6651 name = "f32_sigmoid_ulp_eval",
6652 srcs = [
6653 "eval/f32-sigmoid-ulp.cc",
6654 "src/xnnpack/AlignedAllocator.h",
6655 ] + ACCURACY_EVAL_HDRS,
6656 deps = ACCURACY_EVAL_DEPS + [
6657 ":bench_utils",
6658 "@cpuinfo",
6659 ],
6660)
6661
6662xnnpack_benchmark(
6663 name = "f32_sqrt_ulp_eval",
6664 srcs = [
6665 "eval/f32-sqrt-ulp.cc",
6666 "src/xnnpack/AlignedAllocator.h",
6667 ] + ACCURACY_EVAL_HDRS,
6668 deps = ACCURACY_EVAL_DEPS + [
6669 ":bench_utils",
6670 "@cpuinfo",
6671 ],
6672)
6673
6674################### Accuracy verification for math functions ##################
6675
6676xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006677 name = "f32_exp_eval",
6678 srcs = [
6679 "eval/f32-exp.cc",
6680 "src/xnnpack/AlignedAllocator.h",
6681 "src/xnnpack/math-stubs.h",
6682 ] + MICROKERNEL_TEST_HDRS,
6683 automatic = False,
6684 deps = MICROKERNEL_TEST_DEPS,
6685)
6686
6687xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006688 name = "f32_expm1minus_eval",
6689 srcs = [
6690 "eval/f32-expm1minus.cc",
6691 "src/xnnpack/AlignedAllocator.h",
6692 "src/xnnpack/math-stubs.h",
6693 ] + MICROKERNEL_TEST_HDRS,
6694 automatic = False,
6695 deps = MICROKERNEL_TEST_DEPS,
6696)
6697
Marat Dukhan8853b822020-05-07 12:19:01 -07006698xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006699 name = "f32_expminus_eval",
6700 srcs = [
6701 "eval/f32-expminus.cc",
6702 "src/xnnpack/AlignedAllocator.h",
6703 "src/xnnpack/math-stubs.h",
6704 ] + MICROKERNEL_TEST_HDRS,
6705 automatic = False,
6706 deps = MICROKERNEL_TEST_DEPS,
6707)
6708
6709xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006710 name = "f32_roundne_eval",
6711 srcs = [
6712 "eval/f32-roundne.cc",
6713 "src/xnnpack/AlignedAllocator.h",
6714 "src/xnnpack/math-stubs.h",
6715 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006716 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006717 deps = MICROKERNEL_TEST_DEPS,
6718)
6719
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006720xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006721 name = "f32_roundd_eval",
6722 srcs = [
6723 "eval/f32-roundd.cc",
6724 "src/xnnpack/AlignedAllocator.h",
6725 "src/xnnpack/math-stubs.h",
6726 ] + MICROKERNEL_TEST_HDRS,
6727 automatic = False,
6728 deps = MICROKERNEL_TEST_DEPS,
6729)
6730
6731xnnpack_unit_test(
6732 name = "f32_roundu_eval",
6733 srcs = [
6734 "eval/f32-roundu.cc",
6735 "src/xnnpack/AlignedAllocator.h",
6736 "src/xnnpack/math-stubs.h",
6737 ] + MICROKERNEL_TEST_HDRS,
6738 automatic = False,
6739 deps = MICROKERNEL_TEST_DEPS,
6740)
6741
6742xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006743 name = "f32_roundz_eval",
6744 srcs = [
6745 "eval/f32-roundz.cc",
6746 "src/xnnpack/AlignedAllocator.h",
6747 "src/xnnpack/math-stubs.h",
6748 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006749 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006750 deps = MICROKERNEL_TEST_DEPS,
6751)
6752
Marat Dukhan08c4a432019-10-03 09:29:21 -07006753######################### Unit tests for micro-kernels #########################
6754
6755xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006756 name = "f16_dwconv_minmax_test",
6757 srcs = [
6758 "test/f16-dwconv-minmax.cc",
6759 "test/dwconv-microkernel-tester.h",
6760 "src/xnnpack/AlignedAllocator.h",
6761 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6762 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6763)
6764
6765xnnpack_unit_test(
6766 name = "f16_gavgpool_minmax_test",
6767 srcs = [
6768 "test/f16-gavgpool-minmax.cc",
6769 "test/gavgpool-microkernel-tester.h",
6770 "src/xnnpack/AlignedAllocator.h",
6771 ] + MICROKERNEL_TEST_HDRS,
6772 deps = MICROKERNEL_TEST_DEPS,
6773)
6774
6775xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006776 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006777 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006778 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006779 "test/gemm-microkernel-tester.h",
6780 "src/xnnpack/AlignedAllocator.h",
6781 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006782 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006783)
6784
6785xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006786 name = "f16_igemm_minmax_test",
6787 srcs = [
6788 "test/f16-igemm-minmax.cc",
6789 "test/gemm-microkernel-tester.h",
6790 "src/xnnpack/AlignedAllocator.h",
6791 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6792 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6793)
6794
6795xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006796 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006797 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006798 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006799 "test/spmm-microkernel-tester.h",
6800 "src/xnnpack/AlignedAllocator.h",
6801 ] + MICROKERNEL_TEST_HDRS,
6802 deps = MICROKERNEL_TEST_DEPS,
6803)
6804
6805xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006806 name = "f16_vadd_minmax_test",
6807 srcs = [
6808 "test/f16-vadd-minmax.cc",
6809 "test/vbinary-microkernel-tester.h",
6810 ] + MICROKERNEL_TEST_HDRS,
6811 deps = MICROKERNEL_TEST_DEPS,
6812)
6813
6814xnnpack_unit_test(
6815 name = "f16_vaddc_minmax_test",
6816 srcs = [
6817 "test/f16-vaddc-minmax.cc",
6818 "test/vbinaryc-microkernel-tester.h",
6819 ] + MICROKERNEL_TEST_HDRS,
6820 deps = MICROKERNEL_TEST_DEPS,
6821)
6822
6823xnnpack_unit_test(
6824 name = "f16_vclamp_test",
6825 srcs = [
6826 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006827 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006828 ] + MICROKERNEL_TEST_HDRS,
6829 deps = MICROKERNEL_TEST_DEPS,
6830)
6831
6832xnnpack_unit_test(
6833 name = "f16_vdiv_minmax_test",
6834 srcs = [
6835 "test/f16-vdiv-minmax.cc",
6836 "test/vbinary-microkernel-tester.h",
6837 ] + MICROKERNEL_TEST_HDRS,
6838 deps = MICROKERNEL_TEST_DEPS,
6839)
6840
6841xnnpack_unit_test(
6842 name = "f16_vdivc_minmax_test",
6843 srcs = [
6844 "test/f16-vdivc-minmax.cc",
6845 "test/vbinaryc-microkernel-tester.h",
6846 ] + MICROKERNEL_TEST_HDRS,
6847 deps = MICROKERNEL_TEST_DEPS,
6848)
6849
6850xnnpack_unit_test(
6851 name = "f16_vrdivc_minmax_test",
6852 srcs = [
6853 "test/f16-vrdivc-minmax.cc",
6854 "test/vbinaryc-microkernel-tester.h",
6855 ] + MICROKERNEL_TEST_HDRS,
6856 deps = MICROKERNEL_TEST_DEPS,
6857)
6858
6859xnnpack_unit_test(
6860 name = "f16_vhswish_test",
6861 srcs = [
6862 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006863 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006864 ] + MICROKERNEL_TEST_HDRS,
6865 deps = MICROKERNEL_TEST_DEPS,
6866)
6867
6868xnnpack_unit_test(
6869 name = "f16_vmax_test",
6870 srcs = [
6871 "test/f16-vmax.cc",
6872 "test/vbinary-microkernel-tester.h",
6873 ] + MICROKERNEL_TEST_HDRS,
6874 deps = MICROKERNEL_TEST_DEPS,
6875)
6876
6877xnnpack_unit_test(
6878 name = "f16_vmaxc_test",
6879 srcs = [
6880 "test/f16-vmaxc.cc",
6881 "test/vbinaryc-microkernel-tester.h",
6882 ] + MICROKERNEL_TEST_HDRS,
6883 deps = MICROKERNEL_TEST_DEPS,
6884)
6885
6886xnnpack_unit_test(
6887 name = "f16_vmin_test",
6888 srcs = [
6889 "test/f16-vmin.cc",
6890 "test/vbinary-microkernel-tester.h",
6891 ] + MICROKERNEL_TEST_HDRS,
6892 deps = MICROKERNEL_TEST_DEPS,
6893)
6894
6895xnnpack_unit_test(
6896 name = "f16_vminc_test",
6897 srcs = [
6898 "test/f16-vminc.cc",
6899 "test/vbinaryc-microkernel-tester.h",
6900 ] + MICROKERNEL_TEST_HDRS,
6901 deps = MICROKERNEL_TEST_DEPS,
6902)
6903
6904xnnpack_unit_test(
6905 name = "f16_vmul_minmax_test",
6906 srcs = [
6907 "test/f16-vmul-minmax.cc",
6908 "test/vbinary-microkernel-tester.h",
6909 ] + MICROKERNEL_TEST_HDRS,
6910 deps = MICROKERNEL_TEST_DEPS,
6911)
6912
6913xnnpack_unit_test(
6914 name = "f16_vmulc_minmax_test",
6915 srcs = [
6916 "test/f16-vmulc-minmax.cc",
6917 "test/vbinaryc-microkernel-tester.h",
6918 ] + MICROKERNEL_TEST_HDRS,
6919 deps = MICROKERNEL_TEST_DEPS,
6920)
6921
6922xnnpack_unit_test(
6923 name = "f16_vmulcaddc_minmax_test",
6924 srcs = [
6925 "test/f16-vmulcaddc-minmax.cc",
6926 "test/vmulcaddc-microkernel-tester.h",
6927 "src/xnnpack/AlignedAllocator.h",
6928 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6929 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6930)
6931
6932xnnpack_unit_test(
6933 name = "f16_vsub_minmax_test",
6934 srcs = [
6935 "test/f16-vsub-minmax.cc",
6936 "test/vbinary-microkernel-tester.h",
6937 ] + MICROKERNEL_TEST_HDRS,
6938 deps = MICROKERNEL_TEST_DEPS,
6939)
6940
6941xnnpack_unit_test(
6942 name = "f16_vsubc_minmax_test",
6943 srcs = [
6944 "test/f16-vsubc-minmax.cc",
6945 "test/vbinaryc-microkernel-tester.h",
6946 ] + MICROKERNEL_TEST_HDRS,
6947 deps = MICROKERNEL_TEST_DEPS,
6948)
6949
6950xnnpack_unit_test(
6951 name = "f16_vrsubc_minmax_test",
6952 srcs = [
6953 "test/f16-vrsubc-minmax.cc",
6954 "test/vbinaryc-microkernel-tester.h",
6955 ] + MICROKERNEL_TEST_HDRS,
6956 deps = MICROKERNEL_TEST_DEPS,
6957)
6958
6959xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006960 name = "f32_argmaxpool_test",
6961 srcs = [
6962 "test/f32-argmaxpool.cc",
6963 "test/argmaxpool-microkernel-tester.h",
6964 "src/xnnpack/AlignedAllocator.h",
6965 ] + MICROKERNEL_TEST_HDRS,
6966 deps = MICROKERNEL_TEST_DEPS,
6967)
6968
6969xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006970 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006971 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006972 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006973 "test/avgpool-microkernel-tester.h",
6974 "src/xnnpack/AlignedAllocator.h",
6975 ] + MICROKERNEL_TEST_HDRS,
6976 deps = MICROKERNEL_TEST_DEPS,
6977)
6978
6979xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006980 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006981 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006982 "test/f32-ibilinear.cc",
6983 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006984 "src/xnnpack/AlignedAllocator.h",
6985 ] + MICROKERNEL_TEST_HDRS,
6986 deps = MICROKERNEL_TEST_DEPS,
6987)
6988
6989xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006990 name = "f32_ibilinear_chw_test",
6991 srcs = [
6992 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006993 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006994 "src/xnnpack/AlignedAllocator.h",
6995 ] + MICROKERNEL_TEST_HDRS,
6996 deps = MICROKERNEL_TEST_DEPS,
6997)
6998
6999xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007000 name = "f32_igemm_test",
7001 srcs = [
7002 "test/f32-igemm.cc",
7003 "test/gemm-microkernel-tester.h",
7004 "src/xnnpack/AlignedAllocator.h",
7005 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007006 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007007)
7008
7009xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007010 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007011 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07007012 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007013 "test/gemm-microkernel-tester.h",
7014 "src/xnnpack/AlignedAllocator.h",
7015 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007016 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007017)
7018
7019xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07007020 name = "f32_igemm_minmax_test",
7021 srcs = [
7022 "test/f32-igemm-minmax.cc",
7023 "test/gemm-microkernel-tester.h",
7024 "src/xnnpack/AlignedAllocator.h",
7025 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007026 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07007027)
7028
7029xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007030 name = "f32_conv_hwc_test",
7031 srcs = [
7032 "test/f32-conv-hwc.cc",
7033 "test/conv-hwc-microkernel-tester.h",
7034 "src/xnnpack/AlignedAllocator.h",
7035 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007036 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007037)
7038
7039xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007040 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007041 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007042 "test/f32-conv-hwc2chw.cc",
7043 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007044 "src/xnnpack/AlignedAllocator.h",
7045 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007046 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007047)
7048
7049xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007050 name = "f32_dwconv_test",
7051 srcs = [
7052 "test/f32-dwconv.cc",
7053 "test/dwconv-microkernel-tester.h",
7054 "src/xnnpack/AlignedAllocator.h",
7055 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007056 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007057)
7058
7059xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007060 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007061 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007062 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007063 "test/dwconv-microkernel-tester.h",
7064 "src/xnnpack/AlignedAllocator.h",
7065 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007066 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007067)
7068
7069xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07007070 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007071 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07007072 "test/f32-dwconv2d-chw.cc",
7073 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007074 "src/xnnpack/AlignedAllocator.h",
7075 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007076 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007077)
7078
7079xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007080 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007081 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007082 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007083 "test/gavgpool-microkernel-tester.h",
7084 "src/xnnpack/AlignedAllocator.h",
7085 ] + MICROKERNEL_TEST_HDRS,
7086 deps = MICROKERNEL_TEST_DEPS,
7087)
7088
7089xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007090 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007091 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007092 "test/f32-gavgpool-cw.cc",
7093 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007094 "src/xnnpack/AlignedAllocator.h",
7095 ] + MICROKERNEL_TEST_HDRS,
7096 deps = MICROKERNEL_TEST_DEPS,
7097)
7098
7099xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007100 name = "f32_gemm_test",
7101 srcs = [
7102 "test/f32-gemm.cc",
7103 "test/gemm-microkernel-tester.h",
7104 "src/xnnpack/AlignedAllocator.h",
7105 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007106 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007107)
7108
7109xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007110 name = "f32_gemm_relu_test",
7111 srcs = [
7112 "test/f32-gemm-relu.cc",
7113 "test/gemm-microkernel-tester.h",
7114 "src/xnnpack/AlignedAllocator.h",
7115 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007116 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007117)
7118
7119xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007120 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007121 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007122 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007123 "test/gemm-microkernel-tester.h",
7124 "src/xnnpack/AlignedAllocator.h",
7125 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007126 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007127)
7128
7129xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007130 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007131 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007132 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007133 "test/gemm-microkernel-tester.h",
7134 "src/xnnpack/AlignedAllocator.h",
7135 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007136 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007137)
7138
7139xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007140 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007141 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007142 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007143 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007144 ] + MICROKERNEL_TEST_HDRS,
7145 deps = MICROKERNEL_TEST_DEPS,
7146)
7147
7148xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007149 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007150 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007151 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007152 "test/maxpool-microkernel-tester.h",
7153 ] + MICROKERNEL_TEST_HDRS,
7154 deps = MICROKERNEL_TEST_DEPS,
7155)
7156
7157xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007158 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007159 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007160 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007161 "test/avgpool-microkernel-tester.h",
7162 "src/xnnpack/AlignedAllocator.h",
7163 ] + MICROKERNEL_TEST_HDRS,
7164 deps = MICROKERNEL_TEST_DEPS,
7165)
7166
7167xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007168 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007169 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007170 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007171 "test/gemm-microkernel-tester.h",
7172 "src/xnnpack/AlignedAllocator.h",
7173 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007174 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007175)
7176
7177xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007178 name = "f16_prelu_test",
7179 srcs = [
7180 "test/f16-prelu.cc",
7181 "test/prelu-microkernel-tester.h",
7182 "src/xnnpack/AlignedAllocator.h",
7183 ] + MICROKERNEL_TEST_HDRS,
7184 deps = MICROKERNEL_TEST_DEPS,
7185)
7186
7187xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007188 name = "f32_prelu_test",
7189 srcs = [
7190 "test/f32-prelu.cc",
7191 "test/prelu-microkernel-tester.h",
7192 "src/xnnpack/AlignedAllocator.h",
7193 ] + MICROKERNEL_TEST_HDRS,
7194 deps = MICROKERNEL_TEST_DEPS,
7195)
7196
7197xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007198 name = "f32_raddexpminusmax_test",
7199 srcs = [
7200 "test/f32-raddexpminusmax.cc",
7201 "test/raddexpminusmax-microkernel-tester.h",
7202 ] + MICROKERNEL_TEST_HDRS,
7203 deps = MICROKERNEL_TEST_DEPS,
7204)
7205
7206xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007207 name = "f32_raddextexp_test",
7208 srcs = [
7209 "test/f32-raddextexp.cc",
7210 "test/raddextexp-microkernel-tester.h",
7211 ] + MICROKERNEL_TEST_HDRS,
7212 deps = MICROKERNEL_TEST_DEPS,
7213)
7214
7215xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007216 name = "f32_raddstoreexpminusmax_test",
7217 srcs = [
7218 "test/f32-raddstoreexpminusmax.cc",
7219 "test/raddstoreexpminusmax-microkernel-tester.h",
7220 ] + MICROKERNEL_TEST_HDRS,
7221 deps = MICROKERNEL_TEST_DEPS,
7222)
7223
7224xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007225 name = "f32_rmax_test",
7226 srcs = [
7227 "test/f32-rmax.cc",
7228 "test/rmax-microkernel-tester.h",
7229 ] + MICROKERNEL_TEST_HDRS,
7230 deps = MICROKERNEL_TEST_DEPS,
7231)
7232
7233xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007234 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007235 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007236 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007237 "test/spmm-microkernel-tester.h",
7238 "src/xnnpack/AlignedAllocator.h",
7239 ] + MICROKERNEL_TEST_HDRS,
7240 deps = MICROKERNEL_TEST_DEPS,
7241)
7242
7243xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007244 name = "f32_vabs_test",
7245 srcs = [
7246 "test/f32-vabs.cc",
7247 "test/vunary-microkernel-tester.h",
7248 ] + MICROKERNEL_TEST_HDRS,
7249 deps = MICROKERNEL_TEST_DEPS,
7250)
7251
7252xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007253 name = "f32_vadd_test",
7254 srcs = [
7255 "test/f32-vadd.cc",
7256 "test/vbinary-microkernel-tester.h",
7257 ] + MICROKERNEL_TEST_HDRS,
7258 deps = MICROKERNEL_TEST_DEPS,
7259)
7260
7261xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007262 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007263 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007264 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007265 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007266 ] + MICROKERNEL_TEST_HDRS,
7267 deps = MICROKERNEL_TEST_DEPS,
7268)
7269
7270xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007271 name = "f32_vadd_relu_test",
7272 srcs = [
7273 "test/f32-vadd-relu.cc",
7274 "test/vbinary-microkernel-tester.h",
7275 ] + MICROKERNEL_TEST_HDRS,
7276 deps = MICROKERNEL_TEST_DEPS,
7277)
7278
7279xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007280 name = "f32_vaddc_test",
7281 srcs = [
7282 "test/f32-vaddc.cc",
7283 "test/vbinaryc-microkernel-tester.h",
7284 ] + MICROKERNEL_TEST_HDRS,
7285 deps = MICROKERNEL_TEST_DEPS,
7286)
7287
7288xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007289 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007290 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007291 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007292 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007293 ] + MICROKERNEL_TEST_HDRS,
7294 deps = MICROKERNEL_TEST_DEPS,
7295)
7296
7297xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007298 name = "f32_vaddc_relu_test",
7299 srcs = [
7300 "test/f32-vaddc-relu.cc",
7301 "test/vbinaryc-microkernel-tester.h",
7302 ] + MICROKERNEL_TEST_HDRS,
7303 deps = MICROKERNEL_TEST_DEPS,
7304)
7305
7306xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007307 name = "f32_vclamp_test",
7308 srcs = [
7309 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007310 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007311 ] + MICROKERNEL_TEST_HDRS,
7312 deps = MICROKERNEL_TEST_DEPS,
7313)
7314
7315xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007316 name = "f32_vdiv_test",
7317 srcs = [
7318 "test/f32-vdiv.cc",
7319 "test/vbinary-microkernel-tester.h",
7320 ] + MICROKERNEL_TEST_HDRS,
7321 deps = MICROKERNEL_TEST_DEPS,
7322)
7323
7324xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007325 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007326 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007327 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007328 "test/vbinary-microkernel-tester.h",
7329 ] + MICROKERNEL_TEST_HDRS,
7330 deps = MICROKERNEL_TEST_DEPS,
7331)
7332
7333xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007334 name = "f32_vdiv_relu_test",
7335 srcs = [
7336 "test/f32-vdiv-relu.cc",
7337 "test/vbinary-microkernel-tester.h",
7338 ] + MICROKERNEL_TEST_HDRS,
7339 deps = MICROKERNEL_TEST_DEPS,
7340)
7341
7342xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007343 name = "f32_vdivc_test",
7344 srcs = [
7345 "test/f32-vdivc.cc",
7346 "test/vbinaryc-microkernel-tester.h",
7347 ] + MICROKERNEL_TEST_HDRS,
7348 deps = MICROKERNEL_TEST_DEPS,
7349)
7350
7351xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007352 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007353 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007354 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007355 "test/vbinaryc-microkernel-tester.h",
7356 ] + MICROKERNEL_TEST_HDRS,
7357 deps = MICROKERNEL_TEST_DEPS,
7358)
7359
7360xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007361 name = "f32_vdivc_relu_test",
7362 srcs = [
7363 "test/f32-vdivc-relu.cc",
7364 "test/vbinaryc-microkernel-tester.h",
7365 ] + MICROKERNEL_TEST_HDRS,
7366 deps = MICROKERNEL_TEST_DEPS,
7367)
7368
7369xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007370 name = "f32_vrdivc_test",
7371 srcs = [
7372 "test/f32-vrdivc.cc",
7373 "test/vbinaryc-microkernel-tester.h",
7374 ] + MICROKERNEL_TEST_HDRS,
7375 deps = MICROKERNEL_TEST_DEPS,
7376)
7377
7378xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007379 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007380 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007381 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007382 "test/vbinaryc-microkernel-tester.h",
7383 ] + MICROKERNEL_TEST_HDRS,
7384 deps = MICROKERNEL_TEST_DEPS,
7385)
7386
7387xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007388 name = "f32_vrdivc_relu_test",
7389 srcs = [
7390 "test/f32-vrdivc-relu.cc",
7391 "test/vbinaryc-microkernel-tester.h",
7392 ] + MICROKERNEL_TEST_HDRS,
7393 deps = MICROKERNEL_TEST_DEPS,
7394)
7395
7396xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007397 name = "f32_velu_test",
7398 srcs = [
7399 "test/f32-velu.cc",
7400 "test/vunary-microkernel-tester.h",
7401 ] + MICROKERNEL_TEST_HDRS,
7402 deps = MICROKERNEL_TEST_DEPS,
7403)
7404
7405xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007406 name = "f32_vmax_test",
7407 srcs = [
7408 "test/f32-vmax.cc",
7409 "test/vbinary-microkernel-tester.h",
7410 ] + MICROKERNEL_TEST_HDRS,
7411 deps = MICROKERNEL_TEST_DEPS,
7412)
7413
7414xnnpack_unit_test(
7415 name = "f32_vmaxc_test",
7416 srcs = [
7417 "test/f32-vmaxc.cc",
7418 "test/vbinaryc-microkernel-tester.h",
7419 ] + MICROKERNEL_TEST_HDRS,
7420 deps = MICROKERNEL_TEST_DEPS,
7421)
7422
7423xnnpack_unit_test(
7424 name = "f32_vmin_test",
7425 srcs = [
7426 "test/f32-vmin.cc",
7427 "test/vbinary-microkernel-tester.h",
7428 ] + MICROKERNEL_TEST_HDRS,
7429 deps = MICROKERNEL_TEST_DEPS,
7430)
7431
7432xnnpack_unit_test(
7433 name = "f32_vminc_test",
7434 srcs = [
7435 "test/f32-vminc.cc",
7436 "test/vbinaryc-microkernel-tester.h",
7437 ] + MICROKERNEL_TEST_HDRS,
7438 deps = MICROKERNEL_TEST_DEPS,
7439)
7440
7441xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007442 name = "f32_vmul_test",
7443 srcs = [
7444 "test/f32-vmul.cc",
7445 "test/vbinary-microkernel-tester.h",
7446 ] + MICROKERNEL_TEST_HDRS,
7447 deps = MICROKERNEL_TEST_DEPS,
7448)
7449
7450xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007451 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007452 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007453 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007454 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007455 ] + MICROKERNEL_TEST_HDRS,
7456 deps = MICROKERNEL_TEST_DEPS,
7457)
7458
7459xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007460 name = "f32_vmul_relu_test",
7461 srcs = [
7462 "test/f32-vmul-relu.cc",
7463 "test/vbinary-microkernel-tester.h",
7464 ] + MICROKERNEL_TEST_HDRS,
7465 deps = MICROKERNEL_TEST_DEPS,
7466)
7467
7468xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007469 name = "f32_vmulc_test",
7470 srcs = [
7471 "test/f32-vmulc.cc",
7472 "test/vbinaryc-microkernel-tester.h",
7473 ] + MICROKERNEL_TEST_HDRS,
7474 deps = MICROKERNEL_TEST_DEPS,
7475)
7476
7477xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007478 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007479 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007480 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007481 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007482 ] + MICROKERNEL_TEST_HDRS,
7483 deps = MICROKERNEL_TEST_DEPS,
7484)
7485
7486xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007487 name = "f32_vmulc_relu_test",
7488 srcs = [
7489 "test/f32-vmulc-relu.cc",
7490 "test/vbinaryc-microkernel-tester.h",
7491 ] + MICROKERNEL_TEST_HDRS,
7492 deps = MICROKERNEL_TEST_DEPS,
7493)
7494
7495xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007496 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007497 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007498 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007499 "test/vmulcaddc-microkernel-tester.h",
7500 "src/xnnpack/AlignedAllocator.h",
7501 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007502 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007503)
7504
7505xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007506 name = "f32_vlrelu_test",
7507 srcs = [
7508 "test/f32-vlrelu.cc",
7509 "test/vunary-microkernel-tester.h",
7510 ] + MICROKERNEL_TEST_HDRS,
7511 deps = MICROKERNEL_TEST_DEPS,
7512)
7513
7514xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007515 name = "f32_vneg_test",
7516 srcs = [
7517 "test/f32-vneg.cc",
7518 "test/vunary-microkernel-tester.h",
7519 ] + MICROKERNEL_TEST_HDRS,
7520 deps = MICROKERNEL_TEST_DEPS,
7521)
7522
7523xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007524 name = "f32_vrelu_test",
7525 srcs = [
7526 "test/f32-vrelu.cc",
7527 "test/vunary-microkernel-tester.h",
7528 ] + MICROKERNEL_TEST_HDRS,
7529 deps = MICROKERNEL_TEST_DEPS,
7530)
7531
7532xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007533 name = "f32_vrndne_test",
7534 srcs = [
7535 "test/f32-vrndne.cc",
7536 "test/vunary-microkernel-tester.h",
7537 ] + MICROKERNEL_TEST_HDRS,
7538 deps = MICROKERNEL_TEST_DEPS,
7539)
7540
7541xnnpack_unit_test(
7542 name = "f32_vrndz_test",
7543 srcs = [
7544 "test/f32-vrndz.cc",
7545 "test/vunary-microkernel-tester.h",
7546 ] + MICROKERNEL_TEST_HDRS,
7547 deps = MICROKERNEL_TEST_DEPS,
7548)
7549
7550xnnpack_unit_test(
7551 name = "f32_vrndu_test",
7552 srcs = [
7553 "test/f32-vrndu.cc",
7554 "test/vunary-microkernel-tester.h",
7555 ] + MICROKERNEL_TEST_HDRS,
7556 deps = MICROKERNEL_TEST_DEPS,
7557)
7558
7559xnnpack_unit_test(
7560 name = "f32_vrndd_test",
7561 srcs = [
7562 "test/f32-vrndd.cc",
7563 "test/vunary-microkernel-tester.h",
7564 ] + MICROKERNEL_TEST_HDRS,
7565 deps = MICROKERNEL_TEST_DEPS,
7566)
7567
7568xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007569 name = "f32_vscale_test",
7570 srcs = [
7571 "test/f32-vscale.cc",
7572 "test/vscale-microkernel-tester.h",
7573 ] + MICROKERNEL_TEST_HDRS,
7574 deps = MICROKERNEL_TEST_DEPS,
7575)
7576
7577xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007578 name = "f32_vscaleexpminusmax_test",
7579 srcs = [
7580 "test/f32-vscaleexpminusmax.cc",
7581 "test/vscaleexpminusmax-microkernel-tester.h",
7582 ] + MICROKERNEL_TEST_HDRS,
7583 deps = MICROKERNEL_TEST_DEPS,
7584)
7585
7586xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007587 name = "f32_vscaleextexp_test",
7588 srcs = [
7589 "test/f32-vscaleextexp.cc",
7590 "test/vscaleextexp-microkernel-tester.h",
7591 ] + MICROKERNEL_TEST_HDRS,
7592 deps = MICROKERNEL_TEST_DEPS,
7593)
7594
7595xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007596 name = "f32_vsigmoid_test",
7597 srcs = [
7598 "test/f32-vsigmoid.cc",
7599 "test/vunary-microkernel-tester.h",
7600 ] + MICROKERNEL_TEST_HDRS,
7601 deps = MICROKERNEL_TEST_DEPS,
7602)
7603
7604xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007605 name = "f32_vsqr_test",
7606 srcs = [
7607 "test/f32-vsqr.cc",
7608 "test/vunary-microkernel-tester.h",
7609 ] + MICROKERNEL_TEST_HDRS,
7610 deps = MICROKERNEL_TEST_DEPS,
7611)
7612
7613xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007614 name = "f32_vsqrdiff_test",
7615 srcs = [
7616 "test/f32-vsqrdiff.cc",
7617 "test/vbinary-microkernel-tester.h",
7618 ] + MICROKERNEL_TEST_HDRS,
7619 deps = MICROKERNEL_TEST_DEPS,
7620)
7621
7622xnnpack_unit_test(
7623 name = "f32_vsqrdiffc_test",
7624 srcs = [
7625 "test/f32-vsqrdiffc.cc",
7626 "test/vbinaryc-microkernel-tester.h",
7627 ] + MICROKERNEL_TEST_HDRS,
7628 deps = MICROKERNEL_TEST_DEPS,
7629)
7630
7631xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007632 name = "f32_vsqrt_test",
7633 srcs = [
7634 "test/f32-vsqrt.cc",
7635 "test/vunary-microkernel-tester.h",
7636 ] + MICROKERNEL_TEST_HDRS,
7637 deps = MICROKERNEL_TEST_DEPS,
7638)
7639
7640xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007641 name = "f32_vsub_test",
7642 srcs = [
7643 "test/f32-vsub.cc",
7644 "test/vbinary-microkernel-tester.h",
7645 ] + MICROKERNEL_TEST_HDRS,
7646 deps = MICROKERNEL_TEST_DEPS,
7647)
7648
7649xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007650 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007651 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007652 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007653 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007654 ] + MICROKERNEL_TEST_HDRS,
7655 deps = MICROKERNEL_TEST_DEPS,
7656)
7657
7658xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007659 name = "f32_vsub_relu_test",
7660 srcs = [
7661 "test/f32-vsub-relu.cc",
7662 "test/vbinary-microkernel-tester.h",
7663 ] + MICROKERNEL_TEST_HDRS,
7664 deps = MICROKERNEL_TEST_DEPS,
7665)
7666
7667xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007668 name = "f32_vsubc_test",
7669 srcs = [
7670 "test/f32-vsubc.cc",
7671 "test/vbinaryc-microkernel-tester.h",
7672 ] + MICROKERNEL_TEST_HDRS,
7673 deps = MICROKERNEL_TEST_DEPS,
7674)
7675
7676xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007677 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007678 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007679 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007680 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007681 ] + MICROKERNEL_TEST_HDRS,
7682 deps = MICROKERNEL_TEST_DEPS,
7683)
7684
7685xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007686 name = "f32_vsubc_relu_test",
7687 srcs = [
7688 "test/f32-vsubc-relu.cc",
7689 "test/vbinaryc-microkernel-tester.h",
7690 ] + MICROKERNEL_TEST_HDRS,
7691 deps = MICROKERNEL_TEST_DEPS,
7692)
7693
7694xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007695 name = "f32_vrsubc_test",
7696 srcs = [
7697 "test/f32-vrsubc.cc",
7698 "test/vbinaryc-microkernel-tester.h",
7699 ] + MICROKERNEL_TEST_HDRS,
7700 deps = MICROKERNEL_TEST_DEPS,
7701)
7702
7703xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007704 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007705 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007706 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007707 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007708 ] + MICROKERNEL_TEST_HDRS,
7709 deps = MICROKERNEL_TEST_DEPS,
7710)
7711
7712xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007713 name = "f32_vrsubc_relu_test",
7714 srcs = [
7715 "test/f32-vrsubc-relu.cc",
7716 "test/vbinaryc-microkernel-tester.h",
7717 ] + MICROKERNEL_TEST_HDRS,
7718 deps = MICROKERNEL_TEST_DEPS,
7719)
7720
7721xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007722 name = "qc8_dwconv_minmax_fp32_test",
7723 timeout = "moderate",
7724 srcs = [
7725 "test/qc8-dwconv-minmax-fp32.cc",
7726 "test/dwconv-microkernel-tester.h",
7727 "src/xnnpack/AlignedAllocator.h",
7728 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7729 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7730)
7731
7732xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007733 name = "qc8_gemm_minmax_fp32_test",
7734 timeout = "moderate",
7735 srcs = [
7736 "test/qc8-gemm-minmax-fp32.cc",
7737 "test/gemm-microkernel-tester.h",
7738 "src/xnnpack/AlignedAllocator.h",
7739 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7740 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7741)
7742
7743xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007744 name = "qc8_igemm_minmax_fp32_test",
7745 timeout = "moderate",
7746 srcs = [
7747 "test/qc8-igemm-minmax-fp32.cc",
7748 "test/gemm-microkernel-tester.h",
7749 "src/xnnpack/AlignedAllocator.h",
7750 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7751 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7752)
7753
7754xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007755 name = "qs8_dwconv_minmax_fp32_test",
7756 srcs = [
7757 "test/qs8-dwconv-minmax-fp32.cc",
7758 "test/dwconv-microkernel-tester.h",
7759 "src/xnnpack/AlignedAllocator.h",
7760 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7761 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7762)
7763
7764xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007765 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007766 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007767 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007768 "test/dwconv-microkernel-tester.h",
7769 "src/xnnpack/AlignedAllocator.h",
7770 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7771 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7772)
7773
7774xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007775 name = "qs8_dwconv_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007776 srcs = [
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007777 "test/qs8-dwconv-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007778 "test/dwconv-microkernel-tester.h",
7779 "src/xnnpack/AlignedAllocator.h",
7780 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7781 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7782)
7783
7784xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007785 name = "qs8_gavgpool_minmax_test",
7786 srcs = [
7787 "test/qs8-gavgpool-minmax.cc",
7788 "test/gavgpool-microkernel-tester.h",
7789 "src/xnnpack/AlignedAllocator.h",
7790 ] + MICROKERNEL_TEST_HDRS,
7791 deps = MICROKERNEL_TEST_DEPS,
7792)
7793
7794xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007795 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007796 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007797 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007798 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007799 "test/gemm-microkernel-tester.h",
7800 "src/xnnpack/AlignedAllocator.h",
7801 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7802 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7803)
7804
7805xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007806 name = "qs8_gemm_minmax_fp32_test",
7807 timeout = "moderate",
7808 srcs = [
7809 "test/qs8-gemm-minmax-fp32.cc",
7810 "test/gemm-microkernel-tester.h",
7811 "src/xnnpack/AlignedAllocator.h",
7812 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7813 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7814)
7815
7816xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007817 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007818 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007819 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007820 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007821 "test/gemm-microkernel-tester.h",
7822 "src/xnnpack/AlignedAllocator.h",
7823 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7824 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7825)
7826
7827xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007828 name = "qs8_igemm_minmax_fp32_test",
7829 timeout = "moderate",
7830 srcs = [
7831 "test/qs8-igemm-minmax-fp32.cc",
7832 "test/gemm-microkernel-tester.h",
7833 "src/xnnpack/AlignedAllocator.h",
7834 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7835 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7836)
7837
7838xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007839 name = "qs8_requantization_test",
7840 srcs = [
7841 "src/xnnpack/requantization-stubs.h",
7842 "test/qs8-requantization.cc",
7843 "test/requantization-tester.h",
7844 ] + MICROKERNEL_TEST_HDRS,
7845 deps = MICROKERNEL_TEST_DEPS,
7846)
7847
7848xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007849 name = "qs8_vadd_minmax_test",
7850 srcs = [
7851 "test/qs8-vadd-minmax.cc",
7852 "test/vadd-microkernel-tester.h",
7853 ] + MICROKERNEL_TEST_HDRS,
7854 deps = MICROKERNEL_TEST_DEPS,
7855)
7856
7857xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007858 name = "qs8_vaddc_minmax_test",
7859 srcs = [
7860 "test/qs8-vaddc-minmax.cc",
7861 "test/vaddc-microkernel-tester.h",
7862 ] + MICROKERNEL_TEST_HDRS,
7863 deps = MICROKERNEL_TEST_DEPS,
7864)
7865
7866xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007867 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007868 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007869 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007870 "test/avgpool-microkernel-tester.h",
7871 "src/xnnpack/AlignedAllocator.h",
7872 ] + MICROKERNEL_TEST_HDRS,
7873 deps = MICROKERNEL_TEST_DEPS,
7874)
7875
7876xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07007877 name = "qu8_dwconv_minmax_fp32_test",
7878 srcs = [
7879 "test/qu8-dwconv-minmax-fp32.cc",
7880 "test/dwconv-microkernel-tester.h",
7881 "src/xnnpack/AlignedAllocator.h",
7882 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7883 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7884)
7885
7886xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007887 name = "qu8_igemm_minmax_fp32_test",
7888 srcs = [
7889 "test/qu8-igemm-minmax-fp32.cc",
7890 "test/gemm-microkernel-tester.h",
7891 "src/xnnpack/AlignedAllocator.h",
7892 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7893 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7894)
7895
7896xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007897 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007898 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007899 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007900 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007901 "src/xnnpack/AlignedAllocator.h",
7902 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007903 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007904)
7905
7906xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007907 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007908 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007909 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007910 "test/gavgpool-microkernel-tester.h",
7911 "src/xnnpack/AlignedAllocator.h",
7912 ] + MICROKERNEL_TEST_HDRS,
7913 deps = MICROKERNEL_TEST_DEPS,
7914)
7915
7916xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007917 name = "qu8_gemm_minmax_fp32_test",
7918 srcs = [
7919 "test/qu8-gemm-minmax-fp32.cc",
7920 "test/gemm-microkernel-tester.h",
7921 "src/xnnpack/AlignedAllocator.h",
7922 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7923 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7924)
7925
7926xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007927 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007928 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007929 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007930 "test/gemm-microkernel-tester.h",
7931 "src/xnnpack/AlignedAllocator.h",
7932 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007933 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007934)
7935
7936xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007937 name = "qu8_requantization_test",
7938 srcs = [
7939 "src/xnnpack/requantization-stubs.h",
7940 "test/qu8-requantization.cc",
7941 "test/requantization-tester.h",
7942 ] + MICROKERNEL_TEST_HDRS,
7943 deps = MICROKERNEL_TEST_DEPS,
7944)
7945
7946xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007947 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007948 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007949 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007950 "test/vadd-microkernel-tester.h",
7951 ] + MICROKERNEL_TEST_HDRS,
7952 deps = MICROKERNEL_TEST_DEPS,
7953)
7954
7955xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007956 name = "u8_lut32norm_test",
7957 srcs = [
7958 "test/u8-lut32norm.cc",
7959 "test/lut-norm-microkernel-tester.h",
7960 ] + MICROKERNEL_TEST_HDRS,
7961 deps = MICROKERNEL_TEST_DEPS,
7962)
7963
7964xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007965 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007966 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007967 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007968 "test/maxpool-microkernel-tester.h",
7969 ] + MICROKERNEL_TEST_HDRS,
7970 deps = MICROKERNEL_TEST_DEPS,
7971)
7972
7973xnnpack_unit_test(
7974 name = "u8_rmax_test",
7975 srcs = [
7976 "test/u8-rmax.cc",
7977 "test/rmax-microkernel-tester.h",
7978 ] + MICROKERNEL_TEST_HDRS,
7979 deps = MICROKERNEL_TEST_DEPS,
7980)
7981
7982xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007983 name = "u8_vclamp_test",
7984 srcs = [
7985 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007986 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007987 ] + MICROKERNEL_TEST_HDRS,
7988 deps = MICROKERNEL_TEST_DEPS,
7989)
7990
7991xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007992 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007993 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007994 "test/x32-depthtospace2d-chw2hwc.cc",
7995 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007996 ] + MICROKERNEL_TEST_HDRS,
7997 deps = MICROKERNEL_TEST_DEPS,
7998)
7999
8000xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07008001 name = "x32_fill_test",
8002 srcs = [
8003 "test/x32-fill.cc",
8004 "test/fill-microkernel-tester.h",
8005 ] + MICROKERNEL_TEST_HDRS,
8006 deps = MICROKERNEL_TEST_DEPS,
8007)
8008
8009xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008010 name = "x32_packx_test",
8011 srcs = [
8012 "test/x32-packx.cc",
8013 "test/pack-microkernel-tester.h",
8014 "src/xnnpack/AlignedAllocator.h",
8015 ] + MICROKERNEL_TEST_HDRS,
8016 deps = MICROKERNEL_TEST_DEPS,
8017)
8018
8019xnnpack_unit_test(
8020 name = "x32_pad_test",
8021 srcs = [
8022 "test/x32-pad.cc",
8023 "test/pad-microkernel-tester.h",
8024 ] + MICROKERNEL_TEST_HDRS,
8025 deps = MICROKERNEL_TEST_DEPS,
8026)
8027
8028xnnpack_unit_test(
8029 name = "x32_unpool_test",
8030 srcs = [
8031 "test/x32-unpool.cc",
8032 "test/unpool-microkernel-tester.h",
8033 ] + MICROKERNEL_TEST_HDRS,
8034 deps = MICROKERNEL_TEST_DEPS,
8035)
8036
8037xnnpack_unit_test(
8038 name = "x32_zip_test",
8039 srcs = [
8040 "test/x32-zip.cc",
8041 "test/zip-microkernel-tester.h",
8042 ] + MICROKERNEL_TEST_HDRS,
8043 deps = MICROKERNEL_TEST_DEPS,
8044)
8045
8046xnnpack_unit_test(
8047 name = "x8_lut_test",
8048 srcs = [
8049 "test/x8-lut.cc",
8050 "test/lut-microkernel-tester.h",
8051 ] + MICROKERNEL_TEST_HDRS,
8052 deps = MICROKERNEL_TEST_DEPS,
8053)
8054
8055xnnpack_unit_test(
8056 name = "x8_zip_test",
8057 srcs = [
8058 "test/x8-zip.cc",
8059 "test/zip-microkernel-tester.h",
8060 ] + MICROKERNEL_TEST_HDRS,
8061 deps = MICROKERNEL_TEST_DEPS,
8062)
8063
Marat Dukhan20c3b922020-03-10 03:45:06 -07008064########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008065
8066xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07008067 name = "operator_size_test",
8068 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008069 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008070)
8071
Marat Dukhan20c3b922020-03-10 03:45:06 -07008072xnnpack_binary(
8073 name = "subgraph_size_test",
8074 srcs = ["test/subgraph-size.c"],
8075 deps = [":XNNPACK"],
8076)
8077
8078########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008079
8080xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008081 name = "abs_nc_test",
8082 srcs = [
8083 "test/abs-nc.cc",
8084 "test/abs-operator-tester.h",
8085 ],
8086 deps = OPERATOR_TEST_DEPS,
8087)
8088
8089xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008090 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008091 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008092 srcs = [
8093 "test/add-nd.cc",
8094 "test/binary-elementwise-operator-tester.h",
8095 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008096 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008097)
8098
8099xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008100 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008101 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008102 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008103 "test/argmax-pooling-operator-tester.h",
8104 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008105 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008106)
8107
8108xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008109 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008110 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008111 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008112 "test/average-pooling-operator-tester.h",
8113 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008114 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008115)
8116
8117xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008118 name = "bankers_rounding_nc_test",
8119 srcs = [
8120 "test/bankers-rounding-nc.cc",
8121 "test/bankers-rounding-operator-tester.h",
8122 ],
8123 deps = OPERATOR_TEST_DEPS,
8124)
8125
8126xnnpack_unit_test(
8127 name = "ceiling_nc_test",
8128 srcs = [
8129 "test/ceiling-nc.cc",
8130 "test/ceiling-operator-tester.h",
8131 ],
8132 deps = OPERATOR_TEST_DEPS,
8133)
8134
8135xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008136 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008137 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008138 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008139 "test/channel-shuffle-operator-tester.h",
8140 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008141 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008142)
8143
8144xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008145 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008146 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008147 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008148 "test/clamp-operator-tester.h",
8149 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008150 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008151)
8152
8153xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008154 name = "constant_pad_nd_test",
8155 srcs = [
8156 "test/constant-pad-nd.cc",
8157 "test/constant-pad-operator-tester.h",
8158 ],
8159 deps = OPERATOR_TEST_DEPS,
8160)
8161
8162xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008163 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008164 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008165 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008166 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008167 "test/convolution-operator-tester.h",
8168 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008169 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008170)
8171
8172xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008173 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008174 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008175 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008176 "test/convolution-nchw.cc",
8177 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008178 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008179 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008180)
8181
8182xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008183 name = "copy_nc_test",
8184 srcs = [
8185 "test/copy-nc.cc",
8186 "test/copy-operator-tester.h",
8187 ],
8188 deps = OPERATOR_TEST_DEPS,
8189)
8190
8191xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008192 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008193 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008194 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008195 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008196 "test/deconvolution-operator-tester.h",
8197 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008198 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008199)
8200
8201xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008202 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008203 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008204 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008205 "test/depth-to-space-operator-tester.h",
8206 ] + OPERATOR_TEST_PARAMS_HDRS,
8207 deps = OPERATOR_TEST_DEPS,
8208)
8209
8210xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008211 name = "depth_to_space_nhwc_test",
8212 srcs = [
8213 "test/depth-to-space-nhwc.cc",
8214 "test/depth-to-space-operator-tester.h",
8215 ] + OPERATOR_TEST_PARAMS_HDRS,
8216 deps = OPERATOR_TEST_DEPS,
8217)
8218
8219xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008220 name = "divide_nd_test",
8221 srcs = [
8222 "test/binary-elementwise-operator-tester.h",
8223 "test/divide-nd.cc",
8224 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008225 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008226)
8227
8228xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008229 name = "elu_nc_test",
8230 srcs = [
8231 "test/elu-nc.cc",
8232 "test/elu-operator-tester.h",
8233 ],
8234 deps = OPERATOR_TEST_DEPS,
8235)
8236
8237xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008238 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008239 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008240 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008241 "test/fully-connected-operator-tester.h",
8242 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008243 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008244)
8245
8246xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008247 name = "floor_nc_test",
8248 srcs = [
8249 "test/floor-nc.cc",
8250 "test/floor-operator-tester.h",
8251 ],
8252 deps = OPERATOR_TEST_DEPS,
8253)
8254
8255xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008256 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008257 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008258 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008259 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008260 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008261 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008262)
8263
8264xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008265 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008266 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008267 "test/global-average-pooling-ncw.cc",
8268 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008269 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008270 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008271)
8272
8273xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008274 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008275 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008276 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008277 "test/hardswish-operator-tester.h",
8278 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008279 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008280)
8281
8282xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008283 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008284 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008285 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008286 "test/leaky-relu-operator-tester.h",
8287 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008288 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008289)
8290
8291xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008292 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008293 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008294 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008295 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008296 "test/max-pooling-operator-tester.h",
8297 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008298 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008299)
8300
8301xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008302 name = "maximum_nd_test",
8303 srcs = [
8304 "test/binary-elementwise-operator-tester.h",
8305 "test/maximum-nd.cc",
8306 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008307 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008308)
8309
8310xnnpack_unit_test(
8311 name = "minimum_nd_test",
8312 srcs = [
8313 "test/binary-elementwise-operator-tester.h",
8314 "test/minimum-nd.cc",
8315 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008316 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008317)
8318
8319xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008320 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008321 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008322 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008323 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008324 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008325 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008326)
8327
8328xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008329 name = "negate_nc_test",
8330 srcs = [
8331 "test/negate-nc.cc",
8332 "test/negate-operator-tester.h",
8333 ],
8334 deps = OPERATOR_TEST_DEPS,
8335)
8336
8337xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008338 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008339 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008340 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008341 "test/prelu-operator-tester.h",
8342 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008343 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008344)
8345
8346xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008347 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008348 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008349 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008350 "test/resize-bilinear-operator-tester.h",
8351 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008352 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008353)
8354
8355xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008356 name = "resize_bilinear_nchw_test",
8357 srcs = [
8358 "test/resize-bilinear-nchw.cc",
8359 "test/resize-bilinear-operator-tester.h",
8360 ] + OPERATOR_TEST_PARAMS_HDRS,
8361 deps = OPERATOR_TEST_DEPS,
8362)
8363
8364xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008365 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008366 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008367 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008368 "test/sigmoid-operator-tester.h",
8369 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008370 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008371)
8372
8373xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008374 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008375 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008376 "test/softmax-nc.cc",
8377 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008378 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008379 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008380)
8381
8382xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008383 name = "square_nc_test",
8384 srcs = [
8385 "test/square-nc.cc",
8386 "test/square-operator-tester.h",
8387 ],
8388 deps = OPERATOR_TEST_DEPS,
8389)
8390
8391xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008392 name = "square_root_nc_test",
8393 srcs = [
8394 "test/square-root-nc.cc",
8395 "test/square-root-operator-tester.h",
8396 ],
8397 deps = OPERATOR_TEST_DEPS,
8398)
8399
8400xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008401 name = "squared_difference_nd_test",
8402 srcs = [
8403 "test/binary-elementwise-operator-tester.h",
8404 "test/squared-difference-nd.cc",
8405 ],
8406 deps = OPERATOR_TEST_DEPS,
8407)
8408
8409xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008410 name = "subtract_nd_test",
8411 srcs = [
8412 "test/binary-elementwise-operator-tester.h",
8413 "test/subtract-nd.cc",
8414 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008415 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008416)
8417
8418xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008419 name = "truncation_nc_test",
8420 srcs = [
8421 "test/truncation-nc.cc",
8422 "test/truncation-operator-tester.h",
8423 ],
8424 deps = OPERATOR_TEST_DEPS,
8425)
8426
8427xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008428 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008429 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008430 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008431 "test/unpooling-operator-tester.h",
8432 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008433 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008434)
8435
Chao Mei6ddfc602020-05-13 22:29:36 -07008436############################### Misc unit tests ###############################
8437
8438xnnpack_unit_test(
8439 name = "memory_planner_test",
8440 srcs = [
8441 "test/memory-planner-test.cc",
8442 ],
8443 deps = [
8444 ":XNNPACK",
8445 ":memory_planner",
8446 ],
8447)
8448
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008449xnnpack_unit_test(
8450 name = "subgraph_nchw_test",
8451 srcs = [
8452 "src/xnnpack/subgraph.h",
8453 "test/subgraph-nchw.cc",
8454 "test/subgraph-tester.h",
8455 ],
8456 deps = [
8457 ":XNNPACK",
8458 ],
8459)
8460
Marat Dukhan08c4a432019-10-03 09:29:21 -07008461############################# Build configurations #############################
8462
Marat Dukhanb8642352019-10-30 15:43:02 -07008463# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008464config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008465 name = "xnn_enable_assembly_explicit_true",
8466 define_values = {"xnn_enable_assembly": "true"},
8467)
8468
8469# Disables usage of assembly kernels.
8470config_setting(
8471 name = "xnn_enable_assembly_explicit_false",
8472 define_values = {"xnn_enable_assembly": "false"},
8473)
8474
Marat Dukhan9de90e02020-06-18 16:04:12 -07008475# Enables usage of sparse inference.
8476config_setting(
8477 name = "xnn_enable_sparse_explicit_true",
8478 define_values = {"xnn_enable_sparse": "true"},
8479)
8480
8481# Disables usage of sparse inference.
8482config_setting(
8483 name = "xnn_enable_sparse_explicit_false",
8484 define_values = {"xnn_enable_sparse": "false"},
8485)
8486
Marat Dukhan05702cf2020-03-26 15:41:33 -07008487# Disables usage of HMP-aware optimizations.
8488config_setting(
8489 name = "xnn_enable_hmp_explicit_false",
8490 define_values = {"xnn_enable_hmp": "false"},
8491)
8492
Chao Mei6ddfc602020-05-13 22:29:36 -07008493# Enable usage of optimized memory allocation
8494config_setting(
8495 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008496 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008497)
8498
8499# Disable usage of optimized memory allocation
8500config_setting(
8501 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008502 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008503)
8504
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008505# Enable QS8 inference in TFLite-specific version
8506config_setting(
8507 name = "xnn_enable_qs8_explicit_true",
8508 define_values = {"xnn_enable_qs8": "true"},
8509)
8510
8511# Disable QS8 inference in TFLite-specific version
8512config_setting(
8513 name = "xnn_enable_qs8_explicit_false",
8514 define_values = {"xnn_enable_qs8": "false"},
8515)
8516
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008517# Enable QU8 inference in TFLite-specific version
8518config_setting(
8519 name = "xnn_enable_qu8_explicit_true",
8520 define_values = {"xnn_enable_qu8": "true"},
8521)
8522
8523# Disable QU8 inference in TFLite-specific version
8524config_setting(
8525 name = "xnn_enable_qu8_explicit_false",
8526 define_values = {"xnn_enable_qu8": "false"},
8527)
8528
Marat Dukhanb8642352019-10-30 15:43:02 -07008529# Builds with -c dbg
8530config_setting(
8531 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008532 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008533 "compilation_mode": "dbg",
8534 },
8535)
8536
8537# Builds with -c opt
8538config_setting(
8539 name = "optimized_build",
8540 values = {
8541 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008542 },
8543)
8544
8545config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008546 name = "linux_k8",
8547 values = {"cpu": "k8"},
8548)
8549
8550config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008551 name = "linux_arm",
8552 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008553)
8554
8555config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008556 name = "linux_armeabi",
8557 values = {"cpu": "armeabi"},
8558)
8559
8560config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008561 name = "linux_armhf",
8562 values = {"cpu": "armhf"},
8563)
8564
8565config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008566 name = "linux_armv7a",
8567 values = {"cpu": "armv7a"},
8568)
8569
8570config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008571 name = "linux_aarch64",
8572 values = {"cpu": "aarch64"},
8573)
8574
8575config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008576 name = "android",
8577 values = {"crosstool_top": "//external:android/crosstool"},
8578)
8579
8580config_setting(
8581 name = "android_armv7",
8582 values = {
8583 "crosstool_top": "//external:android/crosstool",
8584 "cpu": "armeabi-v7a",
8585 },
8586)
8587
8588config_setting(
8589 name = "android_arm64",
8590 values = {
8591 "crosstool_top": "//external:android/crosstool",
8592 "cpu": "arm64-v8a",
8593 },
8594)
8595
8596config_setting(
8597 name = "android_x86",
8598 values = {
8599 "crosstool_top": "//external:android/crosstool",
8600 "cpu": "x86",
8601 },
8602)
8603
8604config_setting(
8605 name = "android_x86_64",
8606 values = {
8607 "crosstool_top": "//external:android/crosstool",
8608 "cpu": "x86_64",
8609 },
8610)
8611
8612config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008613 name = "windows_x86_64",
8614 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008615)
8616
8617config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008618 name = "windows_x86_64_clang",
8619 values = {
8620 "compiler": "clang-cl",
8621 "cpu": "x64_windows",
8622 },
8623)
8624
8625config_setting(
8626 name = "windows_x86_64_mingw",
8627 values = {
8628 "compiler": "mingw-gcc",
8629 "cpu": "x64_windows",
8630 },
8631)
8632
8633config_setting(
8634 name = "windows_x86_64_msys",
8635 values = {
8636 "compiler": "msys-gcc",
8637 "cpu": "x64_windows",
8638 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008639)
8640
8641config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008642 name = "macos_x86_64",
8643 values = {
8644 "apple_platform_type": "macos",
8645 "cpu": "darwin",
8646 },
8647)
8648
8649config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008650 name = "macos_arm64",
8651 values = {
8652 "apple_platform_type": "macos",
8653 "cpu": "darwin_arm64",
8654 },
8655)
8656
8657config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008658 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008659 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008660)
8661
8662config_setting(
8663 name = "emscripten_wasm",
8664 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008665 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008666 "cpu": "wasm",
8667 },
8668)
8669
8670config_setting(
8671 name = "emscripten_wasmsimd",
8672 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008673 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008674 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008675 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008676 },
8677)
8678
8679config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008680 name = "ios_armv7",
8681 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008682 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008683 "cpu": "ios_armv7",
8684 },
8685)
8686
8687config_setting(
8688 name = "ios_arm64",
8689 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008690 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008691 "cpu": "ios_arm64",
8692 },
8693)
8694
8695config_setting(
8696 name = "ios_arm64e",
8697 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008698 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008699 "cpu": "ios_arm64e",
8700 },
8701)
8702
8703config_setting(
8704 name = "ios_x86",
8705 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008706 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008707 "cpu": "ios_i386",
8708 },
8709)
8710
8711config_setting(
8712 name = "ios_x86_64",
8713 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008714 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008715 "cpu": "ios_x86_64",
8716 },
8717)
8718
8719config_setting(
8720 name = "watchos_armv7k",
8721 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008722 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008723 "cpu": "watchos_armv7k",
8724 },
8725)
8726
8727config_setting(
8728 name = "watchos_arm64_32",
8729 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008730 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008731 "cpu": "watchos_arm64_32",
8732 },
8733)
8734
8735config_setting(
8736 name = "watchos_x86",
8737 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008738 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008739 "cpu": "watchos_i386",
8740 },
8741)
8742
8743config_setting(
8744 name = "watchos_x86_64",
8745 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008746 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008747 "cpu": "watchos_x86_64",
8748 },
8749)
8750
8751config_setting(
8752 name = "tvos_arm64",
8753 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008754 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008755 "cpu": "tvos_arm64",
8756 },
8757)
8758
8759config_setting(
8760 name = "tvos_x86_64",
8761 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008762 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008763 "cpu": "tvos_x86_64",
8764 },
8765)