Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * ahci.c - AHCI SATA support |
| 3 | * |
Tejun Heo | 8c3d3d4 | 2013-05-14 11:09:50 -0700 | [diff] [blame] | 4 | * Maintained by: Tejun Heo <tj@kernel.org> |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 5 | * Please ALWAYS copy linux-ide@vger.kernel.org |
| 6 | * on emails. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 8 | * Copyright 2004-2005 Red Hat, Inc. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2, or (at your option) |
| 14 | * any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; see the file COPYING. If not, write to |
| 23 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
| 24 | * |
| 25 | * |
| 26 | * libata documentation is available via 'make {ps|pdf}docs', |
| 27 | * as Documentation/DocBook/libata.* |
| 28 | * |
| 29 | * AHCI hardware documentation: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | * http://www.intel.com/technology/serialata/pdf/rev1_0.pdf |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 31 | * http://www.intel.com/technology/serialata/pdf/rev1_1.pdf |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | * |
| 33 | */ |
| 34 | |
| 35 | #include <linux/kernel.h> |
| 36 | #include <linux/module.h> |
| 37 | #include <linux/pci.h> |
| 38 | #include <linux/init.h> |
| 39 | #include <linux/blkdev.h> |
| 40 | #include <linux/delay.h> |
| 41 | #include <linux/interrupt.h> |
domen@coderock.org | 87507cf | 2005-04-08 09:53:06 +0200 | [diff] [blame] | 42 | #include <linux/dma-mapping.h> |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 43 | #include <linux/device.h> |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 44 | #include <linux/dmi.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 45 | #include <linux/gfp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | #include <scsi/scsi_host.h> |
Jeff Garzik | 193515d | 2005-11-07 00:59:37 -0500 | [diff] [blame] | 47 | #include <scsi/scsi_cmnd.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <linux/libata.h> |
Anton Vorontsov | 365cfa1 | 2010-03-28 00:22:14 -0400 | [diff] [blame] | 49 | #include "ahci.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | |
| 51 | #define DRV_NAME "ahci" |
Tejun Heo | 7d50b60 | 2007-09-23 13:19:54 +0900 | [diff] [blame] | 52 | #define DRV_VERSION "3.0" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | enum { |
Alessandro Rubini | 318893e | 2012-01-06 13:33:39 +0100 | [diff] [blame] | 55 | AHCI_PCI_BAR_STA2X11 = 0, |
Hugh Daschbach | 7f9c9f8 | 2013-01-04 14:39:09 -0800 | [diff] [blame] | 56 | AHCI_PCI_BAR_ENMOTUS = 2, |
Alessandro Rubini | 318893e | 2012-01-06 13:33:39 +0100 | [diff] [blame] | 57 | AHCI_PCI_BAR_STANDARD = 5, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 58 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 60 | enum board_ids { |
| 61 | /* board IDs by feature in alphabetical order */ |
| 62 | board_ahci, |
| 63 | board_ahci_ign_iferr, |
| 64 | board_ahci_nosntf, |
Tejun Heo | 5f17310 | 2010-07-24 16:53:48 +0200 | [diff] [blame] | 65 | board_ahci_yes_fbs, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 66 | |
| 67 | /* board IDs for specific chipsets in alphabetical order */ |
| 68 | board_ahci_mcp65, |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 69 | board_ahci_mcp77, |
| 70 | board_ahci_mcp89, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 71 | board_ahci_mv, |
| 72 | board_ahci_sb600, |
| 73 | board_ahci_sb700, /* for SB700 and SB800 */ |
| 74 | board_ahci_vt8251, |
| 75 | |
| 76 | /* aliases */ |
| 77 | board_ahci_mcp_linux = board_ahci_mcp65, |
| 78 | board_ahci_mcp67 = board_ahci_mcp65, |
| 79 | board_ahci_mcp73 = board_ahci_mcp65, |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 80 | board_ahci_mcp79 = board_ahci_mcp77, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | }; |
| 82 | |
Jeff Garzik | 2dcb407 | 2007-10-19 06:42:56 -0400 | [diff] [blame] | 83 | static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 84 | static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, |
| 85 | unsigned long deadline); |
| 86 | static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, |
| 87 | unsigned long deadline); |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 88 | #ifdef CONFIG_PM |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 89 | static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); |
| 90 | static int ahci_pci_device_resume(struct pci_dev *pdev); |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 91 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | |
Tejun Heo | fad16e7 | 2010-09-21 09:25:48 +0200 | [diff] [blame] | 93 | static struct scsi_host_template ahci_sht = { |
| 94 | AHCI_SHT("ahci"), |
| 95 | }; |
| 96 | |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 97 | static struct ata_port_operations ahci_vt8251_ops = { |
| 98 | .inherits = &ahci_ops, |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 99 | .hardreset = ahci_vt8251_hardreset, |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 100 | }; |
| 101 | |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 102 | static struct ata_port_operations ahci_p5wdh_ops = { |
| 103 | .inherits = &ahci_ops, |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 104 | .hardreset = ahci_p5wdh_hardreset, |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 105 | }; |
| 106 | |
Arjan van de Ven | 98ac62d | 2005-11-28 10:06:23 +0100 | [diff] [blame] | 107 | static const struct ata_port_info ahci_port_info[] = { |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 108 | /* by features */ |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 109 | [board_ahci] = { |
Tejun Heo | 1188c0d | 2007-04-23 02:41:05 +0900 | [diff] [blame] | 110 | .flags = AHCI_FLAG_COMMON, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 111 | .pio_mask = ATA_PIO4, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 112 | .udma_mask = ATA_UDMA6, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 113 | .port_ops = &ahci_ops, |
| 114 | }, |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 115 | [board_ahci_ign_iferr] = { |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 116 | AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR), |
| 117 | .flags = AHCI_FLAG_COMMON, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 118 | .pio_mask = ATA_PIO4, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 119 | .udma_mask = ATA_UDMA6, |
Tejun Heo | 4166955 | 2006-11-29 11:33:14 +0900 | [diff] [blame] | 120 | .port_ops = &ahci_ops, |
| 121 | }, |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 122 | [board_ahci_nosntf] = { |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 123 | AHCI_HFLAGS (AHCI_HFLAG_NO_SNTF), |
| 124 | .flags = AHCI_FLAG_COMMON, |
| 125 | .pio_mask = ATA_PIO4, |
| 126 | .udma_mask = ATA_UDMA6, |
| 127 | .port_ops = &ahci_ops, |
| 128 | }, |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 129 | [board_ahci_yes_fbs] = { |
Tejun Heo | 5f17310 | 2010-07-24 16:53:48 +0200 | [diff] [blame] | 130 | AHCI_HFLAGS (AHCI_HFLAG_YES_FBS), |
| 131 | .flags = AHCI_FLAG_COMMON, |
| 132 | .pio_mask = ATA_PIO4, |
| 133 | .udma_mask = ATA_UDMA6, |
| 134 | .port_ops = &ahci_ops, |
| 135 | }, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 136 | /* by chipsets */ |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 137 | [board_ahci_mcp65] = { |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 138 | AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA | AHCI_HFLAG_NO_PMP | |
| 139 | AHCI_HFLAG_YES_NCQ), |
Tejun Heo | ae01b24 | 2011-03-16 11:14:55 +0100 | [diff] [blame] | 140 | .flags = AHCI_FLAG_COMMON | ATA_FLAG_NO_DIPM, |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 141 | .pio_mask = ATA_PIO4, |
| 142 | .udma_mask = ATA_UDMA6, |
| 143 | .port_ops = &ahci_ops, |
| 144 | }, |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 145 | [board_ahci_mcp77] = { |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 146 | AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA | AHCI_HFLAG_NO_PMP), |
| 147 | .flags = AHCI_FLAG_COMMON, |
| 148 | .pio_mask = ATA_PIO4, |
| 149 | .udma_mask = ATA_UDMA6, |
| 150 | .port_ops = &ahci_ops, |
| 151 | }, |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 152 | [board_ahci_mcp89] = { |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 153 | AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA), |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 154 | .flags = AHCI_FLAG_COMMON, |
| 155 | .pio_mask = ATA_PIO4, |
| 156 | .udma_mask = ATA_UDMA6, |
| 157 | .port_ops = &ahci_ops, |
| 158 | }, |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 159 | [board_ahci_mv] = { |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 160 | AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI | |
| 161 | AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP), |
Sergei Shtylyov | 9cbe056 | 2011-02-04 22:05:48 +0300 | [diff] [blame] | 162 | .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 163 | .pio_mask = ATA_PIO4, |
| 164 | .udma_mask = ATA_UDMA6, |
| 165 | .port_ops = &ahci_ops, |
| 166 | }, |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 167 | [board_ahci_sb600] = { |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 168 | AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL | |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 169 | AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255 | |
| 170 | AHCI_HFLAG_32BIT_ONLY), |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 171 | .flags = AHCI_FLAG_COMMON, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 172 | .pio_mask = ATA_PIO4, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 173 | .udma_mask = ATA_UDMA6, |
Yuan-Hsin Chen | 345347c | 2011-06-21 17:17:38 +0800 | [diff] [blame] | 174 | .port_ops = &ahci_pmp_retry_srst_ops, |
Conke Hu | 55a6160 | 2007-03-27 18:33:05 +0800 | [diff] [blame] | 175 | }, |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 176 | [board_ahci_sb700] = { /* for SB700 and SB800 */ |
Shane Huang | bd17243 | 2008-06-10 15:52:04 +0800 | [diff] [blame] | 177 | AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL), |
Shane Huang | e39fc8c | 2008-02-22 05:00:31 -0800 | [diff] [blame] | 178 | .flags = AHCI_FLAG_COMMON, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 179 | .pio_mask = ATA_PIO4, |
Shane Huang | e39fc8c | 2008-02-22 05:00:31 -0800 | [diff] [blame] | 180 | .udma_mask = ATA_UDMA6, |
Yuan-Hsin Chen | 345347c | 2011-06-21 17:17:38 +0800 | [diff] [blame] | 181 | .port_ops = &ahci_pmp_retry_srst_ops, |
Shane Huang | e39fc8c | 2008-02-22 05:00:31 -0800 | [diff] [blame] | 182 | }, |
Jeffrin Jose | facb8fa | 2012-06-05 01:33:37 +0530 | [diff] [blame] | 183 | [board_ahci_vt8251] = { |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 184 | AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP), |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 185 | .flags = AHCI_FLAG_COMMON, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 186 | .pio_mask = ATA_PIO4, |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 187 | .udma_mask = ATA_UDMA6, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 188 | .port_ops = &ahci_vt8251_ops, |
Shaohua Li | 1b677af | 2009-11-16 09:56:05 +0800 | [diff] [blame] | 189 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | }; |
| 191 | |
Jeff Garzik | 3b7d697 | 2005-11-10 11:04:11 -0500 | [diff] [blame] | 192 | static const struct pci_device_id ahci_pci_tbl[] = { |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 193 | /* Intel */ |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 194 | { PCI_VDEVICE(INTEL, 0x2652), board_ahci }, /* ICH6 */ |
| 195 | { PCI_VDEVICE(INTEL, 0x2653), board_ahci }, /* ICH6M */ |
| 196 | { PCI_VDEVICE(INTEL, 0x27c1), board_ahci }, /* ICH7 */ |
| 197 | { PCI_VDEVICE(INTEL, 0x27c5), board_ahci }, /* ICH7M */ |
| 198 | { PCI_VDEVICE(INTEL, 0x27c3), board_ahci }, /* ICH7R */ |
Tejun Heo | 82490c0 | 2007-01-23 15:13:39 +0900 | [diff] [blame] | 199 | { PCI_VDEVICE(AL, 0x5288), board_ahci_ign_iferr }, /* ULi M5288 */ |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 200 | { PCI_VDEVICE(INTEL, 0x2681), board_ahci }, /* ESB2 */ |
| 201 | { PCI_VDEVICE(INTEL, 0x2682), board_ahci }, /* ESB2 */ |
| 202 | { PCI_VDEVICE(INTEL, 0x2683), board_ahci }, /* ESB2 */ |
| 203 | { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */ |
Tejun Heo | 7a234af | 2007-09-03 12:44:57 +0900 | [diff] [blame] | 204 | { PCI_VDEVICE(INTEL, 0x2821), board_ahci }, /* ICH8 */ |
Shaohua Li | 1b677af | 2009-11-16 09:56:05 +0800 | [diff] [blame] | 205 | { PCI_VDEVICE(INTEL, 0x2822), board_ahci_nosntf }, /* ICH8 */ |
Tejun Heo | 7a234af | 2007-09-03 12:44:57 +0900 | [diff] [blame] | 206 | { PCI_VDEVICE(INTEL, 0x2824), board_ahci }, /* ICH8 */ |
| 207 | { PCI_VDEVICE(INTEL, 0x2829), board_ahci }, /* ICH8M */ |
| 208 | { PCI_VDEVICE(INTEL, 0x282a), board_ahci }, /* ICH8M */ |
| 209 | { PCI_VDEVICE(INTEL, 0x2922), board_ahci }, /* ICH9 */ |
| 210 | { PCI_VDEVICE(INTEL, 0x2923), board_ahci }, /* ICH9 */ |
| 211 | { PCI_VDEVICE(INTEL, 0x2924), board_ahci }, /* ICH9 */ |
| 212 | { PCI_VDEVICE(INTEL, 0x2925), board_ahci }, /* ICH9 */ |
| 213 | { PCI_VDEVICE(INTEL, 0x2927), board_ahci }, /* ICH9 */ |
| 214 | { PCI_VDEVICE(INTEL, 0x2929), board_ahci }, /* ICH9M */ |
| 215 | { PCI_VDEVICE(INTEL, 0x292a), board_ahci }, /* ICH9M */ |
| 216 | { PCI_VDEVICE(INTEL, 0x292b), board_ahci }, /* ICH9M */ |
| 217 | { PCI_VDEVICE(INTEL, 0x292c), board_ahci }, /* ICH9M */ |
| 218 | { PCI_VDEVICE(INTEL, 0x292f), board_ahci }, /* ICH9M */ |
| 219 | { PCI_VDEVICE(INTEL, 0x294d), board_ahci }, /* ICH9 */ |
| 220 | { PCI_VDEVICE(INTEL, 0x294e), board_ahci }, /* ICH9M */ |
Jason Gaston | d4155e6 | 2007-09-20 17:35:00 -0400 | [diff] [blame] | 221 | { PCI_VDEVICE(INTEL, 0x502a), board_ahci }, /* Tolapai */ |
| 222 | { PCI_VDEVICE(INTEL, 0x502b), board_ahci }, /* Tolapai */ |
Jason Gaston | 16ad1ad | 2008-01-28 17:34:14 -0800 | [diff] [blame] | 223 | { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */ |
Mark Goodwin | b2dde6a | 2009-06-26 10:44:11 -0500 | [diff] [blame] | 224 | { PCI_VDEVICE(INTEL, 0x3a22), board_ahci }, /* ICH10 */ |
Jason Gaston | 16ad1ad | 2008-01-28 17:34:14 -0800 | [diff] [blame] | 225 | { PCI_VDEVICE(INTEL, 0x3a25), board_ahci }, /* ICH10 */ |
David Milburn | c1f57d9 | 2009-07-22 15:15:56 -0500 | [diff] [blame] | 226 | { PCI_VDEVICE(INTEL, 0x3b22), board_ahci }, /* PCH AHCI */ |
| 227 | { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */ |
Seth Heasley | adcb530 | 2008-08-11 17:03:09 -0700 | [diff] [blame] | 228 | { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */ |
Seth Heasley | 8e48b6b | 2008-08-27 16:47:22 -0700 | [diff] [blame] | 229 | { PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */ |
David Milburn | c1f57d9 | 2009-07-22 15:15:56 -0500 | [diff] [blame] | 230 | { PCI_VDEVICE(INTEL, 0x3b29), board_ahci }, /* PCH AHCI */ |
Seth Heasley | adcb530 | 2008-08-11 17:03:09 -0700 | [diff] [blame] | 231 | { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ |
Seth Heasley | 8e48b6b | 2008-08-27 16:47:22 -0700 | [diff] [blame] | 232 | { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */ |
David Milburn | c1f57d9 | 2009-07-22 15:15:56 -0500 | [diff] [blame] | 233 | { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */ |
Seth Heasley | 5623cab | 2010-01-12 17:00:18 -0800 | [diff] [blame] | 234 | { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */ |
| 235 | { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */ |
| 236 | { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */ |
| 237 | { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */ |
| 238 | { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */ |
| 239 | { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */ |
Seth Heasley | 992b3fb | 2010-09-09 09:44:56 -0700 | [diff] [blame] | 240 | { PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */ |
| 241 | { PCI_VDEVICE(INTEL, 0x1d04), board_ahci }, /* PBG RAID */ |
| 242 | { PCI_VDEVICE(INTEL, 0x1d06), board_ahci }, /* PBG RAID */ |
Seth Heasley | 64a3903 | 2011-03-11 11:57:42 -0800 | [diff] [blame] | 243 | { PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* PBG RAID */ |
Seth Heasley | a4a461a | 2011-01-10 12:57:17 -0800 | [diff] [blame] | 244 | { PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */ |
Seth Heasley | 181e3ce | 2011-04-20 08:45:20 -0700 | [diff] [blame] | 245 | { PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */ |
| 246 | { PCI_VDEVICE(INTEL, 0x1e03), board_ahci }, /* Panther Point AHCI */ |
| 247 | { PCI_VDEVICE(INTEL, 0x1e04), board_ahci }, /* Panther Point RAID */ |
| 248 | { PCI_VDEVICE(INTEL, 0x1e05), board_ahci }, /* Panther Point RAID */ |
| 249 | { PCI_VDEVICE(INTEL, 0x1e06), board_ahci }, /* Panther Point RAID */ |
| 250 | { PCI_VDEVICE(INTEL, 0x1e07), board_ahci }, /* Panther Point RAID */ |
Seth Heasley | 2cab7a4 | 2011-07-14 16:50:49 -0700 | [diff] [blame] | 251 | { PCI_VDEVICE(INTEL, 0x1e0e), board_ahci }, /* Panther Point RAID */ |
Seth Heasley | ea4ace6 | 2012-01-23 16:27:30 -0800 | [diff] [blame] | 252 | { PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */ |
| 253 | { PCI_VDEVICE(INTEL, 0x8c03), board_ahci }, /* Lynx Point AHCI */ |
| 254 | { PCI_VDEVICE(INTEL, 0x8c04), board_ahci }, /* Lynx Point RAID */ |
| 255 | { PCI_VDEVICE(INTEL, 0x8c05), board_ahci }, /* Lynx Point RAID */ |
| 256 | { PCI_VDEVICE(INTEL, 0x8c06), board_ahci }, /* Lynx Point RAID */ |
| 257 | { PCI_VDEVICE(INTEL, 0x8c07), board_ahci }, /* Lynx Point RAID */ |
| 258 | { PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */ |
| 259 | { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci }, /* Lynx Point RAID */ |
James Ralston | 77b12bc9 | 2012-08-09 09:02:31 -0700 | [diff] [blame] | 260 | { PCI_VDEVICE(INTEL, 0x9c02), board_ahci }, /* Lynx Point-LP AHCI */ |
| 261 | { PCI_VDEVICE(INTEL, 0x9c03), board_ahci }, /* Lynx Point-LP AHCI */ |
| 262 | { PCI_VDEVICE(INTEL, 0x9c04), board_ahci }, /* Lynx Point-LP RAID */ |
| 263 | { PCI_VDEVICE(INTEL, 0x9c05), board_ahci }, /* Lynx Point-LP RAID */ |
| 264 | { PCI_VDEVICE(INTEL, 0x9c06), board_ahci }, /* Lynx Point-LP RAID */ |
| 265 | { PCI_VDEVICE(INTEL, 0x9c07), board_ahci }, /* Lynx Point-LP RAID */ |
| 266 | { PCI_VDEVICE(INTEL, 0x9c0e), board_ahci }, /* Lynx Point-LP RAID */ |
| 267 | { PCI_VDEVICE(INTEL, 0x9c0f), board_ahci }, /* Lynx Point-LP RAID */ |
Seth Heasley | 29e674d | 2013-01-25 12:01:05 -0800 | [diff] [blame] | 268 | { PCI_VDEVICE(INTEL, 0x1f22), board_ahci }, /* Avoton AHCI */ |
| 269 | { PCI_VDEVICE(INTEL, 0x1f23), board_ahci }, /* Avoton AHCI */ |
| 270 | { PCI_VDEVICE(INTEL, 0x1f24), board_ahci }, /* Avoton RAID */ |
| 271 | { PCI_VDEVICE(INTEL, 0x1f25), board_ahci }, /* Avoton RAID */ |
| 272 | { PCI_VDEVICE(INTEL, 0x1f26), board_ahci }, /* Avoton RAID */ |
| 273 | { PCI_VDEVICE(INTEL, 0x1f27), board_ahci }, /* Avoton RAID */ |
| 274 | { PCI_VDEVICE(INTEL, 0x1f2e), board_ahci }, /* Avoton RAID */ |
| 275 | { PCI_VDEVICE(INTEL, 0x1f2f), board_ahci }, /* Avoton RAID */ |
| 276 | { PCI_VDEVICE(INTEL, 0x1f32), board_ahci }, /* Avoton AHCI */ |
| 277 | { PCI_VDEVICE(INTEL, 0x1f33), board_ahci }, /* Avoton AHCI */ |
| 278 | { PCI_VDEVICE(INTEL, 0x1f34), board_ahci }, /* Avoton RAID */ |
| 279 | { PCI_VDEVICE(INTEL, 0x1f35), board_ahci }, /* Avoton RAID */ |
| 280 | { PCI_VDEVICE(INTEL, 0x1f36), board_ahci }, /* Avoton RAID */ |
| 281 | { PCI_VDEVICE(INTEL, 0x1f37), board_ahci }, /* Avoton RAID */ |
| 282 | { PCI_VDEVICE(INTEL, 0x1f3e), board_ahci }, /* Avoton RAID */ |
| 283 | { PCI_VDEVICE(INTEL, 0x1f3f), board_ahci }, /* Avoton RAID */ |
James Ralston | efda332 | 2013-02-21 11:08:51 -0800 | [diff] [blame] | 284 | { PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Wellsburg RAID */ |
| 285 | { PCI_VDEVICE(INTEL, 0x2827), board_ahci }, /* Wellsburg RAID */ |
James Ralston | 151743f | 2013-02-08 17:34:47 -0800 | [diff] [blame] | 286 | { PCI_VDEVICE(INTEL, 0x8d02), board_ahci }, /* Wellsburg AHCI */ |
| 287 | { PCI_VDEVICE(INTEL, 0x8d04), board_ahci }, /* Wellsburg RAID */ |
| 288 | { PCI_VDEVICE(INTEL, 0x8d06), board_ahci }, /* Wellsburg RAID */ |
| 289 | { PCI_VDEVICE(INTEL, 0x8d0e), board_ahci }, /* Wellsburg RAID */ |
| 290 | { PCI_VDEVICE(INTEL, 0x8d62), board_ahci }, /* Wellsburg AHCI */ |
| 291 | { PCI_VDEVICE(INTEL, 0x8d64), board_ahci }, /* Wellsburg RAID */ |
| 292 | { PCI_VDEVICE(INTEL, 0x8d66), board_ahci }, /* Wellsburg RAID */ |
| 293 | { PCI_VDEVICE(INTEL, 0x8d6e), board_ahci }, /* Wellsburg RAID */ |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 294 | |
Tejun Heo | e34bb37 | 2007-02-26 20:24:03 +0900 | [diff] [blame] | 295 | /* JMicron 360/1/3/5/6, match class to avoid IDE function */ |
| 296 | { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
| 297 | PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci_ign_iferr }, |
Ben Hutchings | 1fefb8f | 2012-09-10 01:09:04 +0100 | [diff] [blame] | 298 | /* JMicron 362B and 362C have an AHCI function with IDE class code */ |
| 299 | { PCI_VDEVICE(JMICRON, 0x2362), board_ahci_ign_iferr }, |
| 300 | { PCI_VDEVICE(JMICRON, 0x236f), board_ahci_ign_iferr }, |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 301 | |
| 302 | /* ATI */ |
Conke Hu | c65ec1c | 2007-04-11 18:23:14 +0800 | [diff] [blame] | 303 | { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */ |
Shane Huang | e39fc8c | 2008-02-22 05:00:31 -0800 | [diff] [blame] | 304 | { PCI_VDEVICE(ATI, 0x4390), board_ahci_sb700 }, /* ATI SB700/800 */ |
| 305 | { PCI_VDEVICE(ATI, 0x4391), board_ahci_sb700 }, /* ATI SB700/800 */ |
| 306 | { PCI_VDEVICE(ATI, 0x4392), board_ahci_sb700 }, /* ATI SB700/800 */ |
| 307 | { PCI_VDEVICE(ATI, 0x4393), board_ahci_sb700 }, /* ATI SB700/800 */ |
| 308 | { PCI_VDEVICE(ATI, 0x4394), board_ahci_sb700 }, /* ATI SB700/800 */ |
| 309 | { PCI_VDEVICE(ATI, 0x4395), board_ahci_sb700 }, /* ATI SB700/800 */ |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 310 | |
Shane Huang | e2dd90b | 2009-07-29 11:34:49 +0800 | [diff] [blame] | 311 | /* AMD */ |
Shane Huang | 5deab53 | 2009-10-13 11:14:00 +0800 | [diff] [blame] | 312 | { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */ |
Shane Huang | e2dd90b | 2009-07-29 11:34:49 +0800 | [diff] [blame] | 313 | /* AMD is using RAID class only for ahci controllers */ |
| 314 | { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
| 315 | PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci }, |
| 316 | |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 317 | /* VIA */ |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 318 | { PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251 }, /* VIA VT8251 */ |
Tejun Heo | bf33554 | 2007-04-11 17:27:14 +0900 | [diff] [blame] | 319 | { PCI_VDEVICE(VIA, 0x6287), board_ahci_vt8251 }, /* VIA VT8251 */ |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 320 | |
| 321 | /* NVIDIA */ |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 322 | { PCI_VDEVICE(NVIDIA, 0x044c), board_ahci_mcp65 }, /* MCP65 */ |
| 323 | { PCI_VDEVICE(NVIDIA, 0x044d), board_ahci_mcp65 }, /* MCP65 */ |
| 324 | { PCI_VDEVICE(NVIDIA, 0x044e), board_ahci_mcp65 }, /* MCP65 */ |
| 325 | { PCI_VDEVICE(NVIDIA, 0x044f), board_ahci_mcp65 }, /* MCP65 */ |
| 326 | { PCI_VDEVICE(NVIDIA, 0x045c), board_ahci_mcp65 }, /* MCP65 */ |
| 327 | { PCI_VDEVICE(NVIDIA, 0x045d), board_ahci_mcp65 }, /* MCP65 */ |
| 328 | { PCI_VDEVICE(NVIDIA, 0x045e), board_ahci_mcp65 }, /* MCP65 */ |
| 329 | { PCI_VDEVICE(NVIDIA, 0x045f), board_ahci_mcp65 }, /* MCP65 */ |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 330 | { PCI_VDEVICE(NVIDIA, 0x0550), board_ahci_mcp67 }, /* MCP67 */ |
| 331 | { PCI_VDEVICE(NVIDIA, 0x0551), board_ahci_mcp67 }, /* MCP67 */ |
| 332 | { PCI_VDEVICE(NVIDIA, 0x0552), board_ahci_mcp67 }, /* MCP67 */ |
| 333 | { PCI_VDEVICE(NVIDIA, 0x0553), board_ahci_mcp67 }, /* MCP67 */ |
| 334 | { PCI_VDEVICE(NVIDIA, 0x0554), board_ahci_mcp67 }, /* MCP67 */ |
| 335 | { PCI_VDEVICE(NVIDIA, 0x0555), board_ahci_mcp67 }, /* MCP67 */ |
| 336 | { PCI_VDEVICE(NVIDIA, 0x0556), board_ahci_mcp67 }, /* MCP67 */ |
| 337 | { PCI_VDEVICE(NVIDIA, 0x0557), board_ahci_mcp67 }, /* MCP67 */ |
| 338 | { PCI_VDEVICE(NVIDIA, 0x0558), board_ahci_mcp67 }, /* MCP67 */ |
| 339 | { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_mcp67 }, /* MCP67 */ |
| 340 | { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_mcp67 }, /* MCP67 */ |
| 341 | { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_mcp67 }, /* MCP67 */ |
| 342 | { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_mcp_linux }, /* Linux ID */ |
| 343 | { PCI_VDEVICE(NVIDIA, 0x0581), board_ahci_mcp_linux }, /* Linux ID */ |
| 344 | { PCI_VDEVICE(NVIDIA, 0x0582), board_ahci_mcp_linux }, /* Linux ID */ |
| 345 | { PCI_VDEVICE(NVIDIA, 0x0583), board_ahci_mcp_linux }, /* Linux ID */ |
| 346 | { PCI_VDEVICE(NVIDIA, 0x0584), board_ahci_mcp_linux }, /* Linux ID */ |
| 347 | { PCI_VDEVICE(NVIDIA, 0x0585), board_ahci_mcp_linux }, /* Linux ID */ |
| 348 | { PCI_VDEVICE(NVIDIA, 0x0586), board_ahci_mcp_linux }, /* Linux ID */ |
| 349 | { PCI_VDEVICE(NVIDIA, 0x0587), board_ahci_mcp_linux }, /* Linux ID */ |
| 350 | { PCI_VDEVICE(NVIDIA, 0x0588), board_ahci_mcp_linux }, /* Linux ID */ |
| 351 | { PCI_VDEVICE(NVIDIA, 0x0589), board_ahci_mcp_linux }, /* Linux ID */ |
| 352 | { PCI_VDEVICE(NVIDIA, 0x058a), board_ahci_mcp_linux }, /* Linux ID */ |
| 353 | { PCI_VDEVICE(NVIDIA, 0x058b), board_ahci_mcp_linux }, /* Linux ID */ |
| 354 | { PCI_VDEVICE(NVIDIA, 0x058c), board_ahci_mcp_linux }, /* Linux ID */ |
| 355 | { PCI_VDEVICE(NVIDIA, 0x058d), board_ahci_mcp_linux }, /* Linux ID */ |
| 356 | { PCI_VDEVICE(NVIDIA, 0x058e), board_ahci_mcp_linux }, /* Linux ID */ |
| 357 | { PCI_VDEVICE(NVIDIA, 0x058f), board_ahci_mcp_linux }, /* Linux ID */ |
| 358 | { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_mcp73 }, /* MCP73 */ |
| 359 | { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_mcp73 }, /* MCP73 */ |
| 360 | { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_mcp73 }, /* MCP73 */ |
| 361 | { PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci_mcp73 }, /* MCP73 */ |
| 362 | { PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci_mcp73 }, /* MCP73 */ |
| 363 | { PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci_mcp73 }, /* MCP73 */ |
| 364 | { PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci_mcp73 }, /* MCP73 */ |
| 365 | { PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci_mcp73 }, /* MCP73 */ |
| 366 | { PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci_mcp73 }, /* MCP73 */ |
| 367 | { PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci_mcp73 }, /* MCP73 */ |
| 368 | { PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci_mcp73 }, /* MCP73 */ |
| 369 | { PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci_mcp73 }, /* MCP73 */ |
| 370 | { PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci_mcp77 }, /* MCP77 */ |
| 371 | { PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci_mcp77 }, /* MCP77 */ |
| 372 | { PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci_mcp77 }, /* MCP77 */ |
| 373 | { PCI_VDEVICE(NVIDIA, 0x0ad3), board_ahci_mcp77 }, /* MCP77 */ |
| 374 | { PCI_VDEVICE(NVIDIA, 0x0ad4), board_ahci_mcp77 }, /* MCP77 */ |
| 375 | { PCI_VDEVICE(NVIDIA, 0x0ad5), board_ahci_mcp77 }, /* MCP77 */ |
| 376 | { PCI_VDEVICE(NVIDIA, 0x0ad6), board_ahci_mcp77 }, /* MCP77 */ |
| 377 | { PCI_VDEVICE(NVIDIA, 0x0ad7), board_ahci_mcp77 }, /* MCP77 */ |
| 378 | { PCI_VDEVICE(NVIDIA, 0x0ad8), board_ahci_mcp77 }, /* MCP77 */ |
| 379 | { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci_mcp77 }, /* MCP77 */ |
| 380 | { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci_mcp77 }, /* MCP77 */ |
| 381 | { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci_mcp77 }, /* MCP77 */ |
| 382 | { PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci_mcp79 }, /* MCP79 */ |
| 383 | { PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci_mcp79 }, /* MCP79 */ |
| 384 | { PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci_mcp79 }, /* MCP79 */ |
| 385 | { PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci_mcp79 }, /* MCP79 */ |
| 386 | { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci_mcp79 }, /* MCP79 */ |
| 387 | { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci_mcp79 }, /* MCP79 */ |
| 388 | { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci_mcp79 }, /* MCP79 */ |
| 389 | { PCI_VDEVICE(NVIDIA, 0x0abb), board_ahci_mcp79 }, /* MCP79 */ |
| 390 | { PCI_VDEVICE(NVIDIA, 0x0abc), board_ahci_mcp79 }, /* MCP79 */ |
| 391 | { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci_mcp79 }, /* MCP79 */ |
| 392 | { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci_mcp79 }, /* MCP79 */ |
| 393 | { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci_mcp79 }, /* MCP79 */ |
| 394 | { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci_mcp89 }, /* MCP89 */ |
| 395 | { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci_mcp89 }, /* MCP89 */ |
| 396 | { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci_mcp89 }, /* MCP89 */ |
| 397 | { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci_mcp89 }, /* MCP89 */ |
| 398 | { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci_mcp89 }, /* MCP89 */ |
| 399 | { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci_mcp89 }, /* MCP89 */ |
| 400 | { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci_mcp89 }, /* MCP89 */ |
| 401 | { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci_mcp89 }, /* MCP89 */ |
| 402 | { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci_mcp89 }, /* MCP89 */ |
| 403 | { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci_mcp89 }, /* MCP89 */ |
| 404 | { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci_mcp89 }, /* MCP89 */ |
| 405 | { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci_mcp89 }, /* MCP89 */ |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 406 | |
Jeff Garzik | 95916ed | 2006-07-29 04:10:14 -0400 | [diff] [blame] | 407 | /* SiS */ |
Tejun Heo | 20e2de4 | 2008-08-01 12:51:43 +0900 | [diff] [blame] | 408 | { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */ |
| 409 | { PCI_VDEVICE(SI, 0x1185), board_ahci }, /* SiS 968 */ |
| 410 | { PCI_VDEVICE(SI, 0x0186), board_ahci }, /* SiS 968 */ |
Jeff Garzik | 95916ed | 2006-07-29 04:10:14 -0400 | [diff] [blame] | 411 | |
Alessandro Rubini | 318893e | 2012-01-06 13:33:39 +0100 | [diff] [blame] | 412 | /* ST Microelectronics */ |
| 413 | { PCI_VDEVICE(STMICRO, 0xCC06), board_ahci }, /* ST ConneXt */ |
| 414 | |
Jeff Garzik | cd70c26 | 2007-07-08 02:29:42 -0400 | [diff] [blame] | 415 | /* Marvell */ |
| 416 | { PCI_VDEVICE(MARVELL, 0x6145), board_ahci_mv }, /* 6145 */ |
Jose Alberto Reguero | c40e7cb | 2008-03-13 23:22:24 +0100 | [diff] [blame] | 417 | { PCI_VDEVICE(MARVELL, 0x6121), board_ahci_mv }, /* 6121 */ |
Myron Stowe | 69fd315 | 2013-04-08 11:32:49 -0600 | [diff] [blame] | 418 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9123), |
Anssi Hannula | 10aca06 | 2011-01-18 20:03:26 -0500 | [diff] [blame] | 419 | .class = PCI_CLASS_STORAGE_SATA_AHCI, |
| 420 | .class_mask = 0xffffff, |
Tejun Heo | 5f17310 | 2010-07-24 16:53:48 +0200 | [diff] [blame] | 421 | .driver_data = board_ahci_yes_fbs }, /* 88se9128 */ |
Myron Stowe | 69fd315 | 2013-04-08 11:32:49 -0600 | [diff] [blame] | 422 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9125), |
Per Jessen | 467b41c | 2011-02-08 13:54:32 +0100 | [diff] [blame] | 423 | .driver_data = board_ahci_yes_fbs }, /* 88se9125 */ |
Myron Stowe | 69fd315 | 2013-04-08 11:32:49 -0600 | [diff] [blame] | 424 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x917a), |
Matt Johnson | 642d892 | 2012-04-27 01:42:30 -0500 | [diff] [blame] | 425 | .driver_data = board_ahci_yes_fbs }, /* 88se9172 */ |
George Spelvin | fcce9a3 | 2013-05-29 10:20:35 +0900 | [diff] [blame] | 426 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9172), |
| 427 | .driver_data = board_ahci_yes_fbs }, /* 88se9172 */ |
Myron Stowe | 69fd315 | 2013-04-08 11:32:49 -0600 | [diff] [blame] | 428 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9192), |
Alan Cox | 17c60c6 | 2012-09-04 16:07:18 +0100 | [diff] [blame] | 429 | .driver_data = board_ahci_yes_fbs }, /* 88se9172 on some Gigabyte */ |
Myron Stowe | 69fd315 | 2013-04-08 11:32:49 -0600 | [diff] [blame] | 430 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x91a3), |
Tejun Heo | 50be5e3 | 2010-11-29 15:57:14 +0100 | [diff] [blame] | 431 | .driver_data = board_ahci_yes_fbs }, |
Jeff Garzik | cd70c26 | 2007-07-08 02:29:42 -0400 | [diff] [blame] | 432 | |
Mark Nelson | c77a036 | 2008-10-23 14:08:16 +1100 | [diff] [blame] | 433 | /* Promise */ |
| 434 | { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci }, /* PDC42819 */ |
| 435 | |
Keng-Yu Lin | c970376 | 2011-11-09 01:47:36 -0500 | [diff] [blame] | 436 | /* Asmedia */ |
Alan Cox | 7b4f6ec | 2012-09-04 16:25:25 +0100 | [diff] [blame] | 437 | { PCI_VDEVICE(ASMEDIA, 0x0601), board_ahci }, /* ASM1060 */ |
| 438 | { PCI_VDEVICE(ASMEDIA, 0x0602), board_ahci }, /* ASM1060 */ |
| 439 | { PCI_VDEVICE(ASMEDIA, 0x0611), board_ahci }, /* ASM1061 */ |
| 440 | { PCI_VDEVICE(ASMEDIA, 0x0612), board_ahci }, /* ASM1062 */ |
Keng-Yu Lin | c970376 | 2011-11-09 01:47:36 -0500 | [diff] [blame] | 441 | |
Hugh Daschbach | 7f9c9f8 | 2013-01-04 14:39:09 -0800 | [diff] [blame] | 442 | /* Enmotus */ |
| 443 | { PCI_DEVICE(0x1c44, 0x8000), board_ahci }, |
| 444 | |
Jeff Garzik | 415ae2b | 2006-11-01 05:10:42 -0500 | [diff] [blame] | 445 | /* Generic, PCI class code for AHCI */ |
| 446 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
Conke Hu | c9f8947 | 2007-01-09 05:32:51 -0500 | [diff] [blame] | 447 | PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci }, |
Jeff Garzik | 415ae2b | 2006-11-01 05:10:42 -0500 | [diff] [blame] | 448 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | { } /* terminate list */ |
| 450 | }; |
| 451 | |
| 452 | |
| 453 | static struct pci_driver ahci_pci_driver = { |
| 454 | .name = DRV_NAME, |
| 455 | .id_table = ahci_pci_tbl, |
| 456 | .probe = ahci_init_one, |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 457 | .remove = ata_pci_remove_one, |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 458 | #ifdef CONFIG_PM |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 459 | .suspend = ahci_pci_device_suspend, |
| 460 | .resume = ahci_pci_device_resume, |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 461 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | }; |
| 463 | |
Alan Cox | 5b66c82 | 2008-09-03 14:48:34 +0100 | [diff] [blame] | 464 | #if defined(CONFIG_PATA_MARVELL) || defined(CONFIG_PATA_MARVELL_MODULE) |
| 465 | static int marvell_enable; |
| 466 | #else |
| 467 | static int marvell_enable = 1; |
| 468 | #endif |
| 469 | module_param(marvell_enable, int, 0644); |
| 470 | MODULE_PARM_DESC(marvell_enable, "Marvell SATA via AHCI (1 = enabled)"); |
| 471 | |
| 472 | |
Anton Vorontsov | 394d6e5 | 2010-03-03 20:17:36 +0300 | [diff] [blame] | 473 | static void ahci_pci_save_initial_config(struct pci_dev *pdev, |
| 474 | struct ahci_host_priv *hpriv) |
| 475 | { |
| 476 | unsigned int force_port_map = 0; |
| 477 | unsigned int mask_port_map = 0; |
| 478 | |
| 479 | if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361) { |
| 480 | dev_info(&pdev->dev, "JMB361 has only one port\n"); |
| 481 | force_port_map = 1; |
| 482 | } |
| 483 | |
| 484 | /* |
| 485 | * Temporary Marvell 6145 hack: PATA port presence |
| 486 | * is asserted through the standard AHCI port |
| 487 | * presence register, as bit 4 (counting from 0) |
| 488 | */ |
| 489 | if (hpriv->flags & AHCI_HFLAG_MV_PATA) { |
| 490 | if (pdev->device == 0x6121) |
| 491 | mask_port_map = 0x3; |
| 492 | else |
| 493 | mask_port_map = 0xf; |
| 494 | dev_info(&pdev->dev, |
| 495 | "Disabling your PATA port. Use the boot option 'ahci.marvell_enable=0' to avoid this.\n"); |
| 496 | } |
| 497 | |
Anton Vorontsov | 1d51335 | 2010-03-03 20:17:37 +0300 | [diff] [blame] | 498 | ahci_save_initial_config(&pdev->dev, hpriv, force_port_map, |
| 499 | mask_port_map); |
Anton Vorontsov | 394d6e5 | 2010-03-03 20:17:36 +0300 | [diff] [blame] | 500 | } |
| 501 | |
Anton Vorontsov | 3303040 | 2010-03-03 20:17:39 +0300 | [diff] [blame] | 502 | static int ahci_pci_reset_controller(struct ata_host *host) |
| 503 | { |
| 504 | struct pci_dev *pdev = to_pci_dev(host->dev); |
| 505 | |
| 506 | ahci_reset_controller(host); |
| 507 | |
Tejun Heo | d91542c | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 508 | if (pdev->vendor == PCI_VENDOR_ID_INTEL) { |
Anton Vorontsov | 3303040 | 2010-03-03 20:17:39 +0300 | [diff] [blame] | 509 | struct ahci_host_priv *hpriv = host->private_data; |
Tejun Heo | d91542c | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 510 | u16 tmp16; |
| 511 | |
| 512 | /* configure PCS */ |
| 513 | pci_read_config_word(pdev, 0x92, &tmp16); |
Tejun Heo | 49f2909 | 2007-11-19 16:03:44 +0900 | [diff] [blame] | 514 | if ((tmp16 & hpriv->port_map) != hpriv->port_map) { |
| 515 | tmp16 |= hpriv->port_map; |
| 516 | pci_write_config_word(pdev, 0x92, tmp16); |
| 517 | } |
Tejun Heo | d91542c | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 518 | } |
| 519 | |
| 520 | return 0; |
| 521 | } |
| 522 | |
Anton Vorontsov | 781d655 | 2010-03-03 20:17:42 +0300 | [diff] [blame] | 523 | static void ahci_pci_init_controller(struct ata_host *host) |
| 524 | { |
| 525 | struct ahci_host_priv *hpriv = host->private_data; |
| 526 | struct pci_dev *pdev = to_pci_dev(host->dev); |
| 527 | void __iomem *port_mmio; |
| 528 | u32 tmp; |
Jose Alberto Reguero | c40e7cb | 2008-03-13 23:22:24 +0100 | [diff] [blame] | 529 | int mv; |
Tejun Heo | d91542c | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 530 | |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 531 | if (hpriv->flags & AHCI_HFLAG_MV_PATA) { |
Jose Alberto Reguero | c40e7cb | 2008-03-13 23:22:24 +0100 | [diff] [blame] | 532 | if (pdev->device == 0x6121) |
| 533 | mv = 2; |
| 534 | else |
| 535 | mv = 4; |
| 536 | port_mmio = __ahci_port_base(host, mv); |
Jeff Garzik | cd70c26 | 2007-07-08 02:29:42 -0400 | [diff] [blame] | 537 | |
| 538 | writel(0, port_mmio + PORT_IRQ_MASK); |
| 539 | |
| 540 | /* clear port IRQ */ |
| 541 | tmp = readl(port_mmio + PORT_IRQ_STAT); |
| 542 | VPRINTK("PORT_IRQ_STAT 0x%x\n", tmp); |
| 543 | if (tmp) |
| 544 | writel(tmp, port_mmio + PORT_IRQ_STAT); |
| 545 | } |
| 546 | |
Anton Vorontsov | 781d655 | 2010-03-03 20:17:42 +0300 | [diff] [blame] | 547 | ahci_init_controller(host); |
Tejun Heo | d91542c | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 548 | } |
| 549 | |
Tejun Heo | cc0680a | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 550 | static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, |
Tejun Heo | d4b2bab | 2007-02-02 16:50:52 +0900 | [diff] [blame] | 551 | unsigned long deadline) |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 552 | { |
Tejun Heo | cc0680a | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 553 | struct ata_port *ap = link->ap; |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 554 | bool online; |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 555 | int rc; |
| 556 | |
| 557 | DPRINTK("ENTER\n"); |
| 558 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 559 | ahci_stop_engine(ap); |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 560 | |
Tejun Heo | cc0680a | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 561 | rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 562 | deadline, &online, NULL); |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 563 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 564 | ahci_start_engine(ap); |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 565 | |
| 566 | DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class); |
| 567 | |
| 568 | /* vt8251 doesn't clear BSY on signature FIS reception, |
| 569 | * request follow-up softreset. |
| 570 | */ |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 571 | return online ? -EAGAIN : rc; |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 572 | } |
| 573 | |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 574 | static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, |
| 575 | unsigned long deadline) |
| 576 | { |
| 577 | struct ata_port *ap = link->ap; |
| 578 | struct ahci_port_priv *pp = ap->private_data; |
| 579 | u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; |
| 580 | struct ata_taskfile tf; |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 581 | bool online; |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 582 | int rc; |
| 583 | |
| 584 | ahci_stop_engine(ap); |
| 585 | |
| 586 | /* clear D2H reception area to properly wait for D2H FIS */ |
| 587 | ata_tf_init(link->device, &tf); |
| 588 | tf.command = 0x80; |
| 589 | ata_tf_to_fis(&tf, 0, 0, d2h_fis); |
| 590 | |
| 591 | rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 592 | deadline, &online, NULL); |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 593 | |
| 594 | ahci_start_engine(ap); |
| 595 | |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 596 | /* The pseudo configuration device on SIMG4726 attached to |
| 597 | * ASUS P5W-DH Deluxe doesn't send signature FIS after |
| 598 | * hardreset if no device is attached to the first downstream |
| 599 | * port && the pseudo device locks up on SRST w/ PMP==0. To |
| 600 | * work around this, wait for !BSY only briefly. If BSY isn't |
| 601 | * cleared, perform CLO and proceed to IDENTIFY (achieved by |
| 602 | * ATA_LFLAG_NO_SRST and ATA_LFLAG_ASSUME_ATA). |
| 603 | * |
| 604 | * Wait for two seconds. Devices attached to downstream port |
| 605 | * which can't process the following IDENTIFY after this will |
| 606 | * have to be reset again. For most cases, this should |
| 607 | * suffice while making probing snappish enough. |
| 608 | */ |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 609 | if (online) { |
| 610 | rc = ata_wait_after_reset(link, jiffies + 2 * HZ, |
| 611 | ahci_check_ready); |
| 612 | if (rc) |
Shane Huang | 78d5ae3 | 2009-08-07 15:05:52 +0800 | [diff] [blame] | 613 | ahci_kick_engine(ap); |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 614 | } |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 615 | return rc; |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 616 | } |
| 617 | |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 618 | #ifdef CONFIG_PM |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 619 | static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) |
| 620 | { |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 621 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 622 | struct ahci_host_priv *hpriv = host->private_data; |
Anton Vorontsov | d899334 | 2010-03-03 20:17:34 +0300 | [diff] [blame] | 623 | void __iomem *mmio = hpriv->mmio; |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 624 | u32 ctl; |
| 625 | |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 626 | if (mesg.event & PM_EVENT_SUSPEND && |
| 627 | hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 628 | dev_err(&pdev->dev, |
| 629 | "BIOS update required for suspend/resume\n"); |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 630 | return -EIO; |
| 631 | } |
| 632 | |
Rafael J. Wysocki | 3a2d5b7 | 2008-02-23 19:13:25 +0100 | [diff] [blame] | 633 | if (mesg.event & PM_EVENT_SLEEP) { |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 634 | /* AHCI spec rev1.1 section 8.3.3: |
| 635 | * Software must disable interrupts prior to requesting a |
| 636 | * transition of the HBA to D3 state. |
| 637 | */ |
| 638 | ctl = readl(mmio + HOST_CTL); |
| 639 | ctl &= ~HOST_IRQ_EN; |
| 640 | writel(ctl, mmio + HOST_CTL); |
| 641 | readl(mmio + HOST_CTL); /* flush */ |
| 642 | } |
| 643 | |
| 644 | return ata_pci_device_suspend(pdev, mesg); |
| 645 | } |
| 646 | |
| 647 | static int ahci_pci_device_resume(struct pci_dev *pdev) |
| 648 | { |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 649 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 650 | int rc; |
| 651 | |
Tejun Heo | 553c4aa | 2006-12-26 19:39:50 +0900 | [diff] [blame] | 652 | rc = ata_pci_device_do_resume(pdev); |
| 653 | if (rc) |
| 654 | return rc; |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 655 | |
| 656 | if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { |
Anton Vorontsov | 3303040 | 2010-03-03 20:17:39 +0300 | [diff] [blame] | 657 | rc = ahci_pci_reset_controller(host); |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 658 | if (rc) |
| 659 | return rc; |
| 660 | |
Anton Vorontsov | 781d655 | 2010-03-03 20:17:42 +0300 | [diff] [blame] | 661 | ahci_pci_init_controller(host); |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 662 | } |
| 663 | |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 664 | ata_host_resume(host); |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 665 | |
| 666 | return 0; |
| 667 | } |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 668 | #endif |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 669 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 670 | static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 671 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | int rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 673 | |
Alessandro Rubini | 318893e | 2012-01-06 13:33:39 +0100 | [diff] [blame] | 674 | /* |
| 675 | * If the device fixup already set the dma_mask to some non-standard |
| 676 | * value, don't extend it here. This happens on STA2X11, for example. |
| 677 | */ |
| 678 | if (pdev->dma_mask && pdev->dma_mask < DMA_BIT_MASK(32)) |
| 679 | return 0; |
| 680 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 681 | if (using_dac && |
Yang Hongyang | 6a35528 | 2009-04-06 19:01:13 -0700 | [diff] [blame] | 682 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { |
| 683 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 684 | if (rc) { |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 685 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 686 | if (rc) { |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 687 | dev_err(&pdev->dev, |
| 688 | "64-bit DMA enable failed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | return rc; |
| 690 | } |
| 691 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | } else { |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 693 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 694 | if (rc) { |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 695 | dev_err(&pdev->dev, "32-bit DMA enable failed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 696 | return rc; |
| 697 | } |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 698 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 699 | if (rc) { |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 700 | dev_err(&pdev->dev, |
| 701 | "32-bit consistent DMA enable failed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 702 | return rc; |
| 703 | } |
| 704 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 705 | return 0; |
| 706 | } |
| 707 | |
Anton Vorontsov | 439fcae | 2010-03-03 20:17:43 +0300 | [diff] [blame] | 708 | static void ahci_pci_print_info(struct ata_host *host) |
| 709 | { |
| 710 | struct pci_dev *pdev = to_pci_dev(host->dev); |
| 711 | u16 cc; |
| 712 | const char *scc_s; |
| 713 | |
| 714 | pci_read_config_word(pdev, 0x0a, &cc); |
| 715 | if (cc == PCI_CLASS_STORAGE_IDE) |
| 716 | scc_s = "IDE"; |
| 717 | else if (cc == PCI_CLASS_STORAGE_SATA) |
| 718 | scc_s = "SATA"; |
| 719 | else if (cc == PCI_CLASS_STORAGE_RAID) |
| 720 | scc_s = "RAID"; |
| 721 | else |
| 722 | scc_s = "unknown"; |
| 723 | |
| 724 | ahci_print_info(host, scc_s); |
| 725 | } |
| 726 | |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 727 | /* On ASUS P5W DH Deluxe, the second port of PCI device 00:1f.2 is |
| 728 | * hardwired to on-board SIMG 4726. The chipset is ICH8 and doesn't |
| 729 | * support PMP and the 4726 either directly exports the device |
| 730 | * attached to the first downstream port or acts as a hardware storage |
| 731 | * controller and emulate a single ATA device (can be RAID 0/1 or some |
| 732 | * other configuration). |
| 733 | * |
| 734 | * When there's no device attached to the first downstream port of the |
| 735 | * 4726, "Config Disk" appears, which is a pseudo ATA device to |
| 736 | * configure the 4726. However, ATA emulation of the device is very |
| 737 | * lame. It doesn't send signature D2H Reg FIS after the initial |
| 738 | * hardreset, pukes on SRST w/ PMP==0 and has bunch of other issues. |
| 739 | * |
| 740 | * The following function works around the problem by always using |
| 741 | * hardreset on the port and not depending on receiving signature FIS |
| 742 | * afterward. If signature FIS isn't received soon, ATA class is |
| 743 | * assumed without follow-up softreset. |
| 744 | */ |
| 745 | static void ahci_p5wdh_workaround(struct ata_host *host) |
| 746 | { |
| 747 | static struct dmi_system_id sysids[] = { |
| 748 | { |
| 749 | .ident = "P5W DH Deluxe", |
| 750 | .matches = { |
| 751 | DMI_MATCH(DMI_SYS_VENDOR, |
| 752 | "ASUSTEK COMPUTER INC"), |
| 753 | DMI_MATCH(DMI_PRODUCT_NAME, "P5W DH Deluxe"), |
| 754 | }, |
| 755 | }, |
| 756 | { } |
| 757 | }; |
| 758 | struct pci_dev *pdev = to_pci_dev(host->dev); |
| 759 | |
| 760 | if (pdev->bus->number == 0 && pdev->devfn == PCI_DEVFN(0x1f, 2) && |
| 761 | dmi_check_system(sysids)) { |
| 762 | struct ata_port *ap = host->ports[1]; |
| 763 | |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 764 | dev_info(&pdev->dev, |
| 765 | "enabling ASUS P5W DH Deluxe on-board SIMG4726 workaround\n"); |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 766 | |
| 767 | ap->ops = &ahci_p5wdh_ops; |
| 768 | ap->link.flags |= ATA_LFLAG_NO_SRST | ATA_LFLAG_ASSUME_ATA; |
| 769 | } |
| 770 | } |
| 771 | |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 772 | /* only some SB600 ahci controllers can do 64bit DMA */ |
| 773 | static bool ahci_sb600_enable_64bit(struct pci_dev *pdev) |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 774 | { |
| 775 | static const struct dmi_system_id sysids[] = { |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 776 | /* |
| 777 | * The oldest version known to be broken is 0901 and |
| 778 | * working is 1501 which was released on 2007-10-26. |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 779 | * Enable 64bit DMA on 1501 and anything newer. |
| 780 | * |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 781 | * Please read bko#9412 for more info. |
| 782 | */ |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 783 | { |
| 784 | .ident = "ASUS M2A-VM", |
| 785 | .matches = { |
| 786 | DMI_MATCH(DMI_BOARD_VENDOR, |
| 787 | "ASUSTeK Computer INC."), |
| 788 | DMI_MATCH(DMI_BOARD_NAME, "M2A-VM"), |
| 789 | }, |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 790 | .driver_data = "20071026", /* yyyymmdd */ |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 791 | }, |
Mark Nelson | e65cc19 | 2009-11-03 20:06:48 +1100 | [diff] [blame] | 792 | /* |
| 793 | * All BIOS versions for the MSI K9A2 Platinum (MS-7376) |
| 794 | * support 64bit DMA. |
| 795 | * |
| 796 | * BIOS versions earlier than 1.5 had the Manufacturer DMI |
| 797 | * fields as "MICRO-STAR INTERANTIONAL CO.,LTD". |
| 798 | * This spelling mistake was fixed in BIOS version 1.5, so |
| 799 | * 1.5 and later have the Manufacturer as |
| 800 | * "MICRO-STAR INTERNATIONAL CO.,LTD". |
| 801 | * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER". |
| 802 | * |
| 803 | * BIOS versions earlier than 1.9 had a Board Product Name |
| 804 | * DMI field of "MS-7376". This was changed to be |
| 805 | * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still |
| 806 | * match on DMI_BOARD_NAME of "MS-7376". |
| 807 | */ |
| 808 | { |
| 809 | .ident = "MSI K9A2 Platinum", |
| 810 | .matches = { |
| 811 | DMI_MATCH(DMI_BOARD_VENDOR, |
| 812 | "MICRO-STAR INTER"), |
| 813 | DMI_MATCH(DMI_BOARD_NAME, "MS-7376"), |
| 814 | }, |
| 815 | }, |
Mark Nelson | 3c4aa91 | 2011-06-27 16:33:44 +1000 | [diff] [blame] | 816 | /* |
Mark Nelson | ff0173c | 2012-06-28 12:32:14 +1000 | [diff] [blame] | 817 | * All BIOS versions for the MSI K9AGM2 (MS-7327) support |
| 818 | * 64bit DMA. |
| 819 | * |
| 820 | * This board also had the typo mentioned above in the |
| 821 | * Manufacturer DMI field (fixed in BIOS version 1.5), so |
| 822 | * match on DMI_BOARD_VENDOR of "MICRO-STAR INTER" again. |
| 823 | */ |
| 824 | { |
| 825 | .ident = "MSI K9AGM2", |
| 826 | .matches = { |
| 827 | DMI_MATCH(DMI_BOARD_VENDOR, |
| 828 | "MICRO-STAR INTER"), |
| 829 | DMI_MATCH(DMI_BOARD_NAME, "MS-7327"), |
| 830 | }, |
| 831 | }, |
| 832 | /* |
Mark Nelson | 3c4aa91 | 2011-06-27 16:33:44 +1000 | [diff] [blame] | 833 | * All BIOS versions for the Asus M3A support 64bit DMA. |
| 834 | * (all release versions from 0301 to 1206 were tested) |
| 835 | */ |
| 836 | { |
| 837 | .ident = "ASUS M3A", |
| 838 | .matches = { |
| 839 | DMI_MATCH(DMI_BOARD_VENDOR, |
| 840 | "ASUSTeK Computer INC."), |
| 841 | DMI_MATCH(DMI_BOARD_NAME, "M3A"), |
| 842 | }, |
| 843 | }, |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 844 | { } |
| 845 | }; |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 846 | const struct dmi_system_id *match; |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 847 | int year, month, date; |
| 848 | char buf[9]; |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 849 | |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 850 | match = dmi_first_match(sysids); |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 851 | if (pdev->bus->number != 0 || pdev->devfn != PCI_DEVFN(0x12, 0) || |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 852 | !match) |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 853 | return false; |
| 854 | |
Mark Nelson | e65cc19 | 2009-11-03 20:06:48 +1100 | [diff] [blame] | 855 | if (!match->driver_data) |
| 856 | goto enable_64bit; |
| 857 | |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 858 | dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); |
| 859 | snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 860 | |
Mark Nelson | e65cc19 | 2009-11-03 20:06:48 +1100 | [diff] [blame] | 861 | if (strcmp(buf, match->driver_data) >= 0) |
| 862 | goto enable_64bit; |
| 863 | else { |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 864 | dev_warn(&pdev->dev, |
| 865 | "%s: BIOS too old, forcing 32bit DMA, update BIOS\n", |
| 866 | match->ident); |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 867 | return false; |
| 868 | } |
Mark Nelson | e65cc19 | 2009-11-03 20:06:48 +1100 | [diff] [blame] | 869 | |
| 870 | enable_64bit: |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 871 | dev_warn(&pdev->dev, "%s: enabling 64bit DMA\n", match->ident); |
Mark Nelson | e65cc19 | 2009-11-03 20:06:48 +1100 | [diff] [blame] | 872 | return true; |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 873 | } |
| 874 | |
Rafael J. Wysocki | 1fd6843 | 2009-01-19 20:57:36 +0100 | [diff] [blame] | 875 | static bool ahci_broken_system_poweroff(struct pci_dev *pdev) |
| 876 | { |
| 877 | static const struct dmi_system_id broken_systems[] = { |
| 878 | { |
| 879 | .ident = "HP Compaq nx6310", |
| 880 | .matches = { |
| 881 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 882 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6310"), |
| 883 | }, |
| 884 | /* PCI slot number of the controller */ |
| 885 | .driver_data = (void *)0x1FUL, |
| 886 | }, |
Maciej Rutecki | d2f9c06 | 2009-03-20 00:06:46 +0100 | [diff] [blame] | 887 | { |
| 888 | .ident = "HP Compaq 6720s", |
| 889 | .matches = { |
| 890 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 891 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6720s"), |
| 892 | }, |
| 893 | /* PCI slot number of the controller */ |
| 894 | .driver_data = (void *)0x1FUL, |
| 895 | }, |
Rafael J. Wysocki | 1fd6843 | 2009-01-19 20:57:36 +0100 | [diff] [blame] | 896 | |
| 897 | { } /* terminate list */ |
| 898 | }; |
| 899 | const struct dmi_system_id *dmi = dmi_first_match(broken_systems); |
| 900 | |
| 901 | if (dmi) { |
| 902 | unsigned long slot = (unsigned long)dmi->driver_data; |
| 903 | /* apply the quirk only to on-board controllers */ |
| 904 | return slot == PCI_SLOT(pdev->devfn); |
| 905 | } |
| 906 | |
| 907 | return false; |
| 908 | } |
| 909 | |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 910 | static bool ahci_broken_suspend(struct pci_dev *pdev) |
| 911 | { |
| 912 | static const struct dmi_system_id sysids[] = { |
| 913 | /* |
| 914 | * On HP dv[4-6] and HDX18 with earlier BIOSen, link |
| 915 | * to the harddisk doesn't become online after |
| 916 | * resuming from STR. Warn and fail suspend. |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 917 | * |
| 918 | * http://bugzilla.kernel.org/show_bug.cgi?id=12276 |
| 919 | * |
| 920 | * Use dates instead of versions to match as HP is |
| 921 | * apparently recycling both product and version |
| 922 | * strings. |
| 923 | * |
| 924 | * http://bugzilla.kernel.org/show_bug.cgi?id=15462 |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 925 | */ |
| 926 | { |
| 927 | .ident = "dv4", |
| 928 | .matches = { |
| 929 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 930 | DMI_MATCH(DMI_PRODUCT_NAME, |
| 931 | "HP Pavilion dv4 Notebook PC"), |
| 932 | }, |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 933 | .driver_data = "20090105", /* F.30 */ |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 934 | }, |
| 935 | { |
| 936 | .ident = "dv5", |
| 937 | .matches = { |
| 938 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 939 | DMI_MATCH(DMI_PRODUCT_NAME, |
| 940 | "HP Pavilion dv5 Notebook PC"), |
| 941 | }, |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 942 | .driver_data = "20090506", /* F.16 */ |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 943 | }, |
| 944 | { |
| 945 | .ident = "dv6", |
| 946 | .matches = { |
| 947 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 948 | DMI_MATCH(DMI_PRODUCT_NAME, |
| 949 | "HP Pavilion dv6 Notebook PC"), |
| 950 | }, |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 951 | .driver_data = "20090423", /* F.21 */ |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 952 | }, |
| 953 | { |
| 954 | .ident = "HDX18", |
| 955 | .matches = { |
| 956 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 957 | DMI_MATCH(DMI_PRODUCT_NAME, |
| 958 | "HP HDX18 Notebook PC"), |
| 959 | }, |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 960 | .driver_data = "20090430", /* F.23 */ |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 961 | }, |
Tejun Heo | cedc9bf | 2010-01-28 16:04:15 +0900 | [diff] [blame] | 962 | /* |
| 963 | * Acer eMachines G725 has the same problem. BIOS |
| 964 | * V1.03 is known to be broken. V3.04 is known to |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 965 | * work. Between, there are V1.06, V2.06 and V3.03 |
Tejun Heo | cedc9bf | 2010-01-28 16:04:15 +0900 | [diff] [blame] | 966 | * that we don't have much idea about. For now, |
| 967 | * blacklist anything older than V3.04. |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 968 | * |
| 969 | * http://bugzilla.kernel.org/show_bug.cgi?id=15104 |
Tejun Heo | cedc9bf | 2010-01-28 16:04:15 +0900 | [diff] [blame] | 970 | */ |
| 971 | { |
| 972 | .ident = "G725", |
| 973 | .matches = { |
| 974 | DMI_MATCH(DMI_SYS_VENDOR, "eMachines"), |
| 975 | DMI_MATCH(DMI_PRODUCT_NAME, "eMachines G725"), |
| 976 | }, |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 977 | .driver_data = "20091216", /* V3.04 */ |
Tejun Heo | cedc9bf | 2010-01-28 16:04:15 +0900 | [diff] [blame] | 978 | }, |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 979 | { } /* terminate list */ |
| 980 | }; |
| 981 | const struct dmi_system_id *dmi = dmi_first_match(sysids); |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 982 | int year, month, date; |
| 983 | char buf[9]; |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 984 | |
| 985 | if (!dmi || pdev->bus->number || pdev->devfn != PCI_DEVFN(0x1f, 2)) |
| 986 | return false; |
| 987 | |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 988 | dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); |
| 989 | snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 990 | |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 991 | return strcmp(buf, dmi->driver_data) < 0; |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 992 | } |
| 993 | |
Tejun Heo | 5594639 | 2009-08-04 14:30:08 +0900 | [diff] [blame] | 994 | static bool ahci_broken_online(struct pci_dev *pdev) |
| 995 | { |
| 996 | #define ENCODE_BUSDEVFN(bus, slot, func) \ |
| 997 | (void *)(unsigned long)(((bus) << 8) | PCI_DEVFN((slot), (func))) |
| 998 | static const struct dmi_system_id sysids[] = { |
| 999 | /* |
| 1000 | * There are several gigabyte boards which use |
| 1001 | * SIMG5723s configured as hardware RAID. Certain |
| 1002 | * 5723 firmware revisions shipped there keep the link |
| 1003 | * online but fail to answer properly to SRST or |
| 1004 | * IDENTIFY when no device is attached downstream |
| 1005 | * causing libata to retry quite a few times leading |
| 1006 | * to excessive detection delay. |
| 1007 | * |
| 1008 | * As these firmwares respond to the second reset try |
| 1009 | * with invalid device signature, considering unknown |
| 1010 | * sig as offline works around the problem acceptably. |
| 1011 | */ |
| 1012 | { |
| 1013 | .ident = "EP45-DQ6", |
| 1014 | .matches = { |
| 1015 | DMI_MATCH(DMI_BOARD_VENDOR, |
| 1016 | "Gigabyte Technology Co., Ltd."), |
| 1017 | DMI_MATCH(DMI_BOARD_NAME, "EP45-DQ6"), |
| 1018 | }, |
| 1019 | .driver_data = ENCODE_BUSDEVFN(0x0a, 0x00, 0), |
| 1020 | }, |
| 1021 | { |
| 1022 | .ident = "EP45-DS5", |
| 1023 | .matches = { |
| 1024 | DMI_MATCH(DMI_BOARD_VENDOR, |
| 1025 | "Gigabyte Technology Co., Ltd."), |
| 1026 | DMI_MATCH(DMI_BOARD_NAME, "EP45-DS5"), |
| 1027 | }, |
| 1028 | .driver_data = ENCODE_BUSDEVFN(0x03, 0x00, 0), |
| 1029 | }, |
| 1030 | { } /* terminate list */ |
| 1031 | }; |
| 1032 | #undef ENCODE_BUSDEVFN |
| 1033 | const struct dmi_system_id *dmi = dmi_first_match(sysids); |
| 1034 | unsigned int val; |
| 1035 | |
| 1036 | if (!dmi) |
| 1037 | return false; |
| 1038 | |
| 1039 | val = (unsigned long)dmi->driver_data; |
| 1040 | |
| 1041 | return pdev->bus->number == (val >> 8) && pdev->devfn == (val & 0xff); |
| 1042 | } |
| 1043 | |
Markus Trippelsdorf | 8e51321 | 2009-10-09 05:41:47 +0200 | [diff] [blame] | 1044 | #ifdef CONFIG_ATA_ACPI |
Tejun Heo | f80ae7e | 2009-09-16 04:18:03 +0900 | [diff] [blame] | 1045 | static void ahci_gtf_filter_workaround(struct ata_host *host) |
| 1046 | { |
| 1047 | static const struct dmi_system_id sysids[] = { |
| 1048 | /* |
| 1049 | * Aspire 3810T issues a bunch of SATA enable commands |
| 1050 | * via _GTF including an invalid one and one which is |
| 1051 | * rejected by the device. Among the successful ones |
| 1052 | * is FPDMA non-zero offset enable which when enabled |
| 1053 | * only on the drive side leads to NCQ command |
| 1054 | * failures. Filter it out. |
| 1055 | */ |
| 1056 | { |
| 1057 | .ident = "Aspire 3810T", |
| 1058 | .matches = { |
| 1059 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), |
| 1060 | DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 3810T"), |
| 1061 | }, |
| 1062 | .driver_data = (void *)ATA_ACPI_FILTER_FPDMA_OFFSET, |
| 1063 | }, |
| 1064 | { } |
| 1065 | }; |
| 1066 | const struct dmi_system_id *dmi = dmi_first_match(sysids); |
| 1067 | unsigned int filter; |
| 1068 | int i; |
| 1069 | |
| 1070 | if (!dmi) |
| 1071 | return; |
| 1072 | |
| 1073 | filter = (unsigned long)dmi->driver_data; |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 1074 | dev_info(host->dev, "applying extra ACPI _GTF filter 0x%x for %s\n", |
| 1075 | filter, dmi->ident); |
Tejun Heo | f80ae7e | 2009-09-16 04:18:03 +0900 | [diff] [blame] | 1076 | |
| 1077 | for (i = 0; i < host->n_ports; i++) { |
| 1078 | struct ata_port *ap = host->ports[i]; |
| 1079 | struct ata_link *link; |
| 1080 | struct ata_device *dev; |
| 1081 | |
| 1082 | ata_for_each_link(link, ap, EDGE) |
| 1083 | ata_for_each_dev(dev, link, ALL) |
| 1084 | dev->gtf_filter |= filter; |
| 1085 | } |
| 1086 | } |
Markus Trippelsdorf | 8e51321 | 2009-10-09 05:41:47 +0200 | [diff] [blame] | 1087 | #else |
| 1088 | static inline void ahci_gtf_filter_workaround(struct ata_host *host) |
| 1089 | {} |
| 1090 | #endif |
Tejun Heo | f80ae7e | 2009-09-16 04:18:03 +0900 | [diff] [blame] | 1091 | |
Alexander Gordeev | 5ca72c4 | 2012-11-19 16:02:48 +0100 | [diff] [blame] | 1092 | int ahci_init_interrupts(struct pci_dev *pdev, struct ahci_host_priv *hpriv) |
| 1093 | { |
| 1094 | int rc; |
| 1095 | unsigned int maxvec; |
| 1096 | |
| 1097 | if (!(hpriv->flags & AHCI_HFLAG_NO_MSI)) { |
| 1098 | rc = pci_enable_msi_block_auto(pdev, &maxvec); |
| 1099 | if (rc > 0) { |
| 1100 | if ((rc == maxvec) || (rc == 1)) |
| 1101 | return rc; |
| 1102 | /* |
| 1103 | * Assume that advantage of multipe MSIs is negated, |
| 1104 | * so fallback to single MSI mode to save resources |
| 1105 | */ |
| 1106 | pci_disable_msi(pdev); |
| 1107 | if (!pci_enable_msi(pdev)) |
| 1108 | return 1; |
| 1109 | } |
| 1110 | } |
| 1111 | |
| 1112 | pci_intx(pdev, 1); |
| 1113 | return 0; |
| 1114 | } |
| 1115 | |
| 1116 | /** |
| 1117 | * ahci_host_activate - start AHCI host, request IRQs and register it |
| 1118 | * @host: target ATA host |
| 1119 | * @irq: base IRQ number to request |
| 1120 | * @n_msis: number of MSIs allocated for this host |
| 1121 | * @irq_handler: irq_handler used when requesting IRQs |
| 1122 | * @irq_flags: irq_flags used when requesting IRQs |
| 1123 | * |
| 1124 | * Similar to ata_host_activate, but requests IRQs according to AHCI-1.1 |
| 1125 | * when multiple MSIs were allocated. That is one MSI per port, starting |
| 1126 | * from @irq. |
| 1127 | * |
| 1128 | * LOCKING: |
| 1129 | * Inherited from calling layer (may sleep). |
| 1130 | * |
| 1131 | * RETURNS: |
| 1132 | * 0 on success, -errno otherwise. |
| 1133 | */ |
| 1134 | int ahci_host_activate(struct ata_host *host, int irq, unsigned int n_msis) |
| 1135 | { |
| 1136 | int i, rc; |
| 1137 | |
| 1138 | /* Sharing Last Message among several ports is not supported */ |
| 1139 | if (n_msis < host->n_ports) |
| 1140 | return -EINVAL; |
| 1141 | |
| 1142 | rc = ata_host_start(host); |
| 1143 | if (rc) |
| 1144 | return rc; |
| 1145 | |
| 1146 | for (i = 0; i < host->n_ports; i++) { |
| 1147 | rc = devm_request_threaded_irq(host->dev, |
| 1148 | irq + i, ahci_hw_interrupt, ahci_thread_fn, IRQF_SHARED, |
| 1149 | dev_driver_string(host->dev), host->ports[i]); |
| 1150 | if (rc) |
| 1151 | goto out_free_irqs; |
| 1152 | } |
| 1153 | |
| 1154 | for (i = 0; i < host->n_ports; i++) |
| 1155 | ata_port_desc(host->ports[i], "irq %d", irq + i); |
| 1156 | |
| 1157 | rc = ata_host_register(host, &ahci_sht); |
| 1158 | if (rc) |
| 1159 | goto out_free_all_irqs; |
| 1160 | |
| 1161 | return 0; |
| 1162 | |
| 1163 | out_free_all_irqs: |
| 1164 | i = host->n_ports; |
| 1165 | out_free_irqs: |
| 1166 | for (i--; i >= 0; i--) |
| 1167 | devm_free_irq(host->dev, irq + i, host->ports[i]); |
| 1168 | |
| 1169 | return rc; |
| 1170 | } |
| 1171 | |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1172 | static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1173 | { |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 1174 | unsigned int board_id = ent->driver_data; |
| 1175 | struct ata_port_info pi = ahci_port_info[board_id]; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1176 | const struct ata_port_info *ppi[] = { &pi, NULL }; |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1177 | struct device *dev = &pdev->dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1178 | struct ahci_host_priv *hpriv; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1179 | struct ata_host *host; |
Alexander Gordeev | 5ca72c4 | 2012-11-19 16:02:48 +0100 | [diff] [blame] | 1180 | int n_ports, n_msis, i, rc; |
Alessandro Rubini | 318893e | 2012-01-06 13:33:39 +0100 | [diff] [blame] | 1181 | int ahci_pci_bar = AHCI_PCI_BAR_STANDARD; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1182 | |
| 1183 | VPRINTK("ENTER\n"); |
| 1184 | |
Justin P. Mattock | b429dd5 | 2010-07-03 07:29:25 -0700 | [diff] [blame] | 1185 | WARN_ON((int)ATA_MAX_QUEUE > AHCI_MAX_CMDS); |
Tejun Heo | 12fad3f | 2006-05-15 21:03:55 +0900 | [diff] [blame] | 1186 | |
Joe Perches | 06296a1 | 2011-04-15 15:52:00 -0700 | [diff] [blame] | 1187 | ata_print_version_once(&pdev->dev, DRV_VERSION); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1188 | |
Alan Cox | 5b66c82 | 2008-09-03 14:48:34 +0100 | [diff] [blame] | 1189 | /* The AHCI driver can only drive the SATA ports, the PATA driver |
| 1190 | can drive them all so if both drivers are selected make sure |
| 1191 | AHCI stays out of the way */ |
| 1192 | if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable) |
| 1193 | return -ENODEV; |
| 1194 | |
Tejun Heo | c6353b4 | 2010-06-17 11:42:22 +0200 | [diff] [blame] | 1195 | /* |
| 1196 | * For some reason, MCP89 on MacBook 7,1 doesn't work with |
| 1197 | * ahci, use ata_generic instead. |
| 1198 | */ |
| 1199 | if (pdev->vendor == PCI_VENDOR_ID_NVIDIA && |
| 1200 | pdev->device == PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA && |
| 1201 | pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE && |
| 1202 | pdev->subsystem_device == 0xcb89) |
| 1203 | return -ENODEV; |
| 1204 | |
Mark Nelson | 7a02267 | 2009-11-22 12:07:41 +1100 | [diff] [blame] | 1205 | /* Promise's PDC42819 is a SAS/SATA controller that has an AHCI mode. |
| 1206 | * At the moment, we can only use the AHCI mode. Let the users know |
| 1207 | * that for SAS drives they're out of luck. |
| 1208 | */ |
| 1209 | if (pdev->vendor == PCI_VENDOR_ID_PROMISE) |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 1210 | dev_info(&pdev->dev, |
| 1211 | "PDC42819 can only drive SATA devices with this driver\n"); |
Mark Nelson | 7a02267 | 2009-11-22 12:07:41 +1100 | [diff] [blame] | 1212 | |
Hugh Daschbach | 7f9c9f8 | 2013-01-04 14:39:09 -0800 | [diff] [blame] | 1213 | /* Both Connext and Enmotus devices use non-standard BARs */ |
Alessandro Rubini | 318893e | 2012-01-06 13:33:39 +0100 | [diff] [blame] | 1214 | if (pdev->vendor == PCI_VENDOR_ID_STMICRO && pdev->device == 0xCC06) |
| 1215 | ahci_pci_bar = AHCI_PCI_BAR_STA2X11; |
Hugh Daschbach | 7f9c9f8 | 2013-01-04 14:39:09 -0800 | [diff] [blame] | 1216 | else if (pdev->vendor == 0x1c44 && pdev->device == 0x8000) |
| 1217 | ahci_pci_bar = AHCI_PCI_BAR_ENMOTUS; |
Alessandro Rubini | 318893e | 2012-01-06 13:33:39 +0100 | [diff] [blame] | 1218 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1219 | /* acquire resources */ |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1220 | rc = pcim_enable_device(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1221 | if (rc) |
| 1222 | return rc; |
| 1223 | |
Tejun Heo | dea5513 | 2008-03-11 19:52:31 +0900 | [diff] [blame] | 1224 | /* AHCI controllers often implement SFF compatible interface. |
| 1225 | * Grab all PCI BARs just in case. |
| 1226 | */ |
Alessandro Rubini | 318893e | 2012-01-06 13:33:39 +0100 | [diff] [blame] | 1227 | rc = pcim_iomap_regions_request_all(pdev, 1 << ahci_pci_bar, DRV_NAME); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 1228 | if (rc == -EBUSY) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1229 | pcim_pin_device(pdev); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 1230 | if (rc) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1231 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1232 | |
Tejun Heo | c4f7792 | 2007-12-06 15:09:43 +0900 | [diff] [blame] | 1233 | if (pdev->vendor == PCI_VENDOR_ID_INTEL && |
| 1234 | (pdev->device == 0x2652 || pdev->device == 0x2653)) { |
| 1235 | u8 map; |
| 1236 | |
| 1237 | /* ICH6s share the same PCI ID for both piix and ahci |
| 1238 | * modes. Enabling ahci mode while MAP indicates |
| 1239 | * combined mode is a bad idea. Yield to ata_piix. |
| 1240 | */ |
| 1241 | pci_read_config_byte(pdev, ICH_MAP, &map); |
| 1242 | if (map & 0x3) { |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 1243 | dev_info(&pdev->dev, |
| 1244 | "controller is in combined mode, can't enable AHCI mode\n"); |
Tejun Heo | c4f7792 | 2007-12-06 15:09:43 +0900 | [diff] [blame] | 1245 | return -ENODEV; |
| 1246 | } |
| 1247 | } |
| 1248 | |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1249 | hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL); |
| 1250 | if (!hpriv) |
| 1251 | return -ENOMEM; |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 1252 | hpriv->flags |= (unsigned long)pi.private_data; |
| 1253 | |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 1254 | /* MCP65 revision A1 and A2 can't do MSI */ |
| 1255 | if (board_id == board_ahci_mcp65 && |
| 1256 | (pdev->revision == 0xa1 || pdev->revision == 0xa2)) |
| 1257 | hpriv->flags |= AHCI_HFLAG_NO_MSI; |
| 1258 | |
Shane Huang | e427fe0 | 2008-12-30 10:53:41 +0800 | [diff] [blame] | 1259 | /* SB800 does NOT need the workaround to ignore SERR_INTERNAL */ |
| 1260 | if (board_id == board_ahci_sb700 && pdev->revision >= 0x40) |
| 1261 | hpriv->flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL; |
| 1262 | |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 1263 | /* only some SB600s can do 64bit DMA */ |
| 1264 | if (ahci_sb600_enable_64bit(pdev)) |
| 1265 | hpriv->flags &= ~AHCI_HFLAG_32BIT_ONLY; |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 1266 | |
Alessandro Rubini | 318893e | 2012-01-06 13:33:39 +0100 | [diff] [blame] | 1267 | hpriv->mmio = pcim_iomap_table(pdev)[ahci_pci_bar]; |
Anton Vorontsov | d899334 | 2010-03-03 20:17:34 +0300 | [diff] [blame] | 1268 | |
Alexander Gordeev | 5ca72c4 | 2012-11-19 16:02:48 +0100 | [diff] [blame] | 1269 | n_msis = ahci_init_interrupts(pdev, hpriv); |
| 1270 | if (n_msis > 1) |
| 1271 | hpriv->flags |= AHCI_HFLAG_MULTI_MSI; |
| 1272 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1273 | /* save initial config */ |
Anton Vorontsov | 394d6e5 | 2010-03-03 20:17:36 +0300 | [diff] [blame] | 1274 | ahci_pci_save_initial_config(pdev, hpriv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1275 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1276 | /* prepare host */ |
Robert Hancock | 453d313 | 2010-01-26 22:33:23 -0600 | [diff] [blame] | 1277 | if (hpriv->cap & HOST_CAP_NCQ) { |
| 1278 | pi.flags |= ATA_FLAG_NCQ; |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 1279 | /* |
| 1280 | * Auto-activate optimization is supposed to be |
| 1281 | * supported on all AHCI controllers indicating NCQ |
| 1282 | * capability, but it seems to be broken on some |
| 1283 | * chipsets including NVIDIAs. |
| 1284 | */ |
| 1285 | if (!(hpriv->flags & AHCI_HFLAG_NO_FPDMA_AA)) |
Robert Hancock | 453d313 | 2010-01-26 22:33:23 -0600 | [diff] [blame] | 1286 | pi.flags |= ATA_FLAG_FPDMA_AA; |
| 1287 | } |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1288 | |
Tejun Heo | 7d50b60 | 2007-09-23 13:19:54 +0900 | [diff] [blame] | 1289 | if (hpriv->cap & HOST_CAP_PMP) |
| 1290 | pi.flags |= ATA_FLAG_PMP; |
| 1291 | |
Anton Vorontsov | 0cbb0e7 | 2010-03-03 20:17:45 +0300 | [diff] [blame] | 1292 | ahci_set_em_messages(hpriv, &pi); |
Kristen Carlson Accardi | 18f7ba4 | 2008-06-03 10:33:55 -0700 | [diff] [blame] | 1293 | |
Rafael J. Wysocki | 1fd6843 | 2009-01-19 20:57:36 +0100 | [diff] [blame] | 1294 | if (ahci_broken_system_poweroff(pdev)) { |
| 1295 | pi.flags |= ATA_FLAG_NO_POWEROFF_SPINDOWN; |
| 1296 | dev_info(&pdev->dev, |
| 1297 | "quirky BIOS, skipping spindown on poweroff\n"); |
| 1298 | } |
| 1299 | |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 1300 | if (ahci_broken_suspend(pdev)) { |
| 1301 | hpriv->flags |= AHCI_HFLAG_NO_SUSPEND; |
Joe Perches | a44fec1 | 2011-04-15 15:51:58 -0700 | [diff] [blame] | 1302 | dev_warn(&pdev->dev, |
| 1303 | "BIOS update required for suspend/resume\n"); |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 1304 | } |
| 1305 | |
Tejun Heo | 5594639 | 2009-08-04 14:30:08 +0900 | [diff] [blame] | 1306 | if (ahci_broken_online(pdev)) { |
| 1307 | hpriv->flags |= AHCI_HFLAG_SRST_TOUT_IS_OFFLINE; |
| 1308 | dev_info(&pdev->dev, |
| 1309 | "online status unreliable, applying workaround\n"); |
| 1310 | } |
| 1311 | |
Tejun Heo | 837f5f8 | 2008-02-06 15:13:51 +0900 | [diff] [blame] | 1312 | /* CAP.NP sometimes indicate the index of the last enabled |
| 1313 | * port, at other times, that of the last possible port, so |
| 1314 | * determining the maximum port number requires looking at |
| 1315 | * both CAP.NP and port_map. |
| 1316 | */ |
| 1317 | n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map)); |
| 1318 | |
| 1319 | host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1320 | if (!host) |
| 1321 | return -ENOMEM; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1322 | host->private_data = hpriv; |
| 1323 | |
Arjan van de Ven | f3d7f23 | 2009-01-26 02:05:44 -0800 | [diff] [blame] | 1324 | if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss) |
Arjan van de Ven | 886ad09 | 2009-01-09 15:54:07 -0800 | [diff] [blame] | 1325 | host->flags |= ATA_HOST_PARALLEL_SCAN; |
Arjan van de Ven | f3d7f23 | 2009-01-26 02:05:44 -0800 | [diff] [blame] | 1326 | else |
| 1327 | printk(KERN_INFO "ahci: SSS flag set, parallel bus scan disabled\n"); |
Arjan van de Ven | 886ad09 | 2009-01-09 15:54:07 -0800 | [diff] [blame] | 1328 | |
Kristen Carlson Accardi | 18f7ba4 | 2008-06-03 10:33:55 -0700 | [diff] [blame] | 1329 | if (pi.flags & ATA_FLAG_EM) |
| 1330 | ahci_reset_em(host); |
| 1331 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1332 | for (i = 0; i < host->n_ports; i++) { |
Jeff Garzik | dab632e | 2007-05-28 08:33:01 -0400 | [diff] [blame] | 1333 | struct ata_port *ap = host->ports[i]; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1334 | |
Alessandro Rubini | 318893e | 2012-01-06 13:33:39 +0100 | [diff] [blame] | 1335 | ata_port_pbar_desc(ap, ahci_pci_bar, -1, "abar"); |
| 1336 | ata_port_pbar_desc(ap, ahci_pci_bar, |
Tejun Heo | cbcdd87 | 2007-08-18 13:14:55 +0900 | [diff] [blame] | 1337 | 0x100 + ap->port_no * 0x80, "port"); |
| 1338 | |
Kristen Carlson Accardi | 18f7ba4 | 2008-06-03 10:33:55 -0700 | [diff] [blame] | 1339 | /* set enclosure management message type */ |
| 1340 | if (ap->flags & ATA_FLAG_EM) |
Harry Zhang | 008dbd6 | 2010-04-23 17:27:19 +0800 | [diff] [blame] | 1341 | ap->em_message_type = hpriv->em_msg_type; |
Kristen Carlson Accardi | 18f7ba4 | 2008-06-03 10:33:55 -0700 | [diff] [blame] | 1342 | |
| 1343 | |
Jeff Garzik | dab632e | 2007-05-28 08:33:01 -0400 | [diff] [blame] | 1344 | /* disabled/not-implemented port */ |
Tejun Heo | 350756f | 2008-04-07 22:47:21 +0900 | [diff] [blame] | 1345 | if (!(hpriv->port_map & (1 << i))) |
Jeff Garzik | dab632e | 2007-05-28 08:33:01 -0400 | [diff] [blame] | 1346 | ap->ops = &ata_dummy_port_ops; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1347 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1348 | |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 1349 | /* apply workaround for ASUS P5W DH Deluxe mainboard */ |
| 1350 | ahci_p5wdh_workaround(host); |
| 1351 | |
Tejun Heo | f80ae7e | 2009-09-16 04:18:03 +0900 | [diff] [blame] | 1352 | /* apply gtf filter quirk */ |
| 1353 | ahci_gtf_filter_workaround(host); |
| 1354 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1355 | /* initialize adapter */ |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1356 | rc = ahci_configure_dma_masks(pdev, hpriv->cap & HOST_CAP_64); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1357 | if (rc) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1358 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1359 | |
Anton Vorontsov | 3303040 | 2010-03-03 20:17:39 +0300 | [diff] [blame] | 1360 | rc = ahci_pci_reset_controller(host); |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1361 | if (rc) |
| 1362 | return rc; |
Tejun Heo | 12fad3f | 2006-05-15 21:03:55 +0900 | [diff] [blame] | 1363 | |
Anton Vorontsov | 781d655 | 2010-03-03 20:17:42 +0300 | [diff] [blame] | 1364 | ahci_pci_init_controller(host); |
Anton Vorontsov | 439fcae | 2010-03-03 20:17:43 +0300 | [diff] [blame] | 1365 | ahci_pci_print_info(host); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1366 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1367 | pci_set_master(pdev); |
Alexander Gordeev | 5ca72c4 | 2012-11-19 16:02:48 +0100 | [diff] [blame] | 1368 | |
| 1369 | if (hpriv->flags & AHCI_HFLAG_MULTI_MSI) |
| 1370 | return ahci_host_activate(host, pdev->irq, n_msis); |
| 1371 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1372 | return ata_host_activate(host, pdev->irq, ahci_interrupt, IRQF_SHARED, |
| 1373 | &ahci_sht); |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1374 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1375 | |
Axel Lin | 2fc75da | 2012-04-19 13:43:05 +0800 | [diff] [blame] | 1376 | module_pci_driver(ahci_pci_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1377 | |
| 1378 | MODULE_AUTHOR("Jeff Garzik"); |
| 1379 | MODULE_DESCRIPTION("AHCI SATA low-level driver"); |
| 1380 | MODULE_LICENSE("GPL"); |
| 1381 | MODULE_DEVICE_TABLE(pci, ahci_pci_tbl); |
Jeff Garzik | 6885433 | 2005-08-23 02:53:51 -0400 | [diff] [blame] | 1382 | MODULE_VERSION(DRV_VERSION); |