blob: 2a59c8c98521fb024ead35a5d77047dbd5cdf143 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
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527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
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529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
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533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
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544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
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547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07001475 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
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Marat Dukhand816f622020-07-15 10:14:39 -07001480 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001486 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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Marat Dukhan66d99e92020-07-16 12:56:21 -07001627 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001628 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001629 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001630 "src/x32-zip/x2-wasmsimd.c",
1631 "src/x32-zip/x3-wasmsimd.c",
1632 "src/x32-zip/x4-wasmsimd.c",
1633 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001634]
1635
Marat Dukhan08c4a432019-10-03 09:29:21 -07001636# ISA-specific micro-kernels
1637NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001638 "src/f32-argmaxpool/4x-neon-c4.c",
1639 "src/f32-argmaxpool/9p8x-neon-c4.c",
1640 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001641 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1642 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001643 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001644 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001645 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001646 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001647 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001648 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001649 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001650 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001651 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001652 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001653 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001654 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001655 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001656 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001657 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1658 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1659 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1660 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1661 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001662 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001663 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001664 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1665 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1666 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001667 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001668 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001669 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1670 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1671 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1672 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1673 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001674 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1675 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1676 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001677 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001678 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001679 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1680 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1681 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001682 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1683 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1684 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1685 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001686 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001687 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1688 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001689 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001690 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001691 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001692 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001693 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1694 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001695 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1696 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1697 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1698 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1699 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1700 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1701 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1702 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001703 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001704 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001705 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001706 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1707 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001708 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001709 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1710 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001711 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001712 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1713 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1714 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1715 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1716 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001717 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1718 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001719 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1720 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001721 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1722 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001723 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1724 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1725 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1726 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1727 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1728 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1729 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1730 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1731 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1732 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1733 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1734 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1735 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1736 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1737 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1738 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001739 "src/f32-ibilinear-chw/gen/neon-p4.c",
1740 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001741 "src/f32-ibilinear/gen/neon-c4.c",
1742 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001743 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001744 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001745 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001746 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1747 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001748 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001749 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1750 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1751 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1752 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001753 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1754 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001755 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1756 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001757 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1758 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001759 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1760 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1761 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001762 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1763 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001764 "src/f32-prelu/gen/neon-1x4.c",
1765 "src/f32-prelu/gen/neon-1x8.c",
1766 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001767 "src/f32-prelu/gen/neon-2x4.c",
1768 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001769 "src/f32-prelu/gen/neon-2x16.c",
1770 "src/f32-prelu/gen/neon-4x4.c",
1771 "src/f32-prelu/gen/neon-4x8.c",
1772 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001773 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001774 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001775 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001776 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1777 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001778 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001779 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1780 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001781 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001782 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1783 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001784 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1785 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1786 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1787 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1788 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1789 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1790 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1791 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1792 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1793 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1794 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1795 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1796 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001797 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001798 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1799 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1800 "src/f32-spmm/gen/4x1-minmax-neon.c",
1801 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1802 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1803 "src/f32-spmm/gen/8x1-minmax-neon.c",
1804 "src/f32-spmm/gen/12x1-minmax-neon.c",
1805 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1806 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1807 "src/f32-spmm/gen/16x1-minmax-neon.c",
1808 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1809 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1810 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001811 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1812 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1813 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1814 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001815 "src/f32-vbinary/gen/vmax-neon-x4.c",
1816 "src/f32-vbinary/gen/vmax-neon-x8.c",
1817 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1818 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1819 "src/f32-vbinary/gen/vmin-neon-x4.c",
1820 "src/f32-vbinary/gen/vmin-neon-x8.c",
1821 "src/f32-vbinary/gen/vminc-neon-x4.c",
1822 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001823 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1824 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1825 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1826 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1827 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1828 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001829 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1830 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1831 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1832 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001833 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1834 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1835 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1836 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001837 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1838 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001839 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1840 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1841 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1842 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1843 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1844 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1845 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1846 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1847 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1848 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1849 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1850 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001851 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1852 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1853 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001854 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1855 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001856 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1857 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001858 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1859 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001860 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1861 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001862 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1863 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1864 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1865 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1866 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1867 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001868 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1869 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1870 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1871 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1872 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1873 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1874 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1875 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1876 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1877 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1878 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1879 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1880 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1881 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1882 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1883 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1884 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1885 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001886 "src/f32-vunary/gen/vabs-neon-x4.c",
1887 "src/f32-vunary/gen/vabs-neon-x8.c",
1888 "src/f32-vunary/gen/vneg-neon-x4.c",
1889 "src/f32-vunary/gen/vneg-neon-x8.c",
1890 "src/f32-vunary/gen/vsqr-neon-x4.c",
1891 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001892 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1893 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001894 "src/math/roundd-neon-addsub.c",
1895 "src/math/roundd-neon-cvt.c",
1896 "src/math/roundne-neon-addsub.c",
1897 "src/math/roundu-neon-addsub.c",
1898 "src/math/roundu-neon-cvt.c",
1899 "src/math/roundz-neon-addsub.c",
1900 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001901 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1902 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1903 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1904 "src/math/sqrt-neon-nr1rsqrts.c",
1905 "src/math/sqrt-neon-nr2rsqrts.c",
1906 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001907 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001908 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001909 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001910 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001911 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001912 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001913 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001914 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1915 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1916 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1917 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1918 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001919 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001920 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1921 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001922 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001923 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1924 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001925 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001926 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1927 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001928 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001929 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1930 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001931 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001932 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001933 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001934 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001935 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001936 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001937 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001938 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001939 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001940 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001941 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001942 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001943 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001944 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001945 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001946 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001947 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001948 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001949 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001950 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001951 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001952 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001953 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001954 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001955 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1956 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1957 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1958 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001959 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1960 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1961 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1962 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001963 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1964 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1965 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001966 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001967 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1968 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07001969 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001970 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001971 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001972 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07001973 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001974 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001975 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001976 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1977 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1978 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1979 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1980 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1981 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1982 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1983 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1984 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1985 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1986 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001987 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001988 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1989 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07001990 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001991 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001992 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001993 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07001994 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001995 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1996 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1997 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1998 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1999 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2000 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2001 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2002 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2003 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2004 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2005 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2006 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2007 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2008 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2009 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2010 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2011 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2012 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2013 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
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2021 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
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2033 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2034 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2035 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2036 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2037 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2038 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2039 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002045 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002211 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2212 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002213 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2214 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002215 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002216 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002217 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002218 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2219 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002220 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002221 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2222 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002223 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002224 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2225 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002226 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2227 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2228 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2229 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2230 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2231 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2232 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2233 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2234 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2235 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2236 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2237 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2238 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002239 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2240 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2241 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2242 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2243 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2244 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2245 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2246 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2247 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2248 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2249 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2250 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2251 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002252 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2253 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2254 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2255 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2256 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2257 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2258 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2259 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2260 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2261 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2262 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2263 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002264 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2265 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002266 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2267 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2268 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2269 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2270 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2271 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2272 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2273 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2274 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2275 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2276 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2277 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2278 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2279 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2280 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2281 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2282 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2283 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2284 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2285 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2286 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2287 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2288 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2289 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2290 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2291 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2292 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2293 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2294 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2295 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2296 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2297 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2298 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2299 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2300 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2301 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2302 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2303 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2304 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2305 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2306 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2307 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2308 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2309 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2310 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2311 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2312 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2313 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2314 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2315 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2316 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2317 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2318 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2319 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002320 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2321 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2322 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2323 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2324 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2325 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2326 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2327 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2328 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2329 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2330 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2331 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2332 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2333 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2334 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2335 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2336 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2337 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2338 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2339 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002340 "src/math/exp-neonfma-rr2-lut64-p2.c",
2341 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002342 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2343 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002344 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2345 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2346 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002347 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2348 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2349 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002350 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2351 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2352 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002353 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2354 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2355 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002356 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2357 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2358 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002359 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2360 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2361 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002362 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2363 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2364 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002365 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002366 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002367 "src/math/sqrt-neonfma-nr2fma.c",
2368 "src/math/sqrt-neonfma-nr2fma1adj.c",
2369 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002370]
2371
2372AARCH64_NEONFMA_UKERNELS = [
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Marat Dukhance7a3f82020-05-17 21:46:44 -07002374 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002375 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
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Marat Dukhan56b10cd2020-05-18 09:35:49 -07002377 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002379 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
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Marat Dukhan1f29b802020-05-15 23:46:39 -07002381 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002382 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan1268a242020-10-24 00:36:32 -07002385 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
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Marat Dukhan1268a242020-10-24 00:36:32 -07002387 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2389 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
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2391 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002392 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2393 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2394 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002395 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002396 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002397 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2398 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2399 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002400 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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2402 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002404 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002405 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2406 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002407 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002408 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002409 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002410 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002411 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002413 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2414 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2415 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2416 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2417 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2418 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2419 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2420 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002421 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002422 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002423 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2424 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2425 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2426 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2427 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2428 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2429 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2430 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2431 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2432 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2433 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2434 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2435 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2436 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2437 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2438 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2439 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2440 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2441 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2442 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002443 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2444 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002445 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2446 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002447 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2448 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002449 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2450 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002451 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2452 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002453 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2454 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2455 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2456 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2457 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2458 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002459 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2460 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2461 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2462 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2463 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2464 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2465 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2466 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2467 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2468 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2469 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2470 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2471 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2472 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2473 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2474 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2475 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2476 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002477 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002479 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002480 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002481 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002482 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002483 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002484 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002485]
2486
Marat Dukhan8853b822020-05-07 12:19:01 -07002487NEONV8_UKERNELS = [
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2492 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2493 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2494 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2495 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002496 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002497 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002498 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002499 "src/math/roundz-neonv8.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07002500 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002501 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07002502 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002503 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07002504 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8.c",
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Marat Dukhan4ba70b72021-07-19 11:20:16 -07002506 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002512 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002515 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002516 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2517 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002518 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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2520 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002521 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002522 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2523 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
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2526 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2527 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2528 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2529 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2530 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002535 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002538 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002539 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2540 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002541 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002542 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2543 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002544 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2545 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2546 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2547 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2548 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2549 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2550 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2551 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002552 "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2553 "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
2554 "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2555 "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002556]
2557
Marat Dukhan08c4a432019-10-03 09:29:21 -07002558AARCH64_NEONFP16ARITH_UKERNELS = [
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2561 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002563 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
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2565 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2566 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2567 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2568 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2569 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2570 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002571 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002573 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
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2575 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2576 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2577 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2578 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
2579 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2580 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2581 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2582 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2583 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2584 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2585 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2586 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2587 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2588 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
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2644
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2786 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002787 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2788 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2789 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002790 "src/f32-ibilinear-chw/gen/sse-p4.c",
2791 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002792 "src/f32-ibilinear/gen/sse-c4.c",
2793 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002794 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2795 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2796 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002797 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2798 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2799 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002800 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2801 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2802 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2803 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002804 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2805 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2806 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002807 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2808 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2809 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002810 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002811 "src/f32-prelu/gen/sse-2x4.c",
2812 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002813 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002814 "src/f32-spmm/gen/4x1-minmax-sse.c",
2815 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002816 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002817 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002818 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2819 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2820 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2821 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2822 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2823 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2824 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2825 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002826 "src/f32-vbinary/gen/vmax-sse-x4.c",
2827 "src/f32-vbinary/gen/vmax-sse-x8.c",
2828 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2829 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2830 "src/f32-vbinary/gen/vmin-sse-x4.c",
2831 "src/f32-vbinary/gen/vmin-sse-x8.c",
2832 "src/f32-vbinary/gen/vminc-sse-x4.c",
2833 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002834 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2835 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2836 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2837 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2838 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2839 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2840 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2841 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002842 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2843 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2844 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2845 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002846 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2847 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2848 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2849 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002850 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2851 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002852 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2853 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002854 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2855 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002856 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2857 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002858 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2859 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002860 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2861 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002862 "src/f32-vunary/gen/vabs-sse-x4.c",
2863 "src/f32-vunary/gen/vabs-sse-x8.c",
2864 "src/f32-vunary/gen/vneg-sse-x4.c",
2865 "src/f32-vunary/gen/vneg-sse-x8.c",
2866 "src/f32-vunary/gen/vsqr-sse-x4.c",
2867 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002868 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002869 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002870 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002871 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002872 "src/math/sqrt-sse-hh1mac.c",
2873 "src/math/sqrt-sse-nr1mac.c",
2874 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002875 "src/x32-fill/sse.c",
2876 "src/x32-packx/x4-sse.c",
2877 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002878]
2879
2880SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002881 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002882 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002883 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002884 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2885 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2886 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2887 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2888 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2889 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2890 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2891 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2892 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2893 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2894 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2895 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002896 "src/f32-prelu/gen/sse2-2x4.c",
2897 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002898 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002899 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002900 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002901 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2902 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002903 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002904 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2905 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002906 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002907 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2908 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002909 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002910 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2911 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2912 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2913 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2914 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2915 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2916 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2917 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2918 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2919 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2920 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2921 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002922 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2923 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002924 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2925 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002926 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2927 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2928 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2929 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2930 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2931 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002932 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2933 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2934 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2935 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2936 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2937 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2938 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2939 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2940 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2941 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2942 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2943 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002944 "src/math/exp-sse2-rr2-lut64-p2.c",
2945 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002946 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002947 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002948 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002949 "src/math/roundd-sse2-cvt.c",
2950 "src/math/roundne-sse2-cvt.c",
2951 "src/math/roundu-sse2-cvt.c",
2952 "src/math/roundz-sse2-cvt.c",
2953 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2954 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2955 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2956 "src/math/sigmoid-sse2-rr2-p5-div.c",
2957 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2958 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002959 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2960 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2961 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2962 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2963 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2964 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002965 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002966 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002967 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002968 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002969 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002970 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002971 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002972 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002973 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002974 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002975 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002976 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002977 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002978 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002979 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002980 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002981 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002982 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002983 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002984 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002985 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002986 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002987 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002988 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002989 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002990 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002991 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002992 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002993 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2994 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002995 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2996 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
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Marat Dukhancdbe9a32021-07-01 23:52:04 -07003167 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
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3169 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3170 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003171 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003172 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003173]
3174
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003175SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08003176 "src/f32-prelu/gen/sse41-2x4.c",
3177 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003178 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
3179 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
3180 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
3181 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
3182 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
3183 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
3184 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
3185 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
3186 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
3187 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
3188 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
3189 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003190 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
3191 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003192 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
3193 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003194 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
3195 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
3196 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
3197 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
3198 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
3199 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003200 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
3201 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
3202 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
3203 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
3204 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
3205 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
3206 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
3207 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
3208 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
3209 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
3210 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
3211 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003212 "src/math/roundd-sse41.c",
3213 "src/math/roundne-sse41.c",
3214 "src/math/roundu-sse41.c",
3215 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003216 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3217 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3218 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3219 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3220 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3221 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3222 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3223 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3224 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3225 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3226 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3227 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003228 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003229 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003230 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003231 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003232 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003233 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003234 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003235 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003236 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003237 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003238 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003239 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003240 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003241 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003242 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003243 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003244 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003245 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003246 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003247 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003248 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003249 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003250 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003251 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003252 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003253 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003254 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003255 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003256 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3257 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3258 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
3259 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003260 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3261 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3262 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
3263 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3264 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3265 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3266 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3267 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3268 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3269 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3270 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3271 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3272 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3273 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3274 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
3275 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3276 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3277 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3278 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3279 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003280 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3281 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3282 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003283 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
3284 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
3285 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003286 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003287 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003288 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003289 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003290 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003291 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003292 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003293 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003294 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003295 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003296 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003297 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003298 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003299 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003300 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003301 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003302 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003303 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003304 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003305 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003306 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003307 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003308 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003309 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003310 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003311 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003312 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003313 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003314 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003315 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003316 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003317 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003318 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003319 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003320 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003321 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003322 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003323 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003324 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003325 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003326 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003327 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003328 "src/qs8-requantization/rndnu-sse4-sra.c",
3329 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003330 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3331 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3332 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3333 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003334 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3335 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3336 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3337 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003338 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3339 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3340 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3341 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003342 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3343 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3344 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3345 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003346 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003347 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003348 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003349 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003350 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003351 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003352 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003353 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003354 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3355 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3356 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3357 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3358 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3359 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3360 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3361 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003362 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003363 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3364 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3365 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3366 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3367 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3368 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003369 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003370 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3371 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3372 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3373 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3374 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3375 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3376 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3377 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003378 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003379 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3380 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3381 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3382 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3383 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3384 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003385 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003386 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003387 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003388]
3389
Marat Dukhan08c4a432019-10-03 09:29:21 -07003390AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003391 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3392 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003393 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3394 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003395 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3396 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003397 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3398 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3399 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3400 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3401 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3402 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003403 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003404 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3405 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003406 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003407 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003408 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003409 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003410 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3411 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3412 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3413 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3414 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3415 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3416 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3417 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3418 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3419 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3420 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003421 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003422 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3423 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003424 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003425 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003426 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003427 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003428 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3429 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003430 "src/f32-prelu/gen/avx-2x8.c",
3431 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003432 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003433 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3434 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3435 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3436 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3437 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3438 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3439 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3440 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003441 "src/f32-vbinary/gen/vmax-avx-x8.c",
3442 "src/f32-vbinary/gen/vmax-avx-x16.c",
3443 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3444 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3445 "src/f32-vbinary/gen/vmin-avx-x8.c",
3446 "src/f32-vbinary/gen/vmin-avx-x16.c",
3447 "src/f32-vbinary/gen/vminc-avx-x8.c",
3448 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003449 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3450 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3451 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3452 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3453 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3454 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3455 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3456 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003457 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3458 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3459 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3460 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003461 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3462 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3463 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3464 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003465 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3466 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003467 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3468 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3469 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3470 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3471 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3472 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3473 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3474 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3475 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3476 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3477 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3478 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3479 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3480 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3481 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3482 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3483 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3484 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003485 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3486 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003487 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3488 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003489 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3490 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003491 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3492 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003493 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3494 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3495 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3496 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3497 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3498 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003499 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003500 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3501 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3502 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3503 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3504 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3505 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3506 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3507 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3508 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3509 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3510 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3511 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3512 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3513 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3514 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3515 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3516 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3517 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3518 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3519 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003520 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3521 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003522 "src/f32-vunary/gen/vabs-avx-x8.c",
3523 "src/f32-vunary/gen/vabs-avx-x16.c",
3524 "src/f32-vunary/gen/vneg-avx-x8.c",
3525 "src/f32-vunary/gen/vneg-avx-x16.c",
3526 "src/f32-vunary/gen/vsqr-avx-x8.c",
3527 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003528 "src/math/exp-avx-rr2-p5.c",
3529 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3530 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3531 "src/math/expm1minus-avx-rr2-p6.c",
3532 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3533 "src/math/sigmoid-avx-rr2-p5-div.c",
3534 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3535 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003536 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3537 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3538 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3539 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3540 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3541 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3542 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3543 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3544 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3545 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3546 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3547 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003548 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003549 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003550 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003551 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003552 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003553 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003554 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003555 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003556 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003557 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003558 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003559 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003560 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003561 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003562 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003563 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003564 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003565 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003566 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003567 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003568 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003569 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003570 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003571 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003572 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003573 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003574 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003575 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003576 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3577 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3578 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3579 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003580 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3581 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3582 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3583 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3584 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3585 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3586 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3587 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3588 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3589 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3590 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3591 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3592 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3593 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3594 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3595 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3596 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3597 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3598 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3599 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003600 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003601 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003602 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003603 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003604 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003605 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003606 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003607 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003608 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003609 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003610 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003611 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003612 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003613 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003614 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003615 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003616 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003617 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003618 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003619 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003620 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003621 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003622 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003623 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003624 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003625 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003626 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003627 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003628 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003629 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003630 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003631 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003632 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003633 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003634 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003635 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3636 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3637 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3638 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3639 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3640 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3641 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3642 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3643 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3644 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3645 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3646 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3647 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3648 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3649 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3650 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003651 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003652 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003653 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003654 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003655 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003656 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003657 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003658 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003659 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3660 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3661 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3662 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3663 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3664 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3665 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3666 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3667 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3668 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3669 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3670 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3671 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3672 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3673 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3674 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3675 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3676 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3677 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3678 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3679 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3680 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3681 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3682 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3683 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3684 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3685 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3686 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003687]
3688
Marat Dukhan1566fee2020-08-02 21:55:41 -07003689XOP_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07003690 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3691 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3692 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3693 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3694 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3695 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003696 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003697 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003698 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003699 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003700 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003701 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003702 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003703 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003704 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003705 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003706 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003707 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003708 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003709 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003710 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003711 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003712 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003713 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003714 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003715 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003716 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003717 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003718 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003719 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003720 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003721 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003722 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003723 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003724 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3725 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003726 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3727 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3728 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3729 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3730 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3731 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3732 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3733 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3734 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3735 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003737 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003738 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003739 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003740 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003741 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003742 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003743 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003744 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003745 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003746 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003747 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003748 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003749 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003750 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003751 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003752 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003753 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003754 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003755 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003756 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003757 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003758 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003759 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003760 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003761 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003762 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003763 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003764 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003765 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003766 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003767 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003768 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003769 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003770 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003771 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3772 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3773 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3774 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3775 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3776 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3777 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3778 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003779 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3780 "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3781 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3782 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003783 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3784 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3785 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3786 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3787 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3788 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3789 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3790 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3791 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3792 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3793 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3794 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3795 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3796 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3797 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3798 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3799 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3800 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3801 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3802 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3803 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3804 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3805 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3806 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3807 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3808 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3809 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3810 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003811]
3812
Marat Dukhanfda12b82019-11-21 12:27:59 -08003813FMA3_UKERNELS = [
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Marat Dukhan1c587112020-04-08 20:04:28 -07003818 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003820 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
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3843 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3844 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3845 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3846 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3847 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3848 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3849 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3850 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3851 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
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3857 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3858 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
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Marat Dukhan6674d692021-05-05 22:27:00 -07003868 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07003870 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
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Marat Dukhan6adff4e2019-10-14 18:32:07 -07003883AVX2_UKERNELS = [
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Frank Barchard04336c12020-10-22 16:48:55 -07003919 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003920 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3921 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3922 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3923 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3924 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3925 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3926 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3927 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3928 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3929 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3930 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3931 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3932 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3933 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3934 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3935 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3936 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3937 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3938 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3939 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3940 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3941 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3942 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3943 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3944 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3945 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3946 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3947 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3948 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3949 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3950 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3951 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3952 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3953 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3954 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3955 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3956 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3957 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3958 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3959 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003960 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3961 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3962 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3963 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3964 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3965 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3966 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3967 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3968 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3969 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3970 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3971 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3972 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3973 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3974 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3975 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3976 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3977 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3978 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3979 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3980 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3981 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3982 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3983 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003984 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3985 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3986 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3987 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3988 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3989 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3990 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3991 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3992 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3993 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3994 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3995 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3996 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3997 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3998 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3999 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
4000 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
4001 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
4002 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
4003 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
4004 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
4005 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
4006 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
4007 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
4008 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
4009 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
4010 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
4011 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
4012 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
4013 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004014 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
4015 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
4016 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004017 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
4018 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
4019 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
4020 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08004021 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004022 "src/math/extexp-avx2-p5.c",
4023 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
4024 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
4025 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
4026 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
4027 "src/math/sigmoid-avx2-rr1-p5-div.c",
4028 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
4029 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
4030 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
4031 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
4032 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
4033 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
4034 "src/math/sigmoid-avx2-rr2-p5-div.c",
4035 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
4036 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07004037 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4038 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4039 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
4040 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4041 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
4042 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4043 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
4044 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
4045 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
4046 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4047 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
4048 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004049 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4050 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
4051 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4052 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
4053 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4054 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07004055 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4056 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4057 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004058 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004059 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004060 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004061 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004062 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004063 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004064 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
4065 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004066 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004067 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004068 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
4069 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004070 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004071 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004072 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004073 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004074 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004075 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004076 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
4077 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004078 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004079 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004080 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
4081 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004082 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004083 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004084 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004085 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004086 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004087 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004088 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004089 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004090 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004091 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004092 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004093 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004094 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004095 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004096 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004097 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004098 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004099 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07004100 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4101 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4102 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
4103 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
4104 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4105 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
4106 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
4107 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07004108 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4109 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4110 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4111 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4112 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4113 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004114 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4115 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4116 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4117 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4118 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4119 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004120]
4121
Marat Dukhan08c4a432019-10-03 09:29:21 -07004122AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004123 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4124 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004125 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4126 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004127 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4128 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004129 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
4130 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
4131 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4132 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4133 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4134 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004135 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4136 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4137 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4138 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4139 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4140 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004141 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4142 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4143 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4144 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4145 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4146 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004147 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4148 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4149 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4150 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4151 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4152 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004153 "src/f32-prelu/gen/avx512f-2x16.c",
4154 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004155 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4156 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004157 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004158 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004159 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004160 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4161 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004162 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004163 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4164 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4165 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004166 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004167 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4168 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004169 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004170 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004171 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004172 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4173 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004174 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004175 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4176 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4177 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004178 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004179 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4180 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004181 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004182 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004183 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004184 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4185 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004186 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004187 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4188 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4189 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004190 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004191 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004192 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4193 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4194 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4195 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4196 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4197 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4198 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4199 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004200 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4201 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4202 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4203 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4204 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4205 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4206 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4207 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004208 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4209 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4210 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4211 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4212 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4213 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4214 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4215 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004216 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4217 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4218 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4219 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004220 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4221 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4222 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4223 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004224 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4225 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004226 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4227 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4228 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4229 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4230 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4231 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4232 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4233 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4234 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4235 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4236 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4237 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4238 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4239 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4240 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4241 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004242 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4243 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004244 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4245 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004246 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4247 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004248 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4249 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4250 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4251 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4252 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4253 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4254 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4255 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004256 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004257 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4258 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4259 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4260 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4261 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4262 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4263 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4264 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4265 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4266 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4267 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4268 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4269 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4270 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4271 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4272 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4273 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4274 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4275 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4276 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4277 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4278 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4279 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4280 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004281 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4282 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4283 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4284 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4285 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4286 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4287 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4288 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4289 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4290 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4291 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4292 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4293 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4294 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4295 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4296 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4297 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4298 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4299 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4300 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4301 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4302 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4303 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4304 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4305 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4306 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4307 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4308 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4309 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4310 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4311 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4312 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4313 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4314 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4315 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4316 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4317 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4318 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4319 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4320 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4321 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4322 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4323 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4324 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4325 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4326 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4327 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4328 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004329 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4330 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4331 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4332 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4333 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4334 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4335 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4336 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004337 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4338 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4339 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4340 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4341 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4342 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004343 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4344 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4345 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4346 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4347 "src/math/exp-avx512f-rr2-p5-scalef.c",
4348 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004349 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4350 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004351 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004352 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004353 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004354 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004355 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004356 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004357 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004358 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004359 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004360 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4361 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4362 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4363 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4364 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4365 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4366 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4367 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4368 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4369 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004370 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004371 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004372 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4373 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4374 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4375 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004376 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004377 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004378 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004379]
4380
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004381AVX512SKX_UKERNELS = [
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4383 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4384 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4385 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004386 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4387 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4388 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4389 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4390 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4391 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4392 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4393 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004394 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004395 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004396 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004397 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004398 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004399 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004400 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004401 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004402 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004403 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004404 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004405 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004406 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004407 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004408 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004409 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004410 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004411 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004412 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004413 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004414 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004415 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
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Frank Barchardd208bec2021-05-28 11:36:39 -07004417 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
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4419 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4420 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4421 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004422 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4423 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4424 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4425 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4426 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4427 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4428 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4429 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004430]
4431
Frank Barchardbcedc082020-08-17 18:00:51 -07004432WASM32_ASM_UKERNELS = [
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4435 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004436]
4437
Marat Dukhan08c4a432019-10-03 09:29:21 -07004438AARCH32_ASM_UKERNELS = [
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Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004440 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004441 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4442 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004443 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004444 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004445 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004446 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004447 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4448 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004449 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4450 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4451 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4452 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004453]
4454
4455AARCH64_ASM_UKERNELS = [
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Frank Barchard80fc5f42021-06-07 10:43:16 -07004470 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004490 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
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Frank Barchard04336c12020-10-22 16:48:55 -07004492 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
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4647 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004648 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004649 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004650 "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004651 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4652 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004653 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4654 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004655 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
4656 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004657 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4658 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4659 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004660 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4661 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004662 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004663 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4664 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004665 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004666]
4667
Marat Dukhan1b354632020-03-23 12:50:22 -07004668INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004669 "src/xnnpack/argmaxpool.h",
4670 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004671 "src/xnnpack/common.h",
4672 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004673 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004674 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004675 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004676 "src/xnnpack/gavgpool.h",
4677 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004678 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004679 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004680 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004681 "src/xnnpack/lut.h",
4682 "src/xnnpack/math.h",
4683 "src/xnnpack/maxpool.h",
4684 "src/xnnpack/packx.h",
4685 "src/xnnpack/pad.h",
4686 "src/xnnpack/params.h",
4687 "src/xnnpack/pavgpool.h",
4688 "src/xnnpack/ppmm.h",
4689 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004690 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004691 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004692 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004693 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004694 "src/xnnpack/spmm.h",
4695 "src/xnnpack/unpool.h",
4696 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004697 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004698 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004699 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004700 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004701 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004702 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004703 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004704]
4705
4706INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004707 "include/xnnpack.h",
4708 "src/xnnpack/allocator.h",
4709 "src/xnnpack/compute.h",
4710 "src/xnnpack/im2col.h",
4711 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004712 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004713 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004714 "src/xnnpack/operator.h",
4715 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004716 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004717 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004718 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004719 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004720]
4721
Marat Dukhan1b354632020-03-23 12:50:22 -07004722ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004723 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004724]
4725
Marat Dukhan1b354632020-03-23 12:50:22 -07004726MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004727 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004728 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004729]
4730
Marat Dukhan1b354632020-03-23 12:50:22 -07004731MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004732 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004733 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004734 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004735 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004736]
4737
4738OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004739 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004740 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004741]
4742
4743WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004744 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004745 "src/xnnpack/operator.h",
4746 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004747]
4748
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004749LOGGING_COPTS = select({
4750 # No logging in optimized mode
4751 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4752 # Full logging in debug mode
4753 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4754 # Error-only logging in default (fastbuild) mode
4755 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4756})
4757
Marat Dukhan3b59de22020-06-03 20:15:19 -07004758LOGGING_SRCS = select({
4759 # No logging in optimized mode
4760 ":optimized_build": [],
4761 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004762 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004763 "src/operator-strings.c",
4764 "src/subgraph-strings.c",
4765 ],
4766})
4767
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004768LOGGING_HDRS = [
4769 "src/xnnpack/log.h",
4770]
4771
Marat Dukhan08c4a432019-10-03 09:29:21 -07004772xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004773 name = "tables",
4774 srcs = TABLE_SRCS,
4775 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004776 gcc_copts = xnnpack_gcc_std_copts(),
4777 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004778)
4779
4780xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004781 name = "scalar_ukernels",
4782 srcs = SCALAR_UKERNELS,
4783 hdrs = INTERNAL_HDRS,
4784 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004785 gcc_copts = xnnpack_gcc_std_copts(),
4786 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004787 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004788 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004789 "@FP16",
4790 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004791 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004792 ],
4793)
4794
4795xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004796 name = "scalar_ukernels_test_mode",
4797 srcs = SCALAR_UKERNELS,
4798 hdrs = INTERNAL_HDRS,
4799 aarch32_copts = ["-marm"],
4800 copts = [
4801 "-UNDEBUG",
4802 "-DXNN_TEST_MODE=1",
4803 ],
4804 gcc_copts = xnnpack_gcc_std_copts(),
4805 msvc_copts = xnnpack_msvc_std_copts(),
4806 deps = [
4807 ":tables",
4808 "@FP16",
4809 "@FXdiv",
4810 "@pthreadpool",
4811 ],
4812)
4813
4814xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004815 name = "wasm_ukernels",
4816 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004817 gcc_copts = xnnpack_gcc_std_copts(),
4818 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004819 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004820 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004821 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004822 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004823 "@FP16",
4824 "@FXdiv",
4825 "@pthreadpool",
4826 ],
4827)
4828
4829xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004830 name = "wasm_ukernels_test_mode",
4831 hdrs = INTERNAL_HDRS,
4832 copts = [
4833 "-UNDEBUG",
4834 "-DXNN_TEST_MODE=1",
4835 ],
4836 gcc_copts = xnnpack_gcc_std_copts(),
4837 msvc_copts = xnnpack_msvc_std_copts(),
4838 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004839 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004840 deps = [
4841 ":tables",
4842 "@FP16",
4843 "@FXdiv",
4844 "@pthreadpool",
4845 ],
4846)
4847
4848xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004849 name = "neon_ukernels",
4850 hdrs = INTERNAL_HDRS,
4851 aarch32_copts = [
4852 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004853 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004854 "-mfpu=neon",
4855 ],
4856 aarch32_srcs = NEON_UKERNELS,
4857 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004858 gcc_copts = xnnpack_gcc_std_copts(),
4859 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004860 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004861 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004862 "@FP16",
4863 "@pthreadpool",
4864 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004865)
4866
4867xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004868 name = "neon_ukernels_test_mode",
4869 hdrs = INTERNAL_HDRS,
4870 aarch32_copts = [
4871 "-marm",
4872 "-march=armv7-a",
4873 "-mfpu=neon",
4874 ],
4875 aarch32_srcs = NEON_UKERNELS,
4876 aarch64_srcs = NEON_UKERNELS,
4877 copts = [
4878 "-UNDEBUG",
4879 "-DXNN_TEST_MODE=1",
4880 ],
4881 gcc_copts = xnnpack_gcc_std_copts(),
4882 msvc_copts = xnnpack_msvc_std_copts(),
4883 deps = [
4884 ":tables",
4885 "@FP16",
4886 "@pthreadpool",
4887 ],
4888)
4889
4890xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004891 name = "neonfma_ukernels",
4892 hdrs = INTERNAL_HDRS,
4893 aarch32_copts = [
4894 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004895 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004896 "-mfpu=neon-vfpv4",
4897 ],
4898 aarch32_srcs = NEONFMA_UKERNELS,
4899 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004900 apple_aarch32_copts = [
4901 "-mcpu=swift",
4902 "-mtune=generic",
4903 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004904 gcc_copts = xnnpack_gcc_std_copts(),
4905 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004906 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004907 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004908 "@FP16",
4909 "@pthreadpool",
4910 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004911)
4912
4913xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004914 name = "neonfma_ukernels_test_mode",
4915 hdrs = INTERNAL_HDRS,
4916 aarch32_copts = [
4917 "-marm",
4918 "-march=armv7-a",
4919 "-mfpu=neon-vfpv4",
4920 ],
4921 aarch32_srcs = NEONFMA_UKERNELS,
4922 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004923 apple_aarch32_copts = [
4924 "-mcpu=swift",
4925 "-mtune=generic",
4926 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004927 copts = [
4928 "-UNDEBUG",
4929 "-DXNN_TEST_MODE=1",
4930 ],
4931 gcc_copts = xnnpack_gcc_std_copts(),
4932 msvc_copts = xnnpack_msvc_std_copts(),
4933 deps = [
4934 ":tables",
4935 "@FP16",
4936 "@pthreadpool",
4937 ],
4938)
4939
4940xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004941 name = "neonv8_ukernels",
4942 hdrs = INTERNAL_HDRS,
4943 aarch32_copts = [
4944 "-marm",
4945 "-march=armv8-a",
4946 "-mfpu=neon-fp-armv8",
4947 ],
4948 aarch32_srcs = NEONV8_UKERNELS,
4949 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004950 apple_aarch32_copts = [
4951 "-mcpu=cyclone",
4952 "-mtune=generic",
4953 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004954 gcc_copts = xnnpack_gcc_std_copts(),
4955 msvc_copts = xnnpack_msvc_std_copts(),
4956 deps = [
4957 ":tables",
4958 "@FP16",
4959 "@pthreadpool",
4960 ],
4961)
4962
4963xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004964 name = "neonv8_ukernels_test_mode",
4965 hdrs = INTERNAL_HDRS,
4966 aarch32_copts = [
4967 "-marm",
4968 "-march=armv8-a",
4969 "-mfpu=neon-fp-armv8",
4970 ],
4971 aarch32_srcs = NEONV8_UKERNELS,
4972 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004973 apple_aarch32_copts = [
4974 "-mcpu=cyclone",
4975 "-mtune=generic",
4976 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004977 copts = [
4978 "-UNDEBUG",
4979 "-DXNN_TEST_MODE=1",
4980 ],
4981 gcc_copts = xnnpack_gcc_std_copts(),
4982 msvc_copts = xnnpack_msvc_std_copts(),
4983 deps = [
4984 ":tables",
4985 "@FP16",
4986 "@pthreadpool",
4987 ],
4988)
4989
4990xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004991 name = "neonfp16arith_ukernels",
4992 hdrs = INTERNAL_HDRS,
4993 aarch64_copts = ["-march=armv8.2-a+fp16"],
4994 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004995 gcc_copts = xnnpack_gcc_std_copts(),
4996 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004997 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004998 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004999 "@FP16",
5000 "@pthreadpool",
5001 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005002)
5003
5004xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005005 name = "neonfp16arith_ukernels_test_mode",
5006 hdrs = INTERNAL_HDRS,
5007 aarch64_copts = ["-march=armv8.2-a+fp16"],
5008 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
5009 copts = [
5010 "-UNDEBUG",
5011 "-DXNN_TEST_MODE=1",
5012 ],
5013 gcc_copts = xnnpack_gcc_std_copts(),
5014 msvc_copts = xnnpack_msvc_std_copts(),
5015 deps = [
5016 ":tables",
5017 "@FP16",
5018 "@pthreadpool",
5019 ],
5020)
5021
5022xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07005023 name = "neondot_ukernels",
5024 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005025 aarch32_copts = [
5026 "-marm",
5027 "-march=armv8.2-a+dotprod",
5028 "-mfpu=neon-fp-armv8",
5029 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005030 aarch32_srcs = NEONDOT_UKERNELS,
5031 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5032 aarch64_srcs = NEONDOT_UKERNELS,
5033 gcc_copts = xnnpack_gcc_std_copts(),
5034 msvc_copts = xnnpack_msvc_std_copts(),
5035 deps = [
5036 ":tables",
5037 "@FP16",
5038 "@pthreadpool",
5039 ],
5040)
5041
5042xnnpack_cc_library(
5043 name = "neondot_ukernels_test_mode",
5044 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005045 aarch32_copts = [
5046 "-marm",
5047 "-march=armv8.2-a+dotprod",
5048 "-mfpu=neon-fp-armv8",
5049 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005050 aarch32_srcs = NEONDOT_UKERNELS,
5051 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5052 aarch64_srcs = NEONDOT_UKERNELS,
5053 copts = [
5054 "-UNDEBUG",
5055 "-DXNN_TEST_MODE=1",
5056 ],
5057 gcc_copts = xnnpack_gcc_std_copts(),
5058 msvc_copts = xnnpack_msvc_std_copts(),
5059 deps = [
5060 ":tables",
5061 "@FP16",
5062 "@pthreadpool",
5063 ],
5064)
5065
5066xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005067 name = "sse2_ukernels",
5068 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005069 gcc_copts = xnnpack_gcc_std_copts(),
5070 gcc_x86_copts = ["-msse2"],
5071 msvc_copts = xnnpack_msvc_std_copts(),
5072 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005073 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005074 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005075 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005076 "@FP16",
5077 "@pthreadpool",
5078 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005079)
5080
5081xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005082 name = "sse2_ukernels_test_mode",
5083 hdrs = INTERNAL_HDRS,
5084 copts = [
5085 "-UNDEBUG",
5086 "-DXNN_TEST_MODE=1",
5087 ],
5088 gcc_copts = xnnpack_gcc_std_copts(),
5089 gcc_x86_copts = ["-msse2"],
5090 msvc_copts = xnnpack_msvc_std_copts(),
5091 msvc_x86_32_copts = ["/arch:SSE2"],
5092 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
5093 deps = [
5094 ":tables",
5095 "@FP16",
5096 "@pthreadpool",
5097 ],
5098)
5099
5100xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005101 name = "ssse3_ukernels",
5102 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005103 gcc_copts = xnnpack_gcc_std_copts(),
5104 gcc_x86_copts = ["-mssse3"],
5105 msvc_copts = xnnpack_msvc_std_copts(),
5106 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005107 x86_srcs = SSSE3_UKERNELS,
5108 deps = [
5109 ":tables",
5110 "@FP16",
5111 "@pthreadpool",
5112 ],
5113)
5114
5115xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005116 name = "ssse3_ukernels_test_mode",
5117 hdrs = INTERNAL_HDRS,
5118 copts = [
5119 "-UNDEBUG",
5120 "-DXNN_TEST_MODE=1",
5121 ],
5122 gcc_copts = xnnpack_gcc_std_copts(),
5123 gcc_x86_copts = ["-mssse3"],
5124 msvc_copts = xnnpack_msvc_std_copts(),
5125 msvc_x86_32_copts = ["/arch:SSE2"],
5126 x86_srcs = SSSE3_UKERNELS,
5127 deps = [
5128 ":tables",
5129 "@FP16",
5130 "@pthreadpool",
5131 ],
5132)
5133
5134xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005135 name = "sse41_ukernels",
5136 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005137 gcc_copts = xnnpack_gcc_std_copts(),
5138 gcc_x86_copts = ["-msse4.1"],
5139 msvc_copts = xnnpack_msvc_std_copts(),
5140 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005141 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005142 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005143 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005144 "@FP16",
5145 "@pthreadpool",
5146 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005147)
5148
5149xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005150 name = "sse41_ukernels_test_mode",
5151 hdrs = INTERNAL_HDRS,
5152 copts = [
5153 "-UNDEBUG",
5154 "-DXNN_TEST_MODE=1",
5155 ],
5156 gcc_copts = xnnpack_gcc_std_copts(),
5157 gcc_x86_copts = ["-msse4.1"],
5158 msvc_copts = xnnpack_msvc_std_copts(),
5159 msvc_x86_32_copts = ["/arch:SSE2"],
5160 x86_srcs = SSE41_UKERNELS,
5161 deps = [
5162 ":tables",
5163 "@FP16",
5164 "@pthreadpool",
5165 ],
5166)
5167
5168xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005169 name = "avx_ukernels",
5170 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005171 gcc_copts = xnnpack_gcc_std_copts(),
5172 gcc_x86_copts = ["-mavx"],
5173 msvc_copts = xnnpack_msvc_std_copts(),
5174 msvc_x86_32_copts = ["/arch:AVX"],
5175 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005176 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005177 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005178 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005179 "@FP16",
5180 "@pthreadpool",
5181 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005182)
5183
5184xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005185 name = "avx_ukernels_test_mode",
5186 hdrs = INTERNAL_HDRS,
5187 copts = [
5188 "-UNDEBUG",
5189 "-DXNN_TEST_MODE=1",
5190 ],
5191 gcc_copts = xnnpack_gcc_std_copts(),
5192 gcc_x86_copts = ["-mavx"],
5193 msvc_copts = xnnpack_msvc_std_copts(),
5194 msvc_x86_32_copts = ["/arch:AVX"],
5195 msvc_x86_64_copts = ["/arch:AVX"],
5196 x86_srcs = AVX_UKERNELS,
5197 deps = [
5198 ":tables",
5199 "@FP16",
5200 "@pthreadpool",
5201 ],
5202)
5203
5204xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005205 name = "xop_ukernels",
5206 hdrs = INTERNAL_HDRS,
5207 gcc_copts = xnnpack_gcc_std_copts(),
5208 gcc_x86_copts = ["-mxop"],
5209 msvc_copts = xnnpack_msvc_std_copts(),
5210 msvc_x86_32_copts = ["/arch:AVX"],
5211 msvc_x86_64_copts = ["/arch:AVX"],
5212 x86_srcs = XOP_UKERNELS,
5213 deps = [
5214 ":tables",
5215 "@FP16",
5216 "@pthreadpool",
5217 ],
5218)
5219
5220xnnpack_cc_library(
5221 name = "xop_ukernels_test_mode",
5222 hdrs = INTERNAL_HDRS,
5223 copts = [
5224 "-UNDEBUG",
5225 "-DXNN_TEST_MODE=1",
5226 ],
5227 gcc_copts = xnnpack_gcc_std_copts(),
5228 gcc_x86_copts = ["-mxop"],
5229 msvc_copts = xnnpack_msvc_std_copts(),
5230 msvc_x86_32_copts = ["/arch:AVX"],
5231 msvc_x86_64_copts = ["/arch:AVX"],
5232 x86_srcs = XOP_UKERNELS,
5233 deps = [
5234 ":tables",
5235 "@FP16",
5236 "@pthreadpool",
5237 ],
5238)
5239
5240xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005241 name = "fma3_ukernels",
5242 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005243 gcc_copts = xnnpack_gcc_std_copts(),
5244 gcc_x86_copts = ["-mfma"],
5245 msvc_copts = xnnpack_msvc_std_copts(),
5246 msvc_x86_32_copts = ["/arch:AVX"],
5247 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005248 x86_srcs = FMA3_UKERNELS,
5249 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005250 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005251 "@FP16",
5252 "@pthreadpool",
5253 ],
5254)
5255
5256xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005257 name = "fma3_ukernels_test_mode",
5258 hdrs = INTERNAL_HDRS,
5259 copts = [
5260 "-UNDEBUG",
5261 "-DXNN_TEST_MODE=1",
5262 ],
5263 gcc_copts = xnnpack_gcc_std_copts(),
5264 gcc_x86_copts = ["-mfma"],
5265 msvc_copts = xnnpack_msvc_std_copts(),
5266 msvc_x86_32_copts = ["/arch:AVX"],
5267 msvc_x86_64_copts = ["/arch:AVX"],
5268 x86_srcs = FMA3_UKERNELS,
5269 deps = [
5270 ":tables",
5271 "@FP16",
5272 "@pthreadpool",
5273 ],
5274)
5275
5276xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005277 name = "avx2_ukernels",
5278 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005279 gcc_copts = xnnpack_gcc_std_copts(),
5280 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005281 "-mfma",
5282 "-mavx2",
5283 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005284 msvc_copts = xnnpack_msvc_std_copts(),
5285 msvc_x86_32_copts = ["/arch:AVX2"],
5286 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005287 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005288 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005289 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005290 "@FP16",
5291 "@pthreadpool",
5292 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005293)
5294
5295xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005296 name = "avx2_ukernels_test_mode",
5297 hdrs = INTERNAL_HDRS,
5298 copts = [
5299 "-UNDEBUG",
5300 "-DXNN_TEST_MODE=1",
5301 ],
5302 gcc_copts = xnnpack_gcc_std_copts(),
5303 gcc_x86_copts = [
5304 "-mfma",
5305 "-mavx2",
5306 ],
5307 msvc_copts = xnnpack_msvc_std_copts(),
5308 msvc_x86_32_copts = ["/arch:AVX2"],
5309 msvc_x86_64_copts = ["/arch:AVX2"],
5310 x86_srcs = AVX2_UKERNELS,
5311 deps = [
5312 ":tables",
5313 "@FP16",
5314 "@pthreadpool",
5315 ],
5316)
5317
5318xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005319 name = "avx512f_ukernels",
5320 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005321 gcc_copts = xnnpack_gcc_std_copts(),
5322 gcc_x86_copts = ["-mavx512f"],
5323 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5324 msvc_copts = xnnpack_msvc_std_copts(),
5325 msvc_x86_32_copts = ["/arch:AVX512"],
5326 msvc_x86_64_copts = ["/arch:AVX512"],
5327 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005328 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005329 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005330 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005331 "@FP16",
5332 "@pthreadpool",
5333 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005334)
5335
5336xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005337 name = "avx512f_ukernels_test_mode",
5338 hdrs = INTERNAL_HDRS,
5339 copts = [
5340 "-UNDEBUG",
5341 "-DXNN_TEST_MODE=1",
5342 ],
5343 gcc_copts = xnnpack_gcc_std_copts(),
5344 gcc_x86_copts = ["-mavx512f"],
5345 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5346 msvc_copts = xnnpack_msvc_std_copts(),
5347 msvc_x86_32_copts = ["/arch:AVX512"],
5348 msvc_x86_64_copts = ["/arch:AVX512"],
5349 msys_copts = ["-fno-asynchronous-unwind-tables"],
5350 x86_srcs = AVX512F_UKERNELS,
5351 deps = [
5352 ":tables",
5353 "@FP16",
5354 "@pthreadpool",
5355 ],
5356)
5357
5358xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005359 name = "avx512skx_ukernels",
5360 hdrs = INTERNAL_HDRS,
5361 gcc_copts = xnnpack_gcc_std_copts(),
5362 gcc_x86_copts = [
5363 "-mavx512f",
5364 "-mavx512cd",
5365 "-mavx512bw",
5366 "-mavx512dq",
5367 "-mavx512vl",
5368 ],
5369 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5370 msvc_copts = xnnpack_msvc_std_copts(),
5371 msvc_x86_32_copts = ["/arch:AVX512"],
5372 msvc_x86_64_copts = ["/arch:AVX512"],
5373 msys_copts = ["-fno-asynchronous-unwind-tables"],
5374 x86_srcs = AVX512SKX_UKERNELS,
5375 deps = [
5376 ":tables",
5377 "@FP16",
5378 "@pthreadpool",
5379 ],
5380)
5381
5382xnnpack_cc_library(
5383 name = "avx512skx_ukernels_test_mode",
5384 hdrs = INTERNAL_HDRS,
5385 copts = [
5386 "-UNDEBUG",
5387 "-DXNN_TEST_MODE=1",
5388 ],
5389 gcc_copts = xnnpack_gcc_std_copts(),
5390 gcc_x86_copts = [
5391 "-mavx512f",
5392 "-mavx512cd",
5393 "-mavx512bw",
5394 "-mavx512dq",
5395 "-mavx512vl",
5396 ],
5397 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5398 msvc_copts = xnnpack_msvc_std_copts(),
5399 msvc_x86_32_copts = ["/arch:AVX512"],
5400 msvc_x86_64_copts = ["/arch:AVX512"],
5401 msys_copts = ["-fno-asynchronous-unwind-tables"],
5402 x86_srcs = AVX512SKX_UKERNELS,
5403 deps = [
5404 ":tables",
5405 "@FP16",
5406 "@pthreadpool",
5407 ],
5408)
5409
5410xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005411 name = "asm_ukernels",
5412 hdrs = ["src/xnnpack/assembly.h"],
5413 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005414 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005415 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005416 wasm_srcs = WASM32_ASM_UKERNELS,
5417 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005418)
5419
Marat Dukhan3b59de22020-06-03 20:15:19 -07005420xnnpack_cc_library(
5421 name = "logging_utils",
5422 srcs = LOGGING_SRCS,
5423 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5424 copts = LOGGING_COPTS + [
5425 "-Isrc",
5426 "-Iinclude",
5427 ] + select({
5428 ":debug_build": [],
5429 "//conditions:default": xnnpack_min_size_copts(),
5430 }),
5431 gcc_copts = xnnpack_gcc_std_copts(),
5432 msvc_copts = xnnpack_msvc_std_copts(),
5433 visibility = xnnpack_visibility(),
5434 deps = [
5435 "@FP16",
5436 "@clog",
5437 "@pthreadpool",
5438 ],
5439)
5440
Marat Dukhan08c4a432019-10-03 09:29:21 -07005441xnnpack_aggregate_library(
5442 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005443 aarch32_ios_deps = [
5444 ":neon_ukernels",
5445 ":neonfma_ukernels",
5446 ":neonv8_ukernels",
5447 ":asm_ukernels",
5448 ],
5449 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005450 ":neon_ukernels",
5451 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005452 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005453 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005454 ":asm_ukernels",
5455 ],
5456 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005457 ":neon_ukernels",
5458 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005459 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005460 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005461 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005462 ":asm_ukernels",
5463 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005464 generic_deps = [
5465 ":scalar_ukernels",
5466 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005467 wasm_deps = [
5468 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005469 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005470 ],
5471 wasmsimd_deps = [
5472 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005473 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005474 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005475 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005476 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005477 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005478 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005479 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005480 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005481 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005482 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005483 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005484 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005485 ],
5486)
5487
Marat Dukhan33fcf782020-05-24 14:27:15 -07005488xnnpack_aggregate_library(
5489 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005490 aarch32_ios_deps = [
5491 ":neon_ukernels_test_mode",
5492 ":neonfma_ukernels_test_mode",
5493 ":neonv8_ukernels_test_mode",
5494 ":asm_ukernels",
5495 ],
5496 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005497 ":neon_ukernels_test_mode",
5498 ":neonfma_ukernels_test_mode",
5499 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005500 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005501 ":asm_ukernels",
5502 ],
5503 aarch64_deps = [
5504 ":neon_ukernels_test_mode",
5505 ":neonfma_ukernels_test_mode",
5506 ":neonv8_ukernels_test_mode",
5507 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005508 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005509 ":asm_ukernels",
5510 ],
5511 generic_deps = [
5512 ":scalar_ukernels_test_mode",
5513 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005514 wasm_deps = [
5515 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005516 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005517 ],
5518 wasmsimd_deps = [
5519 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005520 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005521 ],
5522 x86_deps = [
5523 ":sse2_ukernels_test_mode",
5524 ":ssse3_ukernels_test_mode",
5525 ":sse41_ukernels_test_mode",
5526 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005527 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005528 ":fma3_ukernels_test_mode",
5529 ":avx2_ukernels_test_mode",
5530 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005531 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005532 ],
5533)
5534
Marat Dukhan08c4a432019-10-03 09:29:21 -07005535xnnpack_cc_library(
5536 name = "im2col",
5537 srcs = ["src/im2col.c"],
5538 hdrs = [
5539 "src/xnnpack/common.h",
5540 "src/xnnpack/im2col.h",
5541 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005542 gcc_copts = xnnpack_gcc_std_copts(),
5543 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005544)
5545
5546xnnpack_cc_library(
5547 name = "indirection",
5548 srcs = ["src/indirection.c"],
5549 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005550 gcc_copts = xnnpack_gcc_std_copts(),
5551 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005552 deps = [
5553 "@FP16",
5554 "@FXdiv",
5555 "@pthreadpool",
5556 ],
5557)
5558
5559xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005560 name = "indirection_test_mode",
5561 srcs = ["src/indirection.c"],
5562 hdrs = INTERNAL_HDRS,
5563 copts = [
5564 "-UNDEBUG",
5565 "-DXNN_TEST_MODE=1",
5566 ],
5567 gcc_copts = xnnpack_gcc_std_copts(),
5568 msvc_copts = xnnpack_msvc_std_copts(),
5569 deps = [
5570 "@FP16",
5571 "@FXdiv",
5572 "@pthreadpool",
5573 ],
5574)
5575
5576xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005577 name = "packing",
5578 srcs = ["src/packing.c"],
5579 hdrs = INTERNAL_HDRS,
5580 gcc_copts = xnnpack_gcc_std_copts(),
5581 msvc_copts = xnnpack_msvc_std_copts(),
5582 deps = [
5583 "@FP16",
5584 "@FXdiv",
5585 "@pthreadpool",
5586 ],
5587)
5588
5589xnnpack_cc_library(
5590 name = "packing_test_mode",
5591 srcs = ["src/packing.c"],
5592 hdrs = INTERNAL_HDRS,
5593 copts = [
5594 "-UNDEBUG",
5595 "-DXNN_TEST_MODE=1",
5596 ],
5597 gcc_copts = xnnpack_gcc_std_copts(),
5598 msvc_copts = xnnpack_msvc_std_copts(),
5599 deps = [
5600 "@FP16",
5601 "@FXdiv",
5602 "@pthreadpool",
5603 ],
5604)
5605
5606xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005607 name = "operator_run",
5608 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005609 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005610 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005611 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5612 "//conditions:default": [],
5613 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005614 gcc_copts = xnnpack_gcc_std_copts(),
5615 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005616 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005617 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005618 "@FP16",
5619 "@FXdiv",
5620 "@clog",
5621 "@pthreadpool",
5622 ],
5623)
5624
Chao Mei6ddfc602020-05-13 22:29:36 -07005625xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005626 name = "operator_run_test_mode",
5627 srcs = ["src/operator-run.c"],
5628 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5629 copts = LOGGING_COPTS + [
5630 "-UNDEBUG",
5631 "-DXNN_TEST_MODE=1",
5632 ] + select({
5633 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5634 "//conditions:default": [],
5635 }),
5636 gcc_copts = xnnpack_gcc_std_copts(),
5637 msvc_copts = xnnpack_msvc_std_copts(),
5638 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005639 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005640 "@FP16",
5641 "@FXdiv",
5642 "@clog",
5643 "@pthreadpool",
5644 ],
5645)
5646
5647xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005648 name = "memory_planner",
5649 srcs = ["src/memory-planner.c"],
5650 hdrs = INTERNAL_HDRS,
5651 defines = select({
5652 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5653 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5654 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5655 }),
5656 gcc_copts = xnnpack_gcc_std_copts(),
5657 msvc_copts = xnnpack_msvc_std_copts(),
5658 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005659 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005660 "@pthreadpool",
5661 ],
5662)
5663
Marat Dukhan33fcf782020-05-24 14:27:15 -07005664xnnpack_cc_library(
5665 name = "memory_planner_test_mode",
5666 srcs = ["src/memory-planner.c"],
5667 hdrs = INTERNAL_HDRS,
5668 copts = [
5669 "-UNDEBUG",
5670 "-DXNN_TEST_MODE=1",
5671 ],
5672 defines = select({
5673 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5674 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5675 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5676 }),
5677 gcc_copts = xnnpack_gcc_std_copts(),
5678 msvc_copts = xnnpack_msvc_std_copts(),
5679 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005680 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005681 "@pthreadpool",
5682 ],
5683)
5684
Marat Dukhan08c4a432019-10-03 09:29:21 -07005685cc_library(
5686 name = "enable_assembly",
5687 defines = select({
5688 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5689 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005690 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005691 }),
5692)
5693
Marat Dukhan9de90e02020-06-18 16:04:12 -07005694cc_library(
5695 name = "enable_sparse",
5696 defines = select({
5697 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5698 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005699 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005700 }),
5701)
5702
Marat Dukhancf056b22019-10-07 10:26:29 -07005703xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005704 name = "operators",
5705 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005706 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005707 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005708 ],
5709 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005710 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005711 "-Isrc",
5712 "-Iinclude",
5713 ] + select({
5714 ":debug_build": [],
5715 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005716 }) + select({
5717 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5718 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005719 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005720 gcc_copts = xnnpack_gcc_std_copts(),
5721 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005722 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005723 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005724 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005725 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005726 "@FP16",
5727 "@FXdiv",
5728 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005729 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005730 ],
5731)
5732
Marat Dukhan10a38082020-04-17 03:58:35 -07005733xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005734 name = "operators_test_mode",
5735 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005736 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005737 "src/operator-delete.c",
5738 ],
5739 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5740 copts = LOGGING_COPTS + [
5741 "-Isrc",
5742 "-Iinclude",
5743 "-UNDEBUG",
5744 "-DXNN_TEST_MODE=1",
5745 ] + select({
5746 ":debug_build": [],
5747 "//conditions:default": xnnpack_min_size_copts(),
5748 }) + select({
5749 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5750 "//conditions:default": [],
5751 }),
5752 gcc_copts = xnnpack_gcc_std_copts(),
5753 msvc_copts = xnnpack_msvc_std_copts(),
5754 deps = [
5755 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005756 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005757 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005758 "@FP16",
5759 "@FXdiv",
5760 "@clog",
5761 "@pthreadpool",
5762 ],
5763)
5764
5765xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005766 name = "XNNPACK",
5767 srcs = [
5768 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005769 "src/runtime.c",
5770 "src/subgraph.c",
5771 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005772 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005773 hdrs = ["include/xnnpack.h"],
5774 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005775 "-Isrc",
5776 "-Iinclude",
5777 ] + select({
5778 ":debug_build": [],
5779 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005780 }) + select({
5781 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5782 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005783 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005784 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005785 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005786 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005787 visibility = xnnpack_visibility(),
5788 deps = [
5789 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005790 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005791 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005792 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005793 ":operator_run",
5794 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005795 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005796 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005797 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005798 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005799 ] + select({
5800 ":emscripten": [],
5801 "//conditions:default": ["@cpuinfo"],
5802 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005803)
5804
Marat Dukhan10a38082020-04-17 03:58:35 -07005805xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005806 name = "XNNPACK_test_mode",
5807 srcs = [
5808 "src/init.c",
5809 "src/runtime.c",
5810 "src/subgraph.c",
5811 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005812 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005813 hdrs = ["include/xnnpack.h"],
5814 copts = LOGGING_COPTS + [
5815 "-Isrc",
5816 "-Iinclude",
5817 "-UNDEBUG",
5818 "-DXNN_TEST_MODE=1",
5819 ] + select({
5820 ":debug_build": [],
5821 "//conditions:default": xnnpack_min_size_copts(),
5822 }) + select({
5823 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5824 "//conditions:default": [],
5825 }),
5826 gcc_copts = xnnpack_gcc_std_copts(),
5827 includes = ["include"],
5828 msvc_copts = xnnpack_msvc_std_copts(),
5829 visibility = xnnpack_visibility(),
5830 deps = [
5831 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005832 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005833 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005834 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005835 ":operator_run_test_mode",
5836 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005837 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005838 "@clog",
5839 "@FP16",
5840 "@pthreadpool",
5841 ] + select({
5842 ":emscripten": [],
5843 "//conditions:default": ["@cpuinfo"],
5844 }),
5845)
5846
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005847# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5848# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005849xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005850 name = "xnnpack_for_tflite",
5851 srcs = [
5852 "src/init.c",
5853 "src/runtime.c",
5854 "src/subgraph.c",
5855 "src/tensor.c",
5856 ] + SUBGRAPH_SRCS,
5857 hdrs = ["include/xnnpack.h"],
5858 copts = LOGGING_COPTS + [
5859 "-Isrc",
5860 "-Iinclude",
5861 ] + select({
5862 ":debug_build": [],
5863 "//conditions:default": xnnpack_min_size_copts(),
5864 }) + select({
5865 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5866 "//conditions:default": [],
5867 }),
5868 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005869 "XNN_NO_U8_OPERATORS",
5870 "XNN_NO_X8_OPERATORS",
5871 "XNN_NO_F16_OPERATORS",
5872 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005873 ] + select({
5874 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005875 ":xnn_enable_qs8_explicit_false": [
5876 "XNN_NO_QC8_OPERATORS",
5877 "XNN_NO_QS8_OPERATORS",
5878 ],
5879 "//conditions:default": [
5880 "XNN_NO_QC8_OPERATORS",
5881 "XNN_NO_QS8_OPERATORS",
5882 ],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07005883 }) + select({
5884 ":xnn_enable_qu8_explicit_true": [],
5885 ":xnn_enable_qu8_explicit_false": [
5886 "XNN_NO_QU8_OPERATORS",
5887 ],
5888 "//conditions:default": [
5889 "XNN_NO_QU8_OPERATORS",
5890 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005891 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005892 gcc_copts = xnnpack_gcc_std_copts(),
5893 includes = ["include"],
5894 msvc_copts = xnnpack_msvc_std_copts(),
5895 visibility = xnnpack_visibility(),
5896 deps = [
5897 ":enable_assembly",
5898 ":enable_sparse",
5899 ":logging_utils",
5900 ":memory_planner",
5901 ":operator_run",
5902 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005903 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005904 "@clog",
5905 "@FP16",
5906 "@pthreadpool",
5907 ] + select({
5908 ":emscripten": [],
5909 "//conditions:default": ["@cpuinfo"],
5910 }),
5911)
5912
5913# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5914# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5915xnnpack_cc_library(
5916 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005917 srcs = [
5918 "src/init.c",
5919 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005920 hdrs = ["include/xnnpack.h"],
5921 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005922 "-Isrc",
5923 "-Iinclude",
5924 ] + select({
5925 ":debug_build": [],
5926 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005927 }) + select({
5928 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5929 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005930 }),
5931 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005932 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005933 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005934 "XNN_NO_U8_OPERATORS",
5935 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005936 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005937 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005938 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005939 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005940 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005941 visibility = xnnpack_visibility(),
5942 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005943 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005944 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005945 ":operator_run",
5946 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005947 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005948 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005949 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005950 ] + select({
5951 ":emscripten": [],
5952 "//conditions:default": ["@cpuinfo"],
5953 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005954)
5955
Marat Dukhancf056b22019-10-07 10:26:29 -07005956xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005957 name = "bench_utils",
5958 srcs = ["bench/utils.cc"],
5959 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005960 deps = [
5961 "@com_google_benchmark//:benchmark",
5962 "@cpuinfo",
5963 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005964)
5965
Frank Barchard7e955972019-10-11 10:34:25 -07005966######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005967
5968xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005969 name = "qs8_gemm_bench",
5970 srcs = [
5971 "bench/gemm.h",
5972 "bench/qs8-gemm.cc",
5973 "src/xnnpack/AlignedAllocator.h",
5974 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005975 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5976 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005977)
5978
5979xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005980 name = "qs8_requantization_bench",
5981 srcs = [
5982 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005983 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005984 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005985 ] + MICROKERNEL_BENCHMARK_HDRS,
5986 deps = MICROKERNEL_BENCHMARK_DEPS,
5987)
5988
5989xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005990 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005991 srcs = [
5992 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005993 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005994 "src/xnnpack/AlignedAllocator.h",
5995 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005996 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005997 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005998)
5999
6000xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006001 name = "qu8_requantization_bench",
6002 srcs = [
6003 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006004 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006005 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006006 ] + MICROKERNEL_BENCHMARK_HDRS,
6007 deps = MICROKERNEL_BENCHMARK_DEPS,
6008)
6009
6010xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07006011 name = "f16_igemm_bench",
6012 srcs = [
6013 "bench/f16-igemm.cc",
6014 "bench/conv.h",
6015 "bench/google/conv.h",
6016 "src/xnnpack/AlignedAllocator.h",
6017 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006018 deps = MICROKERNEL_BENCHMARK_DEPS + [
6019 ":indirection",
6020 ":packing",
6021 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07006022)
6023
6024xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006025 name = "f16_gemm_bench",
6026 srcs = [
6027 "bench/f16-gemm.cc",
6028 "bench/gemm.h",
6029 "src/xnnpack/AlignedAllocator.h",
6030 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006031 deps = MICROKERNEL_BENCHMARK_DEPS + [
6032 ":packing",
6033 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006034)
6035
6036xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006037 name = "f16_spmm_bench",
6038 srcs = [
6039 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006040 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006041 "src/xnnpack/AlignedAllocator.h",
6042 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006043 deps = MICROKERNEL_BENCHMARK_DEPS,
6044)
6045
6046xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006047 name = "f16_vrelu_bench",
6048 srcs = [
6049 "bench/f16-vrelu.cc",
6050 "src/xnnpack/AlignedAllocator.h",
6051 ] + MICROKERNEL_BENCHMARK_HDRS,
6052 deps = MICROKERNEL_BENCHMARK_DEPS,
6053)
6054
6055xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006056 name = "f32_igemm_bench",
6057 srcs = [
6058 "bench/f32-igemm.cc",
6059 "bench/conv.h",
6060 "src/xnnpack/AlignedAllocator.h",
6061 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006062 deps = MICROKERNEL_BENCHMARK_DEPS + [
6063 ":indirection",
6064 ":packing",
6065 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006066)
6067
6068xnnpack_benchmark(
6069 name = "f32_conv_hwc_bench",
6070 srcs = [
6071 "bench/f32-conv-hwc.cc",
6072 "bench/dconv.h",
6073 "src/xnnpack/AlignedAllocator.h",
6074 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006075 deps = MICROKERNEL_BENCHMARK_DEPS + [
6076 ":packing",
6077 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006078)
6079
6080xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006081 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07006082 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006083 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07006084 "bench/dconv.h",
6085 "src/xnnpack/AlignedAllocator.h",
6086 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006087 deps = MICROKERNEL_BENCHMARK_DEPS + [
6088 ":packing",
6089 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07006090)
6091
6092xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07006093 name = "f16_dwconv_bench",
6094 srcs = [
6095 "bench/f16-dwconv.cc",
6096 "bench/dwconv.h",
6097 "bench/google/dwconv.h",
6098 "src/xnnpack/AlignedAllocator.h",
6099 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006100 deps = MICROKERNEL_BENCHMARK_DEPS + [
6101 ":indirection",
6102 ":packing",
6103 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07006104)
6105
6106xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006107 name = "f32_dwconv_bench",
6108 srcs = [
6109 "bench/f32-dwconv.cc",
6110 "bench/dwconv.h",
6111 "src/xnnpack/AlignedAllocator.h",
6112 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006113 deps = MICROKERNEL_BENCHMARK_DEPS + [
6114 ":indirection",
6115 ":packing",
6116 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006117)
6118
6119xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006120 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006121 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006122 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006123 "bench/dwconv.h",
6124 "src/xnnpack/AlignedAllocator.h",
6125 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006126 deps = MICROKERNEL_BENCHMARK_DEPS + [
6127 ":indirection",
6128 ":packing",
6129 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006130)
6131
6132xnnpack_benchmark(
6133 name = "f32_gemm_bench",
6134 srcs = [
6135 "bench/f32-gemm.cc",
6136 "bench/gemm.h",
6137 "src/xnnpack/AlignedAllocator.h",
6138 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006139 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006140 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006141)
6142
6143xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006144 name = "f32_raddexpminusmax_bench",
6145 srcs = [
6146 "bench/f32-raddexpminusmax.cc",
6147 "src/xnnpack/AlignedAllocator.h",
6148 ] + MICROKERNEL_BENCHMARK_HDRS,
6149 deps = MICROKERNEL_BENCHMARK_DEPS,
6150)
6151
6152xnnpack_benchmark(
6153 name = "f32_raddextexp_bench",
6154 srcs = [
6155 "bench/f32-raddextexp.cc",
6156 "src/xnnpack/AlignedAllocator.h",
6157 ] + MICROKERNEL_BENCHMARK_HDRS,
6158 deps = MICROKERNEL_BENCHMARK_DEPS,
6159)
6160
6161xnnpack_benchmark(
6162 name = "f32_raddstoreexpminusmax_bench",
6163 srcs = [
6164 "bench/f32-raddstoreexpminusmax.cc",
6165 "src/xnnpack/AlignedAllocator.h",
6166 ] + MICROKERNEL_BENCHMARK_HDRS,
6167 deps = MICROKERNEL_BENCHMARK_DEPS,
6168)
6169
6170xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006171 name = "f32_rmax_bench",
6172 srcs = [
6173 "bench/f32-rmax.cc",
6174 "src/xnnpack/AlignedAllocator.h",
6175 ] + MICROKERNEL_BENCHMARK_HDRS,
6176 deps = MICROKERNEL_BENCHMARK_DEPS,
6177)
6178
6179xnnpack_benchmark(
6180 name = "f32_spmm_bench",
6181 srcs = [
6182 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006183 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006184 "src/xnnpack/AlignedAllocator.h",
6185 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006186 deps = MICROKERNEL_BENCHMARK_DEPS,
6187)
6188
6189xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006190 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006191 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006192 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006193 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006194 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006195 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006196)
6197
6198xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006199 name = "f32_velu_bench",
6200 srcs = [
6201 "bench/f32-velu.cc",
6202 "src/xnnpack/AlignedAllocator.h",
6203 ] + MICROKERNEL_BENCHMARK_HDRS,
6204 deps = MICROKERNEL_BENCHMARK_DEPS,
6205)
6206
6207xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006208 name = "f32_vhswish_bench",
6209 srcs = [
6210 "bench/f32-vhswish.cc",
6211 "src/xnnpack/AlignedAllocator.h",
6212 ] + MICROKERNEL_BENCHMARK_HDRS,
6213 deps = MICROKERNEL_BENCHMARK_DEPS,
6214)
6215
6216xnnpack_benchmark(
6217 name = "f32_vrelu_bench",
6218 srcs = [
6219 "bench/f32-vrelu.cc",
6220 "src/xnnpack/AlignedAllocator.h",
6221 ] + MICROKERNEL_BENCHMARK_HDRS,
6222 deps = MICROKERNEL_BENCHMARK_DEPS,
6223)
6224
6225xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006226 name = "f32_vscaleexpminusmax_bench",
6227 srcs = [
6228 "bench/f32-vscaleexpminusmax.cc",
6229 "src/xnnpack/AlignedAllocator.h",
6230 ] + MICROKERNEL_BENCHMARK_HDRS,
6231 deps = MICROKERNEL_BENCHMARK_DEPS,
6232)
6233
6234xnnpack_benchmark(
6235 name = "f32_vscaleextexp_bench",
6236 srcs = [
6237 "bench/f32-vscaleextexp.cc",
6238 "src/xnnpack/AlignedAllocator.h",
6239 ] + MICROKERNEL_BENCHMARK_HDRS,
6240 deps = MICROKERNEL_BENCHMARK_DEPS,
6241)
6242
6243xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006244 name = "f32_vsigmoid_bench",
6245 srcs = [
6246 "bench/f32-vsigmoid.cc",
6247 "src/xnnpack/AlignedAllocator.h",
6248 ] + MICROKERNEL_BENCHMARK_HDRS,
6249 deps = MICROKERNEL_BENCHMARK_DEPS,
6250)
6251
6252xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006253 name = "f32_vsqrt_bench",
6254 srcs = [
6255 "bench/f32-vsqrt.cc",
6256 "src/xnnpack/AlignedAllocator.h",
6257 ] + MICROKERNEL_BENCHMARK_HDRS,
6258 deps = MICROKERNEL_BENCHMARK_DEPS,
6259)
6260
6261xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006262 name = "f32_im2col_gemm_bench",
6263 srcs = [
6264 "bench/f32-im2col-gemm.cc",
6265 "bench/conv.h",
6266 "src/xnnpack/AlignedAllocator.h",
6267 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006268 deps = MICROKERNEL_BENCHMARK_DEPS + [
6269 ":im2col",
6270 ":packing",
6271 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006272)
6273
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006274xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006275 name = "rounding_bench",
6276 srcs = [
6277 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006278 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006279 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006280 ] + MICROKERNEL_BENCHMARK_HDRS,
6281 deps = MICROKERNEL_BENCHMARK_DEPS,
6282)
6283
Marat Dukhan08c4a432019-10-03 09:29:21 -07006284########################### Benchmarks for operators ###########################
6285
6286xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006287 name = "average_pooling_bench",
6288 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006289 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006290 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006291 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006292)
6293
6294xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006295 name = "bankers_rounding_bench",
6296 srcs = ["bench/bankers-rounding.cc"],
6297 copts = xnnpack_optional_tflite_copts(),
6298 tags = ["nowin32"],
6299 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6300)
6301
6302xnnpack_benchmark(
6303 name = "ceiling_bench",
6304 srcs = ["bench/ceiling.cc"],
6305 copts = xnnpack_optional_tflite_copts(),
6306 tags = ["nowin32"],
6307 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6308)
6309
6310xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006311 name = "channel_shuffle_bench",
6312 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006313 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006314)
6315
6316xnnpack_benchmark(
6317 name = "convolution_bench",
6318 srcs = ["bench/convolution.cc"],
6319 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006320 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006321 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006322)
6323
6324xnnpack_benchmark(
6325 name = "deconvolution_bench",
6326 srcs = ["bench/deconvolution.cc"],
6327 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006328 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006329 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006330)
6331
6332xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006333 name = "elu_bench",
6334 srcs = ["bench/elu.cc"],
6335 copts = xnnpack_optional_tflite_copts(),
6336 tags = ["nowin32"],
6337 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6338)
6339
6340xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006341 name = "floor_bench",
6342 srcs = ["bench/floor.cc"],
6343 copts = xnnpack_optional_tflite_copts(),
6344 tags = ["nowin32"],
6345 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6346)
6347
6348xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006349 name = "global_average_pooling_bench",
6350 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006351 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006352)
6353
6354xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006355 name = "hardswish_bench",
6356 srcs = ["bench/hardswish.cc"],
6357 copts = xnnpack_optional_tflite_copts(),
6358 tags = ["nowin32"],
6359 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6360)
6361
6362xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006363 name = "max_pooling_bench",
6364 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006365 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006366)
6367
6368xnnpack_benchmark(
6369 name = "sigmoid_bench",
6370 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006371 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006372 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006373 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006374)
6375
6376xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006377 name = "prelu_bench",
6378 srcs = ["bench/prelu.cc"],
6379 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006380 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006381 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006382)
6383
6384xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006385 name = "softmax_bench",
6386 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006387 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006388 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006389 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006390)
6391
Marat Dukhan87727142020-06-24 15:24:10 -07006392xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006393 name = "square_root_bench",
6394 srcs = ["bench/square-root.cc"],
6395 copts = xnnpack_optional_tflite_copts(),
6396 tags = ["nowin32"],
6397 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6398)
6399
6400xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006401 name = "truncation_bench",
6402 srcs = ["bench/truncation.cc"],
6403 deps = OPERATOR_BENCHMARK_DEPS,
6404)
6405
Marat Dukhanc068bb62019-10-04 13:24:39 -07006406############################# End-to-end benchmarks ############################
6407
6408cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006409 name = "fp32_mobilenet_v1",
6410 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006411 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006412 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006413 linkstatic = True,
6414 deps = [
6415 ":XNNPACK",
6416 "@pthreadpool",
6417 ],
6418)
6419
6420cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006421 name = "fp32_sparse_mobilenet_v1",
6422 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6423 hdrs = ["models/models.h"],
6424 copts = xnnpack_std_cxxopts(),
6425 linkstatic = True,
6426 deps = [
6427 ":XNNPACK",
6428 "@pthreadpool",
6429 ],
6430)
6431
6432cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006433 name = "fp16_mobilenet_v1",
6434 srcs = ["models/fp16-mobilenet-v1.cc"],
6435 hdrs = ["models/models.h"],
6436 copts = xnnpack_std_cxxopts(),
6437 linkstatic = True,
6438 deps = [
6439 ":XNNPACK",
6440 "@FP16",
6441 "@pthreadpool",
6442 ],
6443)
6444
6445cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006446 name = "qs8_mobilenet_v1",
6447 srcs = ["models/qs8-mobilenet-v1.cc"],
6448 hdrs = ["models/models.h"],
6449 copts = xnnpack_std_cxxopts(),
6450 linkstatic = True,
6451 deps = [
6452 ":XNNPACK",
6453 "@pthreadpool",
6454 ],
6455)
6456
6457cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006458 name = "qs8_mobilenet_v2",
6459 srcs = ["models/qs8-mobilenet-v2.cc"],
6460 hdrs = ["models/models.h"],
6461 copts = xnnpack_std_cxxopts(),
6462 linkstatic = True,
6463 deps = [
6464 ":XNNPACK",
6465 "@pthreadpool",
6466 ],
6467)
6468
6469cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006470 name = "qu8_mobilenet_v1",
6471 srcs = ["models/qu8-mobilenet-v1.cc"],
6472 hdrs = ["models/models.h"],
6473 copts = xnnpack_std_cxxopts(),
6474 linkstatic = True,
6475 deps = [
6476 ":XNNPACK",
6477 "@pthreadpool",
6478 ],
6479)
6480
6481cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006482 name = "fp32_mobilenet_v2",
6483 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006484 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006485 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006486 linkstatic = True,
6487 deps = [
6488 ":XNNPACK",
6489 "@pthreadpool",
6490 ],
6491)
6492
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006493cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006494 name = "fp32_sparse_mobilenet_v2",
6495 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6496 hdrs = ["models/models.h"],
6497 copts = xnnpack_std_cxxopts(),
6498 linkstatic = True,
6499 deps = [
6500 ":XNNPACK",
6501 "@pthreadpool",
6502 ],
6503)
6504
6505cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006506 name = "fp16_mobilenet_v2",
6507 srcs = ["models/fp16-mobilenet-v2.cc"],
6508 hdrs = ["models/models.h"],
6509 copts = xnnpack_std_cxxopts(),
6510 linkstatic = True,
6511 deps = [
6512 ":XNNPACK",
6513 "@FP16",
6514 "@pthreadpool",
6515 ],
6516)
6517
6518cc_library(
6519 name = "fp32_mobilenet_v3_large",
6520 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006521 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006522 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006523 linkstatic = True,
6524 deps = [
6525 ":XNNPACK",
6526 "@pthreadpool",
6527 ],
6528)
6529
6530cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006531 name = "fp32_sparse_mobilenet_v3_large",
6532 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6533 hdrs = ["models/models.h"],
6534 copts = xnnpack_std_cxxopts(),
6535 linkstatic = True,
6536 deps = [
6537 ":XNNPACK",
6538 "@pthreadpool",
6539 ],
6540)
6541
6542cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006543 name = "fp16_mobilenet_v3_large",
6544 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6545 hdrs = ["models/models.h"],
6546 copts = xnnpack_std_cxxopts(),
6547 linkstatic = True,
6548 deps = [
6549 ":XNNPACK",
6550 "@FP16",
6551 "@pthreadpool",
6552 ],
6553)
6554
6555cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006556 name = "fp32_mobilenet_v3_small",
6557 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006558 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006559 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006560 linkstatic = True,
6561 deps = [
6562 ":XNNPACK",
6563 "@pthreadpool",
6564 ],
6565)
6566
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006567cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006568 name = "fp32_sparse_mobilenet_v3_small",
6569 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6570 hdrs = ["models/models.h"],
6571 copts = xnnpack_std_cxxopts(),
6572 linkstatic = True,
6573 deps = [
6574 ":XNNPACK",
6575 "@pthreadpool",
6576 ],
6577)
6578
6579cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006580 name = "fp16_mobilenet_v3_small",
6581 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6582 hdrs = ["models/models.h"],
6583 copts = xnnpack_std_cxxopts(),
6584 linkstatic = True,
6585 deps = [
6586 ":XNNPACK",
6587 "@FP16",
6588 "@pthreadpool",
6589 ],
6590)
6591
Marat Dukhanc068bb62019-10-04 13:24:39 -07006592xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006593 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006594 srcs = [
6595 "bench/f32-dwconv-e2e.cc",
6596 "bench/end2end.h",
6597 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006598 deps = MICROKERNEL_BENCHMARK_DEPS + [
6599 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006600 ":fp32_mobilenet_v1",
6601 ":fp32_mobilenet_v2",
6602 ":fp32_mobilenet_v3_large",
6603 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006604 ],
6605)
6606
6607xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006608 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006609 srcs = [
6610 "bench/f32-gemm-e2e.cc",
6611 "bench/end2end.h",
6612 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006613 deps = MICROKERNEL_BENCHMARK_DEPS + [
6614 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006615 ":fp32_mobilenet_v1",
6616 ":fp32_mobilenet_v2",
6617 ":fp32_mobilenet_v3_large",
6618 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006619 ],
6620)
6621
6622xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006623 name = "qs8_gemm_e2e_bench",
6624 srcs = [
6625 "bench/qs8-gemm-e2e.cc",
6626 "bench/end2end.h",
6627 ] + MICROKERNEL_BENCHMARK_HDRS,
6628 deps = MICROKERNEL_BENCHMARK_DEPS + [
6629 ":XNNPACK",
6630 ":qs8_mobilenet_v1",
6631 ":qs8_mobilenet_v2",
6632 ],
6633)
6634
6635xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006636 name = "end2end_bench",
6637 srcs = ["bench/end2end.cc"],
6638 deps = [
6639 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006640 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006641 ":fp16_mobilenet_v1",
6642 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006643 ":fp16_mobilenet_v3_large",
6644 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006645 ":fp32_mobilenet_v1",
6646 ":fp32_mobilenet_v2",
6647 ":fp32_mobilenet_v3_large",
6648 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006649 ":fp32_sparse_mobilenet_v1",
6650 ":fp32_sparse_mobilenet_v2",
6651 ":fp32_sparse_mobilenet_v3_large",
6652 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006653 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006654 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006655 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006656 "@pthreadpool",
6657 ],
6658)
6659
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006660#################### Accuracy evaluation for math functions ####################
6661
6662xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006663 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006664 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006665 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006666 "src/xnnpack/AlignedAllocator.h",
6667 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006668 deps = ACCURACY_EVAL_DEPS + [
6669 ":bench_utils",
6670 "@cpuinfo",
6671 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006672)
6673
Marat Dukhan515c9772019-10-17 18:07:57 -07006674xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006675 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006676 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006677 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006678 "src/xnnpack/AlignedAllocator.h",
6679 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006680 deps = ACCURACY_EVAL_DEPS + [
6681 ":bench_utils",
6682 "@cpuinfo",
6683 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006684)
6685
Marat Dukhan98ba4412019-10-23 02:14:28 -07006686xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006687 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006688 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006689 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006690 "src/xnnpack/AlignedAllocator.h",
6691 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006692 deps = ACCURACY_EVAL_DEPS + [
6693 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006694 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006695 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006696)
6697
6698xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006699 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006700 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006701 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006702 "src/xnnpack/AlignedAllocator.h",
6703 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006704 deps = ACCURACY_EVAL_DEPS + [
6705 ":bench_utils",
6706 "@cpuinfo",
6707 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006708)
6709
Marat Dukhanf44f0222020-12-14 11:53:27 -08006710xnnpack_benchmark(
6711 name = "f32_sigmoid_ulp_eval",
6712 srcs = [
6713 "eval/f32-sigmoid-ulp.cc",
6714 "src/xnnpack/AlignedAllocator.h",
6715 ] + ACCURACY_EVAL_HDRS,
6716 deps = ACCURACY_EVAL_DEPS + [
6717 ":bench_utils",
6718 "@cpuinfo",
6719 ],
6720)
6721
6722xnnpack_benchmark(
6723 name = "f32_sqrt_ulp_eval",
6724 srcs = [
6725 "eval/f32-sqrt-ulp.cc",
6726 "src/xnnpack/AlignedAllocator.h",
6727 ] + ACCURACY_EVAL_HDRS,
6728 deps = ACCURACY_EVAL_DEPS + [
6729 ":bench_utils",
6730 "@cpuinfo",
6731 ],
6732)
6733
6734################### Accuracy verification for math functions ##################
6735
6736xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006737 name = "f32_exp_eval",
6738 srcs = [
6739 "eval/f32-exp.cc",
6740 "src/xnnpack/AlignedAllocator.h",
6741 "src/xnnpack/math-stubs.h",
6742 ] + MICROKERNEL_TEST_HDRS,
6743 automatic = False,
6744 deps = MICROKERNEL_TEST_DEPS,
6745)
6746
6747xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006748 name = "f32_expm1minus_eval",
6749 srcs = [
6750 "eval/f32-expm1minus.cc",
6751 "src/xnnpack/AlignedAllocator.h",
6752 "src/xnnpack/math-stubs.h",
6753 ] + MICROKERNEL_TEST_HDRS,
6754 automatic = False,
6755 deps = MICROKERNEL_TEST_DEPS,
6756)
6757
Marat Dukhan8853b822020-05-07 12:19:01 -07006758xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006759 name = "f32_expminus_eval",
6760 srcs = [
6761 "eval/f32-expminus.cc",
6762 "src/xnnpack/AlignedAllocator.h",
6763 "src/xnnpack/math-stubs.h",
6764 ] + MICROKERNEL_TEST_HDRS,
6765 automatic = False,
6766 deps = MICROKERNEL_TEST_DEPS,
6767)
6768
6769xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006770 name = "f32_roundne_eval",
6771 srcs = [
6772 "eval/f32-roundne.cc",
6773 "src/xnnpack/AlignedAllocator.h",
6774 "src/xnnpack/math-stubs.h",
6775 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006776 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006777 deps = MICROKERNEL_TEST_DEPS,
6778)
6779
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006780xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006781 name = "f32_roundd_eval",
6782 srcs = [
6783 "eval/f32-roundd.cc",
6784 "src/xnnpack/AlignedAllocator.h",
6785 "src/xnnpack/math-stubs.h",
6786 ] + MICROKERNEL_TEST_HDRS,
6787 automatic = False,
6788 deps = MICROKERNEL_TEST_DEPS,
6789)
6790
6791xnnpack_unit_test(
6792 name = "f32_roundu_eval",
6793 srcs = [
6794 "eval/f32-roundu.cc",
6795 "src/xnnpack/AlignedAllocator.h",
6796 "src/xnnpack/math-stubs.h",
6797 ] + MICROKERNEL_TEST_HDRS,
6798 automatic = False,
6799 deps = MICROKERNEL_TEST_DEPS,
6800)
6801
6802xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006803 name = "f32_roundz_eval",
6804 srcs = [
6805 "eval/f32-roundz.cc",
6806 "src/xnnpack/AlignedAllocator.h",
6807 "src/xnnpack/math-stubs.h",
6808 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006809 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006810 deps = MICROKERNEL_TEST_DEPS,
6811)
6812
Marat Dukhan08c4a432019-10-03 09:29:21 -07006813######################### Unit tests for micro-kernels #########################
6814
6815xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006816 name = "f16_dwconv_minmax_test",
6817 srcs = [
6818 "test/f16-dwconv-minmax.cc",
6819 "test/dwconv-microkernel-tester.h",
6820 "src/xnnpack/AlignedAllocator.h",
6821 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6822 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6823)
6824
6825xnnpack_unit_test(
6826 name = "f16_gavgpool_minmax_test",
6827 srcs = [
6828 "test/f16-gavgpool-minmax.cc",
6829 "test/gavgpool-microkernel-tester.h",
6830 "src/xnnpack/AlignedAllocator.h",
6831 ] + MICROKERNEL_TEST_HDRS,
6832 deps = MICROKERNEL_TEST_DEPS,
6833)
6834
6835xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006836 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006837 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006838 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006839 "test/gemm-microkernel-tester.h",
6840 "src/xnnpack/AlignedAllocator.h",
6841 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006842 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006843)
6844
6845xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006846 name = "f16_igemm_minmax_test",
6847 srcs = [
6848 "test/f16-igemm-minmax.cc",
6849 "test/gemm-microkernel-tester.h",
6850 "src/xnnpack/AlignedAllocator.h",
6851 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6852 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6853)
6854
6855xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006856 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006857 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006858 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006859 "test/spmm-microkernel-tester.h",
6860 "src/xnnpack/AlignedAllocator.h",
6861 ] + MICROKERNEL_TEST_HDRS,
6862 deps = MICROKERNEL_TEST_DEPS,
6863)
6864
6865xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006866 name = "f16_vadd_minmax_test",
6867 srcs = [
6868 "test/f16-vadd-minmax.cc",
6869 "test/vbinary-microkernel-tester.h",
6870 ] + MICROKERNEL_TEST_HDRS,
6871 deps = MICROKERNEL_TEST_DEPS,
6872)
6873
6874xnnpack_unit_test(
6875 name = "f16_vaddc_minmax_test",
6876 srcs = [
6877 "test/f16-vaddc-minmax.cc",
6878 "test/vbinaryc-microkernel-tester.h",
6879 ] + MICROKERNEL_TEST_HDRS,
6880 deps = MICROKERNEL_TEST_DEPS,
6881)
6882
6883xnnpack_unit_test(
6884 name = "f16_vclamp_test",
6885 srcs = [
6886 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006887 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006888 ] + MICROKERNEL_TEST_HDRS,
6889 deps = MICROKERNEL_TEST_DEPS,
6890)
6891
6892xnnpack_unit_test(
6893 name = "f16_vdiv_minmax_test",
6894 srcs = [
6895 "test/f16-vdiv-minmax.cc",
6896 "test/vbinary-microkernel-tester.h",
6897 ] + MICROKERNEL_TEST_HDRS,
6898 deps = MICROKERNEL_TEST_DEPS,
6899)
6900
6901xnnpack_unit_test(
6902 name = "f16_vdivc_minmax_test",
6903 srcs = [
6904 "test/f16-vdivc-minmax.cc",
6905 "test/vbinaryc-microkernel-tester.h",
6906 ] + MICROKERNEL_TEST_HDRS,
6907 deps = MICROKERNEL_TEST_DEPS,
6908)
6909
6910xnnpack_unit_test(
6911 name = "f16_vrdivc_minmax_test",
6912 srcs = [
6913 "test/f16-vrdivc-minmax.cc",
6914 "test/vbinaryc-microkernel-tester.h",
6915 ] + MICROKERNEL_TEST_HDRS,
6916 deps = MICROKERNEL_TEST_DEPS,
6917)
6918
6919xnnpack_unit_test(
6920 name = "f16_vhswish_test",
6921 srcs = [
6922 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006923 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006924 ] + MICROKERNEL_TEST_HDRS,
6925 deps = MICROKERNEL_TEST_DEPS,
6926)
6927
6928xnnpack_unit_test(
6929 name = "f16_vmax_test",
6930 srcs = [
6931 "test/f16-vmax.cc",
6932 "test/vbinary-microkernel-tester.h",
6933 ] + MICROKERNEL_TEST_HDRS,
6934 deps = MICROKERNEL_TEST_DEPS,
6935)
6936
6937xnnpack_unit_test(
6938 name = "f16_vmaxc_test",
6939 srcs = [
6940 "test/f16-vmaxc.cc",
6941 "test/vbinaryc-microkernel-tester.h",
6942 ] + MICROKERNEL_TEST_HDRS,
6943 deps = MICROKERNEL_TEST_DEPS,
6944)
6945
6946xnnpack_unit_test(
6947 name = "f16_vmin_test",
6948 srcs = [
6949 "test/f16-vmin.cc",
6950 "test/vbinary-microkernel-tester.h",
6951 ] + MICROKERNEL_TEST_HDRS,
6952 deps = MICROKERNEL_TEST_DEPS,
6953)
6954
6955xnnpack_unit_test(
6956 name = "f16_vminc_test",
6957 srcs = [
6958 "test/f16-vminc.cc",
6959 "test/vbinaryc-microkernel-tester.h",
6960 ] + MICROKERNEL_TEST_HDRS,
6961 deps = MICROKERNEL_TEST_DEPS,
6962)
6963
6964xnnpack_unit_test(
6965 name = "f16_vmul_minmax_test",
6966 srcs = [
6967 "test/f16-vmul-minmax.cc",
6968 "test/vbinary-microkernel-tester.h",
6969 ] + MICROKERNEL_TEST_HDRS,
6970 deps = MICROKERNEL_TEST_DEPS,
6971)
6972
6973xnnpack_unit_test(
6974 name = "f16_vmulc_minmax_test",
6975 srcs = [
6976 "test/f16-vmulc-minmax.cc",
6977 "test/vbinaryc-microkernel-tester.h",
6978 ] + MICROKERNEL_TEST_HDRS,
6979 deps = MICROKERNEL_TEST_DEPS,
6980)
6981
6982xnnpack_unit_test(
6983 name = "f16_vmulcaddc_minmax_test",
6984 srcs = [
6985 "test/f16-vmulcaddc-minmax.cc",
6986 "test/vmulcaddc-microkernel-tester.h",
6987 "src/xnnpack/AlignedAllocator.h",
6988 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6989 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6990)
6991
6992xnnpack_unit_test(
6993 name = "f16_vsub_minmax_test",
6994 srcs = [
6995 "test/f16-vsub-minmax.cc",
6996 "test/vbinary-microkernel-tester.h",
6997 ] + MICROKERNEL_TEST_HDRS,
6998 deps = MICROKERNEL_TEST_DEPS,
6999)
7000
7001xnnpack_unit_test(
7002 name = "f16_vsubc_minmax_test",
7003 srcs = [
7004 "test/f16-vsubc-minmax.cc",
7005 "test/vbinaryc-microkernel-tester.h",
7006 ] + MICROKERNEL_TEST_HDRS,
7007 deps = MICROKERNEL_TEST_DEPS,
7008)
7009
7010xnnpack_unit_test(
7011 name = "f16_vrsubc_minmax_test",
7012 srcs = [
7013 "test/f16-vrsubc-minmax.cc",
7014 "test/vbinaryc-microkernel-tester.h",
7015 ] + MICROKERNEL_TEST_HDRS,
7016 deps = MICROKERNEL_TEST_DEPS,
7017)
7018
7019xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007020 name = "f32_argmaxpool_test",
7021 srcs = [
7022 "test/f32-argmaxpool.cc",
7023 "test/argmaxpool-microkernel-tester.h",
7024 "src/xnnpack/AlignedAllocator.h",
7025 ] + MICROKERNEL_TEST_HDRS,
7026 deps = MICROKERNEL_TEST_DEPS,
7027)
7028
7029xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007030 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007031 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007032 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007033 "test/avgpool-microkernel-tester.h",
7034 "src/xnnpack/AlignedAllocator.h",
7035 ] + MICROKERNEL_TEST_HDRS,
7036 deps = MICROKERNEL_TEST_DEPS,
7037)
7038
7039xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07007040 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007041 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07007042 "test/f32-ibilinear.cc",
7043 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007044 "src/xnnpack/AlignedAllocator.h",
7045 ] + MICROKERNEL_TEST_HDRS,
7046 deps = MICROKERNEL_TEST_DEPS,
7047)
7048
7049xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07007050 name = "f32_ibilinear_chw_test",
7051 srcs = [
7052 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07007053 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07007054 "src/xnnpack/AlignedAllocator.h",
7055 ] + MICROKERNEL_TEST_HDRS,
7056 deps = MICROKERNEL_TEST_DEPS,
7057)
7058
7059xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007060 name = "f32_igemm_test",
7061 srcs = [
7062 "test/f32-igemm.cc",
7063 "test/gemm-microkernel-tester.h",
7064 "src/xnnpack/AlignedAllocator.h",
7065 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007066 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007067)
7068
7069xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007070 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007071 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07007072 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007073 "test/gemm-microkernel-tester.h",
7074 "src/xnnpack/AlignedAllocator.h",
7075 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007076 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007077)
7078
7079xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07007080 name = "f32_igemm_minmax_test",
7081 srcs = [
7082 "test/f32-igemm-minmax.cc",
7083 "test/gemm-microkernel-tester.h",
7084 "src/xnnpack/AlignedAllocator.h",
7085 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007086 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07007087)
7088
7089xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007090 name = "f32_conv_hwc_test",
7091 srcs = [
7092 "test/f32-conv-hwc.cc",
7093 "test/conv-hwc-microkernel-tester.h",
7094 "src/xnnpack/AlignedAllocator.h",
7095 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007096 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007097)
7098
7099xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007100 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007101 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007102 "test/f32-conv-hwc2chw.cc",
7103 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007104 "src/xnnpack/AlignedAllocator.h",
7105 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007106 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007107)
7108
7109xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007110 name = "f32_dwconv_test",
7111 srcs = [
7112 "test/f32-dwconv.cc",
7113 "test/dwconv-microkernel-tester.h",
7114 "src/xnnpack/AlignedAllocator.h",
7115 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007116 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007117)
7118
7119xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007120 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007121 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007122 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007123 "test/dwconv-microkernel-tester.h",
7124 "src/xnnpack/AlignedAllocator.h",
7125 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007126 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007127)
7128
7129xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07007130 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007131 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07007132 "test/f32-dwconv2d-chw.cc",
7133 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007134 "src/xnnpack/AlignedAllocator.h",
7135 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007136 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007137)
7138
7139xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007140 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007141 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007142 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007143 "test/gavgpool-microkernel-tester.h",
7144 "src/xnnpack/AlignedAllocator.h",
7145 ] + MICROKERNEL_TEST_HDRS,
7146 deps = MICROKERNEL_TEST_DEPS,
7147)
7148
7149xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007150 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007151 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007152 "test/f32-gavgpool-cw.cc",
7153 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007154 "src/xnnpack/AlignedAllocator.h",
7155 ] + MICROKERNEL_TEST_HDRS,
7156 deps = MICROKERNEL_TEST_DEPS,
7157)
7158
7159xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007160 name = "f32_gemm_test",
7161 srcs = [
7162 "test/f32-gemm.cc",
7163 "test/gemm-microkernel-tester.h",
7164 "src/xnnpack/AlignedAllocator.h",
7165 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007166 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007167)
7168
7169xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007170 name = "f32_gemm_relu_test",
7171 srcs = [
7172 "test/f32-gemm-relu.cc",
7173 "test/gemm-microkernel-tester.h",
7174 "src/xnnpack/AlignedAllocator.h",
7175 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007176 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007177)
7178
7179xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007180 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007181 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007182 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007183 "test/gemm-microkernel-tester.h",
7184 "src/xnnpack/AlignedAllocator.h",
7185 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007186 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007187)
7188
7189xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007190 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007191 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007192 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007193 "test/gemm-microkernel-tester.h",
7194 "src/xnnpack/AlignedAllocator.h",
7195 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007196 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007197)
7198
7199xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007200 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007201 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007202 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007203 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007204 ] + MICROKERNEL_TEST_HDRS,
7205 deps = MICROKERNEL_TEST_DEPS,
7206)
7207
7208xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007209 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007210 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007211 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007212 "test/maxpool-microkernel-tester.h",
7213 ] + MICROKERNEL_TEST_HDRS,
7214 deps = MICROKERNEL_TEST_DEPS,
7215)
7216
7217xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007218 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007219 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007220 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007221 "test/avgpool-microkernel-tester.h",
7222 "src/xnnpack/AlignedAllocator.h",
7223 ] + MICROKERNEL_TEST_HDRS,
7224 deps = MICROKERNEL_TEST_DEPS,
7225)
7226
7227xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007228 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007229 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007230 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007231 "test/gemm-microkernel-tester.h",
7232 "src/xnnpack/AlignedAllocator.h",
7233 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007234 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007235)
7236
7237xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007238 name = "f16_prelu_test",
7239 srcs = [
7240 "test/f16-prelu.cc",
7241 "test/prelu-microkernel-tester.h",
7242 "src/xnnpack/AlignedAllocator.h",
7243 ] + MICROKERNEL_TEST_HDRS,
7244 deps = MICROKERNEL_TEST_DEPS,
7245)
7246
7247xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007248 name = "f32_prelu_test",
7249 srcs = [
7250 "test/f32-prelu.cc",
7251 "test/prelu-microkernel-tester.h",
7252 "src/xnnpack/AlignedAllocator.h",
7253 ] + MICROKERNEL_TEST_HDRS,
7254 deps = MICROKERNEL_TEST_DEPS,
7255)
7256
7257xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007258 name = "f32_raddexpminusmax_test",
7259 srcs = [
7260 "test/f32-raddexpminusmax.cc",
7261 "test/raddexpminusmax-microkernel-tester.h",
7262 ] + MICROKERNEL_TEST_HDRS,
7263 deps = MICROKERNEL_TEST_DEPS,
7264)
7265
7266xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007267 name = "f32_raddextexp_test",
7268 srcs = [
7269 "test/f32-raddextexp.cc",
7270 "test/raddextexp-microkernel-tester.h",
7271 ] + MICROKERNEL_TEST_HDRS,
7272 deps = MICROKERNEL_TEST_DEPS,
7273)
7274
7275xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007276 name = "f32_raddstoreexpminusmax_test",
7277 srcs = [
7278 "test/f32-raddstoreexpminusmax.cc",
7279 "test/raddstoreexpminusmax-microkernel-tester.h",
7280 ] + MICROKERNEL_TEST_HDRS,
7281 deps = MICROKERNEL_TEST_DEPS,
7282)
7283
7284xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007285 name = "f32_rmax_test",
7286 srcs = [
7287 "test/f32-rmax.cc",
7288 "test/rmax-microkernel-tester.h",
7289 ] + MICROKERNEL_TEST_HDRS,
7290 deps = MICROKERNEL_TEST_DEPS,
7291)
7292
7293xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007294 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007295 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007296 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007297 "test/spmm-microkernel-tester.h",
7298 "src/xnnpack/AlignedAllocator.h",
7299 ] + MICROKERNEL_TEST_HDRS,
7300 deps = MICROKERNEL_TEST_DEPS,
7301)
7302
7303xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007304 name = "f32_vabs_test",
7305 srcs = [
7306 "test/f32-vabs.cc",
7307 "test/vunary-microkernel-tester.h",
7308 ] + MICROKERNEL_TEST_HDRS,
7309 deps = MICROKERNEL_TEST_DEPS,
7310)
7311
7312xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007313 name = "f32_vadd_test",
7314 srcs = [
7315 "test/f32-vadd.cc",
7316 "test/vbinary-microkernel-tester.h",
7317 ] + MICROKERNEL_TEST_HDRS,
7318 deps = MICROKERNEL_TEST_DEPS,
7319)
7320
7321xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007322 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007323 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007324 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007325 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007326 ] + MICROKERNEL_TEST_HDRS,
7327 deps = MICROKERNEL_TEST_DEPS,
7328)
7329
7330xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007331 name = "f32_vadd_relu_test",
7332 srcs = [
7333 "test/f32-vadd-relu.cc",
7334 "test/vbinary-microkernel-tester.h",
7335 ] + MICROKERNEL_TEST_HDRS,
7336 deps = MICROKERNEL_TEST_DEPS,
7337)
7338
7339xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007340 name = "f32_vaddc_test",
7341 srcs = [
7342 "test/f32-vaddc.cc",
7343 "test/vbinaryc-microkernel-tester.h",
7344 ] + MICROKERNEL_TEST_HDRS,
7345 deps = MICROKERNEL_TEST_DEPS,
7346)
7347
7348xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007349 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007350 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007351 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007352 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007353 ] + MICROKERNEL_TEST_HDRS,
7354 deps = MICROKERNEL_TEST_DEPS,
7355)
7356
7357xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007358 name = "f32_vaddc_relu_test",
7359 srcs = [
7360 "test/f32-vaddc-relu.cc",
7361 "test/vbinaryc-microkernel-tester.h",
7362 ] + MICROKERNEL_TEST_HDRS,
7363 deps = MICROKERNEL_TEST_DEPS,
7364)
7365
7366xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007367 name = "f32_vclamp_test",
7368 srcs = [
7369 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007370 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007371 ] + MICROKERNEL_TEST_HDRS,
7372 deps = MICROKERNEL_TEST_DEPS,
7373)
7374
7375xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007376 name = "f32_vdiv_test",
7377 srcs = [
7378 "test/f32-vdiv.cc",
7379 "test/vbinary-microkernel-tester.h",
7380 ] + MICROKERNEL_TEST_HDRS,
7381 deps = MICROKERNEL_TEST_DEPS,
7382)
7383
7384xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007385 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007386 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007387 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007388 "test/vbinary-microkernel-tester.h",
7389 ] + MICROKERNEL_TEST_HDRS,
7390 deps = MICROKERNEL_TEST_DEPS,
7391)
7392
7393xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007394 name = "f32_vdiv_relu_test",
7395 srcs = [
7396 "test/f32-vdiv-relu.cc",
7397 "test/vbinary-microkernel-tester.h",
7398 ] + MICROKERNEL_TEST_HDRS,
7399 deps = MICROKERNEL_TEST_DEPS,
7400)
7401
7402xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007403 name = "f32_vdivc_test",
7404 srcs = [
7405 "test/f32-vdivc.cc",
7406 "test/vbinaryc-microkernel-tester.h",
7407 ] + MICROKERNEL_TEST_HDRS,
7408 deps = MICROKERNEL_TEST_DEPS,
7409)
7410
7411xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007412 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007413 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007414 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007415 "test/vbinaryc-microkernel-tester.h",
7416 ] + MICROKERNEL_TEST_HDRS,
7417 deps = MICROKERNEL_TEST_DEPS,
7418)
7419
7420xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007421 name = "f32_vdivc_relu_test",
7422 srcs = [
7423 "test/f32-vdivc-relu.cc",
7424 "test/vbinaryc-microkernel-tester.h",
7425 ] + MICROKERNEL_TEST_HDRS,
7426 deps = MICROKERNEL_TEST_DEPS,
7427)
7428
7429xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007430 name = "f32_vrdivc_test",
7431 srcs = [
7432 "test/f32-vrdivc.cc",
7433 "test/vbinaryc-microkernel-tester.h",
7434 ] + MICROKERNEL_TEST_HDRS,
7435 deps = MICROKERNEL_TEST_DEPS,
7436)
7437
7438xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007439 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007440 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007441 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007442 "test/vbinaryc-microkernel-tester.h",
7443 ] + MICROKERNEL_TEST_HDRS,
7444 deps = MICROKERNEL_TEST_DEPS,
7445)
7446
7447xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007448 name = "f32_vrdivc_relu_test",
7449 srcs = [
7450 "test/f32-vrdivc-relu.cc",
7451 "test/vbinaryc-microkernel-tester.h",
7452 ] + MICROKERNEL_TEST_HDRS,
7453 deps = MICROKERNEL_TEST_DEPS,
7454)
7455
7456xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007457 name = "f32_velu_test",
7458 srcs = [
7459 "test/f32-velu.cc",
7460 "test/vunary-microkernel-tester.h",
7461 ] + MICROKERNEL_TEST_HDRS,
7462 deps = MICROKERNEL_TEST_DEPS,
7463)
7464
7465xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007466 name = "f32_vmax_test",
7467 srcs = [
7468 "test/f32-vmax.cc",
7469 "test/vbinary-microkernel-tester.h",
7470 ] + MICROKERNEL_TEST_HDRS,
7471 deps = MICROKERNEL_TEST_DEPS,
7472)
7473
7474xnnpack_unit_test(
7475 name = "f32_vmaxc_test",
7476 srcs = [
7477 "test/f32-vmaxc.cc",
7478 "test/vbinaryc-microkernel-tester.h",
7479 ] + MICROKERNEL_TEST_HDRS,
7480 deps = MICROKERNEL_TEST_DEPS,
7481)
7482
7483xnnpack_unit_test(
7484 name = "f32_vmin_test",
7485 srcs = [
7486 "test/f32-vmin.cc",
7487 "test/vbinary-microkernel-tester.h",
7488 ] + MICROKERNEL_TEST_HDRS,
7489 deps = MICROKERNEL_TEST_DEPS,
7490)
7491
7492xnnpack_unit_test(
7493 name = "f32_vminc_test",
7494 srcs = [
7495 "test/f32-vminc.cc",
7496 "test/vbinaryc-microkernel-tester.h",
7497 ] + MICROKERNEL_TEST_HDRS,
7498 deps = MICROKERNEL_TEST_DEPS,
7499)
7500
7501xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007502 name = "f32_vmul_test",
7503 srcs = [
7504 "test/f32-vmul.cc",
7505 "test/vbinary-microkernel-tester.h",
7506 ] + MICROKERNEL_TEST_HDRS,
7507 deps = MICROKERNEL_TEST_DEPS,
7508)
7509
7510xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007511 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007512 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007513 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007514 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007515 ] + MICROKERNEL_TEST_HDRS,
7516 deps = MICROKERNEL_TEST_DEPS,
7517)
7518
7519xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007520 name = "f32_vmul_relu_test",
7521 srcs = [
7522 "test/f32-vmul-relu.cc",
7523 "test/vbinary-microkernel-tester.h",
7524 ] + MICROKERNEL_TEST_HDRS,
7525 deps = MICROKERNEL_TEST_DEPS,
7526)
7527
7528xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007529 name = "f32_vmulc_test",
7530 srcs = [
7531 "test/f32-vmulc.cc",
7532 "test/vbinaryc-microkernel-tester.h",
7533 ] + MICROKERNEL_TEST_HDRS,
7534 deps = MICROKERNEL_TEST_DEPS,
7535)
7536
7537xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007538 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007539 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007540 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007541 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007542 ] + MICROKERNEL_TEST_HDRS,
7543 deps = MICROKERNEL_TEST_DEPS,
7544)
7545
7546xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007547 name = "f32_vmulc_relu_test",
7548 srcs = [
7549 "test/f32-vmulc-relu.cc",
7550 "test/vbinaryc-microkernel-tester.h",
7551 ] + MICROKERNEL_TEST_HDRS,
7552 deps = MICROKERNEL_TEST_DEPS,
7553)
7554
7555xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007556 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007557 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007558 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007559 "test/vmulcaddc-microkernel-tester.h",
7560 "src/xnnpack/AlignedAllocator.h",
7561 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007562 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007563)
7564
7565xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007566 name = "f32_vlrelu_test",
7567 srcs = [
7568 "test/f32-vlrelu.cc",
7569 "test/vunary-microkernel-tester.h",
7570 ] + MICROKERNEL_TEST_HDRS,
7571 deps = MICROKERNEL_TEST_DEPS,
7572)
7573
7574xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007575 name = "f32_vneg_test",
7576 srcs = [
7577 "test/f32-vneg.cc",
7578 "test/vunary-microkernel-tester.h",
7579 ] + MICROKERNEL_TEST_HDRS,
7580 deps = MICROKERNEL_TEST_DEPS,
7581)
7582
7583xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007584 name = "f32_vrelu_test",
7585 srcs = [
7586 "test/f32-vrelu.cc",
7587 "test/vunary-microkernel-tester.h",
7588 ] + MICROKERNEL_TEST_HDRS,
7589 deps = MICROKERNEL_TEST_DEPS,
7590)
7591
7592xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007593 name = "f32_vrndne_test",
7594 srcs = [
7595 "test/f32-vrndne.cc",
7596 "test/vunary-microkernel-tester.h",
7597 ] + MICROKERNEL_TEST_HDRS,
7598 deps = MICROKERNEL_TEST_DEPS,
7599)
7600
7601xnnpack_unit_test(
7602 name = "f32_vrndz_test",
7603 srcs = [
7604 "test/f32-vrndz.cc",
7605 "test/vunary-microkernel-tester.h",
7606 ] + MICROKERNEL_TEST_HDRS,
7607 deps = MICROKERNEL_TEST_DEPS,
7608)
7609
7610xnnpack_unit_test(
7611 name = "f32_vrndu_test",
7612 srcs = [
7613 "test/f32-vrndu.cc",
7614 "test/vunary-microkernel-tester.h",
7615 ] + MICROKERNEL_TEST_HDRS,
7616 deps = MICROKERNEL_TEST_DEPS,
7617)
7618
7619xnnpack_unit_test(
7620 name = "f32_vrndd_test",
7621 srcs = [
7622 "test/f32-vrndd.cc",
7623 "test/vunary-microkernel-tester.h",
7624 ] + MICROKERNEL_TEST_HDRS,
7625 deps = MICROKERNEL_TEST_DEPS,
7626)
7627
7628xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007629 name = "f32_vscale_test",
7630 srcs = [
7631 "test/f32-vscale.cc",
7632 "test/vscale-microkernel-tester.h",
7633 ] + MICROKERNEL_TEST_HDRS,
7634 deps = MICROKERNEL_TEST_DEPS,
7635)
7636
7637xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007638 name = "f32_vscaleexpminusmax_test",
7639 srcs = [
7640 "test/f32-vscaleexpminusmax.cc",
7641 "test/vscaleexpminusmax-microkernel-tester.h",
7642 ] + MICROKERNEL_TEST_HDRS,
7643 deps = MICROKERNEL_TEST_DEPS,
7644)
7645
7646xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007647 name = "f32_vscaleextexp_test",
7648 srcs = [
7649 "test/f32-vscaleextexp.cc",
7650 "test/vscaleextexp-microkernel-tester.h",
7651 ] + MICROKERNEL_TEST_HDRS,
7652 deps = MICROKERNEL_TEST_DEPS,
7653)
7654
7655xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007656 name = "f32_vsigmoid_test",
7657 srcs = [
7658 "test/f32-vsigmoid.cc",
7659 "test/vunary-microkernel-tester.h",
7660 ] + MICROKERNEL_TEST_HDRS,
7661 deps = MICROKERNEL_TEST_DEPS,
7662)
7663
7664xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007665 name = "f32_vsqr_test",
7666 srcs = [
7667 "test/f32-vsqr.cc",
7668 "test/vunary-microkernel-tester.h",
7669 ] + MICROKERNEL_TEST_HDRS,
7670 deps = MICROKERNEL_TEST_DEPS,
7671)
7672
7673xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007674 name = "f32_vsqrdiff_test",
7675 srcs = [
7676 "test/f32-vsqrdiff.cc",
7677 "test/vbinary-microkernel-tester.h",
7678 ] + MICROKERNEL_TEST_HDRS,
7679 deps = MICROKERNEL_TEST_DEPS,
7680)
7681
7682xnnpack_unit_test(
7683 name = "f32_vsqrdiffc_test",
7684 srcs = [
7685 "test/f32-vsqrdiffc.cc",
7686 "test/vbinaryc-microkernel-tester.h",
7687 ] + MICROKERNEL_TEST_HDRS,
7688 deps = MICROKERNEL_TEST_DEPS,
7689)
7690
7691xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007692 name = "f32_vsqrt_test",
7693 srcs = [
7694 "test/f32-vsqrt.cc",
7695 "test/vunary-microkernel-tester.h",
7696 ] + MICROKERNEL_TEST_HDRS,
7697 deps = MICROKERNEL_TEST_DEPS,
7698)
7699
7700xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007701 name = "f32_vsub_test",
7702 srcs = [
7703 "test/f32-vsub.cc",
7704 "test/vbinary-microkernel-tester.h",
7705 ] + MICROKERNEL_TEST_HDRS,
7706 deps = MICROKERNEL_TEST_DEPS,
7707)
7708
7709xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007710 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007711 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007712 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007713 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007714 ] + MICROKERNEL_TEST_HDRS,
7715 deps = MICROKERNEL_TEST_DEPS,
7716)
7717
7718xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007719 name = "f32_vsub_relu_test",
7720 srcs = [
7721 "test/f32-vsub-relu.cc",
7722 "test/vbinary-microkernel-tester.h",
7723 ] + MICROKERNEL_TEST_HDRS,
7724 deps = MICROKERNEL_TEST_DEPS,
7725)
7726
7727xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007728 name = "f32_vsubc_test",
7729 srcs = [
7730 "test/f32-vsubc.cc",
7731 "test/vbinaryc-microkernel-tester.h",
7732 ] + MICROKERNEL_TEST_HDRS,
7733 deps = MICROKERNEL_TEST_DEPS,
7734)
7735
7736xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007737 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007738 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007739 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007740 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007741 ] + MICROKERNEL_TEST_HDRS,
7742 deps = MICROKERNEL_TEST_DEPS,
7743)
7744
7745xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007746 name = "f32_vsubc_relu_test",
7747 srcs = [
7748 "test/f32-vsubc-relu.cc",
7749 "test/vbinaryc-microkernel-tester.h",
7750 ] + MICROKERNEL_TEST_HDRS,
7751 deps = MICROKERNEL_TEST_DEPS,
7752)
7753
7754xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007755 name = "f32_vrsubc_test",
7756 srcs = [
7757 "test/f32-vrsubc.cc",
7758 "test/vbinaryc-microkernel-tester.h",
7759 ] + MICROKERNEL_TEST_HDRS,
7760 deps = MICROKERNEL_TEST_DEPS,
7761)
7762
7763xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007764 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007765 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007766 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007767 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007768 ] + MICROKERNEL_TEST_HDRS,
7769 deps = MICROKERNEL_TEST_DEPS,
7770)
7771
7772xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007773 name = "f32_vrsubc_relu_test",
7774 srcs = [
7775 "test/f32-vrsubc-relu.cc",
7776 "test/vbinaryc-microkernel-tester.h",
7777 ] + MICROKERNEL_TEST_HDRS,
7778 deps = MICROKERNEL_TEST_DEPS,
7779)
7780
7781xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007782 name = "qc8_dwconv_minmax_fp32_test",
7783 timeout = "moderate",
7784 srcs = [
7785 "test/qc8-dwconv-minmax-fp32.cc",
7786 "test/dwconv-microkernel-tester.h",
7787 "src/xnnpack/AlignedAllocator.h",
7788 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7789 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7790)
7791
7792xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007793 name = "qc8_gemm_minmax_fp32_test",
7794 timeout = "moderate",
7795 srcs = [
7796 "test/qc8-gemm-minmax-fp32.cc",
7797 "test/gemm-microkernel-tester.h",
7798 "src/xnnpack/AlignedAllocator.h",
7799 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7800 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7801)
7802
7803xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007804 name = "qc8_igemm_minmax_fp32_test",
7805 timeout = "moderate",
7806 srcs = [
7807 "test/qc8-igemm-minmax-fp32.cc",
7808 "test/gemm-microkernel-tester.h",
7809 "src/xnnpack/AlignedAllocator.h",
7810 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7811 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7812)
7813
7814xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007815 name = "qs8_dwconv_minmax_fp32_test",
7816 srcs = [
7817 "test/qs8-dwconv-minmax-fp32.cc",
7818 "test/dwconv-microkernel-tester.h",
7819 "src/xnnpack/AlignedAllocator.h",
7820 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7821 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7822)
7823
7824xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007825 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007826 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007827 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007828 "test/dwconv-microkernel-tester.h",
7829 "src/xnnpack/AlignedAllocator.h",
7830 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7831 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7832)
7833
7834xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007835 name = "qs8_dwconv_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007836 srcs = [
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007837 "test/qs8-dwconv-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007838 "test/dwconv-microkernel-tester.h",
7839 "src/xnnpack/AlignedAllocator.h",
7840 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7841 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7842)
7843
7844xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007845 name = "qs8_gavgpool_minmax_test",
7846 srcs = [
7847 "test/qs8-gavgpool-minmax.cc",
7848 "test/gavgpool-microkernel-tester.h",
7849 "src/xnnpack/AlignedAllocator.h",
7850 ] + MICROKERNEL_TEST_HDRS,
7851 deps = MICROKERNEL_TEST_DEPS,
7852)
7853
7854xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07007855 name = "qs8_gemm_minmax_fp32_test",
7856 timeout = "moderate",
7857 srcs = [
7858 "test/qs8-gemm-minmax-fp32.cc",
7859 "test/gemm-microkernel-tester.h",
7860 "src/xnnpack/AlignedAllocator.h",
7861 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7862 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7863)
7864
7865xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007866 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007867 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007868 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007869 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007870 "test/gemm-microkernel-tester.h",
7871 "src/xnnpack/AlignedAllocator.h",
7872 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7873 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7874)
7875
7876xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07007877 name = "qs8_gemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007878 timeout = "moderate",
7879 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07007880 "test/qs8-gemm-minmax-rndnu.cc",
7881 "test/gemm-microkernel-tester.h",
7882 "src/xnnpack/AlignedAllocator.h",
7883 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7884 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7885)
7886
7887xnnpack_unit_test(
7888 name = "qs8_igemm_minmax_fp32_test",
7889 timeout = "moderate",
7890 srcs = [
7891 "test/qs8-igemm-minmax-fp32.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007892 "test/gemm-microkernel-tester.h",
7893 "src/xnnpack/AlignedAllocator.h",
7894 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7895 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7896)
7897
7898xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007899 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007900 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007901 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007902 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007903 "test/gemm-microkernel-tester.h",
7904 "src/xnnpack/AlignedAllocator.h",
7905 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7906 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7907)
7908
7909xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07007910 name = "qs8_igemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007911 timeout = "moderate",
7912 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07007913 "test/qs8-igemm-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007914 "test/gemm-microkernel-tester.h",
7915 "src/xnnpack/AlignedAllocator.h",
7916 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7917 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7918)
7919
7920xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007921 name = "qs8_requantization_test",
7922 srcs = [
7923 "src/xnnpack/requantization-stubs.h",
7924 "test/qs8-requantization.cc",
7925 "test/requantization-tester.h",
7926 ] + MICROKERNEL_TEST_HDRS,
7927 deps = MICROKERNEL_TEST_DEPS,
7928)
7929
7930xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007931 name = "qs8_vadd_minmax_test",
7932 srcs = [
7933 "test/qs8-vadd-minmax.cc",
7934 "test/vadd-microkernel-tester.h",
7935 ] + MICROKERNEL_TEST_HDRS,
7936 deps = MICROKERNEL_TEST_DEPS,
7937)
7938
7939xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007940 name = "qs8_vaddc_minmax_test",
7941 srcs = [
7942 "test/qs8-vaddc-minmax.cc",
7943 "test/vaddc-microkernel-tester.h",
7944 ] + MICROKERNEL_TEST_HDRS,
7945 deps = MICROKERNEL_TEST_DEPS,
7946)
7947
7948xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007949 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007950 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007951 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007952 "test/avgpool-microkernel-tester.h",
7953 "src/xnnpack/AlignedAllocator.h",
7954 ] + MICROKERNEL_TEST_HDRS,
7955 deps = MICROKERNEL_TEST_DEPS,
7956)
7957
7958xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07007959 name = "qu8_dwconv_minmax_fp32_test",
7960 srcs = [
7961 "test/qu8-dwconv-minmax-fp32.cc",
7962 "test/dwconv-microkernel-tester.h",
7963 "src/xnnpack/AlignedAllocator.h",
7964 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7965 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7966)
7967
7968xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007969 name = "qu8_igemm_minmax_fp32_test",
7970 srcs = [
7971 "test/qu8-igemm-minmax-fp32.cc",
7972 "test/gemm-microkernel-tester.h",
7973 "src/xnnpack/AlignedAllocator.h",
7974 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7975 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7976)
7977
7978xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007979 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007980 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07007981 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007982 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007983 "src/xnnpack/AlignedAllocator.h",
7984 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007985 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007986)
7987
7988xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007989 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007990 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007991 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007992 "test/gavgpool-microkernel-tester.h",
7993 "src/xnnpack/AlignedAllocator.h",
7994 ] + MICROKERNEL_TEST_HDRS,
7995 deps = MICROKERNEL_TEST_DEPS,
7996)
7997
7998xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007999 name = "qu8_gemm_minmax_fp32_test",
8000 srcs = [
8001 "test/qu8-gemm-minmax-fp32.cc",
8002 "test/gemm-microkernel-tester.h",
8003 "src/xnnpack/AlignedAllocator.h",
8004 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8005 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8006)
8007
8008xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008009 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008010 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008011 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008012 "test/gemm-microkernel-tester.h",
8013 "src/xnnpack/AlignedAllocator.h",
8014 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008015 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008016)
8017
8018xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07008019 name = "qu8_requantization_test",
8020 srcs = [
8021 "src/xnnpack/requantization-stubs.h",
8022 "test/qu8-requantization.cc",
8023 "test/requantization-tester.h",
8024 ] + MICROKERNEL_TEST_HDRS,
8025 deps = MICROKERNEL_TEST_DEPS,
8026)
8027
8028xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008029 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008030 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008031 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008032 "test/vadd-microkernel-tester.h",
8033 ] + MICROKERNEL_TEST_HDRS,
8034 deps = MICROKERNEL_TEST_DEPS,
8035)
8036
8037xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008038 name = "u8_lut32norm_test",
8039 srcs = [
8040 "test/u8-lut32norm.cc",
8041 "test/lut-norm-microkernel-tester.h",
8042 ] + MICROKERNEL_TEST_HDRS,
8043 deps = MICROKERNEL_TEST_DEPS,
8044)
8045
8046xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07008047 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008048 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07008049 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008050 "test/maxpool-microkernel-tester.h",
8051 ] + MICROKERNEL_TEST_HDRS,
8052 deps = MICROKERNEL_TEST_DEPS,
8053)
8054
8055xnnpack_unit_test(
8056 name = "u8_rmax_test",
8057 srcs = [
8058 "test/u8-rmax.cc",
8059 "test/rmax-microkernel-tester.h",
8060 ] + MICROKERNEL_TEST_HDRS,
8061 deps = MICROKERNEL_TEST_DEPS,
8062)
8063
8064xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07008065 name = "u8_vclamp_test",
8066 srcs = [
8067 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07008068 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07008069 ] + MICROKERNEL_TEST_HDRS,
8070 deps = MICROKERNEL_TEST_DEPS,
8071)
8072
8073xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008074 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08008075 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008076 "test/x32-depthtospace2d-chw2hwc.cc",
8077 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08008078 ] + MICROKERNEL_TEST_HDRS,
8079 deps = MICROKERNEL_TEST_DEPS,
8080)
8081
8082xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07008083 name = "x32_fill_test",
8084 srcs = [
8085 "test/x32-fill.cc",
8086 "test/fill-microkernel-tester.h",
8087 ] + MICROKERNEL_TEST_HDRS,
8088 deps = MICROKERNEL_TEST_DEPS,
8089)
8090
8091xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008092 name = "x32_packx_test",
8093 srcs = [
8094 "test/x32-packx.cc",
8095 "test/pack-microkernel-tester.h",
8096 "src/xnnpack/AlignedAllocator.h",
8097 ] + MICROKERNEL_TEST_HDRS,
8098 deps = MICROKERNEL_TEST_DEPS,
8099)
8100
8101xnnpack_unit_test(
8102 name = "x32_pad_test",
8103 srcs = [
8104 "test/x32-pad.cc",
8105 "test/pad-microkernel-tester.h",
8106 ] + MICROKERNEL_TEST_HDRS,
8107 deps = MICROKERNEL_TEST_DEPS,
8108)
8109
8110xnnpack_unit_test(
8111 name = "x32_unpool_test",
8112 srcs = [
8113 "test/x32-unpool.cc",
8114 "test/unpool-microkernel-tester.h",
8115 ] + MICROKERNEL_TEST_HDRS,
8116 deps = MICROKERNEL_TEST_DEPS,
8117)
8118
8119xnnpack_unit_test(
8120 name = "x32_zip_test",
8121 srcs = [
8122 "test/x32-zip.cc",
8123 "test/zip-microkernel-tester.h",
8124 ] + MICROKERNEL_TEST_HDRS,
8125 deps = MICROKERNEL_TEST_DEPS,
8126)
8127
8128xnnpack_unit_test(
8129 name = "x8_lut_test",
8130 srcs = [
8131 "test/x8-lut.cc",
8132 "test/lut-microkernel-tester.h",
8133 ] + MICROKERNEL_TEST_HDRS,
8134 deps = MICROKERNEL_TEST_DEPS,
8135)
8136
8137xnnpack_unit_test(
8138 name = "x8_zip_test",
8139 srcs = [
8140 "test/x8-zip.cc",
8141 "test/zip-microkernel-tester.h",
8142 ] + MICROKERNEL_TEST_HDRS,
8143 deps = MICROKERNEL_TEST_DEPS,
8144)
8145
Marat Dukhan20c3b922020-03-10 03:45:06 -07008146########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008147
8148xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07008149 name = "operator_size_test",
8150 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008151 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008152)
8153
Marat Dukhan20c3b922020-03-10 03:45:06 -07008154xnnpack_binary(
8155 name = "subgraph_size_test",
8156 srcs = ["test/subgraph-size.c"],
8157 deps = [":XNNPACK"],
8158)
8159
8160########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008161
8162xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008163 name = "abs_nc_test",
8164 srcs = [
8165 "test/abs-nc.cc",
8166 "test/abs-operator-tester.h",
8167 ],
8168 deps = OPERATOR_TEST_DEPS,
8169)
8170
8171xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008172 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008173 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008174 srcs = [
8175 "test/add-nd.cc",
8176 "test/binary-elementwise-operator-tester.h",
8177 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008178 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008179)
8180
8181xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008182 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008183 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008184 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008185 "test/argmax-pooling-operator-tester.h",
8186 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008187 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008188)
8189
8190xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008191 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008192 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008193 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008194 "test/average-pooling-operator-tester.h",
8195 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008196 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008197)
8198
8199xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008200 name = "bankers_rounding_nc_test",
8201 srcs = [
8202 "test/bankers-rounding-nc.cc",
8203 "test/bankers-rounding-operator-tester.h",
8204 ],
8205 deps = OPERATOR_TEST_DEPS,
8206)
8207
8208xnnpack_unit_test(
8209 name = "ceiling_nc_test",
8210 srcs = [
8211 "test/ceiling-nc.cc",
8212 "test/ceiling-operator-tester.h",
8213 ],
8214 deps = OPERATOR_TEST_DEPS,
8215)
8216
8217xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008218 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008219 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008220 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008221 "test/channel-shuffle-operator-tester.h",
8222 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008223 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008224)
8225
8226xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008227 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008228 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008229 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008230 "test/clamp-operator-tester.h",
8231 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008232 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008233)
8234
8235xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008236 name = "constant_pad_nd_test",
8237 srcs = [
8238 "test/constant-pad-nd.cc",
8239 "test/constant-pad-operator-tester.h",
8240 ],
8241 deps = OPERATOR_TEST_DEPS,
8242)
8243
8244xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008245 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008246 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008247 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008248 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008249 "test/convolution-operator-tester.h",
8250 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008251 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008252)
8253
8254xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008255 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008256 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008257 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008258 "test/convolution-nchw.cc",
8259 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008260 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008261 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008262)
8263
8264xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008265 name = "copy_nc_test",
8266 srcs = [
8267 "test/copy-nc.cc",
8268 "test/copy-operator-tester.h",
8269 ],
8270 deps = OPERATOR_TEST_DEPS,
8271)
8272
8273xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008274 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008275 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008276 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008277 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008278 "test/deconvolution-operator-tester.h",
8279 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008280 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008281)
8282
8283xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008284 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008285 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008286 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008287 "test/depth-to-space-operator-tester.h",
8288 ] + OPERATOR_TEST_PARAMS_HDRS,
8289 deps = OPERATOR_TEST_DEPS,
8290)
8291
8292xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008293 name = "depth_to_space_nhwc_test",
8294 srcs = [
8295 "test/depth-to-space-nhwc.cc",
8296 "test/depth-to-space-operator-tester.h",
8297 ] + OPERATOR_TEST_PARAMS_HDRS,
8298 deps = OPERATOR_TEST_DEPS,
8299)
8300
8301xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008302 name = "divide_nd_test",
8303 srcs = [
8304 "test/binary-elementwise-operator-tester.h",
8305 "test/divide-nd.cc",
8306 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008307 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008308)
8309
8310xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008311 name = "elu_nc_test",
8312 srcs = [
8313 "test/elu-nc.cc",
8314 "test/elu-operator-tester.h",
8315 ],
8316 deps = OPERATOR_TEST_DEPS,
8317)
8318
8319xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008320 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008321 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008322 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008323 "test/fully-connected-operator-tester.h",
8324 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008325 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008326)
8327
8328xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008329 name = "floor_nc_test",
8330 srcs = [
8331 "test/floor-nc.cc",
8332 "test/floor-operator-tester.h",
8333 ],
8334 deps = OPERATOR_TEST_DEPS,
8335)
8336
8337xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008338 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008339 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008340 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008341 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008342 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008343 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008344)
8345
8346xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008347 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008348 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008349 "test/global-average-pooling-ncw.cc",
8350 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008351 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008352 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008353)
8354
8355xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008356 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008357 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008358 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008359 "test/hardswish-operator-tester.h",
8360 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008361 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008362)
8363
8364xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008365 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008366 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008367 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008368 "test/leaky-relu-operator-tester.h",
8369 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008370 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008371)
8372
8373xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008374 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008375 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008376 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008377 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008378 "test/max-pooling-operator-tester.h",
8379 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008380 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008381)
8382
8383xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008384 name = "maximum_nd_test",
8385 srcs = [
8386 "test/binary-elementwise-operator-tester.h",
8387 "test/maximum-nd.cc",
8388 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008389 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008390)
8391
8392xnnpack_unit_test(
8393 name = "minimum_nd_test",
8394 srcs = [
8395 "test/binary-elementwise-operator-tester.h",
8396 "test/minimum-nd.cc",
8397 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008398 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008399)
8400
8401xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008402 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008403 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008404 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008405 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008406 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008407 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008408)
8409
8410xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008411 name = "negate_nc_test",
8412 srcs = [
8413 "test/negate-nc.cc",
8414 "test/negate-operator-tester.h",
8415 ],
8416 deps = OPERATOR_TEST_DEPS,
8417)
8418
8419xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008420 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008421 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008422 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008423 "test/prelu-operator-tester.h",
8424 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008425 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008426)
8427
8428xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008429 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008430 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008431 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008432 "test/resize-bilinear-operator-tester.h",
8433 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008434 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008435)
8436
8437xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008438 name = "resize_bilinear_nchw_test",
8439 srcs = [
8440 "test/resize-bilinear-nchw.cc",
8441 "test/resize-bilinear-operator-tester.h",
8442 ] + OPERATOR_TEST_PARAMS_HDRS,
8443 deps = OPERATOR_TEST_DEPS,
8444)
8445
8446xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008447 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008448 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008449 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008450 "test/sigmoid-operator-tester.h",
8451 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008452 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008453)
8454
8455xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008456 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008457 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008458 "test/softmax-nc.cc",
8459 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008460 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008461 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008462)
8463
8464xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008465 name = "square_nc_test",
8466 srcs = [
8467 "test/square-nc.cc",
8468 "test/square-operator-tester.h",
8469 ],
8470 deps = OPERATOR_TEST_DEPS,
8471)
8472
8473xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008474 name = "square_root_nc_test",
8475 srcs = [
8476 "test/square-root-nc.cc",
8477 "test/square-root-operator-tester.h",
8478 ],
8479 deps = OPERATOR_TEST_DEPS,
8480)
8481
8482xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008483 name = "squared_difference_nd_test",
8484 srcs = [
8485 "test/binary-elementwise-operator-tester.h",
8486 "test/squared-difference-nd.cc",
8487 ],
8488 deps = OPERATOR_TEST_DEPS,
8489)
8490
8491xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008492 name = "subtract_nd_test",
8493 srcs = [
8494 "test/binary-elementwise-operator-tester.h",
8495 "test/subtract-nd.cc",
8496 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008497 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008498)
8499
8500xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008501 name = "truncation_nc_test",
8502 srcs = [
8503 "test/truncation-nc.cc",
8504 "test/truncation-operator-tester.h",
8505 ],
8506 deps = OPERATOR_TEST_DEPS,
8507)
8508
8509xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008510 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008511 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008512 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008513 "test/unpooling-operator-tester.h",
8514 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008515 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008516)
8517
Chao Mei6ddfc602020-05-13 22:29:36 -07008518############################### Misc unit tests ###############################
8519
8520xnnpack_unit_test(
8521 name = "memory_planner_test",
8522 srcs = [
8523 "test/memory-planner-test.cc",
8524 ],
8525 deps = [
8526 ":XNNPACK",
8527 ":memory_planner",
8528 ],
8529)
8530
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008531xnnpack_unit_test(
8532 name = "subgraph_nchw_test",
8533 srcs = [
8534 "src/xnnpack/subgraph.h",
8535 "test/subgraph-nchw.cc",
8536 "test/subgraph-tester.h",
8537 ],
8538 deps = [
8539 ":XNNPACK",
8540 ],
8541)
8542
Marat Dukhan08c4a432019-10-03 09:29:21 -07008543############################# Build configurations #############################
8544
Marat Dukhanb8642352019-10-30 15:43:02 -07008545# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008546config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008547 name = "xnn_enable_assembly_explicit_true",
8548 define_values = {"xnn_enable_assembly": "true"},
8549)
8550
8551# Disables usage of assembly kernels.
8552config_setting(
8553 name = "xnn_enable_assembly_explicit_false",
8554 define_values = {"xnn_enable_assembly": "false"},
8555)
8556
Marat Dukhan9de90e02020-06-18 16:04:12 -07008557# Enables usage of sparse inference.
8558config_setting(
8559 name = "xnn_enable_sparse_explicit_true",
8560 define_values = {"xnn_enable_sparse": "true"},
8561)
8562
8563# Disables usage of sparse inference.
8564config_setting(
8565 name = "xnn_enable_sparse_explicit_false",
8566 define_values = {"xnn_enable_sparse": "false"},
8567)
8568
Marat Dukhan05702cf2020-03-26 15:41:33 -07008569# Disables usage of HMP-aware optimizations.
8570config_setting(
8571 name = "xnn_enable_hmp_explicit_false",
8572 define_values = {"xnn_enable_hmp": "false"},
8573)
8574
Chao Mei6ddfc602020-05-13 22:29:36 -07008575# Enable usage of optimized memory allocation
8576config_setting(
8577 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008578 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008579)
8580
8581# Disable usage of optimized memory allocation
8582config_setting(
8583 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008584 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008585)
8586
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008587# Enable QS8 inference in TFLite-specific version
8588config_setting(
8589 name = "xnn_enable_qs8_explicit_true",
8590 define_values = {"xnn_enable_qs8": "true"},
8591)
8592
8593# Disable QS8 inference in TFLite-specific version
8594config_setting(
8595 name = "xnn_enable_qs8_explicit_false",
8596 define_values = {"xnn_enable_qs8": "false"},
8597)
8598
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008599# Enable QU8 inference in TFLite-specific version
8600config_setting(
8601 name = "xnn_enable_qu8_explicit_true",
8602 define_values = {"xnn_enable_qu8": "true"},
8603)
8604
8605# Disable QU8 inference in TFLite-specific version
8606config_setting(
8607 name = "xnn_enable_qu8_explicit_false",
8608 define_values = {"xnn_enable_qu8": "false"},
8609)
8610
Marat Dukhanb8642352019-10-30 15:43:02 -07008611# Builds with -c dbg
8612config_setting(
8613 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008614 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008615 "compilation_mode": "dbg",
8616 },
8617)
8618
8619# Builds with -c opt
8620config_setting(
8621 name = "optimized_build",
8622 values = {
8623 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008624 },
8625)
8626
8627config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008628 name = "linux_k8",
8629 values = {"cpu": "k8"},
8630)
8631
8632config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008633 name = "linux_arm",
8634 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008635)
8636
8637config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008638 name = "linux_armeabi",
8639 values = {"cpu": "armeabi"},
8640)
8641
8642config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008643 name = "linux_armhf",
8644 values = {"cpu": "armhf"},
8645)
8646
8647config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008648 name = "linux_armv7a",
8649 values = {"cpu": "armv7a"},
8650)
8651
8652config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008653 name = "linux_aarch64",
8654 values = {"cpu": "aarch64"},
8655)
8656
8657config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008658 name = "android",
8659 values = {"crosstool_top": "//external:android/crosstool"},
8660)
8661
8662config_setting(
8663 name = "android_armv7",
8664 values = {
8665 "crosstool_top": "//external:android/crosstool",
8666 "cpu": "armeabi-v7a",
8667 },
8668)
8669
8670config_setting(
8671 name = "android_arm64",
8672 values = {
8673 "crosstool_top": "//external:android/crosstool",
8674 "cpu": "arm64-v8a",
8675 },
8676)
8677
8678config_setting(
8679 name = "android_x86",
8680 values = {
8681 "crosstool_top": "//external:android/crosstool",
8682 "cpu": "x86",
8683 },
8684)
8685
8686config_setting(
8687 name = "android_x86_64",
8688 values = {
8689 "crosstool_top": "//external:android/crosstool",
8690 "cpu": "x86_64",
8691 },
8692)
8693
8694config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008695 name = "windows_x86_64",
8696 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008697)
8698
8699config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008700 name = "windows_x86_64_clang",
8701 values = {
8702 "compiler": "clang-cl",
8703 "cpu": "x64_windows",
8704 },
8705)
8706
8707config_setting(
8708 name = "windows_x86_64_mingw",
8709 values = {
8710 "compiler": "mingw-gcc",
8711 "cpu": "x64_windows",
8712 },
8713)
8714
8715config_setting(
8716 name = "windows_x86_64_msys",
8717 values = {
8718 "compiler": "msys-gcc",
8719 "cpu": "x64_windows",
8720 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008721)
8722
8723config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008724 name = "macos_x86_64",
8725 values = {
8726 "apple_platform_type": "macos",
8727 "cpu": "darwin",
8728 },
8729)
8730
8731config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008732 name = "macos_arm64",
8733 values = {
8734 "apple_platform_type": "macos",
8735 "cpu": "darwin_arm64",
8736 },
8737)
8738
8739config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008740 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008741 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008742)
8743
8744config_setting(
8745 name = "emscripten_wasm",
8746 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008747 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008748 "cpu": "wasm",
8749 },
8750)
8751
8752config_setting(
8753 name = "emscripten_wasmsimd",
8754 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008755 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008756 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008757 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008758 },
8759)
8760
8761config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008762 name = "ios_armv7",
8763 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008764 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008765 "cpu": "ios_armv7",
8766 },
8767)
8768
8769config_setting(
8770 name = "ios_arm64",
8771 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008772 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008773 "cpu": "ios_arm64",
8774 },
8775)
8776
8777config_setting(
8778 name = "ios_arm64e",
8779 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008780 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008781 "cpu": "ios_arm64e",
8782 },
8783)
8784
8785config_setting(
8786 name = "ios_x86",
8787 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008788 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008789 "cpu": "ios_i386",
8790 },
8791)
8792
8793config_setting(
8794 name = "ios_x86_64",
8795 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008796 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008797 "cpu": "ios_x86_64",
8798 },
8799)
8800
8801config_setting(
8802 name = "watchos_armv7k",
8803 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008804 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008805 "cpu": "watchos_armv7k",
8806 },
8807)
8808
8809config_setting(
8810 name = "watchos_arm64_32",
8811 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008812 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008813 "cpu": "watchos_arm64_32",
8814 },
8815)
8816
8817config_setting(
8818 name = "watchos_x86",
8819 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008820 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008821 "cpu": "watchos_i386",
8822 },
8823)
8824
8825config_setting(
8826 name = "watchos_x86_64",
8827 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008828 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008829 "cpu": "watchos_x86_64",
8830 },
8831)
8832
8833config_setting(
8834 name = "tvos_arm64",
8835 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008836 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008837 "cpu": "tvos_arm64",
8838 },
8839)
8840
8841config_setting(
8842 name = "tvos_x86_64",
8843 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008844 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008845 "cpu": "tvos_x86_64",
8846 },
8847)