blob: 56421dac92e485d3c76241e9cbe91856a6535ace [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
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473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
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484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
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498 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
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501 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
502 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
503 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
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509 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
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513 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
514 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
515 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
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517 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
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521 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
522 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
523 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
524 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
525 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
526 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
528 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
530 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
531 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
532 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
541 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700542 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
543 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700545 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
546 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
552 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
553 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700554 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
555 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
556 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700575 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700707]
708
Marat Dukhan436ebe62019-12-04 15:10:12 -0800709WASM_UKERNELS = [
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1628 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001629 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001630 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07001631 "src/qu8-vadd/gen/minmax-wasmsimd-x8.c",
1632 "src/qu8-vadd/gen/minmax-wasmsimd-x16.c",
1633 "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c",
1634 "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001635 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001636 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001637 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001638 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001639 "src/x32-zip/x2-wasmsimd.c",
1640 "src/x32-zip/x3-wasmsimd.c",
1641 "src/x32-zip/x4-wasmsimd.c",
1642 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001643]
1644
Marat Dukhan08c4a432019-10-03 09:29:21 -07001645# ISA-specific micro-kernels
1646NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001647 "src/f32-argmaxpool/4x-neon-c4.c",
1648 "src/f32-argmaxpool/9p8x-neon-c4.c",
1649 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001650 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1651 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001652 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001653 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001654 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001655 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001656 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001657 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001658 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001659 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001660 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001661 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001662 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001663 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001664 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001665 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001666 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1667 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1668 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1669 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1670 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001671 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001672 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001673 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1674 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1675 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001676 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001677 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001678 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1679 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1680 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1681 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1682 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001683 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1684 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1685 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001686 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001687 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001688 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1689 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1690 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001691 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1692 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1693 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1694 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001695 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001696 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1697 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001698 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001699 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001700 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001701 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001702 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1703 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001704 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1705 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1706 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1707 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1708 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1709 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1710 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1711 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001712 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001713 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001714 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001715 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1716 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001717 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001718 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1719 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001720 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001721 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1722 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1723 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1724 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1725 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001726 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1727 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001728 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1729 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001730 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1731 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001732 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1733 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1734 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1735 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1736 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1737 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1738 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1739 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1740 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1741 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1742 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1743 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1744 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1745 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1746 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1747 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001748 "src/f32-ibilinear-chw/gen/neon-p4.c",
1749 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001750 "src/f32-ibilinear/gen/neon-c4.c",
1751 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001752 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001753 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001754 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001755 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1756 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001757 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001758 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1759 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1760 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1761 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001762 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1763 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001764 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1765 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001766 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1767 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001768 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1769 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1770 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001771 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1772 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001773 "src/f32-prelu/gen/neon-1x4.c",
1774 "src/f32-prelu/gen/neon-1x8.c",
1775 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001776 "src/f32-prelu/gen/neon-2x4.c",
1777 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001778 "src/f32-prelu/gen/neon-2x16.c",
1779 "src/f32-prelu/gen/neon-4x4.c",
1780 "src/f32-prelu/gen/neon-4x8.c",
1781 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001782 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001783 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001784 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001785 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1786 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001787 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001788 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1789 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001790 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001791 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1792 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001793 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1794 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1795 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1796 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1797 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1798 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1799 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1800 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1801 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1802 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1803 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1804 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1805 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001806 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001807 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1808 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1809 "src/f32-spmm/gen/4x1-minmax-neon.c",
1810 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1811 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1812 "src/f32-spmm/gen/8x1-minmax-neon.c",
1813 "src/f32-spmm/gen/12x1-minmax-neon.c",
1814 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1815 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1816 "src/f32-spmm/gen/16x1-minmax-neon.c",
1817 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1818 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1819 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001820 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1821 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1822 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1823 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001824 "src/f32-vbinary/gen/vmax-neon-x4.c",
1825 "src/f32-vbinary/gen/vmax-neon-x8.c",
1826 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1827 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1828 "src/f32-vbinary/gen/vmin-neon-x4.c",
1829 "src/f32-vbinary/gen/vmin-neon-x8.c",
1830 "src/f32-vbinary/gen/vminc-neon-x4.c",
1831 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001832 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1833 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1834 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1835 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1836 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1837 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001838 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1839 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1840 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1841 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001842 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1843 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1844 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1845 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001846 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1847 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001848 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1849 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1850 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1851 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1852 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1853 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1854 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1855 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1856 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1857 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1858 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1859 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001860 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1861 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1862 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001863 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1864 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001865 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1866 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001867 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1868 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001869 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1870 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001871 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1872 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1873 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1874 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1875 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1876 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001877 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1878 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1879 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1880 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1881 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1882 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1883 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1884 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1885 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1886 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1887 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1888 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1889 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1890 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1891 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1892 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1893 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1894 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001895 "src/f32-vunary/gen/vabs-neon-x4.c",
1896 "src/f32-vunary/gen/vabs-neon-x8.c",
1897 "src/f32-vunary/gen/vneg-neon-x4.c",
1898 "src/f32-vunary/gen/vneg-neon-x8.c",
1899 "src/f32-vunary/gen/vsqr-neon-x4.c",
1900 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001901 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1902 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001903 "src/math/roundd-neon-addsub.c",
1904 "src/math/roundd-neon-cvt.c",
1905 "src/math/roundne-neon-addsub.c",
1906 "src/math/roundu-neon-addsub.c",
1907 "src/math/roundu-neon-cvt.c",
1908 "src/math/roundz-neon-addsub.c",
1909 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001910 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1911 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1912 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1913 "src/math/sqrt-neon-nr1rsqrts.c",
1914 "src/math/sqrt-neon-nr2rsqrts.c",
1915 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001916 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001917 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001918 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001919 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001920 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001921 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001922 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001923 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1924 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1925 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1926 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1927 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001928 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001929 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1930 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001931 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001932 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1933 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001934 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001935 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1936 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001937 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001938 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1939 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001940 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001941 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001942 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001943 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001944 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001945 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001946 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001947 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001948 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001949 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001950 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001951 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001952 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001953 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001954 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001955 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001956 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001957 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001958 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001959 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001960 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001961 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001962 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001963 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001964 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1965 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1966 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1967 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001968 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1969 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1970 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1971 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001972 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1973 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1974 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001975 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001976 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1977 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07001978 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001979 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001980 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001981 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07001982 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001983 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001984 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001985 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1986 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1987 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07001988 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
1989 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001990 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1991 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1992 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1993 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1994 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1995 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1996 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1997 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001998 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001999 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2000 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002001 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07002002 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002003 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002004 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002005 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002006 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2007 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2008 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2009 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2010 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2011 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2012 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2013 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2014 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2015 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2016 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2017 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2018 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2019 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2020 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2021 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2022 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2023 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2024 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2025 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2026 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2027 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2028 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2029 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2030 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2031 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2032 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2033 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2034 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2035 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2036 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2037 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2038 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002039 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002040 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2041 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2042 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002043 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2044 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002045 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2046 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2047 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2048 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2049 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2050 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2051 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2052 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2053 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
2054 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2055 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2056 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002057 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002058 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2059 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002060 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002061 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002062 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002063 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002064 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002065 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002066 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002067 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2068 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2069 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002070 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2071 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002072 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2073 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2074 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2075 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2076 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2077 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2078 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2079 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002080 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002081 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2082 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002083 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002084 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002085 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002086 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002087 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002088 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2089 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2090 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2091 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2092 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2093 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2094 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2095 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2096 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2097 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2098 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2099 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2100 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2101 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2102 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2103 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2104 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2105 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2106 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2107 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2108 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2109 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2110 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2111 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2112 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2113 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2114 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2115 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2116 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2117 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2118 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2119 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2120 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002121 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002122 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2123 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2124 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002125 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2126 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002127 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2128 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2129 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2130 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2131 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2132 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2133 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2134 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2135 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002136 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002137 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002138 "src/qs8-requantization/rndna-neon.c",
Marat Dukhand3d818c2021-07-16 17:56:54 -07002139 "src/qs8-requantization/rndnu-neon-mull.c",
2140 "src/qs8-requantization/rndnu-neon-qdmulh.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002141 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2142 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2143 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2144 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2145 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2146 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2147 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2148 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002149 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2150 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002151 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
2152 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
2153 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
2154 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
2155 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
2156 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
2157 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
2158 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002159 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2160 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002161 "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2162 "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002163 "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2164 "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002165 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002166 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002167 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07002168 "src/qu8-vadd/gen/minmax-neon-ld64-x8.c",
2169 "src/qu8-vadd/gen/minmax-neon-ld64-x16.c",
2170 "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c",
2171 "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002172 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002173 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002174 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002175 "src/x8-zip/x2-neon.c",
2176 "src/x8-zip/x3-neon.c",
2177 "src/x8-zip/x4-neon.c",
2178 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002179 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002180 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002181 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002182 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002183 "src/x32-zip/x2-neon.c",
2184 "src/x32-zip/x3-neon.c",
2185 "src/x32-zip/x4-neon.c",
2186 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002187]
2188
2189NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002190 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2191 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2192 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2193 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2194 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2195 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2196 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2197 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2198 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2199 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2200 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2201 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2202 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2203 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2204 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2205 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2206 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2207 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2208 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2209 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2210 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2211 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2212 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2213 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2214 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2215 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2216 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2217 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2218 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2219 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002220 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2221 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002222 "src/f32-ibilinear/gen/neonfma-c4.c",
2223 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002224 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002225 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002226 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002227 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2228 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002229 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2230 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002231 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2232 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002233 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2234 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002235 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002236 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002237 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002238 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2239 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002240 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002241 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2242 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002243 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002244 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2245 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002246 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2247 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2248 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2249 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2250 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2251 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2252 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2253 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2254 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2255 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2256 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2257 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2258 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002259 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2260 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2261 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2262 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2263 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2264 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2265 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2266 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2267 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2268 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2269 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2270 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2271 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002272 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2273 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2274 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2275 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2276 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2277 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2278 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2279 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2280 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2281 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2282 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2283 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002284 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2285 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002286 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2287 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2288 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2289 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2290 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2291 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2292 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2293 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2294 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2295 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2296 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2297 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2298 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2299 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2300 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2301 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2302 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2303 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2304 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2305 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2306 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2307 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2308 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2309 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2310 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2311 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2312 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2313 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2314 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2315 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2316 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2317 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2318 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2319 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2320 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2321 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2322 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2323 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2324 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2325 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2326 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2327 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2328 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2329 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2330 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2331 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2332 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2333 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2334 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2335 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2336 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2337 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2338 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2339 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002340 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2341 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2342 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2343 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2344 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2345 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2346 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2347 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2348 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2349 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2350 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2351 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2352 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2353 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2354 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2355 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2356 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2357 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2358 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2359 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002360 "src/math/exp-neonfma-rr2-lut64-p2.c",
2361 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002362 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2363 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002364 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2365 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2366 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002367 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2368 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2369 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002370 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2371 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2372 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002373 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2374 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2375 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002376 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2377 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2378 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002379 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2380 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2381 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002382 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2383 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2384 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002385 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002386 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002387 "src/math/sqrt-neonfma-nr2fma.c",
2388 "src/math/sqrt-neonfma-nr2fma1adj.c",
2389 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002390]
2391
2392AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002393 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002394 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002395 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002396 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002397 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002398 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002399 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002400 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002401 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002402 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2403 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
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Marat Dukhan1268a242020-10-24 00:36:32 -07002405 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002406 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002407 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2410 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2411 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002412 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
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2414 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002415 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002416 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002417 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2418 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2419 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002420 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2421 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2422 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2423 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002424 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002425 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2426 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002427 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002428 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002429 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002430 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002431 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2432 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002433 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2434 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2435 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2436 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2437 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2438 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2439 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2440 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002441 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002442 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002443 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2444 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2445 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2446 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2447 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2448 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2449 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2450 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2451 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2452 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2453 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2454 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2455 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2456 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2457 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2458 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2459 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2460 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2461 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2462 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002463 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2464 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002465 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2466 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002467 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2468 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002469 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2470 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002471 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2472 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002473 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2474 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2475 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2476 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2477 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2478 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002479 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2480 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2481 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2482 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2483 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2484 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2485 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2486 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2487 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2488 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2489 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2490 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2491 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2492 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2493 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2494 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2495 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2496 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002497 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002499 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002501 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002502 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002503 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002504 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002505]
2506
Marat Dukhan8853b822020-05-07 12:19:01 -07002507NEONV8_UKERNELS = [
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2512 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
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2514 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2515 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002516 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002517 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002518 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002519 "src/math/roundz-neonv8.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07002520 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002521 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
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Marat Dukhan4ba70b72021-07-19 11:20:16 -07002526 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002535 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002536 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002538 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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2540 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002541 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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2545 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2546 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2547 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2548 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2549 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2550 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2551 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002552 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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2554 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002555 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002558 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002559 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002561 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002562 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2563 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002564 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2565 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2566 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2567 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2568 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2569 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2570 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2571 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002572 "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2573 "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
2574 "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2575 "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002576]
2577
Marat Dukhan08c4a432019-10-03 09:29:21 -07002578AARCH64_NEONFP16ARITH_UKERNELS = [
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2581 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2582 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002583 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
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Benoit Jacoba9644732020-08-13 12:48:55 -07002665NEONDOT_UKERNELS = [
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Marat Dukhan99936602020-04-11 16:47:01 -07002783 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2784 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002785 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2786 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2787 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002788 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2789 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2790 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002791 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2792 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2793 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002794 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2795 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2796 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002797 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2798 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2799 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002800 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2801 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2802 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002803 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2804 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2805 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2806 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002807 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2808 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2809 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002810 "src/f32-ibilinear-chw/gen/sse-p4.c",
2811 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002812 "src/f32-ibilinear/gen/sse-c4.c",
2813 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002814 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2815 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2816 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002817 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2818 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2819 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002820 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2821 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2822 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2823 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002824 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2825 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2826 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002827 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2828 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2829 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002830 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002831 "src/f32-prelu/gen/sse-2x4.c",
2832 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002833 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002834 "src/f32-spmm/gen/4x1-minmax-sse.c",
2835 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002836 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002837 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002838 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2839 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2840 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2841 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2842 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2843 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2844 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2845 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002846 "src/f32-vbinary/gen/vmax-sse-x4.c",
2847 "src/f32-vbinary/gen/vmax-sse-x8.c",
2848 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2849 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2850 "src/f32-vbinary/gen/vmin-sse-x4.c",
2851 "src/f32-vbinary/gen/vmin-sse-x8.c",
2852 "src/f32-vbinary/gen/vminc-sse-x4.c",
2853 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002854 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2855 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2856 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2857 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2858 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2859 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2860 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2861 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002862 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2863 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2864 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2865 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002866 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2867 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2868 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2869 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002870 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2871 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002872 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2873 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002874 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2875 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002876 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2877 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002878 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2879 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002880 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2881 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002882 "src/f32-vunary/gen/vabs-sse-x4.c",
2883 "src/f32-vunary/gen/vabs-sse-x8.c",
2884 "src/f32-vunary/gen/vneg-sse-x4.c",
2885 "src/f32-vunary/gen/vneg-sse-x8.c",
2886 "src/f32-vunary/gen/vsqr-sse-x4.c",
2887 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002888 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002889 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002890 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002891 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002892 "src/math/sqrt-sse-hh1mac.c",
2893 "src/math/sqrt-sse-nr1mac.c",
2894 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002895 "src/x32-fill/sse.c",
2896 "src/x32-packx/x4-sse.c",
2897 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002898]
2899
2900SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002901 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002902 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002903 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002904 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2905 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2906 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2907 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2908 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2909 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2910 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2911 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2912 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2913 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2914 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2915 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002916 "src/f32-prelu/gen/sse2-2x4.c",
2917 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002918 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002919 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002920 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002921 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2922 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002923 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002924 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2925 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002926 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002927 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2928 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002929 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002930 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2931 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2932 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2933 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2934 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2935 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2936 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2937 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2938 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2939 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2940 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2941 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002942 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2943 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002944 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2945 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002946 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2947 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2948 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2949 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2950 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2951 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002952 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2953 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2954 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2955 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2956 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2957 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2958 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2959 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2960 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2961 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2962 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2963 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002964 "src/math/exp-sse2-rr2-lut64-p2.c",
2965 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002966 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002967 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002968 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002969 "src/math/roundd-sse2-cvt.c",
2970 "src/math/roundne-sse2-cvt.c",
2971 "src/math/roundu-sse2-cvt.c",
2972 "src/math/roundz-sse2-cvt.c",
2973 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2974 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2975 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2976 "src/math/sigmoid-sse2-rr2-p5-div.c",
2977 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2978 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002979 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2980 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2981 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2982 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2983 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2984 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002985 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002986 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002987 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002988 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002989 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002990 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002991 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002992 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002993 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002994 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002995 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002996 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002997 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002998 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002999 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003000 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
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3019 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
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Marat Dukhan159688f2020-08-06 10:34:29 -07003025 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003048 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003049 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003050 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003051 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003055 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003057 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003061 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003063 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003068 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
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Marat Dukhanf62bbdc2020-08-04 13:59:04 -07003070 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003071 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003072 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003073 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07003077 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07003081 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
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Marat Dukhanf0f28812021-07-08 22:34:20 -07003083 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
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Marat Dukhancdbe9a32021-07-01 23:52:04 -07003097 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003098 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07003121 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003122 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003123 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07003124 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07003129 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003130 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003131 "src/x8-zip/x2-sse2.c",
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Marat Dukhan57dccd82020-04-14 00:53:10 -07003135 "src/x32-unpool/sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07003140]
3141
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003172 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003173 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003174 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003175 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003176 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003177 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003178 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003179 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003180 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003181 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003182 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003183 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003184 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003185 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003186 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003187 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003188 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003189 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003190 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3191 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
3192 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3193 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003194 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003195 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003196]
3197
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003198SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08003199 "src/f32-prelu/gen/sse41-2x4.c",
3200 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003201 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
3202 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
3203 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
3204 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
3205 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
3206 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
3207 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
3208 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
3209 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
3210 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
3211 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
3212 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003213 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
3214 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003215 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
3216 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003217 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
3218 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
3219 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
3220 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
3221 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
3222 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003223 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
3224 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
3225 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
3226 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
3227 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
3228 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
3229 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
3230 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
3231 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
3232 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
3233 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
3234 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003235 "src/math/roundd-sse41.c",
3236 "src/math/roundne-sse41.c",
3237 "src/math/roundu-sse41.c",
3238 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003239 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3240 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3241 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3242 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3243 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3244 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3245 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3246 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3247 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3248 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3249 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3250 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003251 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003252 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003253 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003254 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003255 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003256 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003257 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003258 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003259 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003260 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003261 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003262 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003263 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003264 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003265 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003266 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003267 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003268 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003269 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003270 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003271 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003272 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003273 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003274 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003275 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003276 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003277 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003278 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003279 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3280 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3281 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
3282 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003283 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3284 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3285 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
3286 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3287 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3288 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3289 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3290 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3291 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3292 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3293 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3294 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3295 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3296 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3297 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
3298 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3299 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3300 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3301 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3302 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003303 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3304 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3305 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003306 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
3307 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
3308 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003309 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003310 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003311 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003312 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003313 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003314 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003315 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003316 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003317 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003318 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003319 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003320 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003321 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003322 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003323 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003324 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003325 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003326 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003327 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003328 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003329 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003330 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003331 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003332 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003333 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003334 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003335 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003336 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003337 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003338 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003339 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003340 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003341 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003342 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003343 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003344 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003345 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003346 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003347 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003348 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003349 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003350 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003351 "src/qs8-requantization/rndnu-sse4-sra.c",
3352 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003353 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3354 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3355 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3356 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003357 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3358 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3359 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3360 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003361 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3362 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3363 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3364 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003365 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3366 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3367 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3368 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003369 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003370 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003371 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003372 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003373 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003374 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003375 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003376 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003377 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3378 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3379 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3380 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3381 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3382 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3383 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3384 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003385 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003386 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3387 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3388 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3389 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3390 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3391 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003392 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003393 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3394 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3395 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3396 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3397 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3398 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3399 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3400 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003401 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003402 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3403 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3404 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3405 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3406 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3407 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003408 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003409 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003410 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003411]
3412
Marat Dukhan08c4a432019-10-03 09:29:21 -07003413AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003414 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3415 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003416 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3417 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003418 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3419 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003420 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3421 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3422 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3423 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3424 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3425 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003426 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003427 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3428 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003429 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003430 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003431 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003432 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003433 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3434 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3435 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3436 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3437 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3438 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3439 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3440 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3441 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3442 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3443 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003444 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003445 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3446 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003447 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003448 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003449 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003450 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003451 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3452 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003453 "src/f32-prelu/gen/avx-2x8.c",
3454 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003455 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003456 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3457 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3458 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3459 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3460 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3461 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3462 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3463 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003464 "src/f32-vbinary/gen/vmax-avx-x8.c",
3465 "src/f32-vbinary/gen/vmax-avx-x16.c",
3466 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3467 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3468 "src/f32-vbinary/gen/vmin-avx-x8.c",
3469 "src/f32-vbinary/gen/vmin-avx-x16.c",
3470 "src/f32-vbinary/gen/vminc-avx-x8.c",
3471 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003472 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3473 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3474 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3475 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3476 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3477 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3478 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3479 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003480 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3481 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3482 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3483 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003484 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3485 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3486 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3487 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003488 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3489 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003490 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3491 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3492 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3493 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3494 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3495 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3496 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3497 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3498 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3499 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3500 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3501 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3502 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3503 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3504 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3505 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3506 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3507 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003508 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3509 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003510 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3511 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003512 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3513 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003514 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3515 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003516 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3517 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3518 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3519 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3520 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3521 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003522 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003523 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3524 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3525 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3526 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3527 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3528 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3529 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3530 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3531 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3532 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3533 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3534 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3535 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3536 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3537 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3538 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3539 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3540 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3541 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3542 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003543 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3544 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003545 "src/f32-vunary/gen/vabs-avx-x8.c",
3546 "src/f32-vunary/gen/vabs-avx-x16.c",
3547 "src/f32-vunary/gen/vneg-avx-x8.c",
3548 "src/f32-vunary/gen/vneg-avx-x16.c",
3549 "src/f32-vunary/gen/vsqr-avx-x8.c",
3550 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003551 "src/math/exp-avx-rr2-p5.c",
3552 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3553 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3554 "src/math/expm1minus-avx-rr2-p6.c",
3555 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3556 "src/math/sigmoid-avx-rr2-p5-div.c",
3557 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3558 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003559 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3560 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3561 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3562 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3563 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3564 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3565 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3566 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3567 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3568 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3569 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3570 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003571 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003572 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003573 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003574 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003575 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003576 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003577 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003578 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003579 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003580 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003581 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003582 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003583 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003584 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003585 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003586 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003587 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003588 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003589 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003590 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003591 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003592 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003593 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003594 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003595 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003596 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003597 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003598 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003599 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3600 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3601 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3602 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003603 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3604 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3605 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3606 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3607 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3608 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3609 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3610 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3611 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3612 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3613 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3614 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3615 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3616 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3617 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3618 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3619 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3620 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3621 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3622 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003623 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003624 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003625 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003626 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003627 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003628 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003629 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003630 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003631 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003632 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003633 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003634 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003635 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003636 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003637 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003638 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003639 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003640 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003641 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003642 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003643 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003644 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003645 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003646 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003647 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003648 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003649 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003650 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003651 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003652 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003653 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003654 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003655 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003656 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003657 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003658 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3659 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3660 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3661 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3662 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3663 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3664 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3665 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3666 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3667 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3668 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3669 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3670 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3671 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3672 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3673 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003674 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003675 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003676 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003677 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003678 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003679 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003680 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003681 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003682 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3683 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3684 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3685 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3686 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3687 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3688 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3689 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3690 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3691 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3692 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3693 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3694 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3695 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3696 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3697 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3698 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3699 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3700 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3701 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3702 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3703 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3704 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3705 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3706 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3707 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3708 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3709 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003710]
3711
Marat Dukhan1566fee2020-08-02 21:55:41 -07003712XOP_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07003713 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3714 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3715 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3716 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3717 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3718 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003719 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003720 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003721 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003722 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003723 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003724 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003725 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003726 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003727 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003728 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003729 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003730 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003731 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003732 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003733 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003734 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003738 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003742 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003743 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003744 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003745 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003746 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003747 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003749 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
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3751 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3752 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3753 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
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3755 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3756 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3757 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003760 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003761 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003763 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003764 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003766 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003767 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003768 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003769 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003770 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003771 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003772 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003773 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003775 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003777 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003783 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003787 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003788 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003790 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
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3796 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3797 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3798 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3799 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
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Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003802 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
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3804 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3805 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003806 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
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3809 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3810 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3811 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3812 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3813 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3814 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3815 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3816 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3817 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3818 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3819 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3820 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
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3824 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3825 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3826 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3827 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3828 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3829 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3830 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3831 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3832 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
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Marat Dukhan1566fee2020-08-02 21:55:41 -07003834]
3835
Marat Dukhanfda12b82019-11-21 12:27:59 -08003836FMA3_UKERNELS = [
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Frank Barchard04336c12020-10-22 16:48:55 -07003921 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003922 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003923 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003924 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3925 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003926 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003927 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3928 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3929 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003930 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003931 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3932 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003933 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003934 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003935 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003936 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3937 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003938 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003939 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3940 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3941 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003942 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003943 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3944 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3945 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3946 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3947 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3948 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3949 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3950 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3951 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3952 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3953 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3954 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3955 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3956 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3957 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3958 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3959 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3960 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3961 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3962 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3963 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3964 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3965 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3966 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3967 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3968 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3969 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3970 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3971 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3972 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3973 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3974 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3975 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3976 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3977 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3978 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3979 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3980 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3981 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3982 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003983 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3984 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3985 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3986 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3987 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3988 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3989 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3990 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3991 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3992 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3993 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3994 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3995 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3996 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3997 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3998 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3999 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
4000 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
4001 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
4002 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
4003 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
4004 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
4005 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
4006 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004007 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
4008 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
4009 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
4010 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
4011 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
4012 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
4013 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
4014 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
4015 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
4016 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
4017 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
4018 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
4019 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
4020 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
4021 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
4022 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
4023 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
4024 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
4025 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
4026 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
4027 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
4028 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
4029 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
4030 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
4031 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
4032 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
4033 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
4034 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
4035 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
4036 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004037 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
4038 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
4039 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004040 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
4041 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
4042 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
4043 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08004044 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004045 "src/math/extexp-avx2-p5.c",
4046 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
4047 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
4048 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
4049 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
4050 "src/math/sigmoid-avx2-rr1-p5-div.c",
4051 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
4052 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
4053 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
4054 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
4055 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
4056 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
4057 "src/math/sigmoid-avx2-rr2-p5-div.c",
4058 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
4059 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07004060 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4061 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4062 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
4063 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4064 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
4065 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4066 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
4067 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
4068 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
4069 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4070 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
4071 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004072 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4073 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
4074 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4075 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
4076 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4077 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07004078 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4079 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4080 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004081 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004082 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004083 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004084 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004085 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004086 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004087 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
4088 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004089 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004090 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004091 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
4092 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004093 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004094 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004095 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004096 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004097 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004098 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004099 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
4100 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004101 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004102 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004103 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
4104 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004105 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004106 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004107 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004108 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004109 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004110 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004111 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004112 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004113 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004114 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004115 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004116 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004117 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004118 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004119 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004120 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004121 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004122 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07004123 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4124 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4125 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
4126 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
4127 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4128 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
4129 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
4130 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07004131 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4132 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4133 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4134 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4135 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4136 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004137 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4138 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4139 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4140 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4141 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4142 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004143]
4144
Marat Dukhan08c4a432019-10-03 09:29:21 -07004145AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004146 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4147 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004148 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4149 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004150 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4151 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004152 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
4153 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
4154 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4155 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4156 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4157 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004158 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4159 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4160 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4161 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4162 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4163 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004164 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4165 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4166 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4167 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4168 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4169 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004170 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4171 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4172 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4173 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4174 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4175 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004176 "src/f32-prelu/gen/avx512f-2x16.c",
4177 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004178 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4179 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004180 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004181 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004182 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004183 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4184 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004185 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004186 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4187 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4188 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004189 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004190 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4191 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004192 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004193 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004194 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004195 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4196 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004197 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004198 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4199 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4200 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004201 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004202 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4203 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004204 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004205 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004206 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004207 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4208 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004209 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004210 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4211 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4212 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004213 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004214 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004215 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4216 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4217 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4218 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4219 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4220 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4221 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4222 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004223 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4224 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4225 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4226 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4227 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4228 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4229 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4230 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004231 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4232 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4233 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4234 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4235 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4236 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4237 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4238 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004239 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4240 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4241 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4242 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004243 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4244 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4245 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4246 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004247 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4248 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004249 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4250 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4251 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4252 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4253 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4254 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4255 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4256 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4257 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4258 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4259 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4260 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4261 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4262 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4263 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4264 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004265 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4266 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004267 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4268 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004269 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4270 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004271 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4272 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4273 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4274 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4275 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4276 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4277 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4278 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004279 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004280 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4281 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4282 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4283 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4284 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4285 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4286 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4287 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4288 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4289 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4290 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4291 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4292 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4293 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4294 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4295 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4296 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4297 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4298 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4299 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4300 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4301 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4302 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4303 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004304 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4305 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4306 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4307 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4308 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4309 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4310 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4311 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4312 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4313 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4314 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4315 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4316 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4317 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4318 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4319 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4320 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4321 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4322 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4323 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4324 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4325 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4326 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4327 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4328 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4329 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4330 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4331 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4332 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4333 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4334 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4335 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4336 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4337 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4338 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4339 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4340 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4341 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4342 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4343 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4344 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4345 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4346 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4347 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4348 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4349 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4350 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4351 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004352 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4353 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4354 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4355 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4356 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4357 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4358 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4359 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004360 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4361 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4362 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4363 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4364 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4365 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004366 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4367 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4368 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4369 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4370 "src/math/exp-avx512f-rr2-p5-scalef.c",
4371 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004372 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4373 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004374 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004375 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004376 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004377 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004378 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004379 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004380 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004381 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004382 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004383 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4384 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4385 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4386 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4387 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4388 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4389 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4390 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4391 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4392 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004393 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004394 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004395 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4396 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4397 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4398 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004399 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004400 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004401 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004402]
4403
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004404AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004405 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4406 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4407 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4408 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004409 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4410 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4411 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4412 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4413 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4414 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4415 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4416 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004417 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004418 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004419 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004420 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004421 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004422 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004423 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004424 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004425 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004426 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004427 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004428 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004429 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004430 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004431 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004432 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004433 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004434 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004435 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004436 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004437 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004438 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004439 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004440 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhancfd606b2021-07-09 01:18:45 -07004441 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4442 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4443 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4444 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004445 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4446 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4447 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4448 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4449 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4450 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4451 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4452 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004453]
4454
Frank Barchardbcedc082020-08-17 18:00:51 -07004455WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004456 "src/f32-vrelu/wasm_shr_x1.S",
4457 "src/f32-vrelu/wasm_shr_x2.S",
4458 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004459]
4460
Marat Dukhan08c4a432019-10-03 09:29:21 -07004461AARCH32_ASM_UKERNELS = [
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Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004463 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004464 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4465 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004466 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004467 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004468 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004469 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004470 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4471 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004472 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4473 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4474 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4475 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004476]
4477
4478AARCH64_ASM_UKERNELS = [
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Frank Barchard80fc5f42021-06-07 10:43:16 -07004484 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004485 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004486 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
4487 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004488 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
4489 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
4490 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
4491 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
4492 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004493 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004494 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004495 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
4496 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004497 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
4498 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
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4650 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004651 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4652 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4653 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4654 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004655 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4656 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4657 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4658 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004659 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4660 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4661 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4662 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004663 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4664 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4665 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4666 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004667 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4668 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4669 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4670 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004671 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004672 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004673 "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004674 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4675 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004676 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4677 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004678 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
4679 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004680 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4681 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4682 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004683 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4684 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004685 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004686 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4687 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004688 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004689]
4690
Marat Dukhan1b354632020-03-23 12:50:22 -07004691INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004692 "src/xnnpack/argmaxpool.h",
4693 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004694 "src/xnnpack/common.h",
4695 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004696 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004697 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004698 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004699 "src/xnnpack/gavgpool.h",
4700 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004701 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004702 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004703 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004704 "src/xnnpack/lut.h",
4705 "src/xnnpack/math.h",
4706 "src/xnnpack/maxpool.h",
4707 "src/xnnpack/packx.h",
4708 "src/xnnpack/pad.h",
4709 "src/xnnpack/params.h",
4710 "src/xnnpack/pavgpool.h",
4711 "src/xnnpack/ppmm.h",
4712 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004713 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004714 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004715 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004716 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004717 "src/xnnpack/spmm.h",
4718 "src/xnnpack/unpool.h",
4719 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004720 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004721 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004722 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004723 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004724 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004725 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004726 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004727]
4728
4729INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004730 "include/xnnpack.h",
4731 "src/xnnpack/allocator.h",
4732 "src/xnnpack/compute.h",
4733 "src/xnnpack/im2col.h",
4734 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004735 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004736 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004737 "src/xnnpack/operator.h",
4738 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004739 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004740 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004741 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004742 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004743]
4744
Marat Dukhan1b354632020-03-23 12:50:22 -07004745ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004746 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004747]
4748
Marat Dukhan1b354632020-03-23 12:50:22 -07004749MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004750 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004751 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004752]
4753
Marat Dukhan1b354632020-03-23 12:50:22 -07004754MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004755 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004756 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004757 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004758 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004759]
4760
4761OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004762 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004763 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004764]
4765
4766WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004767 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004768 "src/xnnpack/operator.h",
4769 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004770]
4771
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004772LOGGING_COPTS = select({
4773 # No logging in optimized mode
4774 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4775 # Full logging in debug mode
4776 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4777 # Error-only logging in default (fastbuild) mode
4778 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4779})
4780
Marat Dukhan3b59de22020-06-03 20:15:19 -07004781LOGGING_SRCS = select({
4782 # No logging in optimized mode
4783 ":optimized_build": [],
4784 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004785 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004786 "src/operator-strings.c",
4787 "src/subgraph-strings.c",
4788 ],
4789})
4790
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004791LOGGING_HDRS = [
4792 "src/xnnpack/log.h",
4793]
4794
Marat Dukhan08c4a432019-10-03 09:29:21 -07004795xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004796 name = "tables",
4797 srcs = TABLE_SRCS,
4798 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004799 gcc_copts = xnnpack_gcc_std_copts(),
4800 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004801)
4802
4803xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004804 name = "scalar_ukernels",
4805 srcs = SCALAR_UKERNELS,
4806 hdrs = INTERNAL_HDRS,
4807 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004808 gcc_copts = xnnpack_gcc_std_copts(),
4809 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004810 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004811 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004812 "@FP16",
4813 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004814 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004815 ],
4816)
4817
4818xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004819 name = "scalar_ukernels_test_mode",
4820 srcs = SCALAR_UKERNELS,
4821 hdrs = INTERNAL_HDRS,
4822 aarch32_copts = ["-marm"],
4823 copts = [
4824 "-UNDEBUG",
4825 "-DXNN_TEST_MODE=1",
4826 ],
4827 gcc_copts = xnnpack_gcc_std_copts(),
4828 msvc_copts = xnnpack_msvc_std_copts(),
4829 deps = [
4830 ":tables",
4831 "@FP16",
4832 "@FXdiv",
4833 "@pthreadpool",
4834 ],
4835)
4836
4837xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004838 name = "wasm_ukernels",
4839 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004840 gcc_copts = xnnpack_gcc_std_copts(),
4841 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004842 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004843 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004844 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004845 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004846 "@FP16",
4847 "@FXdiv",
4848 "@pthreadpool",
4849 ],
4850)
4851
4852xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004853 name = "wasm_ukernels_test_mode",
4854 hdrs = INTERNAL_HDRS,
4855 copts = [
4856 "-UNDEBUG",
4857 "-DXNN_TEST_MODE=1",
4858 ],
4859 gcc_copts = xnnpack_gcc_std_copts(),
4860 msvc_copts = xnnpack_msvc_std_copts(),
4861 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004862 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004863 deps = [
4864 ":tables",
4865 "@FP16",
4866 "@FXdiv",
4867 "@pthreadpool",
4868 ],
4869)
4870
4871xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004872 name = "neon_ukernels",
4873 hdrs = INTERNAL_HDRS,
4874 aarch32_copts = [
4875 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004876 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004877 "-mfpu=neon",
4878 ],
4879 aarch32_srcs = NEON_UKERNELS,
4880 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004881 gcc_copts = xnnpack_gcc_std_copts(),
4882 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004883 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004884 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004885 "@FP16",
4886 "@pthreadpool",
4887 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004888)
4889
4890xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004891 name = "neon_ukernels_test_mode",
4892 hdrs = INTERNAL_HDRS,
4893 aarch32_copts = [
4894 "-marm",
4895 "-march=armv7-a",
4896 "-mfpu=neon",
4897 ],
4898 aarch32_srcs = NEON_UKERNELS,
4899 aarch64_srcs = NEON_UKERNELS,
4900 copts = [
4901 "-UNDEBUG",
4902 "-DXNN_TEST_MODE=1",
4903 ],
4904 gcc_copts = xnnpack_gcc_std_copts(),
4905 msvc_copts = xnnpack_msvc_std_copts(),
4906 deps = [
4907 ":tables",
4908 "@FP16",
4909 "@pthreadpool",
4910 ],
4911)
4912
4913xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004914 name = "neonfma_ukernels",
4915 hdrs = INTERNAL_HDRS,
4916 aarch32_copts = [
4917 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004918 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004919 "-mfpu=neon-vfpv4",
4920 ],
4921 aarch32_srcs = NEONFMA_UKERNELS,
4922 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004923 apple_aarch32_copts = [
4924 "-mcpu=swift",
4925 "-mtune=generic",
4926 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004927 gcc_copts = xnnpack_gcc_std_copts(),
4928 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004929 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004930 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004931 "@FP16",
4932 "@pthreadpool",
4933 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004934)
4935
4936xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004937 name = "neonfma_ukernels_test_mode",
4938 hdrs = INTERNAL_HDRS,
4939 aarch32_copts = [
4940 "-marm",
4941 "-march=armv7-a",
4942 "-mfpu=neon-vfpv4",
4943 ],
4944 aarch32_srcs = NEONFMA_UKERNELS,
4945 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004946 apple_aarch32_copts = [
4947 "-mcpu=swift",
4948 "-mtune=generic",
4949 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004950 copts = [
4951 "-UNDEBUG",
4952 "-DXNN_TEST_MODE=1",
4953 ],
4954 gcc_copts = xnnpack_gcc_std_copts(),
4955 msvc_copts = xnnpack_msvc_std_copts(),
4956 deps = [
4957 ":tables",
4958 "@FP16",
4959 "@pthreadpool",
4960 ],
4961)
4962
4963xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004964 name = "neonv8_ukernels",
4965 hdrs = INTERNAL_HDRS,
4966 aarch32_copts = [
4967 "-marm",
4968 "-march=armv8-a",
4969 "-mfpu=neon-fp-armv8",
4970 ],
4971 aarch32_srcs = NEONV8_UKERNELS,
4972 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004973 apple_aarch32_copts = [
4974 "-mcpu=cyclone",
4975 "-mtune=generic",
4976 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004977 gcc_copts = xnnpack_gcc_std_copts(),
4978 msvc_copts = xnnpack_msvc_std_copts(),
4979 deps = [
4980 ":tables",
4981 "@FP16",
4982 "@pthreadpool",
4983 ],
4984)
4985
4986xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004987 name = "neonv8_ukernels_test_mode",
4988 hdrs = INTERNAL_HDRS,
4989 aarch32_copts = [
4990 "-marm",
4991 "-march=armv8-a",
4992 "-mfpu=neon-fp-armv8",
4993 ],
4994 aarch32_srcs = NEONV8_UKERNELS,
4995 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004996 apple_aarch32_copts = [
4997 "-mcpu=cyclone",
4998 "-mtune=generic",
4999 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005000 copts = [
5001 "-UNDEBUG",
5002 "-DXNN_TEST_MODE=1",
5003 ],
5004 gcc_copts = xnnpack_gcc_std_copts(),
5005 msvc_copts = xnnpack_msvc_std_copts(),
5006 deps = [
5007 ":tables",
5008 "@FP16",
5009 "@pthreadpool",
5010 ],
5011)
5012
5013xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005014 name = "neonfp16arith_ukernels",
5015 hdrs = INTERNAL_HDRS,
5016 aarch64_copts = ["-march=armv8.2-a+fp16"],
5017 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005018 gcc_copts = xnnpack_gcc_std_copts(),
5019 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005020 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005021 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005022 "@FP16",
5023 "@pthreadpool",
5024 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005025)
5026
5027xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005028 name = "neonfp16arith_ukernels_test_mode",
5029 hdrs = INTERNAL_HDRS,
5030 aarch64_copts = ["-march=armv8.2-a+fp16"],
5031 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
5032 copts = [
5033 "-UNDEBUG",
5034 "-DXNN_TEST_MODE=1",
5035 ],
5036 gcc_copts = xnnpack_gcc_std_copts(),
5037 msvc_copts = xnnpack_msvc_std_copts(),
5038 deps = [
5039 ":tables",
5040 "@FP16",
5041 "@pthreadpool",
5042 ],
5043)
5044
5045xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07005046 name = "neondot_ukernels",
5047 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005048 aarch32_copts = [
5049 "-marm",
5050 "-march=armv8.2-a+dotprod",
5051 "-mfpu=neon-fp-armv8",
5052 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005053 aarch32_srcs = NEONDOT_UKERNELS,
5054 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5055 aarch64_srcs = NEONDOT_UKERNELS,
5056 gcc_copts = xnnpack_gcc_std_copts(),
5057 msvc_copts = xnnpack_msvc_std_copts(),
5058 deps = [
5059 ":tables",
5060 "@FP16",
5061 "@pthreadpool",
5062 ],
5063)
5064
5065xnnpack_cc_library(
5066 name = "neondot_ukernels_test_mode",
5067 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005068 aarch32_copts = [
5069 "-marm",
5070 "-march=armv8.2-a+dotprod",
5071 "-mfpu=neon-fp-armv8",
5072 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005073 aarch32_srcs = NEONDOT_UKERNELS,
5074 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5075 aarch64_srcs = NEONDOT_UKERNELS,
5076 copts = [
5077 "-UNDEBUG",
5078 "-DXNN_TEST_MODE=1",
5079 ],
5080 gcc_copts = xnnpack_gcc_std_copts(),
5081 msvc_copts = xnnpack_msvc_std_copts(),
5082 deps = [
5083 ":tables",
5084 "@FP16",
5085 "@pthreadpool",
5086 ],
5087)
5088
5089xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005090 name = "sse2_ukernels",
5091 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005092 gcc_copts = xnnpack_gcc_std_copts(),
5093 gcc_x86_copts = ["-msse2"],
5094 msvc_copts = xnnpack_msvc_std_copts(),
5095 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005096 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005097 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005098 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005099 "@FP16",
5100 "@pthreadpool",
5101 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005102)
5103
5104xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005105 name = "sse2_ukernels_test_mode",
5106 hdrs = INTERNAL_HDRS,
5107 copts = [
5108 "-UNDEBUG",
5109 "-DXNN_TEST_MODE=1",
5110 ],
5111 gcc_copts = xnnpack_gcc_std_copts(),
5112 gcc_x86_copts = ["-msse2"],
5113 msvc_copts = xnnpack_msvc_std_copts(),
5114 msvc_x86_32_copts = ["/arch:SSE2"],
5115 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
5116 deps = [
5117 ":tables",
5118 "@FP16",
5119 "@pthreadpool",
5120 ],
5121)
5122
5123xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005124 name = "ssse3_ukernels",
5125 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005126 gcc_copts = xnnpack_gcc_std_copts(),
5127 gcc_x86_copts = ["-mssse3"],
5128 msvc_copts = xnnpack_msvc_std_copts(),
5129 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005130 x86_srcs = SSSE3_UKERNELS,
5131 deps = [
5132 ":tables",
5133 "@FP16",
5134 "@pthreadpool",
5135 ],
5136)
5137
5138xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005139 name = "ssse3_ukernels_test_mode",
5140 hdrs = INTERNAL_HDRS,
5141 copts = [
5142 "-UNDEBUG",
5143 "-DXNN_TEST_MODE=1",
5144 ],
5145 gcc_copts = xnnpack_gcc_std_copts(),
5146 gcc_x86_copts = ["-mssse3"],
5147 msvc_copts = xnnpack_msvc_std_copts(),
5148 msvc_x86_32_copts = ["/arch:SSE2"],
5149 x86_srcs = SSSE3_UKERNELS,
5150 deps = [
5151 ":tables",
5152 "@FP16",
5153 "@pthreadpool",
5154 ],
5155)
5156
5157xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005158 name = "sse41_ukernels",
5159 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005160 gcc_copts = xnnpack_gcc_std_copts(),
5161 gcc_x86_copts = ["-msse4.1"],
5162 msvc_copts = xnnpack_msvc_std_copts(),
5163 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005164 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005165 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005166 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005167 "@FP16",
5168 "@pthreadpool",
5169 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005170)
5171
5172xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005173 name = "sse41_ukernels_test_mode",
5174 hdrs = INTERNAL_HDRS,
5175 copts = [
5176 "-UNDEBUG",
5177 "-DXNN_TEST_MODE=1",
5178 ],
5179 gcc_copts = xnnpack_gcc_std_copts(),
5180 gcc_x86_copts = ["-msse4.1"],
5181 msvc_copts = xnnpack_msvc_std_copts(),
5182 msvc_x86_32_copts = ["/arch:SSE2"],
5183 x86_srcs = SSE41_UKERNELS,
5184 deps = [
5185 ":tables",
5186 "@FP16",
5187 "@pthreadpool",
5188 ],
5189)
5190
5191xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005192 name = "avx_ukernels",
5193 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005194 gcc_copts = xnnpack_gcc_std_copts(),
5195 gcc_x86_copts = ["-mavx"],
5196 msvc_copts = xnnpack_msvc_std_copts(),
5197 msvc_x86_32_copts = ["/arch:AVX"],
5198 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005199 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005200 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005201 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005202 "@FP16",
5203 "@pthreadpool",
5204 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005205)
5206
5207xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005208 name = "avx_ukernels_test_mode",
5209 hdrs = INTERNAL_HDRS,
5210 copts = [
5211 "-UNDEBUG",
5212 "-DXNN_TEST_MODE=1",
5213 ],
5214 gcc_copts = xnnpack_gcc_std_copts(),
5215 gcc_x86_copts = ["-mavx"],
5216 msvc_copts = xnnpack_msvc_std_copts(),
5217 msvc_x86_32_copts = ["/arch:AVX"],
5218 msvc_x86_64_copts = ["/arch:AVX"],
5219 x86_srcs = AVX_UKERNELS,
5220 deps = [
5221 ":tables",
5222 "@FP16",
5223 "@pthreadpool",
5224 ],
5225)
5226
5227xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005228 name = "xop_ukernels",
5229 hdrs = INTERNAL_HDRS,
5230 gcc_copts = xnnpack_gcc_std_copts(),
5231 gcc_x86_copts = ["-mxop"],
5232 msvc_copts = xnnpack_msvc_std_copts(),
5233 msvc_x86_32_copts = ["/arch:AVX"],
5234 msvc_x86_64_copts = ["/arch:AVX"],
5235 x86_srcs = XOP_UKERNELS,
5236 deps = [
5237 ":tables",
5238 "@FP16",
5239 "@pthreadpool",
5240 ],
5241)
5242
5243xnnpack_cc_library(
5244 name = "xop_ukernels_test_mode",
5245 hdrs = INTERNAL_HDRS,
5246 copts = [
5247 "-UNDEBUG",
5248 "-DXNN_TEST_MODE=1",
5249 ],
5250 gcc_copts = xnnpack_gcc_std_copts(),
5251 gcc_x86_copts = ["-mxop"],
5252 msvc_copts = xnnpack_msvc_std_copts(),
5253 msvc_x86_32_copts = ["/arch:AVX"],
5254 msvc_x86_64_copts = ["/arch:AVX"],
5255 x86_srcs = XOP_UKERNELS,
5256 deps = [
5257 ":tables",
5258 "@FP16",
5259 "@pthreadpool",
5260 ],
5261)
5262
5263xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005264 name = "fma3_ukernels",
5265 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005266 gcc_copts = xnnpack_gcc_std_copts(),
5267 gcc_x86_copts = ["-mfma"],
5268 msvc_copts = xnnpack_msvc_std_copts(),
5269 msvc_x86_32_copts = ["/arch:AVX"],
5270 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005271 x86_srcs = FMA3_UKERNELS,
5272 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005273 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005274 "@FP16",
5275 "@pthreadpool",
5276 ],
5277)
5278
5279xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005280 name = "fma3_ukernels_test_mode",
5281 hdrs = INTERNAL_HDRS,
5282 copts = [
5283 "-UNDEBUG",
5284 "-DXNN_TEST_MODE=1",
5285 ],
5286 gcc_copts = xnnpack_gcc_std_copts(),
5287 gcc_x86_copts = ["-mfma"],
5288 msvc_copts = xnnpack_msvc_std_copts(),
5289 msvc_x86_32_copts = ["/arch:AVX"],
5290 msvc_x86_64_copts = ["/arch:AVX"],
5291 x86_srcs = FMA3_UKERNELS,
5292 deps = [
5293 ":tables",
5294 "@FP16",
5295 "@pthreadpool",
5296 ],
5297)
5298
5299xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005300 name = "avx2_ukernels",
5301 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005302 gcc_copts = xnnpack_gcc_std_copts(),
5303 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005304 "-mfma",
5305 "-mavx2",
5306 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005307 msvc_copts = xnnpack_msvc_std_copts(),
5308 msvc_x86_32_copts = ["/arch:AVX2"],
5309 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005310 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005311 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005312 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005313 "@FP16",
5314 "@pthreadpool",
5315 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005316)
5317
5318xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005319 name = "avx2_ukernels_test_mode",
5320 hdrs = INTERNAL_HDRS,
5321 copts = [
5322 "-UNDEBUG",
5323 "-DXNN_TEST_MODE=1",
5324 ],
5325 gcc_copts = xnnpack_gcc_std_copts(),
5326 gcc_x86_copts = [
5327 "-mfma",
5328 "-mavx2",
5329 ],
5330 msvc_copts = xnnpack_msvc_std_copts(),
5331 msvc_x86_32_copts = ["/arch:AVX2"],
5332 msvc_x86_64_copts = ["/arch:AVX2"],
5333 x86_srcs = AVX2_UKERNELS,
5334 deps = [
5335 ":tables",
5336 "@FP16",
5337 "@pthreadpool",
5338 ],
5339)
5340
5341xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005342 name = "avx512f_ukernels",
5343 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005344 gcc_copts = xnnpack_gcc_std_copts(),
5345 gcc_x86_copts = ["-mavx512f"],
5346 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5347 msvc_copts = xnnpack_msvc_std_copts(),
5348 msvc_x86_32_copts = ["/arch:AVX512"],
5349 msvc_x86_64_copts = ["/arch:AVX512"],
5350 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005351 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005352 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005353 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005354 "@FP16",
5355 "@pthreadpool",
5356 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005357)
5358
5359xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005360 name = "avx512f_ukernels_test_mode",
5361 hdrs = INTERNAL_HDRS,
5362 copts = [
5363 "-UNDEBUG",
5364 "-DXNN_TEST_MODE=1",
5365 ],
5366 gcc_copts = xnnpack_gcc_std_copts(),
5367 gcc_x86_copts = ["-mavx512f"],
5368 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5369 msvc_copts = xnnpack_msvc_std_copts(),
5370 msvc_x86_32_copts = ["/arch:AVX512"],
5371 msvc_x86_64_copts = ["/arch:AVX512"],
5372 msys_copts = ["-fno-asynchronous-unwind-tables"],
5373 x86_srcs = AVX512F_UKERNELS,
5374 deps = [
5375 ":tables",
5376 "@FP16",
5377 "@pthreadpool",
5378 ],
5379)
5380
5381xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005382 name = "avx512skx_ukernels",
5383 hdrs = INTERNAL_HDRS,
5384 gcc_copts = xnnpack_gcc_std_copts(),
5385 gcc_x86_copts = [
5386 "-mavx512f",
5387 "-mavx512cd",
5388 "-mavx512bw",
5389 "-mavx512dq",
5390 "-mavx512vl",
5391 ],
5392 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5393 msvc_copts = xnnpack_msvc_std_copts(),
5394 msvc_x86_32_copts = ["/arch:AVX512"],
5395 msvc_x86_64_copts = ["/arch:AVX512"],
5396 msys_copts = ["-fno-asynchronous-unwind-tables"],
5397 x86_srcs = AVX512SKX_UKERNELS,
5398 deps = [
5399 ":tables",
5400 "@FP16",
5401 "@pthreadpool",
5402 ],
5403)
5404
5405xnnpack_cc_library(
5406 name = "avx512skx_ukernels_test_mode",
5407 hdrs = INTERNAL_HDRS,
5408 copts = [
5409 "-UNDEBUG",
5410 "-DXNN_TEST_MODE=1",
5411 ],
5412 gcc_copts = xnnpack_gcc_std_copts(),
5413 gcc_x86_copts = [
5414 "-mavx512f",
5415 "-mavx512cd",
5416 "-mavx512bw",
5417 "-mavx512dq",
5418 "-mavx512vl",
5419 ],
5420 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5421 msvc_copts = xnnpack_msvc_std_copts(),
5422 msvc_x86_32_copts = ["/arch:AVX512"],
5423 msvc_x86_64_copts = ["/arch:AVX512"],
5424 msys_copts = ["-fno-asynchronous-unwind-tables"],
5425 x86_srcs = AVX512SKX_UKERNELS,
5426 deps = [
5427 ":tables",
5428 "@FP16",
5429 "@pthreadpool",
5430 ],
5431)
5432
5433xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005434 name = "asm_ukernels",
5435 hdrs = ["src/xnnpack/assembly.h"],
5436 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005437 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005438 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005439 wasm_srcs = WASM32_ASM_UKERNELS,
5440 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005441)
5442
Marat Dukhan3b59de22020-06-03 20:15:19 -07005443xnnpack_cc_library(
5444 name = "logging_utils",
5445 srcs = LOGGING_SRCS,
5446 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5447 copts = LOGGING_COPTS + [
5448 "-Isrc",
5449 "-Iinclude",
5450 ] + select({
5451 ":debug_build": [],
5452 "//conditions:default": xnnpack_min_size_copts(),
5453 }),
5454 gcc_copts = xnnpack_gcc_std_copts(),
5455 msvc_copts = xnnpack_msvc_std_copts(),
5456 visibility = xnnpack_visibility(),
5457 deps = [
5458 "@FP16",
5459 "@clog",
5460 "@pthreadpool",
5461 ],
5462)
5463
Marat Dukhan08c4a432019-10-03 09:29:21 -07005464xnnpack_aggregate_library(
5465 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005466 aarch32_ios_deps = [
5467 ":neon_ukernels",
5468 ":neonfma_ukernels",
5469 ":neonv8_ukernels",
5470 ":asm_ukernels",
5471 ],
5472 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005473 ":neon_ukernels",
5474 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005475 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005476 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005477 ":asm_ukernels",
5478 ],
5479 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005480 ":neon_ukernels",
5481 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005482 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005483 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005484 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005485 ":asm_ukernels",
5486 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005487 generic_deps = [
5488 ":scalar_ukernels",
5489 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005490 wasm_deps = [
5491 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005492 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005493 ],
5494 wasmsimd_deps = [
5495 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005496 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005497 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005498 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005499 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005500 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005501 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005502 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005503 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005504 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005505 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005506 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005507 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005508 ],
5509)
5510
Marat Dukhan33fcf782020-05-24 14:27:15 -07005511xnnpack_aggregate_library(
5512 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005513 aarch32_ios_deps = [
5514 ":neon_ukernels_test_mode",
5515 ":neonfma_ukernels_test_mode",
5516 ":neonv8_ukernels_test_mode",
5517 ":asm_ukernels",
5518 ],
5519 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005520 ":neon_ukernels_test_mode",
5521 ":neonfma_ukernels_test_mode",
5522 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005523 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005524 ":asm_ukernels",
5525 ],
5526 aarch64_deps = [
5527 ":neon_ukernels_test_mode",
5528 ":neonfma_ukernels_test_mode",
5529 ":neonv8_ukernels_test_mode",
5530 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005531 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005532 ":asm_ukernels",
5533 ],
5534 generic_deps = [
5535 ":scalar_ukernels_test_mode",
5536 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005537 wasm_deps = [
5538 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005539 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005540 ],
5541 wasmsimd_deps = [
5542 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005543 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005544 ],
5545 x86_deps = [
5546 ":sse2_ukernels_test_mode",
5547 ":ssse3_ukernels_test_mode",
5548 ":sse41_ukernels_test_mode",
5549 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005550 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005551 ":fma3_ukernels_test_mode",
5552 ":avx2_ukernels_test_mode",
5553 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005554 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005555 ],
5556)
5557
Marat Dukhan08c4a432019-10-03 09:29:21 -07005558xnnpack_cc_library(
5559 name = "im2col",
5560 srcs = ["src/im2col.c"],
5561 hdrs = [
5562 "src/xnnpack/common.h",
5563 "src/xnnpack/im2col.h",
5564 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005565 gcc_copts = xnnpack_gcc_std_copts(),
5566 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005567)
5568
5569xnnpack_cc_library(
5570 name = "indirection",
5571 srcs = ["src/indirection.c"],
5572 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005573 gcc_copts = xnnpack_gcc_std_copts(),
5574 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005575 deps = [
5576 "@FP16",
5577 "@FXdiv",
5578 "@pthreadpool",
5579 ],
5580)
5581
5582xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005583 name = "indirection_test_mode",
5584 srcs = ["src/indirection.c"],
5585 hdrs = INTERNAL_HDRS,
5586 copts = [
5587 "-UNDEBUG",
5588 "-DXNN_TEST_MODE=1",
5589 ],
5590 gcc_copts = xnnpack_gcc_std_copts(),
5591 msvc_copts = xnnpack_msvc_std_copts(),
5592 deps = [
5593 "@FP16",
5594 "@FXdiv",
5595 "@pthreadpool",
5596 ],
5597)
5598
5599xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005600 name = "packing",
5601 srcs = ["src/packing.c"],
5602 hdrs = INTERNAL_HDRS,
5603 gcc_copts = xnnpack_gcc_std_copts(),
5604 msvc_copts = xnnpack_msvc_std_copts(),
5605 deps = [
5606 "@FP16",
5607 "@FXdiv",
5608 "@pthreadpool",
5609 ],
5610)
5611
5612xnnpack_cc_library(
5613 name = "packing_test_mode",
5614 srcs = ["src/packing.c"],
5615 hdrs = INTERNAL_HDRS,
5616 copts = [
5617 "-UNDEBUG",
5618 "-DXNN_TEST_MODE=1",
5619 ],
5620 gcc_copts = xnnpack_gcc_std_copts(),
5621 msvc_copts = xnnpack_msvc_std_copts(),
5622 deps = [
5623 "@FP16",
5624 "@FXdiv",
5625 "@pthreadpool",
5626 ],
5627)
5628
5629xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005630 name = "operator_run",
5631 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005632 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005633 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005634 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5635 "//conditions:default": [],
5636 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005637 gcc_copts = xnnpack_gcc_std_copts(),
5638 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005639 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005640 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005641 "@FP16",
5642 "@FXdiv",
5643 "@clog",
5644 "@pthreadpool",
5645 ],
5646)
5647
Chao Mei6ddfc602020-05-13 22:29:36 -07005648xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005649 name = "operator_run_test_mode",
5650 srcs = ["src/operator-run.c"],
5651 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5652 copts = LOGGING_COPTS + [
5653 "-UNDEBUG",
5654 "-DXNN_TEST_MODE=1",
5655 ] + select({
5656 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5657 "//conditions:default": [],
5658 }),
5659 gcc_copts = xnnpack_gcc_std_copts(),
5660 msvc_copts = xnnpack_msvc_std_copts(),
5661 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005662 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005663 "@FP16",
5664 "@FXdiv",
5665 "@clog",
5666 "@pthreadpool",
5667 ],
5668)
5669
5670xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005671 name = "memory_planner",
5672 srcs = ["src/memory-planner.c"],
5673 hdrs = INTERNAL_HDRS,
5674 defines = select({
5675 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5676 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5677 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5678 }),
5679 gcc_copts = xnnpack_gcc_std_copts(),
5680 msvc_copts = xnnpack_msvc_std_copts(),
5681 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005682 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005683 "@pthreadpool",
5684 ],
5685)
5686
Marat Dukhan33fcf782020-05-24 14:27:15 -07005687xnnpack_cc_library(
5688 name = "memory_planner_test_mode",
5689 srcs = ["src/memory-planner.c"],
5690 hdrs = INTERNAL_HDRS,
5691 copts = [
5692 "-UNDEBUG",
5693 "-DXNN_TEST_MODE=1",
5694 ],
5695 defines = select({
5696 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5697 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5698 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5699 }),
5700 gcc_copts = xnnpack_gcc_std_copts(),
5701 msvc_copts = xnnpack_msvc_std_copts(),
5702 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005703 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005704 "@pthreadpool",
5705 ],
5706)
5707
Marat Dukhan08c4a432019-10-03 09:29:21 -07005708cc_library(
5709 name = "enable_assembly",
5710 defines = select({
5711 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5712 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005713 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005714 }),
5715)
5716
Marat Dukhan9de90e02020-06-18 16:04:12 -07005717cc_library(
5718 name = "enable_sparse",
5719 defines = select({
5720 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5721 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005722 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005723 }),
5724)
5725
Marat Dukhancf056b22019-10-07 10:26:29 -07005726xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005727 name = "operators",
5728 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005729 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005730 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005731 ],
5732 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005733 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005734 "-Isrc",
5735 "-Iinclude",
5736 ] + select({
5737 ":debug_build": [],
5738 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005739 }) + select({
5740 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5741 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005742 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005743 gcc_copts = xnnpack_gcc_std_copts(),
5744 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005745 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005746 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005747 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005748 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005749 "@FP16",
5750 "@FXdiv",
5751 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005752 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005753 ],
5754)
5755
Marat Dukhan10a38082020-04-17 03:58:35 -07005756xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005757 name = "operators_test_mode",
5758 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005759 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005760 "src/operator-delete.c",
5761 ],
5762 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5763 copts = LOGGING_COPTS + [
5764 "-Isrc",
5765 "-Iinclude",
5766 "-UNDEBUG",
5767 "-DXNN_TEST_MODE=1",
5768 ] + select({
5769 ":debug_build": [],
5770 "//conditions:default": xnnpack_min_size_copts(),
5771 }) + select({
5772 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5773 "//conditions:default": [],
5774 }),
5775 gcc_copts = xnnpack_gcc_std_copts(),
5776 msvc_copts = xnnpack_msvc_std_copts(),
5777 deps = [
5778 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005779 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005780 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005781 "@FP16",
5782 "@FXdiv",
5783 "@clog",
5784 "@pthreadpool",
5785 ],
5786)
5787
5788xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005789 name = "XNNPACK",
5790 srcs = [
5791 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005792 "src/runtime.c",
5793 "src/subgraph.c",
5794 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005795 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005796 hdrs = ["include/xnnpack.h"],
5797 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005798 "-Isrc",
5799 "-Iinclude",
5800 ] + select({
5801 ":debug_build": [],
5802 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005803 }) + select({
5804 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5805 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005806 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005807 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005808 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005809 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005810 visibility = xnnpack_visibility(),
5811 deps = [
5812 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005813 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005814 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005815 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005816 ":operator_run",
5817 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005818 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005819 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005820 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005821 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005822 ] + select({
5823 ":emscripten": [],
5824 "//conditions:default": ["@cpuinfo"],
5825 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005826)
5827
Marat Dukhan10a38082020-04-17 03:58:35 -07005828xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005829 name = "XNNPACK_test_mode",
5830 srcs = [
5831 "src/init.c",
5832 "src/runtime.c",
5833 "src/subgraph.c",
5834 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005835 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005836 hdrs = ["include/xnnpack.h"],
5837 copts = LOGGING_COPTS + [
5838 "-Isrc",
5839 "-Iinclude",
5840 "-UNDEBUG",
5841 "-DXNN_TEST_MODE=1",
5842 ] + select({
5843 ":debug_build": [],
5844 "//conditions:default": xnnpack_min_size_copts(),
5845 }) + select({
5846 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5847 "//conditions:default": [],
5848 }),
5849 gcc_copts = xnnpack_gcc_std_copts(),
5850 includes = ["include"],
5851 msvc_copts = xnnpack_msvc_std_copts(),
5852 visibility = xnnpack_visibility(),
5853 deps = [
5854 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005855 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005856 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005857 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005858 ":operator_run_test_mode",
5859 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005860 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005861 "@clog",
5862 "@FP16",
5863 "@pthreadpool",
5864 ] + select({
5865 ":emscripten": [],
5866 "//conditions:default": ["@cpuinfo"],
5867 }),
5868)
5869
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005870# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5871# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005872xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005873 name = "xnnpack_for_tflite",
5874 srcs = [
5875 "src/init.c",
5876 "src/runtime.c",
5877 "src/subgraph.c",
5878 "src/tensor.c",
5879 ] + SUBGRAPH_SRCS,
5880 hdrs = ["include/xnnpack.h"],
5881 copts = LOGGING_COPTS + [
5882 "-Isrc",
5883 "-Iinclude",
5884 ] + select({
5885 ":debug_build": [],
5886 "//conditions:default": xnnpack_min_size_copts(),
5887 }) + select({
5888 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5889 "//conditions:default": [],
5890 }),
5891 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005892 "XNN_NO_U8_OPERATORS",
5893 "XNN_NO_X8_OPERATORS",
5894 "XNN_NO_F16_OPERATORS",
5895 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005896 ] + select({
5897 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005898 ":xnn_enable_qs8_explicit_false": [
5899 "XNN_NO_QC8_OPERATORS",
5900 "XNN_NO_QS8_OPERATORS",
5901 ],
5902 "//conditions:default": [
5903 "XNN_NO_QC8_OPERATORS",
5904 "XNN_NO_QS8_OPERATORS",
5905 ],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07005906 }) + select({
5907 ":xnn_enable_qu8_explicit_true": [],
5908 ":xnn_enable_qu8_explicit_false": [
5909 "XNN_NO_QU8_OPERATORS",
5910 ],
5911 "//conditions:default": [
5912 "XNN_NO_QU8_OPERATORS",
5913 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005914 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005915 gcc_copts = xnnpack_gcc_std_copts(),
5916 includes = ["include"],
5917 msvc_copts = xnnpack_msvc_std_copts(),
5918 visibility = xnnpack_visibility(),
5919 deps = [
5920 ":enable_assembly",
5921 ":enable_sparse",
5922 ":logging_utils",
5923 ":memory_planner",
5924 ":operator_run",
5925 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005926 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005927 "@clog",
5928 "@FP16",
5929 "@pthreadpool",
5930 ] + select({
5931 ":emscripten": [],
5932 "//conditions:default": ["@cpuinfo"],
5933 }),
5934)
5935
5936# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5937# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5938xnnpack_cc_library(
5939 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005940 srcs = [
5941 "src/init.c",
5942 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005943 hdrs = ["include/xnnpack.h"],
5944 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005945 "-Isrc",
5946 "-Iinclude",
5947 ] + select({
5948 ":debug_build": [],
5949 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005950 }) + select({
5951 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5952 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005953 }),
5954 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005955 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005956 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005957 "XNN_NO_U8_OPERATORS",
5958 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005959 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005960 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005961 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005962 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005963 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005964 visibility = xnnpack_visibility(),
5965 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005966 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005967 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005968 ":operator_run",
5969 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005970 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005971 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005972 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005973 ] + select({
5974 ":emscripten": [],
5975 "//conditions:default": ["@cpuinfo"],
5976 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005977)
5978
Marat Dukhancf056b22019-10-07 10:26:29 -07005979xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005980 name = "bench_utils",
5981 srcs = ["bench/utils.cc"],
5982 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005983 deps = [
5984 "@com_google_benchmark//:benchmark",
5985 "@cpuinfo",
5986 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005987)
5988
Frank Barchard7e955972019-10-11 10:34:25 -07005989######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005990
5991xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005992 name = "qs8_gemm_bench",
5993 srcs = [
5994 "bench/gemm.h",
5995 "bench/qs8-gemm.cc",
5996 "src/xnnpack/AlignedAllocator.h",
5997 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005998 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5999 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07006000)
6001
6002xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006003 name = "qs8_requantization_bench",
6004 srcs = [
6005 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006006 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006007 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006008 ] + MICROKERNEL_BENCHMARK_HDRS,
6009 deps = MICROKERNEL_BENCHMARK_DEPS,
6010)
6011
6012xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07006013 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006014 srcs = [
6015 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07006016 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006017 "src/xnnpack/AlignedAllocator.h",
6018 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006019 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006020 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006021)
6022
6023xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006024 name = "qu8_requantization_bench",
6025 srcs = [
6026 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006027 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006028 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006029 ] + MICROKERNEL_BENCHMARK_HDRS,
6030 deps = MICROKERNEL_BENCHMARK_DEPS,
6031)
6032
6033xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07006034 name = "f16_igemm_bench",
6035 srcs = [
6036 "bench/f16-igemm.cc",
6037 "bench/conv.h",
6038 "bench/google/conv.h",
6039 "src/xnnpack/AlignedAllocator.h",
6040 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006041 deps = MICROKERNEL_BENCHMARK_DEPS + [
6042 ":indirection",
6043 ":packing",
6044 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07006045)
6046
6047xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006048 name = "f16_gemm_bench",
6049 srcs = [
6050 "bench/f16-gemm.cc",
6051 "bench/gemm.h",
6052 "src/xnnpack/AlignedAllocator.h",
6053 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006054 deps = MICROKERNEL_BENCHMARK_DEPS + [
6055 ":packing",
6056 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006057)
6058
6059xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006060 name = "f16_spmm_bench",
6061 srcs = [
6062 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006063 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006064 "src/xnnpack/AlignedAllocator.h",
6065 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006066 deps = MICROKERNEL_BENCHMARK_DEPS,
6067)
6068
6069xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006070 name = "f16_vrelu_bench",
6071 srcs = [
6072 "bench/f16-vrelu.cc",
6073 "src/xnnpack/AlignedAllocator.h",
6074 ] + MICROKERNEL_BENCHMARK_HDRS,
6075 deps = MICROKERNEL_BENCHMARK_DEPS,
6076)
6077
6078xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006079 name = "f32_igemm_bench",
6080 srcs = [
6081 "bench/f32-igemm.cc",
6082 "bench/conv.h",
6083 "src/xnnpack/AlignedAllocator.h",
6084 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006085 deps = MICROKERNEL_BENCHMARK_DEPS + [
6086 ":indirection",
6087 ":packing",
6088 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006089)
6090
6091xnnpack_benchmark(
6092 name = "f32_conv_hwc_bench",
6093 srcs = [
6094 "bench/f32-conv-hwc.cc",
6095 "bench/dconv.h",
6096 "src/xnnpack/AlignedAllocator.h",
6097 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006098 deps = MICROKERNEL_BENCHMARK_DEPS + [
6099 ":packing",
6100 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006101)
6102
6103xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006104 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07006105 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006106 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07006107 "bench/dconv.h",
6108 "src/xnnpack/AlignedAllocator.h",
6109 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006110 deps = MICROKERNEL_BENCHMARK_DEPS + [
6111 ":packing",
6112 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07006113)
6114
6115xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07006116 name = "f16_dwconv_bench",
6117 srcs = [
6118 "bench/f16-dwconv.cc",
6119 "bench/dwconv.h",
6120 "bench/google/dwconv.h",
6121 "src/xnnpack/AlignedAllocator.h",
6122 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006123 deps = MICROKERNEL_BENCHMARK_DEPS + [
6124 ":indirection",
6125 ":packing",
6126 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07006127)
6128
6129xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006130 name = "f32_dwconv_bench",
6131 srcs = [
6132 "bench/f32-dwconv.cc",
6133 "bench/dwconv.h",
6134 "src/xnnpack/AlignedAllocator.h",
6135 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006136 deps = MICROKERNEL_BENCHMARK_DEPS + [
6137 ":indirection",
6138 ":packing",
6139 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006140)
6141
6142xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006143 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006144 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006145 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006146 "bench/dwconv.h",
6147 "src/xnnpack/AlignedAllocator.h",
6148 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006149 deps = MICROKERNEL_BENCHMARK_DEPS + [
6150 ":indirection",
6151 ":packing",
6152 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006153)
6154
6155xnnpack_benchmark(
6156 name = "f32_gemm_bench",
6157 srcs = [
6158 "bench/f32-gemm.cc",
6159 "bench/gemm.h",
6160 "src/xnnpack/AlignedAllocator.h",
6161 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006162 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006163 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006164)
6165
6166xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006167 name = "f32_raddexpminusmax_bench",
6168 srcs = [
6169 "bench/f32-raddexpminusmax.cc",
6170 "src/xnnpack/AlignedAllocator.h",
6171 ] + MICROKERNEL_BENCHMARK_HDRS,
6172 deps = MICROKERNEL_BENCHMARK_DEPS,
6173)
6174
6175xnnpack_benchmark(
6176 name = "f32_raddextexp_bench",
6177 srcs = [
6178 "bench/f32-raddextexp.cc",
6179 "src/xnnpack/AlignedAllocator.h",
6180 ] + MICROKERNEL_BENCHMARK_HDRS,
6181 deps = MICROKERNEL_BENCHMARK_DEPS,
6182)
6183
6184xnnpack_benchmark(
6185 name = "f32_raddstoreexpminusmax_bench",
6186 srcs = [
6187 "bench/f32-raddstoreexpminusmax.cc",
6188 "src/xnnpack/AlignedAllocator.h",
6189 ] + MICROKERNEL_BENCHMARK_HDRS,
6190 deps = MICROKERNEL_BENCHMARK_DEPS,
6191)
6192
6193xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006194 name = "f32_rmax_bench",
6195 srcs = [
6196 "bench/f32-rmax.cc",
6197 "src/xnnpack/AlignedAllocator.h",
6198 ] + MICROKERNEL_BENCHMARK_HDRS,
6199 deps = MICROKERNEL_BENCHMARK_DEPS,
6200)
6201
6202xnnpack_benchmark(
6203 name = "f32_spmm_bench",
6204 srcs = [
6205 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006206 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006207 "src/xnnpack/AlignedAllocator.h",
6208 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006209 deps = MICROKERNEL_BENCHMARK_DEPS,
6210)
6211
6212xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006213 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006214 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006215 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006216 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006217 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006218 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006219)
6220
6221xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006222 name = "f32_velu_bench",
6223 srcs = [
6224 "bench/f32-velu.cc",
6225 "src/xnnpack/AlignedAllocator.h",
6226 ] + MICROKERNEL_BENCHMARK_HDRS,
6227 deps = MICROKERNEL_BENCHMARK_DEPS,
6228)
6229
6230xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006231 name = "f32_vhswish_bench",
6232 srcs = [
6233 "bench/f32-vhswish.cc",
6234 "src/xnnpack/AlignedAllocator.h",
6235 ] + MICROKERNEL_BENCHMARK_HDRS,
6236 deps = MICROKERNEL_BENCHMARK_DEPS,
6237)
6238
6239xnnpack_benchmark(
6240 name = "f32_vrelu_bench",
6241 srcs = [
6242 "bench/f32-vrelu.cc",
6243 "src/xnnpack/AlignedAllocator.h",
6244 ] + MICROKERNEL_BENCHMARK_HDRS,
6245 deps = MICROKERNEL_BENCHMARK_DEPS,
6246)
6247
6248xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006249 name = "f32_vscaleexpminusmax_bench",
6250 srcs = [
6251 "bench/f32-vscaleexpminusmax.cc",
6252 "src/xnnpack/AlignedAllocator.h",
6253 ] + MICROKERNEL_BENCHMARK_HDRS,
6254 deps = MICROKERNEL_BENCHMARK_DEPS,
6255)
6256
6257xnnpack_benchmark(
6258 name = "f32_vscaleextexp_bench",
6259 srcs = [
6260 "bench/f32-vscaleextexp.cc",
6261 "src/xnnpack/AlignedAllocator.h",
6262 ] + MICROKERNEL_BENCHMARK_HDRS,
6263 deps = MICROKERNEL_BENCHMARK_DEPS,
6264)
6265
6266xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006267 name = "f32_vsigmoid_bench",
6268 srcs = [
6269 "bench/f32-vsigmoid.cc",
6270 "src/xnnpack/AlignedAllocator.h",
6271 ] + MICROKERNEL_BENCHMARK_HDRS,
6272 deps = MICROKERNEL_BENCHMARK_DEPS,
6273)
6274
6275xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006276 name = "f32_vsqrt_bench",
6277 srcs = [
6278 "bench/f32-vsqrt.cc",
6279 "src/xnnpack/AlignedAllocator.h",
6280 ] + MICROKERNEL_BENCHMARK_HDRS,
6281 deps = MICROKERNEL_BENCHMARK_DEPS,
6282)
6283
6284xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006285 name = "f32_im2col_gemm_bench",
6286 srcs = [
6287 "bench/f32-im2col-gemm.cc",
6288 "bench/conv.h",
6289 "src/xnnpack/AlignedAllocator.h",
6290 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006291 deps = MICROKERNEL_BENCHMARK_DEPS + [
6292 ":im2col",
6293 ":packing",
6294 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006295)
6296
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006297xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006298 name = "rounding_bench",
6299 srcs = [
6300 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006301 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006302 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006303 ] + MICROKERNEL_BENCHMARK_HDRS,
6304 deps = MICROKERNEL_BENCHMARK_DEPS,
6305)
6306
Marat Dukhan08c4a432019-10-03 09:29:21 -07006307########################### Benchmarks for operators ###########################
6308
6309xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006310 name = "average_pooling_bench",
6311 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006312 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006313 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006314 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006315)
6316
6317xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006318 name = "bankers_rounding_bench",
6319 srcs = ["bench/bankers-rounding.cc"],
6320 copts = xnnpack_optional_tflite_copts(),
6321 tags = ["nowin32"],
6322 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6323)
6324
6325xnnpack_benchmark(
6326 name = "ceiling_bench",
6327 srcs = ["bench/ceiling.cc"],
6328 copts = xnnpack_optional_tflite_copts(),
6329 tags = ["nowin32"],
6330 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6331)
6332
6333xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006334 name = "channel_shuffle_bench",
6335 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006336 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006337)
6338
6339xnnpack_benchmark(
6340 name = "convolution_bench",
6341 srcs = ["bench/convolution.cc"],
6342 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006343 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006344 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006345)
6346
6347xnnpack_benchmark(
6348 name = "deconvolution_bench",
6349 srcs = ["bench/deconvolution.cc"],
6350 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006351 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006352 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006353)
6354
6355xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006356 name = "elu_bench",
6357 srcs = ["bench/elu.cc"],
6358 copts = xnnpack_optional_tflite_copts(),
6359 tags = ["nowin32"],
6360 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6361)
6362
6363xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006364 name = "floor_bench",
6365 srcs = ["bench/floor.cc"],
6366 copts = xnnpack_optional_tflite_copts(),
6367 tags = ["nowin32"],
6368 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6369)
6370
6371xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006372 name = "global_average_pooling_bench",
6373 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006374 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006375)
6376
6377xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006378 name = "hardswish_bench",
6379 srcs = ["bench/hardswish.cc"],
6380 copts = xnnpack_optional_tflite_copts(),
6381 tags = ["nowin32"],
6382 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6383)
6384
6385xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006386 name = "max_pooling_bench",
6387 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006388 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006389)
6390
6391xnnpack_benchmark(
6392 name = "sigmoid_bench",
6393 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006394 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006395 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006396 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006397)
6398
6399xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006400 name = "prelu_bench",
6401 srcs = ["bench/prelu.cc"],
6402 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006403 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006404 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006405)
6406
6407xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006408 name = "softmax_bench",
6409 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006410 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006411 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006412 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006413)
6414
Marat Dukhan87727142020-06-24 15:24:10 -07006415xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006416 name = "square_root_bench",
6417 srcs = ["bench/square-root.cc"],
6418 copts = xnnpack_optional_tflite_copts(),
6419 tags = ["nowin32"],
6420 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6421)
6422
6423xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006424 name = "truncation_bench",
6425 srcs = ["bench/truncation.cc"],
6426 deps = OPERATOR_BENCHMARK_DEPS,
6427)
6428
Marat Dukhanc068bb62019-10-04 13:24:39 -07006429############################# End-to-end benchmarks ############################
6430
6431cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006432 name = "fp32_mobilenet_v1",
6433 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006434 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006435 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006436 linkstatic = True,
6437 deps = [
6438 ":XNNPACK",
6439 "@pthreadpool",
6440 ],
6441)
6442
6443cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006444 name = "fp32_sparse_mobilenet_v1",
6445 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6446 hdrs = ["models/models.h"],
6447 copts = xnnpack_std_cxxopts(),
6448 linkstatic = True,
6449 deps = [
6450 ":XNNPACK",
6451 "@pthreadpool",
6452 ],
6453)
6454
6455cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006456 name = "fp16_mobilenet_v1",
6457 srcs = ["models/fp16-mobilenet-v1.cc"],
6458 hdrs = ["models/models.h"],
6459 copts = xnnpack_std_cxxopts(),
6460 linkstatic = True,
6461 deps = [
6462 ":XNNPACK",
6463 "@FP16",
6464 "@pthreadpool",
6465 ],
6466)
6467
6468cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006469 name = "qs8_mobilenet_v1",
6470 srcs = ["models/qs8-mobilenet-v1.cc"],
6471 hdrs = ["models/models.h"],
6472 copts = xnnpack_std_cxxopts(),
6473 linkstatic = True,
6474 deps = [
6475 ":XNNPACK",
6476 "@pthreadpool",
6477 ],
6478)
6479
6480cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006481 name = "qs8_mobilenet_v2",
6482 srcs = ["models/qs8-mobilenet-v2.cc"],
6483 hdrs = ["models/models.h"],
6484 copts = xnnpack_std_cxxopts(),
6485 linkstatic = True,
6486 deps = [
6487 ":XNNPACK",
6488 "@pthreadpool",
6489 ],
6490)
6491
6492cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006493 name = "qu8_mobilenet_v1",
6494 srcs = ["models/qu8-mobilenet-v1.cc"],
6495 hdrs = ["models/models.h"],
6496 copts = xnnpack_std_cxxopts(),
6497 linkstatic = True,
6498 deps = [
6499 ":XNNPACK",
6500 "@pthreadpool",
6501 ],
6502)
6503
6504cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006505 name = "fp32_mobilenet_v2",
6506 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006507 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006508 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006509 linkstatic = True,
6510 deps = [
6511 ":XNNPACK",
6512 "@pthreadpool",
6513 ],
6514)
6515
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006516cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006517 name = "fp32_sparse_mobilenet_v2",
6518 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6519 hdrs = ["models/models.h"],
6520 copts = xnnpack_std_cxxopts(),
6521 linkstatic = True,
6522 deps = [
6523 ":XNNPACK",
6524 "@pthreadpool",
6525 ],
6526)
6527
6528cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006529 name = "fp16_mobilenet_v2",
6530 srcs = ["models/fp16-mobilenet-v2.cc"],
6531 hdrs = ["models/models.h"],
6532 copts = xnnpack_std_cxxopts(),
6533 linkstatic = True,
6534 deps = [
6535 ":XNNPACK",
6536 "@FP16",
6537 "@pthreadpool",
6538 ],
6539)
6540
6541cc_library(
6542 name = "fp32_mobilenet_v3_large",
6543 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006544 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006545 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006546 linkstatic = True,
6547 deps = [
6548 ":XNNPACK",
6549 "@pthreadpool",
6550 ],
6551)
6552
6553cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006554 name = "fp32_sparse_mobilenet_v3_large",
6555 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6556 hdrs = ["models/models.h"],
6557 copts = xnnpack_std_cxxopts(),
6558 linkstatic = True,
6559 deps = [
6560 ":XNNPACK",
6561 "@pthreadpool",
6562 ],
6563)
6564
6565cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006566 name = "fp16_mobilenet_v3_large",
6567 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6568 hdrs = ["models/models.h"],
6569 copts = xnnpack_std_cxxopts(),
6570 linkstatic = True,
6571 deps = [
6572 ":XNNPACK",
6573 "@FP16",
6574 "@pthreadpool",
6575 ],
6576)
6577
6578cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006579 name = "fp32_mobilenet_v3_small",
6580 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006581 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006582 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006583 linkstatic = True,
6584 deps = [
6585 ":XNNPACK",
6586 "@pthreadpool",
6587 ],
6588)
6589
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006590cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006591 name = "fp32_sparse_mobilenet_v3_small",
6592 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6593 hdrs = ["models/models.h"],
6594 copts = xnnpack_std_cxxopts(),
6595 linkstatic = True,
6596 deps = [
6597 ":XNNPACK",
6598 "@pthreadpool",
6599 ],
6600)
6601
6602cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006603 name = "fp16_mobilenet_v3_small",
6604 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6605 hdrs = ["models/models.h"],
6606 copts = xnnpack_std_cxxopts(),
6607 linkstatic = True,
6608 deps = [
6609 ":XNNPACK",
6610 "@FP16",
6611 "@pthreadpool",
6612 ],
6613)
6614
Marat Dukhanc068bb62019-10-04 13:24:39 -07006615xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006616 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006617 srcs = [
6618 "bench/f32-dwconv-e2e.cc",
6619 "bench/end2end.h",
6620 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006621 deps = MICROKERNEL_BENCHMARK_DEPS + [
6622 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006623 ":fp32_mobilenet_v1",
6624 ":fp32_mobilenet_v2",
6625 ":fp32_mobilenet_v3_large",
6626 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006627 ],
6628)
6629
6630xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006631 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006632 srcs = [
6633 "bench/f32-gemm-e2e.cc",
6634 "bench/end2end.h",
6635 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006636 deps = MICROKERNEL_BENCHMARK_DEPS + [
6637 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006638 ":fp32_mobilenet_v1",
6639 ":fp32_mobilenet_v2",
6640 ":fp32_mobilenet_v3_large",
6641 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006642 ],
6643)
6644
6645xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006646 name = "qs8_gemm_e2e_bench",
6647 srcs = [
6648 "bench/qs8-gemm-e2e.cc",
6649 "bench/end2end.h",
6650 ] + MICROKERNEL_BENCHMARK_HDRS,
6651 deps = MICROKERNEL_BENCHMARK_DEPS + [
6652 ":XNNPACK",
6653 ":qs8_mobilenet_v1",
6654 ":qs8_mobilenet_v2",
6655 ],
6656)
6657
6658xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006659 name = "end2end_bench",
6660 srcs = ["bench/end2end.cc"],
6661 deps = [
6662 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006663 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006664 ":fp16_mobilenet_v1",
6665 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006666 ":fp16_mobilenet_v3_large",
6667 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006668 ":fp32_mobilenet_v1",
6669 ":fp32_mobilenet_v2",
6670 ":fp32_mobilenet_v3_large",
6671 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006672 ":fp32_sparse_mobilenet_v1",
6673 ":fp32_sparse_mobilenet_v2",
6674 ":fp32_sparse_mobilenet_v3_large",
6675 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006676 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006677 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006678 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006679 "@pthreadpool",
6680 ],
6681)
6682
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006683#################### Accuracy evaluation for math functions ####################
6684
6685xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006686 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006687 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006688 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006689 "src/xnnpack/AlignedAllocator.h",
6690 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006691 deps = ACCURACY_EVAL_DEPS + [
6692 ":bench_utils",
6693 "@cpuinfo",
6694 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006695)
6696
Marat Dukhan515c9772019-10-17 18:07:57 -07006697xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006698 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006699 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006700 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006701 "src/xnnpack/AlignedAllocator.h",
6702 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006703 deps = ACCURACY_EVAL_DEPS + [
6704 ":bench_utils",
6705 "@cpuinfo",
6706 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006707)
6708
Marat Dukhan98ba4412019-10-23 02:14:28 -07006709xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006710 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006711 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006712 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006713 "src/xnnpack/AlignedAllocator.h",
6714 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006715 deps = ACCURACY_EVAL_DEPS + [
6716 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006717 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006718 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006719)
6720
6721xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006722 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006723 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006724 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006725 "src/xnnpack/AlignedAllocator.h",
6726 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006727 deps = ACCURACY_EVAL_DEPS + [
6728 ":bench_utils",
6729 "@cpuinfo",
6730 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006731)
6732
Marat Dukhanf44f0222020-12-14 11:53:27 -08006733xnnpack_benchmark(
6734 name = "f32_sigmoid_ulp_eval",
6735 srcs = [
6736 "eval/f32-sigmoid-ulp.cc",
6737 "src/xnnpack/AlignedAllocator.h",
6738 ] + ACCURACY_EVAL_HDRS,
6739 deps = ACCURACY_EVAL_DEPS + [
6740 ":bench_utils",
6741 "@cpuinfo",
6742 ],
6743)
6744
6745xnnpack_benchmark(
6746 name = "f32_sqrt_ulp_eval",
6747 srcs = [
6748 "eval/f32-sqrt-ulp.cc",
6749 "src/xnnpack/AlignedAllocator.h",
6750 ] + ACCURACY_EVAL_HDRS,
6751 deps = ACCURACY_EVAL_DEPS + [
6752 ":bench_utils",
6753 "@cpuinfo",
6754 ],
6755)
6756
6757################### Accuracy verification for math functions ##################
6758
6759xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006760 name = "f32_exp_eval",
6761 srcs = [
6762 "eval/f32-exp.cc",
6763 "src/xnnpack/AlignedAllocator.h",
6764 "src/xnnpack/math-stubs.h",
6765 ] + MICROKERNEL_TEST_HDRS,
6766 automatic = False,
6767 deps = MICROKERNEL_TEST_DEPS,
6768)
6769
6770xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006771 name = "f32_expm1minus_eval",
6772 srcs = [
6773 "eval/f32-expm1minus.cc",
6774 "src/xnnpack/AlignedAllocator.h",
6775 "src/xnnpack/math-stubs.h",
6776 ] + MICROKERNEL_TEST_HDRS,
6777 automatic = False,
6778 deps = MICROKERNEL_TEST_DEPS,
6779)
6780
Marat Dukhan8853b822020-05-07 12:19:01 -07006781xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006782 name = "f32_expminus_eval",
6783 srcs = [
6784 "eval/f32-expminus.cc",
6785 "src/xnnpack/AlignedAllocator.h",
6786 "src/xnnpack/math-stubs.h",
6787 ] + MICROKERNEL_TEST_HDRS,
6788 automatic = False,
6789 deps = MICROKERNEL_TEST_DEPS,
6790)
6791
6792xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006793 name = "f32_roundne_eval",
6794 srcs = [
6795 "eval/f32-roundne.cc",
6796 "src/xnnpack/AlignedAllocator.h",
6797 "src/xnnpack/math-stubs.h",
6798 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006799 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006800 deps = MICROKERNEL_TEST_DEPS,
6801)
6802
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006803xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006804 name = "f32_roundd_eval",
6805 srcs = [
6806 "eval/f32-roundd.cc",
6807 "src/xnnpack/AlignedAllocator.h",
6808 "src/xnnpack/math-stubs.h",
6809 ] + MICROKERNEL_TEST_HDRS,
6810 automatic = False,
6811 deps = MICROKERNEL_TEST_DEPS,
6812)
6813
6814xnnpack_unit_test(
6815 name = "f32_roundu_eval",
6816 srcs = [
6817 "eval/f32-roundu.cc",
6818 "src/xnnpack/AlignedAllocator.h",
6819 "src/xnnpack/math-stubs.h",
6820 ] + MICROKERNEL_TEST_HDRS,
6821 automatic = False,
6822 deps = MICROKERNEL_TEST_DEPS,
6823)
6824
6825xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006826 name = "f32_roundz_eval",
6827 srcs = [
6828 "eval/f32-roundz.cc",
6829 "src/xnnpack/AlignedAllocator.h",
6830 "src/xnnpack/math-stubs.h",
6831 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006832 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006833 deps = MICROKERNEL_TEST_DEPS,
6834)
6835
Marat Dukhan08c4a432019-10-03 09:29:21 -07006836######################### Unit tests for micro-kernels #########################
6837
6838xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006839 name = "f16_dwconv_minmax_test",
6840 srcs = [
6841 "test/f16-dwconv-minmax.cc",
6842 "test/dwconv-microkernel-tester.h",
6843 "src/xnnpack/AlignedAllocator.h",
6844 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6845 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6846)
6847
6848xnnpack_unit_test(
6849 name = "f16_gavgpool_minmax_test",
6850 srcs = [
6851 "test/f16-gavgpool-minmax.cc",
6852 "test/gavgpool-microkernel-tester.h",
6853 "src/xnnpack/AlignedAllocator.h",
6854 ] + MICROKERNEL_TEST_HDRS,
6855 deps = MICROKERNEL_TEST_DEPS,
6856)
6857
6858xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006859 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006860 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006861 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006862 "test/gemm-microkernel-tester.h",
6863 "src/xnnpack/AlignedAllocator.h",
6864 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006865 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006866)
6867
6868xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006869 name = "f16_igemm_minmax_test",
6870 srcs = [
6871 "test/f16-igemm-minmax.cc",
6872 "test/gemm-microkernel-tester.h",
6873 "src/xnnpack/AlignedAllocator.h",
6874 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6875 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6876)
6877
6878xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006879 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006880 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006881 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006882 "test/spmm-microkernel-tester.h",
6883 "src/xnnpack/AlignedAllocator.h",
6884 ] + MICROKERNEL_TEST_HDRS,
6885 deps = MICROKERNEL_TEST_DEPS,
6886)
6887
6888xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006889 name = "f16_vadd_minmax_test",
6890 srcs = [
6891 "test/f16-vadd-minmax.cc",
6892 "test/vbinary-microkernel-tester.h",
6893 ] + MICROKERNEL_TEST_HDRS,
6894 deps = MICROKERNEL_TEST_DEPS,
6895)
6896
6897xnnpack_unit_test(
6898 name = "f16_vaddc_minmax_test",
6899 srcs = [
6900 "test/f16-vaddc-minmax.cc",
6901 "test/vbinaryc-microkernel-tester.h",
6902 ] + MICROKERNEL_TEST_HDRS,
6903 deps = MICROKERNEL_TEST_DEPS,
6904)
6905
6906xnnpack_unit_test(
6907 name = "f16_vclamp_test",
6908 srcs = [
6909 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006910 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006911 ] + MICROKERNEL_TEST_HDRS,
6912 deps = MICROKERNEL_TEST_DEPS,
6913)
6914
6915xnnpack_unit_test(
6916 name = "f16_vdiv_minmax_test",
6917 srcs = [
6918 "test/f16-vdiv-minmax.cc",
6919 "test/vbinary-microkernel-tester.h",
6920 ] + MICROKERNEL_TEST_HDRS,
6921 deps = MICROKERNEL_TEST_DEPS,
6922)
6923
6924xnnpack_unit_test(
6925 name = "f16_vdivc_minmax_test",
6926 srcs = [
6927 "test/f16-vdivc-minmax.cc",
6928 "test/vbinaryc-microkernel-tester.h",
6929 ] + MICROKERNEL_TEST_HDRS,
6930 deps = MICROKERNEL_TEST_DEPS,
6931)
6932
6933xnnpack_unit_test(
6934 name = "f16_vrdivc_minmax_test",
6935 srcs = [
6936 "test/f16-vrdivc-minmax.cc",
6937 "test/vbinaryc-microkernel-tester.h",
6938 ] + MICROKERNEL_TEST_HDRS,
6939 deps = MICROKERNEL_TEST_DEPS,
6940)
6941
6942xnnpack_unit_test(
6943 name = "f16_vhswish_test",
6944 srcs = [
6945 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006946 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006947 ] + MICROKERNEL_TEST_HDRS,
6948 deps = MICROKERNEL_TEST_DEPS,
6949)
6950
6951xnnpack_unit_test(
6952 name = "f16_vmax_test",
6953 srcs = [
6954 "test/f16-vmax.cc",
6955 "test/vbinary-microkernel-tester.h",
6956 ] + MICROKERNEL_TEST_HDRS,
6957 deps = MICROKERNEL_TEST_DEPS,
6958)
6959
6960xnnpack_unit_test(
6961 name = "f16_vmaxc_test",
6962 srcs = [
6963 "test/f16-vmaxc.cc",
6964 "test/vbinaryc-microkernel-tester.h",
6965 ] + MICROKERNEL_TEST_HDRS,
6966 deps = MICROKERNEL_TEST_DEPS,
6967)
6968
6969xnnpack_unit_test(
6970 name = "f16_vmin_test",
6971 srcs = [
6972 "test/f16-vmin.cc",
6973 "test/vbinary-microkernel-tester.h",
6974 ] + MICROKERNEL_TEST_HDRS,
6975 deps = MICROKERNEL_TEST_DEPS,
6976)
6977
6978xnnpack_unit_test(
6979 name = "f16_vminc_test",
6980 srcs = [
6981 "test/f16-vminc.cc",
6982 "test/vbinaryc-microkernel-tester.h",
6983 ] + MICROKERNEL_TEST_HDRS,
6984 deps = MICROKERNEL_TEST_DEPS,
6985)
6986
6987xnnpack_unit_test(
6988 name = "f16_vmul_minmax_test",
6989 srcs = [
6990 "test/f16-vmul-minmax.cc",
6991 "test/vbinary-microkernel-tester.h",
6992 ] + MICROKERNEL_TEST_HDRS,
6993 deps = MICROKERNEL_TEST_DEPS,
6994)
6995
6996xnnpack_unit_test(
6997 name = "f16_vmulc_minmax_test",
6998 srcs = [
6999 "test/f16-vmulc-minmax.cc",
7000 "test/vbinaryc-microkernel-tester.h",
7001 ] + MICROKERNEL_TEST_HDRS,
7002 deps = MICROKERNEL_TEST_DEPS,
7003)
7004
7005xnnpack_unit_test(
7006 name = "f16_vmulcaddc_minmax_test",
7007 srcs = [
7008 "test/f16-vmulcaddc-minmax.cc",
7009 "test/vmulcaddc-microkernel-tester.h",
7010 "src/xnnpack/AlignedAllocator.h",
7011 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7012 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7013)
7014
7015xnnpack_unit_test(
7016 name = "f16_vsub_minmax_test",
7017 srcs = [
7018 "test/f16-vsub-minmax.cc",
7019 "test/vbinary-microkernel-tester.h",
7020 ] + MICROKERNEL_TEST_HDRS,
7021 deps = MICROKERNEL_TEST_DEPS,
7022)
7023
7024xnnpack_unit_test(
7025 name = "f16_vsubc_minmax_test",
7026 srcs = [
7027 "test/f16-vsubc-minmax.cc",
7028 "test/vbinaryc-microkernel-tester.h",
7029 ] + MICROKERNEL_TEST_HDRS,
7030 deps = MICROKERNEL_TEST_DEPS,
7031)
7032
7033xnnpack_unit_test(
7034 name = "f16_vrsubc_minmax_test",
7035 srcs = [
7036 "test/f16-vrsubc-minmax.cc",
7037 "test/vbinaryc-microkernel-tester.h",
7038 ] + MICROKERNEL_TEST_HDRS,
7039 deps = MICROKERNEL_TEST_DEPS,
7040)
7041
7042xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007043 name = "f32_argmaxpool_test",
7044 srcs = [
7045 "test/f32-argmaxpool.cc",
7046 "test/argmaxpool-microkernel-tester.h",
7047 "src/xnnpack/AlignedAllocator.h",
7048 ] + MICROKERNEL_TEST_HDRS,
7049 deps = MICROKERNEL_TEST_DEPS,
7050)
7051
7052xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007053 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007054 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007055 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007056 "test/avgpool-microkernel-tester.h",
7057 "src/xnnpack/AlignedAllocator.h",
7058 ] + MICROKERNEL_TEST_HDRS,
7059 deps = MICROKERNEL_TEST_DEPS,
7060)
7061
7062xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07007063 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007064 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07007065 "test/f32-ibilinear.cc",
7066 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007067 "src/xnnpack/AlignedAllocator.h",
7068 ] + MICROKERNEL_TEST_HDRS,
7069 deps = MICROKERNEL_TEST_DEPS,
7070)
7071
7072xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07007073 name = "f32_ibilinear_chw_test",
7074 srcs = [
7075 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07007076 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07007077 "src/xnnpack/AlignedAllocator.h",
7078 ] + MICROKERNEL_TEST_HDRS,
7079 deps = MICROKERNEL_TEST_DEPS,
7080)
7081
7082xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007083 name = "f32_igemm_test",
7084 srcs = [
7085 "test/f32-igemm.cc",
7086 "test/gemm-microkernel-tester.h",
7087 "src/xnnpack/AlignedAllocator.h",
7088 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007089 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007090)
7091
7092xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007093 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007094 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07007095 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007096 "test/gemm-microkernel-tester.h",
7097 "src/xnnpack/AlignedAllocator.h",
7098 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007099 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007100)
7101
7102xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07007103 name = "f32_igemm_minmax_test",
7104 srcs = [
7105 "test/f32-igemm-minmax.cc",
7106 "test/gemm-microkernel-tester.h",
7107 "src/xnnpack/AlignedAllocator.h",
7108 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007109 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07007110)
7111
7112xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007113 name = "f32_conv_hwc_test",
7114 srcs = [
7115 "test/f32-conv-hwc.cc",
7116 "test/conv-hwc-microkernel-tester.h",
7117 "src/xnnpack/AlignedAllocator.h",
7118 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007119 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007120)
7121
7122xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007123 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007124 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007125 "test/f32-conv-hwc2chw.cc",
7126 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007127 "src/xnnpack/AlignedAllocator.h",
7128 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007129 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007130)
7131
7132xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007133 name = "f32_dwconv_test",
7134 srcs = [
7135 "test/f32-dwconv.cc",
7136 "test/dwconv-microkernel-tester.h",
7137 "src/xnnpack/AlignedAllocator.h",
7138 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007139 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007140)
7141
7142xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007143 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007144 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007145 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007146 "test/dwconv-microkernel-tester.h",
7147 "src/xnnpack/AlignedAllocator.h",
7148 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007149 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007150)
7151
7152xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07007153 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007154 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07007155 "test/f32-dwconv2d-chw.cc",
7156 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007157 "src/xnnpack/AlignedAllocator.h",
7158 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007159 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007160)
7161
7162xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007163 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007164 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007165 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007166 "test/gavgpool-microkernel-tester.h",
7167 "src/xnnpack/AlignedAllocator.h",
7168 ] + MICROKERNEL_TEST_HDRS,
7169 deps = MICROKERNEL_TEST_DEPS,
7170)
7171
7172xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007173 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007174 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007175 "test/f32-gavgpool-cw.cc",
7176 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007177 "src/xnnpack/AlignedAllocator.h",
7178 ] + MICROKERNEL_TEST_HDRS,
7179 deps = MICROKERNEL_TEST_DEPS,
7180)
7181
7182xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007183 name = "f32_gemm_test",
7184 srcs = [
7185 "test/f32-gemm.cc",
7186 "test/gemm-microkernel-tester.h",
7187 "src/xnnpack/AlignedAllocator.h",
7188 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007189 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007190)
7191
7192xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007193 name = "f32_gemm_relu_test",
7194 srcs = [
7195 "test/f32-gemm-relu.cc",
7196 "test/gemm-microkernel-tester.h",
7197 "src/xnnpack/AlignedAllocator.h",
7198 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007199 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007200)
7201
7202xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007203 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007204 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007205 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007206 "test/gemm-microkernel-tester.h",
7207 "src/xnnpack/AlignedAllocator.h",
7208 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007209 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007210)
7211
7212xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007213 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007214 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007215 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007216 "test/gemm-microkernel-tester.h",
7217 "src/xnnpack/AlignedAllocator.h",
7218 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007219 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007220)
7221
7222xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007223 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007224 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007225 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007226 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007227 ] + MICROKERNEL_TEST_HDRS,
7228 deps = MICROKERNEL_TEST_DEPS,
7229)
7230
7231xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007232 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007233 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007234 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007235 "test/maxpool-microkernel-tester.h",
7236 ] + MICROKERNEL_TEST_HDRS,
7237 deps = MICROKERNEL_TEST_DEPS,
7238)
7239
7240xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007241 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007242 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007243 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007244 "test/avgpool-microkernel-tester.h",
7245 "src/xnnpack/AlignedAllocator.h",
7246 ] + MICROKERNEL_TEST_HDRS,
7247 deps = MICROKERNEL_TEST_DEPS,
7248)
7249
7250xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007251 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007252 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007253 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007254 "test/gemm-microkernel-tester.h",
7255 "src/xnnpack/AlignedAllocator.h",
7256 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007257 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007258)
7259
7260xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007261 name = "f16_prelu_test",
7262 srcs = [
7263 "test/f16-prelu.cc",
7264 "test/prelu-microkernel-tester.h",
7265 "src/xnnpack/AlignedAllocator.h",
7266 ] + MICROKERNEL_TEST_HDRS,
7267 deps = MICROKERNEL_TEST_DEPS,
7268)
7269
7270xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007271 name = "f32_prelu_test",
7272 srcs = [
7273 "test/f32-prelu.cc",
7274 "test/prelu-microkernel-tester.h",
7275 "src/xnnpack/AlignedAllocator.h",
7276 ] + MICROKERNEL_TEST_HDRS,
7277 deps = MICROKERNEL_TEST_DEPS,
7278)
7279
7280xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007281 name = "f32_raddexpminusmax_test",
7282 srcs = [
7283 "test/f32-raddexpminusmax.cc",
7284 "test/raddexpminusmax-microkernel-tester.h",
7285 ] + MICROKERNEL_TEST_HDRS,
7286 deps = MICROKERNEL_TEST_DEPS,
7287)
7288
7289xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007290 name = "f32_raddextexp_test",
7291 srcs = [
7292 "test/f32-raddextexp.cc",
7293 "test/raddextexp-microkernel-tester.h",
7294 ] + MICROKERNEL_TEST_HDRS,
7295 deps = MICROKERNEL_TEST_DEPS,
7296)
7297
7298xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007299 name = "f32_raddstoreexpminusmax_test",
7300 srcs = [
7301 "test/f32-raddstoreexpminusmax.cc",
7302 "test/raddstoreexpminusmax-microkernel-tester.h",
7303 ] + MICROKERNEL_TEST_HDRS,
7304 deps = MICROKERNEL_TEST_DEPS,
7305)
7306
7307xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007308 name = "f32_rmax_test",
7309 srcs = [
7310 "test/f32-rmax.cc",
7311 "test/rmax-microkernel-tester.h",
7312 ] + MICROKERNEL_TEST_HDRS,
7313 deps = MICROKERNEL_TEST_DEPS,
7314)
7315
7316xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007317 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007318 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007319 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007320 "test/spmm-microkernel-tester.h",
7321 "src/xnnpack/AlignedAllocator.h",
7322 ] + MICROKERNEL_TEST_HDRS,
7323 deps = MICROKERNEL_TEST_DEPS,
7324)
7325
7326xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007327 name = "f32_vabs_test",
7328 srcs = [
7329 "test/f32-vabs.cc",
7330 "test/vunary-microkernel-tester.h",
7331 ] + MICROKERNEL_TEST_HDRS,
7332 deps = MICROKERNEL_TEST_DEPS,
7333)
7334
7335xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007336 name = "f32_vadd_test",
7337 srcs = [
7338 "test/f32-vadd.cc",
7339 "test/vbinary-microkernel-tester.h",
7340 ] + MICROKERNEL_TEST_HDRS,
7341 deps = MICROKERNEL_TEST_DEPS,
7342)
7343
7344xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007345 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007346 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007347 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007348 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007349 ] + MICROKERNEL_TEST_HDRS,
7350 deps = MICROKERNEL_TEST_DEPS,
7351)
7352
7353xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007354 name = "f32_vadd_relu_test",
7355 srcs = [
7356 "test/f32-vadd-relu.cc",
7357 "test/vbinary-microkernel-tester.h",
7358 ] + MICROKERNEL_TEST_HDRS,
7359 deps = MICROKERNEL_TEST_DEPS,
7360)
7361
7362xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007363 name = "f32_vaddc_test",
7364 srcs = [
7365 "test/f32-vaddc.cc",
7366 "test/vbinaryc-microkernel-tester.h",
7367 ] + MICROKERNEL_TEST_HDRS,
7368 deps = MICROKERNEL_TEST_DEPS,
7369)
7370
7371xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007372 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007373 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007374 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007375 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007376 ] + MICROKERNEL_TEST_HDRS,
7377 deps = MICROKERNEL_TEST_DEPS,
7378)
7379
7380xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007381 name = "f32_vaddc_relu_test",
7382 srcs = [
7383 "test/f32-vaddc-relu.cc",
7384 "test/vbinaryc-microkernel-tester.h",
7385 ] + MICROKERNEL_TEST_HDRS,
7386 deps = MICROKERNEL_TEST_DEPS,
7387)
7388
7389xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007390 name = "f32_vclamp_test",
7391 srcs = [
7392 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007393 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007394 ] + MICROKERNEL_TEST_HDRS,
7395 deps = MICROKERNEL_TEST_DEPS,
7396)
7397
7398xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007399 name = "f32_vdiv_test",
7400 srcs = [
7401 "test/f32-vdiv.cc",
7402 "test/vbinary-microkernel-tester.h",
7403 ] + MICROKERNEL_TEST_HDRS,
7404 deps = MICROKERNEL_TEST_DEPS,
7405)
7406
7407xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007408 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007409 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007410 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007411 "test/vbinary-microkernel-tester.h",
7412 ] + MICROKERNEL_TEST_HDRS,
7413 deps = MICROKERNEL_TEST_DEPS,
7414)
7415
7416xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007417 name = "f32_vdiv_relu_test",
7418 srcs = [
7419 "test/f32-vdiv-relu.cc",
7420 "test/vbinary-microkernel-tester.h",
7421 ] + MICROKERNEL_TEST_HDRS,
7422 deps = MICROKERNEL_TEST_DEPS,
7423)
7424
7425xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007426 name = "f32_vdivc_test",
7427 srcs = [
7428 "test/f32-vdivc.cc",
7429 "test/vbinaryc-microkernel-tester.h",
7430 ] + MICROKERNEL_TEST_HDRS,
7431 deps = MICROKERNEL_TEST_DEPS,
7432)
7433
7434xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007435 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007436 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007437 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007438 "test/vbinaryc-microkernel-tester.h",
7439 ] + MICROKERNEL_TEST_HDRS,
7440 deps = MICROKERNEL_TEST_DEPS,
7441)
7442
7443xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007444 name = "f32_vdivc_relu_test",
7445 srcs = [
7446 "test/f32-vdivc-relu.cc",
7447 "test/vbinaryc-microkernel-tester.h",
7448 ] + MICROKERNEL_TEST_HDRS,
7449 deps = MICROKERNEL_TEST_DEPS,
7450)
7451
7452xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007453 name = "f32_vrdivc_test",
7454 srcs = [
7455 "test/f32-vrdivc.cc",
7456 "test/vbinaryc-microkernel-tester.h",
7457 ] + MICROKERNEL_TEST_HDRS,
7458 deps = MICROKERNEL_TEST_DEPS,
7459)
7460
7461xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007462 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007463 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007464 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007465 "test/vbinaryc-microkernel-tester.h",
7466 ] + MICROKERNEL_TEST_HDRS,
7467 deps = MICROKERNEL_TEST_DEPS,
7468)
7469
7470xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007471 name = "f32_vrdivc_relu_test",
7472 srcs = [
7473 "test/f32-vrdivc-relu.cc",
7474 "test/vbinaryc-microkernel-tester.h",
7475 ] + MICROKERNEL_TEST_HDRS,
7476 deps = MICROKERNEL_TEST_DEPS,
7477)
7478
7479xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007480 name = "f32_velu_test",
7481 srcs = [
7482 "test/f32-velu.cc",
7483 "test/vunary-microkernel-tester.h",
7484 ] + MICROKERNEL_TEST_HDRS,
7485 deps = MICROKERNEL_TEST_DEPS,
7486)
7487
7488xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007489 name = "f32_vmax_test",
7490 srcs = [
7491 "test/f32-vmax.cc",
7492 "test/vbinary-microkernel-tester.h",
7493 ] + MICROKERNEL_TEST_HDRS,
7494 deps = MICROKERNEL_TEST_DEPS,
7495)
7496
7497xnnpack_unit_test(
7498 name = "f32_vmaxc_test",
7499 srcs = [
7500 "test/f32-vmaxc.cc",
7501 "test/vbinaryc-microkernel-tester.h",
7502 ] + MICROKERNEL_TEST_HDRS,
7503 deps = MICROKERNEL_TEST_DEPS,
7504)
7505
7506xnnpack_unit_test(
7507 name = "f32_vmin_test",
7508 srcs = [
7509 "test/f32-vmin.cc",
7510 "test/vbinary-microkernel-tester.h",
7511 ] + MICROKERNEL_TEST_HDRS,
7512 deps = MICROKERNEL_TEST_DEPS,
7513)
7514
7515xnnpack_unit_test(
7516 name = "f32_vminc_test",
7517 srcs = [
7518 "test/f32-vminc.cc",
7519 "test/vbinaryc-microkernel-tester.h",
7520 ] + MICROKERNEL_TEST_HDRS,
7521 deps = MICROKERNEL_TEST_DEPS,
7522)
7523
7524xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007525 name = "f32_vmul_test",
7526 srcs = [
7527 "test/f32-vmul.cc",
7528 "test/vbinary-microkernel-tester.h",
7529 ] + MICROKERNEL_TEST_HDRS,
7530 deps = MICROKERNEL_TEST_DEPS,
7531)
7532
7533xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007534 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007535 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007536 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007537 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007538 ] + MICROKERNEL_TEST_HDRS,
7539 deps = MICROKERNEL_TEST_DEPS,
7540)
7541
7542xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007543 name = "f32_vmul_relu_test",
7544 srcs = [
7545 "test/f32-vmul-relu.cc",
7546 "test/vbinary-microkernel-tester.h",
7547 ] + MICROKERNEL_TEST_HDRS,
7548 deps = MICROKERNEL_TEST_DEPS,
7549)
7550
7551xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007552 name = "f32_vmulc_test",
7553 srcs = [
7554 "test/f32-vmulc.cc",
7555 "test/vbinaryc-microkernel-tester.h",
7556 ] + MICROKERNEL_TEST_HDRS,
7557 deps = MICROKERNEL_TEST_DEPS,
7558)
7559
7560xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007561 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007562 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007563 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007564 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007565 ] + MICROKERNEL_TEST_HDRS,
7566 deps = MICROKERNEL_TEST_DEPS,
7567)
7568
7569xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007570 name = "f32_vmulc_relu_test",
7571 srcs = [
7572 "test/f32-vmulc-relu.cc",
7573 "test/vbinaryc-microkernel-tester.h",
7574 ] + MICROKERNEL_TEST_HDRS,
7575 deps = MICROKERNEL_TEST_DEPS,
7576)
7577
7578xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007579 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007580 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007581 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007582 "test/vmulcaddc-microkernel-tester.h",
7583 "src/xnnpack/AlignedAllocator.h",
7584 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007585 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007586)
7587
7588xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007589 name = "f32_vlrelu_test",
7590 srcs = [
7591 "test/f32-vlrelu.cc",
7592 "test/vunary-microkernel-tester.h",
7593 ] + MICROKERNEL_TEST_HDRS,
7594 deps = MICROKERNEL_TEST_DEPS,
7595)
7596
7597xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007598 name = "f32_vneg_test",
7599 srcs = [
7600 "test/f32-vneg.cc",
7601 "test/vunary-microkernel-tester.h",
7602 ] + MICROKERNEL_TEST_HDRS,
7603 deps = MICROKERNEL_TEST_DEPS,
7604)
7605
7606xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007607 name = "f32_vrelu_test",
7608 srcs = [
7609 "test/f32-vrelu.cc",
7610 "test/vunary-microkernel-tester.h",
7611 ] + MICROKERNEL_TEST_HDRS,
7612 deps = MICROKERNEL_TEST_DEPS,
7613)
7614
7615xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007616 name = "f32_vrndne_test",
7617 srcs = [
7618 "test/f32-vrndne.cc",
7619 "test/vunary-microkernel-tester.h",
7620 ] + MICROKERNEL_TEST_HDRS,
7621 deps = MICROKERNEL_TEST_DEPS,
7622)
7623
7624xnnpack_unit_test(
7625 name = "f32_vrndz_test",
7626 srcs = [
7627 "test/f32-vrndz.cc",
7628 "test/vunary-microkernel-tester.h",
7629 ] + MICROKERNEL_TEST_HDRS,
7630 deps = MICROKERNEL_TEST_DEPS,
7631)
7632
7633xnnpack_unit_test(
7634 name = "f32_vrndu_test",
7635 srcs = [
7636 "test/f32-vrndu.cc",
7637 "test/vunary-microkernel-tester.h",
7638 ] + MICROKERNEL_TEST_HDRS,
7639 deps = MICROKERNEL_TEST_DEPS,
7640)
7641
7642xnnpack_unit_test(
7643 name = "f32_vrndd_test",
7644 srcs = [
7645 "test/f32-vrndd.cc",
7646 "test/vunary-microkernel-tester.h",
7647 ] + MICROKERNEL_TEST_HDRS,
7648 deps = MICROKERNEL_TEST_DEPS,
7649)
7650
7651xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007652 name = "f32_vscale_test",
7653 srcs = [
7654 "test/f32-vscale.cc",
7655 "test/vscale-microkernel-tester.h",
7656 ] + MICROKERNEL_TEST_HDRS,
7657 deps = MICROKERNEL_TEST_DEPS,
7658)
7659
7660xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007661 name = "f32_vscaleexpminusmax_test",
7662 srcs = [
7663 "test/f32-vscaleexpminusmax.cc",
7664 "test/vscaleexpminusmax-microkernel-tester.h",
7665 ] + MICROKERNEL_TEST_HDRS,
7666 deps = MICROKERNEL_TEST_DEPS,
7667)
7668
7669xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007670 name = "f32_vscaleextexp_test",
7671 srcs = [
7672 "test/f32-vscaleextexp.cc",
7673 "test/vscaleextexp-microkernel-tester.h",
7674 ] + MICROKERNEL_TEST_HDRS,
7675 deps = MICROKERNEL_TEST_DEPS,
7676)
7677
7678xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007679 name = "f32_vsigmoid_test",
7680 srcs = [
7681 "test/f32-vsigmoid.cc",
7682 "test/vunary-microkernel-tester.h",
7683 ] + MICROKERNEL_TEST_HDRS,
7684 deps = MICROKERNEL_TEST_DEPS,
7685)
7686
7687xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007688 name = "f32_vsqr_test",
7689 srcs = [
7690 "test/f32-vsqr.cc",
7691 "test/vunary-microkernel-tester.h",
7692 ] + MICROKERNEL_TEST_HDRS,
7693 deps = MICROKERNEL_TEST_DEPS,
7694)
7695
7696xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007697 name = "f32_vsqrdiff_test",
7698 srcs = [
7699 "test/f32-vsqrdiff.cc",
7700 "test/vbinary-microkernel-tester.h",
7701 ] + MICROKERNEL_TEST_HDRS,
7702 deps = MICROKERNEL_TEST_DEPS,
7703)
7704
7705xnnpack_unit_test(
7706 name = "f32_vsqrdiffc_test",
7707 srcs = [
7708 "test/f32-vsqrdiffc.cc",
7709 "test/vbinaryc-microkernel-tester.h",
7710 ] + MICROKERNEL_TEST_HDRS,
7711 deps = MICROKERNEL_TEST_DEPS,
7712)
7713
7714xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007715 name = "f32_vsqrt_test",
7716 srcs = [
7717 "test/f32-vsqrt.cc",
7718 "test/vunary-microkernel-tester.h",
7719 ] + MICROKERNEL_TEST_HDRS,
7720 deps = MICROKERNEL_TEST_DEPS,
7721)
7722
7723xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007724 name = "f32_vsub_test",
7725 srcs = [
7726 "test/f32-vsub.cc",
7727 "test/vbinary-microkernel-tester.h",
7728 ] + MICROKERNEL_TEST_HDRS,
7729 deps = MICROKERNEL_TEST_DEPS,
7730)
7731
7732xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007733 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007734 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007735 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007736 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007737 ] + MICROKERNEL_TEST_HDRS,
7738 deps = MICROKERNEL_TEST_DEPS,
7739)
7740
7741xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007742 name = "f32_vsub_relu_test",
7743 srcs = [
7744 "test/f32-vsub-relu.cc",
7745 "test/vbinary-microkernel-tester.h",
7746 ] + MICROKERNEL_TEST_HDRS,
7747 deps = MICROKERNEL_TEST_DEPS,
7748)
7749
7750xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007751 name = "f32_vsubc_test",
7752 srcs = [
7753 "test/f32-vsubc.cc",
7754 "test/vbinaryc-microkernel-tester.h",
7755 ] + MICROKERNEL_TEST_HDRS,
7756 deps = MICROKERNEL_TEST_DEPS,
7757)
7758
7759xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007760 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007761 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007762 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007763 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007764 ] + MICROKERNEL_TEST_HDRS,
7765 deps = MICROKERNEL_TEST_DEPS,
7766)
7767
7768xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007769 name = "f32_vsubc_relu_test",
7770 srcs = [
7771 "test/f32-vsubc-relu.cc",
7772 "test/vbinaryc-microkernel-tester.h",
7773 ] + MICROKERNEL_TEST_HDRS,
7774 deps = MICROKERNEL_TEST_DEPS,
7775)
7776
7777xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007778 name = "f32_vrsubc_test",
7779 srcs = [
7780 "test/f32-vrsubc.cc",
7781 "test/vbinaryc-microkernel-tester.h",
7782 ] + MICROKERNEL_TEST_HDRS,
7783 deps = MICROKERNEL_TEST_DEPS,
7784)
7785
7786xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007787 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007788 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007789 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007790 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007791 ] + MICROKERNEL_TEST_HDRS,
7792 deps = MICROKERNEL_TEST_DEPS,
7793)
7794
7795xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007796 name = "f32_vrsubc_relu_test",
7797 srcs = [
7798 "test/f32-vrsubc-relu.cc",
7799 "test/vbinaryc-microkernel-tester.h",
7800 ] + MICROKERNEL_TEST_HDRS,
7801 deps = MICROKERNEL_TEST_DEPS,
7802)
7803
7804xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007805 name = "qc8_dwconv_minmax_fp32_test",
7806 timeout = "moderate",
7807 srcs = [
7808 "test/qc8-dwconv-minmax-fp32.cc",
7809 "test/dwconv-microkernel-tester.h",
7810 "src/xnnpack/AlignedAllocator.h",
7811 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7812 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7813)
7814
7815xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007816 name = "qc8_gemm_minmax_fp32_test",
7817 timeout = "moderate",
7818 srcs = [
7819 "test/qc8-gemm-minmax-fp32.cc",
7820 "test/gemm-microkernel-tester.h",
7821 "src/xnnpack/AlignedAllocator.h",
7822 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7823 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7824)
7825
7826xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007827 name = "qc8_igemm_minmax_fp32_test",
7828 timeout = "moderate",
7829 srcs = [
7830 "test/qc8-igemm-minmax-fp32.cc",
7831 "test/gemm-microkernel-tester.h",
7832 "src/xnnpack/AlignedAllocator.h",
7833 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7834 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7835)
7836
7837xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007838 name = "qs8_dwconv_minmax_fp32_test",
7839 srcs = [
7840 "test/qs8-dwconv-minmax-fp32.cc",
7841 "test/dwconv-microkernel-tester.h",
7842 "src/xnnpack/AlignedAllocator.h",
7843 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7844 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7845)
7846
7847xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007848 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007849 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007850 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007851 "test/dwconv-microkernel-tester.h",
7852 "src/xnnpack/AlignedAllocator.h",
7853 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7854 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7855)
7856
7857xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007858 name = "qs8_dwconv_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007859 srcs = [
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007860 "test/qs8-dwconv-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007861 "test/dwconv-microkernel-tester.h",
7862 "src/xnnpack/AlignedAllocator.h",
7863 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7864 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7865)
7866
7867xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007868 name = "qs8_gavgpool_minmax_test",
7869 srcs = [
7870 "test/qs8-gavgpool-minmax.cc",
7871 "test/gavgpool-microkernel-tester.h",
7872 "src/xnnpack/AlignedAllocator.h",
7873 ] + MICROKERNEL_TEST_HDRS,
7874 deps = MICROKERNEL_TEST_DEPS,
7875)
7876
7877xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07007878 name = "qs8_gemm_minmax_fp32_test",
7879 timeout = "moderate",
7880 srcs = [
7881 "test/qs8-gemm-minmax-fp32.cc",
7882 "test/gemm-microkernel-tester.h",
7883 "src/xnnpack/AlignedAllocator.h",
7884 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7885 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7886)
7887
7888xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007889 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007890 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007891 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007892 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007893 "test/gemm-microkernel-tester.h",
7894 "src/xnnpack/AlignedAllocator.h",
7895 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7896 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7897)
7898
7899xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07007900 name = "qs8_gemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007901 timeout = "moderate",
7902 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07007903 "test/qs8-gemm-minmax-rndnu.cc",
7904 "test/gemm-microkernel-tester.h",
7905 "src/xnnpack/AlignedAllocator.h",
7906 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7907 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7908)
7909
7910xnnpack_unit_test(
7911 name = "qs8_igemm_minmax_fp32_test",
7912 timeout = "moderate",
7913 srcs = [
7914 "test/qs8-igemm-minmax-fp32.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007915 "test/gemm-microkernel-tester.h",
7916 "src/xnnpack/AlignedAllocator.h",
7917 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7918 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7919)
7920
7921xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007922 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007923 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007924 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007925 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007926 "test/gemm-microkernel-tester.h",
7927 "src/xnnpack/AlignedAllocator.h",
7928 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7929 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7930)
7931
7932xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07007933 name = "qs8_igemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007934 timeout = "moderate",
7935 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07007936 "test/qs8-igemm-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007937 "test/gemm-microkernel-tester.h",
7938 "src/xnnpack/AlignedAllocator.h",
7939 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7940 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7941)
7942
7943xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007944 name = "qs8_requantization_test",
7945 srcs = [
7946 "src/xnnpack/requantization-stubs.h",
7947 "test/qs8-requantization.cc",
7948 "test/requantization-tester.h",
7949 ] + MICROKERNEL_TEST_HDRS,
7950 deps = MICROKERNEL_TEST_DEPS,
7951)
7952
7953xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007954 name = "qs8_vadd_minmax_test",
7955 srcs = [
7956 "test/qs8-vadd-minmax.cc",
7957 "test/vadd-microkernel-tester.h",
7958 ] + MICROKERNEL_TEST_HDRS,
7959 deps = MICROKERNEL_TEST_DEPS,
7960)
7961
7962xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007963 name = "qs8_vaddc_minmax_test",
7964 srcs = [
7965 "test/qs8-vaddc-minmax.cc",
7966 "test/vaddc-microkernel-tester.h",
7967 ] + MICROKERNEL_TEST_HDRS,
7968 deps = MICROKERNEL_TEST_DEPS,
7969)
7970
7971xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007972 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007973 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007974 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007975 "test/avgpool-microkernel-tester.h",
7976 "src/xnnpack/AlignedAllocator.h",
7977 ] + MICROKERNEL_TEST_HDRS,
7978 deps = MICROKERNEL_TEST_DEPS,
7979)
7980
7981xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07007982 name = "qu8_dwconv_minmax_fp32_test",
7983 srcs = [
7984 "test/qu8-dwconv-minmax-fp32.cc",
7985 "test/dwconv-microkernel-tester.h",
7986 "src/xnnpack/AlignedAllocator.h",
7987 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7988 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7989)
7990
7991xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07007992 name = "qu8_igemm_minmax_fp32_test",
7993 srcs = [
7994 "test/qu8-igemm-minmax-fp32.cc",
7995 "test/gemm-microkernel-tester.h",
7996 "src/xnnpack/AlignedAllocator.h",
7997 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7998 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7999)
8000
8001xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008002 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008003 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008004 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07008005 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008006 "src/xnnpack/AlignedAllocator.h",
8007 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008008 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008009)
8010
8011xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008012 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008013 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008014 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008015 "test/gavgpool-microkernel-tester.h",
8016 "src/xnnpack/AlignedAllocator.h",
8017 ] + MICROKERNEL_TEST_HDRS,
8018 deps = MICROKERNEL_TEST_DEPS,
8019)
8020
8021xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07008022 name = "qu8_gemm_minmax_fp32_test",
8023 srcs = [
8024 "test/qu8-gemm-minmax-fp32.cc",
8025 "test/gemm-microkernel-tester.h",
8026 "src/xnnpack/AlignedAllocator.h",
8027 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8028 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8029)
8030
8031xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008032 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008033 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008034 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008035 "test/gemm-microkernel-tester.h",
8036 "src/xnnpack/AlignedAllocator.h",
8037 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008038 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008039)
8040
8041xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07008042 name = "qu8_requantization_test",
8043 srcs = [
8044 "src/xnnpack/requantization-stubs.h",
8045 "test/qu8-requantization.cc",
8046 "test/requantization-tester.h",
8047 ] + MICROKERNEL_TEST_HDRS,
8048 deps = MICROKERNEL_TEST_DEPS,
8049)
8050
8051xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008052 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008053 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008054 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008055 "test/vadd-microkernel-tester.h",
8056 ] + MICROKERNEL_TEST_HDRS,
8057 deps = MICROKERNEL_TEST_DEPS,
8058)
8059
8060xnnpack_unit_test(
Marat Dukhan76e78c82021-07-20 21:11:23 -07008061 name = "qu8_vaddc_minmax_test",
8062 srcs = [
8063 "test/qu8-vaddc-minmax.cc",
8064 "test/vaddc-microkernel-tester.h",
8065 ] + MICROKERNEL_TEST_HDRS,
8066 deps = MICROKERNEL_TEST_DEPS,
8067)
8068
8069xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008070 name = "u8_lut32norm_test",
8071 srcs = [
8072 "test/u8-lut32norm.cc",
8073 "test/lut-norm-microkernel-tester.h",
8074 ] + MICROKERNEL_TEST_HDRS,
8075 deps = MICROKERNEL_TEST_DEPS,
8076)
8077
8078xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07008079 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008080 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07008081 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008082 "test/maxpool-microkernel-tester.h",
8083 ] + MICROKERNEL_TEST_HDRS,
8084 deps = MICROKERNEL_TEST_DEPS,
8085)
8086
8087xnnpack_unit_test(
8088 name = "u8_rmax_test",
8089 srcs = [
8090 "test/u8-rmax.cc",
8091 "test/rmax-microkernel-tester.h",
8092 ] + MICROKERNEL_TEST_HDRS,
8093 deps = MICROKERNEL_TEST_DEPS,
8094)
8095
8096xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07008097 name = "u8_vclamp_test",
8098 srcs = [
8099 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07008100 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07008101 ] + MICROKERNEL_TEST_HDRS,
8102 deps = MICROKERNEL_TEST_DEPS,
8103)
8104
8105xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008106 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08008107 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008108 "test/x32-depthtospace2d-chw2hwc.cc",
8109 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08008110 ] + MICROKERNEL_TEST_HDRS,
8111 deps = MICROKERNEL_TEST_DEPS,
8112)
8113
8114xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07008115 name = "x32_fill_test",
8116 srcs = [
8117 "test/x32-fill.cc",
8118 "test/fill-microkernel-tester.h",
8119 ] + MICROKERNEL_TEST_HDRS,
8120 deps = MICROKERNEL_TEST_DEPS,
8121)
8122
8123xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008124 name = "x32_packx_test",
8125 srcs = [
8126 "test/x32-packx.cc",
8127 "test/pack-microkernel-tester.h",
8128 "src/xnnpack/AlignedAllocator.h",
8129 ] + MICROKERNEL_TEST_HDRS,
8130 deps = MICROKERNEL_TEST_DEPS,
8131)
8132
8133xnnpack_unit_test(
8134 name = "x32_pad_test",
8135 srcs = [
8136 "test/x32-pad.cc",
8137 "test/pad-microkernel-tester.h",
8138 ] + MICROKERNEL_TEST_HDRS,
8139 deps = MICROKERNEL_TEST_DEPS,
8140)
8141
8142xnnpack_unit_test(
8143 name = "x32_unpool_test",
8144 srcs = [
8145 "test/x32-unpool.cc",
8146 "test/unpool-microkernel-tester.h",
8147 ] + MICROKERNEL_TEST_HDRS,
8148 deps = MICROKERNEL_TEST_DEPS,
8149)
8150
8151xnnpack_unit_test(
8152 name = "x32_zip_test",
8153 srcs = [
8154 "test/x32-zip.cc",
8155 "test/zip-microkernel-tester.h",
8156 ] + MICROKERNEL_TEST_HDRS,
8157 deps = MICROKERNEL_TEST_DEPS,
8158)
8159
8160xnnpack_unit_test(
8161 name = "x8_lut_test",
8162 srcs = [
8163 "test/x8-lut.cc",
8164 "test/lut-microkernel-tester.h",
8165 ] + MICROKERNEL_TEST_HDRS,
8166 deps = MICROKERNEL_TEST_DEPS,
8167)
8168
8169xnnpack_unit_test(
8170 name = "x8_zip_test",
8171 srcs = [
8172 "test/x8-zip.cc",
8173 "test/zip-microkernel-tester.h",
8174 ] + MICROKERNEL_TEST_HDRS,
8175 deps = MICROKERNEL_TEST_DEPS,
8176)
8177
Marat Dukhan20c3b922020-03-10 03:45:06 -07008178########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008179
8180xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07008181 name = "operator_size_test",
8182 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008183 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008184)
8185
Marat Dukhan20c3b922020-03-10 03:45:06 -07008186xnnpack_binary(
8187 name = "subgraph_size_test",
8188 srcs = ["test/subgraph-size.c"],
8189 deps = [":XNNPACK"],
8190)
8191
8192########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008193
8194xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008195 name = "abs_nc_test",
8196 srcs = [
8197 "test/abs-nc.cc",
8198 "test/abs-operator-tester.h",
8199 ],
8200 deps = OPERATOR_TEST_DEPS,
8201)
8202
8203xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008204 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008205 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008206 srcs = [
8207 "test/add-nd.cc",
8208 "test/binary-elementwise-operator-tester.h",
8209 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008210 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008211)
8212
8213xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008214 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008215 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008216 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008217 "test/argmax-pooling-operator-tester.h",
8218 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008219 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008220)
8221
8222xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008223 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008224 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008225 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008226 "test/average-pooling-operator-tester.h",
8227 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008228 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008229)
8230
8231xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008232 name = "bankers_rounding_nc_test",
8233 srcs = [
8234 "test/bankers-rounding-nc.cc",
8235 "test/bankers-rounding-operator-tester.h",
8236 ],
8237 deps = OPERATOR_TEST_DEPS,
8238)
8239
8240xnnpack_unit_test(
8241 name = "ceiling_nc_test",
8242 srcs = [
8243 "test/ceiling-nc.cc",
8244 "test/ceiling-operator-tester.h",
8245 ],
8246 deps = OPERATOR_TEST_DEPS,
8247)
8248
8249xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008250 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008251 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008252 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008253 "test/channel-shuffle-operator-tester.h",
8254 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008255 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008256)
8257
8258xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008259 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008260 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008261 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008262 "test/clamp-operator-tester.h",
8263 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008264 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008265)
8266
8267xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008268 name = "constant_pad_nd_test",
8269 srcs = [
8270 "test/constant-pad-nd.cc",
8271 "test/constant-pad-operator-tester.h",
8272 ],
8273 deps = OPERATOR_TEST_DEPS,
8274)
8275
8276xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008277 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008278 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008279 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008280 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008281 "test/convolution-operator-tester.h",
8282 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008283 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008284)
8285
8286xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008287 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008288 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008289 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008290 "test/convolution-nchw.cc",
8291 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008292 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008293 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008294)
8295
8296xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008297 name = "copy_nc_test",
8298 srcs = [
8299 "test/copy-nc.cc",
8300 "test/copy-operator-tester.h",
8301 ],
8302 deps = OPERATOR_TEST_DEPS,
8303)
8304
8305xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008306 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008307 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008308 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008309 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008310 "test/deconvolution-operator-tester.h",
8311 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008312 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008313)
8314
8315xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008316 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008317 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008318 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008319 "test/depth-to-space-operator-tester.h",
8320 ] + OPERATOR_TEST_PARAMS_HDRS,
8321 deps = OPERATOR_TEST_DEPS,
8322)
8323
8324xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008325 name = "depth_to_space_nhwc_test",
8326 srcs = [
8327 "test/depth-to-space-nhwc.cc",
8328 "test/depth-to-space-operator-tester.h",
8329 ] + OPERATOR_TEST_PARAMS_HDRS,
8330 deps = OPERATOR_TEST_DEPS,
8331)
8332
8333xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008334 name = "divide_nd_test",
8335 srcs = [
8336 "test/binary-elementwise-operator-tester.h",
8337 "test/divide-nd.cc",
8338 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008339 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008340)
8341
8342xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008343 name = "elu_nc_test",
8344 srcs = [
8345 "test/elu-nc.cc",
8346 "test/elu-operator-tester.h",
8347 ],
8348 deps = OPERATOR_TEST_DEPS,
8349)
8350
8351xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008352 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008353 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008354 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008355 "test/fully-connected-operator-tester.h",
8356 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008357 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008358)
8359
8360xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008361 name = "floor_nc_test",
8362 srcs = [
8363 "test/floor-nc.cc",
8364 "test/floor-operator-tester.h",
8365 ],
8366 deps = OPERATOR_TEST_DEPS,
8367)
8368
8369xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008370 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008371 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008372 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008373 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008374 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008375 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008376)
8377
8378xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008379 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008380 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008381 "test/global-average-pooling-ncw.cc",
8382 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008383 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008384 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008385)
8386
8387xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008388 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008389 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008390 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008391 "test/hardswish-operator-tester.h",
8392 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008393 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008394)
8395
8396xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008397 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008398 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008399 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008400 "test/leaky-relu-operator-tester.h",
8401 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008402 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008403)
8404
8405xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008406 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008407 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008408 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008409 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008410 "test/max-pooling-operator-tester.h",
8411 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008412 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008413)
8414
8415xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008416 name = "maximum_nd_test",
8417 srcs = [
8418 "test/binary-elementwise-operator-tester.h",
8419 "test/maximum-nd.cc",
8420 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008421 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008422)
8423
8424xnnpack_unit_test(
8425 name = "minimum_nd_test",
8426 srcs = [
8427 "test/binary-elementwise-operator-tester.h",
8428 "test/minimum-nd.cc",
8429 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008430 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008431)
8432
8433xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008434 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008435 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008436 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008437 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008438 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008439 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008440)
8441
8442xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008443 name = "negate_nc_test",
8444 srcs = [
8445 "test/negate-nc.cc",
8446 "test/negate-operator-tester.h",
8447 ],
8448 deps = OPERATOR_TEST_DEPS,
8449)
8450
8451xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008452 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008453 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008454 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008455 "test/prelu-operator-tester.h",
8456 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008457 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008458)
8459
8460xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008461 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008462 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008463 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008464 "test/resize-bilinear-operator-tester.h",
8465 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008466 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008467)
8468
8469xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008470 name = "resize_bilinear_nchw_test",
8471 srcs = [
8472 "test/resize-bilinear-nchw.cc",
8473 "test/resize-bilinear-operator-tester.h",
8474 ] + OPERATOR_TEST_PARAMS_HDRS,
8475 deps = OPERATOR_TEST_DEPS,
8476)
8477
8478xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008479 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008480 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008481 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008482 "test/sigmoid-operator-tester.h",
8483 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008484 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008485)
8486
8487xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008488 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008489 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008490 "test/softmax-nc.cc",
8491 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008492 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008493 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008494)
8495
8496xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008497 name = "square_nc_test",
8498 srcs = [
8499 "test/square-nc.cc",
8500 "test/square-operator-tester.h",
8501 ],
8502 deps = OPERATOR_TEST_DEPS,
8503)
8504
8505xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008506 name = "square_root_nc_test",
8507 srcs = [
8508 "test/square-root-nc.cc",
8509 "test/square-root-operator-tester.h",
8510 ],
8511 deps = OPERATOR_TEST_DEPS,
8512)
8513
8514xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008515 name = "squared_difference_nd_test",
8516 srcs = [
8517 "test/binary-elementwise-operator-tester.h",
8518 "test/squared-difference-nd.cc",
8519 ],
8520 deps = OPERATOR_TEST_DEPS,
8521)
8522
8523xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008524 name = "subtract_nd_test",
8525 srcs = [
8526 "test/binary-elementwise-operator-tester.h",
8527 "test/subtract-nd.cc",
8528 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008529 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008530)
8531
8532xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008533 name = "truncation_nc_test",
8534 srcs = [
8535 "test/truncation-nc.cc",
8536 "test/truncation-operator-tester.h",
8537 ],
8538 deps = OPERATOR_TEST_DEPS,
8539)
8540
8541xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008542 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008543 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008544 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008545 "test/unpooling-operator-tester.h",
8546 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008547 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008548)
8549
Chao Mei6ddfc602020-05-13 22:29:36 -07008550############################### Misc unit tests ###############################
8551
8552xnnpack_unit_test(
8553 name = "memory_planner_test",
8554 srcs = [
8555 "test/memory-planner-test.cc",
8556 ],
8557 deps = [
8558 ":XNNPACK",
8559 ":memory_planner",
8560 ],
8561)
8562
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008563xnnpack_unit_test(
8564 name = "subgraph_nchw_test",
8565 srcs = [
8566 "src/xnnpack/subgraph.h",
8567 "test/subgraph-nchw.cc",
8568 "test/subgraph-tester.h",
8569 ],
8570 deps = [
8571 ":XNNPACK",
8572 ],
8573)
8574
Marat Dukhan08c4a432019-10-03 09:29:21 -07008575############################# Build configurations #############################
8576
Marat Dukhanb8642352019-10-30 15:43:02 -07008577# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008578config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008579 name = "xnn_enable_assembly_explicit_true",
8580 define_values = {"xnn_enable_assembly": "true"},
8581)
8582
8583# Disables usage of assembly kernels.
8584config_setting(
8585 name = "xnn_enable_assembly_explicit_false",
8586 define_values = {"xnn_enable_assembly": "false"},
8587)
8588
Marat Dukhan9de90e02020-06-18 16:04:12 -07008589# Enables usage of sparse inference.
8590config_setting(
8591 name = "xnn_enable_sparse_explicit_true",
8592 define_values = {"xnn_enable_sparse": "true"},
8593)
8594
8595# Disables usage of sparse inference.
8596config_setting(
8597 name = "xnn_enable_sparse_explicit_false",
8598 define_values = {"xnn_enable_sparse": "false"},
8599)
8600
Marat Dukhan05702cf2020-03-26 15:41:33 -07008601# Disables usage of HMP-aware optimizations.
8602config_setting(
8603 name = "xnn_enable_hmp_explicit_false",
8604 define_values = {"xnn_enable_hmp": "false"},
8605)
8606
Chao Mei6ddfc602020-05-13 22:29:36 -07008607# Enable usage of optimized memory allocation
8608config_setting(
8609 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008610 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008611)
8612
8613# Disable usage of optimized memory allocation
8614config_setting(
8615 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008616 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008617)
8618
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008619# Enable QS8 inference in TFLite-specific version
8620config_setting(
8621 name = "xnn_enable_qs8_explicit_true",
8622 define_values = {"xnn_enable_qs8": "true"},
8623)
8624
8625# Disable QS8 inference in TFLite-specific version
8626config_setting(
8627 name = "xnn_enable_qs8_explicit_false",
8628 define_values = {"xnn_enable_qs8": "false"},
8629)
8630
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008631# Enable QU8 inference in TFLite-specific version
8632config_setting(
8633 name = "xnn_enable_qu8_explicit_true",
8634 define_values = {"xnn_enable_qu8": "true"},
8635)
8636
8637# Disable QU8 inference in TFLite-specific version
8638config_setting(
8639 name = "xnn_enable_qu8_explicit_false",
8640 define_values = {"xnn_enable_qu8": "false"},
8641)
8642
Marat Dukhanb8642352019-10-30 15:43:02 -07008643# Builds with -c dbg
8644config_setting(
8645 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008646 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008647 "compilation_mode": "dbg",
8648 },
8649)
8650
8651# Builds with -c opt
8652config_setting(
8653 name = "optimized_build",
8654 values = {
8655 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008656 },
8657)
8658
8659config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008660 name = "linux_k8",
8661 values = {"cpu": "k8"},
8662)
8663
8664config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008665 name = "linux_arm",
8666 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008667)
8668
8669config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008670 name = "linux_armeabi",
8671 values = {"cpu": "armeabi"},
8672)
8673
8674config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008675 name = "linux_armhf",
8676 values = {"cpu": "armhf"},
8677)
8678
8679config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008680 name = "linux_armv7a",
8681 values = {"cpu": "armv7a"},
8682)
8683
8684config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008685 name = "linux_aarch64",
8686 values = {"cpu": "aarch64"},
8687)
8688
8689config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008690 name = "android",
8691 values = {"crosstool_top": "//external:android/crosstool"},
8692)
8693
8694config_setting(
8695 name = "android_armv7",
8696 values = {
8697 "crosstool_top": "//external:android/crosstool",
8698 "cpu": "armeabi-v7a",
8699 },
8700)
8701
8702config_setting(
8703 name = "android_arm64",
8704 values = {
8705 "crosstool_top": "//external:android/crosstool",
8706 "cpu": "arm64-v8a",
8707 },
8708)
8709
8710config_setting(
8711 name = "android_x86",
8712 values = {
8713 "crosstool_top": "//external:android/crosstool",
8714 "cpu": "x86",
8715 },
8716)
8717
8718config_setting(
8719 name = "android_x86_64",
8720 values = {
8721 "crosstool_top": "//external:android/crosstool",
8722 "cpu": "x86_64",
8723 },
8724)
8725
8726config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008727 name = "windows_x86_64",
8728 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008729)
8730
8731config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008732 name = "windows_x86_64_clang",
8733 values = {
8734 "compiler": "clang-cl",
8735 "cpu": "x64_windows",
8736 },
8737)
8738
8739config_setting(
8740 name = "windows_x86_64_mingw",
8741 values = {
8742 "compiler": "mingw-gcc",
8743 "cpu": "x64_windows",
8744 },
8745)
8746
8747config_setting(
8748 name = "windows_x86_64_msys",
8749 values = {
8750 "compiler": "msys-gcc",
8751 "cpu": "x64_windows",
8752 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008753)
8754
8755config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008756 name = "macos_x86_64",
8757 values = {
8758 "apple_platform_type": "macos",
8759 "cpu": "darwin",
8760 },
8761)
8762
8763config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008764 name = "macos_arm64",
8765 values = {
8766 "apple_platform_type": "macos",
8767 "cpu": "darwin_arm64",
8768 },
8769)
8770
8771config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008772 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008773 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008774)
8775
8776config_setting(
8777 name = "emscripten_wasm",
8778 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008779 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008780 "cpu": "wasm",
8781 },
8782)
8783
8784config_setting(
8785 name = "emscripten_wasmsimd",
8786 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008787 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008788 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008789 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008790 },
8791)
8792
8793config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008794 name = "ios_armv7",
8795 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008796 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008797 "cpu": "ios_armv7",
8798 },
8799)
8800
8801config_setting(
8802 name = "ios_arm64",
8803 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008804 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008805 "cpu": "ios_arm64",
8806 },
8807)
8808
8809config_setting(
8810 name = "ios_arm64e",
8811 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008812 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008813 "cpu": "ios_arm64e",
8814 },
8815)
8816
8817config_setting(
8818 name = "ios_x86",
8819 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008820 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008821 "cpu": "ios_i386",
8822 },
8823)
8824
8825config_setting(
8826 name = "ios_x86_64",
8827 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008828 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008829 "cpu": "ios_x86_64",
8830 },
8831)
8832
8833config_setting(
8834 name = "watchos_armv7k",
8835 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008836 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008837 "cpu": "watchos_armv7k",
8838 },
8839)
8840
8841config_setting(
8842 name = "watchos_arm64_32",
8843 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008844 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008845 "cpu": "watchos_arm64_32",
8846 },
8847)
8848
8849config_setting(
8850 name = "watchos_x86",
8851 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008852 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008853 "cpu": "watchos_i386",
8854 },
8855)
8856
8857config_setting(
8858 name = "watchos_x86_64",
8859 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008860 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008861 "cpu": "watchos_x86_64",
8862 },
8863)
8864
8865config_setting(
8866 name = "tvos_arm64",
8867 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008868 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008869 "cpu": "tvos_arm64",
8870 },
8871)
8872
8873config_setting(
8874 name = "tvos_x86_64",
8875 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008876 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008877 "cpu": "tvos_x86_64",
8878 },
8879)