blob: 7c1e4987f22558054d3f5d7f0d0eaabbcdf6aa7a [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
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473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
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484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
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498 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
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501 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
502 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
503 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
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509 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
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513 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
514 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
515 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
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517 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
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521 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
522 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
523 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
524 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
525 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
526 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
528 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
530 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
531 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
532 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
541 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700542 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
543 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700545 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
546 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
552 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
553 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700554 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
555 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
556 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
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Marat Dukhan779b2532021-06-29 14:14:13 -0700575 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700707]
708
Marat Dukhan436ebe62019-12-04 15:10:12 -0800709WASM_UKERNELS = [
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1628 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001629 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001630 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07001631 "src/qu8-vadd/gen/minmax-wasmsimd-x8.c",
1632 "src/qu8-vadd/gen/minmax-wasmsimd-x16.c",
1633 "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c",
1634 "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001635 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001636 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001637 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001638 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001639 "src/x32-zip/x2-wasmsimd.c",
1640 "src/x32-zip/x3-wasmsimd.c",
1641 "src/x32-zip/x4-wasmsimd.c",
1642 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001643]
1644
Marat Dukhan08c4a432019-10-03 09:29:21 -07001645# ISA-specific micro-kernels
1646NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001647 "src/f32-argmaxpool/4x-neon-c4.c",
1648 "src/f32-argmaxpool/9p8x-neon-c4.c",
1649 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001650 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1651 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001652 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001653 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001654 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001655 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001656 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001657 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001658 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001659 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001660 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001661 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001662 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001663 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001664 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001665 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001666 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1667 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1668 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1669 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1670 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001671 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001672 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001673 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1674 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1675 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001676 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001677 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001678 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1679 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1680 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1681 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1682 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001683 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1684 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1685 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001686 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001687 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001688 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1689 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1690 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001691 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1692 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1693 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1694 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001695 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001696 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1697 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001698 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001699 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001700 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001701 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001702 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1703 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001704 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1705 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1706 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1707 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1708 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1709 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1710 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1711 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001712 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001713 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001714 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001715 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1716 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001717 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001718 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1719 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001720 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001721 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1722 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1723 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1724 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1725 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001726 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1727 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001728 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1729 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001730 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1731 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001732 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1733 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1734 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1735 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1736 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1737 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1738 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1739 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1740 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1741 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1742 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1743 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1744 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1745 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1746 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1747 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001748 "src/f32-ibilinear-chw/gen/neon-p4.c",
1749 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001750 "src/f32-ibilinear/gen/neon-c4.c",
1751 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001752 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001753 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001754 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001755 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1756 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001757 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001758 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1759 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1760 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1761 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001762 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1763 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001764 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1765 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001766 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1767 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001768 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1769 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1770 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001771 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1772 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001773 "src/f32-prelu/gen/neon-1x4.c",
1774 "src/f32-prelu/gen/neon-1x8.c",
1775 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001776 "src/f32-prelu/gen/neon-2x4.c",
1777 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001778 "src/f32-prelu/gen/neon-2x16.c",
1779 "src/f32-prelu/gen/neon-4x4.c",
1780 "src/f32-prelu/gen/neon-4x8.c",
1781 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001782 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001783 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001784 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001785 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1786 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001787 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001788 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1789 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001790 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001791 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1792 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001793 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1794 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1795 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1796 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1797 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1798 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1799 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1800 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1801 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1802 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1803 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1804 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1805 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001806 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001807 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1808 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1809 "src/f32-spmm/gen/4x1-minmax-neon.c",
1810 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1811 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1812 "src/f32-spmm/gen/8x1-minmax-neon.c",
1813 "src/f32-spmm/gen/12x1-minmax-neon.c",
1814 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1815 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1816 "src/f32-spmm/gen/16x1-minmax-neon.c",
1817 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1818 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1819 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001820 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1821 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1822 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1823 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001824 "src/f32-vbinary/gen/vmax-neon-x4.c",
1825 "src/f32-vbinary/gen/vmax-neon-x8.c",
1826 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1827 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1828 "src/f32-vbinary/gen/vmin-neon-x4.c",
1829 "src/f32-vbinary/gen/vmin-neon-x8.c",
1830 "src/f32-vbinary/gen/vminc-neon-x4.c",
1831 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001832 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1833 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1834 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1835 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1836 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1837 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001838 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1839 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1840 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1841 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001842 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1843 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1844 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1845 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001846 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1847 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001848 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1849 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1850 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1851 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1852 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1853 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1854 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1855 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1856 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1857 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1858 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1859 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001860 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1861 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1862 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001863 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1864 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001865 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1866 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001867 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1868 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001869 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1870 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001871 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1872 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1873 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1874 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1875 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1876 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001877 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1878 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1879 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1880 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1881 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1882 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1883 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1884 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1885 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1886 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1887 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1888 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1889 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1890 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1891 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1892 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1893 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1894 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001895 "src/f32-vunary/gen/vabs-neon-x4.c",
1896 "src/f32-vunary/gen/vabs-neon-x8.c",
1897 "src/f32-vunary/gen/vneg-neon-x4.c",
1898 "src/f32-vunary/gen/vneg-neon-x8.c",
1899 "src/f32-vunary/gen/vsqr-neon-x4.c",
1900 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001901 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1902 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001903 "src/math/roundd-neon-addsub.c",
1904 "src/math/roundd-neon-cvt.c",
1905 "src/math/roundne-neon-addsub.c",
1906 "src/math/roundu-neon-addsub.c",
1907 "src/math/roundu-neon-cvt.c",
1908 "src/math/roundz-neon-addsub.c",
1909 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001910 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1911 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1912 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1913 "src/math/sqrt-neon-nr1rsqrts.c",
1914 "src/math/sqrt-neon-nr2rsqrts.c",
1915 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001916 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001917 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001918 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001919 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001920 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001921 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001922 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001923 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1924 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1925 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1926 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1927 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001928 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001929 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1930 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001931 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001932 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1933 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001934 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001935 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1936 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001937 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001938 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1939 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001940 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001941 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001942 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001943 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001944 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001945 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001946 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001947 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001948 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001949 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001950 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001951 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001952 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001953 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07001954 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001955 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001956 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001957 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001958 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001959 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001960 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001961 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001962 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001963 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001964 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1965 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1966 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1967 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001968 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1969 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1970 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1971 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001972 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1973 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1974 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001975 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001976 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1977 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07001978 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07001979 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001980 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001981 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07001982 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001983 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001984 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001985 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1986 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1987 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07001988 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
1989 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001990 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1991 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1992 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1993 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1994 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1995 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1996 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1997 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001998 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001999 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2000 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002001 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07002002 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002003 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002004 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002005 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002006 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2007 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2008 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2009 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2010 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2011 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2012 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2013 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2014 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2015 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2016 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2017 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2018 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2019 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2020 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2021 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2022 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2023 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2024 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2025 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2026 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2027 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2028 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2029 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2030 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2031 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2032 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2033 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2034 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2035 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2036 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2037 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2038 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002039 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002040 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2041 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2042 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002043 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2044 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002045 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2046 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2047 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2048 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2049 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2050 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2051 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2052 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2053 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
2054 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2055 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2056 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002057 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002058 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2059 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002060 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002061 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002062 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002063 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002064 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002065 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002066 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002067 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2068 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2069 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002070 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2071 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002072 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2073 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2074 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2075 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2076 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2077 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2078 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2079 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002080 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002081 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2082 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002083 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002084 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002085 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002086 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002087 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002088 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2089 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2090 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2091 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2092 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2093 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2094 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2095 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2096 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2097 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2098 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2099 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2100 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2101 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2102 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2103 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2104 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2105 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2106 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2107 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2108 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2109 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2110 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2111 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2112 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2113 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2114 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2115 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2116 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2117 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2118 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2119 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2120 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002121 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002122 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2123 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2124 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002125 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2126 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002127 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2128 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2129 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2130 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2131 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2132 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2133 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2134 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2135 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002136 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002137 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002138 "src/qs8-requantization/rndna-neon.c",
Marat Dukhand3d818c2021-07-16 17:56:54 -07002139 "src/qs8-requantization/rndnu-neon-mull.c",
2140 "src/qs8-requantization/rndnu-neon-qdmulh.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002141 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2142 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2143 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2144 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2145 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2146 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2147 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2148 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002149 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2150 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002151 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
2152 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
2153 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
2154 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
2155 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
2156 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
2157 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
2158 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002159 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2160 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002161 "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2162 "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002163 "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2164 "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002165 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002166 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002167 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07002168 "src/qu8-vadd/gen/minmax-neon-ld64-x8.c",
2169 "src/qu8-vadd/gen/minmax-neon-ld64-x16.c",
2170 "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c",
2171 "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002172 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002173 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002174 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002175 "src/x8-zip/x2-neon.c",
2176 "src/x8-zip/x3-neon.c",
2177 "src/x8-zip/x4-neon.c",
2178 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002179 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002180 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002181 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002182 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002183 "src/x32-zip/x2-neon.c",
2184 "src/x32-zip/x3-neon.c",
2185 "src/x32-zip/x4-neon.c",
2186 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002187]
2188
2189NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002190 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2191 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2192 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2193 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2194 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2195 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2196 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2197 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2198 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2199 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2200 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2201 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2202 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2203 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2204 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2205 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2206 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2207 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2208 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2209 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2210 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2211 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2212 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2213 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2214 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2215 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2216 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2217 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2218 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2219 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002220 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2221 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002222 "src/f32-ibilinear/gen/neonfma-c4.c",
2223 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002224 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002225 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002226 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002227 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2228 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002229 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2230 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002231 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2232 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002233 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2234 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002235 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002236 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002237 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002238 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2239 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002240 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002241 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2242 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002243 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002244 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2245 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002246 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2247 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2248 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2249 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2250 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2251 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2252 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2253 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2254 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2255 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2256 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2257 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2258 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002259 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2260 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2261 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2262 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2263 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2264 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2265 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2266 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2267 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2268 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2269 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2270 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2271 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002272 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2273 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2274 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2275 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2276 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2277 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2278 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2279 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2280 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2281 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2282 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2283 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002284 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2285 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002286 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2287 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2288 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2289 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2290 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2291 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2292 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2293 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2294 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2295 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2296 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2297 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2298 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2299 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2300 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2301 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2302 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2303 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2304 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2305 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2306 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2307 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2308 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2309 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2310 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2311 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2312 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2313 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2314 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2315 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2316 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2317 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2318 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2319 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2320 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2321 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2322 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2323 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2324 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2325 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2326 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2327 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2328 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2329 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2330 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2331 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2332 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2333 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2334 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2335 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2336 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2337 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2338 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2339 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002340 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2341 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2342 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2343 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2344 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2345 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2346 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2347 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2348 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2349 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2350 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2351 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2352 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2353 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2354 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2355 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2356 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2357 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2358 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2359 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002360 "src/math/exp-neonfma-rr2-lut64-p2.c",
2361 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002362 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2363 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002364 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2365 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2366 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002367 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2368 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2369 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002370 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2371 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2372 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002373 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2374 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2375 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002376 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2377 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2378 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002379 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2380 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2381 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002382 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2383 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2384 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002385 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002386 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002387 "src/math/sqrt-neonfma-nr2fma.c",
2388 "src/math/sqrt-neonfma-nr2fma1adj.c",
2389 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002390]
2391
2392AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002393 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002394 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002395 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002396 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002397 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002398 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002399 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002400 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002401 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002402 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2403 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
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Marat Dukhan1268a242020-10-24 00:36:32 -07002405 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002406 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002407 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2410 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2411 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002412 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
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2414 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002415 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002416 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002417 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2418 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2419 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002420 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2421 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2422 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2423 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002424 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002425 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2426 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002427 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002428 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002429 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002430 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002431 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2432 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002433 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2434 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2435 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2436 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2437 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2438 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2439 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2440 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002441 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002442 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002443 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2444 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2445 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2446 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2447 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2448 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2449 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2450 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2451 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2452 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2453 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2454 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2455 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2456 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2457 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2458 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2459 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2460 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2461 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2462 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002463 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2464 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002465 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2466 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002467 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2468 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002469 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2470 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002471 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2472 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002473 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2474 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2475 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2476 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2477 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2478 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002479 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2480 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2481 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2482 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2483 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2484 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2485 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2486 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2487 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2488 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2489 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2490 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2491 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2492 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2493 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2494 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2495 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2496 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002497 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002499 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
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Marat Dukhan77221d32020-01-06 10:04:39 -08002501 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002502 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002503 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002504 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002505]
2506
Marat Dukhan8853b822020-05-07 12:19:01 -07002507NEONV8_UKERNELS = [
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2512 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
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2514 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2515 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002516 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002517 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002518 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002519 "src/math/roundz-neonv8.c",
Marat Dukhan4ba70b72021-07-19 11:20:16 -07002520 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002521 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
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Marat Dukhan4ba70b72021-07-19 11:20:16 -07002526 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002535 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002536 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002538 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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2540 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002541 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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2545 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2546 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2547 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2548 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2549 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2550 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2551 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002552 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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2554 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002555 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002558 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002559 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002561 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002562 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2563 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002564 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2565 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2566 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2567 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2568 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2569 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2570 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2571 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002572 "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2573 "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
2574 "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2575 "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002576]
2577
Marat Dukhan08c4a432019-10-03 09:29:21 -07002578AARCH64_NEONFP16ARITH_UKERNELS = [
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2581 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2582 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002583 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
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Benoit Jacoba9644732020-08-13 12:48:55 -07002665NEONDOT_UKERNELS = [
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Marat Dukhan99936602020-04-11 16:47:01 -07002783 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2784 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002785 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2786 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2787 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002788 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2789 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2790 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002791 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2792 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2793 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002794 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2795 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2796 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002797 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2798 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2799 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002800 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2801 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2802 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002803 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2804 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2805 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2806 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002807 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2808 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2809 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002810 "src/f32-ibilinear-chw/gen/sse-p4.c",
2811 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002812 "src/f32-ibilinear/gen/sse-c4.c",
2813 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002814 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2815 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2816 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002817 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2818 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2819 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002820 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2821 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2822 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2823 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002824 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2825 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2826 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002827 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2828 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2829 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002830 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002831 "src/f32-prelu/gen/sse-2x4.c",
2832 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002833 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002834 "src/f32-spmm/gen/4x1-minmax-sse.c",
2835 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002836 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002837 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002838 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2839 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2840 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2841 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2842 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2843 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2844 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2845 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002846 "src/f32-vbinary/gen/vmax-sse-x4.c",
2847 "src/f32-vbinary/gen/vmax-sse-x8.c",
2848 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2849 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2850 "src/f32-vbinary/gen/vmin-sse-x4.c",
2851 "src/f32-vbinary/gen/vmin-sse-x8.c",
2852 "src/f32-vbinary/gen/vminc-sse-x4.c",
2853 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002854 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2855 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2856 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2857 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2858 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2859 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2860 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2861 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002862 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2863 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2864 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2865 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002866 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2867 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2868 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2869 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002870 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2871 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002872 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2873 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002874 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2875 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002876 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2877 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002878 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2879 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002880 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2881 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002882 "src/f32-vunary/gen/vabs-sse-x4.c",
2883 "src/f32-vunary/gen/vabs-sse-x8.c",
2884 "src/f32-vunary/gen/vneg-sse-x4.c",
2885 "src/f32-vunary/gen/vneg-sse-x8.c",
2886 "src/f32-vunary/gen/vsqr-sse-x4.c",
2887 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002888 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002889 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002890 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002891 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002892 "src/math/sqrt-sse-hh1mac.c",
2893 "src/math/sqrt-sse-nr1mac.c",
2894 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002895 "src/x32-fill/sse.c",
2896 "src/x32-packx/x4-sse.c",
2897 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002898]
2899
2900SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002901 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002902 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002903 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002904 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2905 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2906 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2907 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2908 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2909 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2910 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2911 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2912 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2913 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2914 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2915 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002916 "src/f32-prelu/gen/sse2-2x4.c",
2917 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002918 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002919 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002920 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002921 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2922 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002923 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002924 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2925 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002926 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002927 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2928 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002929 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002930 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2931 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2932 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2933 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2934 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2935 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2936 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2937 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2938 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2939 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2940 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2941 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002942 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2943 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002944 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2945 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002946 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2947 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2948 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2949 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2950 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2951 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002952 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2953 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2954 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2955 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2956 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2957 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2958 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2959 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2960 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2961 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2962 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2963 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002964 "src/math/exp-sse2-rr2-lut64-p2.c",
2965 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002966 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002967 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002968 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002969 "src/math/roundd-sse2-cvt.c",
2970 "src/math/roundne-sse2-cvt.c",
2971 "src/math/roundu-sse2-cvt.c",
2972 "src/math/roundz-sse2-cvt.c",
2973 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2974 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2975 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2976 "src/math/sigmoid-sse2-rr2-p5-div.c",
2977 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2978 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002979 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2980 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2981 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2982 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2983 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2984 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002985 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002986 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002987 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002988 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002989 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002990 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002991 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002992 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002993 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002994 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002995 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002996 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002997 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002998 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002999 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003000 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
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3019 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
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Marat Dukhan159688f2020-08-06 10:34:29 -07003025 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003048 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003049 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003050 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003051 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003055 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003057 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003061 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003063 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003068 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
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Marat Dukhanf62bbdc2020-08-04 13:59:04 -07003070 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003071 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003072 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003073 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07003077 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07003081 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
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Marat Dukhanf0f28812021-07-08 22:34:20 -07003083 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
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Marat Dukhancdbe9a32021-07-01 23:52:04 -07003097 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003098 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07003121 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003122 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003123 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07003124 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07003129 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003130 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003131 "src/x8-zip/x2-sse2.c",
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Marat Dukhan57dccd82020-04-14 00:53:10 -07003135 "src/x32-unpool/sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07003140]
3141
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003172 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003173 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003174 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003175 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003176 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003177 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003178 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003179 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003180 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003181 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003182 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003183 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003184 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003185 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003186 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003187 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003188 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003189 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003190 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3191 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
3192 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3193 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003194 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003195 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003196]
3197
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003198SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08003199 "src/f32-prelu/gen/sse41-2x4.c",
3200 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003201 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
3202 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
3203 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
3204 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
3205 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
3206 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
3207 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
3208 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
3209 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
3210 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
3211 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
3212 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003213 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
3214 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003215 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
3216 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003217 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
3218 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
3219 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
3220 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
3221 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
3222 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003223 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
3224 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
3225 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
3226 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
3227 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
3228 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
3229 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
3230 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
3231 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
3232 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
3233 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
3234 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003235 "src/math/roundd-sse41.c",
3236 "src/math/roundne-sse41.c",
3237 "src/math/roundu-sse41.c",
3238 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003239 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3240 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3241 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3242 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3243 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3244 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3245 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3246 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3247 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3248 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3249 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3250 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003251 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003252 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003253 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003254 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003255 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003256 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003257 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003258 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003259 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003260 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003261 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003262 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003263 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003264 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003265 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003266 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003267 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003268 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003269 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003270 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003271 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003272 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003273 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003274 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003275 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003276 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003277 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003278 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003279 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
3280 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3281 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
3282 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003283 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
3284 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3285 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
3286 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3287 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
3288 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3289 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3290 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3291 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
3292 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3293 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3294 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3295 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3296 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3297 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
3298 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3299 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3300 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3301 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3302 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003303 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3304 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3305 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003306 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
3307 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
3308 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003309 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003310 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003311 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003312 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003313 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003314 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003315 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003316 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003317 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003318 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003319 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003320 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003321 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003322 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003323 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003324 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003325 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003326 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003327 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003328 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003329 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003330 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003331 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003332 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003333 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003334 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003335 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003336 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003337 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003338 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003339 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003340 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003341 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003342 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003343 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003344 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003345 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003346 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003347 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003348 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003349 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003350 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003351 "src/qs8-requantization/rndnu-sse4-sra.c",
3352 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003353 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3354 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3355 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3356 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003357 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3358 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3359 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3360 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003361 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3362 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3363 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3364 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003365 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3366 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3367 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3368 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003369 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003370 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003371 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003372 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003373 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003374 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003375 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003376 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003377 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3378 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3379 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3380 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3381 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3382 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3383 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3384 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003385 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003386 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3387 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3388 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3389 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3390 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3391 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003392 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003393 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3394 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3395 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3396 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3397 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3398 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3399 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3400 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003401 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003402 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3403 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3404 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3405 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3406 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3407 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003408 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003409 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003410 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003411 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3412 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3413 "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3414 "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3415 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3416 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3417 "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3418 "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003419]
3420
Marat Dukhan08c4a432019-10-03 09:29:21 -07003421AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003422 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3423 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003424 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3425 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003426 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3427 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003428 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3429 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3430 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3431 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3432 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3433 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003434 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003435 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3436 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003437 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003438 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003439 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003440 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003441 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3442 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3443 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3444 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3445 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3446 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3447 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3448 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3449 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3450 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3451 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003452 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003453 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3454 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003455 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003456 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003457 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003458 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003459 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3460 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003461 "src/f32-prelu/gen/avx-2x8.c",
3462 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003463 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003464 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3465 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3466 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3467 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3468 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3469 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3470 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3471 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003472 "src/f32-vbinary/gen/vmax-avx-x8.c",
3473 "src/f32-vbinary/gen/vmax-avx-x16.c",
3474 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3475 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3476 "src/f32-vbinary/gen/vmin-avx-x8.c",
3477 "src/f32-vbinary/gen/vmin-avx-x16.c",
3478 "src/f32-vbinary/gen/vminc-avx-x8.c",
3479 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003480 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3481 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3482 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3483 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3484 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3485 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3486 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3487 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003488 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3489 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3490 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3491 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003492 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3493 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3494 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3495 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003496 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3497 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003498 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3499 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3500 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3501 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3502 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3503 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3504 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3505 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3506 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3507 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3508 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3509 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3510 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3511 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3512 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3513 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3514 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3515 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003516 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3517 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003518 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3519 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003520 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3521 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003522 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3523 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003524 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3525 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3526 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3527 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3528 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3529 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003530 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003531 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3532 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3533 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3534 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3535 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3536 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3537 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3538 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3539 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3540 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3541 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3542 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3543 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3544 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3545 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3546 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3547 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3548 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3549 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3550 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003551 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3552 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003553 "src/f32-vunary/gen/vabs-avx-x8.c",
3554 "src/f32-vunary/gen/vabs-avx-x16.c",
3555 "src/f32-vunary/gen/vneg-avx-x8.c",
3556 "src/f32-vunary/gen/vneg-avx-x16.c",
3557 "src/f32-vunary/gen/vsqr-avx-x8.c",
3558 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003559 "src/math/exp-avx-rr2-p5.c",
3560 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3561 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3562 "src/math/expm1minus-avx-rr2-p6.c",
3563 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3564 "src/math/sigmoid-avx-rr2-p5-div.c",
3565 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3566 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003567 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3568 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3569 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3570 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3571 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3572 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3573 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3574 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3575 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3576 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3577 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3578 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003579 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003580 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003581 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003582 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003583 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003584 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003585 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003586 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003587 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003588 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003589 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003590 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003591 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003592 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003593 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003594 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003595 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003596 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003597 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003598 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003599 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003600 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003601 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003602 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003603 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003604 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003605 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003606 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003607 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3608 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3609 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3610 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003611 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3612 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3613 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3614 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3615 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3616 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3617 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3618 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3619 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3620 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3621 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3622 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3623 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3624 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3625 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3626 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3627 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3628 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3629 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3630 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003631 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003632 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003633 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003634 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003635 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003636 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003637 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003638 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003639 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003640 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003641 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003642 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003643 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003644 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003645 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003646 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003647 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003648 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003649 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003650 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003651 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003652 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003653 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003654 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003655 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003656 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003657 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003658 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003659 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003660 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003661 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003662 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003663 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003664 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003665 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003666 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3667 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3668 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3669 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3670 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3671 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3672 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3673 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3674 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3675 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3676 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3677 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3678 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3679 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3680 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3681 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003682 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003683 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003684 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003685 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003686 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003687 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003688 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003689 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003690 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3691 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3692 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3693 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3694 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3695 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3696 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3697 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3698 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3699 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3700 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3701 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3702 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3703 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3704 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3705 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3706 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3707 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3708 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3709 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3710 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3711 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3712 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3713 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3714 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3715 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3716 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3717 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003718 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3719 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3720 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3721 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3722 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3723 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3724 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3725 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003726]
3727
Marat Dukhan1566fee2020-08-02 21:55:41 -07003728XOP_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07003729 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3730 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3731 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3732 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3733 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3734 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003735 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003736 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003737 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003738 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003739 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003740 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003741 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003742 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003743 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003744 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003745 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003746 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003747 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003748 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003749 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003750 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003751 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003752 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003753 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003754 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003755 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003756 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003757 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003758 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003759 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003760 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003761 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003762 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003763 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3764 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003765 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3766 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3767 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3768 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3769 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3770 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3771 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3772 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3773 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3774 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003775 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003776 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003777 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003778 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003779 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003780 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003781 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003782 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003783 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003784 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003785 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003786 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003787 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003788 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003789 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003790 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003791 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003792 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003793 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003794 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003795 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003796 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003797 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003798 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003799 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003800 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003801 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003802 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003803 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003804 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003805 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003806 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003807 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003808 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003809 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003810 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3811 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3812 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3813 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3814 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3815 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3816 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3817 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003818 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3819 "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3820 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3821 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003822 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3823 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3824 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3825 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3826 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3827 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3828 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3829 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3830 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3831 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3832 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3833 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3834 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3835 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3836 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3837 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3838 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3839 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3840 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3841 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3842 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3843 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3844 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3845 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3846 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3847 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3848 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3849 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003850 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3851 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3852 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3853 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003854]
3855
Marat Dukhanfda12b82019-11-21 12:27:59 -08003856FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003857 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
3858 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003859 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3860 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003861 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3862 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003863 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
3864 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
3865 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
3866 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
3867 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3868 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003869 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003870 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3871 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3872 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3873 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003874 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003875 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
3876 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003877 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003878 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
3879 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003880 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3881 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3882 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003883 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3884 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3885 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3886 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3887 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3888 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3889 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3890 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3891 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3892 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3893 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3894 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3895 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3896 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003897 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003898 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3899 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3900 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3901 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003902 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003903 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3904 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003905 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003906 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3907 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003908 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3909 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3910 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003911 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3912 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003913 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3914 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3915 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3916 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3917 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3918 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3919 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3920 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003921 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003922 "src/math/sqrt-fma3-nr1fma1adj.c",
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Marat Dukhanfda12b82019-11-21 12:27:59 -08003924]
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Marat Dukhan6adff4e2019-10-14 18:32:07 -07003926AVX2_UKERNELS = [
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3991 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3992 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3993 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3994 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
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3997 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08004003 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
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4005 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
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4007 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
4008 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
4009 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
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4020 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
4021 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
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4023 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
4024 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07004027 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
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4030 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
4031 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
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4038 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
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4041 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
4042 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
4043 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
4044 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
4045 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
4046 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
4047 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
4048 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
4049 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
4050 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
4051 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
4052 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
4053 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
4054 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
4055 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
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Marat Dukhanb7633f22020-11-20 16:34:56 -08004057 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
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4069 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
4070 "src/math/sigmoid-avx2-rr1-p5-div.c",
4071 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
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4073 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
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Marat Dukhan82286892021-06-04 17:27:27 -07004080 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
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4086 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
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4089 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4090 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
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Marat Dukhan0b043742021-06-02 18:29:11 -07004092 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4093 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
4094 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4095 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
4096 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4097 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07004098 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
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Marat Dukhan9b474cf2021-05-25 16:37:48 -07004106 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
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Marat Dukhan9b474cf2021-05-25 16:37:48 -07004125 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004126 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004127 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004128 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004129 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004130 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004131 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004132 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004133 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004134 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004135 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004136 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004137 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004138 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004139 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004140 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004141 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004142 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07004143 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4144 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4145 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
4146 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
4147 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4148 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
4149 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
4150 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07004151 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4152 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4153 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4154 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4155 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4156 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004157 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4158 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4159 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4160 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4161 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4162 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07004163 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4164 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4165 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4166 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004167]
4168
Marat Dukhan08c4a432019-10-03 09:29:21 -07004169AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004170 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4171 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004172 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4173 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004174 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4175 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004176 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
4177 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
4178 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4179 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4180 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4181 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004182 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4183 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4184 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4185 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4186 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4187 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004188 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4189 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4190 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4191 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4192 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4193 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004194 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4195 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4196 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4197 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4198 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4199 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004200 "src/f32-prelu/gen/avx512f-2x16.c",
4201 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004202 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4203 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004204 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004205 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004206 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004207 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4208 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004209 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004210 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4211 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4212 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004213 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004214 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4215 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004216 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004217 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004218 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004219 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4220 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004221 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004222 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4223 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4224 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004225 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004226 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4227 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004228 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004229 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004230 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004231 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4232 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004233 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004234 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4235 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4236 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004237 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004238 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004239 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4240 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4241 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4242 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4243 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4244 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4245 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4246 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004247 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4248 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4249 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4250 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4251 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4252 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4253 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4254 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004255 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4256 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4257 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4258 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4259 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4260 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4261 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4262 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004263 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4264 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4265 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4266 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004267 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4268 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4269 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4270 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004271 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4272 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004273 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4274 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4275 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4276 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4277 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4278 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4279 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4280 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4281 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4282 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4283 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4284 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4285 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4286 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4287 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4288 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004289 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4290 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004291 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4292 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004293 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4294 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004295 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4296 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4297 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4298 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4299 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4300 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4301 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4302 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004303 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004304 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4305 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4306 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4307 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4308 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4309 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4310 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4311 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4312 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4313 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4314 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4315 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4316 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4317 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4318 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4319 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4320 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4321 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4322 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4323 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4324 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4325 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4326 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4327 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004328 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4329 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4330 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4331 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4332 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4333 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4334 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4335 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4336 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4337 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4338 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4339 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4340 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4341 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4342 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4343 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4344 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4345 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4346 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4347 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4348 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4349 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4350 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4351 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4352 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4353 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4354 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4355 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4356 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4357 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4358 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4359 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4360 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4361 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4362 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4363 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4364 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4365 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4366 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4367 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4368 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4369 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4370 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4371 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4372 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4373 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4374 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4375 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004376 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4377 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4378 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4379 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4380 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4381 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4382 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4383 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004384 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4385 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4386 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4387 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4388 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4389 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004390 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4391 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4392 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4393 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4394 "src/math/exp-avx512f-rr2-p5-scalef.c",
4395 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004396 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4397 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004398 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004399 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004400 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004401 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004402 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004403 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004404 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004405 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004406 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004407 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4408 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4409 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4410 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4411 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4412 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4413 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4414 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4415 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4416 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004417 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004418 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004419 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4420 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4421 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4422 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004423 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004424 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004425 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004426]
4427
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004428AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004429 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4430 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4431 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4432 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004433 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4434 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4435 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4436 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4437 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4438 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4439 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4440 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004441 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004442 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004443 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004444 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004445 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004446 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004447 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004448 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004449 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004450 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004451 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004452 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004453 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004454 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004455 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004456 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004457 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004458 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004459 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004460 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004461 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004462 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004463 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004464 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhancfd606b2021-07-09 01:18:45 -07004465 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4466 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4467 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4468 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004469 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4470 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4471 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4472 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4473 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4474 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4475 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4476 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004477]
4478
Frank Barchardbcedc082020-08-17 18:00:51 -07004479WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004480 "src/f32-vrelu/wasm_shr_x1.S",
4481 "src/f32-vrelu/wasm_shr_x2.S",
4482 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004483]
4484
Marat Dukhan08c4a432019-10-03 09:29:21 -07004485AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004486 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004487 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004488 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4489 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004490 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004491 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004492 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004493 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004494 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4495 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004496 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4497 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4498 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4499 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004500]
4501
4502AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004503 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004504 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004505 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004506 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
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Frank Barchard1a0b2762021-06-29 18:37:59 -07004659 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4660 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4661 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4662 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004663 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4664 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4665 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004666 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004667 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4668 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S",
4669 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004670 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004671 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4672 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4673 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4674 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004675 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4676 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4677 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4678 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004679 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4680 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4681 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4682 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004683 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4684 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4685 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4686 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004687 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4688 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4689 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4690 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004691 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4692 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4693 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4694 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004695 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004696 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004697 "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004698 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4699 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004700 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4701 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004702 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
4703 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004704 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4705 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4706 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004707 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4708 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004709 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004710 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4711 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004712 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004713]
4714
Marat Dukhan1b354632020-03-23 12:50:22 -07004715INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004716 "src/xnnpack/argmaxpool.h",
4717 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004718 "src/xnnpack/common.h",
4719 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004720 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004721 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004722 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004723 "src/xnnpack/gavgpool.h",
4724 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004725 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004726 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004727 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004728 "src/xnnpack/lut.h",
4729 "src/xnnpack/math.h",
4730 "src/xnnpack/maxpool.h",
4731 "src/xnnpack/packx.h",
4732 "src/xnnpack/pad.h",
4733 "src/xnnpack/params.h",
4734 "src/xnnpack/pavgpool.h",
4735 "src/xnnpack/ppmm.h",
4736 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004737 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004738 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004739 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004740 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004741 "src/xnnpack/spmm.h",
4742 "src/xnnpack/unpool.h",
4743 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004744 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004745 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004746 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004747 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004748 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004749 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004750 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004751]
4752
4753INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004754 "include/xnnpack.h",
4755 "src/xnnpack/allocator.h",
4756 "src/xnnpack/compute.h",
4757 "src/xnnpack/im2col.h",
4758 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004759 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004760 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004761 "src/xnnpack/operator.h",
4762 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004763 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004764 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004765 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004766 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004767]
4768
Marat Dukhan1b354632020-03-23 12:50:22 -07004769ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004770 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004771]
4772
Marat Dukhan1b354632020-03-23 12:50:22 -07004773MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004774 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004775 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004776]
4777
Marat Dukhan1b354632020-03-23 12:50:22 -07004778MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004779 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004780 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004781 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004782 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004783]
4784
4785OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004786 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004787 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004788]
4789
4790WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004791 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004792 "src/xnnpack/operator.h",
4793 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004794]
4795
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004796LOGGING_COPTS = select({
4797 # No logging in optimized mode
4798 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4799 # Full logging in debug mode
4800 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4801 # Error-only logging in default (fastbuild) mode
4802 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4803})
4804
Marat Dukhan3b59de22020-06-03 20:15:19 -07004805LOGGING_SRCS = select({
4806 # No logging in optimized mode
4807 ":optimized_build": [],
4808 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004809 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004810 "src/operator-strings.c",
4811 "src/subgraph-strings.c",
4812 ],
4813})
4814
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004815LOGGING_HDRS = [
4816 "src/xnnpack/log.h",
4817]
4818
Marat Dukhan08c4a432019-10-03 09:29:21 -07004819xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004820 name = "tables",
4821 srcs = TABLE_SRCS,
4822 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004823 gcc_copts = xnnpack_gcc_std_copts(),
4824 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004825)
4826
4827xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004828 name = "scalar_ukernels",
4829 srcs = SCALAR_UKERNELS,
4830 hdrs = INTERNAL_HDRS,
4831 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004832 gcc_copts = xnnpack_gcc_std_copts(),
4833 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004834 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004835 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004836 "@FP16",
4837 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004838 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004839 ],
4840)
4841
4842xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004843 name = "scalar_ukernels_test_mode",
4844 srcs = SCALAR_UKERNELS,
4845 hdrs = INTERNAL_HDRS,
4846 aarch32_copts = ["-marm"],
4847 copts = [
4848 "-UNDEBUG",
4849 "-DXNN_TEST_MODE=1",
4850 ],
4851 gcc_copts = xnnpack_gcc_std_copts(),
4852 msvc_copts = xnnpack_msvc_std_copts(),
4853 deps = [
4854 ":tables",
4855 "@FP16",
4856 "@FXdiv",
4857 "@pthreadpool",
4858 ],
4859)
4860
4861xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004862 name = "wasm_ukernels",
4863 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004864 gcc_copts = xnnpack_gcc_std_copts(),
4865 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004866 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004867 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004868 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004869 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004870 "@FP16",
4871 "@FXdiv",
4872 "@pthreadpool",
4873 ],
4874)
4875
4876xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004877 name = "wasm_ukernels_test_mode",
4878 hdrs = INTERNAL_HDRS,
4879 copts = [
4880 "-UNDEBUG",
4881 "-DXNN_TEST_MODE=1",
4882 ],
4883 gcc_copts = xnnpack_gcc_std_copts(),
4884 msvc_copts = xnnpack_msvc_std_copts(),
4885 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004886 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004887 deps = [
4888 ":tables",
4889 "@FP16",
4890 "@FXdiv",
4891 "@pthreadpool",
4892 ],
4893)
4894
4895xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004896 name = "neon_ukernels",
4897 hdrs = INTERNAL_HDRS,
4898 aarch32_copts = [
4899 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004900 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004901 "-mfpu=neon",
4902 ],
4903 aarch32_srcs = NEON_UKERNELS,
4904 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004905 gcc_copts = xnnpack_gcc_std_copts(),
4906 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004907 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004908 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004909 "@FP16",
4910 "@pthreadpool",
4911 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004912)
4913
4914xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004915 name = "neon_ukernels_test_mode",
4916 hdrs = INTERNAL_HDRS,
4917 aarch32_copts = [
4918 "-marm",
4919 "-march=armv7-a",
4920 "-mfpu=neon",
4921 ],
4922 aarch32_srcs = NEON_UKERNELS,
4923 aarch64_srcs = NEON_UKERNELS,
4924 copts = [
4925 "-UNDEBUG",
4926 "-DXNN_TEST_MODE=1",
4927 ],
4928 gcc_copts = xnnpack_gcc_std_copts(),
4929 msvc_copts = xnnpack_msvc_std_copts(),
4930 deps = [
4931 ":tables",
4932 "@FP16",
4933 "@pthreadpool",
4934 ],
4935)
4936
4937xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004938 name = "neonfma_ukernels",
4939 hdrs = INTERNAL_HDRS,
4940 aarch32_copts = [
4941 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004942 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004943 "-mfpu=neon-vfpv4",
4944 ],
4945 aarch32_srcs = NEONFMA_UKERNELS,
4946 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004947 apple_aarch32_copts = [
4948 "-mcpu=swift",
4949 "-mtune=generic",
4950 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004951 gcc_copts = xnnpack_gcc_std_copts(),
4952 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004953 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004954 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004955 "@FP16",
4956 "@pthreadpool",
4957 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004958)
4959
4960xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004961 name = "neonfma_ukernels_test_mode",
4962 hdrs = INTERNAL_HDRS,
4963 aarch32_copts = [
4964 "-marm",
4965 "-march=armv7-a",
4966 "-mfpu=neon-vfpv4",
4967 ],
4968 aarch32_srcs = NEONFMA_UKERNELS,
4969 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004970 apple_aarch32_copts = [
4971 "-mcpu=swift",
4972 "-mtune=generic",
4973 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004974 copts = [
4975 "-UNDEBUG",
4976 "-DXNN_TEST_MODE=1",
4977 ],
4978 gcc_copts = xnnpack_gcc_std_copts(),
4979 msvc_copts = xnnpack_msvc_std_copts(),
4980 deps = [
4981 ":tables",
4982 "@FP16",
4983 "@pthreadpool",
4984 ],
4985)
4986
4987xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004988 name = "neonv8_ukernels",
4989 hdrs = INTERNAL_HDRS,
4990 aarch32_copts = [
4991 "-marm",
4992 "-march=armv8-a",
4993 "-mfpu=neon-fp-armv8",
4994 ],
4995 aarch32_srcs = NEONV8_UKERNELS,
4996 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004997 apple_aarch32_copts = [
4998 "-mcpu=cyclone",
4999 "-mtune=generic",
5000 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07005001 gcc_copts = xnnpack_gcc_std_copts(),
5002 msvc_copts = xnnpack_msvc_std_copts(),
5003 deps = [
5004 ":tables",
5005 "@FP16",
5006 "@pthreadpool",
5007 ],
5008)
5009
5010xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005011 name = "neonv8_ukernels_test_mode",
5012 hdrs = INTERNAL_HDRS,
5013 aarch32_copts = [
5014 "-marm",
5015 "-march=armv8-a",
5016 "-mfpu=neon-fp-armv8",
5017 ],
5018 aarch32_srcs = NEONV8_UKERNELS,
5019 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005020 apple_aarch32_copts = [
5021 "-mcpu=cyclone",
5022 "-mtune=generic",
5023 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005024 copts = [
5025 "-UNDEBUG",
5026 "-DXNN_TEST_MODE=1",
5027 ],
5028 gcc_copts = xnnpack_gcc_std_copts(),
5029 msvc_copts = xnnpack_msvc_std_copts(),
5030 deps = [
5031 ":tables",
5032 "@FP16",
5033 "@pthreadpool",
5034 ],
5035)
5036
5037xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005038 name = "neonfp16arith_ukernels",
5039 hdrs = INTERNAL_HDRS,
5040 aarch64_copts = ["-march=armv8.2-a+fp16"],
5041 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005042 gcc_copts = xnnpack_gcc_std_copts(),
5043 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005044 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005045 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005046 "@FP16",
5047 "@pthreadpool",
5048 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005049)
5050
5051xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005052 name = "neonfp16arith_ukernels_test_mode",
5053 hdrs = INTERNAL_HDRS,
5054 aarch64_copts = ["-march=armv8.2-a+fp16"],
5055 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
5056 copts = [
5057 "-UNDEBUG",
5058 "-DXNN_TEST_MODE=1",
5059 ],
5060 gcc_copts = xnnpack_gcc_std_copts(),
5061 msvc_copts = xnnpack_msvc_std_copts(),
5062 deps = [
5063 ":tables",
5064 "@FP16",
5065 "@pthreadpool",
5066 ],
5067)
5068
5069xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07005070 name = "neondot_ukernels",
5071 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005072 aarch32_copts = [
5073 "-marm",
5074 "-march=armv8.2-a+dotprod",
5075 "-mfpu=neon-fp-armv8",
5076 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005077 aarch32_srcs = NEONDOT_UKERNELS,
5078 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5079 aarch64_srcs = NEONDOT_UKERNELS,
5080 gcc_copts = xnnpack_gcc_std_copts(),
5081 msvc_copts = xnnpack_msvc_std_copts(),
5082 deps = [
5083 ":tables",
5084 "@FP16",
5085 "@pthreadpool",
5086 ],
5087)
5088
5089xnnpack_cc_library(
5090 name = "neondot_ukernels_test_mode",
5091 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005092 aarch32_copts = [
5093 "-marm",
5094 "-march=armv8.2-a+dotprod",
5095 "-mfpu=neon-fp-armv8",
5096 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005097 aarch32_srcs = NEONDOT_UKERNELS,
5098 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5099 aarch64_srcs = NEONDOT_UKERNELS,
5100 copts = [
5101 "-UNDEBUG",
5102 "-DXNN_TEST_MODE=1",
5103 ],
5104 gcc_copts = xnnpack_gcc_std_copts(),
5105 msvc_copts = xnnpack_msvc_std_copts(),
5106 deps = [
5107 ":tables",
5108 "@FP16",
5109 "@pthreadpool",
5110 ],
5111)
5112
5113xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005114 name = "sse2_ukernels",
5115 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005116 gcc_copts = xnnpack_gcc_std_copts(),
5117 gcc_x86_copts = ["-msse2"],
5118 msvc_copts = xnnpack_msvc_std_copts(),
5119 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005120 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005121 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005122 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005123 "@FP16",
5124 "@pthreadpool",
5125 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005126)
5127
5128xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005129 name = "sse2_ukernels_test_mode",
5130 hdrs = INTERNAL_HDRS,
5131 copts = [
5132 "-UNDEBUG",
5133 "-DXNN_TEST_MODE=1",
5134 ],
5135 gcc_copts = xnnpack_gcc_std_copts(),
5136 gcc_x86_copts = ["-msse2"],
5137 msvc_copts = xnnpack_msvc_std_copts(),
5138 msvc_x86_32_copts = ["/arch:SSE2"],
5139 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
5140 deps = [
5141 ":tables",
5142 "@FP16",
5143 "@pthreadpool",
5144 ],
5145)
5146
5147xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005148 name = "ssse3_ukernels",
5149 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005150 gcc_copts = xnnpack_gcc_std_copts(),
5151 gcc_x86_copts = ["-mssse3"],
5152 msvc_copts = xnnpack_msvc_std_copts(),
5153 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005154 x86_srcs = SSSE3_UKERNELS,
5155 deps = [
5156 ":tables",
5157 "@FP16",
5158 "@pthreadpool",
5159 ],
5160)
5161
5162xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005163 name = "ssse3_ukernels_test_mode",
5164 hdrs = INTERNAL_HDRS,
5165 copts = [
5166 "-UNDEBUG",
5167 "-DXNN_TEST_MODE=1",
5168 ],
5169 gcc_copts = xnnpack_gcc_std_copts(),
5170 gcc_x86_copts = ["-mssse3"],
5171 msvc_copts = xnnpack_msvc_std_copts(),
5172 msvc_x86_32_copts = ["/arch:SSE2"],
5173 x86_srcs = SSSE3_UKERNELS,
5174 deps = [
5175 ":tables",
5176 "@FP16",
5177 "@pthreadpool",
5178 ],
5179)
5180
5181xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005182 name = "sse41_ukernels",
5183 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005184 gcc_copts = xnnpack_gcc_std_copts(),
5185 gcc_x86_copts = ["-msse4.1"],
5186 msvc_copts = xnnpack_msvc_std_copts(),
5187 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005188 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005189 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005190 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005191 "@FP16",
5192 "@pthreadpool",
5193 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005194)
5195
5196xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005197 name = "sse41_ukernels_test_mode",
5198 hdrs = INTERNAL_HDRS,
5199 copts = [
5200 "-UNDEBUG",
5201 "-DXNN_TEST_MODE=1",
5202 ],
5203 gcc_copts = xnnpack_gcc_std_copts(),
5204 gcc_x86_copts = ["-msse4.1"],
5205 msvc_copts = xnnpack_msvc_std_copts(),
5206 msvc_x86_32_copts = ["/arch:SSE2"],
5207 x86_srcs = SSE41_UKERNELS,
5208 deps = [
5209 ":tables",
5210 "@FP16",
5211 "@pthreadpool",
5212 ],
5213)
5214
5215xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005216 name = "avx_ukernels",
5217 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005218 gcc_copts = xnnpack_gcc_std_copts(),
5219 gcc_x86_copts = ["-mavx"],
5220 msvc_copts = xnnpack_msvc_std_copts(),
5221 msvc_x86_32_copts = ["/arch:AVX"],
5222 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005223 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005224 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005225 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005226 "@FP16",
5227 "@pthreadpool",
5228 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005229)
5230
5231xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005232 name = "avx_ukernels_test_mode",
5233 hdrs = INTERNAL_HDRS,
5234 copts = [
5235 "-UNDEBUG",
5236 "-DXNN_TEST_MODE=1",
5237 ],
5238 gcc_copts = xnnpack_gcc_std_copts(),
5239 gcc_x86_copts = ["-mavx"],
5240 msvc_copts = xnnpack_msvc_std_copts(),
5241 msvc_x86_32_copts = ["/arch:AVX"],
5242 msvc_x86_64_copts = ["/arch:AVX"],
5243 x86_srcs = AVX_UKERNELS,
5244 deps = [
5245 ":tables",
5246 "@FP16",
5247 "@pthreadpool",
5248 ],
5249)
5250
5251xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005252 name = "xop_ukernels",
5253 hdrs = INTERNAL_HDRS,
5254 gcc_copts = xnnpack_gcc_std_copts(),
5255 gcc_x86_copts = ["-mxop"],
5256 msvc_copts = xnnpack_msvc_std_copts(),
5257 msvc_x86_32_copts = ["/arch:AVX"],
5258 msvc_x86_64_copts = ["/arch:AVX"],
5259 x86_srcs = XOP_UKERNELS,
5260 deps = [
5261 ":tables",
5262 "@FP16",
5263 "@pthreadpool",
5264 ],
5265)
5266
5267xnnpack_cc_library(
5268 name = "xop_ukernels_test_mode",
5269 hdrs = INTERNAL_HDRS,
5270 copts = [
5271 "-UNDEBUG",
5272 "-DXNN_TEST_MODE=1",
5273 ],
5274 gcc_copts = xnnpack_gcc_std_copts(),
5275 gcc_x86_copts = ["-mxop"],
5276 msvc_copts = xnnpack_msvc_std_copts(),
5277 msvc_x86_32_copts = ["/arch:AVX"],
5278 msvc_x86_64_copts = ["/arch:AVX"],
5279 x86_srcs = XOP_UKERNELS,
5280 deps = [
5281 ":tables",
5282 "@FP16",
5283 "@pthreadpool",
5284 ],
5285)
5286
5287xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005288 name = "fma3_ukernels",
5289 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005290 gcc_copts = xnnpack_gcc_std_copts(),
5291 gcc_x86_copts = ["-mfma"],
5292 msvc_copts = xnnpack_msvc_std_copts(),
5293 msvc_x86_32_copts = ["/arch:AVX"],
5294 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005295 x86_srcs = FMA3_UKERNELS,
5296 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005297 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005298 "@FP16",
5299 "@pthreadpool",
5300 ],
5301)
5302
5303xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005304 name = "fma3_ukernels_test_mode",
5305 hdrs = INTERNAL_HDRS,
5306 copts = [
5307 "-UNDEBUG",
5308 "-DXNN_TEST_MODE=1",
5309 ],
5310 gcc_copts = xnnpack_gcc_std_copts(),
5311 gcc_x86_copts = ["-mfma"],
5312 msvc_copts = xnnpack_msvc_std_copts(),
5313 msvc_x86_32_copts = ["/arch:AVX"],
5314 msvc_x86_64_copts = ["/arch:AVX"],
5315 x86_srcs = FMA3_UKERNELS,
5316 deps = [
5317 ":tables",
5318 "@FP16",
5319 "@pthreadpool",
5320 ],
5321)
5322
5323xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005324 name = "avx2_ukernels",
5325 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005326 gcc_copts = xnnpack_gcc_std_copts(),
5327 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005328 "-mfma",
5329 "-mavx2",
5330 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005331 msvc_copts = xnnpack_msvc_std_copts(),
5332 msvc_x86_32_copts = ["/arch:AVX2"],
5333 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005334 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005335 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005336 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005337 "@FP16",
5338 "@pthreadpool",
5339 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005340)
5341
5342xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005343 name = "avx2_ukernels_test_mode",
5344 hdrs = INTERNAL_HDRS,
5345 copts = [
5346 "-UNDEBUG",
5347 "-DXNN_TEST_MODE=1",
5348 ],
5349 gcc_copts = xnnpack_gcc_std_copts(),
5350 gcc_x86_copts = [
5351 "-mfma",
5352 "-mavx2",
5353 ],
5354 msvc_copts = xnnpack_msvc_std_copts(),
5355 msvc_x86_32_copts = ["/arch:AVX2"],
5356 msvc_x86_64_copts = ["/arch:AVX2"],
5357 x86_srcs = AVX2_UKERNELS,
5358 deps = [
5359 ":tables",
5360 "@FP16",
5361 "@pthreadpool",
5362 ],
5363)
5364
5365xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005366 name = "avx512f_ukernels",
5367 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005368 gcc_copts = xnnpack_gcc_std_copts(),
5369 gcc_x86_copts = ["-mavx512f"],
5370 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5371 msvc_copts = xnnpack_msvc_std_copts(),
5372 msvc_x86_32_copts = ["/arch:AVX512"],
5373 msvc_x86_64_copts = ["/arch:AVX512"],
5374 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005375 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005376 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005377 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005378 "@FP16",
5379 "@pthreadpool",
5380 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005381)
5382
5383xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005384 name = "avx512f_ukernels_test_mode",
5385 hdrs = INTERNAL_HDRS,
5386 copts = [
5387 "-UNDEBUG",
5388 "-DXNN_TEST_MODE=1",
5389 ],
5390 gcc_copts = xnnpack_gcc_std_copts(),
5391 gcc_x86_copts = ["-mavx512f"],
5392 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5393 msvc_copts = xnnpack_msvc_std_copts(),
5394 msvc_x86_32_copts = ["/arch:AVX512"],
5395 msvc_x86_64_copts = ["/arch:AVX512"],
5396 msys_copts = ["-fno-asynchronous-unwind-tables"],
5397 x86_srcs = AVX512F_UKERNELS,
5398 deps = [
5399 ":tables",
5400 "@FP16",
5401 "@pthreadpool",
5402 ],
5403)
5404
5405xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005406 name = "avx512skx_ukernels",
5407 hdrs = INTERNAL_HDRS,
5408 gcc_copts = xnnpack_gcc_std_copts(),
5409 gcc_x86_copts = [
5410 "-mavx512f",
5411 "-mavx512cd",
5412 "-mavx512bw",
5413 "-mavx512dq",
5414 "-mavx512vl",
5415 ],
5416 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5417 msvc_copts = xnnpack_msvc_std_copts(),
5418 msvc_x86_32_copts = ["/arch:AVX512"],
5419 msvc_x86_64_copts = ["/arch:AVX512"],
5420 msys_copts = ["-fno-asynchronous-unwind-tables"],
5421 x86_srcs = AVX512SKX_UKERNELS,
5422 deps = [
5423 ":tables",
5424 "@FP16",
5425 "@pthreadpool",
5426 ],
5427)
5428
5429xnnpack_cc_library(
5430 name = "avx512skx_ukernels_test_mode",
5431 hdrs = INTERNAL_HDRS,
5432 copts = [
5433 "-UNDEBUG",
5434 "-DXNN_TEST_MODE=1",
5435 ],
5436 gcc_copts = xnnpack_gcc_std_copts(),
5437 gcc_x86_copts = [
5438 "-mavx512f",
5439 "-mavx512cd",
5440 "-mavx512bw",
5441 "-mavx512dq",
5442 "-mavx512vl",
5443 ],
5444 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5445 msvc_copts = xnnpack_msvc_std_copts(),
5446 msvc_x86_32_copts = ["/arch:AVX512"],
5447 msvc_x86_64_copts = ["/arch:AVX512"],
5448 msys_copts = ["-fno-asynchronous-unwind-tables"],
5449 x86_srcs = AVX512SKX_UKERNELS,
5450 deps = [
5451 ":tables",
5452 "@FP16",
5453 "@pthreadpool",
5454 ],
5455)
5456
5457xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005458 name = "asm_ukernels",
5459 hdrs = ["src/xnnpack/assembly.h"],
5460 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005461 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005462 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005463 wasm_srcs = WASM32_ASM_UKERNELS,
5464 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005465)
5466
Marat Dukhan3b59de22020-06-03 20:15:19 -07005467xnnpack_cc_library(
5468 name = "logging_utils",
5469 srcs = LOGGING_SRCS,
5470 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5471 copts = LOGGING_COPTS + [
5472 "-Isrc",
5473 "-Iinclude",
5474 ] + select({
5475 ":debug_build": [],
5476 "//conditions:default": xnnpack_min_size_copts(),
5477 }),
5478 gcc_copts = xnnpack_gcc_std_copts(),
5479 msvc_copts = xnnpack_msvc_std_copts(),
5480 visibility = xnnpack_visibility(),
5481 deps = [
5482 "@FP16",
5483 "@clog",
5484 "@pthreadpool",
5485 ],
5486)
5487
Marat Dukhan08c4a432019-10-03 09:29:21 -07005488xnnpack_aggregate_library(
5489 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005490 aarch32_ios_deps = [
5491 ":neon_ukernels",
5492 ":neonfma_ukernels",
5493 ":neonv8_ukernels",
5494 ":asm_ukernels",
5495 ],
5496 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005497 ":neon_ukernels",
5498 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005499 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005500 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005501 ":asm_ukernels",
5502 ],
5503 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005504 ":neon_ukernels",
5505 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005506 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005507 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005508 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005509 ":asm_ukernels",
5510 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005511 generic_deps = [
5512 ":scalar_ukernels",
5513 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005514 wasm_deps = [
5515 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005516 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005517 ],
5518 wasmsimd_deps = [
5519 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005520 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005521 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005522 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005523 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005524 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005525 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005526 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005527 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005528 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005529 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005530 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005531 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005532 ],
5533)
5534
Marat Dukhan33fcf782020-05-24 14:27:15 -07005535xnnpack_aggregate_library(
5536 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005537 aarch32_ios_deps = [
5538 ":neon_ukernels_test_mode",
5539 ":neonfma_ukernels_test_mode",
5540 ":neonv8_ukernels_test_mode",
5541 ":asm_ukernels",
5542 ],
5543 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005544 ":neon_ukernels_test_mode",
5545 ":neonfma_ukernels_test_mode",
5546 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005547 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005548 ":asm_ukernels",
5549 ],
5550 aarch64_deps = [
5551 ":neon_ukernels_test_mode",
5552 ":neonfma_ukernels_test_mode",
5553 ":neonv8_ukernels_test_mode",
5554 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005555 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005556 ":asm_ukernels",
5557 ],
5558 generic_deps = [
5559 ":scalar_ukernels_test_mode",
5560 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005561 wasm_deps = [
5562 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005563 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005564 ],
5565 wasmsimd_deps = [
5566 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005567 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005568 ],
5569 x86_deps = [
5570 ":sse2_ukernels_test_mode",
5571 ":ssse3_ukernels_test_mode",
5572 ":sse41_ukernels_test_mode",
5573 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005574 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005575 ":fma3_ukernels_test_mode",
5576 ":avx2_ukernels_test_mode",
5577 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005578 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005579 ],
5580)
5581
Marat Dukhan08c4a432019-10-03 09:29:21 -07005582xnnpack_cc_library(
5583 name = "im2col",
5584 srcs = ["src/im2col.c"],
5585 hdrs = [
5586 "src/xnnpack/common.h",
5587 "src/xnnpack/im2col.h",
5588 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005589 gcc_copts = xnnpack_gcc_std_copts(),
5590 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005591)
5592
5593xnnpack_cc_library(
5594 name = "indirection",
5595 srcs = ["src/indirection.c"],
5596 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005597 gcc_copts = xnnpack_gcc_std_copts(),
5598 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005599 deps = [
5600 "@FP16",
5601 "@FXdiv",
5602 "@pthreadpool",
5603 ],
5604)
5605
5606xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005607 name = "indirection_test_mode",
5608 srcs = ["src/indirection.c"],
5609 hdrs = INTERNAL_HDRS,
5610 copts = [
5611 "-UNDEBUG",
5612 "-DXNN_TEST_MODE=1",
5613 ],
5614 gcc_copts = xnnpack_gcc_std_copts(),
5615 msvc_copts = xnnpack_msvc_std_copts(),
5616 deps = [
5617 "@FP16",
5618 "@FXdiv",
5619 "@pthreadpool",
5620 ],
5621)
5622
5623xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005624 name = "packing",
5625 srcs = ["src/packing.c"],
5626 hdrs = INTERNAL_HDRS,
5627 gcc_copts = xnnpack_gcc_std_copts(),
5628 msvc_copts = xnnpack_msvc_std_copts(),
5629 deps = [
5630 "@FP16",
5631 "@FXdiv",
5632 "@pthreadpool",
5633 ],
5634)
5635
5636xnnpack_cc_library(
5637 name = "packing_test_mode",
5638 srcs = ["src/packing.c"],
5639 hdrs = INTERNAL_HDRS,
5640 copts = [
5641 "-UNDEBUG",
5642 "-DXNN_TEST_MODE=1",
5643 ],
5644 gcc_copts = xnnpack_gcc_std_copts(),
5645 msvc_copts = xnnpack_msvc_std_copts(),
5646 deps = [
5647 "@FP16",
5648 "@FXdiv",
5649 "@pthreadpool",
5650 ],
5651)
5652
5653xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005654 name = "operator_run",
5655 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005656 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005657 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005658 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5659 "//conditions:default": [],
5660 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005661 gcc_copts = xnnpack_gcc_std_copts(),
5662 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005663 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005664 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005665 "@FP16",
5666 "@FXdiv",
5667 "@clog",
5668 "@pthreadpool",
5669 ],
5670)
5671
Chao Mei6ddfc602020-05-13 22:29:36 -07005672xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005673 name = "operator_run_test_mode",
5674 srcs = ["src/operator-run.c"],
5675 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5676 copts = LOGGING_COPTS + [
5677 "-UNDEBUG",
5678 "-DXNN_TEST_MODE=1",
5679 ] + select({
5680 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5681 "//conditions:default": [],
5682 }),
5683 gcc_copts = xnnpack_gcc_std_copts(),
5684 msvc_copts = xnnpack_msvc_std_copts(),
5685 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005686 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005687 "@FP16",
5688 "@FXdiv",
5689 "@clog",
5690 "@pthreadpool",
5691 ],
5692)
5693
5694xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005695 name = "memory_planner",
5696 srcs = ["src/memory-planner.c"],
5697 hdrs = INTERNAL_HDRS,
5698 defines = select({
5699 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5700 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5701 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5702 }),
5703 gcc_copts = xnnpack_gcc_std_copts(),
5704 msvc_copts = xnnpack_msvc_std_copts(),
5705 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005706 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005707 "@pthreadpool",
5708 ],
5709)
5710
Marat Dukhan33fcf782020-05-24 14:27:15 -07005711xnnpack_cc_library(
5712 name = "memory_planner_test_mode",
5713 srcs = ["src/memory-planner.c"],
5714 hdrs = INTERNAL_HDRS,
5715 copts = [
5716 "-UNDEBUG",
5717 "-DXNN_TEST_MODE=1",
5718 ],
5719 defines = select({
5720 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5721 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5722 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5723 }),
5724 gcc_copts = xnnpack_gcc_std_copts(),
5725 msvc_copts = xnnpack_msvc_std_copts(),
5726 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005727 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005728 "@pthreadpool",
5729 ],
5730)
5731
Marat Dukhan08c4a432019-10-03 09:29:21 -07005732cc_library(
5733 name = "enable_assembly",
5734 defines = select({
5735 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5736 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005737 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005738 }),
5739)
5740
Marat Dukhan9de90e02020-06-18 16:04:12 -07005741cc_library(
5742 name = "enable_sparse",
5743 defines = select({
5744 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5745 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005746 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005747 }),
5748)
5749
Marat Dukhancf056b22019-10-07 10:26:29 -07005750xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005751 name = "operators",
5752 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005753 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005754 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005755 ],
5756 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005757 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005758 "-Isrc",
5759 "-Iinclude",
5760 ] + select({
5761 ":debug_build": [],
5762 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005763 }) + select({
5764 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5765 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005766 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005767 gcc_copts = xnnpack_gcc_std_copts(),
5768 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005769 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005770 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005771 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005772 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005773 "@FP16",
5774 "@FXdiv",
5775 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005776 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005777 ],
5778)
5779
Marat Dukhan10a38082020-04-17 03:58:35 -07005780xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005781 name = "operators_test_mode",
5782 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005783 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005784 "src/operator-delete.c",
5785 ],
5786 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5787 copts = LOGGING_COPTS + [
5788 "-Isrc",
5789 "-Iinclude",
5790 "-UNDEBUG",
5791 "-DXNN_TEST_MODE=1",
5792 ] + select({
5793 ":debug_build": [],
5794 "//conditions:default": xnnpack_min_size_copts(),
5795 }) + select({
5796 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5797 "//conditions:default": [],
5798 }),
5799 gcc_copts = xnnpack_gcc_std_copts(),
5800 msvc_copts = xnnpack_msvc_std_copts(),
5801 deps = [
5802 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005803 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005804 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005805 "@FP16",
5806 "@FXdiv",
5807 "@clog",
5808 "@pthreadpool",
5809 ],
5810)
5811
5812xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005813 name = "XNNPACK",
5814 srcs = [
5815 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005816 "src/runtime.c",
5817 "src/subgraph.c",
5818 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005819 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005820 hdrs = ["include/xnnpack.h"],
5821 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005822 "-Isrc",
5823 "-Iinclude",
5824 ] + select({
5825 ":debug_build": [],
5826 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005827 }) + select({
5828 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5829 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005830 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005831 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005832 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005833 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005834 visibility = xnnpack_visibility(),
5835 deps = [
5836 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005837 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005838 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005839 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005840 ":operator_run",
5841 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005842 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005843 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005844 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005845 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005846 ] + select({
5847 ":emscripten": [],
5848 "//conditions:default": ["@cpuinfo"],
5849 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005850)
5851
Marat Dukhan10a38082020-04-17 03:58:35 -07005852xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005853 name = "XNNPACK_test_mode",
5854 srcs = [
5855 "src/init.c",
5856 "src/runtime.c",
5857 "src/subgraph.c",
5858 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005859 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005860 hdrs = ["include/xnnpack.h"],
5861 copts = LOGGING_COPTS + [
5862 "-Isrc",
5863 "-Iinclude",
5864 "-UNDEBUG",
5865 "-DXNN_TEST_MODE=1",
5866 ] + select({
5867 ":debug_build": [],
5868 "//conditions:default": xnnpack_min_size_copts(),
5869 }) + select({
5870 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5871 "//conditions:default": [],
5872 }),
5873 gcc_copts = xnnpack_gcc_std_copts(),
5874 includes = ["include"],
5875 msvc_copts = xnnpack_msvc_std_copts(),
5876 visibility = xnnpack_visibility(),
5877 deps = [
5878 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005879 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005880 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005881 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005882 ":operator_run_test_mode",
5883 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005884 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005885 "@clog",
5886 "@FP16",
5887 "@pthreadpool",
5888 ] + select({
5889 ":emscripten": [],
5890 "//conditions:default": ["@cpuinfo"],
5891 }),
5892)
5893
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005894# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5895# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005896xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005897 name = "xnnpack_for_tflite",
5898 srcs = [
5899 "src/init.c",
5900 "src/runtime.c",
5901 "src/subgraph.c",
5902 "src/tensor.c",
5903 ] + SUBGRAPH_SRCS,
5904 hdrs = ["include/xnnpack.h"],
5905 copts = LOGGING_COPTS + [
5906 "-Isrc",
5907 "-Iinclude",
5908 ] + select({
5909 ":debug_build": [],
5910 "//conditions:default": xnnpack_min_size_copts(),
5911 }) + select({
5912 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5913 "//conditions:default": [],
5914 }),
5915 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005916 "XNN_NO_U8_OPERATORS",
5917 "XNN_NO_X8_OPERATORS",
5918 "XNN_NO_F16_OPERATORS",
5919 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005920 ] + select({
5921 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005922 ":xnn_enable_qs8_explicit_false": [
5923 "XNN_NO_QC8_OPERATORS",
5924 "XNN_NO_QS8_OPERATORS",
5925 ],
5926 "//conditions:default": [
5927 "XNN_NO_QC8_OPERATORS",
5928 "XNN_NO_QS8_OPERATORS",
5929 ],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07005930 }) + select({
5931 ":xnn_enable_qu8_explicit_true": [],
5932 ":xnn_enable_qu8_explicit_false": [
5933 "XNN_NO_QU8_OPERATORS",
5934 ],
5935 "//conditions:default": [
5936 "XNN_NO_QU8_OPERATORS",
5937 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005938 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005939 gcc_copts = xnnpack_gcc_std_copts(),
5940 includes = ["include"],
5941 msvc_copts = xnnpack_msvc_std_copts(),
5942 visibility = xnnpack_visibility(),
5943 deps = [
5944 ":enable_assembly",
5945 ":enable_sparse",
5946 ":logging_utils",
5947 ":memory_planner",
5948 ":operator_run",
5949 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005950 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005951 "@clog",
5952 "@FP16",
5953 "@pthreadpool",
5954 ] + select({
5955 ":emscripten": [],
5956 "//conditions:default": ["@cpuinfo"],
5957 }),
5958)
5959
5960# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5961# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5962xnnpack_cc_library(
5963 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005964 srcs = [
5965 "src/init.c",
5966 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005967 hdrs = ["include/xnnpack.h"],
5968 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005969 "-Isrc",
5970 "-Iinclude",
5971 ] + select({
5972 ":debug_build": [],
5973 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005974 }) + select({
5975 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5976 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005977 }),
5978 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005979 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005980 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005981 "XNN_NO_U8_OPERATORS",
5982 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005983 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005984 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005985 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005986 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005987 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005988 visibility = xnnpack_visibility(),
5989 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005990 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005991 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005992 ":operator_run",
5993 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005994 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005995 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005996 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005997 ] + select({
5998 ":emscripten": [],
5999 "//conditions:default": ["@cpuinfo"],
6000 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006001)
6002
Marat Dukhancf056b22019-10-07 10:26:29 -07006003xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006004 name = "bench_utils",
6005 srcs = ["bench/utils.cc"],
6006 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08006007 deps = [
6008 "@com_google_benchmark//:benchmark",
6009 "@cpuinfo",
6010 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006011)
6012
Frank Barchard7e955972019-10-11 10:34:25 -07006013######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07006014
6015xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07006016 name = "qs8_gemm_bench",
6017 srcs = [
6018 "bench/gemm.h",
6019 "bench/qs8-gemm.cc",
6020 "src/xnnpack/AlignedAllocator.h",
6021 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07006022 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
6023 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07006024)
6025
6026xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006027 name = "qs8_requantization_bench",
6028 srcs = [
6029 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006030 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006031 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006032 ] + MICROKERNEL_BENCHMARK_HDRS,
6033 deps = MICROKERNEL_BENCHMARK_DEPS,
6034)
6035
6036xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07006037 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006038 srcs = [
6039 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07006040 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006041 "src/xnnpack/AlignedAllocator.h",
6042 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006043 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006044 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006045)
6046
6047xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006048 name = "qu8_requantization_bench",
6049 srcs = [
6050 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006051 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006052 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006053 ] + MICROKERNEL_BENCHMARK_HDRS,
6054 deps = MICROKERNEL_BENCHMARK_DEPS,
6055)
6056
6057xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07006058 name = "f16_igemm_bench",
6059 srcs = [
6060 "bench/f16-igemm.cc",
6061 "bench/conv.h",
6062 "bench/google/conv.h",
6063 "src/xnnpack/AlignedAllocator.h",
6064 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006065 deps = MICROKERNEL_BENCHMARK_DEPS + [
6066 ":indirection",
6067 ":packing",
6068 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07006069)
6070
6071xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006072 name = "f16_gemm_bench",
6073 srcs = [
6074 "bench/f16-gemm.cc",
6075 "bench/gemm.h",
6076 "src/xnnpack/AlignedAllocator.h",
6077 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006078 deps = MICROKERNEL_BENCHMARK_DEPS + [
6079 ":packing",
6080 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006081)
6082
6083xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006084 name = "f16_spmm_bench",
6085 srcs = [
6086 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006087 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006088 "src/xnnpack/AlignedAllocator.h",
6089 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006090 deps = MICROKERNEL_BENCHMARK_DEPS,
6091)
6092
6093xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006094 name = "f16_vrelu_bench",
6095 srcs = [
6096 "bench/f16-vrelu.cc",
6097 "src/xnnpack/AlignedAllocator.h",
6098 ] + MICROKERNEL_BENCHMARK_HDRS,
6099 deps = MICROKERNEL_BENCHMARK_DEPS,
6100)
6101
6102xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006103 name = "f32_igemm_bench",
6104 srcs = [
6105 "bench/f32-igemm.cc",
6106 "bench/conv.h",
6107 "src/xnnpack/AlignedAllocator.h",
6108 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006109 deps = MICROKERNEL_BENCHMARK_DEPS + [
6110 ":indirection",
6111 ":packing",
6112 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006113)
6114
6115xnnpack_benchmark(
6116 name = "f32_conv_hwc_bench",
6117 srcs = [
6118 "bench/f32-conv-hwc.cc",
6119 "bench/dconv.h",
6120 "src/xnnpack/AlignedAllocator.h",
6121 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006122 deps = MICROKERNEL_BENCHMARK_DEPS + [
6123 ":packing",
6124 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006125)
6126
6127xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006128 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07006129 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006130 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07006131 "bench/dconv.h",
6132 "src/xnnpack/AlignedAllocator.h",
6133 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006134 deps = MICROKERNEL_BENCHMARK_DEPS + [
6135 ":packing",
6136 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07006137)
6138
6139xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07006140 name = "f16_dwconv_bench",
6141 srcs = [
6142 "bench/f16-dwconv.cc",
6143 "bench/dwconv.h",
6144 "bench/google/dwconv.h",
6145 "src/xnnpack/AlignedAllocator.h",
6146 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006147 deps = MICROKERNEL_BENCHMARK_DEPS + [
6148 ":indirection",
6149 ":packing",
6150 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07006151)
6152
6153xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006154 name = "f32_dwconv_bench",
6155 srcs = [
6156 "bench/f32-dwconv.cc",
6157 "bench/dwconv.h",
6158 "src/xnnpack/AlignedAllocator.h",
6159 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006160 deps = MICROKERNEL_BENCHMARK_DEPS + [
6161 ":indirection",
6162 ":packing",
6163 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006164)
6165
6166xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006167 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006168 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006169 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006170 "bench/dwconv.h",
6171 "src/xnnpack/AlignedAllocator.h",
6172 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006173 deps = MICROKERNEL_BENCHMARK_DEPS + [
6174 ":indirection",
6175 ":packing",
6176 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006177)
6178
6179xnnpack_benchmark(
6180 name = "f32_gemm_bench",
6181 srcs = [
6182 "bench/f32-gemm.cc",
6183 "bench/gemm.h",
6184 "src/xnnpack/AlignedAllocator.h",
6185 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006186 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006187 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006188)
6189
6190xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006191 name = "f32_raddexpminusmax_bench",
6192 srcs = [
6193 "bench/f32-raddexpminusmax.cc",
6194 "src/xnnpack/AlignedAllocator.h",
6195 ] + MICROKERNEL_BENCHMARK_HDRS,
6196 deps = MICROKERNEL_BENCHMARK_DEPS,
6197)
6198
6199xnnpack_benchmark(
6200 name = "f32_raddextexp_bench",
6201 srcs = [
6202 "bench/f32-raddextexp.cc",
6203 "src/xnnpack/AlignedAllocator.h",
6204 ] + MICROKERNEL_BENCHMARK_HDRS,
6205 deps = MICROKERNEL_BENCHMARK_DEPS,
6206)
6207
6208xnnpack_benchmark(
6209 name = "f32_raddstoreexpminusmax_bench",
6210 srcs = [
6211 "bench/f32-raddstoreexpminusmax.cc",
6212 "src/xnnpack/AlignedAllocator.h",
6213 ] + MICROKERNEL_BENCHMARK_HDRS,
6214 deps = MICROKERNEL_BENCHMARK_DEPS,
6215)
6216
6217xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006218 name = "f32_rmax_bench",
6219 srcs = [
6220 "bench/f32-rmax.cc",
6221 "src/xnnpack/AlignedAllocator.h",
6222 ] + MICROKERNEL_BENCHMARK_HDRS,
6223 deps = MICROKERNEL_BENCHMARK_DEPS,
6224)
6225
6226xnnpack_benchmark(
6227 name = "f32_spmm_bench",
6228 srcs = [
6229 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006230 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006231 "src/xnnpack/AlignedAllocator.h",
6232 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006233 deps = MICROKERNEL_BENCHMARK_DEPS,
6234)
6235
6236xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006237 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006238 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006239 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006240 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006241 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006242 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006243)
6244
6245xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006246 name = "f32_velu_bench",
6247 srcs = [
6248 "bench/f32-velu.cc",
6249 "src/xnnpack/AlignedAllocator.h",
6250 ] + MICROKERNEL_BENCHMARK_HDRS,
6251 deps = MICROKERNEL_BENCHMARK_DEPS,
6252)
6253
6254xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006255 name = "f32_vhswish_bench",
6256 srcs = [
6257 "bench/f32-vhswish.cc",
6258 "src/xnnpack/AlignedAllocator.h",
6259 ] + MICROKERNEL_BENCHMARK_HDRS,
6260 deps = MICROKERNEL_BENCHMARK_DEPS,
6261)
6262
6263xnnpack_benchmark(
6264 name = "f32_vrelu_bench",
6265 srcs = [
6266 "bench/f32-vrelu.cc",
6267 "src/xnnpack/AlignedAllocator.h",
6268 ] + MICROKERNEL_BENCHMARK_HDRS,
6269 deps = MICROKERNEL_BENCHMARK_DEPS,
6270)
6271
6272xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006273 name = "f32_vscaleexpminusmax_bench",
6274 srcs = [
6275 "bench/f32-vscaleexpminusmax.cc",
6276 "src/xnnpack/AlignedAllocator.h",
6277 ] + MICROKERNEL_BENCHMARK_HDRS,
6278 deps = MICROKERNEL_BENCHMARK_DEPS,
6279)
6280
6281xnnpack_benchmark(
6282 name = "f32_vscaleextexp_bench",
6283 srcs = [
6284 "bench/f32-vscaleextexp.cc",
6285 "src/xnnpack/AlignedAllocator.h",
6286 ] + MICROKERNEL_BENCHMARK_HDRS,
6287 deps = MICROKERNEL_BENCHMARK_DEPS,
6288)
6289
6290xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006291 name = "f32_vsigmoid_bench",
6292 srcs = [
6293 "bench/f32-vsigmoid.cc",
6294 "src/xnnpack/AlignedAllocator.h",
6295 ] + MICROKERNEL_BENCHMARK_HDRS,
6296 deps = MICROKERNEL_BENCHMARK_DEPS,
6297)
6298
6299xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006300 name = "f32_vsqrt_bench",
6301 srcs = [
6302 "bench/f32-vsqrt.cc",
6303 "src/xnnpack/AlignedAllocator.h",
6304 ] + MICROKERNEL_BENCHMARK_HDRS,
6305 deps = MICROKERNEL_BENCHMARK_DEPS,
6306)
6307
6308xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006309 name = "f32_im2col_gemm_bench",
6310 srcs = [
6311 "bench/f32-im2col-gemm.cc",
6312 "bench/conv.h",
6313 "src/xnnpack/AlignedAllocator.h",
6314 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006315 deps = MICROKERNEL_BENCHMARK_DEPS + [
6316 ":im2col",
6317 ":packing",
6318 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006319)
6320
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006321xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006322 name = "rounding_bench",
6323 srcs = [
6324 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006325 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006326 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006327 ] + MICROKERNEL_BENCHMARK_HDRS,
6328 deps = MICROKERNEL_BENCHMARK_DEPS,
6329)
6330
Marat Dukhan08c4a432019-10-03 09:29:21 -07006331########################### Benchmarks for operators ###########################
6332
6333xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006334 name = "average_pooling_bench",
6335 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006336 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006337 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006338 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006339)
6340
6341xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006342 name = "bankers_rounding_bench",
6343 srcs = ["bench/bankers-rounding.cc"],
6344 copts = xnnpack_optional_tflite_copts(),
6345 tags = ["nowin32"],
6346 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6347)
6348
6349xnnpack_benchmark(
6350 name = "ceiling_bench",
6351 srcs = ["bench/ceiling.cc"],
6352 copts = xnnpack_optional_tflite_copts(),
6353 tags = ["nowin32"],
6354 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6355)
6356
6357xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006358 name = "channel_shuffle_bench",
6359 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006360 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006361)
6362
6363xnnpack_benchmark(
6364 name = "convolution_bench",
6365 srcs = ["bench/convolution.cc"],
6366 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006367 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006368 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006369)
6370
6371xnnpack_benchmark(
6372 name = "deconvolution_bench",
6373 srcs = ["bench/deconvolution.cc"],
6374 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006375 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006376 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006377)
6378
6379xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006380 name = "elu_bench",
6381 srcs = ["bench/elu.cc"],
6382 copts = xnnpack_optional_tflite_copts(),
6383 tags = ["nowin32"],
6384 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6385)
6386
6387xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006388 name = "floor_bench",
6389 srcs = ["bench/floor.cc"],
6390 copts = xnnpack_optional_tflite_copts(),
6391 tags = ["nowin32"],
6392 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6393)
6394
6395xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006396 name = "global_average_pooling_bench",
6397 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006398 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006399)
6400
6401xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006402 name = "hardswish_bench",
6403 srcs = ["bench/hardswish.cc"],
6404 copts = xnnpack_optional_tflite_copts(),
6405 tags = ["nowin32"],
6406 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6407)
6408
6409xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006410 name = "max_pooling_bench",
6411 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006412 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006413)
6414
6415xnnpack_benchmark(
6416 name = "sigmoid_bench",
6417 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006418 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006419 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006420 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006421)
6422
6423xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006424 name = "prelu_bench",
6425 srcs = ["bench/prelu.cc"],
6426 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006427 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006428 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006429)
6430
6431xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006432 name = "softmax_bench",
6433 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006434 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006435 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006436 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006437)
6438
Marat Dukhan87727142020-06-24 15:24:10 -07006439xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006440 name = "square_root_bench",
6441 srcs = ["bench/square-root.cc"],
6442 copts = xnnpack_optional_tflite_copts(),
6443 tags = ["nowin32"],
6444 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6445)
6446
6447xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006448 name = "truncation_bench",
6449 srcs = ["bench/truncation.cc"],
6450 deps = OPERATOR_BENCHMARK_DEPS,
6451)
6452
Marat Dukhanc068bb62019-10-04 13:24:39 -07006453############################# End-to-end benchmarks ############################
6454
6455cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006456 name = "fp32_mobilenet_v1",
6457 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006458 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006459 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006460 linkstatic = True,
6461 deps = [
6462 ":XNNPACK",
6463 "@pthreadpool",
6464 ],
6465)
6466
6467cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006468 name = "fp32_sparse_mobilenet_v1",
6469 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6470 hdrs = ["models/models.h"],
6471 copts = xnnpack_std_cxxopts(),
6472 linkstatic = True,
6473 deps = [
6474 ":XNNPACK",
6475 "@pthreadpool",
6476 ],
6477)
6478
6479cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006480 name = "fp16_mobilenet_v1",
6481 srcs = ["models/fp16-mobilenet-v1.cc"],
6482 hdrs = ["models/models.h"],
6483 copts = xnnpack_std_cxxopts(),
6484 linkstatic = True,
6485 deps = [
6486 ":XNNPACK",
6487 "@FP16",
6488 "@pthreadpool",
6489 ],
6490)
6491
6492cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006493 name = "qs8_mobilenet_v1",
6494 srcs = ["models/qs8-mobilenet-v1.cc"],
6495 hdrs = ["models/models.h"],
6496 copts = xnnpack_std_cxxopts(),
6497 linkstatic = True,
6498 deps = [
6499 ":XNNPACK",
6500 "@pthreadpool",
6501 ],
6502)
6503
6504cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006505 name = "qs8_mobilenet_v2",
6506 srcs = ["models/qs8-mobilenet-v2.cc"],
6507 hdrs = ["models/models.h"],
6508 copts = xnnpack_std_cxxopts(),
6509 linkstatic = True,
6510 deps = [
6511 ":XNNPACK",
6512 "@pthreadpool",
6513 ],
6514)
6515
6516cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006517 name = "qu8_mobilenet_v1",
6518 srcs = ["models/qu8-mobilenet-v1.cc"],
6519 hdrs = ["models/models.h"],
6520 copts = xnnpack_std_cxxopts(),
6521 linkstatic = True,
6522 deps = [
6523 ":XNNPACK",
6524 "@pthreadpool",
6525 ],
6526)
6527
6528cc_library(
Marat Dukhan036b2b12021-07-21 01:12:58 -07006529 name = "qu8_mobilenet_v2",
6530 srcs = ["models/qu8-mobilenet-v2.cc"],
6531 hdrs = ["models/models.h"],
6532 copts = xnnpack_std_cxxopts(),
6533 linkstatic = True,
6534 deps = [
6535 ":XNNPACK",
6536 "@pthreadpool",
6537 ],
6538)
6539
6540cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006541 name = "fp32_mobilenet_v2",
6542 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006543 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006544 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006545 linkstatic = True,
6546 deps = [
6547 ":XNNPACK",
6548 "@pthreadpool",
6549 ],
6550)
6551
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006552cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006553 name = "fp32_sparse_mobilenet_v2",
6554 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6555 hdrs = ["models/models.h"],
6556 copts = xnnpack_std_cxxopts(),
6557 linkstatic = True,
6558 deps = [
6559 ":XNNPACK",
6560 "@pthreadpool",
6561 ],
6562)
6563
6564cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006565 name = "fp16_mobilenet_v2",
6566 srcs = ["models/fp16-mobilenet-v2.cc"],
6567 hdrs = ["models/models.h"],
6568 copts = xnnpack_std_cxxopts(),
6569 linkstatic = True,
6570 deps = [
6571 ":XNNPACK",
6572 "@FP16",
6573 "@pthreadpool",
6574 ],
6575)
6576
6577cc_library(
6578 name = "fp32_mobilenet_v3_large",
6579 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006580 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006581 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006582 linkstatic = True,
6583 deps = [
6584 ":XNNPACK",
6585 "@pthreadpool",
6586 ],
6587)
6588
6589cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006590 name = "fp32_sparse_mobilenet_v3_large",
6591 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6592 hdrs = ["models/models.h"],
6593 copts = xnnpack_std_cxxopts(),
6594 linkstatic = True,
6595 deps = [
6596 ":XNNPACK",
6597 "@pthreadpool",
6598 ],
6599)
6600
6601cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006602 name = "fp16_mobilenet_v3_large",
6603 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6604 hdrs = ["models/models.h"],
6605 copts = xnnpack_std_cxxopts(),
6606 linkstatic = True,
6607 deps = [
6608 ":XNNPACK",
6609 "@FP16",
6610 "@pthreadpool",
6611 ],
6612)
6613
6614cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006615 name = "fp32_mobilenet_v3_small",
6616 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006617 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006618 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006619 linkstatic = True,
6620 deps = [
6621 ":XNNPACK",
6622 "@pthreadpool",
6623 ],
6624)
6625
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006626cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006627 name = "fp32_sparse_mobilenet_v3_small",
6628 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6629 hdrs = ["models/models.h"],
6630 copts = xnnpack_std_cxxopts(),
6631 linkstatic = True,
6632 deps = [
6633 ":XNNPACK",
6634 "@pthreadpool",
6635 ],
6636)
6637
6638cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006639 name = "fp16_mobilenet_v3_small",
6640 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6641 hdrs = ["models/models.h"],
6642 copts = xnnpack_std_cxxopts(),
6643 linkstatic = True,
6644 deps = [
6645 ":XNNPACK",
6646 "@FP16",
6647 "@pthreadpool",
6648 ],
6649)
6650
Marat Dukhanc068bb62019-10-04 13:24:39 -07006651xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006652 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006653 srcs = [
6654 "bench/f32-dwconv-e2e.cc",
6655 "bench/end2end.h",
6656 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006657 deps = MICROKERNEL_BENCHMARK_DEPS + [
6658 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006659 ":fp32_mobilenet_v1",
6660 ":fp32_mobilenet_v2",
6661 ":fp32_mobilenet_v3_large",
6662 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006663 ],
6664)
6665
6666xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006667 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006668 srcs = [
6669 "bench/f32-gemm-e2e.cc",
6670 "bench/end2end.h",
6671 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006672 deps = MICROKERNEL_BENCHMARK_DEPS + [
6673 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006674 ":fp32_mobilenet_v1",
6675 ":fp32_mobilenet_v2",
6676 ":fp32_mobilenet_v3_large",
6677 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006678 ],
6679)
6680
6681xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006682 name = "qs8_gemm_e2e_bench",
6683 srcs = [
6684 "bench/qs8-gemm-e2e.cc",
6685 "bench/end2end.h",
6686 ] + MICROKERNEL_BENCHMARK_HDRS,
6687 deps = MICROKERNEL_BENCHMARK_DEPS + [
6688 ":XNNPACK",
6689 ":qs8_mobilenet_v1",
6690 ":qs8_mobilenet_v2",
6691 ],
6692)
6693
6694xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006695 name = "end2end_bench",
6696 srcs = ["bench/end2end.cc"],
6697 deps = [
6698 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006699 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006700 ":fp16_mobilenet_v1",
6701 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006702 ":fp16_mobilenet_v3_large",
6703 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006704 ":fp32_mobilenet_v1",
6705 ":fp32_mobilenet_v2",
6706 ":fp32_mobilenet_v3_large",
6707 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006708 ":fp32_sparse_mobilenet_v1",
6709 ":fp32_sparse_mobilenet_v2",
6710 ":fp32_sparse_mobilenet_v3_large",
6711 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006712 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006713 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006714 ":qu8_mobilenet_v1",
Marat Dukhan036b2b12021-07-21 01:12:58 -07006715 ":qu8_mobilenet_v2",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006716 "@pthreadpool",
6717 ],
6718)
6719
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006720#################### Accuracy evaluation for math functions ####################
6721
6722xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006723 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006724 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006725 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006726 "src/xnnpack/AlignedAllocator.h",
6727 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006728 deps = ACCURACY_EVAL_DEPS + [
6729 ":bench_utils",
6730 "@cpuinfo",
6731 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006732)
6733
Marat Dukhan515c9772019-10-17 18:07:57 -07006734xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006735 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006736 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006737 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006738 "src/xnnpack/AlignedAllocator.h",
6739 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006740 deps = ACCURACY_EVAL_DEPS + [
6741 ":bench_utils",
6742 "@cpuinfo",
6743 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006744)
6745
Marat Dukhan98ba4412019-10-23 02:14:28 -07006746xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006747 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006748 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006749 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006750 "src/xnnpack/AlignedAllocator.h",
6751 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006752 deps = ACCURACY_EVAL_DEPS + [
6753 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006754 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006755 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006756)
6757
6758xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006759 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006760 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006761 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006762 "src/xnnpack/AlignedAllocator.h",
6763 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006764 deps = ACCURACY_EVAL_DEPS + [
6765 ":bench_utils",
6766 "@cpuinfo",
6767 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006768)
6769
Marat Dukhanf44f0222020-12-14 11:53:27 -08006770xnnpack_benchmark(
6771 name = "f32_sigmoid_ulp_eval",
6772 srcs = [
6773 "eval/f32-sigmoid-ulp.cc",
6774 "src/xnnpack/AlignedAllocator.h",
6775 ] + ACCURACY_EVAL_HDRS,
6776 deps = ACCURACY_EVAL_DEPS + [
6777 ":bench_utils",
6778 "@cpuinfo",
6779 ],
6780)
6781
6782xnnpack_benchmark(
6783 name = "f32_sqrt_ulp_eval",
6784 srcs = [
6785 "eval/f32-sqrt-ulp.cc",
6786 "src/xnnpack/AlignedAllocator.h",
6787 ] + ACCURACY_EVAL_HDRS,
6788 deps = ACCURACY_EVAL_DEPS + [
6789 ":bench_utils",
6790 "@cpuinfo",
6791 ],
6792)
6793
6794################### Accuracy verification for math functions ##################
6795
6796xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006797 name = "f32_exp_eval",
6798 srcs = [
6799 "eval/f32-exp.cc",
6800 "src/xnnpack/AlignedAllocator.h",
6801 "src/xnnpack/math-stubs.h",
6802 ] + MICROKERNEL_TEST_HDRS,
6803 automatic = False,
6804 deps = MICROKERNEL_TEST_DEPS,
6805)
6806
6807xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006808 name = "f32_expm1minus_eval",
6809 srcs = [
6810 "eval/f32-expm1minus.cc",
6811 "src/xnnpack/AlignedAllocator.h",
6812 "src/xnnpack/math-stubs.h",
6813 ] + MICROKERNEL_TEST_HDRS,
6814 automatic = False,
6815 deps = MICROKERNEL_TEST_DEPS,
6816)
6817
Marat Dukhan8853b822020-05-07 12:19:01 -07006818xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006819 name = "f32_expminus_eval",
6820 srcs = [
6821 "eval/f32-expminus.cc",
6822 "src/xnnpack/AlignedAllocator.h",
6823 "src/xnnpack/math-stubs.h",
6824 ] + MICROKERNEL_TEST_HDRS,
6825 automatic = False,
6826 deps = MICROKERNEL_TEST_DEPS,
6827)
6828
6829xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006830 name = "f32_roundne_eval",
6831 srcs = [
6832 "eval/f32-roundne.cc",
6833 "src/xnnpack/AlignedAllocator.h",
6834 "src/xnnpack/math-stubs.h",
6835 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006836 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006837 deps = MICROKERNEL_TEST_DEPS,
6838)
6839
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006840xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006841 name = "f32_roundd_eval",
6842 srcs = [
6843 "eval/f32-roundd.cc",
6844 "src/xnnpack/AlignedAllocator.h",
6845 "src/xnnpack/math-stubs.h",
6846 ] + MICROKERNEL_TEST_HDRS,
6847 automatic = False,
6848 deps = MICROKERNEL_TEST_DEPS,
6849)
6850
6851xnnpack_unit_test(
6852 name = "f32_roundu_eval",
6853 srcs = [
6854 "eval/f32-roundu.cc",
6855 "src/xnnpack/AlignedAllocator.h",
6856 "src/xnnpack/math-stubs.h",
6857 ] + MICROKERNEL_TEST_HDRS,
6858 automatic = False,
6859 deps = MICROKERNEL_TEST_DEPS,
6860)
6861
6862xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006863 name = "f32_roundz_eval",
6864 srcs = [
6865 "eval/f32-roundz.cc",
6866 "src/xnnpack/AlignedAllocator.h",
6867 "src/xnnpack/math-stubs.h",
6868 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006869 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006870 deps = MICROKERNEL_TEST_DEPS,
6871)
6872
Marat Dukhan08c4a432019-10-03 09:29:21 -07006873######################### Unit tests for micro-kernels #########################
6874
6875xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006876 name = "f16_dwconv_minmax_test",
6877 srcs = [
6878 "test/f16-dwconv-minmax.cc",
6879 "test/dwconv-microkernel-tester.h",
6880 "src/xnnpack/AlignedAllocator.h",
6881 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6882 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6883)
6884
6885xnnpack_unit_test(
6886 name = "f16_gavgpool_minmax_test",
6887 srcs = [
6888 "test/f16-gavgpool-minmax.cc",
6889 "test/gavgpool-microkernel-tester.h",
6890 "src/xnnpack/AlignedAllocator.h",
6891 ] + MICROKERNEL_TEST_HDRS,
6892 deps = MICROKERNEL_TEST_DEPS,
6893)
6894
6895xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006896 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006897 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006898 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006899 "test/gemm-microkernel-tester.h",
6900 "src/xnnpack/AlignedAllocator.h",
6901 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006902 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006903)
6904
6905xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006906 name = "f16_igemm_minmax_test",
6907 srcs = [
6908 "test/f16-igemm-minmax.cc",
6909 "test/gemm-microkernel-tester.h",
6910 "src/xnnpack/AlignedAllocator.h",
6911 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6912 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6913)
6914
6915xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006916 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006917 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006918 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006919 "test/spmm-microkernel-tester.h",
6920 "src/xnnpack/AlignedAllocator.h",
6921 ] + MICROKERNEL_TEST_HDRS,
6922 deps = MICROKERNEL_TEST_DEPS,
6923)
6924
6925xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006926 name = "f16_vadd_minmax_test",
6927 srcs = [
6928 "test/f16-vadd-minmax.cc",
6929 "test/vbinary-microkernel-tester.h",
6930 ] + MICROKERNEL_TEST_HDRS,
6931 deps = MICROKERNEL_TEST_DEPS,
6932)
6933
6934xnnpack_unit_test(
6935 name = "f16_vaddc_minmax_test",
6936 srcs = [
6937 "test/f16-vaddc-minmax.cc",
6938 "test/vbinaryc-microkernel-tester.h",
6939 ] + MICROKERNEL_TEST_HDRS,
6940 deps = MICROKERNEL_TEST_DEPS,
6941)
6942
6943xnnpack_unit_test(
6944 name = "f16_vclamp_test",
6945 srcs = [
6946 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006947 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006948 ] + MICROKERNEL_TEST_HDRS,
6949 deps = MICROKERNEL_TEST_DEPS,
6950)
6951
6952xnnpack_unit_test(
6953 name = "f16_vdiv_minmax_test",
6954 srcs = [
6955 "test/f16-vdiv-minmax.cc",
6956 "test/vbinary-microkernel-tester.h",
6957 ] + MICROKERNEL_TEST_HDRS,
6958 deps = MICROKERNEL_TEST_DEPS,
6959)
6960
6961xnnpack_unit_test(
6962 name = "f16_vdivc_minmax_test",
6963 srcs = [
6964 "test/f16-vdivc-minmax.cc",
6965 "test/vbinaryc-microkernel-tester.h",
6966 ] + MICROKERNEL_TEST_HDRS,
6967 deps = MICROKERNEL_TEST_DEPS,
6968)
6969
6970xnnpack_unit_test(
6971 name = "f16_vrdivc_minmax_test",
6972 srcs = [
6973 "test/f16-vrdivc-minmax.cc",
6974 "test/vbinaryc-microkernel-tester.h",
6975 ] + MICROKERNEL_TEST_HDRS,
6976 deps = MICROKERNEL_TEST_DEPS,
6977)
6978
6979xnnpack_unit_test(
6980 name = "f16_vhswish_test",
6981 srcs = [
6982 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006983 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006984 ] + MICROKERNEL_TEST_HDRS,
6985 deps = MICROKERNEL_TEST_DEPS,
6986)
6987
6988xnnpack_unit_test(
6989 name = "f16_vmax_test",
6990 srcs = [
6991 "test/f16-vmax.cc",
6992 "test/vbinary-microkernel-tester.h",
6993 ] + MICROKERNEL_TEST_HDRS,
6994 deps = MICROKERNEL_TEST_DEPS,
6995)
6996
6997xnnpack_unit_test(
6998 name = "f16_vmaxc_test",
6999 srcs = [
7000 "test/f16-vmaxc.cc",
7001 "test/vbinaryc-microkernel-tester.h",
7002 ] + MICROKERNEL_TEST_HDRS,
7003 deps = MICROKERNEL_TEST_DEPS,
7004)
7005
7006xnnpack_unit_test(
7007 name = "f16_vmin_test",
7008 srcs = [
7009 "test/f16-vmin.cc",
7010 "test/vbinary-microkernel-tester.h",
7011 ] + MICROKERNEL_TEST_HDRS,
7012 deps = MICROKERNEL_TEST_DEPS,
7013)
7014
7015xnnpack_unit_test(
7016 name = "f16_vminc_test",
7017 srcs = [
7018 "test/f16-vminc.cc",
7019 "test/vbinaryc-microkernel-tester.h",
7020 ] + MICROKERNEL_TEST_HDRS,
7021 deps = MICROKERNEL_TEST_DEPS,
7022)
7023
7024xnnpack_unit_test(
7025 name = "f16_vmul_minmax_test",
7026 srcs = [
7027 "test/f16-vmul-minmax.cc",
7028 "test/vbinary-microkernel-tester.h",
7029 ] + MICROKERNEL_TEST_HDRS,
7030 deps = MICROKERNEL_TEST_DEPS,
7031)
7032
7033xnnpack_unit_test(
7034 name = "f16_vmulc_minmax_test",
7035 srcs = [
7036 "test/f16-vmulc-minmax.cc",
7037 "test/vbinaryc-microkernel-tester.h",
7038 ] + MICROKERNEL_TEST_HDRS,
7039 deps = MICROKERNEL_TEST_DEPS,
7040)
7041
7042xnnpack_unit_test(
7043 name = "f16_vmulcaddc_minmax_test",
7044 srcs = [
7045 "test/f16-vmulcaddc-minmax.cc",
7046 "test/vmulcaddc-microkernel-tester.h",
7047 "src/xnnpack/AlignedAllocator.h",
7048 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7049 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7050)
7051
7052xnnpack_unit_test(
7053 name = "f16_vsub_minmax_test",
7054 srcs = [
7055 "test/f16-vsub-minmax.cc",
7056 "test/vbinary-microkernel-tester.h",
7057 ] + MICROKERNEL_TEST_HDRS,
7058 deps = MICROKERNEL_TEST_DEPS,
7059)
7060
7061xnnpack_unit_test(
7062 name = "f16_vsubc_minmax_test",
7063 srcs = [
7064 "test/f16-vsubc-minmax.cc",
7065 "test/vbinaryc-microkernel-tester.h",
7066 ] + MICROKERNEL_TEST_HDRS,
7067 deps = MICROKERNEL_TEST_DEPS,
7068)
7069
7070xnnpack_unit_test(
7071 name = "f16_vrsubc_minmax_test",
7072 srcs = [
7073 "test/f16-vrsubc-minmax.cc",
7074 "test/vbinaryc-microkernel-tester.h",
7075 ] + MICROKERNEL_TEST_HDRS,
7076 deps = MICROKERNEL_TEST_DEPS,
7077)
7078
7079xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007080 name = "f32_argmaxpool_test",
7081 srcs = [
7082 "test/f32-argmaxpool.cc",
7083 "test/argmaxpool-microkernel-tester.h",
7084 "src/xnnpack/AlignedAllocator.h",
7085 ] + MICROKERNEL_TEST_HDRS,
7086 deps = MICROKERNEL_TEST_DEPS,
7087)
7088
7089xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007090 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007091 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007092 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007093 "test/avgpool-microkernel-tester.h",
7094 "src/xnnpack/AlignedAllocator.h",
7095 ] + MICROKERNEL_TEST_HDRS,
7096 deps = MICROKERNEL_TEST_DEPS,
7097)
7098
7099xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07007100 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007101 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07007102 "test/f32-ibilinear.cc",
7103 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007104 "src/xnnpack/AlignedAllocator.h",
7105 ] + MICROKERNEL_TEST_HDRS,
7106 deps = MICROKERNEL_TEST_DEPS,
7107)
7108
7109xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07007110 name = "f32_ibilinear_chw_test",
7111 srcs = [
7112 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07007113 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07007114 "src/xnnpack/AlignedAllocator.h",
7115 ] + MICROKERNEL_TEST_HDRS,
7116 deps = MICROKERNEL_TEST_DEPS,
7117)
7118
7119xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007120 name = "f32_igemm_test",
7121 srcs = [
7122 "test/f32-igemm.cc",
7123 "test/gemm-microkernel-tester.h",
7124 "src/xnnpack/AlignedAllocator.h",
7125 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007126 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007127)
7128
7129xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007130 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007131 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07007132 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007133 "test/gemm-microkernel-tester.h",
7134 "src/xnnpack/AlignedAllocator.h",
7135 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007136 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007137)
7138
7139xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07007140 name = "f32_igemm_minmax_test",
7141 srcs = [
7142 "test/f32-igemm-minmax.cc",
7143 "test/gemm-microkernel-tester.h",
7144 "src/xnnpack/AlignedAllocator.h",
7145 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007146 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07007147)
7148
7149xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007150 name = "f32_conv_hwc_test",
7151 srcs = [
7152 "test/f32-conv-hwc.cc",
7153 "test/conv-hwc-microkernel-tester.h",
7154 "src/xnnpack/AlignedAllocator.h",
7155 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007156 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007157)
7158
7159xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007160 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007161 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007162 "test/f32-conv-hwc2chw.cc",
7163 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007164 "src/xnnpack/AlignedAllocator.h",
7165 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007166 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007167)
7168
7169xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007170 name = "f32_dwconv_test",
7171 srcs = [
7172 "test/f32-dwconv.cc",
7173 "test/dwconv-microkernel-tester.h",
7174 "src/xnnpack/AlignedAllocator.h",
7175 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007176 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007177)
7178
7179xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007180 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007181 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007182 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007183 "test/dwconv-microkernel-tester.h",
7184 "src/xnnpack/AlignedAllocator.h",
7185 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007186 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007187)
7188
7189xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07007190 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007191 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07007192 "test/f32-dwconv2d-chw.cc",
7193 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007194 "src/xnnpack/AlignedAllocator.h",
7195 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007196 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007197)
7198
7199xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007200 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007201 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007202 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007203 "test/gavgpool-microkernel-tester.h",
7204 "src/xnnpack/AlignedAllocator.h",
7205 ] + MICROKERNEL_TEST_HDRS,
7206 deps = MICROKERNEL_TEST_DEPS,
7207)
7208
7209xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007210 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007211 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007212 "test/f32-gavgpool-cw.cc",
7213 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007214 "src/xnnpack/AlignedAllocator.h",
7215 ] + MICROKERNEL_TEST_HDRS,
7216 deps = MICROKERNEL_TEST_DEPS,
7217)
7218
7219xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007220 name = "f32_gemm_test",
7221 srcs = [
7222 "test/f32-gemm.cc",
7223 "test/gemm-microkernel-tester.h",
7224 "src/xnnpack/AlignedAllocator.h",
7225 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007226 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007227)
7228
7229xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007230 name = "f32_gemm_relu_test",
7231 srcs = [
7232 "test/f32-gemm-relu.cc",
7233 "test/gemm-microkernel-tester.h",
7234 "src/xnnpack/AlignedAllocator.h",
7235 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007236 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007237)
7238
7239xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007240 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007241 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007242 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007243 "test/gemm-microkernel-tester.h",
7244 "src/xnnpack/AlignedAllocator.h",
7245 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007246 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007247)
7248
7249xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007250 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007251 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007252 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007253 "test/gemm-microkernel-tester.h",
7254 "src/xnnpack/AlignedAllocator.h",
7255 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007256 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007257)
7258
7259xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007260 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007261 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007262 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007263 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007264 ] + MICROKERNEL_TEST_HDRS,
7265 deps = MICROKERNEL_TEST_DEPS,
7266)
7267
7268xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007269 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007270 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007271 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007272 "test/maxpool-microkernel-tester.h",
7273 ] + MICROKERNEL_TEST_HDRS,
7274 deps = MICROKERNEL_TEST_DEPS,
7275)
7276
7277xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007278 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007279 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007280 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007281 "test/avgpool-microkernel-tester.h",
7282 "src/xnnpack/AlignedAllocator.h",
7283 ] + MICROKERNEL_TEST_HDRS,
7284 deps = MICROKERNEL_TEST_DEPS,
7285)
7286
7287xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007288 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007289 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007290 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007291 "test/gemm-microkernel-tester.h",
7292 "src/xnnpack/AlignedAllocator.h",
7293 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007294 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007295)
7296
7297xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007298 name = "f16_prelu_test",
7299 srcs = [
7300 "test/f16-prelu.cc",
7301 "test/prelu-microkernel-tester.h",
7302 "src/xnnpack/AlignedAllocator.h",
7303 ] + MICROKERNEL_TEST_HDRS,
7304 deps = MICROKERNEL_TEST_DEPS,
7305)
7306
7307xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007308 name = "f32_prelu_test",
7309 srcs = [
7310 "test/f32-prelu.cc",
7311 "test/prelu-microkernel-tester.h",
7312 "src/xnnpack/AlignedAllocator.h",
7313 ] + MICROKERNEL_TEST_HDRS,
7314 deps = MICROKERNEL_TEST_DEPS,
7315)
7316
7317xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007318 name = "f32_raddexpminusmax_test",
7319 srcs = [
7320 "test/f32-raddexpminusmax.cc",
7321 "test/raddexpminusmax-microkernel-tester.h",
7322 ] + MICROKERNEL_TEST_HDRS,
7323 deps = MICROKERNEL_TEST_DEPS,
7324)
7325
7326xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007327 name = "f32_raddextexp_test",
7328 srcs = [
7329 "test/f32-raddextexp.cc",
7330 "test/raddextexp-microkernel-tester.h",
7331 ] + MICROKERNEL_TEST_HDRS,
7332 deps = MICROKERNEL_TEST_DEPS,
7333)
7334
7335xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007336 name = "f32_raddstoreexpminusmax_test",
7337 srcs = [
7338 "test/f32-raddstoreexpminusmax.cc",
7339 "test/raddstoreexpminusmax-microkernel-tester.h",
7340 ] + MICROKERNEL_TEST_HDRS,
7341 deps = MICROKERNEL_TEST_DEPS,
7342)
7343
7344xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007345 name = "f32_rmax_test",
7346 srcs = [
7347 "test/f32-rmax.cc",
7348 "test/rmax-microkernel-tester.h",
7349 ] + MICROKERNEL_TEST_HDRS,
7350 deps = MICROKERNEL_TEST_DEPS,
7351)
7352
7353xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007354 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007355 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007356 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007357 "test/spmm-microkernel-tester.h",
7358 "src/xnnpack/AlignedAllocator.h",
7359 ] + MICROKERNEL_TEST_HDRS,
7360 deps = MICROKERNEL_TEST_DEPS,
7361)
7362
7363xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007364 name = "f32_vabs_test",
7365 srcs = [
7366 "test/f32-vabs.cc",
7367 "test/vunary-microkernel-tester.h",
7368 ] + MICROKERNEL_TEST_HDRS,
7369 deps = MICROKERNEL_TEST_DEPS,
7370)
7371
7372xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007373 name = "f32_vadd_test",
7374 srcs = [
7375 "test/f32-vadd.cc",
7376 "test/vbinary-microkernel-tester.h",
7377 ] + MICROKERNEL_TEST_HDRS,
7378 deps = MICROKERNEL_TEST_DEPS,
7379)
7380
7381xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007382 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007383 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007384 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007385 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007386 ] + MICROKERNEL_TEST_HDRS,
7387 deps = MICROKERNEL_TEST_DEPS,
7388)
7389
7390xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007391 name = "f32_vadd_relu_test",
7392 srcs = [
7393 "test/f32-vadd-relu.cc",
7394 "test/vbinary-microkernel-tester.h",
7395 ] + MICROKERNEL_TEST_HDRS,
7396 deps = MICROKERNEL_TEST_DEPS,
7397)
7398
7399xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007400 name = "f32_vaddc_test",
7401 srcs = [
7402 "test/f32-vaddc.cc",
7403 "test/vbinaryc-microkernel-tester.h",
7404 ] + MICROKERNEL_TEST_HDRS,
7405 deps = MICROKERNEL_TEST_DEPS,
7406)
7407
7408xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007409 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007410 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007411 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007412 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007413 ] + MICROKERNEL_TEST_HDRS,
7414 deps = MICROKERNEL_TEST_DEPS,
7415)
7416
7417xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007418 name = "f32_vaddc_relu_test",
7419 srcs = [
7420 "test/f32-vaddc-relu.cc",
7421 "test/vbinaryc-microkernel-tester.h",
7422 ] + MICROKERNEL_TEST_HDRS,
7423 deps = MICROKERNEL_TEST_DEPS,
7424)
7425
7426xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007427 name = "f32_vclamp_test",
7428 srcs = [
7429 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007430 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007431 ] + MICROKERNEL_TEST_HDRS,
7432 deps = MICROKERNEL_TEST_DEPS,
7433)
7434
7435xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007436 name = "f32_vdiv_test",
7437 srcs = [
7438 "test/f32-vdiv.cc",
7439 "test/vbinary-microkernel-tester.h",
7440 ] + MICROKERNEL_TEST_HDRS,
7441 deps = MICROKERNEL_TEST_DEPS,
7442)
7443
7444xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007445 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007446 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007447 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007448 "test/vbinary-microkernel-tester.h",
7449 ] + MICROKERNEL_TEST_HDRS,
7450 deps = MICROKERNEL_TEST_DEPS,
7451)
7452
7453xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007454 name = "f32_vdiv_relu_test",
7455 srcs = [
7456 "test/f32-vdiv-relu.cc",
7457 "test/vbinary-microkernel-tester.h",
7458 ] + MICROKERNEL_TEST_HDRS,
7459 deps = MICROKERNEL_TEST_DEPS,
7460)
7461
7462xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007463 name = "f32_vdivc_test",
7464 srcs = [
7465 "test/f32-vdivc.cc",
7466 "test/vbinaryc-microkernel-tester.h",
7467 ] + MICROKERNEL_TEST_HDRS,
7468 deps = MICROKERNEL_TEST_DEPS,
7469)
7470
7471xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007472 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007473 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007474 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007475 "test/vbinaryc-microkernel-tester.h",
7476 ] + MICROKERNEL_TEST_HDRS,
7477 deps = MICROKERNEL_TEST_DEPS,
7478)
7479
7480xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007481 name = "f32_vdivc_relu_test",
7482 srcs = [
7483 "test/f32-vdivc-relu.cc",
7484 "test/vbinaryc-microkernel-tester.h",
7485 ] + MICROKERNEL_TEST_HDRS,
7486 deps = MICROKERNEL_TEST_DEPS,
7487)
7488
7489xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007490 name = "f32_vrdivc_test",
7491 srcs = [
7492 "test/f32-vrdivc.cc",
7493 "test/vbinaryc-microkernel-tester.h",
7494 ] + MICROKERNEL_TEST_HDRS,
7495 deps = MICROKERNEL_TEST_DEPS,
7496)
7497
7498xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007499 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007500 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007501 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007502 "test/vbinaryc-microkernel-tester.h",
7503 ] + MICROKERNEL_TEST_HDRS,
7504 deps = MICROKERNEL_TEST_DEPS,
7505)
7506
7507xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007508 name = "f32_vrdivc_relu_test",
7509 srcs = [
7510 "test/f32-vrdivc-relu.cc",
7511 "test/vbinaryc-microkernel-tester.h",
7512 ] + MICROKERNEL_TEST_HDRS,
7513 deps = MICROKERNEL_TEST_DEPS,
7514)
7515
7516xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007517 name = "f32_velu_test",
7518 srcs = [
7519 "test/f32-velu.cc",
7520 "test/vunary-microkernel-tester.h",
7521 ] + MICROKERNEL_TEST_HDRS,
7522 deps = MICROKERNEL_TEST_DEPS,
7523)
7524
7525xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007526 name = "f32_vmax_test",
7527 srcs = [
7528 "test/f32-vmax.cc",
7529 "test/vbinary-microkernel-tester.h",
7530 ] + MICROKERNEL_TEST_HDRS,
7531 deps = MICROKERNEL_TEST_DEPS,
7532)
7533
7534xnnpack_unit_test(
7535 name = "f32_vmaxc_test",
7536 srcs = [
7537 "test/f32-vmaxc.cc",
7538 "test/vbinaryc-microkernel-tester.h",
7539 ] + MICROKERNEL_TEST_HDRS,
7540 deps = MICROKERNEL_TEST_DEPS,
7541)
7542
7543xnnpack_unit_test(
7544 name = "f32_vmin_test",
7545 srcs = [
7546 "test/f32-vmin.cc",
7547 "test/vbinary-microkernel-tester.h",
7548 ] + MICROKERNEL_TEST_HDRS,
7549 deps = MICROKERNEL_TEST_DEPS,
7550)
7551
7552xnnpack_unit_test(
7553 name = "f32_vminc_test",
7554 srcs = [
7555 "test/f32-vminc.cc",
7556 "test/vbinaryc-microkernel-tester.h",
7557 ] + MICROKERNEL_TEST_HDRS,
7558 deps = MICROKERNEL_TEST_DEPS,
7559)
7560
7561xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007562 name = "f32_vmul_test",
7563 srcs = [
7564 "test/f32-vmul.cc",
7565 "test/vbinary-microkernel-tester.h",
7566 ] + MICROKERNEL_TEST_HDRS,
7567 deps = MICROKERNEL_TEST_DEPS,
7568)
7569
7570xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007571 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007572 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007573 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007574 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007575 ] + MICROKERNEL_TEST_HDRS,
7576 deps = MICROKERNEL_TEST_DEPS,
7577)
7578
7579xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007580 name = "f32_vmul_relu_test",
7581 srcs = [
7582 "test/f32-vmul-relu.cc",
7583 "test/vbinary-microkernel-tester.h",
7584 ] + MICROKERNEL_TEST_HDRS,
7585 deps = MICROKERNEL_TEST_DEPS,
7586)
7587
7588xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007589 name = "f32_vmulc_test",
7590 srcs = [
7591 "test/f32-vmulc.cc",
7592 "test/vbinaryc-microkernel-tester.h",
7593 ] + MICROKERNEL_TEST_HDRS,
7594 deps = MICROKERNEL_TEST_DEPS,
7595)
7596
7597xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007598 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007599 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007600 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007601 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007602 ] + MICROKERNEL_TEST_HDRS,
7603 deps = MICROKERNEL_TEST_DEPS,
7604)
7605
7606xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007607 name = "f32_vmulc_relu_test",
7608 srcs = [
7609 "test/f32-vmulc-relu.cc",
7610 "test/vbinaryc-microkernel-tester.h",
7611 ] + MICROKERNEL_TEST_HDRS,
7612 deps = MICROKERNEL_TEST_DEPS,
7613)
7614
7615xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007616 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007617 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007618 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007619 "test/vmulcaddc-microkernel-tester.h",
7620 "src/xnnpack/AlignedAllocator.h",
7621 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007622 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007623)
7624
7625xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007626 name = "f32_vlrelu_test",
7627 srcs = [
7628 "test/f32-vlrelu.cc",
7629 "test/vunary-microkernel-tester.h",
7630 ] + MICROKERNEL_TEST_HDRS,
7631 deps = MICROKERNEL_TEST_DEPS,
7632)
7633
7634xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007635 name = "f32_vneg_test",
7636 srcs = [
7637 "test/f32-vneg.cc",
7638 "test/vunary-microkernel-tester.h",
7639 ] + MICROKERNEL_TEST_HDRS,
7640 deps = MICROKERNEL_TEST_DEPS,
7641)
7642
7643xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007644 name = "f32_vrelu_test",
7645 srcs = [
7646 "test/f32-vrelu.cc",
7647 "test/vunary-microkernel-tester.h",
7648 ] + MICROKERNEL_TEST_HDRS,
7649 deps = MICROKERNEL_TEST_DEPS,
7650)
7651
7652xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007653 name = "f32_vrndne_test",
7654 srcs = [
7655 "test/f32-vrndne.cc",
7656 "test/vunary-microkernel-tester.h",
7657 ] + MICROKERNEL_TEST_HDRS,
7658 deps = MICROKERNEL_TEST_DEPS,
7659)
7660
7661xnnpack_unit_test(
7662 name = "f32_vrndz_test",
7663 srcs = [
7664 "test/f32-vrndz.cc",
7665 "test/vunary-microkernel-tester.h",
7666 ] + MICROKERNEL_TEST_HDRS,
7667 deps = MICROKERNEL_TEST_DEPS,
7668)
7669
7670xnnpack_unit_test(
7671 name = "f32_vrndu_test",
7672 srcs = [
7673 "test/f32-vrndu.cc",
7674 "test/vunary-microkernel-tester.h",
7675 ] + MICROKERNEL_TEST_HDRS,
7676 deps = MICROKERNEL_TEST_DEPS,
7677)
7678
7679xnnpack_unit_test(
7680 name = "f32_vrndd_test",
7681 srcs = [
7682 "test/f32-vrndd.cc",
7683 "test/vunary-microkernel-tester.h",
7684 ] + MICROKERNEL_TEST_HDRS,
7685 deps = MICROKERNEL_TEST_DEPS,
7686)
7687
7688xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007689 name = "f32_vscale_test",
7690 srcs = [
7691 "test/f32-vscale.cc",
7692 "test/vscale-microkernel-tester.h",
7693 ] + MICROKERNEL_TEST_HDRS,
7694 deps = MICROKERNEL_TEST_DEPS,
7695)
7696
7697xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007698 name = "f32_vscaleexpminusmax_test",
7699 srcs = [
7700 "test/f32-vscaleexpminusmax.cc",
7701 "test/vscaleexpminusmax-microkernel-tester.h",
7702 ] + MICROKERNEL_TEST_HDRS,
7703 deps = MICROKERNEL_TEST_DEPS,
7704)
7705
7706xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007707 name = "f32_vscaleextexp_test",
7708 srcs = [
7709 "test/f32-vscaleextexp.cc",
7710 "test/vscaleextexp-microkernel-tester.h",
7711 ] + MICROKERNEL_TEST_HDRS,
7712 deps = MICROKERNEL_TEST_DEPS,
7713)
7714
7715xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007716 name = "f32_vsigmoid_test",
7717 srcs = [
7718 "test/f32-vsigmoid.cc",
7719 "test/vunary-microkernel-tester.h",
7720 ] + MICROKERNEL_TEST_HDRS,
7721 deps = MICROKERNEL_TEST_DEPS,
7722)
7723
7724xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007725 name = "f32_vsqr_test",
7726 srcs = [
7727 "test/f32-vsqr.cc",
7728 "test/vunary-microkernel-tester.h",
7729 ] + MICROKERNEL_TEST_HDRS,
7730 deps = MICROKERNEL_TEST_DEPS,
7731)
7732
7733xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007734 name = "f32_vsqrdiff_test",
7735 srcs = [
7736 "test/f32-vsqrdiff.cc",
7737 "test/vbinary-microkernel-tester.h",
7738 ] + MICROKERNEL_TEST_HDRS,
7739 deps = MICROKERNEL_TEST_DEPS,
7740)
7741
7742xnnpack_unit_test(
7743 name = "f32_vsqrdiffc_test",
7744 srcs = [
7745 "test/f32-vsqrdiffc.cc",
7746 "test/vbinaryc-microkernel-tester.h",
7747 ] + MICROKERNEL_TEST_HDRS,
7748 deps = MICROKERNEL_TEST_DEPS,
7749)
7750
7751xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007752 name = "f32_vsqrt_test",
7753 srcs = [
7754 "test/f32-vsqrt.cc",
7755 "test/vunary-microkernel-tester.h",
7756 ] + MICROKERNEL_TEST_HDRS,
7757 deps = MICROKERNEL_TEST_DEPS,
7758)
7759
7760xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007761 name = "f32_vsub_test",
7762 srcs = [
7763 "test/f32-vsub.cc",
7764 "test/vbinary-microkernel-tester.h",
7765 ] + MICROKERNEL_TEST_HDRS,
7766 deps = MICROKERNEL_TEST_DEPS,
7767)
7768
7769xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007770 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007771 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007772 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007773 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007774 ] + MICROKERNEL_TEST_HDRS,
7775 deps = MICROKERNEL_TEST_DEPS,
7776)
7777
7778xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007779 name = "f32_vsub_relu_test",
7780 srcs = [
7781 "test/f32-vsub-relu.cc",
7782 "test/vbinary-microkernel-tester.h",
7783 ] + MICROKERNEL_TEST_HDRS,
7784 deps = MICROKERNEL_TEST_DEPS,
7785)
7786
7787xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007788 name = "f32_vsubc_test",
7789 srcs = [
7790 "test/f32-vsubc.cc",
7791 "test/vbinaryc-microkernel-tester.h",
7792 ] + MICROKERNEL_TEST_HDRS,
7793 deps = MICROKERNEL_TEST_DEPS,
7794)
7795
7796xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007797 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007798 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007799 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007800 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007801 ] + MICROKERNEL_TEST_HDRS,
7802 deps = MICROKERNEL_TEST_DEPS,
7803)
7804
7805xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007806 name = "f32_vsubc_relu_test",
7807 srcs = [
7808 "test/f32-vsubc-relu.cc",
7809 "test/vbinaryc-microkernel-tester.h",
7810 ] + MICROKERNEL_TEST_HDRS,
7811 deps = MICROKERNEL_TEST_DEPS,
7812)
7813
7814xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007815 name = "f32_vrsubc_test",
7816 srcs = [
7817 "test/f32-vrsubc.cc",
7818 "test/vbinaryc-microkernel-tester.h",
7819 ] + MICROKERNEL_TEST_HDRS,
7820 deps = MICROKERNEL_TEST_DEPS,
7821)
7822
7823xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007824 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007825 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007826 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007827 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007828 ] + MICROKERNEL_TEST_HDRS,
7829 deps = MICROKERNEL_TEST_DEPS,
7830)
7831
7832xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007833 name = "f32_vrsubc_relu_test",
7834 srcs = [
7835 "test/f32-vrsubc-relu.cc",
7836 "test/vbinaryc-microkernel-tester.h",
7837 ] + MICROKERNEL_TEST_HDRS,
7838 deps = MICROKERNEL_TEST_DEPS,
7839)
7840
7841xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007842 name = "qc8_dwconv_minmax_fp32_test",
7843 timeout = "moderate",
7844 srcs = [
7845 "test/qc8-dwconv-minmax-fp32.cc",
7846 "test/dwconv-microkernel-tester.h",
7847 "src/xnnpack/AlignedAllocator.h",
7848 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7849 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7850)
7851
7852xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007853 name = "qc8_gemm_minmax_fp32_test",
7854 timeout = "moderate",
7855 srcs = [
7856 "test/qc8-gemm-minmax-fp32.cc",
7857 "test/gemm-microkernel-tester.h",
7858 "src/xnnpack/AlignedAllocator.h",
7859 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7860 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7861)
7862
7863xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007864 name = "qc8_igemm_minmax_fp32_test",
7865 timeout = "moderate",
7866 srcs = [
7867 "test/qc8-igemm-minmax-fp32.cc",
7868 "test/gemm-microkernel-tester.h",
7869 "src/xnnpack/AlignedAllocator.h",
7870 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7871 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7872)
7873
7874xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007875 name = "qs8_dwconv_minmax_fp32_test",
7876 srcs = [
7877 "test/qs8-dwconv-minmax-fp32.cc",
7878 "test/dwconv-microkernel-tester.h",
7879 "src/xnnpack/AlignedAllocator.h",
7880 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7881 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7882)
7883
7884xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007885 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007886 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007887 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007888 "test/dwconv-microkernel-tester.h",
7889 "src/xnnpack/AlignedAllocator.h",
7890 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7891 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7892)
7893
7894xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007895 name = "qs8_dwconv_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007896 srcs = [
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007897 "test/qs8-dwconv-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007898 "test/dwconv-microkernel-tester.h",
7899 "src/xnnpack/AlignedAllocator.h",
7900 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7901 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7902)
7903
7904xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007905 name = "qs8_gavgpool_minmax_test",
7906 srcs = [
7907 "test/qs8-gavgpool-minmax.cc",
7908 "test/gavgpool-microkernel-tester.h",
7909 "src/xnnpack/AlignedAllocator.h",
7910 ] + MICROKERNEL_TEST_HDRS,
7911 deps = MICROKERNEL_TEST_DEPS,
7912)
7913
7914xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07007915 name = "qs8_gemm_minmax_fp32_test",
7916 timeout = "moderate",
7917 srcs = [
7918 "test/qs8-gemm-minmax-fp32.cc",
7919 "test/gemm-microkernel-tester.h",
7920 "src/xnnpack/AlignedAllocator.h",
7921 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7922 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7923)
7924
7925xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007926 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007927 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007928 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007929 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007930 "test/gemm-microkernel-tester.h",
7931 "src/xnnpack/AlignedAllocator.h",
7932 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7933 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7934)
7935
7936xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07007937 name = "qs8_gemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007938 timeout = "moderate",
7939 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07007940 "test/qs8-gemm-minmax-rndnu.cc",
7941 "test/gemm-microkernel-tester.h",
7942 "src/xnnpack/AlignedAllocator.h",
7943 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7944 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7945)
7946
7947xnnpack_unit_test(
7948 name = "qs8_igemm_minmax_fp32_test",
7949 timeout = "moderate",
7950 srcs = [
7951 "test/qs8-igemm-minmax-fp32.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007952 "test/gemm-microkernel-tester.h",
7953 "src/xnnpack/AlignedAllocator.h",
7954 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7955 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7956)
7957
7958xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007959 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007960 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007961 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007962 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007963 "test/gemm-microkernel-tester.h",
7964 "src/xnnpack/AlignedAllocator.h",
7965 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7966 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7967)
7968
7969xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07007970 name = "qs8_igemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007971 timeout = "moderate",
7972 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07007973 "test/qs8-igemm-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007974 "test/gemm-microkernel-tester.h",
7975 "src/xnnpack/AlignedAllocator.h",
7976 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7977 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7978)
7979
7980xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007981 name = "qs8_requantization_test",
7982 srcs = [
7983 "src/xnnpack/requantization-stubs.h",
7984 "test/qs8-requantization.cc",
7985 "test/requantization-tester.h",
7986 ] + MICROKERNEL_TEST_HDRS,
7987 deps = MICROKERNEL_TEST_DEPS,
7988)
7989
7990xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007991 name = "qs8_vadd_minmax_test",
7992 srcs = [
7993 "test/qs8-vadd-minmax.cc",
7994 "test/vadd-microkernel-tester.h",
7995 ] + MICROKERNEL_TEST_HDRS,
7996 deps = MICROKERNEL_TEST_DEPS,
7997)
7998
7999xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07008000 name = "qs8_vaddc_minmax_test",
8001 srcs = [
8002 "test/qs8-vaddc-minmax.cc",
8003 "test/vaddc-microkernel-tester.h",
8004 ] + MICROKERNEL_TEST_HDRS,
8005 deps = MICROKERNEL_TEST_DEPS,
8006)
8007
8008xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008009 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008010 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008011 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008012 "test/avgpool-microkernel-tester.h",
8013 "src/xnnpack/AlignedAllocator.h",
8014 ] + MICROKERNEL_TEST_HDRS,
8015 deps = MICROKERNEL_TEST_DEPS,
8016)
8017
8018xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07008019 name = "qu8_dwconv_minmax_fp32_test",
8020 srcs = [
8021 "test/qu8-dwconv-minmax-fp32.cc",
8022 "test/dwconv-microkernel-tester.h",
8023 "src/xnnpack/AlignedAllocator.h",
8024 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8025 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8026)
8027
8028xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07008029 name = "qu8_igemm_minmax_fp32_test",
8030 srcs = [
8031 "test/qu8-igemm-minmax-fp32.cc",
8032 "test/gemm-microkernel-tester.h",
8033 "src/xnnpack/AlignedAllocator.h",
8034 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8035 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8036)
8037
8038xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008039 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008040 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008041 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07008042 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008043 "src/xnnpack/AlignedAllocator.h",
8044 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008045 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008046)
8047
8048xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008049 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008050 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008051 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008052 "test/gavgpool-microkernel-tester.h",
8053 "src/xnnpack/AlignedAllocator.h",
8054 ] + MICROKERNEL_TEST_HDRS,
8055 deps = MICROKERNEL_TEST_DEPS,
8056)
8057
8058xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07008059 name = "qu8_gemm_minmax_fp32_test",
8060 srcs = [
8061 "test/qu8-gemm-minmax-fp32.cc",
8062 "test/gemm-microkernel-tester.h",
8063 "src/xnnpack/AlignedAllocator.h",
8064 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8065 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8066)
8067
8068xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008069 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008070 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008071 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008072 "test/gemm-microkernel-tester.h",
8073 "src/xnnpack/AlignedAllocator.h",
8074 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008075 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008076)
8077
8078xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07008079 name = "qu8_requantization_test",
8080 srcs = [
8081 "src/xnnpack/requantization-stubs.h",
8082 "test/qu8-requantization.cc",
8083 "test/requantization-tester.h",
8084 ] + MICROKERNEL_TEST_HDRS,
8085 deps = MICROKERNEL_TEST_DEPS,
8086)
8087
8088xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008089 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008090 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008091 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008092 "test/vadd-microkernel-tester.h",
8093 ] + MICROKERNEL_TEST_HDRS,
8094 deps = MICROKERNEL_TEST_DEPS,
8095)
8096
8097xnnpack_unit_test(
Marat Dukhan76e78c82021-07-20 21:11:23 -07008098 name = "qu8_vaddc_minmax_test",
8099 srcs = [
8100 "test/qu8-vaddc-minmax.cc",
8101 "test/vaddc-microkernel-tester.h",
8102 ] + MICROKERNEL_TEST_HDRS,
8103 deps = MICROKERNEL_TEST_DEPS,
8104)
8105
8106xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008107 name = "u8_lut32norm_test",
8108 srcs = [
8109 "test/u8-lut32norm.cc",
8110 "test/lut-norm-microkernel-tester.h",
8111 ] + MICROKERNEL_TEST_HDRS,
8112 deps = MICROKERNEL_TEST_DEPS,
8113)
8114
8115xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07008116 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008117 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07008118 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008119 "test/maxpool-microkernel-tester.h",
8120 ] + MICROKERNEL_TEST_HDRS,
8121 deps = MICROKERNEL_TEST_DEPS,
8122)
8123
8124xnnpack_unit_test(
8125 name = "u8_rmax_test",
8126 srcs = [
8127 "test/u8-rmax.cc",
8128 "test/rmax-microkernel-tester.h",
8129 ] + MICROKERNEL_TEST_HDRS,
8130 deps = MICROKERNEL_TEST_DEPS,
8131)
8132
8133xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07008134 name = "u8_vclamp_test",
8135 srcs = [
8136 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07008137 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07008138 ] + MICROKERNEL_TEST_HDRS,
8139 deps = MICROKERNEL_TEST_DEPS,
8140)
8141
8142xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008143 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08008144 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008145 "test/x32-depthtospace2d-chw2hwc.cc",
8146 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08008147 ] + MICROKERNEL_TEST_HDRS,
8148 deps = MICROKERNEL_TEST_DEPS,
8149)
8150
8151xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07008152 name = "x32_fill_test",
8153 srcs = [
8154 "test/x32-fill.cc",
8155 "test/fill-microkernel-tester.h",
8156 ] + MICROKERNEL_TEST_HDRS,
8157 deps = MICROKERNEL_TEST_DEPS,
8158)
8159
8160xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008161 name = "x32_packx_test",
8162 srcs = [
8163 "test/x32-packx.cc",
8164 "test/pack-microkernel-tester.h",
8165 "src/xnnpack/AlignedAllocator.h",
8166 ] + MICROKERNEL_TEST_HDRS,
8167 deps = MICROKERNEL_TEST_DEPS,
8168)
8169
8170xnnpack_unit_test(
8171 name = "x32_pad_test",
8172 srcs = [
8173 "test/x32-pad.cc",
8174 "test/pad-microkernel-tester.h",
8175 ] + MICROKERNEL_TEST_HDRS,
8176 deps = MICROKERNEL_TEST_DEPS,
8177)
8178
8179xnnpack_unit_test(
8180 name = "x32_unpool_test",
8181 srcs = [
8182 "test/x32-unpool.cc",
8183 "test/unpool-microkernel-tester.h",
8184 ] + MICROKERNEL_TEST_HDRS,
8185 deps = MICROKERNEL_TEST_DEPS,
8186)
8187
8188xnnpack_unit_test(
8189 name = "x32_zip_test",
8190 srcs = [
8191 "test/x32-zip.cc",
8192 "test/zip-microkernel-tester.h",
8193 ] + MICROKERNEL_TEST_HDRS,
8194 deps = MICROKERNEL_TEST_DEPS,
8195)
8196
8197xnnpack_unit_test(
8198 name = "x8_lut_test",
8199 srcs = [
8200 "test/x8-lut.cc",
8201 "test/lut-microkernel-tester.h",
8202 ] + MICROKERNEL_TEST_HDRS,
8203 deps = MICROKERNEL_TEST_DEPS,
8204)
8205
8206xnnpack_unit_test(
8207 name = "x8_zip_test",
8208 srcs = [
8209 "test/x8-zip.cc",
8210 "test/zip-microkernel-tester.h",
8211 ] + MICROKERNEL_TEST_HDRS,
8212 deps = MICROKERNEL_TEST_DEPS,
8213)
8214
Marat Dukhan20c3b922020-03-10 03:45:06 -07008215########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008216
8217xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07008218 name = "operator_size_test",
8219 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008220 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008221)
8222
Marat Dukhan20c3b922020-03-10 03:45:06 -07008223xnnpack_binary(
8224 name = "subgraph_size_test",
8225 srcs = ["test/subgraph-size.c"],
8226 deps = [":XNNPACK"],
8227)
8228
8229########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008230
8231xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008232 name = "abs_nc_test",
8233 srcs = [
8234 "test/abs-nc.cc",
8235 "test/abs-operator-tester.h",
8236 ],
8237 deps = OPERATOR_TEST_DEPS,
8238)
8239
8240xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008241 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008242 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008243 srcs = [
8244 "test/add-nd.cc",
8245 "test/binary-elementwise-operator-tester.h",
8246 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008247 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008248)
8249
8250xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008251 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008252 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008253 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008254 "test/argmax-pooling-operator-tester.h",
8255 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008256 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008257)
8258
8259xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008260 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008261 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008262 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008263 "test/average-pooling-operator-tester.h",
8264 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008265 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008266)
8267
8268xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008269 name = "bankers_rounding_nc_test",
8270 srcs = [
8271 "test/bankers-rounding-nc.cc",
8272 "test/bankers-rounding-operator-tester.h",
8273 ],
8274 deps = OPERATOR_TEST_DEPS,
8275)
8276
8277xnnpack_unit_test(
8278 name = "ceiling_nc_test",
8279 srcs = [
8280 "test/ceiling-nc.cc",
8281 "test/ceiling-operator-tester.h",
8282 ],
8283 deps = OPERATOR_TEST_DEPS,
8284)
8285
8286xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008287 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008288 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008289 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008290 "test/channel-shuffle-operator-tester.h",
8291 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008292 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008293)
8294
8295xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008296 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008297 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008298 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008299 "test/clamp-operator-tester.h",
8300 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008301 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008302)
8303
8304xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008305 name = "constant_pad_nd_test",
8306 srcs = [
8307 "test/constant-pad-nd.cc",
8308 "test/constant-pad-operator-tester.h",
8309 ],
8310 deps = OPERATOR_TEST_DEPS,
8311)
8312
8313xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008314 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008315 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008316 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008317 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008318 "test/convolution-operator-tester.h",
8319 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008320 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008321)
8322
8323xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008324 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008325 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008326 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008327 "test/convolution-nchw.cc",
8328 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008329 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008330 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008331)
8332
8333xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008334 name = "copy_nc_test",
8335 srcs = [
8336 "test/copy-nc.cc",
8337 "test/copy-operator-tester.h",
8338 ],
8339 deps = OPERATOR_TEST_DEPS,
8340)
8341
8342xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008343 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008344 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008345 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008346 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008347 "test/deconvolution-operator-tester.h",
8348 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008349 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008350)
8351
8352xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008353 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008354 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008355 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008356 "test/depth-to-space-operator-tester.h",
8357 ] + OPERATOR_TEST_PARAMS_HDRS,
8358 deps = OPERATOR_TEST_DEPS,
8359)
8360
8361xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008362 name = "depth_to_space_nhwc_test",
8363 srcs = [
8364 "test/depth-to-space-nhwc.cc",
8365 "test/depth-to-space-operator-tester.h",
8366 ] + OPERATOR_TEST_PARAMS_HDRS,
8367 deps = OPERATOR_TEST_DEPS,
8368)
8369
8370xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008371 name = "divide_nd_test",
8372 srcs = [
8373 "test/binary-elementwise-operator-tester.h",
8374 "test/divide-nd.cc",
8375 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008376 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008377)
8378
8379xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008380 name = "elu_nc_test",
8381 srcs = [
8382 "test/elu-nc.cc",
8383 "test/elu-operator-tester.h",
8384 ],
8385 deps = OPERATOR_TEST_DEPS,
8386)
8387
8388xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008389 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008390 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008391 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008392 "test/fully-connected-operator-tester.h",
8393 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008394 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008395)
8396
8397xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008398 name = "floor_nc_test",
8399 srcs = [
8400 "test/floor-nc.cc",
8401 "test/floor-operator-tester.h",
8402 ],
8403 deps = OPERATOR_TEST_DEPS,
8404)
8405
8406xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008407 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008408 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008409 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008410 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008411 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008412 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008413)
8414
8415xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008416 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008417 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008418 "test/global-average-pooling-ncw.cc",
8419 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008420 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008421 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008422)
8423
8424xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008425 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008426 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008427 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008428 "test/hardswish-operator-tester.h",
8429 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008430 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008431)
8432
8433xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008434 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008435 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008436 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008437 "test/leaky-relu-operator-tester.h",
8438 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008439 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008440)
8441
8442xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008443 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008444 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008445 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008446 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008447 "test/max-pooling-operator-tester.h",
8448 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008449 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008450)
8451
8452xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008453 name = "maximum_nd_test",
8454 srcs = [
8455 "test/binary-elementwise-operator-tester.h",
8456 "test/maximum-nd.cc",
8457 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008458 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008459)
8460
8461xnnpack_unit_test(
8462 name = "minimum_nd_test",
8463 srcs = [
8464 "test/binary-elementwise-operator-tester.h",
8465 "test/minimum-nd.cc",
8466 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008467 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008468)
8469
8470xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008471 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008472 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008473 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008474 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008475 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008476 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008477)
8478
8479xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008480 name = "negate_nc_test",
8481 srcs = [
8482 "test/negate-nc.cc",
8483 "test/negate-operator-tester.h",
8484 ],
8485 deps = OPERATOR_TEST_DEPS,
8486)
8487
8488xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008489 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008490 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008491 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008492 "test/prelu-operator-tester.h",
8493 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008494 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008495)
8496
8497xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008498 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008499 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008500 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008501 "test/resize-bilinear-operator-tester.h",
8502 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008503 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008504)
8505
8506xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008507 name = "resize_bilinear_nchw_test",
8508 srcs = [
8509 "test/resize-bilinear-nchw.cc",
8510 "test/resize-bilinear-operator-tester.h",
8511 ] + OPERATOR_TEST_PARAMS_HDRS,
8512 deps = OPERATOR_TEST_DEPS,
8513)
8514
8515xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008516 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008517 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008518 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008519 "test/sigmoid-operator-tester.h",
8520 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008521 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008522)
8523
8524xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008525 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008526 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008527 "test/softmax-nc.cc",
8528 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008529 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008530 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008531)
8532
8533xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008534 name = "square_nc_test",
8535 srcs = [
8536 "test/square-nc.cc",
8537 "test/square-operator-tester.h",
8538 ],
8539 deps = OPERATOR_TEST_DEPS,
8540)
8541
8542xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008543 name = "square_root_nc_test",
8544 srcs = [
8545 "test/square-root-nc.cc",
8546 "test/square-root-operator-tester.h",
8547 ],
8548 deps = OPERATOR_TEST_DEPS,
8549)
8550
8551xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008552 name = "squared_difference_nd_test",
8553 srcs = [
8554 "test/binary-elementwise-operator-tester.h",
8555 "test/squared-difference-nd.cc",
8556 ],
8557 deps = OPERATOR_TEST_DEPS,
8558)
8559
8560xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008561 name = "subtract_nd_test",
8562 srcs = [
8563 "test/binary-elementwise-operator-tester.h",
8564 "test/subtract-nd.cc",
8565 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008566 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008567)
8568
8569xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008570 name = "truncation_nc_test",
8571 srcs = [
8572 "test/truncation-nc.cc",
8573 "test/truncation-operator-tester.h",
8574 ],
8575 deps = OPERATOR_TEST_DEPS,
8576)
8577
8578xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008579 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008580 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008581 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008582 "test/unpooling-operator-tester.h",
8583 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008584 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008585)
8586
Chao Mei6ddfc602020-05-13 22:29:36 -07008587############################### Misc unit tests ###############################
8588
8589xnnpack_unit_test(
8590 name = "memory_planner_test",
8591 srcs = [
8592 "test/memory-planner-test.cc",
8593 ],
8594 deps = [
8595 ":XNNPACK",
8596 ":memory_planner",
8597 ],
8598)
8599
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008600xnnpack_unit_test(
8601 name = "subgraph_nchw_test",
8602 srcs = [
8603 "src/xnnpack/subgraph.h",
8604 "test/subgraph-nchw.cc",
8605 "test/subgraph-tester.h",
8606 ],
8607 deps = [
8608 ":XNNPACK",
8609 ],
8610)
8611
Marat Dukhan08c4a432019-10-03 09:29:21 -07008612############################# Build configurations #############################
8613
Marat Dukhanb8642352019-10-30 15:43:02 -07008614# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008615config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008616 name = "xnn_enable_assembly_explicit_true",
8617 define_values = {"xnn_enable_assembly": "true"},
8618)
8619
8620# Disables usage of assembly kernels.
8621config_setting(
8622 name = "xnn_enable_assembly_explicit_false",
8623 define_values = {"xnn_enable_assembly": "false"},
8624)
8625
Marat Dukhan9de90e02020-06-18 16:04:12 -07008626# Enables usage of sparse inference.
8627config_setting(
8628 name = "xnn_enable_sparse_explicit_true",
8629 define_values = {"xnn_enable_sparse": "true"},
8630)
8631
8632# Disables usage of sparse inference.
8633config_setting(
8634 name = "xnn_enable_sparse_explicit_false",
8635 define_values = {"xnn_enable_sparse": "false"},
8636)
8637
Marat Dukhan05702cf2020-03-26 15:41:33 -07008638# Disables usage of HMP-aware optimizations.
8639config_setting(
8640 name = "xnn_enable_hmp_explicit_false",
8641 define_values = {"xnn_enable_hmp": "false"},
8642)
8643
Chao Mei6ddfc602020-05-13 22:29:36 -07008644# Enable usage of optimized memory allocation
8645config_setting(
8646 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008647 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008648)
8649
8650# Disable usage of optimized memory allocation
8651config_setting(
8652 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008653 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008654)
8655
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008656# Enable QS8 inference in TFLite-specific version
8657config_setting(
8658 name = "xnn_enable_qs8_explicit_true",
8659 define_values = {"xnn_enable_qs8": "true"},
8660)
8661
8662# Disable QS8 inference in TFLite-specific version
8663config_setting(
8664 name = "xnn_enable_qs8_explicit_false",
8665 define_values = {"xnn_enable_qs8": "false"},
8666)
8667
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008668# Enable QU8 inference in TFLite-specific version
8669config_setting(
8670 name = "xnn_enable_qu8_explicit_true",
8671 define_values = {"xnn_enable_qu8": "true"},
8672)
8673
8674# Disable QU8 inference in TFLite-specific version
8675config_setting(
8676 name = "xnn_enable_qu8_explicit_false",
8677 define_values = {"xnn_enable_qu8": "false"},
8678)
8679
Marat Dukhanb8642352019-10-30 15:43:02 -07008680# Builds with -c dbg
8681config_setting(
8682 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008683 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008684 "compilation_mode": "dbg",
8685 },
8686)
8687
8688# Builds with -c opt
8689config_setting(
8690 name = "optimized_build",
8691 values = {
8692 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008693 },
8694)
8695
8696config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008697 name = "linux_k8",
8698 values = {"cpu": "k8"},
8699)
8700
8701config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008702 name = "linux_arm",
8703 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008704)
8705
8706config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008707 name = "linux_armeabi",
8708 values = {"cpu": "armeabi"},
8709)
8710
8711config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008712 name = "linux_armhf",
8713 values = {"cpu": "armhf"},
8714)
8715
8716config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008717 name = "linux_armv7a",
8718 values = {"cpu": "armv7a"},
8719)
8720
8721config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008722 name = "linux_aarch64",
8723 values = {"cpu": "aarch64"},
8724)
8725
8726config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008727 name = "android",
8728 values = {"crosstool_top": "//external:android/crosstool"},
8729)
8730
8731config_setting(
8732 name = "android_armv7",
8733 values = {
8734 "crosstool_top": "//external:android/crosstool",
8735 "cpu": "armeabi-v7a",
8736 },
8737)
8738
8739config_setting(
8740 name = "android_arm64",
8741 values = {
8742 "crosstool_top": "//external:android/crosstool",
8743 "cpu": "arm64-v8a",
8744 },
8745)
8746
8747config_setting(
8748 name = "android_x86",
8749 values = {
8750 "crosstool_top": "//external:android/crosstool",
8751 "cpu": "x86",
8752 },
8753)
8754
8755config_setting(
8756 name = "android_x86_64",
8757 values = {
8758 "crosstool_top": "//external:android/crosstool",
8759 "cpu": "x86_64",
8760 },
8761)
8762
8763config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008764 name = "windows_x86_64",
8765 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008766)
8767
8768config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008769 name = "windows_x86_64_clang",
8770 values = {
8771 "compiler": "clang-cl",
8772 "cpu": "x64_windows",
8773 },
8774)
8775
8776config_setting(
8777 name = "windows_x86_64_mingw",
8778 values = {
8779 "compiler": "mingw-gcc",
8780 "cpu": "x64_windows",
8781 },
8782)
8783
8784config_setting(
8785 name = "windows_x86_64_msys",
8786 values = {
8787 "compiler": "msys-gcc",
8788 "cpu": "x64_windows",
8789 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008790)
8791
8792config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008793 name = "macos_x86_64",
8794 values = {
8795 "apple_platform_type": "macos",
8796 "cpu": "darwin",
8797 },
8798)
8799
8800config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008801 name = "macos_arm64",
8802 values = {
8803 "apple_platform_type": "macos",
8804 "cpu": "darwin_arm64",
8805 },
8806)
8807
8808config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008809 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008810 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008811)
8812
8813config_setting(
8814 name = "emscripten_wasm",
8815 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008816 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008817 "cpu": "wasm",
8818 },
8819)
8820
8821config_setting(
8822 name = "emscripten_wasmsimd",
8823 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008824 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008825 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008826 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008827 },
8828)
8829
8830config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008831 name = "ios_armv7",
8832 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008833 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008834 "cpu": "ios_armv7",
8835 },
8836)
8837
8838config_setting(
8839 name = "ios_arm64",
8840 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008841 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008842 "cpu": "ios_arm64",
8843 },
8844)
8845
8846config_setting(
8847 name = "ios_arm64e",
8848 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008849 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008850 "cpu": "ios_arm64e",
8851 },
8852)
8853
8854config_setting(
8855 name = "ios_x86",
8856 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008857 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008858 "cpu": "ios_i386",
8859 },
8860)
8861
8862config_setting(
8863 name = "ios_x86_64",
8864 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008865 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008866 "cpu": "ios_x86_64",
8867 },
8868)
8869
8870config_setting(
8871 name = "watchos_armv7k",
8872 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008873 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008874 "cpu": "watchos_armv7k",
8875 },
8876)
8877
8878config_setting(
8879 name = "watchos_arm64_32",
8880 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008881 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008882 "cpu": "watchos_arm64_32",
8883 },
8884)
8885
8886config_setting(
8887 name = "watchos_x86",
8888 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008889 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008890 "cpu": "watchos_i386",
8891 },
8892)
8893
8894config_setting(
8895 name = "watchos_x86_64",
8896 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008897 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008898 "cpu": "watchos_x86_64",
8899 },
8900)
8901
8902config_setting(
8903 name = "tvos_arm64",
8904 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008905 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008906 "cpu": "tvos_arm64",
8907 },
8908)
8909
8910config_setting(
8911 name = "tvos_x86_64",
8912 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008913 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008914 "cpu": "tvos_x86_64",
8915 },
8916)