blob: b60fe6fcf560fa418f7b88b1e7315dfdc5d7a803 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700252 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
474 "src/math/expm1minus-scalar-rr2-p5.c",
475 "src/math/expm1minus-scalar-rr2-p6.c",
Frank Barchard22136062020-11-24 18:44:46 -0800476 "src/math/expminus-scalar-rr2-lut64-p2.c",
477 "src/math/expminus-scalar-rr2-lut2048-p1.c",
478 "src/math/expminus-scalar-rr2-p5.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
483 "src/math/roundne-scalar-nearbyint.c",
484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
489 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700494 "src/params-init.c",
Marat Dukhan57547062021-06-30 16:53:29 -0700495 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
496 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
497 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
498 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
499 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
500 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
501 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
502 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
503 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
504 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
505 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
506 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhand6021542021-06-30 09:04:20 -0700507 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
508 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
509 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
510 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
511 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
512 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
513 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
514 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
515 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
516 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
517 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
518 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
519 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
520 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
521 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
522 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
523 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
524 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
525 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
526 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
528 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
530 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
531 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
532 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
541 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700542 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
543 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700545 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
546 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
552 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
553 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700554 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
555 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
556 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700557 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
558 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
559 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
560 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
561 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
562 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700563 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
564 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700565 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700566 "src/qs8-gemm/gen/1x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700567 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
568 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700569 "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700570 "src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700571 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
572 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700573 "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700574 "src/qs8-gemm/gen/2x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700575 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
576 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700577 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700578 "src/qs8-gemm/gen/2x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700579 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
580 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700581 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700582 "src/qs8-gemm/gen/3x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700583 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
584 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700585 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700586 "src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700587 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
588 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700589 "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700590 "src/qs8-gemm/gen/4x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700591 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
592 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700593 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700594 "src/qs8-gemm/gen/4x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700595 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
596 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700597 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700598 "src/qs8-igemm/gen/1x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700599 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
600 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700601 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700602 "src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700603 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
604 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700605 "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700606 "src/qs8-igemm/gen/2x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700607 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
608 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700609 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700610 "src/qs8-igemm/gen/2x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700611 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
612 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700613 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700614 "src/qs8-igemm/gen/3x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700615 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
616 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700617 "src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700618 "src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700619 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
620 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700621 "src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700622 "src/qs8-igemm/gen/4x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700623 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
624 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700625 "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700626 "src/qs8-igemm/gen/4x4-minmax-rndnu-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700627 "src/qs8-requantization/fp32-scalar-lrintf.c",
628 "src/qs8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700629 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700630 "src/qs8-requantization/rndna-scalar-signed64.c",
631 "src/qs8-requantization/rndna-scalar-unsigned32.c",
632 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan062bee32021-05-27 20:31:07 -0700633 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700634 "src/qs8-vadd/gen/minmax-scalar-x1.c",
635 "src/qs8-vadd/gen/minmax-scalar-x2.c",
636 "src/qs8-vadd/gen/minmax-scalar-x4.c",
637 "src/qs8-vaddc/gen/minmax-scalar-x1.c",
638 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
639 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700640 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
641 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1f714282021-07-15 15:41:32 -0700642 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
643 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
644 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
645 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
646 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
647 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
648 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
649 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
650 "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
651 "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
652 "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
653 "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700654 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
655 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan927d4742021-07-15 13:42:49 -0700656 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
657 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
658 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
659 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
660 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
661 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
662 "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
663 "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
664 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
665 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
666 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
667 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
668 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
669 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
670 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
671 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan927d4742021-07-15 13:42:49 -0700672 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
673 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
674 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
675 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
676 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
677 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
678 "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
679 "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
680 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
681 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
682 "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
683 "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
684 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
685 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
686 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
687 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700688 "src/qu8-requantization/fp32-scalar-lrintf.c",
689 "src/qu8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700690 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700691 "src/qu8-requantization/rndna-scalar-signed64.c",
692 "src/qu8-requantization/rndna-scalar-unsigned32.c",
693 "src/qu8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -0700694 "src/qu8-vadd/gen/minmax-scalar-x1.c",
695 "src/qu8-vadd/gen/minmax-scalar-x2.c",
696 "src/qu8-vadd/gen/minmax-scalar-x4.c",
697 "src/qu8-vaddc/gen/minmax-scalar-x1.c",
698 "src/qu8-vaddc/gen/minmax-scalar-x2.c",
699 "src/qu8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700700 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700701 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700702 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700703 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700704 "src/x8-lut/scalar.c",
705 "src/x8-zip/x2-scalar.c",
706 "src/x8-zip/x3-scalar.c",
707 "src/x8-zip/x4-scalar.c",
708 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800709 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700710 "src/x32-fill/scalar-float.c",
711 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700712 "src/x32-packx/x2-scalar.c",
713 "src/x32-packx/x3-scalar.c",
714 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700715 "src/x32-pad/scalar-float.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700716 "src/x32-pad/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700717 "src/x32-unpool/scalar.c",
718 "src/x32-zip/x2-scalar.c",
719 "src/x32-zip/x3-scalar.c",
720 "src/x32-zip/x4-scalar.c",
721 "src/x32-zip/xm-scalar.c",
Marat Dukhan048931b2020-11-24 20:53:54 -0800722 "src/xx-copy/memcpy.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700723]
724
Marat Dukhan436ebe62019-12-04 15:10:12 -0800725WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700726 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
727 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700728 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
729 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700730 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
731 "src/f32-dwconv/gen/up1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700732 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
733 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700734 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
735 "src/f32-dwconv/gen/up1x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700736 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
737 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700738 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
739 "src/f32-dwconv/gen/up1x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700740 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
741 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700742 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
743 "src/f32-dwconv/gen/up2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700744 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
745 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700746 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
747 "src/f32-dwconv/gen/up2x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700748 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
749 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700750 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
751 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700752 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
753 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700754 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
755 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
756 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
757 "src/f32-gemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700758 "src/f32-gemm/gen/1x4-relu-wasm.c",
759 "src/f32-gemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700760 "src/f32-gemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700761 "src/f32-gemm/gen/2x4-relu-wasm.c",
762 "src/f32-gemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700763 "src/f32-gemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700764 "src/f32-gemm/gen/4x2-relu-wasm.c",
765 "src/f32-gemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700766 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700767 "src/f32-gemm/gen/4x4-relu-wasm.c",
768 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700769 "src/f32-igemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700770 "src/f32-igemm/gen/1x4-relu-wasm.c",
771 "src/f32-igemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700772 "src/f32-igemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700773 "src/f32-igemm/gen/2x4-relu-wasm.c",
774 "src/f32-igemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700775 "src/f32-igemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700776 "src/f32-igemm/gen/4x2-relu-wasm.c",
777 "src/f32-igemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700778 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700779 "src/f32-igemm/gen/4x4-relu-wasm.c",
780 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700781 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
782 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
783 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700784 "src/f32-prelu/gen/wasm-2x1.c",
785 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700786 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
787 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
788 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700789 "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700790 "src/f32-vbinary/gen/vadd-relu-wasm-x1.c",
791 "src/f32-vbinary/gen/vadd-relu-wasm-x2.c",
792 "src/f32-vbinary/gen/vadd-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700793 "src/f32-vbinary/gen/vadd-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700794 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
795 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
796 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
797 "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700798 "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c",
799 "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c",
800 "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700801 "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700802 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
803 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
804 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
805 "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700806 "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c",
807 "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c",
808 "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700809 "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700810 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
811 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
812 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
813 "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700814 "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c",
815 "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c",
816 "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700817 "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800818 "src/f32-vbinary/gen/vmax-wasm-x1.c",
819 "src/f32-vbinary/gen/vmax-wasm-x2.c",
820 "src/f32-vbinary/gen/vmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700821 "src/f32-vbinary/gen/vmax-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800822 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
823 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
824 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700825 "src/f32-vbinary/gen/vmaxc-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800826 "src/f32-vbinary/gen/vmin-wasm-x1.c",
827 "src/f32-vbinary/gen/vmin-wasm-x2.c",
828 "src/f32-vbinary/gen/vmin-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700829 "src/f32-vbinary/gen/vmin-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800830 "src/f32-vbinary/gen/vminc-wasm-x1.c",
831 "src/f32-vbinary/gen/vminc-wasm-x2.c",
832 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700833 "src/f32-vbinary/gen/vminc-wasm-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700834 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
835 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
836 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700837 "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700838 "src/f32-vbinary/gen/vmul-relu-wasm-x1.c",
839 "src/f32-vbinary/gen/vmul-relu-wasm-x2.c",
840 "src/f32-vbinary/gen/vmul-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700841 "src/f32-vbinary/gen/vmul-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700842 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
843 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
844 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
845 "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700846 "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c",
847 "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c",
848 "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700849 "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700850 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
851 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
852 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
853 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700854 "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c",
855 "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c",
856 "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700857 "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700858 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
859 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
860 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
861 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700862 "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c",
863 "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c",
864 "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700865 "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700866 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
867 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
868 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
869 "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700870 "src/f32-vbinary/gen/vsub-relu-wasm-x1.c",
871 "src/f32-vbinary/gen/vsub-relu-wasm-x2.c",
872 "src/f32-vbinary/gen/vsub-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700873 "src/f32-vbinary/gen/vsub-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700874 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
875 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
876 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
877 "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700878 "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c",
879 "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c",
880 "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700881 "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700882 "src/f32-vclamp/gen/vclamp-wasm-x1.c",
883 "src/f32-vclamp/gen/vclamp-wasm-x2.c",
884 "src/f32-vclamp/gen/vclamp-wasm-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800885 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c",
886 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c",
887 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c",
888 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c",
889 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c",
890 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c",
891 "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c",
892 "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c",
893 "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c",
894 "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c",
895 "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c",
896 "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700897 "src/f32-vhswish/gen/vhswish-wasm-x1.c",
898 "src/f32-vhswish/gen/vhswish-wasm-x2.c",
899 "src/f32-vhswish/gen/vhswish-wasm-x4.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700900 "src/f32-vlrelu/gen/vlrelu-wasm-x1.c",
901 "src/f32-vlrelu/gen/vlrelu-wasm-x2.c",
902 "src/f32-vlrelu/gen/vlrelu-wasm-x4.c",
Frank Barchardd4416d62021-05-17 15:51:37 -0700903 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
904 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
905 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700906 "src/f32-vrelu/gen/vrelu-wasm-x1.c",
907 "src/f32-vrelu/gen/vrelu-wasm-x2.c",
908 "src/f32-vrelu/gen/vrelu-wasm-x4.c",
909 "src/f32-vrelu/gen/vrelu-wasm-x8.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800910]
911
Marat Dukhan290055c2020-06-09 12:24:29 -0700912WASMSIMD_UKERNELS = [
Marat Dukhan40f05522020-07-16 22:33:12 -0700913 "src/f32-argmaxpool/4x-wasmsimd-c4.c",
914 "src/f32-argmaxpool/9p8x-wasmsimd-c4.c",
915 "src/f32-argmaxpool/9x-wasmsimd-c4.c",
Marat Dukhan3b7432d2020-07-16 17:46:32 -0700916 "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c",
917 "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c",
918 "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c",
919 "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard22136062020-11-24 18:44:46 -0800920 "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800921 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700922 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800923 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700924 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700925 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800926 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700927 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800928 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700929 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700930 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800931 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700932 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800933 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700934 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
935 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800936 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700937 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800938 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700939 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700940 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800941 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700942 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800943 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700944 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700945 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800946 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700947 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800948 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700949 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
950 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800951 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
952 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
953 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
954 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
955 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
956 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
957 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
958 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
959 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c",
960 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800961 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
962 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
963 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
964 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c",
965 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
966 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c",
967 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c",
968 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c",
969 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c",
970 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800971 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
972 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
973 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
974 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
975 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
976 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
977 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
978 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
979 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c",
980 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800981 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
982 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
983 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
984 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c",
985 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
986 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c",
987 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c",
988 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c",
989 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c",
990 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c",
Frank Barchardc5704bf2020-12-21 23:09:00 -0800991 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
992 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
993 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
994 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
995 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
996 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
997 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
998 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800999 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1000 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1001 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1002 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c",
1003 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1004 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c",
1005 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c",
1006 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c",
Frank Barchardcadd4222021-01-20 16:27:25 -08001007 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1008 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1009 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1010 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
1011 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1012 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
1013 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
1014 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001015 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1016 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1017 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1018 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c",
1019 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1020 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c",
1021 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c",
1022 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -08001023 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1024 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1025 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1026 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1027 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1028 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1029 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1030 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1031 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1032 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
1033 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c",
1034 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c",
1035 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001036 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1037 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1038 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1039 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1040 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c",
1041 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1042 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1043 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c",
1044 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1045 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c",
1046 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c",
1047 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c",
1048 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -08001049 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1050 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1051 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1052 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1053 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1054 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1055 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1056 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1057 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1058 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
1059 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c",
1060 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c",
1061 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001062 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1063 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1064 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1065 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1066 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c",
1067 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1068 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1069 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c",
1070 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1071 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c",
1072 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c",
1073 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c",
1074 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001075 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1076 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1077 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1078 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1079 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1080 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1081 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1082 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1083 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1084 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001085 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1086 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1087 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1088 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1089 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c",
1090 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1091 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1092 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c",
1093 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1094 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001095 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1096 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1097 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1098 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1099 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1100 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1101 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1102 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1103 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1104 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001105 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1106 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1107 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1108 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1109 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c",
1110 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1111 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1112 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c",
1113 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1114 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001115 "src/f32-gavgpool-cw/wasmsimd-arm-x4.c",
1116 "src/f32-gavgpool-cw/wasmsimd-x86-x4.c",
Marat Dukhanc6016802020-07-16 18:51:28 -07001117 "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c",
1118 "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c",
1119 "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c",
1120 "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001121 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c",
1122 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c",
1123 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c",
1124 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001125 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
1126 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001127 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c",
1128 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c",
1129 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c",
1130 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001131 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
1132 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001133 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c",
1134 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c",
1135 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c",
1136 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001137 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
1138 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001139 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c",
1140 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c",
1141 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c",
1142 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001143 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
1144 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001145 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c",
1146 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c",
1147 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c",
1148 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001149 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
1150 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001151 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1152 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1153 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1154 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001155 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c",
1156 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
1157 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1158 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001159 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1160 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1161 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1162 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001163 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1164 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1165 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1166 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1167 "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c",
1168 "src/f32-gemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001169 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1170 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1171 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1172 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001173 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c",
1174 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
1175 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1176 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001177 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1178 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1179 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1180 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001181 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c",
1182 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
1183 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1184 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001185 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1186 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1187 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1188 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001189 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1190 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
XNNPACK Team965272b2020-10-23 21:10:15 -07001191 "src/f32-ibilinear-chw/gen/wasmsimd-p4.c",
1192 "src/f32-ibilinear-chw/gen/wasmsimd-p8.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001193 "src/f32-ibilinear/gen/wasmsimd-c4.c",
1194 "src/f32-ibilinear/gen/wasmsimd-c8.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001195 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1196 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1197 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1198 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001199 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c",
1200 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
1201 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1202 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001203 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1204 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1205 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1206 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001207 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1208 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1209 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1210 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1211 "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c",
1212 "src/f32-igemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001213 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1214 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1215 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1216 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001217 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c",
1218 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
1219 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1220 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001221 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1222 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1223 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1224 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001225 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c",
1226 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
1227 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1228 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001229 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1230 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1231 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1232 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001233 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1234 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhanf6e24802020-07-08 22:20:40 -07001235 "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c",
1236 "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c",
Marat Dukhan1483c532020-07-16 18:08:19 -07001237 "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c",
1238 "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c",
1239 "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c",
1240 "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001241 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1242 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001243 "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c",
1244 "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c",
1245 "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001246 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
1247 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001248 "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c",
1249 "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c",
1250 "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c",
1251 "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c",
1252 "src/f32-prelu/gen/wasmsimd-minmax-1x4.c",
1253 "src/f32-prelu/gen/wasmsimd-minmax-1x8.c",
1254 "src/f32-prelu/gen/wasmsimd-minmax-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001255 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
1256 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001257 "src/f32-prelu/gen/wasmsimd-minmax-2x16.c",
1258 "src/f32-prelu/gen/wasmsimd-minmax-4x4.c",
1259 "src/f32-prelu/gen/wasmsimd-minmax-4x8.c",
1260 "src/f32-prelu/gen/wasmsimd-minmax-4x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001261 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001262 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001263 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001264 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c",
1265 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001266 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001267 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c",
1268 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001269 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001270 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c",
1271 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001272 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c",
Marat Dukhan8c417962020-07-08 12:27:50 -07001273 "src/f32-rmax/wasmsimd-arm.c",
1274 "src/f32-rmax/wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001275 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c",
1276 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001277 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c",
1278 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001279 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001280 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c",
1281 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001282 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c",
1283 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001284 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001285 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c",
1286 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001287 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c",
1288 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001289 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001290 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c",
1291 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001292 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c",
1293 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001294 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001295 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c",
1296 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001297 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c",
1298 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001299 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001300 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c",
1301 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001302 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c",
1303 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001304 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001305 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c",
1306 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001307 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c",
1308 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001309 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001310 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c",
1311 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001312 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c",
1313 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001314 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001315 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
1316 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001317 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001318 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
1319 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001320 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001321 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c",
1322 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001323 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001324 "src/f32-vbinary/gen/vadd-wasmsimd-x4.c",
1325 "src/f32-vbinary/gen/vadd-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001326 "src/f32-vbinary/gen/vadd-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001327 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
1328 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001329 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001330 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
1331 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001332 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001333 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c",
1334 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001335 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001336 "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c",
1337 "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001338 "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001339 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
1340 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001341 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001342 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
1343 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001344 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001345 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c",
1346 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001347 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001348 "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c",
1349 "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001350 "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001351 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
1352 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001353 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001354 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
1355 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001356 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001357 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c",
1358 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001359 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001360 "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c",
1361 "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001362 "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001363 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
1364 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001365 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001366 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
1367 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001368 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001369 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
1370 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001371 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001372 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
1373 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001374 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001375 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
1376 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001377 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001378 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
1379 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001380 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001381 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
1382 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001383 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001384 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
1385 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001386 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001387 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
1388 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001389 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001390 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
1391 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001392 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001393 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c",
1394 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001395 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001396 "src/f32-vbinary/gen/vmul-wasmsimd-x4.c",
1397 "src/f32-vbinary/gen/vmul-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001398 "src/f32-vbinary/gen/vmul-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001399 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
1400 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001401 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001402 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
1403 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001404 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001405 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c",
1406 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001407 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001408 "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c",
1409 "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001410 "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001411 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
1412 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001413 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001414 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
1415 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001416 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001417 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c",
1418 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001419 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001420 "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c",
1421 "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001422 "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001423 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
1424 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001425 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001426 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
1427 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001428 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001429 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c",
1430 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001431 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001432 "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c",
1433 "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001434 "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001435 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
1436 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001437 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001438 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
1439 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001440 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001441 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
1442 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001443 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001444 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
1445 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001446 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001447 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c",
1448 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001449 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001450 "src/f32-vbinary/gen/vsub-wasmsimd-x4.c",
1451 "src/f32-vbinary/gen/vsub-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001452 "src/f32-vbinary/gen/vsub-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001453 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
1454 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001455 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001456 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
1457 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001458 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001459 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c",
1460 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001461 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001462 "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c",
1463 "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001464 "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001465 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
1466 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c",
1467 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c",
1468 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001469 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
1470 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c",
1471 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c",
1472 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c",
1473 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c",
1474 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001475 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c",
1476 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c",
1477 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c",
1478 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c",
1479 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c",
1480 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08001481 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c",
1482 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c",
1483 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c",
1484 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c",
1485 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c",
1486 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001487 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c",
1488 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c",
1489 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c",
1490 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c",
1491 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c",
1492 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001493 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1494 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1495 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001496 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1497 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1498 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1499 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001500 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001501 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001502 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001503 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001504 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1505 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1506 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001507 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1508 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1509 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1510 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001511 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1512 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
1513 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1514 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1515 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1516 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
1517 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1518 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1519 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1520 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001521 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1522 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1523 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1524 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1525 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1526 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1527 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1528 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1529 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1530 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1531 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1532 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001533 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1534 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001535 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1536 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1537 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1538 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1539 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1540 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001541 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1542 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1543 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1544 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001545 "src/math/roundd-wasmsimd-addsub.c",
1546 "src/math/roundd-wasmsimd-cvt.c",
1547 "src/math/roundne-wasmsimd-addsub.c",
1548 "src/math/roundu-wasmsimd-addsub.c",
1549 "src/math/roundu-wasmsimd-cvt.c",
1550 "src/math/roundz-wasmsimd-addsub.c",
1551 "src/math/roundz-wasmsimd-cvt.c",
1552 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1553 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhan313eef72021-06-30 16:11:31 -07001554 "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001555 "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1556 "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1557 "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1558 "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1559 "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001560 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001561 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001562 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001563 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001564 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001565 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001566 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001567 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001568 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001569 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001570 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001571 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan69aa6232021-06-30 14:17:26 -07001572 "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1573 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001574 "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1575 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c",
1576 "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1577 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
1578 "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1579 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c",
1580 "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1581 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
1582 "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
1583 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07001584 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
1585 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
1586 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001587 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
1588 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
1589 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001590 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001591 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001592 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001593 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001594 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001595 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001596 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001597 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001598 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001599 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001600 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001601 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001602 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001603 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001604 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001605 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001606 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001607 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001608 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001609 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001610 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001611 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001612 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001613 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001614 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001615 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001616 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001617 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001618 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001619 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1620 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
1621 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
1622 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1623 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1624 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1625 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1626 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhanf6011352021-07-15 15:11:14 -07001627 "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1628 "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1629 "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1630 "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1631 "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1632 "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan43bee052021-07-14 20:57:18 -07001633 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
1634 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
1635 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
1636 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
1637 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
1638 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
1639 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
1640 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
1641 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
1642 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
1643 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
1644 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001645 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001646 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07001647 "src/qu8-vadd/gen/minmax-wasmsimd-x8.c",
1648 "src/qu8-vadd/gen/minmax-wasmsimd-x16.c",
1649 "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c",
1650 "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001651 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001652 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001653 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001654 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001655 "src/x32-zip/x2-wasmsimd.c",
1656 "src/x32-zip/x3-wasmsimd.c",
1657 "src/x32-zip/x4-wasmsimd.c",
1658 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001659]
1660
Marat Dukhan08c4a432019-10-03 09:29:21 -07001661# ISA-specific micro-kernels
1662NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001663 "src/f32-argmaxpool/4x-neon-c4.c",
1664 "src/f32-argmaxpool/9p8x-neon-c4.c",
1665 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001666 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1667 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001668 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001669 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001670 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001671 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001672 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001673 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001674 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001675 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001676 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001677 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001679 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001680 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001681 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001682 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1683 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1684 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1685 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1686 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001687 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001688 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001689 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1690 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1691 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001692 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001693 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001694 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1695 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1696 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1697 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1698 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001699 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1700 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1701 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001702 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001703 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001704 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1705 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1706 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001707 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1708 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1709 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1710 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001711 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001712 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1713 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001714 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001715 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001716 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001717 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001718 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1719 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001720 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1721 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1722 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1723 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1724 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1725 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1726 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1727 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001728 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001729 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001730 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001731 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1732 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001733 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001734 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1735 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001736 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001737 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1738 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1739 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1740 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1741 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001742 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1743 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001744 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1745 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001746 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1747 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001748 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1749 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1750 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1751 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1752 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1753 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1754 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1755 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1756 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1757 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1758 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1759 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1760 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1761 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1762 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1763 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001764 "src/f32-ibilinear-chw/gen/neon-p4.c",
1765 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001766 "src/f32-ibilinear/gen/neon-c4.c",
1767 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001768 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001769 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001770 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001771 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1772 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001773 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001774 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1775 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1776 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1777 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001778 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1779 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001780 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1781 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001782 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1783 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001784 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1785 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1786 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001787 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1788 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001789 "src/f32-prelu/gen/neon-1x4.c",
1790 "src/f32-prelu/gen/neon-1x8.c",
1791 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001792 "src/f32-prelu/gen/neon-2x4.c",
1793 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001794 "src/f32-prelu/gen/neon-2x16.c",
1795 "src/f32-prelu/gen/neon-4x4.c",
1796 "src/f32-prelu/gen/neon-4x8.c",
1797 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001798 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001799 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001800 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001801 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1802 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001803 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001804 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1805 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001806 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001807 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1808 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001809 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1810 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1811 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1812 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1813 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1814 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1815 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1816 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1817 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1818 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1819 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1820 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1821 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001822 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001823 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1824 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1825 "src/f32-spmm/gen/4x1-minmax-neon.c",
1826 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1827 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1828 "src/f32-spmm/gen/8x1-minmax-neon.c",
1829 "src/f32-spmm/gen/12x1-minmax-neon.c",
1830 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1831 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1832 "src/f32-spmm/gen/16x1-minmax-neon.c",
1833 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1834 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1835 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001836 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1837 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1838 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1839 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001840 "src/f32-vbinary/gen/vmax-neon-x4.c",
1841 "src/f32-vbinary/gen/vmax-neon-x8.c",
1842 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1843 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1844 "src/f32-vbinary/gen/vmin-neon-x4.c",
1845 "src/f32-vbinary/gen/vmin-neon-x8.c",
1846 "src/f32-vbinary/gen/vminc-neon-x4.c",
1847 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001848 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1849 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1850 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1851 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1852 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1853 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001854 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1855 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1856 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1857 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001858 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1859 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1860 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1861 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001862 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1863 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001864 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1865 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1866 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1867 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1868 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1869 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1870 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1871 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1872 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1873 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1874 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1875 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001876 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1877 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1878 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001879 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1880 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001881 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1882 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001883 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1884 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001885 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1886 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001887 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1888 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1889 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1890 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1891 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1892 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001893 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1894 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1895 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1896 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1897 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1898 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1899 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1900 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1901 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1902 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1903 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1904 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1905 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1906 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1907 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1908 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1909 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1910 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001911 "src/f32-vunary/gen/vabs-neon-x4.c",
1912 "src/f32-vunary/gen/vabs-neon-x8.c",
1913 "src/f32-vunary/gen/vneg-neon-x4.c",
1914 "src/f32-vunary/gen/vneg-neon-x8.c",
1915 "src/f32-vunary/gen/vsqr-neon-x4.c",
1916 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001917 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1918 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001919 "src/math/roundd-neon-addsub.c",
1920 "src/math/roundd-neon-cvt.c",
1921 "src/math/roundne-neon-addsub.c",
1922 "src/math/roundu-neon-addsub.c",
1923 "src/math/roundu-neon-cvt.c",
1924 "src/math/roundz-neon-addsub.c",
1925 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001926 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1927 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1928 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1929 "src/math/sqrt-neon-nr1rsqrts.c",
1930 "src/math/sqrt-neon-nr2rsqrts.c",
1931 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001932 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c",
1933 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001934 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001935 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c",
1936 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001937 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001938 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c",
1939 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c",
1940 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c",
1941 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001942 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001943 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c",
1944 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c",
1945 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c",
1946 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001947 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1948 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1949 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1950 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1951 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001952 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001953 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1954 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001955 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001956 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1957 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001958 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001959 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1960 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001961 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001962 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1963 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001964 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001965 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001966 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c",
1967 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001968 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001969 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001970 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001971 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c",
1972 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001973 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001974 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001975 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001976 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c",
1977 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c",
1978 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c",
1979 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001980 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001981 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001982 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001983 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c",
1984 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c",
1985 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c",
1986 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001987 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001988 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001989 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001990 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001991 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001992 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001993 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001994 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001995 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001996 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1997 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1998 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1999 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002000 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
2001 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
2002 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
2003 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002004 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2005 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2006 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002007 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002008 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2009 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002010 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07002011 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002012 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002013 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002014 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002015 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002016 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002017 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2018 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2019 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002020 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2021 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002022 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2023 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2024 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2025 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2026 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2027 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2028 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2029 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002030 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002031 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2032 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002033 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07002034 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002035 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002036 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002037 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002038 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2039 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2040 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2041 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2042 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2043 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2044 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2045 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2046 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2047 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2048 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2049 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2050 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2051 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2052 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2053 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2054 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2055 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2056 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2057 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2058 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2059 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2060 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2061 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2062 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2063 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2064 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2065 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2066 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2067 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2068 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2069 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2070 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002071 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002072 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2073 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2074 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002075 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2076 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002077 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2078 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2079 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2080 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2081 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2082 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2083 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2084 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2085 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
2086 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2087 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2088 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002089 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002090 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2091 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002092 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002093 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002094 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002095 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002096 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002097 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002098 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002099 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2100 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2101 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002102 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2103 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002104 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2105 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2106 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2107 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2108 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2109 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2110 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2111 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002112 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002113 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2114 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002115 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002116 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002117 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002118 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002119 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002120 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2121 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2122 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2123 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2124 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2125 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2126 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2127 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2128 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2129 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2130 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2131 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2132 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2133 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2134 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2135 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2136 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2137 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2138 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2139 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
2140 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2141 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2142 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2143 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2144 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2145 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2146 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2147 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
2148 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2149 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2150 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2151 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2152 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002153 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002154 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2155 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2156 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002157 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2158 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002159 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2160 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2161 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2162 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2163 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2164 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2165 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2166 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2167 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002168 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002169 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002170 "src/qs8-requantization/rndna-neon.c",
Marat Dukhand3d818c2021-07-16 17:56:54 -07002171 "src/qs8-requantization/rndnu-neon-mull.c",
2172 "src/qs8-requantization/rndnu-neon-qdmulh.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002173 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2174 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2175 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2176 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2177 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2178 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2179 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2180 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002181 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2182 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002183 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
2184 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
2185 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
2186 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
2187 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
2188 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
2189 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
2190 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002191 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2192 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002193 "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2194 "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002195 "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2196 "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002197 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002198 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002199 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07002200 "src/qu8-vadd/gen/minmax-neon-ld64-x8.c",
2201 "src/qu8-vadd/gen/minmax-neon-ld64-x16.c",
2202 "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c",
2203 "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002204 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002205 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002206 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002207 "src/x8-zip/x2-neon.c",
2208 "src/x8-zip/x3-neon.c",
2209 "src/x8-zip/x4-neon.c",
2210 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002211 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002212 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002213 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002214 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002215 "src/x32-zip/x2-neon.c",
2216 "src/x32-zip/x3-neon.c",
2217 "src/x32-zip/x4-neon.c",
2218 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002219]
2220
2221NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002222 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2223 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2224 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2225 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2226 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2227 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2228 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2229 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2230 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2231 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2232 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2233 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2234 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2235 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2236 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2237 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2238 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2239 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2240 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2241 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2242 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2243 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2244 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2245 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2246 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2247 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2248 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2249 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2250 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2251 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002252 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2253 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002254 "src/f32-ibilinear/gen/neonfma-c4.c",
2255 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002256 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002257 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002258 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002259 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2260 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002261 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2262 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002263 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2264 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002265 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2266 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002267 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002268 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002269 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002270 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2271 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002272 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002273 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2274 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002275 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002276 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2277 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002278 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2279 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2280 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2281 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2282 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2283 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2284 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2285 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2286 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2287 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2288 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2289 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2290 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002291 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2292 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2293 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2294 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2295 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2296 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2297 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2298 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2299 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2300 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2301 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2302 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2303 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002304 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2305 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2306 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2307 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2308 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2309 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2310 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2311 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2312 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2313 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2314 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2315 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002316 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2317 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002318 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2319 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2320 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2321 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2322 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2323 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2324 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2325 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2326 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2327 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2328 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2329 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2330 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2331 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2332 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2333 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2334 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2335 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2336 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2337 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2338 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2339 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2340 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2341 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2342 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2343 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2344 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2345 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2346 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2347 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2348 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2349 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2350 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2351 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2352 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2353 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2354 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2355 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2356 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2357 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2358 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2359 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2360 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2361 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2362 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2363 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2364 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2365 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2366 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2367 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2368 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2369 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2370 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2371 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002372 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2373 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2374 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2375 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2376 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2377 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2378 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2379 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2380 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2381 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2382 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2383 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2384 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2385 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2386 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2387 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2388 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2389 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2390 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2391 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002392 "src/math/exp-neonfma-rr2-lut64-p2.c",
2393 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002394 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2395 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002396 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2397 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2398 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002399 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2400 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2401 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002402 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2403 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2404 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002405 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2406 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2407 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002408 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2409 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2410 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002411 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2412 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2413 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002414 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2415 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2416 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002417 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002418 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002419 "src/math/sqrt-neonfma-nr2fma.c",
2420 "src/math/sqrt-neonfma-nr2fma1adj.c",
2421 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002422]
2423
2424AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002425 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002426 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002427 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002428 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002429 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002430 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002431 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002432 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002433 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002434 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2435 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
2436 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002437 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002438 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002439 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
2440 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
2441 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
2442 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2443 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002444 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2445 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2446 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002447 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002448 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002449 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2450 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2451 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002452 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2453 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2454 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2455 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002456 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002457 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2458 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002459 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002460 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002461 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002462 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002463 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2464 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002465 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2466 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2467 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2468 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2469 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2470 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2471 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2472 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002473 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002474 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002475 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2476 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2477 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2478 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2479 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2480 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2481 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2482 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2483 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2484 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2485 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2486 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2487 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2488 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2489 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2490 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2491 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2492 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2493 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2494 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002495 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2496 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002497 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2498 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002499 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2500 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002501 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2502 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002503 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2504 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002505 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2506 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2507 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2508 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2509 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2510 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002511 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2512 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2513 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2514 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2515 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2516 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2517 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2518 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2519 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2520 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2521 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2522 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2523 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2524 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2525 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2526 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2527 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2528 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002529 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2530 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002531 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002532 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002533 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002534 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002535 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002536 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002537]
2538
Marat Dukhan8853b822020-05-07 12:19:01 -07002539NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002540 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2541 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002542 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2543 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2544 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2545 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2546 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2547 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002548 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002549 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002550 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002551 "src/math/roundz-neonv8.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002552 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c",
2553 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002554 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002555 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c",
2556 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002557 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002558 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c",
2559 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c",
2560 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c",
2561 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002562 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002563 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c",
2564 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c",
2565 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c",
2566 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002567 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2568 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2569 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2570 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2571 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002572 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002573 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2574 "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002575 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002576 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2577 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002578 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002579 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2580 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002581 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002582 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2583 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002584 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2585 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2586 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2587 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2588 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2589 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2590 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2591 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002592 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002593 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2594 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002595 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002596 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2597 "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002598 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002599 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2600 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002601 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002602 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2603 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002604 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2605 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2606 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2607 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2608 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2609 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2610 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2611 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002612 "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2613 "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
2614 "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2615 "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002616]
2617
Marat Dukhan08c4a432019-10-03 09:29:21 -07002618AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchard5a599a62020-06-04 20:12:44 -07002619 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
2620 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
2621 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2622 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002623 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2624 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2625 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2626 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2627 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2628 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2629 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2630 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002631 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2632 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002633 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
2634 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
2635 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2636 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2637 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2638 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
2639 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2640 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2641 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2642 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2643 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2644 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2645 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2646 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2647 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2648 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002649 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2650 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2651 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2652 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2653 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2654 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2655 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2656 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002657 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002658 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002659 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002660 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002661 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002662 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002663 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002664 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002665 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002666 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2667 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2668 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2669 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2670 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2671 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2672 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2673 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2674 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2675 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2676 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2677 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2678 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2679 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2680 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2681 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2682 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2683 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2684 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2685 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2686 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2687 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2688 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2689 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2690 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2691 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2692 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2693 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2694 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002695 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2696 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002697 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2698 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002699 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2700 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002701 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2702 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002703]
2704
Benoit Jacoba9644732020-08-13 12:48:55 -07002705NEONDOT_UKERNELS = [
Marat Dukhane76478b2021-06-28 16:35:40 -07002706 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2707 "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2708 "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2709 "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2710 "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2711 "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2712 "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2713 "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2714 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2715 "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2716 "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2717 "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2718 "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2719 "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2720 "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2721 "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002722 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2723 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002724 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002725 "src/qs8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2726 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002727 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002728 "src/qs8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2729 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002730 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002731 "src/qs8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2732 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002733 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002734 "src/qs8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2735 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002736 "src/qs8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2737 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002738 "src/qs8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2739 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002740 "src/qs8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2741 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002742 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2743 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002744 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002745 "src/qs8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2746 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002747 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002748 "src/qs8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2749 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002750 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002751 "src/qs8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2752 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002753 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002754 "src/qs8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2755 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002756 "src/qs8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2757 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002758 "src/qs8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2759 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002760 "src/qs8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
2761 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002762]
2763
Marat Dukhan08c4a432019-10-03 09:29:21 -07002764SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -07002765 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
2766 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07002767 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
2768 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002769 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
2770 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
2771 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
2772 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002773 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2774 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002775 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2776 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2777 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2778 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002779 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2780 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002781 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2782 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2783 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002784 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002785 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002786 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2787 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2788 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2789 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2790 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002791 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2792 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2793 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002794 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002795 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002796 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2797 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2798 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002799 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2800 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2801 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2802 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2803 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2804 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2805 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2806 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2807 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2808 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2809 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2810 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2811 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002812 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2813 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2814 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2815 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2816 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2817 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2818 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2819 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002820 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002821 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002822 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002823 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2824 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002825 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2826 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2827 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002828 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2829 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2830 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002831 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2832 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2833 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002834 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2835 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2836 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002837 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2838 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2839 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002840 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2841 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2842 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002843 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2844 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2845 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2846 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002847 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2848 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2849 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002850 "src/f32-ibilinear-chw/gen/sse-p4.c",
2851 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002852 "src/f32-ibilinear/gen/sse-c4.c",
2853 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002854 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2855 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2856 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002857 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2858 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2859 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002860 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2861 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2862 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2863 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002864 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2865 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2866 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002867 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2868 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2869 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002870 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002871 "src/f32-prelu/gen/sse-2x4.c",
2872 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002873 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002874 "src/f32-spmm/gen/4x1-minmax-sse.c",
2875 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002876 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002877 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002878 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2879 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2880 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2881 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2882 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2883 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2884 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2885 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002886 "src/f32-vbinary/gen/vmax-sse-x4.c",
2887 "src/f32-vbinary/gen/vmax-sse-x8.c",
2888 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2889 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2890 "src/f32-vbinary/gen/vmin-sse-x4.c",
2891 "src/f32-vbinary/gen/vmin-sse-x8.c",
2892 "src/f32-vbinary/gen/vminc-sse-x4.c",
2893 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002894 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2895 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2896 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2897 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2898 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2899 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2900 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2901 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002902 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2903 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2904 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2905 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002906 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2907 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2908 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2909 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002910 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2911 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002912 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2913 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002914 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2915 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002916 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2917 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002918 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2919 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002920 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2921 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002922 "src/f32-vunary/gen/vabs-sse-x4.c",
2923 "src/f32-vunary/gen/vabs-sse-x8.c",
2924 "src/f32-vunary/gen/vneg-sse-x4.c",
2925 "src/f32-vunary/gen/vneg-sse-x8.c",
2926 "src/f32-vunary/gen/vsqr-sse-x4.c",
2927 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002928 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002929 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002930 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002931 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002932 "src/math/sqrt-sse-hh1mac.c",
2933 "src/math/sqrt-sse-nr1mac.c",
2934 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002935 "src/x32-fill/sse.c",
2936 "src/x32-packx/x4-sse.c",
2937 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002938]
2939
2940SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002941 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002942 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002943 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002944 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2945 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2946 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2947 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2948 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2949 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2950 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2951 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2952 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2953 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2954 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2955 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002956 "src/f32-prelu/gen/sse2-2x4.c",
2957 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002958 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002959 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002960 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002961 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2962 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002963 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002964 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2965 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002966 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002967 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2968 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002969 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002970 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2971 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2972 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2973 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2974 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2975 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2976 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2977 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2978 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2979 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2980 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2981 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002982 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2983 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002984 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2985 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002986 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2987 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2988 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2989 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2990 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2991 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002992 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2993 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2994 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2995 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2996 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2997 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2998 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2999 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
3000 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
3001 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
3002 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
3003 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003004 "src/math/exp-sse2-rr2-lut64-p2.c",
3005 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003006 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08003007 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08003008 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003009 "src/math/roundd-sse2-cvt.c",
3010 "src/math/roundne-sse2-cvt.c",
3011 "src/math/roundu-sse2-cvt.c",
3012 "src/math/roundz-sse2-cvt.c",
3013 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
3014 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
3015 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
3016 "src/math/sigmoid-sse2-rr2-p5-div.c",
3017 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
3018 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003019 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003020 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003021 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003022 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003023 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003024 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003025 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003026 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003027 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
3028 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003029 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003030 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003031 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003032 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003033 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003034 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003035 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003036 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003037 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003038 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003039 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003040 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003041 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003042 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003043 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003044 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003045 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003046 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003047 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003048 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003049 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003050 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003051 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003052 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003053 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003054 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003055 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003056 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003057 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003058 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003059 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003060 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003061 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003062 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
3063 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003064 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003065 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
3066 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003067 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003068 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
3069 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
3070 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
3071 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
3072 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003073 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
3074 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
3075 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003076 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
3077 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
3078 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003079 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003080 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003081 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003082 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003083 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003084 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003085 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003086 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003087 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003088 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003089 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003090 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003091 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003092 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003093 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003094 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003095 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003096 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003097 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003098 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003099 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003100 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003101 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003102 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003103 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003104 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003105 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003106 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003107 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003108 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003109 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003110 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003111 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003112 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003113 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003114 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003115 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003116 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003117 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07003118 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003119 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003120 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003121 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
3122 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
3123 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
3124 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003125 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
3126 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
3127 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
3128 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003129 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
3130 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003131 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
3132 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
3133 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
3134 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003135 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
3136 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003137 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
3138 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
3139 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
3140 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
3141 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
3142 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
3143 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
3144 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003145 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003146 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
3147 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
3148 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
3149 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
3150 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
3151 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003152 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003153 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
3154 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
3155 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
3156 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
3157 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
3158 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
3159 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
3160 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003161 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003162 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
3163 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
3164 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
3165 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
3166 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
3167 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003168 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07003169 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003170 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003171 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07003172 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
3173 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
3174 "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
3175 "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07003176 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003177 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003178 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003179 "src/x8-zip/x2-sse2.c",
3180 "src/x8-zip/x3-sse2.c",
3181 "src/x8-zip/x4-sse2.c",
3182 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07003183 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003184 "src/x32-zip/x2-sse2.c",
3185 "src/x32-zip/x3-sse2.c",
3186 "src/x32-zip/x4-sse2.c",
3187 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07003188]
3189
3190SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07003191 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
3192 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c",
3193 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07003194 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003195 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07003196 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
3197 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c",
3198 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c",
3199 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
3200 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003201 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003202 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c",
3203 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
3204 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
3205 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
3206 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003207 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
3208 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
3209 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003210 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
3211 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c",
3212 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003213 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003214 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003215 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003216 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003217 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003218 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003219 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003220 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003221 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003222 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003223 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003224 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003225 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003226 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003227 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003228 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003229 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003230 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003231 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003232 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003233 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003234 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003235 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003236 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003237 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003238 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3239 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
3240 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3241 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003242 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003243 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003244]
3245
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003246SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08003247 "src/f32-prelu/gen/sse41-2x4.c",
3248 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003249 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
3250 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
3251 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
3252 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
3253 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
3254 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
3255 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
3256 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
3257 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
3258 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
3259 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
3260 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003261 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
3262 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003263 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
3264 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003265 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
3266 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
3267 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
3268 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
3269 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
3270 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003271 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
3272 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
3273 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
3274 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
3275 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
3276 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
3277 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
3278 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
3279 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
3280 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
3281 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
3282 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003283 "src/math/roundd-sse41.c",
3284 "src/math/roundne-sse41.c",
3285 "src/math/roundu-sse41.c",
3286 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003287 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003288 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003289 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3290 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003291 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003292 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3293 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003294 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003295 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3296 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003297 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003298 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3299 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3300 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3301 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3302 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003303 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003304 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003305 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003306 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003307 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003308 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003309 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003310 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003311 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003312 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003313 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003314 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003315 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003316 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003317 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003318 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003319 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003320 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003321 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003322 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003323 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003324 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003325 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003326 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003327 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003328 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003329 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003330 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003331 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003332 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003333 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3334 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
3335 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003336 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003337 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003338 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3339 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
3340 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3341 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003342 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003343 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3344 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3345 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3346 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003347 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003348 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3349 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3350 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3351 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3352 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3353 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
3354 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3355 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3356 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3357 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3358 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003359 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3360 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3361 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003362 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
3363 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
3364 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003365 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003366 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003367 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003368 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003369 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003370 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003371 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003372 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003373 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003374 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003375 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003376 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003377 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003378 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003379 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003380 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003381 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003382 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003383 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003384 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003385 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003386 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003387 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003388 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003389 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003390 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003391 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003392 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003393 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003394 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003395 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003396 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003397 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003398 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003399 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003400 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003401 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003402 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003403 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003404 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003405 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003406 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003407 "src/qs8-requantization/rndnu-sse4-sra.c",
3408 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003409 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3410 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3411 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3412 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003413 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3414 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3415 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3416 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003417 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3418 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3419 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3420 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003421 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3422 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3423 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3424 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003425 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003426 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003427 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003428 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003429 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003430 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003431 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003432 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003433 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3434 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3435 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3436 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3437 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3438 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3439 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3440 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003441 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003442 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3443 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3444 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3445 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3446 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3447 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003448 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003449 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3450 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3451 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3452 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3453 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3454 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3455 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3456 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003457 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003458 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3459 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3460 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3461 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3462 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3463 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003464 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003465 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003466 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003467 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3468 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3469 "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3470 "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3471 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3472 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3473 "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3474 "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003475]
3476
Marat Dukhan08c4a432019-10-03 09:29:21 -07003477AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003478 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3479 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003480 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3481 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003482 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3483 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003484 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3485 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3486 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3487 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3488 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3489 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003490 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003491 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3492 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003493 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003494 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003495 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003496 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003497 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3498 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3499 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3500 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3501 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3502 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3503 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3504 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3505 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3506 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3507 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003508 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003509 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3510 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003511 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003512 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003513 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003514 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003515 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3516 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003517 "src/f32-prelu/gen/avx-2x8.c",
3518 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003519 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003520 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3521 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3522 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3523 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3524 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3525 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3526 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3527 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003528 "src/f32-vbinary/gen/vmax-avx-x8.c",
3529 "src/f32-vbinary/gen/vmax-avx-x16.c",
3530 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3531 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3532 "src/f32-vbinary/gen/vmin-avx-x8.c",
3533 "src/f32-vbinary/gen/vmin-avx-x16.c",
3534 "src/f32-vbinary/gen/vminc-avx-x8.c",
3535 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003536 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3537 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3538 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3539 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3540 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3541 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3542 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3543 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003544 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3545 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3546 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3547 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003548 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3549 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3550 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3551 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003552 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3553 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003554 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3555 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3556 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3557 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3558 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3559 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3560 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3561 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3562 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3563 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3564 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3565 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3566 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3567 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3568 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3569 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3570 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3571 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003572 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3573 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003574 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3575 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003576 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3577 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003578 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3579 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003580 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3581 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3582 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3583 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3584 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3585 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003586 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003587 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3588 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3589 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3590 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3591 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3592 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3593 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3594 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3595 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3596 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3597 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3598 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3599 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3600 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3601 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3602 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3603 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3604 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3605 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3606 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003607 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3608 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003609 "src/f32-vunary/gen/vabs-avx-x8.c",
3610 "src/f32-vunary/gen/vabs-avx-x16.c",
3611 "src/f32-vunary/gen/vneg-avx-x8.c",
3612 "src/f32-vunary/gen/vneg-avx-x16.c",
3613 "src/f32-vunary/gen/vsqr-avx-x8.c",
3614 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003615 "src/math/exp-avx-rr2-p5.c",
3616 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3617 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3618 "src/math/expm1minus-avx-rr2-p6.c",
3619 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3620 "src/math/sigmoid-avx-rr2-p5-div.c",
3621 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3622 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003623 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003624 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003625 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3626 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003627 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003628 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3629 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003630 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003631 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3632 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003633 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003634 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3635 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3636 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3637 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3638 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003639 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003640 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003641 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003642 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003643 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003644 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003645 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003646 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003647 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003648 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003649 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003650 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003651 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003652 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003653 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003654 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003655 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003656 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003657 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003658 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003659 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003660 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003661 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003662 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003663 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003664 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003665 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003666 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003667 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003668 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003669 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3670 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3671 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003672 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003673 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003674 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3675 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3676 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3677 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003678 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003679 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3680 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3681 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3682 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003683 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003684 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3685 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3686 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3687 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3688 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3689 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3690 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3691 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3692 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3693 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3694 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003695 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003696 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003697 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003698 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003699 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003700 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003701 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003702 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003703 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003704 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003705 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003706 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003707 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003708 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003709 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003710 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003711 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003712 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003713 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003714 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003715 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003716 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003717 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003718 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003719 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003720 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003721 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003722 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003723 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003724 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003725 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003726 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003727 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003728 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003729 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003730 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3731 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3732 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3733 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3734 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3735 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3736 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3737 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3738 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3739 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3740 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3741 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3742 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3743 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3744 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3745 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003746 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003747 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003748 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003749 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003750 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003751 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003752 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003753 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003754 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3755 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3756 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3757 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3758 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3759 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3760 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3761 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3762 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3763 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3764 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3765 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3766 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3767 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3768 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3769 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3770 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3771 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3772 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3773 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3774 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3775 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3776 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3777 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3778 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3779 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3780 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3781 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003782 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3783 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3784 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3785 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3786 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3787 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3788 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3789 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003790]
3791
Marat Dukhan1566fee2020-08-02 21:55:41 -07003792XOP_UKERNELS = [
Marat Dukhan09668562021-07-26 16:52:20 -07003793 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003794 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003795 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003796 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003797 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003798 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003799 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003800 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3801 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3802 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003803 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003804 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003805 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003806 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003807 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003808 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003809 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003810 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003811 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003812 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003813 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003814 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003815 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003816 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003817 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003818 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003819 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003820 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003821 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003822 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003823 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003824 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003825 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003826 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003827 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003828 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003829 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003830 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003831 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003832 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3833 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003834 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003835 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3836 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003837 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003838 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3839 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003840 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003841 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3842 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3843 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3844 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3845 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3846 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003847 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003848 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003849 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003850 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003851 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003852 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003853 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003854 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003855 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003856 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003857 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003858 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003859 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003860 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003861 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003862 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003863 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003864 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003865 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003866 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003867 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003868 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003869 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003870 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003871 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003872 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003873 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003874 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003875 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003876 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003877 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003878 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003879 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003880 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003881 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003882 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3883 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3884 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3885 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3886 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3887 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3888 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3889 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003890 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3891 "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3892 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3893 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003894 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3895 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3896 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3897 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3898 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3899 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3900 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3901 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3902 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3903 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3904 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3905 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3906 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3907 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3908 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3909 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3910 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3911 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3912 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3913 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3914 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3915 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3916 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3917 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3918 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3919 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3920 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3921 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003922 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3923 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3924 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3925 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003926]
3927
Marat Dukhanfda12b82019-11-21 12:27:59 -08003928FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003929 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
3930 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003931 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3932 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003933 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3934 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003935 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
3936 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
3937 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
3938 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
3939 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3940 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003941 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003942 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3943 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3944 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3945 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003946 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003947 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
3948 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003949 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003950 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
3951 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003952 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3953 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3954 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003955 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3956 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3957 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3958 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3959 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3960 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3961 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3962 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3963 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3964 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3965 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3966 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3967 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3968 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003969 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003970 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3971 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3972 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3973 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003974 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003975 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3976 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003977 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003978 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3979 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003980 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3981 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3982 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003983 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3984 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003985 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3986 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3987 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3988 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3989 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3990 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3991 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3992 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003993 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003994 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003995 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003996]
3997
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003998AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003999 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
4000 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004001 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004002 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004003 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004004 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
4005 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004006 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004007 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
4008 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
4009 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004010 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004011 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
4012 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004013 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004014 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004015 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004016 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
4017 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004018 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004019 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
4020 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
4021 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004022 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004023 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
4024 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004025 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004026 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004027 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004028 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
4029 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004030 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004031 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
4032 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
4033 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004034 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004035 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
4036 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
4037 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
4038 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
4039 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
4040 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
4041 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
4042 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
4043 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
4044 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
4045 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
4046 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
4047 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
4048 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
4049 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
4050 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
4051 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
4052 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
4053 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
4054 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
4055 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
4056 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
4057 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
4058 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
4059 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
4060 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
4061 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
4062 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
4063 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
4064 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
4065 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
4066 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
4067 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
4068 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
4069 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
4070 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
4071 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
4072 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
4073 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
4074 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004075 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
4076 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
4077 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
4078 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
4079 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
4080 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
4081 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
4082 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
4083 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
4084 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
4085 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
4086 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
4087 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
4088 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
4089 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
4090 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
4091 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
4092 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
4093 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
4094 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
4095 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
4096 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
4097 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
4098 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004099 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
4100 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
4101 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
4102 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
4103 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
4104 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
4105 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
4106 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
4107 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
4108 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
4109 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
4110 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
4111 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
4112 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
4113 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
4114 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
4115 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
4116 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
4117 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
4118 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
4119 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
4120 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
4121 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
4122 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
4123 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
4124 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
4125 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
4126 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
4127 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
4128 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004129 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
4130 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
4131 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004132 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
4133 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
4134 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
4135 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08004136 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004137 "src/math/extexp-avx2-p5.c",
4138 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
4139 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
4140 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
4141 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
4142 "src/math/sigmoid-avx2-rr1-p5-div.c",
4143 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
4144 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
4145 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
4146 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
4147 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
4148 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
4149 "src/math/sigmoid-avx2-rr2-p5-div.c",
4150 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
4151 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07004152 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4153 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4154 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
4155 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4156 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
4157 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4158 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
4159 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
4160 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
4161 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4162 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
4163 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004164 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4165 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
4166 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4167 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
4168 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4169 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07004170 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4171 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4172 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004173 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004174 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004175 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004176 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004177 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004178 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004179 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
4180 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004181 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004182 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004183 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
4184 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004185 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004186 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004187 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004188 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004189 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004190 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004191 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
4192 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004193 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004194 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004195 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
4196 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004197 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004198 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004199 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004200 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004201 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004202 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004203 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004204 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004205 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004206 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004207 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004208 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004209 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004210 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004211 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004212 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004213 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004214 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07004215 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4216 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4217 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
4218 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
4219 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4220 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
4221 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
4222 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07004223 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4224 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4225 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4226 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4227 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4228 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004229 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4230 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4231 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4232 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4233 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4234 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07004235 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4236 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4237 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4238 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004239]
4240
Marat Dukhan08c4a432019-10-03 09:29:21 -07004241AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004242 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4243 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004244 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4245 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004246 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4247 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004248 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
4249 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
4250 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4251 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4252 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4253 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004254 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4255 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4256 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4257 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4258 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4259 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004260 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4261 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4262 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4263 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4264 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4265 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004266 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4267 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4268 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4269 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4270 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4271 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004272 "src/f32-prelu/gen/avx512f-2x16.c",
4273 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004274 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4275 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004276 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004277 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004278 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004279 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4280 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004281 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004282 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4283 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4284 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004285 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004286 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4287 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004288 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004289 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004290 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004291 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4292 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004293 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004294 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4295 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4296 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004297 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004298 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4299 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004300 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004301 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004302 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004303 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4304 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004305 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004306 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4307 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4308 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004309 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004310 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004311 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4312 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4313 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4314 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4315 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4316 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4317 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4318 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004319 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4320 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4321 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4322 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4323 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4324 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4325 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4326 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004327 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4328 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4329 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4330 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4331 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4332 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4333 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4334 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004335 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4336 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4337 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4338 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004339 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4340 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4341 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4342 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004343 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4344 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004345 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4346 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4347 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4348 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4349 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4350 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4351 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4352 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4353 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4354 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4355 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4356 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4357 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4358 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4359 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4360 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004361 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4362 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004363 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4364 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004365 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4366 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004367 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4368 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4369 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4370 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4371 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4372 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4373 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4374 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004375 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004376 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4377 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4378 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4379 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4380 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4381 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4382 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4383 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4384 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4385 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4386 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4387 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4388 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4389 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4390 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4391 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4392 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4393 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4394 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4395 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4396 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4397 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4398 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4399 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004400 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4401 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4402 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4403 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4404 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4405 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4406 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4407 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4408 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4409 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4410 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4411 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4412 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4413 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4414 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4415 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4416 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4417 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4418 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4419 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4420 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4421 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4422 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4423 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4424 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4425 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4426 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4427 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4428 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4429 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4430 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4431 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4432 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4433 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4434 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4435 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4436 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4437 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4438 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4439 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4440 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4441 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4442 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4443 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4444 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4445 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4446 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4447 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004448 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4449 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4450 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4451 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4452 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4453 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4454 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4455 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004456 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4457 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4458 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4459 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4460 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4461 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004462 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4463 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4464 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4465 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4466 "src/math/exp-avx512f-rr2-p5-scalef.c",
4467 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004468 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4469 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004470 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004471 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004472 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004473 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004474 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004475 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004476 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004477 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004478 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004479 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4480 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4481 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4482 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4483 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4484 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4485 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4486 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4487 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4488 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004489 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004490 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004491 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4492 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4493 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4494 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004495 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004496 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004497 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004498]
4499
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004500AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004501 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4502 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4503 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4504 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004505 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4506 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4507 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4508 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4509 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4510 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4511 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4512 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004513 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004514 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004515 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004516 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004517 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004518 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004519 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004520 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004521 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004522 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004523 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004524 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004525 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004526 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004527 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004528 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004529 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004530 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004531 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004532 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004533 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004534 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004535 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004536 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhane76049a2021-07-22 14:48:59 -07004537 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
4538 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c",
4539 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
4540 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c",
Marat Dukhancfd606b2021-07-09 01:18:45 -07004541 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4542 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4543 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4544 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004545 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4546 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4547 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4548 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4549 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4550 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4551 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4552 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhane76049a2021-07-22 14:48:59 -07004553 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
4554 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c",
4555 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
4556 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004557]
4558
Frank Barchardbcedc082020-08-17 18:00:51 -07004559WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004560 "src/f32-vrelu/wasm_shr_x1.S",
4561 "src/f32-vrelu/wasm_shr_x2.S",
4562 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004563]
4564
Marat Dukhan08c4a432019-10-03 09:29:21 -07004565AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004566 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004567 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004568 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4569 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004570 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004571 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004572 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004573 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004574 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4575 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004576 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4577 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4578 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4579 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004580]
4581
4582AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004583 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004584 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004585 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004586 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004587 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004588 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004589 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004590 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
4591 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004592 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
4593 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
4594 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
4595 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
4596 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004597 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004598 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004599 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
4600 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004601 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
4602 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004603 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004604 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004605 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004606 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004607 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004608 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4609 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004610 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004611 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004612 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004613 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004614 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004615 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004616 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004617 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4618 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004619 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004620 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004621 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004622 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004623 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004624 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004625 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
4626 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004627 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004628 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
4629 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4630 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004631 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4632 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
4633 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004634 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004635 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004636 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004637 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004638 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4639 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004640 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4641 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
4642 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
4643 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004644 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004645 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004646 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004647 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4648 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004649 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4650 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4651 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4652 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004653 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004654 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004655 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004656 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004657 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004658 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4659 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4660 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4661 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004662 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004663 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004664 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004665 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4666 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4667 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4668 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004669 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4670 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004671 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4672 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4673 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4674 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4675 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004676 "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004677 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4678 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4679 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4680 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4681 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4682 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004683 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4684 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4685 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4686 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4687 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4688 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4689 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4690 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004691 "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004692 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4693 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4694 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4695 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4696 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004697 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4698 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4699 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4700 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004701 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4702 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4703 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4704 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004705 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4706 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4707 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4708 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004709 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4710 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004711 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4712 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004713 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S",
4714 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004715 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4716 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4717 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4718 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4719 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004720 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4721 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4722 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4723 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004724 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004725 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4726 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4727 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4728 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
4729 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004730 "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004731 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004732 "src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004733 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4734 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004735 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4736 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004737 "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
4738 "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004739 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4740 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4741 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4742 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004743 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4744 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4745 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004746 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004747 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4748 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S",
4749 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004750 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004751 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4752 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4753 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4754 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004755 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4756 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4757 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4758 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004759 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4760 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4761 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4762 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004763 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4764 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4765 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4766 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004767 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4768 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4769 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4770 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004771 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4772 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4773 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4774 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004775 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004776 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004777 "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004778 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4779 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004780 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4781 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004782 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
4783 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004784 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4785 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4786 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004787 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4788 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004789 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004790 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4791 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004792 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004793]
4794
Marat Dukhan1b354632020-03-23 12:50:22 -07004795INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004796 "src/xnnpack/argmaxpool.h",
4797 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004798 "src/xnnpack/common.h",
4799 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004800 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004801 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004802 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004803 "src/xnnpack/gavgpool.h",
4804 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004805 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004806 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004807 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004808 "src/xnnpack/lut.h",
4809 "src/xnnpack/math.h",
4810 "src/xnnpack/maxpool.h",
4811 "src/xnnpack/packx.h",
4812 "src/xnnpack/pad.h",
4813 "src/xnnpack/params.h",
4814 "src/xnnpack/pavgpool.h",
4815 "src/xnnpack/ppmm.h",
4816 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004817 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004818 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004819 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004820 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004821 "src/xnnpack/spmm.h",
4822 "src/xnnpack/unpool.h",
4823 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004824 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004825 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004826 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004827 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004828 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004829 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004830 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004831]
4832
4833INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004834 "include/xnnpack.h",
4835 "src/xnnpack/allocator.h",
4836 "src/xnnpack/compute.h",
4837 "src/xnnpack/im2col.h",
4838 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004839 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004840 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004841 "src/xnnpack/operator.h",
4842 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004843 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004844 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004845 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004846 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004847]
4848
Marat Dukhan1b354632020-03-23 12:50:22 -07004849ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004850 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004851]
4852
Marat Dukhan1b354632020-03-23 12:50:22 -07004853MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004854 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004855 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004856]
4857
Marat Dukhan1b354632020-03-23 12:50:22 -07004858MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004859 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004860 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004861 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004862 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004863]
4864
4865OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004866 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004867 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004868]
4869
4870WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004871 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004872 "src/xnnpack/operator.h",
4873 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004874]
4875
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004876LOGGING_COPTS = select({
4877 # No logging in optimized mode
4878 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4879 # Full logging in debug mode
4880 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4881 # Error-only logging in default (fastbuild) mode
4882 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4883})
4884
Marat Dukhan3b59de22020-06-03 20:15:19 -07004885LOGGING_SRCS = select({
4886 # No logging in optimized mode
4887 ":optimized_build": [],
4888 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004889 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004890 "src/operator-strings.c",
4891 "src/subgraph-strings.c",
4892 ],
4893})
4894
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004895LOGGING_HDRS = [
4896 "src/xnnpack/log.h",
4897]
4898
Marat Dukhan08c4a432019-10-03 09:29:21 -07004899xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004900 name = "tables",
4901 srcs = TABLE_SRCS,
4902 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004903 gcc_copts = xnnpack_gcc_std_copts(),
4904 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004905)
4906
4907xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004908 name = "scalar_ukernels",
4909 srcs = SCALAR_UKERNELS,
4910 hdrs = INTERNAL_HDRS,
4911 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004912 gcc_copts = xnnpack_gcc_std_copts(),
4913 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004914 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004915 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004916 "@FP16",
4917 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004918 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004919 ],
4920)
4921
4922xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004923 name = "scalar_ukernels_test_mode",
4924 srcs = SCALAR_UKERNELS,
4925 hdrs = INTERNAL_HDRS,
4926 aarch32_copts = ["-marm"],
4927 copts = [
4928 "-UNDEBUG",
4929 "-DXNN_TEST_MODE=1",
4930 ],
4931 gcc_copts = xnnpack_gcc_std_copts(),
4932 msvc_copts = xnnpack_msvc_std_copts(),
4933 deps = [
4934 ":tables",
4935 "@FP16",
4936 "@FXdiv",
4937 "@pthreadpool",
4938 ],
4939)
4940
4941xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004942 name = "wasm_ukernels",
4943 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004944 gcc_copts = xnnpack_gcc_std_copts(),
4945 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004946 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004947 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004948 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004949 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004950 "@FP16",
4951 "@FXdiv",
4952 "@pthreadpool",
4953 ],
4954)
4955
4956xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004957 name = "wasm_ukernels_test_mode",
4958 hdrs = INTERNAL_HDRS,
4959 copts = [
4960 "-UNDEBUG",
4961 "-DXNN_TEST_MODE=1",
4962 ],
4963 gcc_copts = xnnpack_gcc_std_copts(),
4964 msvc_copts = xnnpack_msvc_std_copts(),
4965 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004966 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004967 deps = [
4968 ":tables",
4969 "@FP16",
4970 "@FXdiv",
4971 "@pthreadpool",
4972 ],
4973)
4974
4975xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004976 name = "neon_ukernels",
4977 hdrs = INTERNAL_HDRS,
4978 aarch32_copts = [
4979 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004980 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004981 "-mfpu=neon",
4982 ],
4983 aarch32_srcs = NEON_UKERNELS,
4984 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004985 gcc_copts = xnnpack_gcc_std_copts(),
4986 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004987 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004988 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004989 "@FP16",
4990 "@pthreadpool",
4991 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004992)
4993
4994xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004995 name = "neon_ukernels_test_mode",
4996 hdrs = INTERNAL_HDRS,
4997 aarch32_copts = [
4998 "-marm",
4999 "-march=armv7-a",
5000 "-mfpu=neon",
5001 ],
5002 aarch32_srcs = NEON_UKERNELS,
5003 aarch64_srcs = NEON_UKERNELS,
5004 copts = [
5005 "-UNDEBUG",
5006 "-DXNN_TEST_MODE=1",
5007 ],
5008 gcc_copts = xnnpack_gcc_std_copts(),
5009 msvc_copts = xnnpack_msvc_std_copts(),
5010 deps = [
5011 ":tables",
5012 "@FP16",
5013 "@pthreadpool",
5014 ],
5015)
5016
5017xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005018 name = "neonfma_ukernels",
5019 hdrs = INTERNAL_HDRS,
5020 aarch32_copts = [
5021 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07005022 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005023 "-mfpu=neon-vfpv4",
5024 ],
5025 aarch32_srcs = NEONFMA_UKERNELS,
5026 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005027 apple_aarch32_copts = [
5028 "-mcpu=swift",
5029 "-mtune=generic",
5030 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005031 gcc_copts = xnnpack_gcc_std_copts(),
5032 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005033 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005034 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005035 "@FP16",
5036 "@pthreadpool",
5037 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005038)
5039
5040xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005041 name = "neonfma_ukernels_test_mode",
5042 hdrs = INTERNAL_HDRS,
5043 aarch32_copts = [
5044 "-marm",
5045 "-march=armv7-a",
5046 "-mfpu=neon-vfpv4",
5047 ],
5048 aarch32_srcs = NEONFMA_UKERNELS,
5049 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005050 apple_aarch32_copts = [
5051 "-mcpu=swift",
5052 "-mtune=generic",
5053 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005054 copts = [
5055 "-UNDEBUG",
5056 "-DXNN_TEST_MODE=1",
5057 ],
5058 gcc_copts = xnnpack_gcc_std_copts(),
5059 msvc_copts = xnnpack_msvc_std_copts(),
5060 deps = [
5061 ":tables",
5062 "@FP16",
5063 "@pthreadpool",
5064 ],
5065)
5066
5067xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07005068 name = "neonv8_ukernels",
5069 hdrs = INTERNAL_HDRS,
5070 aarch32_copts = [
5071 "-marm",
5072 "-march=armv8-a",
5073 "-mfpu=neon-fp-armv8",
5074 ],
5075 aarch32_srcs = NEONV8_UKERNELS,
5076 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005077 apple_aarch32_copts = [
5078 "-mcpu=cyclone",
5079 "-mtune=generic",
5080 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07005081 gcc_copts = xnnpack_gcc_std_copts(),
5082 msvc_copts = xnnpack_msvc_std_copts(),
5083 deps = [
5084 ":tables",
5085 "@FP16",
5086 "@pthreadpool",
5087 ],
5088)
5089
5090xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005091 name = "neonv8_ukernels_test_mode",
5092 hdrs = INTERNAL_HDRS,
5093 aarch32_copts = [
5094 "-marm",
5095 "-march=armv8-a",
5096 "-mfpu=neon-fp-armv8",
5097 ],
5098 aarch32_srcs = NEONV8_UKERNELS,
5099 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005100 apple_aarch32_copts = [
5101 "-mcpu=cyclone",
5102 "-mtune=generic",
5103 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005104 copts = [
5105 "-UNDEBUG",
5106 "-DXNN_TEST_MODE=1",
5107 ],
5108 gcc_copts = xnnpack_gcc_std_copts(),
5109 msvc_copts = xnnpack_msvc_std_copts(),
5110 deps = [
5111 ":tables",
5112 "@FP16",
5113 "@pthreadpool",
5114 ],
5115)
5116
5117xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005118 name = "neonfp16arith_ukernels",
5119 hdrs = INTERNAL_HDRS,
5120 aarch64_copts = ["-march=armv8.2-a+fp16"],
5121 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005122 gcc_copts = xnnpack_gcc_std_copts(),
5123 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005124 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005125 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005126 "@FP16",
5127 "@pthreadpool",
5128 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005129)
5130
5131xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005132 name = "neonfp16arith_ukernels_test_mode",
5133 hdrs = INTERNAL_HDRS,
5134 aarch64_copts = ["-march=armv8.2-a+fp16"],
5135 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
5136 copts = [
5137 "-UNDEBUG",
5138 "-DXNN_TEST_MODE=1",
5139 ],
5140 gcc_copts = xnnpack_gcc_std_copts(),
5141 msvc_copts = xnnpack_msvc_std_copts(),
5142 deps = [
5143 ":tables",
5144 "@FP16",
5145 "@pthreadpool",
5146 ],
5147)
5148
5149xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07005150 name = "neondot_ukernels",
5151 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005152 aarch32_copts = [
5153 "-marm",
5154 "-march=armv8.2-a+dotprod",
5155 "-mfpu=neon-fp-armv8",
5156 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005157 aarch32_srcs = NEONDOT_UKERNELS,
5158 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5159 aarch64_srcs = NEONDOT_UKERNELS,
5160 gcc_copts = xnnpack_gcc_std_copts(),
5161 msvc_copts = xnnpack_msvc_std_copts(),
5162 deps = [
5163 ":tables",
5164 "@FP16",
5165 "@pthreadpool",
5166 ],
5167)
5168
5169xnnpack_cc_library(
5170 name = "neondot_ukernels_test_mode",
5171 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005172 aarch32_copts = [
5173 "-marm",
5174 "-march=armv8.2-a+dotprod",
5175 "-mfpu=neon-fp-armv8",
5176 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005177 aarch32_srcs = NEONDOT_UKERNELS,
5178 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5179 aarch64_srcs = NEONDOT_UKERNELS,
5180 copts = [
5181 "-UNDEBUG",
5182 "-DXNN_TEST_MODE=1",
5183 ],
5184 gcc_copts = xnnpack_gcc_std_copts(),
5185 msvc_copts = xnnpack_msvc_std_copts(),
5186 deps = [
5187 ":tables",
5188 "@FP16",
5189 "@pthreadpool",
5190 ],
5191)
5192
5193xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005194 name = "sse2_ukernels",
5195 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005196 gcc_copts = xnnpack_gcc_std_copts(),
5197 gcc_x86_copts = ["-msse2"],
5198 msvc_copts = xnnpack_msvc_std_copts(),
5199 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005200 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005201 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005202 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005203 "@FP16",
5204 "@pthreadpool",
5205 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005206)
5207
5208xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005209 name = "sse2_ukernels_test_mode",
5210 hdrs = INTERNAL_HDRS,
5211 copts = [
5212 "-UNDEBUG",
5213 "-DXNN_TEST_MODE=1",
5214 ],
5215 gcc_copts = xnnpack_gcc_std_copts(),
5216 gcc_x86_copts = ["-msse2"],
5217 msvc_copts = xnnpack_msvc_std_copts(),
5218 msvc_x86_32_copts = ["/arch:SSE2"],
5219 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
5220 deps = [
5221 ":tables",
5222 "@FP16",
5223 "@pthreadpool",
5224 ],
5225)
5226
5227xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005228 name = "ssse3_ukernels",
5229 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005230 gcc_copts = xnnpack_gcc_std_copts(),
5231 gcc_x86_copts = ["-mssse3"],
5232 msvc_copts = xnnpack_msvc_std_copts(),
5233 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005234 x86_srcs = SSSE3_UKERNELS,
5235 deps = [
5236 ":tables",
5237 "@FP16",
5238 "@pthreadpool",
5239 ],
5240)
5241
5242xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005243 name = "ssse3_ukernels_test_mode",
5244 hdrs = INTERNAL_HDRS,
5245 copts = [
5246 "-UNDEBUG",
5247 "-DXNN_TEST_MODE=1",
5248 ],
5249 gcc_copts = xnnpack_gcc_std_copts(),
5250 gcc_x86_copts = ["-mssse3"],
5251 msvc_copts = xnnpack_msvc_std_copts(),
5252 msvc_x86_32_copts = ["/arch:SSE2"],
5253 x86_srcs = SSSE3_UKERNELS,
5254 deps = [
5255 ":tables",
5256 "@FP16",
5257 "@pthreadpool",
5258 ],
5259)
5260
5261xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005262 name = "sse41_ukernels",
5263 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005264 gcc_copts = xnnpack_gcc_std_copts(),
5265 gcc_x86_copts = ["-msse4.1"],
5266 msvc_copts = xnnpack_msvc_std_copts(),
5267 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005268 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005269 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005270 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005271 "@FP16",
5272 "@pthreadpool",
5273 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005274)
5275
5276xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005277 name = "sse41_ukernels_test_mode",
5278 hdrs = INTERNAL_HDRS,
5279 copts = [
5280 "-UNDEBUG",
5281 "-DXNN_TEST_MODE=1",
5282 ],
5283 gcc_copts = xnnpack_gcc_std_copts(),
5284 gcc_x86_copts = ["-msse4.1"],
5285 msvc_copts = xnnpack_msvc_std_copts(),
5286 msvc_x86_32_copts = ["/arch:SSE2"],
5287 x86_srcs = SSE41_UKERNELS,
5288 deps = [
5289 ":tables",
5290 "@FP16",
5291 "@pthreadpool",
5292 ],
5293)
5294
5295xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005296 name = "avx_ukernels",
5297 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005298 gcc_copts = xnnpack_gcc_std_copts(),
5299 gcc_x86_copts = ["-mavx"],
5300 msvc_copts = xnnpack_msvc_std_copts(),
5301 msvc_x86_32_copts = ["/arch:AVX"],
5302 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005303 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005304 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005305 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005306 "@FP16",
5307 "@pthreadpool",
5308 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005309)
5310
5311xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005312 name = "avx_ukernels_test_mode",
5313 hdrs = INTERNAL_HDRS,
5314 copts = [
5315 "-UNDEBUG",
5316 "-DXNN_TEST_MODE=1",
5317 ],
5318 gcc_copts = xnnpack_gcc_std_copts(),
5319 gcc_x86_copts = ["-mavx"],
5320 msvc_copts = xnnpack_msvc_std_copts(),
5321 msvc_x86_32_copts = ["/arch:AVX"],
5322 msvc_x86_64_copts = ["/arch:AVX"],
5323 x86_srcs = AVX_UKERNELS,
5324 deps = [
5325 ":tables",
5326 "@FP16",
5327 "@pthreadpool",
5328 ],
5329)
5330
5331xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005332 name = "xop_ukernels",
5333 hdrs = INTERNAL_HDRS,
5334 gcc_copts = xnnpack_gcc_std_copts(),
5335 gcc_x86_copts = ["-mxop"],
5336 msvc_copts = xnnpack_msvc_std_copts(),
5337 msvc_x86_32_copts = ["/arch:AVX"],
5338 msvc_x86_64_copts = ["/arch:AVX"],
5339 x86_srcs = XOP_UKERNELS,
5340 deps = [
5341 ":tables",
5342 "@FP16",
5343 "@pthreadpool",
5344 ],
5345)
5346
5347xnnpack_cc_library(
5348 name = "xop_ukernels_test_mode",
5349 hdrs = INTERNAL_HDRS,
5350 copts = [
5351 "-UNDEBUG",
5352 "-DXNN_TEST_MODE=1",
5353 ],
5354 gcc_copts = xnnpack_gcc_std_copts(),
5355 gcc_x86_copts = ["-mxop"],
5356 msvc_copts = xnnpack_msvc_std_copts(),
5357 msvc_x86_32_copts = ["/arch:AVX"],
5358 msvc_x86_64_copts = ["/arch:AVX"],
5359 x86_srcs = XOP_UKERNELS,
5360 deps = [
5361 ":tables",
5362 "@FP16",
5363 "@pthreadpool",
5364 ],
5365)
5366
5367xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005368 name = "fma3_ukernels",
5369 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005370 gcc_copts = xnnpack_gcc_std_copts(),
5371 gcc_x86_copts = ["-mfma"],
5372 msvc_copts = xnnpack_msvc_std_copts(),
5373 msvc_x86_32_copts = ["/arch:AVX"],
5374 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005375 x86_srcs = FMA3_UKERNELS,
5376 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005377 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005378 "@FP16",
5379 "@pthreadpool",
5380 ],
5381)
5382
5383xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005384 name = "fma3_ukernels_test_mode",
5385 hdrs = INTERNAL_HDRS,
5386 copts = [
5387 "-UNDEBUG",
5388 "-DXNN_TEST_MODE=1",
5389 ],
5390 gcc_copts = xnnpack_gcc_std_copts(),
5391 gcc_x86_copts = ["-mfma"],
5392 msvc_copts = xnnpack_msvc_std_copts(),
5393 msvc_x86_32_copts = ["/arch:AVX"],
5394 msvc_x86_64_copts = ["/arch:AVX"],
5395 x86_srcs = FMA3_UKERNELS,
5396 deps = [
5397 ":tables",
5398 "@FP16",
5399 "@pthreadpool",
5400 ],
5401)
5402
5403xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005404 name = "avx2_ukernels",
5405 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005406 gcc_copts = xnnpack_gcc_std_copts(),
5407 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005408 "-mfma",
5409 "-mavx2",
5410 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005411 msvc_copts = xnnpack_msvc_std_copts(),
5412 msvc_x86_32_copts = ["/arch:AVX2"],
5413 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005414 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005415 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005416 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005417 "@FP16",
5418 "@pthreadpool",
5419 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005420)
5421
5422xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005423 name = "avx2_ukernels_test_mode",
5424 hdrs = INTERNAL_HDRS,
5425 copts = [
5426 "-UNDEBUG",
5427 "-DXNN_TEST_MODE=1",
5428 ],
5429 gcc_copts = xnnpack_gcc_std_copts(),
5430 gcc_x86_copts = [
5431 "-mfma",
5432 "-mavx2",
5433 ],
5434 msvc_copts = xnnpack_msvc_std_copts(),
5435 msvc_x86_32_copts = ["/arch:AVX2"],
5436 msvc_x86_64_copts = ["/arch:AVX2"],
5437 x86_srcs = AVX2_UKERNELS,
5438 deps = [
5439 ":tables",
5440 "@FP16",
5441 "@pthreadpool",
5442 ],
5443)
5444
5445xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005446 name = "avx512f_ukernels",
5447 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005448 gcc_copts = xnnpack_gcc_std_copts(),
5449 gcc_x86_copts = ["-mavx512f"],
5450 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5451 msvc_copts = xnnpack_msvc_std_copts(),
5452 msvc_x86_32_copts = ["/arch:AVX512"],
5453 msvc_x86_64_copts = ["/arch:AVX512"],
5454 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005455 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005456 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005457 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005458 "@FP16",
5459 "@pthreadpool",
5460 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005461)
5462
5463xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005464 name = "avx512f_ukernels_test_mode",
5465 hdrs = INTERNAL_HDRS,
5466 copts = [
5467 "-UNDEBUG",
5468 "-DXNN_TEST_MODE=1",
5469 ],
5470 gcc_copts = xnnpack_gcc_std_copts(),
5471 gcc_x86_copts = ["-mavx512f"],
5472 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5473 msvc_copts = xnnpack_msvc_std_copts(),
5474 msvc_x86_32_copts = ["/arch:AVX512"],
5475 msvc_x86_64_copts = ["/arch:AVX512"],
5476 msys_copts = ["-fno-asynchronous-unwind-tables"],
5477 x86_srcs = AVX512F_UKERNELS,
5478 deps = [
5479 ":tables",
5480 "@FP16",
5481 "@pthreadpool",
5482 ],
5483)
5484
5485xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005486 name = "avx512skx_ukernels",
5487 hdrs = INTERNAL_HDRS,
5488 gcc_copts = xnnpack_gcc_std_copts(),
5489 gcc_x86_copts = [
5490 "-mavx512f",
5491 "-mavx512cd",
5492 "-mavx512bw",
5493 "-mavx512dq",
5494 "-mavx512vl",
5495 ],
5496 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5497 msvc_copts = xnnpack_msvc_std_copts(),
5498 msvc_x86_32_copts = ["/arch:AVX512"],
5499 msvc_x86_64_copts = ["/arch:AVX512"],
5500 msys_copts = ["-fno-asynchronous-unwind-tables"],
5501 x86_srcs = AVX512SKX_UKERNELS,
5502 deps = [
5503 ":tables",
5504 "@FP16",
5505 "@pthreadpool",
5506 ],
5507)
5508
5509xnnpack_cc_library(
5510 name = "avx512skx_ukernels_test_mode",
5511 hdrs = INTERNAL_HDRS,
5512 copts = [
5513 "-UNDEBUG",
5514 "-DXNN_TEST_MODE=1",
5515 ],
5516 gcc_copts = xnnpack_gcc_std_copts(),
5517 gcc_x86_copts = [
5518 "-mavx512f",
5519 "-mavx512cd",
5520 "-mavx512bw",
5521 "-mavx512dq",
5522 "-mavx512vl",
5523 ],
5524 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5525 msvc_copts = xnnpack_msvc_std_copts(),
5526 msvc_x86_32_copts = ["/arch:AVX512"],
5527 msvc_x86_64_copts = ["/arch:AVX512"],
5528 msys_copts = ["-fno-asynchronous-unwind-tables"],
5529 x86_srcs = AVX512SKX_UKERNELS,
5530 deps = [
5531 ":tables",
5532 "@FP16",
5533 "@pthreadpool",
5534 ],
5535)
5536
5537xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005538 name = "asm_ukernels",
5539 hdrs = ["src/xnnpack/assembly.h"],
5540 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005541 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005542 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005543 wasm_srcs = WASM32_ASM_UKERNELS,
5544 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005545)
5546
Marat Dukhan3b59de22020-06-03 20:15:19 -07005547xnnpack_cc_library(
5548 name = "logging_utils",
5549 srcs = LOGGING_SRCS,
5550 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5551 copts = LOGGING_COPTS + [
5552 "-Isrc",
5553 "-Iinclude",
5554 ] + select({
5555 ":debug_build": [],
5556 "//conditions:default": xnnpack_min_size_copts(),
5557 }),
5558 gcc_copts = xnnpack_gcc_std_copts(),
5559 msvc_copts = xnnpack_msvc_std_copts(),
5560 visibility = xnnpack_visibility(),
5561 deps = [
5562 "@FP16",
5563 "@clog",
5564 "@pthreadpool",
5565 ],
5566)
5567
Marat Dukhan08c4a432019-10-03 09:29:21 -07005568xnnpack_aggregate_library(
5569 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005570 aarch32_ios_deps = [
5571 ":neon_ukernels",
5572 ":neonfma_ukernels",
5573 ":neonv8_ukernels",
5574 ":asm_ukernels",
5575 ],
5576 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005577 ":neon_ukernels",
5578 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005579 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005580 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005581 ":asm_ukernels",
5582 ],
5583 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005584 ":neon_ukernels",
5585 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005586 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005587 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005588 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005589 ":asm_ukernels",
5590 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005591 generic_deps = [
5592 ":scalar_ukernels",
5593 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005594 wasm_deps = [
5595 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005596 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005597 ],
5598 wasmsimd_deps = [
5599 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005600 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005601 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005602 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005603 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005604 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005605 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005606 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005607 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005608 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005609 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005610 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005611 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005612 ],
5613)
5614
Marat Dukhan33fcf782020-05-24 14:27:15 -07005615xnnpack_aggregate_library(
5616 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005617 aarch32_ios_deps = [
5618 ":neon_ukernels_test_mode",
5619 ":neonfma_ukernels_test_mode",
5620 ":neonv8_ukernels_test_mode",
5621 ":asm_ukernels",
5622 ],
5623 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005624 ":neon_ukernels_test_mode",
5625 ":neonfma_ukernels_test_mode",
5626 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005627 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005628 ":asm_ukernels",
5629 ],
5630 aarch64_deps = [
5631 ":neon_ukernels_test_mode",
5632 ":neonfma_ukernels_test_mode",
5633 ":neonv8_ukernels_test_mode",
5634 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005635 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005636 ":asm_ukernels",
5637 ],
5638 generic_deps = [
5639 ":scalar_ukernels_test_mode",
5640 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005641 wasm_deps = [
5642 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005643 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005644 ],
5645 wasmsimd_deps = [
5646 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005647 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005648 ],
5649 x86_deps = [
5650 ":sse2_ukernels_test_mode",
5651 ":ssse3_ukernels_test_mode",
5652 ":sse41_ukernels_test_mode",
5653 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005654 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005655 ":fma3_ukernels_test_mode",
5656 ":avx2_ukernels_test_mode",
5657 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005658 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005659 ],
5660)
5661
Marat Dukhan08c4a432019-10-03 09:29:21 -07005662xnnpack_cc_library(
5663 name = "im2col",
5664 srcs = ["src/im2col.c"],
5665 hdrs = [
5666 "src/xnnpack/common.h",
5667 "src/xnnpack/im2col.h",
5668 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005669 gcc_copts = xnnpack_gcc_std_copts(),
5670 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005671)
5672
5673xnnpack_cc_library(
5674 name = "indirection",
5675 srcs = ["src/indirection.c"],
5676 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005677 gcc_copts = xnnpack_gcc_std_copts(),
5678 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005679 deps = [
5680 "@FP16",
5681 "@FXdiv",
5682 "@pthreadpool",
5683 ],
5684)
5685
5686xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005687 name = "indirection_test_mode",
5688 srcs = ["src/indirection.c"],
5689 hdrs = INTERNAL_HDRS,
5690 copts = [
5691 "-UNDEBUG",
5692 "-DXNN_TEST_MODE=1",
5693 ],
5694 gcc_copts = xnnpack_gcc_std_copts(),
5695 msvc_copts = xnnpack_msvc_std_copts(),
5696 deps = [
5697 "@FP16",
5698 "@FXdiv",
5699 "@pthreadpool",
5700 ],
5701)
5702
5703xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005704 name = "packing",
5705 srcs = ["src/packing.c"],
5706 hdrs = INTERNAL_HDRS,
5707 gcc_copts = xnnpack_gcc_std_copts(),
5708 msvc_copts = xnnpack_msvc_std_copts(),
5709 deps = [
5710 "@FP16",
5711 "@FXdiv",
5712 "@pthreadpool",
5713 ],
5714)
5715
5716xnnpack_cc_library(
5717 name = "packing_test_mode",
5718 srcs = ["src/packing.c"],
5719 hdrs = INTERNAL_HDRS,
5720 copts = [
5721 "-UNDEBUG",
5722 "-DXNN_TEST_MODE=1",
5723 ],
5724 gcc_copts = xnnpack_gcc_std_copts(),
5725 msvc_copts = xnnpack_msvc_std_copts(),
5726 deps = [
5727 "@FP16",
5728 "@FXdiv",
5729 "@pthreadpool",
5730 ],
5731)
5732
5733xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005734 name = "operator_run",
5735 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005736 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005737 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005738 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5739 "//conditions:default": [],
5740 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005741 gcc_copts = xnnpack_gcc_std_copts(),
5742 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005743 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005744 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005745 "@FP16",
5746 "@FXdiv",
5747 "@clog",
5748 "@pthreadpool",
5749 ],
5750)
5751
Chao Mei6ddfc602020-05-13 22:29:36 -07005752xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005753 name = "operator_run_test_mode",
5754 srcs = ["src/operator-run.c"],
5755 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5756 copts = LOGGING_COPTS + [
5757 "-UNDEBUG",
5758 "-DXNN_TEST_MODE=1",
5759 ] + select({
5760 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5761 "//conditions:default": [],
5762 }),
5763 gcc_copts = xnnpack_gcc_std_copts(),
5764 msvc_copts = xnnpack_msvc_std_copts(),
5765 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005766 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005767 "@FP16",
5768 "@FXdiv",
5769 "@clog",
5770 "@pthreadpool",
5771 ],
5772)
5773
5774xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005775 name = "memory_planner",
5776 srcs = ["src/memory-planner.c"],
5777 hdrs = INTERNAL_HDRS,
5778 defines = select({
5779 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5780 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5781 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5782 }),
5783 gcc_copts = xnnpack_gcc_std_copts(),
5784 msvc_copts = xnnpack_msvc_std_copts(),
5785 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005786 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005787 "@pthreadpool",
5788 ],
5789)
5790
Marat Dukhan33fcf782020-05-24 14:27:15 -07005791xnnpack_cc_library(
5792 name = "memory_planner_test_mode",
5793 srcs = ["src/memory-planner.c"],
5794 hdrs = INTERNAL_HDRS,
5795 copts = [
5796 "-UNDEBUG",
5797 "-DXNN_TEST_MODE=1",
5798 ],
5799 defines = select({
5800 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5801 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5802 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5803 }),
5804 gcc_copts = xnnpack_gcc_std_copts(),
5805 msvc_copts = xnnpack_msvc_std_copts(),
5806 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005807 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005808 "@pthreadpool",
5809 ],
5810)
5811
Marat Dukhan08c4a432019-10-03 09:29:21 -07005812cc_library(
5813 name = "enable_assembly",
5814 defines = select({
5815 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5816 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005817 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005818 }),
5819)
5820
Marat Dukhan9de90e02020-06-18 16:04:12 -07005821cc_library(
5822 name = "enable_sparse",
5823 defines = select({
5824 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5825 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005826 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005827 }),
5828)
5829
Marat Dukhancf056b22019-10-07 10:26:29 -07005830xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005831 name = "operators",
5832 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005833 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005834 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005835 ],
5836 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005837 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005838 "-Isrc",
5839 "-Iinclude",
5840 ] + select({
5841 ":debug_build": [],
5842 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005843 }) + select({
5844 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5845 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005846 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005847 gcc_copts = xnnpack_gcc_std_copts(),
5848 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005849 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005850 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005851 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005852 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005853 "@FP16",
5854 "@FXdiv",
5855 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005856 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005857 ],
5858)
5859
Marat Dukhan10a38082020-04-17 03:58:35 -07005860xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005861 name = "operators_test_mode",
5862 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005863 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005864 "src/operator-delete.c",
5865 ],
5866 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5867 copts = LOGGING_COPTS + [
5868 "-Isrc",
5869 "-Iinclude",
5870 "-UNDEBUG",
5871 "-DXNN_TEST_MODE=1",
5872 ] + select({
5873 ":debug_build": [],
5874 "//conditions:default": xnnpack_min_size_copts(),
5875 }) + select({
5876 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5877 "//conditions:default": [],
5878 }),
5879 gcc_copts = xnnpack_gcc_std_copts(),
5880 msvc_copts = xnnpack_msvc_std_copts(),
5881 deps = [
5882 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005883 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005884 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005885 "@FP16",
5886 "@FXdiv",
5887 "@clog",
5888 "@pthreadpool",
5889 ],
5890)
5891
5892xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005893 name = "XNNPACK",
5894 srcs = [
5895 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005896 "src/runtime.c",
5897 "src/subgraph.c",
5898 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005899 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005900 hdrs = ["include/xnnpack.h"],
5901 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005902 "-Isrc",
5903 "-Iinclude",
5904 ] + select({
5905 ":debug_build": [],
5906 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005907 }) + select({
5908 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5909 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005910 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005911 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005912 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005913 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005914 visibility = xnnpack_visibility(),
5915 deps = [
5916 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005917 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005918 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005919 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005920 ":operator_run",
5921 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005922 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005923 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005924 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005925 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005926 ] + select({
5927 ":emscripten": [],
5928 "//conditions:default": ["@cpuinfo"],
5929 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005930)
5931
Marat Dukhan10a38082020-04-17 03:58:35 -07005932xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005933 name = "XNNPACK_test_mode",
5934 srcs = [
5935 "src/init.c",
5936 "src/runtime.c",
5937 "src/subgraph.c",
5938 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005939 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005940 hdrs = ["include/xnnpack.h"],
5941 copts = LOGGING_COPTS + [
5942 "-Isrc",
5943 "-Iinclude",
5944 "-UNDEBUG",
5945 "-DXNN_TEST_MODE=1",
5946 ] + select({
5947 ":debug_build": [],
5948 "//conditions:default": xnnpack_min_size_copts(),
5949 }) + select({
5950 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5951 "//conditions:default": [],
5952 }),
5953 gcc_copts = xnnpack_gcc_std_copts(),
5954 includes = ["include"],
5955 msvc_copts = xnnpack_msvc_std_copts(),
5956 visibility = xnnpack_visibility(),
5957 deps = [
5958 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005959 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005960 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005961 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005962 ":operator_run_test_mode",
5963 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005964 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005965 "@clog",
5966 "@FP16",
5967 "@pthreadpool",
5968 ] + select({
5969 ":emscripten": [],
5970 "//conditions:default": ["@cpuinfo"],
5971 }),
5972)
5973
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005974# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5975# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005976xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005977 name = "xnnpack_for_tflite",
5978 srcs = [
5979 "src/init.c",
5980 "src/runtime.c",
5981 "src/subgraph.c",
5982 "src/tensor.c",
5983 ] + SUBGRAPH_SRCS,
5984 hdrs = ["include/xnnpack.h"],
5985 copts = LOGGING_COPTS + [
5986 "-Isrc",
5987 "-Iinclude",
5988 ] + select({
5989 ":debug_build": [],
5990 "//conditions:default": xnnpack_min_size_copts(),
5991 }) + select({
5992 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5993 "//conditions:default": [],
5994 }),
5995 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005996 "XNN_NO_U8_OPERATORS",
5997 "XNN_NO_X8_OPERATORS",
5998 "XNN_NO_F16_OPERATORS",
5999 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07006000 ] + select({
6001 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07006002 ":xnn_enable_qs8_explicit_false": [
6003 "XNN_NO_QC8_OPERATORS",
6004 "XNN_NO_QS8_OPERATORS",
6005 ],
6006 "//conditions:default": [
6007 "XNN_NO_QC8_OPERATORS",
6008 "XNN_NO_QS8_OPERATORS",
6009 ],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07006010 }) + select({
6011 ":xnn_enable_qu8_explicit_true": [],
6012 ":xnn_enable_qu8_explicit_false": [
6013 "XNN_NO_QU8_OPERATORS",
6014 ],
6015 "//conditions:default": [
6016 "XNN_NO_QU8_OPERATORS",
6017 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07006018 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006019 gcc_copts = xnnpack_gcc_std_copts(),
6020 includes = ["include"],
6021 msvc_copts = xnnpack_msvc_std_copts(),
6022 visibility = xnnpack_visibility(),
6023 deps = [
6024 ":enable_assembly",
6025 ":enable_sparse",
6026 ":logging_utils",
6027 ":memory_planner",
6028 ":operator_run",
6029 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07006030 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006031 "@clog",
6032 "@FP16",
6033 "@pthreadpool",
6034 ] + select({
6035 ":emscripten": [],
6036 "//conditions:default": ["@cpuinfo"],
6037 }),
6038)
6039
6040# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
6041# not used by the TensorFlow.js WebAssembly backend to minimize code size.
6042xnnpack_cc_library(
6043 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006044 srcs = [
6045 "src/init.c",
6046 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07006047 hdrs = ["include/xnnpack.h"],
6048 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006049 "-Isrc",
6050 "-Iinclude",
6051 ] + select({
6052 ":debug_build": [],
6053 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07006054 }) + select({
6055 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
6056 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006057 }),
6058 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07006059 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07006060 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006061 "XNN_NO_U8_OPERATORS",
6062 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08006063 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006064 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07006065 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006066 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07006067 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006068 visibility = xnnpack_visibility(),
6069 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006070 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07006071 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006072 ":operator_run",
6073 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07006074 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006075 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006076 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006077 ] + select({
6078 ":emscripten": [],
6079 "//conditions:default": ["@cpuinfo"],
6080 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006081)
6082
Marat Dukhancf056b22019-10-07 10:26:29 -07006083xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006084 name = "bench_utils",
6085 srcs = ["bench/utils.cc"],
6086 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08006087 deps = [
6088 "@com_google_benchmark//:benchmark",
6089 "@cpuinfo",
6090 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006091)
6092
Frank Barchard7e955972019-10-11 10:34:25 -07006093######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07006094
6095xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07006096 name = "qs8_gemm_bench",
6097 srcs = [
6098 "bench/gemm.h",
6099 "bench/qs8-gemm.cc",
6100 "src/xnnpack/AlignedAllocator.h",
6101 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07006102 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
6103 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07006104)
6105
6106xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006107 name = "qs8_requantization_bench",
6108 srcs = [
6109 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006110 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006111 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006112 ] + MICROKERNEL_BENCHMARK_HDRS,
6113 deps = MICROKERNEL_BENCHMARK_DEPS,
6114)
6115
6116xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07006117 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006118 srcs = [
6119 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07006120 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006121 "src/xnnpack/AlignedAllocator.h",
6122 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006123 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006124 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006125)
6126
6127xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006128 name = "qu8_requantization_bench",
6129 srcs = [
6130 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006131 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006132 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006133 ] + MICROKERNEL_BENCHMARK_HDRS,
6134 deps = MICROKERNEL_BENCHMARK_DEPS,
6135)
6136
6137xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07006138 name = "f16_igemm_bench",
6139 srcs = [
6140 "bench/f16-igemm.cc",
6141 "bench/conv.h",
6142 "bench/google/conv.h",
6143 "src/xnnpack/AlignedAllocator.h",
6144 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006145 deps = MICROKERNEL_BENCHMARK_DEPS + [
6146 ":indirection",
6147 ":packing",
6148 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07006149)
6150
6151xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006152 name = "f16_gemm_bench",
6153 srcs = [
6154 "bench/f16-gemm.cc",
6155 "bench/gemm.h",
6156 "src/xnnpack/AlignedAllocator.h",
6157 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006158 deps = MICROKERNEL_BENCHMARK_DEPS + [
6159 ":packing",
6160 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006161)
6162
6163xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006164 name = "f16_spmm_bench",
6165 srcs = [
6166 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006167 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006168 "src/xnnpack/AlignedAllocator.h",
6169 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006170 deps = MICROKERNEL_BENCHMARK_DEPS,
6171)
6172
6173xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006174 name = "f16_vrelu_bench",
6175 srcs = [
6176 "bench/f16-vrelu.cc",
6177 "src/xnnpack/AlignedAllocator.h",
6178 ] + MICROKERNEL_BENCHMARK_HDRS,
6179 deps = MICROKERNEL_BENCHMARK_DEPS,
6180)
6181
6182xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006183 name = "f32_igemm_bench",
6184 srcs = [
6185 "bench/f32-igemm.cc",
6186 "bench/conv.h",
6187 "src/xnnpack/AlignedAllocator.h",
6188 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006189 deps = MICROKERNEL_BENCHMARK_DEPS + [
6190 ":indirection",
6191 ":packing",
6192 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006193)
6194
6195xnnpack_benchmark(
6196 name = "f32_conv_hwc_bench",
6197 srcs = [
6198 "bench/f32-conv-hwc.cc",
6199 "bench/dconv.h",
6200 "src/xnnpack/AlignedAllocator.h",
6201 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006202 deps = MICROKERNEL_BENCHMARK_DEPS + [
6203 ":packing",
6204 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006205)
6206
6207xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006208 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07006209 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006210 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07006211 "bench/dconv.h",
6212 "src/xnnpack/AlignedAllocator.h",
6213 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006214 deps = MICROKERNEL_BENCHMARK_DEPS + [
6215 ":packing",
6216 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07006217)
6218
6219xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07006220 name = "f16_dwconv_bench",
6221 srcs = [
6222 "bench/f16-dwconv.cc",
6223 "bench/dwconv.h",
6224 "bench/google/dwconv.h",
6225 "src/xnnpack/AlignedAllocator.h",
6226 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006227 deps = MICROKERNEL_BENCHMARK_DEPS + [
6228 ":indirection",
6229 ":packing",
6230 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07006231)
6232
6233xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006234 name = "f32_dwconv_bench",
6235 srcs = [
6236 "bench/f32-dwconv.cc",
6237 "bench/dwconv.h",
6238 "src/xnnpack/AlignedAllocator.h",
6239 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006240 deps = MICROKERNEL_BENCHMARK_DEPS + [
6241 ":indirection",
6242 ":packing",
6243 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006244)
6245
6246xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006247 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006248 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006249 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006250 "bench/dwconv.h",
6251 "src/xnnpack/AlignedAllocator.h",
6252 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006253 deps = MICROKERNEL_BENCHMARK_DEPS + [
6254 ":indirection",
6255 ":packing",
6256 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006257)
6258
6259xnnpack_benchmark(
6260 name = "f32_gemm_bench",
6261 srcs = [
6262 "bench/f32-gemm.cc",
6263 "bench/gemm.h",
6264 "src/xnnpack/AlignedAllocator.h",
6265 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006266 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006267 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006268)
6269
6270xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006271 name = "f32_raddexpminusmax_bench",
6272 srcs = [
6273 "bench/f32-raddexpminusmax.cc",
6274 "src/xnnpack/AlignedAllocator.h",
6275 ] + MICROKERNEL_BENCHMARK_HDRS,
6276 deps = MICROKERNEL_BENCHMARK_DEPS,
6277)
6278
6279xnnpack_benchmark(
6280 name = "f32_raddextexp_bench",
6281 srcs = [
6282 "bench/f32-raddextexp.cc",
6283 "src/xnnpack/AlignedAllocator.h",
6284 ] + MICROKERNEL_BENCHMARK_HDRS,
6285 deps = MICROKERNEL_BENCHMARK_DEPS,
6286)
6287
6288xnnpack_benchmark(
6289 name = "f32_raddstoreexpminusmax_bench",
6290 srcs = [
6291 "bench/f32-raddstoreexpminusmax.cc",
6292 "src/xnnpack/AlignedAllocator.h",
6293 ] + MICROKERNEL_BENCHMARK_HDRS,
6294 deps = MICROKERNEL_BENCHMARK_DEPS,
6295)
6296
6297xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006298 name = "f32_rmax_bench",
6299 srcs = [
6300 "bench/f32-rmax.cc",
6301 "src/xnnpack/AlignedAllocator.h",
6302 ] + MICROKERNEL_BENCHMARK_HDRS,
6303 deps = MICROKERNEL_BENCHMARK_DEPS,
6304)
6305
6306xnnpack_benchmark(
6307 name = "f32_spmm_bench",
6308 srcs = [
6309 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006310 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006311 "src/xnnpack/AlignedAllocator.h",
6312 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006313 deps = MICROKERNEL_BENCHMARK_DEPS,
6314)
6315
6316xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006317 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006318 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006319 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006320 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006321 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006322 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006323)
6324
6325xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006326 name = "f32_velu_bench",
6327 srcs = [
6328 "bench/f32-velu.cc",
6329 "src/xnnpack/AlignedAllocator.h",
6330 ] + MICROKERNEL_BENCHMARK_HDRS,
6331 deps = MICROKERNEL_BENCHMARK_DEPS,
6332)
6333
6334xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006335 name = "f32_vhswish_bench",
6336 srcs = [
6337 "bench/f32-vhswish.cc",
6338 "src/xnnpack/AlignedAllocator.h",
6339 ] + MICROKERNEL_BENCHMARK_HDRS,
6340 deps = MICROKERNEL_BENCHMARK_DEPS,
6341)
6342
6343xnnpack_benchmark(
6344 name = "f32_vrelu_bench",
6345 srcs = [
6346 "bench/f32-vrelu.cc",
6347 "src/xnnpack/AlignedAllocator.h",
6348 ] + MICROKERNEL_BENCHMARK_HDRS,
6349 deps = MICROKERNEL_BENCHMARK_DEPS,
6350)
6351
6352xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006353 name = "f32_vscaleexpminusmax_bench",
6354 srcs = [
6355 "bench/f32-vscaleexpminusmax.cc",
6356 "src/xnnpack/AlignedAllocator.h",
6357 ] + MICROKERNEL_BENCHMARK_HDRS,
6358 deps = MICROKERNEL_BENCHMARK_DEPS,
6359)
6360
6361xnnpack_benchmark(
6362 name = "f32_vscaleextexp_bench",
6363 srcs = [
6364 "bench/f32-vscaleextexp.cc",
6365 "src/xnnpack/AlignedAllocator.h",
6366 ] + MICROKERNEL_BENCHMARK_HDRS,
6367 deps = MICROKERNEL_BENCHMARK_DEPS,
6368)
6369
6370xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006371 name = "f32_vsigmoid_bench",
6372 srcs = [
6373 "bench/f32-vsigmoid.cc",
6374 "src/xnnpack/AlignedAllocator.h",
6375 ] + MICROKERNEL_BENCHMARK_HDRS,
6376 deps = MICROKERNEL_BENCHMARK_DEPS,
6377)
6378
6379xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006380 name = "f32_vsqrt_bench",
6381 srcs = [
6382 "bench/f32-vsqrt.cc",
6383 "src/xnnpack/AlignedAllocator.h",
6384 ] + MICROKERNEL_BENCHMARK_HDRS,
6385 deps = MICROKERNEL_BENCHMARK_DEPS,
6386)
6387
6388xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006389 name = "f32_im2col_gemm_bench",
6390 srcs = [
6391 "bench/f32-im2col-gemm.cc",
6392 "bench/conv.h",
6393 "src/xnnpack/AlignedAllocator.h",
6394 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006395 deps = MICROKERNEL_BENCHMARK_DEPS + [
6396 ":im2col",
6397 ":packing",
6398 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006399)
6400
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006401xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006402 name = "rounding_bench",
6403 srcs = [
6404 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006405 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006406 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006407 ] + MICROKERNEL_BENCHMARK_HDRS,
6408 deps = MICROKERNEL_BENCHMARK_DEPS,
6409)
6410
Marat Dukhan08c4a432019-10-03 09:29:21 -07006411########################### Benchmarks for operators ###########################
6412
6413xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006414 name = "average_pooling_bench",
6415 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006416 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006417 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006418 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006419)
6420
6421xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006422 name = "bankers_rounding_bench",
6423 srcs = ["bench/bankers-rounding.cc"],
6424 copts = xnnpack_optional_tflite_copts(),
6425 tags = ["nowin32"],
6426 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6427)
6428
6429xnnpack_benchmark(
6430 name = "ceiling_bench",
6431 srcs = ["bench/ceiling.cc"],
6432 copts = xnnpack_optional_tflite_copts(),
6433 tags = ["nowin32"],
6434 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6435)
6436
6437xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006438 name = "channel_shuffle_bench",
6439 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006440 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006441)
6442
6443xnnpack_benchmark(
6444 name = "convolution_bench",
6445 srcs = ["bench/convolution.cc"],
6446 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006447 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006448 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006449)
6450
6451xnnpack_benchmark(
6452 name = "deconvolution_bench",
6453 srcs = ["bench/deconvolution.cc"],
6454 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006455 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006456 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006457)
6458
6459xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006460 name = "elu_bench",
6461 srcs = ["bench/elu.cc"],
6462 copts = xnnpack_optional_tflite_copts(),
6463 tags = ["nowin32"],
6464 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6465)
6466
6467xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006468 name = "floor_bench",
6469 srcs = ["bench/floor.cc"],
6470 copts = xnnpack_optional_tflite_copts(),
6471 tags = ["nowin32"],
6472 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6473)
6474
6475xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006476 name = "global_average_pooling_bench",
6477 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006478 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006479)
6480
6481xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006482 name = "hardswish_bench",
6483 srcs = ["bench/hardswish.cc"],
6484 copts = xnnpack_optional_tflite_copts(),
6485 tags = ["nowin32"],
6486 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6487)
6488
6489xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006490 name = "max_pooling_bench",
6491 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006492 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006493)
6494
6495xnnpack_benchmark(
6496 name = "sigmoid_bench",
6497 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006498 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006499 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006500 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006501)
6502
6503xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006504 name = "prelu_bench",
6505 srcs = ["bench/prelu.cc"],
6506 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006507 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006508 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006509)
6510
6511xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006512 name = "softmax_bench",
6513 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006514 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006515 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006516 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006517)
6518
Marat Dukhan87727142020-06-24 15:24:10 -07006519xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006520 name = "square_root_bench",
6521 srcs = ["bench/square-root.cc"],
6522 copts = xnnpack_optional_tflite_copts(),
6523 tags = ["nowin32"],
6524 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6525)
6526
6527xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006528 name = "truncation_bench",
6529 srcs = ["bench/truncation.cc"],
6530 deps = OPERATOR_BENCHMARK_DEPS,
6531)
6532
Marat Dukhanc068bb62019-10-04 13:24:39 -07006533############################# End-to-end benchmarks ############################
6534
6535cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006536 name = "fp32_mobilenet_v1",
6537 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006538 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006539 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006540 linkstatic = True,
6541 deps = [
6542 ":XNNPACK",
6543 "@pthreadpool",
6544 ],
6545)
6546
6547cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006548 name = "fp32_sparse_mobilenet_v1",
6549 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6550 hdrs = ["models/models.h"],
6551 copts = xnnpack_std_cxxopts(),
6552 linkstatic = True,
6553 deps = [
6554 ":XNNPACK",
6555 "@pthreadpool",
6556 ],
6557)
6558
6559cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006560 name = "fp16_mobilenet_v1",
6561 srcs = ["models/fp16-mobilenet-v1.cc"],
6562 hdrs = ["models/models.h"],
6563 copts = xnnpack_std_cxxopts(),
6564 linkstatic = True,
6565 deps = [
6566 ":XNNPACK",
6567 "@FP16",
6568 "@pthreadpool",
6569 ],
6570)
6571
6572cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006573 name = "qs8_mobilenet_v1",
6574 srcs = ["models/qs8-mobilenet-v1.cc"],
6575 hdrs = ["models/models.h"],
6576 copts = xnnpack_std_cxxopts(),
6577 linkstatic = True,
6578 deps = [
6579 ":XNNPACK",
6580 "@pthreadpool",
6581 ],
6582)
6583
6584cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006585 name = "qs8_mobilenet_v2",
6586 srcs = ["models/qs8-mobilenet-v2.cc"],
6587 hdrs = ["models/models.h"],
6588 copts = xnnpack_std_cxxopts(),
6589 linkstatic = True,
6590 deps = [
6591 ":XNNPACK",
6592 "@pthreadpool",
6593 ],
6594)
6595
6596cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006597 name = "qu8_mobilenet_v1",
6598 srcs = ["models/qu8-mobilenet-v1.cc"],
6599 hdrs = ["models/models.h"],
6600 copts = xnnpack_std_cxxopts(),
6601 linkstatic = True,
6602 deps = [
6603 ":XNNPACK",
6604 "@pthreadpool",
6605 ],
6606)
6607
6608cc_library(
Marat Dukhan036b2b12021-07-21 01:12:58 -07006609 name = "qu8_mobilenet_v2",
6610 srcs = ["models/qu8-mobilenet-v2.cc"],
6611 hdrs = ["models/models.h"],
6612 copts = xnnpack_std_cxxopts(),
6613 linkstatic = True,
6614 deps = [
6615 ":XNNPACK",
6616 "@pthreadpool",
6617 ],
6618)
6619
6620cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006621 name = "fp32_mobilenet_v2",
6622 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006623 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006624 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006625 linkstatic = True,
6626 deps = [
6627 ":XNNPACK",
6628 "@pthreadpool",
6629 ],
6630)
6631
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006632cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006633 name = "fp32_sparse_mobilenet_v2",
6634 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6635 hdrs = ["models/models.h"],
6636 copts = xnnpack_std_cxxopts(),
6637 linkstatic = True,
6638 deps = [
6639 ":XNNPACK",
6640 "@pthreadpool",
6641 ],
6642)
6643
6644cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006645 name = "fp16_mobilenet_v2",
6646 srcs = ["models/fp16-mobilenet-v2.cc"],
6647 hdrs = ["models/models.h"],
6648 copts = xnnpack_std_cxxopts(),
6649 linkstatic = True,
6650 deps = [
6651 ":XNNPACK",
6652 "@FP16",
6653 "@pthreadpool",
6654 ],
6655)
6656
6657cc_library(
6658 name = "fp32_mobilenet_v3_large",
6659 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006660 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006661 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006662 linkstatic = True,
6663 deps = [
6664 ":XNNPACK",
6665 "@pthreadpool",
6666 ],
6667)
6668
6669cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006670 name = "fp32_sparse_mobilenet_v3_large",
6671 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6672 hdrs = ["models/models.h"],
6673 copts = xnnpack_std_cxxopts(),
6674 linkstatic = True,
6675 deps = [
6676 ":XNNPACK",
6677 "@pthreadpool",
6678 ],
6679)
6680
6681cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006682 name = "fp16_mobilenet_v3_large",
6683 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6684 hdrs = ["models/models.h"],
6685 copts = xnnpack_std_cxxopts(),
6686 linkstatic = True,
6687 deps = [
6688 ":XNNPACK",
6689 "@FP16",
6690 "@pthreadpool",
6691 ],
6692)
6693
6694cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006695 name = "fp32_mobilenet_v3_small",
6696 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006697 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006698 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006699 linkstatic = True,
6700 deps = [
6701 ":XNNPACK",
6702 "@pthreadpool",
6703 ],
6704)
6705
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006706cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006707 name = "fp32_sparse_mobilenet_v3_small",
6708 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6709 hdrs = ["models/models.h"],
6710 copts = xnnpack_std_cxxopts(),
6711 linkstatic = True,
6712 deps = [
6713 ":XNNPACK",
6714 "@pthreadpool",
6715 ],
6716)
6717
6718cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006719 name = "fp16_mobilenet_v3_small",
6720 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6721 hdrs = ["models/models.h"],
6722 copts = xnnpack_std_cxxopts(),
6723 linkstatic = True,
6724 deps = [
6725 ":XNNPACK",
6726 "@FP16",
6727 "@pthreadpool",
6728 ],
6729)
6730
Marat Dukhanc068bb62019-10-04 13:24:39 -07006731xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006732 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006733 srcs = [
6734 "bench/f32-dwconv-e2e.cc",
6735 "bench/end2end.h",
6736 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006737 deps = MICROKERNEL_BENCHMARK_DEPS + [
6738 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006739 ":fp32_mobilenet_v1",
6740 ":fp32_mobilenet_v2",
6741 ":fp32_mobilenet_v3_large",
6742 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006743 ],
6744)
6745
6746xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006747 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006748 srcs = [
6749 "bench/f32-gemm-e2e.cc",
6750 "bench/end2end.h",
6751 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006752 deps = MICROKERNEL_BENCHMARK_DEPS + [
6753 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006754 ":fp32_mobilenet_v1",
6755 ":fp32_mobilenet_v2",
6756 ":fp32_mobilenet_v3_large",
6757 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006758 ],
6759)
6760
6761xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006762 name = "qs8_gemm_e2e_bench",
6763 srcs = [
6764 "bench/qs8-gemm-e2e.cc",
6765 "bench/end2end.h",
6766 ] + MICROKERNEL_BENCHMARK_HDRS,
6767 deps = MICROKERNEL_BENCHMARK_DEPS + [
6768 ":XNNPACK",
6769 ":qs8_mobilenet_v1",
6770 ":qs8_mobilenet_v2",
6771 ],
6772)
6773
6774xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006775 name = "end2end_bench",
6776 srcs = ["bench/end2end.cc"],
6777 deps = [
6778 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006779 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006780 ":fp16_mobilenet_v1",
6781 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006782 ":fp16_mobilenet_v3_large",
6783 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006784 ":fp32_mobilenet_v1",
6785 ":fp32_mobilenet_v2",
6786 ":fp32_mobilenet_v3_large",
6787 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006788 ":fp32_sparse_mobilenet_v1",
6789 ":fp32_sparse_mobilenet_v2",
6790 ":fp32_sparse_mobilenet_v3_large",
6791 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006792 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006793 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006794 ":qu8_mobilenet_v1",
Marat Dukhan036b2b12021-07-21 01:12:58 -07006795 ":qu8_mobilenet_v2",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006796 "@pthreadpool",
6797 ],
6798)
6799
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006800#################### Accuracy evaluation for math functions ####################
6801
6802xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006803 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006804 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006805 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006806 "src/xnnpack/AlignedAllocator.h",
6807 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006808 deps = ACCURACY_EVAL_DEPS + [
6809 ":bench_utils",
6810 "@cpuinfo",
6811 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006812)
6813
Marat Dukhan515c9772019-10-17 18:07:57 -07006814xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006815 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006816 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006817 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006818 "src/xnnpack/AlignedAllocator.h",
6819 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006820 deps = ACCURACY_EVAL_DEPS + [
6821 ":bench_utils",
6822 "@cpuinfo",
6823 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006824)
6825
Marat Dukhan98ba4412019-10-23 02:14:28 -07006826xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006827 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006828 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006829 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006830 "src/xnnpack/AlignedAllocator.h",
6831 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006832 deps = ACCURACY_EVAL_DEPS + [
6833 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006834 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006835 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006836)
6837
6838xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006839 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006840 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006841 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006842 "src/xnnpack/AlignedAllocator.h",
6843 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006844 deps = ACCURACY_EVAL_DEPS + [
6845 ":bench_utils",
6846 "@cpuinfo",
6847 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006848)
6849
Marat Dukhanf44f0222020-12-14 11:53:27 -08006850xnnpack_benchmark(
6851 name = "f32_sigmoid_ulp_eval",
6852 srcs = [
6853 "eval/f32-sigmoid-ulp.cc",
6854 "src/xnnpack/AlignedAllocator.h",
6855 ] + ACCURACY_EVAL_HDRS,
6856 deps = ACCURACY_EVAL_DEPS + [
6857 ":bench_utils",
6858 "@cpuinfo",
6859 ],
6860)
6861
6862xnnpack_benchmark(
6863 name = "f32_sqrt_ulp_eval",
6864 srcs = [
6865 "eval/f32-sqrt-ulp.cc",
6866 "src/xnnpack/AlignedAllocator.h",
6867 ] + ACCURACY_EVAL_HDRS,
6868 deps = ACCURACY_EVAL_DEPS + [
6869 ":bench_utils",
6870 "@cpuinfo",
6871 ],
6872)
6873
6874################### Accuracy verification for math functions ##################
6875
6876xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006877 name = "f32_exp_eval",
6878 srcs = [
6879 "eval/f32-exp.cc",
6880 "src/xnnpack/AlignedAllocator.h",
6881 "src/xnnpack/math-stubs.h",
6882 ] + MICROKERNEL_TEST_HDRS,
6883 automatic = False,
6884 deps = MICROKERNEL_TEST_DEPS,
6885)
6886
6887xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006888 name = "f32_expm1minus_eval",
6889 srcs = [
6890 "eval/f32-expm1minus.cc",
6891 "src/xnnpack/AlignedAllocator.h",
6892 "src/xnnpack/math-stubs.h",
6893 ] + MICROKERNEL_TEST_HDRS,
6894 automatic = False,
6895 deps = MICROKERNEL_TEST_DEPS,
6896)
6897
Marat Dukhan8853b822020-05-07 12:19:01 -07006898xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006899 name = "f32_expminus_eval",
6900 srcs = [
6901 "eval/f32-expminus.cc",
6902 "src/xnnpack/AlignedAllocator.h",
6903 "src/xnnpack/math-stubs.h",
6904 ] + MICROKERNEL_TEST_HDRS,
6905 automatic = False,
6906 deps = MICROKERNEL_TEST_DEPS,
6907)
6908
6909xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006910 name = "f32_roundne_eval",
6911 srcs = [
6912 "eval/f32-roundne.cc",
6913 "src/xnnpack/AlignedAllocator.h",
6914 "src/xnnpack/math-stubs.h",
6915 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006916 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006917 deps = MICROKERNEL_TEST_DEPS,
6918)
6919
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006920xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006921 name = "f32_roundd_eval",
6922 srcs = [
6923 "eval/f32-roundd.cc",
6924 "src/xnnpack/AlignedAllocator.h",
6925 "src/xnnpack/math-stubs.h",
6926 ] + MICROKERNEL_TEST_HDRS,
6927 automatic = False,
6928 deps = MICROKERNEL_TEST_DEPS,
6929)
6930
6931xnnpack_unit_test(
6932 name = "f32_roundu_eval",
6933 srcs = [
6934 "eval/f32-roundu.cc",
6935 "src/xnnpack/AlignedAllocator.h",
6936 "src/xnnpack/math-stubs.h",
6937 ] + MICROKERNEL_TEST_HDRS,
6938 automatic = False,
6939 deps = MICROKERNEL_TEST_DEPS,
6940)
6941
6942xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006943 name = "f32_roundz_eval",
6944 srcs = [
6945 "eval/f32-roundz.cc",
6946 "src/xnnpack/AlignedAllocator.h",
6947 "src/xnnpack/math-stubs.h",
6948 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006949 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006950 deps = MICROKERNEL_TEST_DEPS,
6951)
6952
Marat Dukhan08c4a432019-10-03 09:29:21 -07006953######################### Unit tests for micro-kernels #########################
6954
6955xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006956 name = "f16_dwconv_minmax_test",
6957 srcs = [
6958 "test/f16-dwconv-minmax.cc",
6959 "test/dwconv-microkernel-tester.h",
6960 "src/xnnpack/AlignedAllocator.h",
6961 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6962 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6963)
6964
6965xnnpack_unit_test(
6966 name = "f16_gavgpool_minmax_test",
6967 srcs = [
6968 "test/f16-gavgpool-minmax.cc",
6969 "test/gavgpool-microkernel-tester.h",
6970 "src/xnnpack/AlignedAllocator.h",
6971 ] + MICROKERNEL_TEST_HDRS,
6972 deps = MICROKERNEL_TEST_DEPS,
6973)
6974
6975xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006976 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006977 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006978 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006979 "test/gemm-microkernel-tester.h",
6980 "src/xnnpack/AlignedAllocator.h",
6981 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006982 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006983)
6984
6985xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006986 name = "f16_igemm_minmax_test",
6987 srcs = [
6988 "test/f16-igemm-minmax.cc",
6989 "test/gemm-microkernel-tester.h",
6990 "src/xnnpack/AlignedAllocator.h",
6991 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6992 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6993)
6994
6995xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006996 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006997 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006998 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006999 "test/spmm-microkernel-tester.h",
7000 "src/xnnpack/AlignedAllocator.h",
7001 ] + MICROKERNEL_TEST_HDRS,
7002 deps = MICROKERNEL_TEST_DEPS,
7003)
7004
7005xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007006 name = "f16_vadd_minmax_test",
7007 srcs = [
7008 "test/f16-vadd-minmax.cc",
7009 "test/vbinary-microkernel-tester.h",
7010 ] + MICROKERNEL_TEST_HDRS,
7011 deps = MICROKERNEL_TEST_DEPS,
7012)
7013
7014xnnpack_unit_test(
7015 name = "f16_vaddc_minmax_test",
7016 srcs = [
7017 "test/f16-vaddc-minmax.cc",
7018 "test/vbinaryc-microkernel-tester.h",
7019 ] + MICROKERNEL_TEST_HDRS,
7020 deps = MICROKERNEL_TEST_DEPS,
7021)
7022
7023xnnpack_unit_test(
7024 name = "f16_vclamp_test",
7025 srcs = [
7026 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007027 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007028 ] + MICROKERNEL_TEST_HDRS,
7029 deps = MICROKERNEL_TEST_DEPS,
7030)
7031
7032xnnpack_unit_test(
7033 name = "f16_vdiv_minmax_test",
7034 srcs = [
7035 "test/f16-vdiv-minmax.cc",
7036 "test/vbinary-microkernel-tester.h",
7037 ] + MICROKERNEL_TEST_HDRS,
7038 deps = MICROKERNEL_TEST_DEPS,
7039)
7040
7041xnnpack_unit_test(
7042 name = "f16_vdivc_minmax_test",
7043 srcs = [
7044 "test/f16-vdivc-minmax.cc",
7045 "test/vbinaryc-microkernel-tester.h",
7046 ] + MICROKERNEL_TEST_HDRS,
7047 deps = MICROKERNEL_TEST_DEPS,
7048)
7049
7050xnnpack_unit_test(
7051 name = "f16_vrdivc_minmax_test",
7052 srcs = [
7053 "test/f16-vrdivc-minmax.cc",
7054 "test/vbinaryc-microkernel-tester.h",
7055 ] + MICROKERNEL_TEST_HDRS,
7056 deps = MICROKERNEL_TEST_DEPS,
7057)
7058
7059xnnpack_unit_test(
7060 name = "f16_vhswish_test",
7061 srcs = [
7062 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007063 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007064 ] + MICROKERNEL_TEST_HDRS,
7065 deps = MICROKERNEL_TEST_DEPS,
7066)
7067
7068xnnpack_unit_test(
7069 name = "f16_vmax_test",
7070 srcs = [
7071 "test/f16-vmax.cc",
7072 "test/vbinary-microkernel-tester.h",
7073 ] + MICROKERNEL_TEST_HDRS,
7074 deps = MICROKERNEL_TEST_DEPS,
7075)
7076
7077xnnpack_unit_test(
7078 name = "f16_vmaxc_test",
7079 srcs = [
7080 "test/f16-vmaxc.cc",
7081 "test/vbinaryc-microkernel-tester.h",
7082 ] + MICROKERNEL_TEST_HDRS,
7083 deps = MICROKERNEL_TEST_DEPS,
7084)
7085
7086xnnpack_unit_test(
7087 name = "f16_vmin_test",
7088 srcs = [
7089 "test/f16-vmin.cc",
7090 "test/vbinary-microkernel-tester.h",
7091 ] + MICROKERNEL_TEST_HDRS,
7092 deps = MICROKERNEL_TEST_DEPS,
7093)
7094
7095xnnpack_unit_test(
7096 name = "f16_vminc_test",
7097 srcs = [
7098 "test/f16-vminc.cc",
7099 "test/vbinaryc-microkernel-tester.h",
7100 ] + MICROKERNEL_TEST_HDRS,
7101 deps = MICROKERNEL_TEST_DEPS,
7102)
7103
7104xnnpack_unit_test(
7105 name = "f16_vmul_minmax_test",
7106 srcs = [
7107 "test/f16-vmul-minmax.cc",
7108 "test/vbinary-microkernel-tester.h",
7109 ] + MICROKERNEL_TEST_HDRS,
7110 deps = MICROKERNEL_TEST_DEPS,
7111)
7112
7113xnnpack_unit_test(
7114 name = "f16_vmulc_minmax_test",
7115 srcs = [
7116 "test/f16-vmulc-minmax.cc",
7117 "test/vbinaryc-microkernel-tester.h",
7118 ] + MICROKERNEL_TEST_HDRS,
7119 deps = MICROKERNEL_TEST_DEPS,
7120)
7121
7122xnnpack_unit_test(
7123 name = "f16_vmulcaddc_minmax_test",
7124 srcs = [
7125 "test/f16-vmulcaddc-minmax.cc",
7126 "test/vmulcaddc-microkernel-tester.h",
7127 "src/xnnpack/AlignedAllocator.h",
7128 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7129 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7130)
7131
7132xnnpack_unit_test(
7133 name = "f16_vsub_minmax_test",
7134 srcs = [
7135 "test/f16-vsub-minmax.cc",
7136 "test/vbinary-microkernel-tester.h",
7137 ] + MICROKERNEL_TEST_HDRS,
7138 deps = MICROKERNEL_TEST_DEPS,
7139)
7140
7141xnnpack_unit_test(
7142 name = "f16_vsubc_minmax_test",
7143 srcs = [
7144 "test/f16-vsubc-minmax.cc",
7145 "test/vbinaryc-microkernel-tester.h",
7146 ] + MICROKERNEL_TEST_HDRS,
7147 deps = MICROKERNEL_TEST_DEPS,
7148)
7149
7150xnnpack_unit_test(
7151 name = "f16_vrsubc_minmax_test",
7152 srcs = [
7153 "test/f16-vrsubc-minmax.cc",
7154 "test/vbinaryc-microkernel-tester.h",
7155 ] + MICROKERNEL_TEST_HDRS,
7156 deps = MICROKERNEL_TEST_DEPS,
7157)
7158
7159xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007160 name = "f32_argmaxpool_test",
7161 srcs = [
7162 "test/f32-argmaxpool.cc",
7163 "test/argmaxpool-microkernel-tester.h",
7164 "src/xnnpack/AlignedAllocator.h",
7165 ] + MICROKERNEL_TEST_HDRS,
7166 deps = MICROKERNEL_TEST_DEPS,
7167)
7168
7169xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007170 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007171 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007172 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007173 "test/avgpool-microkernel-tester.h",
7174 "src/xnnpack/AlignedAllocator.h",
7175 ] + MICROKERNEL_TEST_HDRS,
7176 deps = MICROKERNEL_TEST_DEPS,
7177)
7178
7179xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07007180 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007181 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07007182 "test/f32-ibilinear.cc",
7183 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007184 "src/xnnpack/AlignedAllocator.h",
7185 ] + MICROKERNEL_TEST_HDRS,
7186 deps = MICROKERNEL_TEST_DEPS,
7187)
7188
7189xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07007190 name = "f32_ibilinear_chw_test",
7191 srcs = [
7192 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07007193 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07007194 "src/xnnpack/AlignedAllocator.h",
7195 ] + MICROKERNEL_TEST_HDRS,
7196 deps = MICROKERNEL_TEST_DEPS,
7197)
7198
7199xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007200 name = "f32_igemm_test",
7201 srcs = [
7202 "test/f32-igemm.cc",
7203 "test/gemm-microkernel-tester.h",
7204 "src/xnnpack/AlignedAllocator.h",
7205 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007206 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007207)
7208
7209xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007210 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007211 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07007212 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007213 "test/gemm-microkernel-tester.h",
7214 "src/xnnpack/AlignedAllocator.h",
7215 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007216 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007217)
7218
7219xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07007220 name = "f32_igemm_minmax_test",
7221 srcs = [
7222 "test/f32-igemm-minmax.cc",
7223 "test/gemm-microkernel-tester.h",
7224 "src/xnnpack/AlignedAllocator.h",
7225 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007226 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07007227)
7228
7229xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007230 name = "f32_conv_hwc_test",
7231 srcs = [
7232 "test/f32-conv-hwc.cc",
7233 "test/conv-hwc-microkernel-tester.h",
7234 "src/xnnpack/AlignedAllocator.h",
7235 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007236 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007237)
7238
7239xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007240 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007241 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007242 "test/f32-conv-hwc2chw.cc",
7243 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007244 "src/xnnpack/AlignedAllocator.h",
7245 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007246 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007247)
7248
7249xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007250 name = "f32_dwconv_test",
7251 srcs = [
7252 "test/f32-dwconv.cc",
7253 "test/dwconv-microkernel-tester.h",
7254 "src/xnnpack/AlignedAllocator.h",
7255 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007256 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007257)
7258
7259xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007260 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007261 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007262 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007263 "test/dwconv-microkernel-tester.h",
7264 "src/xnnpack/AlignedAllocator.h",
7265 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007266 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007267)
7268
7269xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07007270 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007271 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07007272 "test/f32-dwconv2d-chw.cc",
7273 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007274 "src/xnnpack/AlignedAllocator.h",
7275 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007276 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007277)
7278
7279xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007280 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007281 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007282 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007283 "test/gavgpool-microkernel-tester.h",
7284 "src/xnnpack/AlignedAllocator.h",
7285 ] + MICROKERNEL_TEST_HDRS,
7286 deps = MICROKERNEL_TEST_DEPS,
7287)
7288
7289xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007290 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007291 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007292 "test/f32-gavgpool-cw.cc",
7293 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007294 "src/xnnpack/AlignedAllocator.h",
7295 ] + MICROKERNEL_TEST_HDRS,
7296 deps = MICROKERNEL_TEST_DEPS,
7297)
7298
7299xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007300 name = "f32_gemm_test",
7301 srcs = [
7302 "test/f32-gemm.cc",
7303 "test/gemm-microkernel-tester.h",
7304 "src/xnnpack/AlignedAllocator.h",
7305 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007306 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007307)
7308
7309xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007310 name = "f32_gemm_relu_test",
7311 srcs = [
7312 "test/f32-gemm-relu.cc",
7313 "test/gemm-microkernel-tester.h",
7314 "src/xnnpack/AlignedAllocator.h",
7315 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007316 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007317)
7318
7319xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007320 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007321 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007322 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007323 "test/gemm-microkernel-tester.h",
7324 "src/xnnpack/AlignedAllocator.h",
7325 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007326 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007327)
7328
7329xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007330 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007331 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007332 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007333 "test/gemm-microkernel-tester.h",
7334 "src/xnnpack/AlignedAllocator.h",
7335 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007336 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007337)
7338
7339xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007340 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007341 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007342 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007343 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007344 ] + MICROKERNEL_TEST_HDRS,
7345 deps = MICROKERNEL_TEST_DEPS,
7346)
7347
7348xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007349 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007350 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007351 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007352 "test/maxpool-microkernel-tester.h",
7353 ] + MICROKERNEL_TEST_HDRS,
7354 deps = MICROKERNEL_TEST_DEPS,
7355)
7356
7357xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007358 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007359 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007360 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007361 "test/avgpool-microkernel-tester.h",
7362 "src/xnnpack/AlignedAllocator.h",
7363 ] + MICROKERNEL_TEST_HDRS,
7364 deps = MICROKERNEL_TEST_DEPS,
7365)
7366
7367xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007368 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007369 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007370 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007371 "test/gemm-microkernel-tester.h",
7372 "src/xnnpack/AlignedAllocator.h",
7373 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007374 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007375)
7376
7377xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007378 name = "f16_prelu_test",
7379 srcs = [
7380 "test/f16-prelu.cc",
7381 "test/prelu-microkernel-tester.h",
7382 "src/xnnpack/AlignedAllocator.h",
7383 ] + MICROKERNEL_TEST_HDRS,
7384 deps = MICROKERNEL_TEST_DEPS,
7385)
7386
7387xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007388 name = "f32_prelu_test",
7389 srcs = [
7390 "test/f32-prelu.cc",
7391 "test/prelu-microkernel-tester.h",
7392 "src/xnnpack/AlignedAllocator.h",
7393 ] + MICROKERNEL_TEST_HDRS,
7394 deps = MICROKERNEL_TEST_DEPS,
7395)
7396
7397xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007398 name = "f32_raddexpminusmax_test",
7399 srcs = [
7400 "test/f32-raddexpminusmax.cc",
7401 "test/raddexpminusmax-microkernel-tester.h",
7402 ] + MICROKERNEL_TEST_HDRS,
7403 deps = MICROKERNEL_TEST_DEPS,
7404)
7405
7406xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007407 name = "f32_raddextexp_test",
7408 srcs = [
7409 "test/f32-raddextexp.cc",
7410 "test/raddextexp-microkernel-tester.h",
7411 ] + MICROKERNEL_TEST_HDRS,
7412 deps = MICROKERNEL_TEST_DEPS,
7413)
7414
7415xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007416 name = "f32_raddstoreexpminusmax_test",
7417 srcs = [
7418 "test/f32-raddstoreexpminusmax.cc",
7419 "test/raddstoreexpminusmax-microkernel-tester.h",
7420 ] + MICROKERNEL_TEST_HDRS,
7421 deps = MICROKERNEL_TEST_DEPS,
7422)
7423
7424xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007425 name = "f32_rmax_test",
7426 srcs = [
7427 "test/f32-rmax.cc",
7428 "test/rmax-microkernel-tester.h",
7429 ] + MICROKERNEL_TEST_HDRS,
7430 deps = MICROKERNEL_TEST_DEPS,
7431)
7432
7433xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007434 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007435 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007436 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007437 "test/spmm-microkernel-tester.h",
7438 "src/xnnpack/AlignedAllocator.h",
7439 ] + MICROKERNEL_TEST_HDRS,
7440 deps = MICROKERNEL_TEST_DEPS,
7441)
7442
7443xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007444 name = "f32_vabs_test",
7445 srcs = [
7446 "test/f32-vabs.cc",
7447 "test/vunary-microkernel-tester.h",
7448 ] + MICROKERNEL_TEST_HDRS,
7449 deps = MICROKERNEL_TEST_DEPS,
7450)
7451
7452xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007453 name = "f32_vadd_test",
7454 srcs = [
7455 "test/f32-vadd.cc",
7456 "test/vbinary-microkernel-tester.h",
7457 ] + MICROKERNEL_TEST_HDRS,
7458 deps = MICROKERNEL_TEST_DEPS,
7459)
7460
7461xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007462 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007463 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007464 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007465 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007466 ] + MICROKERNEL_TEST_HDRS,
7467 deps = MICROKERNEL_TEST_DEPS,
7468)
7469
7470xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007471 name = "f32_vadd_relu_test",
7472 srcs = [
7473 "test/f32-vadd-relu.cc",
7474 "test/vbinary-microkernel-tester.h",
7475 ] + MICROKERNEL_TEST_HDRS,
7476 deps = MICROKERNEL_TEST_DEPS,
7477)
7478
7479xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007480 name = "f32_vaddc_test",
7481 srcs = [
7482 "test/f32-vaddc.cc",
7483 "test/vbinaryc-microkernel-tester.h",
7484 ] + MICROKERNEL_TEST_HDRS,
7485 deps = MICROKERNEL_TEST_DEPS,
7486)
7487
7488xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007489 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007490 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007491 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007492 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007493 ] + MICROKERNEL_TEST_HDRS,
7494 deps = MICROKERNEL_TEST_DEPS,
7495)
7496
7497xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007498 name = "f32_vaddc_relu_test",
7499 srcs = [
7500 "test/f32-vaddc-relu.cc",
7501 "test/vbinaryc-microkernel-tester.h",
7502 ] + MICROKERNEL_TEST_HDRS,
7503 deps = MICROKERNEL_TEST_DEPS,
7504)
7505
7506xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007507 name = "f32_vclamp_test",
7508 srcs = [
7509 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007510 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007511 ] + MICROKERNEL_TEST_HDRS,
7512 deps = MICROKERNEL_TEST_DEPS,
7513)
7514
7515xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007516 name = "f32_vdiv_test",
7517 srcs = [
7518 "test/f32-vdiv.cc",
7519 "test/vbinary-microkernel-tester.h",
7520 ] + MICROKERNEL_TEST_HDRS,
7521 deps = MICROKERNEL_TEST_DEPS,
7522)
7523
7524xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007525 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007526 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007527 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007528 "test/vbinary-microkernel-tester.h",
7529 ] + MICROKERNEL_TEST_HDRS,
7530 deps = MICROKERNEL_TEST_DEPS,
7531)
7532
7533xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007534 name = "f32_vdiv_relu_test",
7535 srcs = [
7536 "test/f32-vdiv-relu.cc",
7537 "test/vbinary-microkernel-tester.h",
7538 ] + MICROKERNEL_TEST_HDRS,
7539 deps = MICROKERNEL_TEST_DEPS,
7540)
7541
7542xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007543 name = "f32_vdivc_test",
7544 srcs = [
7545 "test/f32-vdivc.cc",
7546 "test/vbinaryc-microkernel-tester.h",
7547 ] + MICROKERNEL_TEST_HDRS,
7548 deps = MICROKERNEL_TEST_DEPS,
7549)
7550
7551xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007552 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007553 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007554 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007555 "test/vbinaryc-microkernel-tester.h",
7556 ] + MICROKERNEL_TEST_HDRS,
7557 deps = MICROKERNEL_TEST_DEPS,
7558)
7559
7560xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007561 name = "f32_vdivc_relu_test",
7562 srcs = [
7563 "test/f32-vdivc-relu.cc",
7564 "test/vbinaryc-microkernel-tester.h",
7565 ] + MICROKERNEL_TEST_HDRS,
7566 deps = MICROKERNEL_TEST_DEPS,
7567)
7568
7569xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007570 name = "f32_vrdivc_test",
7571 srcs = [
7572 "test/f32-vrdivc.cc",
7573 "test/vbinaryc-microkernel-tester.h",
7574 ] + MICROKERNEL_TEST_HDRS,
7575 deps = MICROKERNEL_TEST_DEPS,
7576)
7577
7578xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007579 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007580 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007581 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007582 "test/vbinaryc-microkernel-tester.h",
7583 ] + MICROKERNEL_TEST_HDRS,
7584 deps = MICROKERNEL_TEST_DEPS,
7585)
7586
7587xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007588 name = "f32_vrdivc_relu_test",
7589 srcs = [
7590 "test/f32-vrdivc-relu.cc",
7591 "test/vbinaryc-microkernel-tester.h",
7592 ] + MICROKERNEL_TEST_HDRS,
7593 deps = MICROKERNEL_TEST_DEPS,
7594)
7595
7596xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007597 name = "f32_velu_test",
7598 srcs = [
7599 "test/f32-velu.cc",
7600 "test/vunary-microkernel-tester.h",
7601 ] + MICROKERNEL_TEST_HDRS,
7602 deps = MICROKERNEL_TEST_DEPS,
7603)
7604
7605xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007606 name = "f32_vmax_test",
7607 srcs = [
7608 "test/f32-vmax.cc",
7609 "test/vbinary-microkernel-tester.h",
7610 ] + MICROKERNEL_TEST_HDRS,
7611 deps = MICROKERNEL_TEST_DEPS,
7612)
7613
7614xnnpack_unit_test(
7615 name = "f32_vmaxc_test",
7616 srcs = [
7617 "test/f32-vmaxc.cc",
7618 "test/vbinaryc-microkernel-tester.h",
7619 ] + MICROKERNEL_TEST_HDRS,
7620 deps = MICROKERNEL_TEST_DEPS,
7621)
7622
7623xnnpack_unit_test(
7624 name = "f32_vmin_test",
7625 srcs = [
7626 "test/f32-vmin.cc",
7627 "test/vbinary-microkernel-tester.h",
7628 ] + MICROKERNEL_TEST_HDRS,
7629 deps = MICROKERNEL_TEST_DEPS,
7630)
7631
7632xnnpack_unit_test(
7633 name = "f32_vminc_test",
7634 srcs = [
7635 "test/f32-vminc.cc",
7636 "test/vbinaryc-microkernel-tester.h",
7637 ] + MICROKERNEL_TEST_HDRS,
7638 deps = MICROKERNEL_TEST_DEPS,
7639)
7640
7641xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007642 name = "f32_vmul_test",
7643 srcs = [
7644 "test/f32-vmul.cc",
7645 "test/vbinary-microkernel-tester.h",
7646 ] + MICROKERNEL_TEST_HDRS,
7647 deps = MICROKERNEL_TEST_DEPS,
7648)
7649
7650xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007651 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007652 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007653 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007654 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007655 ] + MICROKERNEL_TEST_HDRS,
7656 deps = MICROKERNEL_TEST_DEPS,
7657)
7658
7659xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007660 name = "f32_vmul_relu_test",
7661 srcs = [
7662 "test/f32-vmul-relu.cc",
7663 "test/vbinary-microkernel-tester.h",
7664 ] + MICROKERNEL_TEST_HDRS,
7665 deps = MICROKERNEL_TEST_DEPS,
7666)
7667
7668xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007669 name = "f32_vmulc_test",
7670 srcs = [
7671 "test/f32-vmulc.cc",
7672 "test/vbinaryc-microkernel-tester.h",
7673 ] + MICROKERNEL_TEST_HDRS,
7674 deps = MICROKERNEL_TEST_DEPS,
7675)
7676
7677xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007678 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007679 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007680 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007681 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007682 ] + MICROKERNEL_TEST_HDRS,
7683 deps = MICROKERNEL_TEST_DEPS,
7684)
7685
7686xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007687 name = "f32_vmulc_relu_test",
7688 srcs = [
7689 "test/f32-vmulc-relu.cc",
7690 "test/vbinaryc-microkernel-tester.h",
7691 ] + MICROKERNEL_TEST_HDRS,
7692 deps = MICROKERNEL_TEST_DEPS,
7693)
7694
7695xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007696 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007697 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007698 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007699 "test/vmulcaddc-microkernel-tester.h",
7700 "src/xnnpack/AlignedAllocator.h",
7701 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007702 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007703)
7704
7705xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007706 name = "f32_vlrelu_test",
7707 srcs = [
7708 "test/f32-vlrelu.cc",
7709 "test/vunary-microkernel-tester.h",
7710 ] + MICROKERNEL_TEST_HDRS,
7711 deps = MICROKERNEL_TEST_DEPS,
7712)
7713
7714xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007715 name = "f32_vneg_test",
7716 srcs = [
7717 "test/f32-vneg.cc",
7718 "test/vunary-microkernel-tester.h",
7719 ] + MICROKERNEL_TEST_HDRS,
7720 deps = MICROKERNEL_TEST_DEPS,
7721)
7722
7723xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007724 name = "f32_vrelu_test",
7725 srcs = [
7726 "test/f32-vrelu.cc",
7727 "test/vunary-microkernel-tester.h",
7728 ] + MICROKERNEL_TEST_HDRS,
7729 deps = MICROKERNEL_TEST_DEPS,
7730)
7731
7732xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007733 name = "f32_vrndne_test",
7734 srcs = [
7735 "test/f32-vrndne.cc",
7736 "test/vunary-microkernel-tester.h",
7737 ] + MICROKERNEL_TEST_HDRS,
7738 deps = MICROKERNEL_TEST_DEPS,
7739)
7740
7741xnnpack_unit_test(
7742 name = "f32_vrndz_test",
7743 srcs = [
7744 "test/f32-vrndz.cc",
7745 "test/vunary-microkernel-tester.h",
7746 ] + MICROKERNEL_TEST_HDRS,
7747 deps = MICROKERNEL_TEST_DEPS,
7748)
7749
7750xnnpack_unit_test(
7751 name = "f32_vrndu_test",
7752 srcs = [
7753 "test/f32-vrndu.cc",
7754 "test/vunary-microkernel-tester.h",
7755 ] + MICROKERNEL_TEST_HDRS,
7756 deps = MICROKERNEL_TEST_DEPS,
7757)
7758
7759xnnpack_unit_test(
7760 name = "f32_vrndd_test",
7761 srcs = [
7762 "test/f32-vrndd.cc",
7763 "test/vunary-microkernel-tester.h",
7764 ] + MICROKERNEL_TEST_HDRS,
7765 deps = MICROKERNEL_TEST_DEPS,
7766)
7767
7768xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007769 name = "f32_vscale_test",
7770 srcs = [
7771 "test/f32-vscale.cc",
7772 "test/vscale-microkernel-tester.h",
7773 ] + MICROKERNEL_TEST_HDRS,
7774 deps = MICROKERNEL_TEST_DEPS,
7775)
7776
7777xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007778 name = "f32_vscaleexpminusmax_test",
7779 srcs = [
7780 "test/f32-vscaleexpminusmax.cc",
7781 "test/vscaleexpminusmax-microkernel-tester.h",
7782 ] + MICROKERNEL_TEST_HDRS,
7783 deps = MICROKERNEL_TEST_DEPS,
7784)
7785
7786xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007787 name = "f32_vscaleextexp_test",
7788 srcs = [
7789 "test/f32-vscaleextexp.cc",
7790 "test/vscaleextexp-microkernel-tester.h",
7791 ] + MICROKERNEL_TEST_HDRS,
7792 deps = MICROKERNEL_TEST_DEPS,
7793)
7794
7795xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007796 name = "f32_vsigmoid_test",
7797 srcs = [
7798 "test/f32-vsigmoid.cc",
7799 "test/vunary-microkernel-tester.h",
7800 ] + MICROKERNEL_TEST_HDRS,
7801 deps = MICROKERNEL_TEST_DEPS,
7802)
7803
7804xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007805 name = "f32_vsqr_test",
7806 srcs = [
7807 "test/f32-vsqr.cc",
7808 "test/vunary-microkernel-tester.h",
7809 ] + MICROKERNEL_TEST_HDRS,
7810 deps = MICROKERNEL_TEST_DEPS,
7811)
7812
7813xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007814 name = "f32_vsqrdiff_test",
7815 srcs = [
7816 "test/f32-vsqrdiff.cc",
7817 "test/vbinary-microkernel-tester.h",
7818 ] + MICROKERNEL_TEST_HDRS,
7819 deps = MICROKERNEL_TEST_DEPS,
7820)
7821
7822xnnpack_unit_test(
7823 name = "f32_vsqrdiffc_test",
7824 srcs = [
7825 "test/f32-vsqrdiffc.cc",
7826 "test/vbinaryc-microkernel-tester.h",
7827 ] + MICROKERNEL_TEST_HDRS,
7828 deps = MICROKERNEL_TEST_DEPS,
7829)
7830
7831xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007832 name = "f32_vsqrt_test",
7833 srcs = [
7834 "test/f32-vsqrt.cc",
7835 "test/vunary-microkernel-tester.h",
7836 ] + MICROKERNEL_TEST_HDRS,
7837 deps = MICROKERNEL_TEST_DEPS,
7838)
7839
7840xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007841 name = "f32_vsub_test",
7842 srcs = [
7843 "test/f32-vsub.cc",
7844 "test/vbinary-microkernel-tester.h",
7845 ] + MICROKERNEL_TEST_HDRS,
7846 deps = MICROKERNEL_TEST_DEPS,
7847)
7848
7849xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007850 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007851 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007852 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007853 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007854 ] + MICROKERNEL_TEST_HDRS,
7855 deps = MICROKERNEL_TEST_DEPS,
7856)
7857
7858xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007859 name = "f32_vsub_relu_test",
7860 srcs = [
7861 "test/f32-vsub-relu.cc",
7862 "test/vbinary-microkernel-tester.h",
7863 ] + MICROKERNEL_TEST_HDRS,
7864 deps = MICROKERNEL_TEST_DEPS,
7865)
7866
7867xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007868 name = "f32_vsubc_test",
7869 srcs = [
7870 "test/f32-vsubc.cc",
7871 "test/vbinaryc-microkernel-tester.h",
7872 ] + MICROKERNEL_TEST_HDRS,
7873 deps = MICROKERNEL_TEST_DEPS,
7874)
7875
7876xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007877 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007878 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007879 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007880 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007881 ] + MICROKERNEL_TEST_HDRS,
7882 deps = MICROKERNEL_TEST_DEPS,
7883)
7884
7885xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007886 name = "f32_vsubc_relu_test",
7887 srcs = [
7888 "test/f32-vsubc-relu.cc",
7889 "test/vbinaryc-microkernel-tester.h",
7890 ] + MICROKERNEL_TEST_HDRS,
7891 deps = MICROKERNEL_TEST_DEPS,
7892)
7893
7894xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007895 name = "f32_vrsubc_test",
7896 srcs = [
7897 "test/f32-vrsubc.cc",
7898 "test/vbinaryc-microkernel-tester.h",
7899 ] + MICROKERNEL_TEST_HDRS,
7900 deps = MICROKERNEL_TEST_DEPS,
7901)
7902
7903xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007904 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007905 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007906 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007907 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007908 ] + MICROKERNEL_TEST_HDRS,
7909 deps = MICROKERNEL_TEST_DEPS,
7910)
7911
7912xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007913 name = "f32_vrsubc_relu_test",
7914 srcs = [
7915 "test/f32-vrsubc-relu.cc",
7916 "test/vbinaryc-microkernel-tester.h",
7917 ] + MICROKERNEL_TEST_HDRS,
7918 deps = MICROKERNEL_TEST_DEPS,
7919)
7920
7921xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007922 name = "qc8_dwconv_minmax_fp32_test",
7923 timeout = "moderate",
7924 srcs = [
7925 "test/qc8-dwconv-minmax-fp32.cc",
7926 "test/dwconv-microkernel-tester.h",
7927 "src/xnnpack/AlignedAllocator.h",
7928 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7929 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7930)
7931
7932xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007933 name = "qc8_gemm_minmax_fp32_test",
7934 timeout = "moderate",
7935 srcs = [
7936 "test/qc8-gemm-minmax-fp32.cc",
7937 "test/gemm-microkernel-tester.h",
7938 "src/xnnpack/AlignedAllocator.h",
7939 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7940 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7941)
7942
7943xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007944 name = "qc8_igemm_minmax_fp32_test",
7945 timeout = "moderate",
7946 srcs = [
7947 "test/qc8-igemm-minmax-fp32.cc",
7948 "test/gemm-microkernel-tester.h",
7949 "src/xnnpack/AlignedAllocator.h",
7950 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7951 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7952)
7953
7954xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007955 name = "qs8_dwconv_minmax_fp32_test",
7956 srcs = [
7957 "test/qs8-dwconv-minmax-fp32.cc",
7958 "test/dwconv-microkernel-tester.h",
7959 "src/xnnpack/AlignedAllocator.h",
7960 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7961 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7962)
7963
7964xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007965 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007966 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007967 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007968 "test/dwconv-microkernel-tester.h",
7969 "src/xnnpack/AlignedAllocator.h",
7970 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7971 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7972)
7973
7974xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007975 name = "qs8_dwconv_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007976 srcs = [
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007977 "test/qs8-dwconv-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007978 "test/dwconv-microkernel-tester.h",
7979 "src/xnnpack/AlignedAllocator.h",
7980 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7981 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7982)
7983
7984xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007985 name = "qs8_gavgpool_minmax_test",
7986 srcs = [
7987 "test/qs8-gavgpool-minmax.cc",
7988 "test/gavgpool-microkernel-tester.h",
7989 "src/xnnpack/AlignedAllocator.h",
7990 ] + MICROKERNEL_TEST_HDRS,
7991 deps = MICROKERNEL_TEST_DEPS,
7992)
7993
7994xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07007995 name = "qs8_gemm_minmax_fp32_test",
7996 timeout = "moderate",
7997 srcs = [
7998 "test/qs8-gemm-minmax-fp32.cc",
7999 "test/gemm-microkernel-tester.h",
8000 "src/xnnpack/AlignedAllocator.h",
8001 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8002 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8003)
8004
8005xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008006 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07008007 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07008008 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008009 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07008010 "test/gemm-microkernel-tester.h",
8011 "src/xnnpack/AlignedAllocator.h",
8012 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8013 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8014)
8015
8016xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008017 name = "qs8_gemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008018 timeout = "moderate",
8019 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07008020 "test/qs8-gemm-minmax-rndnu.cc",
8021 "test/gemm-microkernel-tester.h",
8022 "src/xnnpack/AlignedAllocator.h",
8023 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8024 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8025)
8026
8027xnnpack_unit_test(
8028 name = "qs8_igemm_minmax_fp32_test",
8029 timeout = "moderate",
8030 srcs = [
8031 "test/qs8-igemm-minmax-fp32.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008032 "test/gemm-microkernel-tester.h",
8033 "src/xnnpack/AlignedAllocator.h",
8034 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8035 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8036)
8037
8038xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008039 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07008040 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07008041 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008042 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07008043 "test/gemm-microkernel-tester.h",
8044 "src/xnnpack/AlignedAllocator.h",
8045 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8046 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8047)
8048
8049xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008050 name = "qs8_igemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008051 timeout = "moderate",
8052 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07008053 "test/qs8-igemm-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008054 "test/gemm-microkernel-tester.h",
8055 "src/xnnpack/AlignedAllocator.h",
8056 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8057 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8058)
8059
8060xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07008061 name = "qs8_requantization_test",
8062 srcs = [
8063 "src/xnnpack/requantization-stubs.h",
8064 "test/qs8-requantization.cc",
8065 "test/requantization-tester.h",
8066 ] + MICROKERNEL_TEST_HDRS,
8067 deps = MICROKERNEL_TEST_DEPS,
8068)
8069
8070xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07008071 name = "qs8_vadd_minmax_test",
8072 srcs = [
8073 "test/qs8-vadd-minmax.cc",
8074 "test/vadd-microkernel-tester.h",
8075 ] + MICROKERNEL_TEST_HDRS,
8076 deps = MICROKERNEL_TEST_DEPS,
8077)
8078
8079xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07008080 name = "qs8_vaddc_minmax_test",
8081 srcs = [
8082 "test/qs8-vaddc-minmax.cc",
8083 "test/vaddc-microkernel-tester.h",
8084 ] + MICROKERNEL_TEST_HDRS,
8085 deps = MICROKERNEL_TEST_DEPS,
8086)
8087
8088xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008089 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008090 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008091 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008092 "test/avgpool-microkernel-tester.h",
8093 "src/xnnpack/AlignedAllocator.h",
8094 ] + MICROKERNEL_TEST_HDRS,
8095 deps = MICROKERNEL_TEST_DEPS,
8096)
8097
8098xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07008099 name = "qu8_dwconv_minmax_fp32_test",
8100 srcs = [
8101 "test/qu8-dwconv-minmax-fp32.cc",
8102 "test/dwconv-microkernel-tester.h",
8103 "src/xnnpack/AlignedAllocator.h",
8104 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8105 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8106)
8107
8108xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07008109 name = "qu8_igemm_minmax_fp32_test",
8110 srcs = [
8111 "test/qu8-igemm-minmax-fp32.cc",
8112 "test/gemm-microkernel-tester.h",
8113 "src/xnnpack/AlignedAllocator.h",
8114 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8115 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8116)
8117
8118xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008119 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008120 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008121 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07008122 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008123 "src/xnnpack/AlignedAllocator.h",
8124 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008125 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008126)
8127
8128xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008129 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008130 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008131 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008132 "test/gavgpool-microkernel-tester.h",
8133 "src/xnnpack/AlignedAllocator.h",
8134 ] + MICROKERNEL_TEST_HDRS,
8135 deps = MICROKERNEL_TEST_DEPS,
8136)
8137
8138xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07008139 name = "qu8_gemm_minmax_fp32_test",
8140 srcs = [
8141 "test/qu8-gemm-minmax-fp32.cc",
8142 "test/gemm-microkernel-tester.h",
8143 "src/xnnpack/AlignedAllocator.h",
8144 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8145 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8146)
8147
8148xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008149 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008150 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008151 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008152 "test/gemm-microkernel-tester.h",
8153 "src/xnnpack/AlignedAllocator.h",
8154 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008155 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008156)
8157
8158xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07008159 name = "qu8_requantization_test",
8160 srcs = [
8161 "src/xnnpack/requantization-stubs.h",
8162 "test/qu8-requantization.cc",
8163 "test/requantization-tester.h",
8164 ] + MICROKERNEL_TEST_HDRS,
8165 deps = MICROKERNEL_TEST_DEPS,
8166)
8167
8168xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008169 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008170 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008171 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008172 "test/vadd-microkernel-tester.h",
8173 ] + MICROKERNEL_TEST_HDRS,
8174 deps = MICROKERNEL_TEST_DEPS,
8175)
8176
8177xnnpack_unit_test(
Marat Dukhan76e78c82021-07-20 21:11:23 -07008178 name = "qu8_vaddc_minmax_test",
8179 srcs = [
8180 "test/qu8-vaddc-minmax.cc",
8181 "test/vaddc-microkernel-tester.h",
8182 ] + MICROKERNEL_TEST_HDRS,
8183 deps = MICROKERNEL_TEST_DEPS,
8184)
8185
8186xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008187 name = "u8_lut32norm_test",
8188 srcs = [
8189 "test/u8-lut32norm.cc",
8190 "test/lut-norm-microkernel-tester.h",
8191 ] + MICROKERNEL_TEST_HDRS,
8192 deps = MICROKERNEL_TEST_DEPS,
8193)
8194
8195xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07008196 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008197 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07008198 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008199 "test/maxpool-microkernel-tester.h",
8200 ] + MICROKERNEL_TEST_HDRS,
8201 deps = MICROKERNEL_TEST_DEPS,
8202)
8203
8204xnnpack_unit_test(
8205 name = "u8_rmax_test",
8206 srcs = [
8207 "test/u8-rmax.cc",
8208 "test/rmax-microkernel-tester.h",
8209 ] + MICROKERNEL_TEST_HDRS,
8210 deps = MICROKERNEL_TEST_DEPS,
8211)
8212
8213xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07008214 name = "u8_vclamp_test",
8215 srcs = [
8216 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07008217 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07008218 ] + MICROKERNEL_TEST_HDRS,
8219 deps = MICROKERNEL_TEST_DEPS,
8220)
8221
8222xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008223 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08008224 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008225 "test/x32-depthtospace2d-chw2hwc.cc",
8226 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08008227 ] + MICROKERNEL_TEST_HDRS,
8228 deps = MICROKERNEL_TEST_DEPS,
8229)
8230
8231xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07008232 name = "x32_fill_test",
8233 srcs = [
8234 "test/x32-fill.cc",
8235 "test/fill-microkernel-tester.h",
8236 ] + MICROKERNEL_TEST_HDRS,
8237 deps = MICROKERNEL_TEST_DEPS,
8238)
8239
8240xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008241 name = "x32_packx_test",
8242 srcs = [
8243 "test/x32-packx.cc",
8244 "test/pack-microkernel-tester.h",
8245 "src/xnnpack/AlignedAllocator.h",
8246 ] + MICROKERNEL_TEST_HDRS,
8247 deps = MICROKERNEL_TEST_DEPS,
8248)
8249
8250xnnpack_unit_test(
8251 name = "x32_pad_test",
8252 srcs = [
8253 "test/x32-pad.cc",
8254 "test/pad-microkernel-tester.h",
8255 ] + MICROKERNEL_TEST_HDRS,
8256 deps = MICROKERNEL_TEST_DEPS,
8257)
8258
8259xnnpack_unit_test(
8260 name = "x32_unpool_test",
8261 srcs = [
8262 "test/x32-unpool.cc",
8263 "test/unpool-microkernel-tester.h",
8264 ] + MICROKERNEL_TEST_HDRS,
8265 deps = MICROKERNEL_TEST_DEPS,
8266)
8267
8268xnnpack_unit_test(
8269 name = "x32_zip_test",
8270 srcs = [
8271 "test/x32-zip.cc",
8272 "test/zip-microkernel-tester.h",
8273 ] + MICROKERNEL_TEST_HDRS,
8274 deps = MICROKERNEL_TEST_DEPS,
8275)
8276
8277xnnpack_unit_test(
8278 name = "x8_lut_test",
8279 srcs = [
8280 "test/x8-lut.cc",
8281 "test/lut-microkernel-tester.h",
8282 ] + MICROKERNEL_TEST_HDRS,
8283 deps = MICROKERNEL_TEST_DEPS,
8284)
8285
8286xnnpack_unit_test(
8287 name = "x8_zip_test",
8288 srcs = [
8289 "test/x8-zip.cc",
8290 "test/zip-microkernel-tester.h",
8291 ] + MICROKERNEL_TEST_HDRS,
8292 deps = MICROKERNEL_TEST_DEPS,
8293)
8294
Marat Dukhan20c3b922020-03-10 03:45:06 -07008295########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008296
8297xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07008298 name = "operator_size_test",
8299 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008300 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008301)
8302
Marat Dukhan20c3b922020-03-10 03:45:06 -07008303xnnpack_binary(
8304 name = "subgraph_size_test",
8305 srcs = ["test/subgraph-size.c"],
8306 deps = [":XNNPACK"],
8307)
8308
8309########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008310
8311xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008312 name = "abs_nc_test",
8313 srcs = [
8314 "test/abs-nc.cc",
8315 "test/abs-operator-tester.h",
8316 ],
8317 deps = OPERATOR_TEST_DEPS,
8318)
8319
8320xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008321 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008322 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008323 srcs = [
8324 "test/add-nd.cc",
8325 "test/binary-elementwise-operator-tester.h",
8326 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008327 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008328)
8329
8330xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008331 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008332 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008333 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008334 "test/argmax-pooling-operator-tester.h",
8335 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008336 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008337)
8338
8339xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008340 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008341 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008342 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008343 "test/average-pooling-operator-tester.h",
8344 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008345 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008346)
8347
8348xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008349 name = "bankers_rounding_nc_test",
8350 srcs = [
8351 "test/bankers-rounding-nc.cc",
8352 "test/bankers-rounding-operator-tester.h",
8353 ],
8354 deps = OPERATOR_TEST_DEPS,
8355)
8356
8357xnnpack_unit_test(
8358 name = "ceiling_nc_test",
8359 srcs = [
8360 "test/ceiling-nc.cc",
8361 "test/ceiling-operator-tester.h",
8362 ],
8363 deps = OPERATOR_TEST_DEPS,
8364)
8365
8366xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008367 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008368 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008369 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008370 "test/channel-shuffle-operator-tester.h",
8371 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008372 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008373)
8374
8375xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008376 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008377 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008378 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008379 "test/clamp-operator-tester.h",
8380 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008381 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008382)
8383
8384xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008385 name = "constant_pad_nd_test",
8386 srcs = [
8387 "test/constant-pad-nd.cc",
8388 "test/constant-pad-operator-tester.h",
8389 ],
8390 deps = OPERATOR_TEST_DEPS,
8391)
8392
8393xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008394 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008395 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008396 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008397 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008398 "test/convolution-operator-tester.h",
8399 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008400 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008401)
8402
8403xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008404 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008405 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008406 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008407 "test/convolution-nchw.cc",
8408 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008409 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008410 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008411)
8412
8413xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008414 name = "copy_nc_test",
8415 srcs = [
8416 "test/copy-nc.cc",
8417 "test/copy-operator-tester.h",
8418 ],
8419 deps = OPERATOR_TEST_DEPS,
8420)
8421
8422xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008423 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008424 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008425 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008426 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008427 "test/deconvolution-operator-tester.h",
8428 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008429 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008430)
8431
8432xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008433 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008434 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008435 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008436 "test/depth-to-space-operator-tester.h",
8437 ] + OPERATOR_TEST_PARAMS_HDRS,
8438 deps = OPERATOR_TEST_DEPS,
8439)
8440
8441xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008442 name = "depth_to_space_nhwc_test",
8443 srcs = [
8444 "test/depth-to-space-nhwc.cc",
8445 "test/depth-to-space-operator-tester.h",
8446 ] + OPERATOR_TEST_PARAMS_HDRS,
8447 deps = OPERATOR_TEST_DEPS,
8448)
8449
8450xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008451 name = "divide_nd_test",
8452 srcs = [
8453 "test/binary-elementwise-operator-tester.h",
8454 "test/divide-nd.cc",
8455 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008456 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008457)
8458
8459xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008460 name = "elu_nc_test",
8461 srcs = [
8462 "test/elu-nc.cc",
8463 "test/elu-operator-tester.h",
8464 ],
8465 deps = OPERATOR_TEST_DEPS,
8466)
8467
8468xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008469 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008470 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008471 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008472 "test/fully-connected-operator-tester.h",
8473 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008474 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008475)
8476
8477xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008478 name = "floor_nc_test",
8479 srcs = [
8480 "test/floor-nc.cc",
8481 "test/floor-operator-tester.h",
8482 ],
8483 deps = OPERATOR_TEST_DEPS,
8484)
8485
8486xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008487 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008488 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008489 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008490 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008491 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008492 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008493)
8494
8495xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008496 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008497 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008498 "test/global-average-pooling-ncw.cc",
8499 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008500 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008501 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008502)
8503
8504xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008505 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008506 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008507 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008508 "test/hardswish-operator-tester.h",
8509 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008510 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008511)
8512
8513xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008514 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008515 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008516 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008517 "test/leaky-relu-operator-tester.h",
8518 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008519 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008520)
8521
8522xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008523 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008524 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008525 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008526 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008527 "test/max-pooling-operator-tester.h",
8528 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008529 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008530)
8531
8532xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008533 name = "maximum_nd_test",
8534 srcs = [
8535 "test/binary-elementwise-operator-tester.h",
8536 "test/maximum-nd.cc",
8537 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008538 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008539)
8540
8541xnnpack_unit_test(
8542 name = "minimum_nd_test",
8543 srcs = [
8544 "test/binary-elementwise-operator-tester.h",
8545 "test/minimum-nd.cc",
8546 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008547 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008548)
8549
8550xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008551 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008552 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008553 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008554 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008555 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008556 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008557)
8558
8559xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008560 name = "negate_nc_test",
8561 srcs = [
8562 "test/negate-nc.cc",
8563 "test/negate-operator-tester.h",
8564 ],
8565 deps = OPERATOR_TEST_DEPS,
8566)
8567
8568xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008569 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008570 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008571 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008572 "test/prelu-operator-tester.h",
8573 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008574 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008575)
8576
8577xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008578 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008579 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008580 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008581 "test/resize-bilinear-operator-tester.h",
8582 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008583 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008584)
8585
8586xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008587 name = "resize_bilinear_nchw_test",
8588 srcs = [
8589 "test/resize-bilinear-nchw.cc",
8590 "test/resize-bilinear-operator-tester.h",
8591 ] + OPERATOR_TEST_PARAMS_HDRS,
8592 deps = OPERATOR_TEST_DEPS,
8593)
8594
8595xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008596 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008597 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008598 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008599 "test/sigmoid-operator-tester.h",
8600 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008601 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008602)
8603
8604xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008605 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008606 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008607 "test/softmax-nc.cc",
8608 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008609 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008610 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008611)
8612
8613xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008614 name = "square_nc_test",
8615 srcs = [
8616 "test/square-nc.cc",
8617 "test/square-operator-tester.h",
8618 ],
8619 deps = OPERATOR_TEST_DEPS,
8620)
8621
8622xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008623 name = "square_root_nc_test",
8624 srcs = [
8625 "test/square-root-nc.cc",
8626 "test/square-root-operator-tester.h",
8627 ],
8628 deps = OPERATOR_TEST_DEPS,
8629)
8630
8631xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008632 name = "squared_difference_nd_test",
8633 srcs = [
8634 "test/binary-elementwise-operator-tester.h",
8635 "test/squared-difference-nd.cc",
8636 ],
8637 deps = OPERATOR_TEST_DEPS,
8638)
8639
8640xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008641 name = "subtract_nd_test",
8642 srcs = [
8643 "test/binary-elementwise-operator-tester.h",
8644 "test/subtract-nd.cc",
8645 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008646 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008647)
8648
8649xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008650 name = "truncation_nc_test",
8651 srcs = [
8652 "test/truncation-nc.cc",
8653 "test/truncation-operator-tester.h",
8654 ],
8655 deps = OPERATOR_TEST_DEPS,
8656)
8657
8658xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008659 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008660 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008661 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008662 "test/unpooling-operator-tester.h",
8663 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008664 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008665)
8666
Chao Mei6ddfc602020-05-13 22:29:36 -07008667############################### Misc unit tests ###############################
8668
8669xnnpack_unit_test(
8670 name = "memory_planner_test",
8671 srcs = [
8672 "test/memory-planner-test.cc",
8673 ],
8674 deps = [
8675 ":XNNPACK",
8676 ":memory_planner",
8677 ],
8678)
8679
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008680xnnpack_unit_test(
8681 name = "subgraph_nchw_test",
8682 srcs = [
8683 "src/xnnpack/subgraph.h",
8684 "test/subgraph-nchw.cc",
8685 "test/subgraph-tester.h",
8686 ],
8687 deps = [
8688 ":XNNPACK",
8689 ],
8690)
8691
Marat Dukhan08c4a432019-10-03 09:29:21 -07008692############################# Build configurations #############################
8693
Marat Dukhanb8642352019-10-30 15:43:02 -07008694# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008695config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008696 name = "xnn_enable_assembly_explicit_true",
8697 define_values = {"xnn_enable_assembly": "true"},
8698)
8699
8700# Disables usage of assembly kernels.
8701config_setting(
8702 name = "xnn_enable_assembly_explicit_false",
8703 define_values = {"xnn_enable_assembly": "false"},
8704)
8705
Marat Dukhan9de90e02020-06-18 16:04:12 -07008706# Enables usage of sparse inference.
8707config_setting(
8708 name = "xnn_enable_sparse_explicit_true",
8709 define_values = {"xnn_enable_sparse": "true"},
8710)
8711
8712# Disables usage of sparse inference.
8713config_setting(
8714 name = "xnn_enable_sparse_explicit_false",
8715 define_values = {"xnn_enable_sparse": "false"},
8716)
8717
Marat Dukhan05702cf2020-03-26 15:41:33 -07008718# Disables usage of HMP-aware optimizations.
8719config_setting(
8720 name = "xnn_enable_hmp_explicit_false",
8721 define_values = {"xnn_enable_hmp": "false"},
8722)
8723
Chao Mei6ddfc602020-05-13 22:29:36 -07008724# Enable usage of optimized memory allocation
8725config_setting(
8726 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008727 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008728)
8729
8730# Disable usage of optimized memory allocation
8731config_setting(
8732 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008733 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008734)
8735
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008736# Enable QS8 inference in TFLite-specific version
8737config_setting(
8738 name = "xnn_enable_qs8_explicit_true",
8739 define_values = {"xnn_enable_qs8": "true"},
8740)
8741
8742# Disable QS8 inference in TFLite-specific version
8743config_setting(
8744 name = "xnn_enable_qs8_explicit_false",
8745 define_values = {"xnn_enable_qs8": "false"},
8746)
8747
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008748# Enable QU8 inference in TFLite-specific version
8749config_setting(
8750 name = "xnn_enable_qu8_explicit_true",
8751 define_values = {"xnn_enable_qu8": "true"},
8752)
8753
8754# Disable QU8 inference in TFLite-specific version
8755config_setting(
8756 name = "xnn_enable_qu8_explicit_false",
8757 define_values = {"xnn_enable_qu8": "false"},
8758)
8759
Marat Dukhanb8642352019-10-30 15:43:02 -07008760# Builds with -c dbg
8761config_setting(
8762 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008763 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008764 "compilation_mode": "dbg",
8765 },
8766)
8767
8768# Builds with -c opt
8769config_setting(
8770 name = "optimized_build",
8771 values = {
8772 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008773 },
8774)
8775
8776config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008777 name = "linux_k8",
8778 values = {"cpu": "k8"},
8779)
8780
8781config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008782 name = "linux_arm",
8783 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008784)
8785
8786config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008787 name = "linux_armeabi",
8788 values = {"cpu": "armeabi"},
8789)
8790
8791config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008792 name = "linux_armhf",
8793 values = {"cpu": "armhf"},
8794)
8795
8796config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008797 name = "linux_armv7a",
8798 values = {"cpu": "armv7a"},
8799)
8800
8801config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008802 name = "linux_aarch64",
8803 values = {"cpu": "aarch64"},
8804)
8805
8806config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008807 name = "android",
8808 values = {"crosstool_top": "//external:android/crosstool"},
8809)
8810
8811config_setting(
8812 name = "android_armv7",
8813 values = {
8814 "crosstool_top": "//external:android/crosstool",
8815 "cpu": "armeabi-v7a",
8816 },
8817)
8818
8819config_setting(
8820 name = "android_arm64",
8821 values = {
8822 "crosstool_top": "//external:android/crosstool",
8823 "cpu": "arm64-v8a",
8824 },
8825)
8826
8827config_setting(
8828 name = "android_x86",
8829 values = {
8830 "crosstool_top": "//external:android/crosstool",
8831 "cpu": "x86",
8832 },
8833)
8834
8835config_setting(
8836 name = "android_x86_64",
8837 values = {
8838 "crosstool_top": "//external:android/crosstool",
8839 "cpu": "x86_64",
8840 },
8841)
8842
8843config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008844 name = "windows_x86_64",
8845 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008846)
8847
8848config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008849 name = "windows_x86_64_clang",
8850 values = {
8851 "compiler": "clang-cl",
8852 "cpu": "x64_windows",
8853 },
8854)
8855
8856config_setting(
8857 name = "windows_x86_64_mingw",
8858 values = {
8859 "compiler": "mingw-gcc",
8860 "cpu": "x64_windows",
8861 },
8862)
8863
8864config_setting(
8865 name = "windows_x86_64_msys",
8866 values = {
8867 "compiler": "msys-gcc",
8868 "cpu": "x64_windows",
8869 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008870)
8871
8872config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008873 name = "macos_x86_64",
8874 values = {
8875 "apple_platform_type": "macos",
8876 "cpu": "darwin",
8877 },
8878)
8879
8880config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008881 name = "macos_arm64",
8882 values = {
8883 "apple_platform_type": "macos",
8884 "cpu": "darwin_arm64",
8885 },
8886)
8887
8888config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008889 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008890 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008891)
8892
8893config_setting(
8894 name = "emscripten_wasm",
8895 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008896 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008897 "cpu": "wasm",
8898 },
8899)
8900
8901config_setting(
8902 name = "emscripten_wasmsimd",
8903 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008904 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008905 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008906 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008907 },
8908)
8909
8910config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008911 name = "ios_armv7",
8912 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008913 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008914 "cpu": "ios_armv7",
8915 },
8916)
8917
8918config_setting(
8919 name = "ios_arm64",
8920 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008921 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008922 "cpu": "ios_arm64",
8923 },
8924)
8925
8926config_setting(
8927 name = "ios_arm64e",
8928 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008929 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008930 "cpu": "ios_arm64e",
8931 },
8932)
8933
8934config_setting(
8935 name = "ios_x86",
8936 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008937 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008938 "cpu": "ios_i386",
8939 },
8940)
8941
8942config_setting(
8943 name = "ios_x86_64",
8944 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008945 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008946 "cpu": "ios_x86_64",
8947 },
8948)
8949
8950config_setting(
8951 name = "watchos_armv7k",
8952 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008953 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008954 "cpu": "watchos_armv7k",
8955 },
8956)
8957
8958config_setting(
8959 name = "watchos_arm64_32",
8960 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008961 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008962 "cpu": "watchos_arm64_32",
8963 },
8964)
8965
8966config_setting(
8967 name = "watchos_x86",
8968 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008969 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008970 "cpu": "watchos_i386",
8971 },
8972)
8973
8974config_setting(
8975 name = "watchos_x86_64",
8976 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008977 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008978 "cpu": "watchos_x86_64",
8979 },
8980)
8981
8982config_setting(
8983 name = "tvos_arm64",
8984 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008985 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008986 "cpu": "tvos_arm64",
8987 },
8988)
8989
8990config_setting(
8991 name = "tvos_x86_64",
8992 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008993 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008994 "cpu": "tvos_x86_64",
8995 },
8996)