blob: 98d04d30d0755c9cb2a836d796e4437c8ff9bbbc [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700252 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
474 "src/math/expm1minus-scalar-rr2-p5.c",
475 "src/math/expm1minus-scalar-rr2-p6.c",
Frank Barchard22136062020-11-24 18:44:46 -0800476 "src/math/expminus-scalar-rr2-lut64-p2.c",
477 "src/math/expminus-scalar-rr2-lut2048-p1.c",
478 "src/math/expminus-scalar-rr2-p5.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
483 "src/math/roundne-scalar-nearbyint.c",
484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
489 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700494 "src/params-init.c",
Marat Dukhan57547062021-06-30 16:53:29 -0700495 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
496 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
497 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
498 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
499 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
500 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
501 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
502 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
503 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
504 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
505 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
506 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhand6021542021-06-30 09:04:20 -0700507 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
508 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
509 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
510 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
511 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
512 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
513 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
514 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
515 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
516 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
517 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
518 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
519 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
520 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
521 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
522 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
523 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
524 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
525 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
526 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
528 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
530 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
531 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
532 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
541 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700542 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
543 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700545 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
546 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
552 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
553 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700554 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
555 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
556 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700557 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
558 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
559 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
560 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
561 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
562 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700563 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
564 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700565 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700566 "src/qs8-gemm/gen/1x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700567 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
568 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700569 "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700570 "src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700571 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
572 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700573 "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700574 "src/qs8-gemm/gen/2x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700575 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
576 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700577 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700578 "src/qs8-gemm/gen/2x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700579 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
580 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700581 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700582 "src/qs8-gemm/gen/3x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700583 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
584 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700585 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700586 "src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700587 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
588 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700589 "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700590 "src/qs8-gemm/gen/4x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700591 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
592 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700593 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700594 "src/qs8-gemm/gen/4x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700595 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
596 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700597 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700598 "src/qs8-igemm/gen/1x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700599 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
600 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700601 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700602 "src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700603 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
604 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700605 "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700606 "src/qs8-igemm/gen/2x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700607 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
608 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700609 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700610 "src/qs8-igemm/gen/2x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700611 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
612 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700613 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700614 "src/qs8-igemm/gen/3x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700615 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
616 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700617 "src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700618 "src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700619 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
620 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700621 "src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700622 "src/qs8-igemm/gen/4x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700623 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
624 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700625 "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700626 "src/qs8-igemm/gen/4x4-minmax-rndnu-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700627 "src/qs8-requantization/fp32-scalar-lrintf.c",
628 "src/qs8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700629 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700630 "src/qs8-requantization/rndna-scalar-signed64.c",
631 "src/qs8-requantization/rndna-scalar-unsigned32.c",
632 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan062bee32021-05-27 20:31:07 -0700633 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700634 "src/qs8-vadd/gen/minmax-scalar-x1.c",
635 "src/qs8-vadd/gen/minmax-scalar-x2.c",
636 "src/qs8-vadd/gen/minmax-scalar-x4.c",
637 "src/qs8-vaddc/gen/minmax-scalar-x1.c",
638 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
639 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700640 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
641 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1f714282021-07-15 15:41:32 -0700642 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
643 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
644 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
645 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
646 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
647 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
648 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
649 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
650 "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
651 "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
652 "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
653 "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700654 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
655 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan927d4742021-07-15 13:42:49 -0700656 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
657 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
658 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
659 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
660 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
661 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
662 "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
663 "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
664 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
665 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
666 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
667 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
668 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
669 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
670 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
671 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan927d4742021-07-15 13:42:49 -0700672 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
673 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
674 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
675 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
676 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
677 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
678 "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
679 "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
680 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
681 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
682 "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
683 "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
684 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
685 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
686 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
687 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700688 "src/qu8-requantization/fp32-scalar-lrintf.c",
689 "src/qu8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700690 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700691 "src/qu8-requantization/rndna-scalar-signed64.c",
692 "src/qu8-requantization/rndna-scalar-unsigned32.c",
693 "src/qu8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -0700694 "src/qu8-vadd/gen/minmax-scalar-x1.c",
695 "src/qu8-vadd/gen/minmax-scalar-x2.c",
696 "src/qu8-vadd/gen/minmax-scalar-x4.c",
697 "src/qu8-vaddc/gen/minmax-scalar-x1.c",
698 "src/qu8-vaddc/gen/minmax-scalar-x2.c",
699 "src/qu8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700700 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700701 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700702 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700703 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700704 "src/x8-lut/scalar.c",
705 "src/x8-zip/x2-scalar.c",
706 "src/x8-zip/x3-scalar.c",
707 "src/x8-zip/x4-scalar.c",
708 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800709 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700710 "src/x32-fill/scalar-float.c",
711 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700712 "src/x32-packx/x2-scalar.c",
713 "src/x32-packx/x3-scalar.c",
714 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700715 "src/x32-pad/scalar-float.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700716 "src/x32-pad/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700717 "src/x32-unpool/scalar.c",
718 "src/x32-zip/x2-scalar.c",
719 "src/x32-zip/x3-scalar.c",
720 "src/x32-zip/x4-scalar.c",
721 "src/x32-zip/xm-scalar.c",
Marat Dukhan048931b2020-11-24 20:53:54 -0800722 "src/xx-copy/memcpy.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700723]
724
Marat Dukhan436ebe62019-12-04 15:10:12 -0800725WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700726 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
727 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700728 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
729 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700730 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
731 "src/f32-dwconv/gen/up1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700732 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
733 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700734 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
735 "src/f32-dwconv/gen/up1x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700736 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
737 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700738 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
739 "src/f32-dwconv/gen/up1x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700740 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
741 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700742 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
743 "src/f32-dwconv/gen/up2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700744 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
745 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700746 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
747 "src/f32-dwconv/gen/up2x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700748 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
749 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700750 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
751 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700752 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
753 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700754 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
755 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
756 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
757 "src/f32-gemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700758 "src/f32-gemm/gen/1x4-relu-wasm.c",
759 "src/f32-gemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700760 "src/f32-gemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700761 "src/f32-gemm/gen/2x4-relu-wasm.c",
762 "src/f32-gemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700763 "src/f32-gemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700764 "src/f32-gemm/gen/4x2-relu-wasm.c",
765 "src/f32-gemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700766 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700767 "src/f32-gemm/gen/4x4-relu-wasm.c",
768 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700769 "src/f32-igemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700770 "src/f32-igemm/gen/1x4-relu-wasm.c",
771 "src/f32-igemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700772 "src/f32-igemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700773 "src/f32-igemm/gen/2x4-relu-wasm.c",
774 "src/f32-igemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700775 "src/f32-igemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700776 "src/f32-igemm/gen/4x2-relu-wasm.c",
777 "src/f32-igemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700778 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700779 "src/f32-igemm/gen/4x4-relu-wasm.c",
780 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700781 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
782 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
783 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700784 "src/f32-prelu/gen/wasm-2x1.c",
785 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700786 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
787 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
788 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700789 "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700790 "src/f32-vbinary/gen/vadd-relu-wasm-x1.c",
791 "src/f32-vbinary/gen/vadd-relu-wasm-x2.c",
792 "src/f32-vbinary/gen/vadd-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700793 "src/f32-vbinary/gen/vadd-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700794 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
795 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
796 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
797 "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700798 "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c",
799 "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c",
800 "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700801 "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700802 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
803 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
804 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
805 "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700806 "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c",
807 "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c",
808 "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700809 "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700810 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
811 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
812 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
813 "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700814 "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c",
815 "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c",
816 "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700817 "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800818 "src/f32-vbinary/gen/vmax-wasm-x1.c",
819 "src/f32-vbinary/gen/vmax-wasm-x2.c",
820 "src/f32-vbinary/gen/vmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700821 "src/f32-vbinary/gen/vmax-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800822 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
823 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
824 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700825 "src/f32-vbinary/gen/vmaxc-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800826 "src/f32-vbinary/gen/vmin-wasm-x1.c",
827 "src/f32-vbinary/gen/vmin-wasm-x2.c",
828 "src/f32-vbinary/gen/vmin-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700829 "src/f32-vbinary/gen/vmin-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800830 "src/f32-vbinary/gen/vminc-wasm-x1.c",
831 "src/f32-vbinary/gen/vminc-wasm-x2.c",
832 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700833 "src/f32-vbinary/gen/vminc-wasm-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700834 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
835 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
836 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700837 "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700838 "src/f32-vbinary/gen/vmul-relu-wasm-x1.c",
839 "src/f32-vbinary/gen/vmul-relu-wasm-x2.c",
840 "src/f32-vbinary/gen/vmul-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700841 "src/f32-vbinary/gen/vmul-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700842 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
843 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
844 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
845 "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700846 "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c",
847 "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c",
848 "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700849 "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700850 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
851 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
852 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
853 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700854 "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c",
855 "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c",
856 "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700857 "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700858 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
859 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
860 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
861 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700862 "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c",
863 "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c",
864 "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700865 "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700866 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
867 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
868 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
869 "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700870 "src/f32-vbinary/gen/vsub-relu-wasm-x1.c",
871 "src/f32-vbinary/gen/vsub-relu-wasm-x2.c",
872 "src/f32-vbinary/gen/vsub-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700873 "src/f32-vbinary/gen/vsub-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700874 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
875 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
876 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
877 "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700878 "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c",
879 "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c",
880 "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700881 "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700882 "src/f32-vclamp/gen/vclamp-wasm-x1.c",
883 "src/f32-vclamp/gen/vclamp-wasm-x2.c",
884 "src/f32-vclamp/gen/vclamp-wasm-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800885 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c",
886 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c",
887 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c",
888 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c",
889 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c",
890 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c",
891 "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c",
892 "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c",
893 "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c",
894 "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c",
895 "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c",
896 "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700897 "src/f32-vhswish/gen/vhswish-wasm-x1.c",
898 "src/f32-vhswish/gen/vhswish-wasm-x2.c",
899 "src/f32-vhswish/gen/vhswish-wasm-x4.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700900 "src/f32-vlrelu/gen/vlrelu-wasm-x1.c",
901 "src/f32-vlrelu/gen/vlrelu-wasm-x2.c",
902 "src/f32-vlrelu/gen/vlrelu-wasm-x4.c",
Frank Barchardd4416d62021-05-17 15:51:37 -0700903 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
904 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
905 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700906 "src/f32-vrelu/gen/vrelu-wasm-x1.c",
907 "src/f32-vrelu/gen/vrelu-wasm-x2.c",
908 "src/f32-vrelu/gen/vrelu-wasm-x4.c",
909 "src/f32-vrelu/gen/vrelu-wasm-x8.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800910]
911
Marat Dukhan290055c2020-06-09 12:24:29 -0700912WASMSIMD_UKERNELS = [
Marat Dukhan40f05522020-07-16 22:33:12 -0700913 "src/f32-argmaxpool/4x-wasmsimd-c4.c",
914 "src/f32-argmaxpool/9p8x-wasmsimd-c4.c",
915 "src/f32-argmaxpool/9x-wasmsimd-c4.c",
Marat Dukhan3b7432d2020-07-16 17:46:32 -0700916 "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c",
917 "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c",
918 "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c",
919 "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard22136062020-11-24 18:44:46 -0800920 "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800921 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700922 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800923 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700924 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700925 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800926 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700927 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800928 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700929 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700930 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800931 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700932 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800933 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700934 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
935 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800936 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700937 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800938 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700939 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700940 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800941 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700942 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800943 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700944 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700945 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800946 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700947 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800948 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700949 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
950 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800951 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
952 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
953 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
954 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
955 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
956 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
957 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
958 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
959 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c",
960 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800961 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
962 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
963 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
964 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c",
965 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
966 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c",
967 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c",
968 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c",
969 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c",
970 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800971 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
972 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
973 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
974 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
975 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
976 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
977 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
978 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
979 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c",
980 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800981 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
982 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
983 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
984 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c",
985 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
986 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c",
987 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c",
988 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c",
989 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c",
990 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c",
Frank Barchardc5704bf2020-12-21 23:09:00 -0800991 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
992 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
993 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
994 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
995 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
996 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
997 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
998 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800999 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1000 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1001 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1002 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c",
1003 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1004 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c",
1005 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c",
1006 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c",
Frank Barchardcadd4222021-01-20 16:27:25 -08001007 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1008 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1009 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1010 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
1011 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1012 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
1013 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
1014 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001015 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1016 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1017 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1018 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c",
1019 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1020 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c",
1021 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c",
1022 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -08001023 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1024 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1025 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1026 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1027 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1028 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1029 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1030 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1031 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1032 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
1033 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c",
1034 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c",
1035 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001036 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1037 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1038 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1039 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1040 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c",
1041 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1042 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1043 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c",
1044 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1045 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c",
1046 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c",
1047 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c",
1048 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -08001049 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1050 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1051 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1052 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1053 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1054 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1055 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1056 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1057 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1058 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
1059 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c",
1060 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c",
1061 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001062 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1063 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1064 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1065 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1066 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c",
1067 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1068 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1069 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c",
1070 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1071 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c",
1072 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c",
1073 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c",
1074 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001075 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1076 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1077 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1078 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1079 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1080 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1081 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1082 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1083 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1084 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001085 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1086 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1087 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1088 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1089 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c",
1090 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1091 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1092 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c",
1093 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1094 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001095 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1096 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1097 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1098 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1099 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1100 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1101 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1102 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1103 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1104 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001105 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1106 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1107 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1108 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1109 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c",
1110 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1111 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1112 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c",
1113 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1114 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001115 "src/f32-gavgpool-cw/wasmsimd-arm-x4.c",
1116 "src/f32-gavgpool-cw/wasmsimd-x86-x4.c",
Marat Dukhanc6016802020-07-16 18:51:28 -07001117 "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c",
1118 "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c",
1119 "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c",
1120 "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001121 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c",
1122 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c",
1123 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c",
1124 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001125 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
1126 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001127 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c",
1128 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c",
1129 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c",
1130 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001131 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
1132 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001133 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c",
1134 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c",
1135 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c",
1136 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001137 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
1138 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001139 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c",
1140 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c",
1141 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c",
1142 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001143 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
1144 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001145 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c",
1146 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c",
1147 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c",
1148 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001149 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
1150 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001151 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1152 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1153 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1154 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001155 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c",
1156 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
1157 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1158 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001159 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1160 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1161 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1162 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001163 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1164 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1165 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1166 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1167 "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c",
1168 "src/f32-gemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001169 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1170 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1171 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1172 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001173 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c",
1174 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
1175 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1176 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001177 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1178 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1179 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1180 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001181 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c",
1182 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
1183 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1184 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001185 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1186 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1187 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1188 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001189 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1190 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
XNNPACK Team965272b2020-10-23 21:10:15 -07001191 "src/f32-ibilinear-chw/gen/wasmsimd-p4.c",
1192 "src/f32-ibilinear-chw/gen/wasmsimd-p8.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001193 "src/f32-ibilinear/gen/wasmsimd-c4.c",
1194 "src/f32-ibilinear/gen/wasmsimd-c8.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001195 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1196 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1197 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1198 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001199 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c",
1200 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
1201 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1202 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001203 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1204 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1205 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1206 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001207 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1208 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1209 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1210 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1211 "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c",
1212 "src/f32-igemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001213 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1214 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1215 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1216 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001217 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c",
1218 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
1219 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1220 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001221 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1222 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1223 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1224 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001225 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c",
1226 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
1227 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1228 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001229 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1230 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1231 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1232 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001233 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1234 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhanf6e24802020-07-08 22:20:40 -07001235 "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c",
1236 "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c",
Marat Dukhan1483c532020-07-16 18:08:19 -07001237 "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c",
1238 "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c",
1239 "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c",
1240 "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001241 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1242 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001243 "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c",
1244 "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c",
1245 "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001246 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
1247 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001248 "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c",
1249 "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c",
1250 "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c",
1251 "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c",
1252 "src/f32-prelu/gen/wasmsimd-minmax-1x4.c",
1253 "src/f32-prelu/gen/wasmsimd-minmax-1x8.c",
1254 "src/f32-prelu/gen/wasmsimd-minmax-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001255 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
1256 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001257 "src/f32-prelu/gen/wasmsimd-minmax-2x16.c",
1258 "src/f32-prelu/gen/wasmsimd-minmax-4x4.c",
1259 "src/f32-prelu/gen/wasmsimd-minmax-4x8.c",
1260 "src/f32-prelu/gen/wasmsimd-minmax-4x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001261 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001262 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001263 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001264 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c",
1265 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001266 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001267 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c",
1268 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001269 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001270 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c",
1271 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001272 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c",
Marat Dukhan8c417962020-07-08 12:27:50 -07001273 "src/f32-rmax/wasmsimd-arm.c",
1274 "src/f32-rmax/wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001275 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c",
1276 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001277 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c",
1278 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001279 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001280 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c",
1281 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001282 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c",
1283 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001284 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001285 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c",
1286 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001287 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c",
1288 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001289 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001290 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c",
1291 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001292 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c",
1293 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001294 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001295 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c",
1296 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001297 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c",
1298 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001299 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001300 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c",
1301 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001302 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c",
1303 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001304 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001305 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c",
1306 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001307 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c",
1308 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001309 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001310 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c",
1311 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001312 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c",
1313 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001314 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001315 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
1316 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001317 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001318 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
1319 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001320 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001321 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c",
1322 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001323 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001324 "src/f32-vbinary/gen/vadd-wasmsimd-x4.c",
1325 "src/f32-vbinary/gen/vadd-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001326 "src/f32-vbinary/gen/vadd-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001327 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
1328 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001329 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001330 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
1331 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001332 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001333 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c",
1334 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001335 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001336 "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c",
1337 "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001338 "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001339 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
1340 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001341 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001342 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
1343 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001344 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001345 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c",
1346 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001347 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001348 "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c",
1349 "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001350 "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001351 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
1352 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001353 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001354 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
1355 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001356 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001357 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c",
1358 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001359 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001360 "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c",
1361 "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001362 "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001363 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
1364 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001365 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001366 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
1367 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001368 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001369 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
1370 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001371 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001372 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
1373 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001374 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001375 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
1376 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001377 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001378 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
1379 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001380 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001381 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
1382 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001383 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001384 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
1385 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001386 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001387 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
1388 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001389 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001390 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
1391 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001392 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001393 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c",
1394 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001395 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001396 "src/f32-vbinary/gen/vmul-wasmsimd-x4.c",
1397 "src/f32-vbinary/gen/vmul-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001398 "src/f32-vbinary/gen/vmul-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001399 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
1400 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001401 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001402 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
1403 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001404 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001405 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c",
1406 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001407 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001408 "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c",
1409 "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001410 "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001411 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
1412 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001413 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001414 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
1415 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001416 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001417 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c",
1418 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001419 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001420 "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c",
1421 "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001422 "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001423 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
1424 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001425 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001426 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
1427 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001428 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001429 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c",
1430 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001431 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001432 "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c",
1433 "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001434 "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001435 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
1436 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001437 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001438 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
1439 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001440 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001441 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
1442 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001443 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001444 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
1445 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001446 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001447 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c",
1448 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001449 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001450 "src/f32-vbinary/gen/vsub-wasmsimd-x4.c",
1451 "src/f32-vbinary/gen/vsub-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001452 "src/f32-vbinary/gen/vsub-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001453 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
1454 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001455 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001456 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
1457 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001458 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001459 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c",
1460 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001461 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001462 "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c",
1463 "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001464 "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001465 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
1466 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c",
1467 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c",
1468 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001469 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
1470 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c",
1471 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c",
1472 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c",
1473 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c",
1474 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001475 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c",
1476 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c",
1477 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c",
1478 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c",
1479 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c",
1480 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08001481 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c",
1482 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c",
1483 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c",
1484 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c",
1485 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c",
1486 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001487 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c",
1488 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c",
1489 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c",
1490 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c",
1491 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c",
1492 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001493 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1494 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1495 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001496 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1497 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1498 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1499 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001500 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001501 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001502 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001503 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001504 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1505 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1506 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001507 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1508 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1509 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1510 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001511 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1512 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
1513 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1514 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1515 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1516 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
1517 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1518 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1519 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1520 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001521 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1522 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1523 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1524 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1525 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1526 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1527 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1528 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1529 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1530 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1531 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1532 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001533 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1534 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001535 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1536 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1537 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1538 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1539 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1540 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001541 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1542 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1543 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1544 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001545 "src/math/roundd-wasmsimd-addsub.c",
1546 "src/math/roundd-wasmsimd-cvt.c",
1547 "src/math/roundne-wasmsimd-addsub.c",
1548 "src/math/roundu-wasmsimd-addsub.c",
1549 "src/math/roundu-wasmsimd-cvt.c",
1550 "src/math/roundz-wasmsimd-addsub.c",
1551 "src/math/roundz-wasmsimd-cvt.c",
1552 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1553 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhan313eef72021-06-30 16:11:31 -07001554 "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001555 "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1556 "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1557 "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1558 "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1559 "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001560 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001561 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001562 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001563 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001564 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001565 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001566 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001567 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001568 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001569 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001570 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001571 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan69aa6232021-06-30 14:17:26 -07001572 "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1573 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001574 "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1575 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c",
1576 "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1577 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
1578 "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1579 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c",
1580 "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1581 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
1582 "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
1583 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07001584 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
1585 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
1586 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001587 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
1588 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
1589 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001590 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001591 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001592 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001593 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001594 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001595 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001596 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001597 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001598 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001599 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001600 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001601 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001602 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001603 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001604 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001605 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001606 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001607 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001608 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001609 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001610 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001611 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001612 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001613 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001614 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001615 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001616 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001617 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001618 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001619 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1620 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
1621 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
1622 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1623 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1624 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1625 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1626 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhanf6011352021-07-15 15:11:14 -07001627 "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1628 "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1629 "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1630 "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1631 "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1632 "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan43bee052021-07-14 20:57:18 -07001633 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
1634 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
1635 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
1636 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
1637 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
1638 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
1639 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
1640 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
1641 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
1642 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
1643 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
1644 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001645 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001646 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07001647 "src/qu8-vadd/gen/minmax-wasmsimd-x8.c",
1648 "src/qu8-vadd/gen/minmax-wasmsimd-x16.c",
1649 "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c",
1650 "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001651 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001652 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001653 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001654 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001655 "src/x32-zip/x2-wasmsimd.c",
1656 "src/x32-zip/x3-wasmsimd.c",
1657 "src/x32-zip/x4-wasmsimd.c",
1658 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001659]
1660
Marat Dukhan08c4a432019-10-03 09:29:21 -07001661# ISA-specific micro-kernels
1662NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001663 "src/f32-argmaxpool/4x-neon-c4.c",
1664 "src/f32-argmaxpool/9p8x-neon-c4.c",
1665 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001666 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1667 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001668 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001669 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001670 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001671 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001672 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001673 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001674 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001675 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001676 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001677 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001679 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001680 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001681 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001682 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1683 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1684 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1685 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1686 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001687 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001688 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001689 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1690 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1691 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001692 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001693 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001694 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1695 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1696 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1697 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1698 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001699 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1700 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1701 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001702 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001703 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001704 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1705 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1706 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001707 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1708 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1709 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1710 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001711 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001712 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1713 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001714 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001715 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001716 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001717 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001718 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1719 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001720 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1721 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1722 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1723 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1724 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1725 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1726 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1727 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001728 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001729 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001730 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001731 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1732 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001733 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001734 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1735 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001736 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001737 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1738 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1739 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1740 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1741 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001742 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1743 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001744 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1745 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001746 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1747 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001748 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1749 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1750 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1751 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1752 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1753 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1754 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1755 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1756 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1757 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1758 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1759 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1760 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1761 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1762 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1763 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001764 "src/f32-ibilinear-chw/gen/neon-p4.c",
1765 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001766 "src/f32-ibilinear/gen/neon-c4.c",
1767 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001768 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001769 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001770 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001771 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1772 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001773 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001774 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1775 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1776 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1777 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001778 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1779 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001780 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1781 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001782 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1783 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001784 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1785 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1786 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001787 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1788 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001789 "src/f32-prelu/gen/neon-1x4.c",
1790 "src/f32-prelu/gen/neon-1x8.c",
1791 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001792 "src/f32-prelu/gen/neon-2x4.c",
1793 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001794 "src/f32-prelu/gen/neon-2x16.c",
1795 "src/f32-prelu/gen/neon-4x4.c",
1796 "src/f32-prelu/gen/neon-4x8.c",
1797 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001798 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001799 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001800 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001801 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1802 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001803 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001804 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1805 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001806 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001807 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1808 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001809 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1810 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1811 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1812 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1813 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1814 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1815 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1816 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1817 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1818 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1819 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1820 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1821 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001822 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001823 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1824 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1825 "src/f32-spmm/gen/4x1-minmax-neon.c",
1826 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1827 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1828 "src/f32-spmm/gen/8x1-minmax-neon.c",
1829 "src/f32-spmm/gen/12x1-minmax-neon.c",
1830 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1831 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1832 "src/f32-spmm/gen/16x1-minmax-neon.c",
1833 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1834 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1835 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001836 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1837 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1838 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1839 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001840 "src/f32-vbinary/gen/vmax-neon-x4.c",
1841 "src/f32-vbinary/gen/vmax-neon-x8.c",
1842 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1843 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1844 "src/f32-vbinary/gen/vmin-neon-x4.c",
1845 "src/f32-vbinary/gen/vmin-neon-x8.c",
1846 "src/f32-vbinary/gen/vminc-neon-x4.c",
1847 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001848 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1849 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1850 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1851 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1852 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1853 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001854 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1855 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1856 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1857 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001858 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1859 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1860 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1861 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001862 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1863 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001864 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1865 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1866 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1867 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1868 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1869 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1870 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1871 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1872 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1873 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1874 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1875 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001876 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1877 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1878 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001879 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1880 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001881 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1882 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001883 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1884 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001885 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1886 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001887 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1888 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1889 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1890 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1891 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1892 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001893 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1894 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1895 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1896 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1897 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1898 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1899 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1900 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1901 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1902 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1903 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1904 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1905 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1906 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1907 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1908 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1909 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1910 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001911 "src/f32-vunary/gen/vabs-neon-x4.c",
1912 "src/f32-vunary/gen/vabs-neon-x8.c",
1913 "src/f32-vunary/gen/vneg-neon-x4.c",
1914 "src/f32-vunary/gen/vneg-neon-x8.c",
1915 "src/f32-vunary/gen/vsqr-neon-x4.c",
1916 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001917 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1918 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001919 "src/math/roundd-neon-addsub.c",
1920 "src/math/roundd-neon-cvt.c",
1921 "src/math/roundne-neon-addsub.c",
1922 "src/math/roundu-neon-addsub.c",
1923 "src/math/roundu-neon-cvt.c",
1924 "src/math/roundz-neon-addsub.c",
1925 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001926 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1927 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1928 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1929 "src/math/sqrt-neon-nr1rsqrts.c",
1930 "src/math/sqrt-neon-nr2rsqrts.c",
1931 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001932 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c",
1933 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001934 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001935 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c",
1936 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001937 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001938 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c",
1939 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c",
1940 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c",
1941 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001942 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001943 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c",
1944 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c",
1945 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c",
1946 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001947 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1948 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1949 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1950 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1951 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001952 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001953 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1954 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001955 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001956 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1957 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001958 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001959 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1960 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001961 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001962 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1963 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001964 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001965 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001966 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c",
1967 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001968 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001969 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001970 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001971 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c",
1972 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001973 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001974 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001975 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001976 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c",
1977 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c",
1978 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c",
1979 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001980 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001981 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001982 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001983 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c",
1984 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c",
1985 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c",
1986 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001987 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001988 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001989 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001990 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001991 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001992 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001993 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001994 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001995 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001996 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1997 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1998 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1999 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002000 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
2001 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
2002 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
2003 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002004 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2005 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2006 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002007 "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002008 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002009 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2010 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002011 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07002012 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002013 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002014 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002015 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002016 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002017 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002018 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2019 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2020 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002021 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002022 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2023 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002024 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2025 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2026 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2027 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2028 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2029 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2030 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2031 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002032 "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002033 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002034 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2035 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002036 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07002037 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002038 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002039 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002040 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002041 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2042 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2043 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2044 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002045 "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002046 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2047 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2048 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2049 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2050 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2051 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2052 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2053 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002054 "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002055 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2056 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2057 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2058 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2059 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2060 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2061 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2062 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002063 "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002064 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2065 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2066 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2067 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2068 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2069 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2070 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2071 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002072 "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002073 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2074 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2075 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2076 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2077 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002078 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002079 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2080 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2081 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002082 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002083 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2084 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002085 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2086 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2087 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2088 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2089 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2090 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2091 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2092 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2093 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
2094 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2095 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2096 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002097 "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002098 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002099 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2100 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002101 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002102 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002103 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002104 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002105 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002106 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002107 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002108 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2109 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2110 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002111 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002112 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2113 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002114 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2115 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2116 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2117 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2118 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2119 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2120 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2121 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002122 "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002123 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002124 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2125 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002126 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002127 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002128 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002129 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002130 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002131 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2132 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2133 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2134 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002135 "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002136 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2137 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2138 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2139 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2140 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2141 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2142 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2143 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002144 "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002145 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2146 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2147 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2148 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2149 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2150 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2151 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2152 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002153 "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002154 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2155 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2156 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2157 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2158 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2159 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2160 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2161 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002162 "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002163 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2164 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2165 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2166 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2167 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002168 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002169 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2170 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2171 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002172 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002173 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2174 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002175 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2176 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2177 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2178 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2179 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2180 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2181 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2182 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2183 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002184 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002185 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002186 "src/qs8-requantization/rndna-neon.c",
Marat Dukhand3d818c2021-07-16 17:56:54 -07002187 "src/qs8-requantization/rndnu-neon-mull.c",
2188 "src/qs8-requantization/rndnu-neon-qdmulh.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002189 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2190 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2191 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2192 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2193 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2194 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2195 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2196 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002197 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2198 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002199 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
2200 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
2201 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
2202 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
2203 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
2204 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
2205 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
2206 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002207 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2208 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002209 "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2210 "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002211 "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
2212 "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002213 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002214 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002215 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07002216 "src/qu8-vadd/gen/minmax-neon-ld64-x8.c",
2217 "src/qu8-vadd/gen/minmax-neon-ld64-x16.c",
2218 "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c",
2219 "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002220 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002221 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002222 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002223 "src/x8-zip/x2-neon.c",
2224 "src/x8-zip/x3-neon.c",
2225 "src/x8-zip/x4-neon.c",
2226 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002227 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002228 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002229 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002230 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002231 "src/x32-zip/x2-neon.c",
2232 "src/x32-zip/x3-neon.c",
2233 "src/x32-zip/x4-neon.c",
2234 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002235]
2236
2237NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002238 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2239 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2240 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2241 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2242 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2243 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2244 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2245 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2246 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2247 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2248 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2249 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2250 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2251 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2252 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2253 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2254 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2255 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2256 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2257 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2258 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2259 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2260 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2261 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2262 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2263 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2264 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2265 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2266 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2267 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002268 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2269 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002270 "src/f32-ibilinear/gen/neonfma-c4.c",
2271 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002272 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002273 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002274 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002275 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2276 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002277 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2278 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002279 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2280 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002281 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2282 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002283 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002284 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002285 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002286 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2287 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002288 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002289 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2290 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002291 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002292 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2293 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002294 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2295 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2296 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2297 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2298 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2299 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2300 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2301 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2302 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2303 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2304 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2305 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2306 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002307 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2308 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2309 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2310 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2311 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2312 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2313 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2314 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2315 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2316 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2317 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2318 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2319 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002320 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2321 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2322 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2323 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2324 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2325 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2326 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2327 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2328 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2329 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2330 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2331 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002332 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2333 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002334 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2335 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2336 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2337 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2338 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2339 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2340 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2341 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2342 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2343 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2344 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2345 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2346 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2347 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2348 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2349 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2350 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2351 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2352 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2353 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2354 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2355 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2356 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2357 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2358 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2359 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2360 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2361 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2362 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2363 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2364 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2365 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2366 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2367 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2368 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2369 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2370 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2371 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2372 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2373 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2374 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2375 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2376 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2377 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2378 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2379 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2380 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2381 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2382 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2383 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2384 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2385 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2386 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2387 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002388 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2389 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2390 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2391 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2392 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2393 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2394 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2395 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2396 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2397 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2398 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2399 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2400 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2401 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2402 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2403 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2404 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2405 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2406 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2407 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002408 "src/math/exp-neonfma-rr2-lut64-p2.c",
2409 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002410 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2411 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002412 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2413 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2414 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002415 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2416 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2417 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002418 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2419 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2420 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002421 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2422 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2423 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002424 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2425 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2426 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002427 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2428 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2429 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002430 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2431 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2432 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002433 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002434 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002435 "src/math/sqrt-neonfma-nr2fma.c",
2436 "src/math/sqrt-neonfma-nr2fma1adj.c",
2437 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002438]
2439
2440AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002441 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002442 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002443 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002444 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002445 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002446 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002447 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002448 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002449 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002450 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2451 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
2452 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002453 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002454 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002455 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
2456 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
2457 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
2458 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2459 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002460 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2461 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2462 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002463 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002464 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002465 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2466 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2467 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002468 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2469 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2470 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2471 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002472 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002473 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2474 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002475 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002476 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002477 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002478 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002479 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2480 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002481 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2482 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2483 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2484 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2485 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2486 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2487 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2488 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002489 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002490 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002491 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2492 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2493 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2494 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2495 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2496 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2497 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2498 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2499 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2500 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2501 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2502 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2503 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2504 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2505 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2506 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2507 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2508 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2509 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2510 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002511 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2512 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002513 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2514 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002515 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2516 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002517 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2518 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002519 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2520 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002521 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2522 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2523 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2524 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2525 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2526 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002527 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2528 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2529 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2530 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2531 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2532 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2533 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2534 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2535 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2536 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2537 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2538 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2539 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2540 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2541 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2542 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2543 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2544 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002545 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2546 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002547 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002548 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002549 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002550 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002551 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002552 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002553]
2554
Marat Dukhan8853b822020-05-07 12:19:01 -07002555NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002556 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2557 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002558 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2559 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2560 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2561 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2562 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2563 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002564 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002565 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002566 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002567 "src/math/roundz-neonv8.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002568 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c",
2569 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002570 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002571 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c",
2572 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002573 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002574 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c",
2575 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c",
2576 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c",
2577 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002578 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002579 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c",
2580 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c",
2581 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c",
2582 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002583 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2584 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2585 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2586 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2587 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002588 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002589 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2590 "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002591 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002592 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2593 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002594 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002595 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2596 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002597 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002598 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2599 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002600 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2601 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2602 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2603 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2604 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2605 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2606 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2607 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002608 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002609 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2610 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002611 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002612 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2613 "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002614 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002615 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2616 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002617 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002618 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2619 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002620 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2621 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2622 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2623 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2624 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2625 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2626 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2627 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002628 "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2629 "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
2630 "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2631 "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002632]
2633
Marat Dukhan08c4a432019-10-03 09:29:21 -07002634AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchard5a599a62020-06-04 20:12:44 -07002635 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
2636 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
2637 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2638 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002639 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2640 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2641 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2642 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2643 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2644 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2645 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2646 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002647 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2648 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002649 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
2650 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
2651 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2652 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2653 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2654 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
2655 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2656 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2657 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2658 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2659 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2660 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2661 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2662 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2663 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2664 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002665 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2666 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2667 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2668 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2669 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2670 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2671 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2672 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002673 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002674 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002675 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002676 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002677 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002678 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002679 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002680 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002681 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002682 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2683 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2684 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2685 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2686 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2687 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2688 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2689 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2690 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2691 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2692 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2693 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2694 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2695 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2696 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2697 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2698 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2699 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2700 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2701 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2702 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2703 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2704 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2705 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2706 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2707 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2708 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2709 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2710 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002711 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2712 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002713 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2714 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002715 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2716 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002717 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2718 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002719]
2720
Benoit Jacoba9644732020-08-13 12:48:55 -07002721NEONDOT_UKERNELS = [
Marat Dukhane76478b2021-06-28 16:35:40 -07002722 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2723 "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2724 "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2725 "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2726 "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2727 "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2728 "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2729 "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2730 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2731 "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2732 "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2733 "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2734 "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2735 "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2736 "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2737 "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002738 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2739 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002740 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002741 "src/qs8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2742 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002743 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002744 "src/qs8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2745 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002746 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002747 "src/qs8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2748 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002749 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002750 "src/qs8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2751 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002752 "src/qs8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2753 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002754 "src/qs8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2755 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002756 "src/qs8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2757 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002758 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2759 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002760 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002761 "src/qs8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2762 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002763 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002764 "src/qs8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2765 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002766 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002767 "src/qs8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2768 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002769 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002770 "src/qs8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2771 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002772 "src/qs8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2773 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002774 "src/qs8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2775 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002776 "src/qs8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
2777 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002778]
2779
Marat Dukhan08c4a432019-10-03 09:29:21 -07002780SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -07002781 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
2782 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07002783 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
2784 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002785 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
2786 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
2787 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
2788 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002789 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2790 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002791 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2792 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2793 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2794 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002795 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2796 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002797 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2798 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2799 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002800 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002801 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002802 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2803 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2804 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2805 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2806 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002807 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2808 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2809 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002810 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002811 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002812 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2813 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2814 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002815 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2816 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2817 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2818 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2819 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2820 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2821 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2822 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2823 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2824 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2825 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2826 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2827 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002828 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2829 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2830 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2831 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2832 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2833 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2834 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2835 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002836 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002837 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002838 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002839 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2840 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002841 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2842 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2843 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002844 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2845 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2846 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002847 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2848 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2849 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002850 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2851 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2852 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002853 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2854 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2855 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002856 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2857 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2858 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002859 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2860 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2861 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2862 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002863 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2864 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2865 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002866 "src/f32-ibilinear-chw/gen/sse-p4.c",
2867 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002868 "src/f32-ibilinear/gen/sse-c4.c",
2869 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002870 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2871 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2872 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002873 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2874 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2875 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002876 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2877 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2878 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2879 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002880 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2881 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2882 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002883 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2884 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2885 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002886 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002887 "src/f32-prelu/gen/sse-2x4.c",
2888 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002889 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002890 "src/f32-spmm/gen/4x1-minmax-sse.c",
2891 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002892 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002893 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002894 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2895 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2896 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2897 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2898 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2899 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2900 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2901 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002902 "src/f32-vbinary/gen/vmax-sse-x4.c",
2903 "src/f32-vbinary/gen/vmax-sse-x8.c",
2904 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2905 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2906 "src/f32-vbinary/gen/vmin-sse-x4.c",
2907 "src/f32-vbinary/gen/vmin-sse-x8.c",
2908 "src/f32-vbinary/gen/vminc-sse-x4.c",
2909 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002910 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2911 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2912 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2913 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2914 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2915 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2916 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2917 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002918 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2919 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2920 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2921 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002922 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2923 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2924 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2925 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002926 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2927 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002928 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2929 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002930 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2931 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002932 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2933 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002934 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2935 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002936 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2937 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002938 "src/f32-vunary/gen/vabs-sse-x4.c",
2939 "src/f32-vunary/gen/vabs-sse-x8.c",
2940 "src/f32-vunary/gen/vneg-sse-x4.c",
2941 "src/f32-vunary/gen/vneg-sse-x8.c",
2942 "src/f32-vunary/gen/vsqr-sse-x4.c",
2943 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002944 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002945 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002946 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002947 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002948 "src/math/sqrt-sse-hh1mac.c",
2949 "src/math/sqrt-sse-nr1mac.c",
2950 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002951 "src/x32-fill/sse.c",
2952 "src/x32-packx/x4-sse.c",
2953 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002954]
2955
2956SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002957 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002958 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002959 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002960 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2961 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2962 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2963 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2964 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2965 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2966 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2967 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2968 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2969 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2970 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2971 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002972 "src/f32-prelu/gen/sse2-2x4.c",
2973 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002974 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002975 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002976 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002977 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2978 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002979 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002980 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2981 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002982 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002983 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2984 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002985 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002986 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2987 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2988 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2989 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2990 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2991 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2992 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2993 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2994 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2995 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2996 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2997 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002998 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2999 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003000 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
3001 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003002 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
3003 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
3004 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
3005 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
3006 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
3007 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003008 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
3009 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
3010 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
3011 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
3012 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
3013 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
3014 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
3015 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
3016 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
3017 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
3018 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
3019 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003020 "src/math/exp-sse2-rr2-lut64-p2.c",
3021 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003022 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08003023 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08003024 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003025 "src/math/roundd-sse2-cvt.c",
3026 "src/math/roundne-sse2-cvt.c",
3027 "src/math/roundu-sse2-cvt.c",
3028 "src/math/roundz-sse2-cvt.c",
3029 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
3030 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
3031 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
3032 "src/math/sigmoid-sse2-rr2-p5-div.c",
3033 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
3034 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003035 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003036 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003037 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003038 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003039 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003040 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003041 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003042 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003043 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
3044 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003045 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003046 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003047 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003048 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003049 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003050 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003051 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003052 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003053 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003054 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003055 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003056 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003057 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003058 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003059 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003060 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003061 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003062 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003063 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003064 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003065 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003066 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003067 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003068 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003069 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003070 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003071 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003072 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003073 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003074 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003075 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003076 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003077 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003078 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
3079 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003080 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003081 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
3082 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003083 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003084 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
3085 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
3086 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
3087 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
3088 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003089 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
3090 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
3091 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003092 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
3093 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
3094 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003095 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003096 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003097 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003098 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003099 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003100 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003101 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003102 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003103 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003104 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003105 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003106 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003107 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003108 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003109 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003110 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003111 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003112 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003113 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003114 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003115 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003116 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003117 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003118 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003119 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003120 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003121 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003122 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003123 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003124 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003125 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003126 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003127 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003128 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003129 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003130 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003131 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003132 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003133 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07003134 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003135 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003136 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003137 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
3138 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
3139 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
3140 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003141 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
3142 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
3143 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
3144 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003145 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
3146 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003147 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
3148 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
3149 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
3150 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003151 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
3152 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003153 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
3154 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
3155 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
3156 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
3157 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
3158 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
3159 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
3160 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003161 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003162 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
3163 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
3164 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
3165 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
3166 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
3167 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003168 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003169 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
3170 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
3171 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
3172 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
3173 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
3174 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
3175 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
3176 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003177 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003178 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
3179 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
3180 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
3181 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
3182 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
3183 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003184 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07003185 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003186 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003187 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07003188 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
3189 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
3190 "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
3191 "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07003192 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003193 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003194 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003195 "src/x8-zip/x2-sse2.c",
3196 "src/x8-zip/x3-sse2.c",
3197 "src/x8-zip/x4-sse2.c",
3198 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07003199 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003200 "src/x32-zip/x2-sse2.c",
3201 "src/x32-zip/x3-sse2.c",
3202 "src/x32-zip/x4-sse2.c",
3203 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07003204]
3205
3206SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07003207 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
3208 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c",
3209 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07003210 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003211 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07003212 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
3213 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c",
3214 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c",
3215 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
3216 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003217 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003218 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c",
3219 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
3220 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
3221 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
3222 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003223 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
3224 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
3225 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003226 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
3227 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c",
3228 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003229 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003230 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003231 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003232 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003233 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003234 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003235 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003236 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003237 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003238 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003239 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003240 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003241 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003242 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003243 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003244 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003245 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003246 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003247 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003248 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003249 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003250 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003251 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003252 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003253 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003254 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3255 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
3256 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3257 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003258 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003259 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003260]
3261
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003262SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08003263 "src/f32-prelu/gen/sse41-2x4.c",
3264 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003265 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
3266 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
3267 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
3268 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
3269 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
3270 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
3271 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
3272 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
3273 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
3274 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
3275 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
3276 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003277 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
3278 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003279 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
3280 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003281 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
3282 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
3283 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
3284 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
3285 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
3286 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003287 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
3288 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
3289 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
3290 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
3291 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
3292 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
3293 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
3294 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
3295 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
3296 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
3297 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
3298 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003299 "src/math/roundd-sse41.c",
3300 "src/math/roundne-sse41.c",
3301 "src/math/roundu-sse41.c",
3302 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003303 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003304 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003305 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3306 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003307 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003308 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3309 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003310 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003311 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3312 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003313 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003314 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3315 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3316 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3317 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3318 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003319 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003320 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003321 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003322 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003323 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003324 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003325 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003326 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003327 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003328 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003329 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003330 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003331 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003332 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003333 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003334 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003335 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003336 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003337 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003338 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003339 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003340 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003341 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003342 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003343 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003344 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003345 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003346 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003347 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003348 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003349 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3350 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
3351 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003352 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003353 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003354 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3355 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
3356 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3357 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003358 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003359 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3360 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3361 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3362 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003363 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003364 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3365 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3366 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3367 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3368 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3369 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
3370 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3371 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3372 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3373 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3374 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003375 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3376 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3377 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003378 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
3379 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
3380 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003381 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003382 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003383 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003384 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003385 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003386 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003387 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003388 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003389 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003390 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003391 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003392 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003393 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003394 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003395 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003396 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003397 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003398 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003399 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003400 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003401 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003402 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003403 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003404 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003405 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003406 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003407 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003408 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003409 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003410 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003411 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003412 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003413 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003414 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003415 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003416 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003417 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003418 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003419 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003420 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003421 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003422 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003423 "src/qs8-requantization/rndnu-sse4-sra.c",
3424 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003425 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3426 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3427 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3428 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003429 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3430 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3431 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3432 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003433 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3434 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3435 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3436 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003437 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3438 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3439 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3440 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003441 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003442 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003443 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003444 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003445 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003446 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003447 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003448 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003449 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3450 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3451 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3452 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3453 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3454 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3455 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3456 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003457 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003458 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3459 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3460 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3461 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3462 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3463 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003464 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003465 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3466 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3467 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3468 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3469 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3470 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3471 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3472 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003473 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003474 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3475 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3476 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3477 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3478 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3479 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003480 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003481 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003482 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003483 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3484 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3485 "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3486 "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3487 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3488 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3489 "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3490 "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003491]
3492
Marat Dukhan08c4a432019-10-03 09:29:21 -07003493AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003494 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3495 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003496 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3497 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003498 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3499 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003500 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3501 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3502 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3503 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3504 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3505 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003506 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003507 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3508 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003509 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003510 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003511 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003512 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003513 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3514 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3515 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3516 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3517 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3518 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3519 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3520 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3521 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3522 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3523 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003524 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003525 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3526 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003527 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003528 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003529 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003530 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003531 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3532 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003533 "src/f32-prelu/gen/avx-2x8.c",
3534 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003535 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003536 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3537 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3538 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3539 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3540 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3541 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3542 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3543 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003544 "src/f32-vbinary/gen/vmax-avx-x8.c",
3545 "src/f32-vbinary/gen/vmax-avx-x16.c",
3546 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3547 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3548 "src/f32-vbinary/gen/vmin-avx-x8.c",
3549 "src/f32-vbinary/gen/vmin-avx-x16.c",
3550 "src/f32-vbinary/gen/vminc-avx-x8.c",
3551 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003552 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3553 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3554 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3555 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3556 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3557 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3558 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3559 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003560 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3561 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3562 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3563 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003564 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3565 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3566 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3567 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003568 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3569 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003570 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3571 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3572 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3573 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3574 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3575 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3576 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3577 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3578 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3579 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3580 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3581 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3582 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3583 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3584 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3585 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3586 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3587 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003588 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3589 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003590 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3591 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003592 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3593 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003594 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3595 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003596 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3597 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3598 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3599 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3600 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3601 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003602 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003603 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3604 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3605 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3606 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3607 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3608 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3609 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3610 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3611 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3612 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3613 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3614 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3615 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3616 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3617 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3618 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3619 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3620 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3621 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3622 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003623 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3624 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003625 "src/f32-vunary/gen/vabs-avx-x8.c",
3626 "src/f32-vunary/gen/vabs-avx-x16.c",
3627 "src/f32-vunary/gen/vneg-avx-x8.c",
3628 "src/f32-vunary/gen/vneg-avx-x16.c",
3629 "src/f32-vunary/gen/vsqr-avx-x8.c",
3630 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003631 "src/math/exp-avx-rr2-p5.c",
3632 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3633 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3634 "src/math/expm1minus-avx-rr2-p6.c",
3635 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3636 "src/math/sigmoid-avx-rr2-p5-div.c",
3637 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3638 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003639 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003640 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003641 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3642 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003643 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003644 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3645 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003646 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003647 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3648 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003649 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003650 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3651 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3652 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3653 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3654 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003655 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003656 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003657 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003658 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003659 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003660 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003661 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003662 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003663 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003664 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003665 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003666 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003667 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003668 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003669 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003670 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003671 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003672 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003673 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003674 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003675 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003676 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003677 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003678 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003679 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003680 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003681 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003682 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003683 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003684 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003685 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3686 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3687 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003688 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003689 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003690 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3691 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3692 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3693 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003694 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003695 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3696 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3697 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3698 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003699 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003700 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3701 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3702 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3703 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3704 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3705 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3706 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3707 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3708 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3709 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3710 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003711 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003712 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003713 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003714 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003715 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003716 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003717 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003718 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003719 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003720 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003721 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003722 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003723 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003724 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003725 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003726 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003727 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003728 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003729 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003730 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003731 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003732 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003733 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003734 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003735 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003736 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003737 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003738 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003739 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003740 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003741 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003742 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003743 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003744 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003745 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003746 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3747 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3748 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3749 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3750 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3751 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3752 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3753 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3754 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3755 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3756 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3757 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3758 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3759 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3760 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3761 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003762 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003763 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003764 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003765 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003766 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003767 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003768 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003769 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003770 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3771 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3772 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3773 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3774 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3775 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3776 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3777 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3778 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3779 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3780 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3781 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3782 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3783 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3784 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3785 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3786 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3787 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3788 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3789 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3790 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3791 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3792 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3793 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3794 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3795 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3796 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3797 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003798 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3799 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3800 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3801 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3802 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3803 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3804 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3805 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003806]
3807
Marat Dukhan1566fee2020-08-02 21:55:41 -07003808XOP_UKERNELS = [
Marat Dukhan09668562021-07-26 16:52:20 -07003809 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003810 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003811 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003812 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003813 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003814 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003815 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003816 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3817 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3818 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003819 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003820 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003821 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003822 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003823 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003824 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003825 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003826 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003827 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003828 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003829 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003830 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003831 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003832 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003833 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003834 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003835 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003836 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003837 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003838 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003839 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003840 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003841 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003842 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003843 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003844 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003845 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003846 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003847 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003848 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3849 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003850 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003851 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3852 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003853 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003854 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3855 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003856 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003857 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3858 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3859 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3860 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3861 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3862 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003863 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003864 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003865 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003866 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003867 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003868 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003869 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003870 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003871 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003872 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003873 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003874 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003875 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003876 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003877 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003878 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003879 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003880 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003881 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003882 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003883 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003884 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003885 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003886 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003887 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003888 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003889 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003890 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003891 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003892 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003893 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003894 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003895 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003896 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003897 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003898 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3899 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3900 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3901 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3902 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3903 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3904 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3905 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003906 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3907 "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3908 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3909 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003910 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3911 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3912 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3913 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3914 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3915 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3916 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3917 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3918 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3919 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3920 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3921 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3922 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3923 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3924 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3925 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3926 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3927 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3928 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3929 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3930 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3931 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3932 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3933 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3934 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3935 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3936 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3937 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003938 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3939 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3940 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3941 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003942]
3943
Marat Dukhanfda12b82019-11-21 12:27:59 -08003944FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003945 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
3946 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003947 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3948 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003949 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3950 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003951 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
3952 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
3953 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
3954 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
3955 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3956 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003957 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003958 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3959 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3960 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3961 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003962 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003963 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
3964 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003965 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003966 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
3967 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003968 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3969 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3970 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003971 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3972 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3973 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3974 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3975 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3976 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3977 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3978 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3979 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3980 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3981 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3982 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3983 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3984 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003985 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003986 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3987 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3988 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3989 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003990 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003991 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3992 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003993 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003994 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3995 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003996 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3997 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3998 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003999 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
4000 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004001 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
4002 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
4003 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
4004 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
4005 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
4006 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
4007 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
4008 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004009 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004010 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004011 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004012]
4013
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004014AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004015 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
4016 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004017 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004018 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004019 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004020 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
4021 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004022 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004023 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
4024 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
4025 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004026 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004027 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
4028 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004029 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004030 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004031 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004032 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
4033 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004034 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004035 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
4036 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
4037 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004038 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004039 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
4040 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004041 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004042 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004043 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004044 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
4045 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004046 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004047 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
4048 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
4049 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004050 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004051 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
4052 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
4053 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
4054 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
4055 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
4056 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
4057 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
4058 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
4059 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
4060 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
4061 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
4062 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
4063 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
4064 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
4065 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
4066 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
4067 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
4068 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
4069 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
4070 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
4071 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
4072 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
4073 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
4074 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
4075 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
4076 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
4077 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
4078 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
4079 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
4080 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
4081 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
4082 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
4083 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
4084 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
4085 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
4086 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
4087 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
4088 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
4089 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
4090 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004091 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
4092 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
4093 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
4094 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
4095 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
4096 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
4097 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
4098 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
4099 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
4100 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
4101 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
4102 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
4103 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
4104 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
4105 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
4106 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
4107 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
4108 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
4109 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
4110 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
4111 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
4112 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
4113 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
4114 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004115 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
4116 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
4117 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
4118 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
4119 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
4120 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
4121 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
4122 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
4123 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
4124 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
4125 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
4126 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
4127 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
4128 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
4129 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
4130 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
4131 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
4132 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
4133 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
4134 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
4135 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
4136 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
4137 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
4138 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
4139 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
4140 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
4141 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
4142 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
4143 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
4144 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004145 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
4146 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
4147 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004148 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
4149 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
4150 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
4151 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08004152 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004153 "src/math/extexp-avx2-p5.c",
4154 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
4155 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
4156 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
4157 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
4158 "src/math/sigmoid-avx2-rr1-p5-div.c",
4159 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
4160 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
4161 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
4162 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
4163 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
4164 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
4165 "src/math/sigmoid-avx2-rr2-p5-div.c",
4166 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
4167 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07004168 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4169 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4170 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
4171 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4172 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
4173 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4174 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
4175 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
4176 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
4177 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4178 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
4179 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004180 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4181 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
4182 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4183 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
4184 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4185 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07004186 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4187 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4188 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004189 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004190 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004191 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004192 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004193 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004194 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004195 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
4196 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004197 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004198 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004199 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
4200 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004201 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004202 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004203 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004204 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004205 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004206 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004207 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
4208 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004209 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004210 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004211 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
4212 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004213 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004214 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004215 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004216 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004217 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004218 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004219 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004220 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004221 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004222 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004223 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004224 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004225 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004226 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004227 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004228 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004229 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004230 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07004231 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4232 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4233 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
4234 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
4235 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4236 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
4237 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
4238 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07004239 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4240 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4241 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4242 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4243 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4244 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004245 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4246 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4247 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4248 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4249 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4250 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07004251 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4252 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4253 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4254 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004255]
4256
Marat Dukhan08c4a432019-10-03 09:29:21 -07004257AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004258 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4259 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004260 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4261 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004262 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4263 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004264 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
4265 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
4266 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4267 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4268 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4269 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004270 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4271 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4272 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4273 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4274 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4275 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004276 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4277 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4278 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4279 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4280 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4281 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004282 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4283 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4284 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4285 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4286 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4287 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004288 "src/f32-prelu/gen/avx512f-2x16.c",
4289 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004290 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4291 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004292 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004293 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004294 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004295 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4296 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004297 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004298 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4299 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4300 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004301 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004302 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4303 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004304 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004305 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004306 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004307 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4308 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004309 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004310 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4311 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4312 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004313 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004314 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4315 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004316 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004317 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004318 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004319 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4320 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004321 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004322 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4323 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4324 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004325 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004326 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004327 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4328 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4329 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4330 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4331 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4332 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4333 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4334 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004335 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4336 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4337 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4338 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4339 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4340 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4341 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4342 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004343 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4344 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4345 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4346 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4347 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4348 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4349 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4350 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004351 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4352 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4353 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4354 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004355 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4356 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4357 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4358 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004359 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4360 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004361 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4362 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4363 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4364 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4365 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4366 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4367 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4368 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4369 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4370 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4371 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4372 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4373 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4374 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4375 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4376 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004377 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4378 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004379 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4380 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004381 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4382 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004383 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4384 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4385 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4386 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4387 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4388 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4389 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4390 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004391 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004392 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4393 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4394 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4395 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4396 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4397 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4398 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4399 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4400 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4401 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4402 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4403 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4404 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4405 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4406 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4407 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4408 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4409 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4410 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4411 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4412 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4413 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4414 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4415 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004416 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4417 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4418 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4419 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4420 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4421 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4422 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4423 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4424 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4425 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4426 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4427 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4428 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4429 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4430 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4431 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4432 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4433 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4434 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4435 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4436 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4437 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4438 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4439 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4440 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4441 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4442 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4443 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4444 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4445 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4446 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4447 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4448 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4449 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4450 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4451 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4452 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4453 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4454 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4455 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4456 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4457 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4458 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4459 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4460 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4461 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4462 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4463 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004464 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4465 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4466 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4467 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4468 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4469 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4470 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4471 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004472 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4473 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4474 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4475 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4476 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4477 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004478 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4479 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4480 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4481 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4482 "src/math/exp-avx512f-rr2-p5-scalef.c",
4483 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004484 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4485 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004486 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004487 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004488 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004489 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004490 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004491 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004492 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004493 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004494 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004495 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4496 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4497 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4498 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4499 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4500 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4501 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4502 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4503 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4504 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004505 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004506 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004507 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4508 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4509 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4510 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004511 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004512 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004513 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004514]
4515
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004516AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004517 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4518 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4519 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4520 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004521 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4522 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4523 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4524 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4525 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4526 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4527 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4528 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004529 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004530 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004531 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004532 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004533 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004534 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004535 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004536 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004537 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004538 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004539 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004540 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004541 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004542 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004543 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004544 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004545 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004546 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004547 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004548 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004549 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004550 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004551 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004552 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhane76049a2021-07-22 14:48:59 -07004553 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
4554 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c",
4555 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
4556 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c",
Marat Dukhancfd606b2021-07-09 01:18:45 -07004557 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4558 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4559 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4560 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004561 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4562 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4563 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4564 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4565 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4566 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4567 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4568 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhane76049a2021-07-22 14:48:59 -07004569 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
4570 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c",
4571 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
4572 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004573]
4574
Frank Barchardbcedc082020-08-17 18:00:51 -07004575WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004576 "src/f32-vrelu/wasm_shr_x1.S",
4577 "src/f32-vrelu/wasm_shr_x2.S",
4578 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004579]
4580
Marat Dukhan08c4a432019-10-03 09:29:21 -07004581AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004582 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004583 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004584 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4585 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004586 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004587 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004588 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004589 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004590 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4591 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004592 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4593 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4594 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4595 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004596]
4597
4598AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004599 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004600 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004601 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004602 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004603 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004604 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004605 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004606 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
4607 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004608 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
4609 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
4610 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
4611 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
4612 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004613 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004614 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004615 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
4616 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004617 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
4618 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004619 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004620 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004621 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004622 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004623 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004624 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4625 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004626 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004627 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004628 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004629 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004630 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004631 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004632 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004633 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4634 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004635 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004636 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004637 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004638 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004639 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004640 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004641 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
4642 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004643 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004644 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
4645 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4646 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004647 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4648 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
4649 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004650 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004651 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004652 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004653 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004654 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4655 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004656 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4657 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
4658 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
4659 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004660 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004661 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004662 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004663 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4664 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004665 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4666 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4667 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4668 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004669 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004670 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004671 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004672 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004673 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004674 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4675 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4676 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4677 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004678 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004679 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004680 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004681 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4682 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4683 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4684 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004685 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4686 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004687 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4688 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4689 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4690 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4691 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004692 "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004693 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4694 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4695 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4696 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4697 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4698 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004699 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4700 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4701 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4702 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4703 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4704 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4705 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4706 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004707 "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004708 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4709 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4710 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4711 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4712 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004713 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4714 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4715 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4716 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004717 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4718 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4719 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4720 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004721 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4722 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4723 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4724 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004725 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4726 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004727 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4728 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004729 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S",
4730 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004731 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4732 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4733 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4734 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4735 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004736 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4737 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4738 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4739 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004740 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004741 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4742 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4743 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4744 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
4745 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004746 "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004747 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004748 "src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004749 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4750 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004751 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4752 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004753 "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
4754 "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004755 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4756 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4757 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4758 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004759 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4760 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4761 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004762 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004763 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4764 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S",
4765 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004766 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004767 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4768 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4769 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4770 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004771 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4772 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4773 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4774 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004775 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4776 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4777 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4778 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004779 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4780 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4781 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4782 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004783 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4784 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4785 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4786 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004787 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4788 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4789 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4790 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004791 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004792 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004793 "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004794 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4795 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004796 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4797 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004798 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
4799 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004800 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4801 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4802 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004803 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4804 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004805 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004806 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4807 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004808 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004809]
4810
Marat Dukhan1b354632020-03-23 12:50:22 -07004811INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004812 "src/xnnpack/argmaxpool.h",
4813 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004814 "src/xnnpack/common.h",
4815 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004816 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004817 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004818 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004819 "src/xnnpack/gavgpool.h",
4820 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004821 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004822 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004823 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004824 "src/xnnpack/lut.h",
4825 "src/xnnpack/math.h",
4826 "src/xnnpack/maxpool.h",
4827 "src/xnnpack/packx.h",
4828 "src/xnnpack/pad.h",
4829 "src/xnnpack/params.h",
4830 "src/xnnpack/pavgpool.h",
4831 "src/xnnpack/ppmm.h",
4832 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004833 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004834 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004835 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004836 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004837 "src/xnnpack/spmm.h",
4838 "src/xnnpack/unpool.h",
4839 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004840 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004841 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004842 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004843 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004844 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004845 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004846 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004847]
4848
4849INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004850 "include/xnnpack.h",
4851 "src/xnnpack/allocator.h",
4852 "src/xnnpack/compute.h",
4853 "src/xnnpack/im2col.h",
4854 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004855 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004856 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004857 "src/xnnpack/operator.h",
4858 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004859 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004860 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004861 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004862 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004863]
4864
Marat Dukhan1b354632020-03-23 12:50:22 -07004865ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004866 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004867]
4868
Marat Dukhan1b354632020-03-23 12:50:22 -07004869MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004870 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004871 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004872]
4873
Marat Dukhan1b354632020-03-23 12:50:22 -07004874MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004875 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004876 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004877 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004878 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004879]
4880
4881OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004882 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004883 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004884]
4885
4886WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004887 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004888 "src/xnnpack/operator.h",
4889 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004890]
4891
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004892LOGGING_COPTS = select({
4893 # No logging in optimized mode
4894 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4895 # Full logging in debug mode
4896 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4897 # Error-only logging in default (fastbuild) mode
4898 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4899})
4900
Marat Dukhan3b59de22020-06-03 20:15:19 -07004901LOGGING_SRCS = select({
4902 # No logging in optimized mode
4903 ":optimized_build": [],
4904 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004905 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004906 "src/operator-strings.c",
4907 "src/subgraph-strings.c",
4908 ],
4909})
4910
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004911LOGGING_HDRS = [
4912 "src/xnnpack/log.h",
4913]
4914
Marat Dukhan08c4a432019-10-03 09:29:21 -07004915xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004916 name = "tables",
4917 srcs = TABLE_SRCS,
4918 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004919 gcc_copts = xnnpack_gcc_std_copts(),
4920 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004921)
4922
4923xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004924 name = "scalar_ukernels",
4925 srcs = SCALAR_UKERNELS,
4926 hdrs = INTERNAL_HDRS,
4927 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004928 gcc_copts = xnnpack_gcc_std_copts(),
4929 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004930 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004931 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004932 "@FP16",
4933 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004934 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004935 ],
4936)
4937
4938xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004939 name = "scalar_ukernels_test_mode",
4940 srcs = SCALAR_UKERNELS,
4941 hdrs = INTERNAL_HDRS,
4942 aarch32_copts = ["-marm"],
4943 copts = [
4944 "-UNDEBUG",
4945 "-DXNN_TEST_MODE=1",
4946 ],
4947 gcc_copts = xnnpack_gcc_std_copts(),
4948 msvc_copts = xnnpack_msvc_std_copts(),
4949 deps = [
4950 ":tables",
4951 "@FP16",
4952 "@FXdiv",
4953 "@pthreadpool",
4954 ],
4955)
4956
4957xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004958 name = "wasm_ukernels",
4959 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004960 gcc_copts = xnnpack_gcc_std_copts(),
4961 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004962 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004963 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004964 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004965 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004966 "@FP16",
4967 "@FXdiv",
4968 "@pthreadpool",
4969 ],
4970)
4971
4972xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004973 name = "wasm_ukernels_test_mode",
4974 hdrs = INTERNAL_HDRS,
4975 copts = [
4976 "-UNDEBUG",
4977 "-DXNN_TEST_MODE=1",
4978 ],
4979 gcc_copts = xnnpack_gcc_std_copts(),
4980 msvc_copts = xnnpack_msvc_std_copts(),
4981 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004982 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004983 deps = [
4984 ":tables",
4985 "@FP16",
4986 "@FXdiv",
4987 "@pthreadpool",
4988 ],
4989)
4990
4991xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004992 name = "neon_ukernels",
4993 hdrs = INTERNAL_HDRS,
4994 aarch32_copts = [
4995 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004996 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004997 "-mfpu=neon",
4998 ],
4999 aarch32_srcs = NEON_UKERNELS,
5000 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005001 gcc_copts = xnnpack_gcc_std_copts(),
5002 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005003 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005004 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005005 "@FP16",
5006 "@pthreadpool",
5007 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005008)
5009
5010xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005011 name = "neon_ukernels_test_mode",
5012 hdrs = INTERNAL_HDRS,
5013 aarch32_copts = [
5014 "-marm",
5015 "-march=armv7-a",
5016 "-mfpu=neon",
5017 ],
5018 aarch32_srcs = NEON_UKERNELS,
5019 aarch64_srcs = NEON_UKERNELS,
5020 copts = [
5021 "-UNDEBUG",
5022 "-DXNN_TEST_MODE=1",
5023 ],
5024 gcc_copts = xnnpack_gcc_std_copts(),
5025 msvc_copts = xnnpack_msvc_std_copts(),
5026 deps = [
5027 ":tables",
5028 "@FP16",
5029 "@pthreadpool",
5030 ],
5031)
5032
5033xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005034 name = "neonfma_ukernels",
5035 hdrs = INTERNAL_HDRS,
5036 aarch32_copts = [
5037 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07005038 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005039 "-mfpu=neon-vfpv4",
5040 ],
5041 aarch32_srcs = NEONFMA_UKERNELS,
5042 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005043 apple_aarch32_copts = [
5044 "-mcpu=swift",
5045 "-mtune=generic",
5046 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005047 gcc_copts = xnnpack_gcc_std_copts(),
5048 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005049 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005050 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005051 "@FP16",
5052 "@pthreadpool",
5053 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005054)
5055
5056xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005057 name = "neonfma_ukernels_test_mode",
5058 hdrs = INTERNAL_HDRS,
5059 aarch32_copts = [
5060 "-marm",
5061 "-march=armv7-a",
5062 "-mfpu=neon-vfpv4",
5063 ],
5064 aarch32_srcs = NEONFMA_UKERNELS,
5065 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005066 apple_aarch32_copts = [
5067 "-mcpu=swift",
5068 "-mtune=generic",
5069 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005070 copts = [
5071 "-UNDEBUG",
5072 "-DXNN_TEST_MODE=1",
5073 ],
5074 gcc_copts = xnnpack_gcc_std_copts(),
5075 msvc_copts = xnnpack_msvc_std_copts(),
5076 deps = [
5077 ":tables",
5078 "@FP16",
5079 "@pthreadpool",
5080 ],
5081)
5082
5083xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07005084 name = "neonv8_ukernels",
5085 hdrs = INTERNAL_HDRS,
5086 aarch32_copts = [
5087 "-marm",
5088 "-march=armv8-a",
5089 "-mfpu=neon-fp-armv8",
5090 ],
5091 aarch32_srcs = NEONV8_UKERNELS,
5092 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005093 apple_aarch32_copts = [
5094 "-mcpu=cyclone",
5095 "-mtune=generic",
5096 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07005097 gcc_copts = xnnpack_gcc_std_copts(),
5098 msvc_copts = xnnpack_msvc_std_copts(),
5099 deps = [
5100 ":tables",
5101 "@FP16",
5102 "@pthreadpool",
5103 ],
5104)
5105
5106xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005107 name = "neonv8_ukernels_test_mode",
5108 hdrs = INTERNAL_HDRS,
5109 aarch32_copts = [
5110 "-marm",
5111 "-march=armv8-a",
5112 "-mfpu=neon-fp-armv8",
5113 ],
5114 aarch32_srcs = NEONV8_UKERNELS,
5115 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005116 apple_aarch32_copts = [
5117 "-mcpu=cyclone",
5118 "-mtune=generic",
5119 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005120 copts = [
5121 "-UNDEBUG",
5122 "-DXNN_TEST_MODE=1",
5123 ],
5124 gcc_copts = xnnpack_gcc_std_copts(),
5125 msvc_copts = xnnpack_msvc_std_copts(),
5126 deps = [
5127 ":tables",
5128 "@FP16",
5129 "@pthreadpool",
5130 ],
5131)
5132
5133xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005134 name = "neonfp16arith_ukernels",
5135 hdrs = INTERNAL_HDRS,
5136 aarch64_copts = ["-march=armv8.2-a+fp16"],
5137 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005138 gcc_copts = xnnpack_gcc_std_copts(),
5139 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005140 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005141 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005142 "@FP16",
5143 "@pthreadpool",
5144 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005145)
5146
5147xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005148 name = "neonfp16arith_ukernels_test_mode",
5149 hdrs = INTERNAL_HDRS,
5150 aarch64_copts = ["-march=armv8.2-a+fp16"],
5151 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
5152 copts = [
5153 "-UNDEBUG",
5154 "-DXNN_TEST_MODE=1",
5155 ],
5156 gcc_copts = xnnpack_gcc_std_copts(),
5157 msvc_copts = xnnpack_msvc_std_copts(),
5158 deps = [
5159 ":tables",
5160 "@FP16",
5161 "@pthreadpool",
5162 ],
5163)
5164
5165xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07005166 name = "neondot_ukernels",
5167 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005168 aarch32_copts = [
5169 "-marm",
5170 "-march=armv8.2-a+dotprod",
5171 "-mfpu=neon-fp-armv8",
5172 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005173 aarch32_srcs = NEONDOT_UKERNELS,
5174 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5175 aarch64_srcs = NEONDOT_UKERNELS,
5176 gcc_copts = xnnpack_gcc_std_copts(),
5177 msvc_copts = xnnpack_msvc_std_copts(),
5178 deps = [
5179 ":tables",
5180 "@FP16",
5181 "@pthreadpool",
5182 ],
5183)
5184
5185xnnpack_cc_library(
5186 name = "neondot_ukernels_test_mode",
5187 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005188 aarch32_copts = [
5189 "-marm",
5190 "-march=armv8.2-a+dotprod",
5191 "-mfpu=neon-fp-armv8",
5192 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005193 aarch32_srcs = NEONDOT_UKERNELS,
5194 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5195 aarch64_srcs = NEONDOT_UKERNELS,
5196 copts = [
5197 "-UNDEBUG",
5198 "-DXNN_TEST_MODE=1",
5199 ],
5200 gcc_copts = xnnpack_gcc_std_copts(),
5201 msvc_copts = xnnpack_msvc_std_copts(),
5202 deps = [
5203 ":tables",
5204 "@FP16",
5205 "@pthreadpool",
5206 ],
5207)
5208
5209xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005210 name = "sse2_ukernels",
5211 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005212 gcc_copts = xnnpack_gcc_std_copts(),
5213 gcc_x86_copts = ["-msse2"],
5214 msvc_copts = xnnpack_msvc_std_copts(),
5215 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005216 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005217 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005218 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005219 "@FP16",
5220 "@pthreadpool",
5221 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005222)
5223
5224xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005225 name = "sse2_ukernels_test_mode",
5226 hdrs = INTERNAL_HDRS,
5227 copts = [
5228 "-UNDEBUG",
5229 "-DXNN_TEST_MODE=1",
5230 ],
5231 gcc_copts = xnnpack_gcc_std_copts(),
5232 gcc_x86_copts = ["-msse2"],
5233 msvc_copts = xnnpack_msvc_std_copts(),
5234 msvc_x86_32_copts = ["/arch:SSE2"],
5235 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
5236 deps = [
5237 ":tables",
5238 "@FP16",
5239 "@pthreadpool",
5240 ],
5241)
5242
5243xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005244 name = "ssse3_ukernels",
5245 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005246 gcc_copts = xnnpack_gcc_std_copts(),
5247 gcc_x86_copts = ["-mssse3"],
5248 msvc_copts = xnnpack_msvc_std_copts(),
5249 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005250 x86_srcs = SSSE3_UKERNELS,
5251 deps = [
5252 ":tables",
5253 "@FP16",
5254 "@pthreadpool",
5255 ],
5256)
5257
5258xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005259 name = "ssse3_ukernels_test_mode",
5260 hdrs = INTERNAL_HDRS,
5261 copts = [
5262 "-UNDEBUG",
5263 "-DXNN_TEST_MODE=1",
5264 ],
5265 gcc_copts = xnnpack_gcc_std_copts(),
5266 gcc_x86_copts = ["-mssse3"],
5267 msvc_copts = xnnpack_msvc_std_copts(),
5268 msvc_x86_32_copts = ["/arch:SSE2"],
5269 x86_srcs = SSSE3_UKERNELS,
5270 deps = [
5271 ":tables",
5272 "@FP16",
5273 "@pthreadpool",
5274 ],
5275)
5276
5277xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005278 name = "sse41_ukernels",
5279 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005280 gcc_copts = xnnpack_gcc_std_copts(),
5281 gcc_x86_copts = ["-msse4.1"],
5282 msvc_copts = xnnpack_msvc_std_copts(),
5283 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005284 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005285 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005286 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005287 "@FP16",
5288 "@pthreadpool",
5289 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005290)
5291
5292xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005293 name = "sse41_ukernels_test_mode",
5294 hdrs = INTERNAL_HDRS,
5295 copts = [
5296 "-UNDEBUG",
5297 "-DXNN_TEST_MODE=1",
5298 ],
5299 gcc_copts = xnnpack_gcc_std_copts(),
5300 gcc_x86_copts = ["-msse4.1"],
5301 msvc_copts = xnnpack_msvc_std_copts(),
5302 msvc_x86_32_copts = ["/arch:SSE2"],
5303 x86_srcs = SSE41_UKERNELS,
5304 deps = [
5305 ":tables",
5306 "@FP16",
5307 "@pthreadpool",
5308 ],
5309)
5310
5311xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005312 name = "avx_ukernels",
5313 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005314 gcc_copts = xnnpack_gcc_std_copts(),
5315 gcc_x86_copts = ["-mavx"],
5316 msvc_copts = xnnpack_msvc_std_copts(),
5317 msvc_x86_32_copts = ["/arch:AVX"],
5318 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005319 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005320 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005321 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005322 "@FP16",
5323 "@pthreadpool",
5324 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005325)
5326
5327xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005328 name = "avx_ukernels_test_mode",
5329 hdrs = INTERNAL_HDRS,
5330 copts = [
5331 "-UNDEBUG",
5332 "-DXNN_TEST_MODE=1",
5333 ],
5334 gcc_copts = xnnpack_gcc_std_copts(),
5335 gcc_x86_copts = ["-mavx"],
5336 msvc_copts = xnnpack_msvc_std_copts(),
5337 msvc_x86_32_copts = ["/arch:AVX"],
5338 msvc_x86_64_copts = ["/arch:AVX"],
5339 x86_srcs = AVX_UKERNELS,
5340 deps = [
5341 ":tables",
5342 "@FP16",
5343 "@pthreadpool",
5344 ],
5345)
5346
5347xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005348 name = "xop_ukernels",
5349 hdrs = INTERNAL_HDRS,
5350 gcc_copts = xnnpack_gcc_std_copts(),
5351 gcc_x86_copts = ["-mxop"],
5352 msvc_copts = xnnpack_msvc_std_copts(),
5353 msvc_x86_32_copts = ["/arch:AVX"],
5354 msvc_x86_64_copts = ["/arch:AVX"],
5355 x86_srcs = XOP_UKERNELS,
5356 deps = [
5357 ":tables",
5358 "@FP16",
5359 "@pthreadpool",
5360 ],
5361)
5362
5363xnnpack_cc_library(
5364 name = "xop_ukernels_test_mode",
5365 hdrs = INTERNAL_HDRS,
5366 copts = [
5367 "-UNDEBUG",
5368 "-DXNN_TEST_MODE=1",
5369 ],
5370 gcc_copts = xnnpack_gcc_std_copts(),
5371 gcc_x86_copts = ["-mxop"],
5372 msvc_copts = xnnpack_msvc_std_copts(),
5373 msvc_x86_32_copts = ["/arch:AVX"],
5374 msvc_x86_64_copts = ["/arch:AVX"],
5375 x86_srcs = XOP_UKERNELS,
5376 deps = [
5377 ":tables",
5378 "@FP16",
5379 "@pthreadpool",
5380 ],
5381)
5382
5383xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005384 name = "fma3_ukernels",
5385 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005386 gcc_copts = xnnpack_gcc_std_copts(),
5387 gcc_x86_copts = ["-mfma"],
5388 msvc_copts = xnnpack_msvc_std_copts(),
5389 msvc_x86_32_copts = ["/arch:AVX"],
5390 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005391 x86_srcs = FMA3_UKERNELS,
5392 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005393 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005394 "@FP16",
5395 "@pthreadpool",
5396 ],
5397)
5398
5399xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005400 name = "fma3_ukernels_test_mode",
5401 hdrs = INTERNAL_HDRS,
5402 copts = [
5403 "-UNDEBUG",
5404 "-DXNN_TEST_MODE=1",
5405 ],
5406 gcc_copts = xnnpack_gcc_std_copts(),
5407 gcc_x86_copts = ["-mfma"],
5408 msvc_copts = xnnpack_msvc_std_copts(),
5409 msvc_x86_32_copts = ["/arch:AVX"],
5410 msvc_x86_64_copts = ["/arch:AVX"],
5411 x86_srcs = FMA3_UKERNELS,
5412 deps = [
5413 ":tables",
5414 "@FP16",
5415 "@pthreadpool",
5416 ],
5417)
5418
5419xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005420 name = "avx2_ukernels",
5421 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005422 gcc_copts = xnnpack_gcc_std_copts(),
5423 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005424 "-mfma",
5425 "-mavx2",
5426 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005427 msvc_copts = xnnpack_msvc_std_copts(),
5428 msvc_x86_32_copts = ["/arch:AVX2"],
5429 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005430 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005431 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005432 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005433 "@FP16",
5434 "@pthreadpool",
5435 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005436)
5437
5438xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005439 name = "avx2_ukernels_test_mode",
5440 hdrs = INTERNAL_HDRS,
5441 copts = [
5442 "-UNDEBUG",
5443 "-DXNN_TEST_MODE=1",
5444 ],
5445 gcc_copts = xnnpack_gcc_std_copts(),
5446 gcc_x86_copts = [
5447 "-mfma",
5448 "-mavx2",
5449 ],
5450 msvc_copts = xnnpack_msvc_std_copts(),
5451 msvc_x86_32_copts = ["/arch:AVX2"],
5452 msvc_x86_64_copts = ["/arch:AVX2"],
5453 x86_srcs = AVX2_UKERNELS,
5454 deps = [
5455 ":tables",
5456 "@FP16",
5457 "@pthreadpool",
5458 ],
5459)
5460
5461xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005462 name = "avx512f_ukernels",
5463 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005464 gcc_copts = xnnpack_gcc_std_copts(),
5465 gcc_x86_copts = ["-mavx512f"],
5466 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5467 msvc_copts = xnnpack_msvc_std_copts(),
5468 msvc_x86_32_copts = ["/arch:AVX512"],
5469 msvc_x86_64_copts = ["/arch:AVX512"],
5470 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005471 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005472 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005473 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005474 "@FP16",
5475 "@pthreadpool",
5476 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005477)
5478
5479xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005480 name = "avx512f_ukernels_test_mode",
5481 hdrs = INTERNAL_HDRS,
5482 copts = [
5483 "-UNDEBUG",
5484 "-DXNN_TEST_MODE=1",
5485 ],
5486 gcc_copts = xnnpack_gcc_std_copts(),
5487 gcc_x86_copts = ["-mavx512f"],
5488 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5489 msvc_copts = xnnpack_msvc_std_copts(),
5490 msvc_x86_32_copts = ["/arch:AVX512"],
5491 msvc_x86_64_copts = ["/arch:AVX512"],
5492 msys_copts = ["-fno-asynchronous-unwind-tables"],
5493 x86_srcs = AVX512F_UKERNELS,
5494 deps = [
5495 ":tables",
5496 "@FP16",
5497 "@pthreadpool",
5498 ],
5499)
5500
5501xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005502 name = "avx512skx_ukernels",
5503 hdrs = INTERNAL_HDRS,
5504 gcc_copts = xnnpack_gcc_std_copts(),
5505 gcc_x86_copts = [
5506 "-mavx512f",
5507 "-mavx512cd",
5508 "-mavx512bw",
5509 "-mavx512dq",
5510 "-mavx512vl",
5511 ],
5512 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5513 msvc_copts = xnnpack_msvc_std_copts(),
5514 msvc_x86_32_copts = ["/arch:AVX512"],
5515 msvc_x86_64_copts = ["/arch:AVX512"],
5516 msys_copts = ["-fno-asynchronous-unwind-tables"],
5517 x86_srcs = AVX512SKX_UKERNELS,
5518 deps = [
5519 ":tables",
5520 "@FP16",
5521 "@pthreadpool",
5522 ],
5523)
5524
5525xnnpack_cc_library(
5526 name = "avx512skx_ukernels_test_mode",
5527 hdrs = INTERNAL_HDRS,
5528 copts = [
5529 "-UNDEBUG",
5530 "-DXNN_TEST_MODE=1",
5531 ],
5532 gcc_copts = xnnpack_gcc_std_copts(),
5533 gcc_x86_copts = [
5534 "-mavx512f",
5535 "-mavx512cd",
5536 "-mavx512bw",
5537 "-mavx512dq",
5538 "-mavx512vl",
5539 ],
5540 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5541 msvc_copts = xnnpack_msvc_std_copts(),
5542 msvc_x86_32_copts = ["/arch:AVX512"],
5543 msvc_x86_64_copts = ["/arch:AVX512"],
5544 msys_copts = ["-fno-asynchronous-unwind-tables"],
5545 x86_srcs = AVX512SKX_UKERNELS,
5546 deps = [
5547 ":tables",
5548 "@FP16",
5549 "@pthreadpool",
5550 ],
5551)
5552
5553xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005554 name = "asm_ukernels",
5555 hdrs = ["src/xnnpack/assembly.h"],
5556 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005557 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005558 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005559 wasm_srcs = WASM32_ASM_UKERNELS,
5560 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005561)
5562
Marat Dukhan3b59de22020-06-03 20:15:19 -07005563xnnpack_cc_library(
5564 name = "logging_utils",
5565 srcs = LOGGING_SRCS,
5566 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5567 copts = LOGGING_COPTS + [
5568 "-Isrc",
5569 "-Iinclude",
5570 ] + select({
5571 ":debug_build": [],
5572 "//conditions:default": xnnpack_min_size_copts(),
5573 }),
5574 gcc_copts = xnnpack_gcc_std_copts(),
5575 msvc_copts = xnnpack_msvc_std_copts(),
5576 visibility = xnnpack_visibility(),
5577 deps = [
5578 "@FP16",
5579 "@clog",
5580 "@pthreadpool",
5581 ],
5582)
5583
Marat Dukhan08c4a432019-10-03 09:29:21 -07005584xnnpack_aggregate_library(
5585 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005586 aarch32_ios_deps = [
5587 ":neon_ukernels",
5588 ":neonfma_ukernels",
5589 ":neonv8_ukernels",
5590 ":asm_ukernels",
5591 ],
5592 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005593 ":neon_ukernels",
5594 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005595 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005596 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005597 ":asm_ukernels",
5598 ],
5599 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005600 ":neon_ukernels",
5601 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005602 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005603 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005604 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005605 ":asm_ukernels",
5606 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005607 generic_deps = [
5608 ":scalar_ukernels",
5609 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005610 wasm_deps = [
5611 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005612 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005613 ],
5614 wasmsimd_deps = [
5615 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005616 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005617 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005618 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005619 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005620 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005621 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005622 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005623 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005624 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005625 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005626 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005627 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005628 ],
5629)
5630
Marat Dukhan33fcf782020-05-24 14:27:15 -07005631xnnpack_aggregate_library(
5632 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005633 aarch32_ios_deps = [
5634 ":neon_ukernels_test_mode",
5635 ":neonfma_ukernels_test_mode",
5636 ":neonv8_ukernels_test_mode",
5637 ":asm_ukernels",
5638 ],
5639 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005640 ":neon_ukernels_test_mode",
5641 ":neonfma_ukernels_test_mode",
5642 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005643 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005644 ":asm_ukernels",
5645 ],
5646 aarch64_deps = [
5647 ":neon_ukernels_test_mode",
5648 ":neonfma_ukernels_test_mode",
5649 ":neonv8_ukernels_test_mode",
5650 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005651 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005652 ":asm_ukernels",
5653 ],
5654 generic_deps = [
5655 ":scalar_ukernels_test_mode",
5656 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005657 wasm_deps = [
5658 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005659 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005660 ],
5661 wasmsimd_deps = [
5662 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005663 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005664 ],
5665 x86_deps = [
5666 ":sse2_ukernels_test_mode",
5667 ":ssse3_ukernels_test_mode",
5668 ":sse41_ukernels_test_mode",
5669 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005670 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005671 ":fma3_ukernels_test_mode",
5672 ":avx2_ukernels_test_mode",
5673 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005674 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005675 ],
5676)
5677
Marat Dukhan08c4a432019-10-03 09:29:21 -07005678xnnpack_cc_library(
5679 name = "im2col",
5680 srcs = ["src/im2col.c"],
5681 hdrs = [
5682 "src/xnnpack/common.h",
5683 "src/xnnpack/im2col.h",
5684 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005685 gcc_copts = xnnpack_gcc_std_copts(),
5686 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005687)
5688
5689xnnpack_cc_library(
5690 name = "indirection",
5691 srcs = ["src/indirection.c"],
5692 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005693 gcc_copts = xnnpack_gcc_std_copts(),
5694 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005695 deps = [
5696 "@FP16",
5697 "@FXdiv",
5698 "@pthreadpool",
5699 ],
5700)
5701
5702xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005703 name = "indirection_test_mode",
5704 srcs = ["src/indirection.c"],
5705 hdrs = INTERNAL_HDRS,
5706 copts = [
5707 "-UNDEBUG",
5708 "-DXNN_TEST_MODE=1",
5709 ],
5710 gcc_copts = xnnpack_gcc_std_copts(),
5711 msvc_copts = xnnpack_msvc_std_copts(),
5712 deps = [
5713 "@FP16",
5714 "@FXdiv",
5715 "@pthreadpool",
5716 ],
5717)
5718
5719xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005720 name = "packing",
5721 srcs = ["src/packing.c"],
5722 hdrs = INTERNAL_HDRS,
5723 gcc_copts = xnnpack_gcc_std_copts(),
5724 msvc_copts = xnnpack_msvc_std_copts(),
5725 deps = [
5726 "@FP16",
5727 "@FXdiv",
5728 "@pthreadpool",
5729 ],
5730)
5731
5732xnnpack_cc_library(
5733 name = "packing_test_mode",
5734 srcs = ["src/packing.c"],
5735 hdrs = INTERNAL_HDRS,
5736 copts = [
5737 "-UNDEBUG",
5738 "-DXNN_TEST_MODE=1",
5739 ],
5740 gcc_copts = xnnpack_gcc_std_copts(),
5741 msvc_copts = xnnpack_msvc_std_copts(),
5742 deps = [
5743 "@FP16",
5744 "@FXdiv",
5745 "@pthreadpool",
5746 ],
5747)
5748
5749xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005750 name = "operator_run",
5751 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005752 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005753 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005754 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5755 "//conditions:default": [],
5756 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005757 gcc_copts = xnnpack_gcc_std_copts(),
5758 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005759 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005760 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005761 "@FP16",
5762 "@FXdiv",
5763 "@clog",
5764 "@pthreadpool",
5765 ],
5766)
5767
Chao Mei6ddfc602020-05-13 22:29:36 -07005768xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005769 name = "operator_run_test_mode",
5770 srcs = ["src/operator-run.c"],
5771 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5772 copts = LOGGING_COPTS + [
5773 "-UNDEBUG",
5774 "-DXNN_TEST_MODE=1",
5775 ] + select({
5776 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5777 "//conditions:default": [],
5778 }),
5779 gcc_copts = xnnpack_gcc_std_copts(),
5780 msvc_copts = xnnpack_msvc_std_copts(),
5781 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005782 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005783 "@FP16",
5784 "@FXdiv",
5785 "@clog",
5786 "@pthreadpool",
5787 ],
5788)
5789
5790xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005791 name = "memory_planner",
5792 srcs = ["src/memory-planner.c"],
5793 hdrs = INTERNAL_HDRS,
5794 defines = select({
5795 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5796 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5797 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5798 }),
5799 gcc_copts = xnnpack_gcc_std_copts(),
5800 msvc_copts = xnnpack_msvc_std_copts(),
5801 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005802 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005803 "@pthreadpool",
5804 ],
5805)
5806
Marat Dukhan33fcf782020-05-24 14:27:15 -07005807xnnpack_cc_library(
5808 name = "memory_planner_test_mode",
5809 srcs = ["src/memory-planner.c"],
5810 hdrs = INTERNAL_HDRS,
5811 copts = [
5812 "-UNDEBUG",
5813 "-DXNN_TEST_MODE=1",
5814 ],
5815 defines = select({
5816 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5817 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5818 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5819 }),
5820 gcc_copts = xnnpack_gcc_std_copts(),
5821 msvc_copts = xnnpack_msvc_std_copts(),
5822 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005823 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005824 "@pthreadpool",
5825 ],
5826)
5827
Marat Dukhan08c4a432019-10-03 09:29:21 -07005828cc_library(
5829 name = "enable_assembly",
5830 defines = select({
5831 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5832 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005833 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005834 }),
5835)
5836
Marat Dukhan9de90e02020-06-18 16:04:12 -07005837cc_library(
5838 name = "enable_sparse",
5839 defines = select({
5840 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5841 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005842 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005843 }),
5844)
5845
Marat Dukhancf056b22019-10-07 10:26:29 -07005846xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005847 name = "operators",
5848 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005849 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005850 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005851 ],
5852 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005853 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005854 "-Isrc",
5855 "-Iinclude",
5856 ] + select({
5857 ":debug_build": [],
5858 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005859 }) + select({
5860 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5861 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005862 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005863 gcc_copts = xnnpack_gcc_std_copts(),
5864 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005865 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005866 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005867 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005868 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005869 "@FP16",
5870 "@FXdiv",
5871 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005872 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005873 ],
5874)
5875
Marat Dukhan10a38082020-04-17 03:58:35 -07005876xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005877 name = "operators_test_mode",
5878 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005879 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005880 "src/operator-delete.c",
5881 ],
5882 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5883 copts = LOGGING_COPTS + [
5884 "-Isrc",
5885 "-Iinclude",
5886 "-UNDEBUG",
5887 "-DXNN_TEST_MODE=1",
5888 ] + select({
5889 ":debug_build": [],
5890 "//conditions:default": xnnpack_min_size_copts(),
5891 }) + select({
5892 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5893 "//conditions:default": [],
5894 }),
5895 gcc_copts = xnnpack_gcc_std_copts(),
5896 msvc_copts = xnnpack_msvc_std_copts(),
5897 deps = [
5898 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005899 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005900 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005901 "@FP16",
5902 "@FXdiv",
5903 "@clog",
5904 "@pthreadpool",
5905 ],
5906)
5907
5908xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005909 name = "XNNPACK",
5910 srcs = [
5911 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005912 "src/runtime.c",
5913 "src/subgraph.c",
5914 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005915 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005916 hdrs = ["include/xnnpack.h"],
5917 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005918 "-Isrc",
5919 "-Iinclude",
5920 ] + select({
5921 ":debug_build": [],
5922 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005923 }) + select({
5924 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5925 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005926 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005927 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005928 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005929 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005930 visibility = xnnpack_visibility(),
5931 deps = [
5932 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005933 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005934 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005935 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005936 ":operator_run",
5937 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005938 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005939 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005940 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005941 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005942 ] + select({
5943 ":emscripten": [],
5944 "//conditions:default": ["@cpuinfo"],
5945 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005946)
5947
Marat Dukhan10a38082020-04-17 03:58:35 -07005948xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005949 name = "XNNPACK_test_mode",
5950 srcs = [
5951 "src/init.c",
5952 "src/runtime.c",
5953 "src/subgraph.c",
5954 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005955 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005956 hdrs = ["include/xnnpack.h"],
5957 copts = LOGGING_COPTS + [
5958 "-Isrc",
5959 "-Iinclude",
5960 "-UNDEBUG",
5961 "-DXNN_TEST_MODE=1",
5962 ] + select({
5963 ":debug_build": [],
5964 "//conditions:default": xnnpack_min_size_copts(),
5965 }) + select({
5966 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5967 "//conditions:default": [],
5968 }),
5969 gcc_copts = xnnpack_gcc_std_copts(),
5970 includes = ["include"],
5971 msvc_copts = xnnpack_msvc_std_copts(),
5972 visibility = xnnpack_visibility(),
5973 deps = [
5974 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005975 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005976 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005977 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005978 ":operator_run_test_mode",
5979 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005980 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005981 "@clog",
5982 "@FP16",
5983 "@pthreadpool",
5984 ] + select({
5985 ":emscripten": [],
5986 "//conditions:default": ["@cpuinfo"],
5987 }),
5988)
5989
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005990# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5991# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005992xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005993 name = "xnnpack_for_tflite",
5994 srcs = [
5995 "src/init.c",
5996 "src/runtime.c",
5997 "src/subgraph.c",
5998 "src/tensor.c",
5999 ] + SUBGRAPH_SRCS,
6000 hdrs = ["include/xnnpack.h"],
6001 copts = LOGGING_COPTS + [
6002 "-Isrc",
6003 "-Iinclude",
6004 ] + select({
6005 ":debug_build": [],
6006 "//conditions:default": xnnpack_min_size_copts(),
6007 }) + select({
6008 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
6009 "//conditions:default": [],
6010 }),
6011 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006012 "XNN_NO_U8_OPERATORS",
6013 "XNN_NO_X8_OPERATORS",
6014 "XNN_NO_F16_OPERATORS",
6015 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07006016 ] + select({
6017 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07006018 ":xnn_enable_qs8_explicit_false": [
6019 "XNN_NO_QC8_OPERATORS",
6020 "XNN_NO_QS8_OPERATORS",
6021 ],
6022 "//conditions:default": [
6023 "XNN_NO_QC8_OPERATORS",
6024 "XNN_NO_QS8_OPERATORS",
6025 ],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07006026 }) + select({
6027 ":xnn_enable_qu8_explicit_true": [],
6028 ":xnn_enable_qu8_explicit_false": [
6029 "XNN_NO_QU8_OPERATORS",
6030 ],
6031 "//conditions:default": [
6032 "XNN_NO_QU8_OPERATORS",
6033 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07006034 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006035 gcc_copts = xnnpack_gcc_std_copts(),
6036 includes = ["include"],
6037 msvc_copts = xnnpack_msvc_std_copts(),
6038 visibility = xnnpack_visibility(),
6039 deps = [
6040 ":enable_assembly",
6041 ":enable_sparse",
6042 ":logging_utils",
6043 ":memory_planner",
6044 ":operator_run",
6045 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07006046 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006047 "@clog",
6048 "@FP16",
6049 "@pthreadpool",
6050 ] + select({
6051 ":emscripten": [],
6052 "//conditions:default": ["@cpuinfo"],
6053 }),
6054)
6055
6056# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
6057# not used by the TensorFlow.js WebAssembly backend to minimize code size.
6058xnnpack_cc_library(
6059 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006060 srcs = [
6061 "src/init.c",
6062 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07006063 hdrs = ["include/xnnpack.h"],
6064 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006065 "-Isrc",
6066 "-Iinclude",
6067 ] + select({
6068 ":debug_build": [],
6069 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07006070 }) + select({
6071 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
6072 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006073 }),
6074 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07006075 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07006076 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006077 "XNN_NO_U8_OPERATORS",
6078 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08006079 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006080 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07006081 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006082 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07006083 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006084 visibility = xnnpack_visibility(),
6085 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006086 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07006087 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006088 ":operator_run",
6089 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07006090 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006091 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006092 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006093 ] + select({
6094 ":emscripten": [],
6095 "//conditions:default": ["@cpuinfo"],
6096 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006097)
6098
Marat Dukhancf056b22019-10-07 10:26:29 -07006099xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006100 name = "bench_utils",
6101 srcs = ["bench/utils.cc"],
6102 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08006103 deps = [
6104 "@com_google_benchmark//:benchmark",
6105 "@cpuinfo",
6106 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006107)
6108
Frank Barchard7e955972019-10-11 10:34:25 -07006109######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07006110
6111xnnpack_benchmark(
Marat Dukhan0744fa02021-07-26 22:56:27 -07006112 name = "qs8_dwconv_bench",
6113 srcs = [
6114 "bench/dwconv.h",
6115 "bench/qs8-dwconv.cc",
6116 "src/xnnpack/AlignedAllocator.h",
6117 ] + MICROKERNEL_BENCHMARK_HDRS,
6118 deps = MICROKERNEL_BENCHMARK_DEPS + [
6119 ":indirection",
6120 ":packing",
6121 ],
6122)
6123
6124xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07006125 name = "qs8_gemm_bench",
6126 srcs = [
6127 "bench/gemm.h",
6128 "bench/qs8-gemm.cc",
6129 "src/xnnpack/AlignedAllocator.h",
6130 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07006131 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
6132 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07006133)
6134
6135xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006136 name = "qs8_requantization_bench",
6137 srcs = [
6138 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006139 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006140 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006141 ] + MICROKERNEL_BENCHMARK_HDRS,
6142 deps = MICROKERNEL_BENCHMARK_DEPS,
6143)
6144
6145xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07006146 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006147 srcs = [
6148 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07006149 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006150 "src/xnnpack/AlignedAllocator.h",
6151 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006152 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006153 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006154)
6155
6156xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006157 name = "qu8_requantization_bench",
6158 srcs = [
6159 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006160 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006161 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006162 ] + MICROKERNEL_BENCHMARK_HDRS,
6163 deps = MICROKERNEL_BENCHMARK_DEPS,
6164)
6165
6166xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07006167 name = "f16_igemm_bench",
6168 srcs = [
6169 "bench/f16-igemm.cc",
6170 "bench/conv.h",
6171 "bench/google/conv.h",
6172 "src/xnnpack/AlignedAllocator.h",
6173 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006174 deps = MICROKERNEL_BENCHMARK_DEPS + [
6175 ":indirection",
6176 ":packing",
6177 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07006178)
6179
6180xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006181 name = "f16_gemm_bench",
6182 srcs = [
6183 "bench/f16-gemm.cc",
6184 "bench/gemm.h",
6185 "src/xnnpack/AlignedAllocator.h",
6186 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006187 deps = MICROKERNEL_BENCHMARK_DEPS + [
6188 ":packing",
6189 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006190)
6191
6192xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006193 name = "f16_spmm_bench",
6194 srcs = [
6195 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006196 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006197 "src/xnnpack/AlignedAllocator.h",
6198 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006199 deps = MICROKERNEL_BENCHMARK_DEPS,
6200)
6201
6202xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006203 name = "f16_vrelu_bench",
6204 srcs = [
6205 "bench/f16-vrelu.cc",
6206 "src/xnnpack/AlignedAllocator.h",
6207 ] + MICROKERNEL_BENCHMARK_HDRS,
6208 deps = MICROKERNEL_BENCHMARK_DEPS,
6209)
6210
6211xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006212 name = "f32_igemm_bench",
6213 srcs = [
6214 "bench/f32-igemm.cc",
6215 "bench/conv.h",
6216 "src/xnnpack/AlignedAllocator.h",
6217 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006218 deps = MICROKERNEL_BENCHMARK_DEPS + [
6219 ":indirection",
6220 ":packing",
6221 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006222)
6223
6224xnnpack_benchmark(
6225 name = "f32_conv_hwc_bench",
6226 srcs = [
6227 "bench/f32-conv-hwc.cc",
6228 "bench/dconv.h",
6229 "src/xnnpack/AlignedAllocator.h",
6230 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006231 deps = MICROKERNEL_BENCHMARK_DEPS + [
6232 ":packing",
6233 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006234)
6235
6236xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006237 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07006238 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006239 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07006240 "bench/dconv.h",
6241 "src/xnnpack/AlignedAllocator.h",
6242 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006243 deps = MICROKERNEL_BENCHMARK_DEPS + [
6244 ":packing",
6245 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07006246)
6247
6248xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07006249 name = "f16_dwconv_bench",
6250 srcs = [
6251 "bench/f16-dwconv.cc",
6252 "bench/dwconv.h",
6253 "bench/google/dwconv.h",
6254 "src/xnnpack/AlignedAllocator.h",
6255 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006256 deps = MICROKERNEL_BENCHMARK_DEPS + [
6257 ":indirection",
6258 ":packing",
6259 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07006260)
6261
6262xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006263 name = "f32_dwconv_bench",
6264 srcs = [
6265 "bench/f32-dwconv.cc",
6266 "bench/dwconv.h",
6267 "src/xnnpack/AlignedAllocator.h",
6268 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006269 deps = MICROKERNEL_BENCHMARK_DEPS + [
6270 ":indirection",
6271 ":packing",
6272 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006273)
6274
6275xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006276 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006277 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006278 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006279 "bench/dwconv.h",
6280 "src/xnnpack/AlignedAllocator.h",
6281 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006282 deps = MICROKERNEL_BENCHMARK_DEPS + [
6283 ":indirection",
6284 ":packing",
6285 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006286)
6287
6288xnnpack_benchmark(
6289 name = "f32_gemm_bench",
6290 srcs = [
6291 "bench/f32-gemm.cc",
6292 "bench/gemm.h",
6293 "src/xnnpack/AlignedAllocator.h",
6294 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006295 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006296 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006297)
6298
6299xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006300 name = "f32_raddexpminusmax_bench",
6301 srcs = [
6302 "bench/f32-raddexpminusmax.cc",
6303 "src/xnnpack/AlignedAllocator.h",
6304 ] + MICROKERNEL_BENCHMARK_HDRS,
6305 deps = MICROKERNEL_BENCHMARK_DEPS,
6306)
6307
6308xnnpack_benchmark(
6309 name = "f32_raddextexp_bench",
6310 srcs = [
6311 "bench/f32-raddextexp.cc",
6312 "src/xnnpack/AlignedAllocator.h",
6313 ] + MICROKERNEL_BENCHMARK_HDRS,
6314 deps = MICROKERNEL_BENCHMARK_DEPS,
6315)
6316
6317xnnpack_benchmark(
6318 name = "f32_raddstoreexpminusmax_bench",
6319 srcs = [
6320 "bench/f32-raddstoreexpminusmax.cc",
6321 "src/xnnpack/AlignedAllocator.h",
6322 ] + MICROKERNEL_BENCHMARK_HDRS,
6323 deps = MICROKERNEL_BENCHMARK_DEPS,
6324)
6325
6326xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006327 name = "f32_rmax_bench",
6328 srcs = [
6329 "bench/f32-rmax.cc",
6330 "src/xnnpack/AlignedAllocator.h",
6331 ] + MICROKERNEL_BENCHMARK_HDRS,
6332 deps = MICROKERNEL_BENCHMARK_DEPS,
6333)
6334
6335xnnpack_benchmark(
6336 name = "f32_spmm_bench",
6337 srcs = [
6338 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006339 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006340 "src/xnnpack/AlignedAllocator.h",
6341 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006342 deps = MICROKERNEL_BENCHMARK_DEPS,
6343)
6344
6345xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006346 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006347 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006348 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006349 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006350 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006351 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006352)
6353
6354xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006355 name = "f32_velu_bench",
6356 srcs = [
6357 "bench/f32-velu.cc",
6358 "src/xnnpack/AlignedAllocator.h",
6359 ] + MICROKERNEL_BENCHMARK_HDRS,
6360 deps = MICROKERNEL_BENCHMARK_DEPS,
6361)
6362
6363xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006364 name = "f32_vhswish_bench",
6365 srcs = [
6366 "bench/f32-vhswish.cc",
6367 "src/xnnpack/AlignedAllocator.h",
6368 ] + MICROKERNEL_BENCHMARK_HDRS,
6369 deps = MICROKERNEL_BENCHMARK_DEPS,
6370)
6371
6372xnnpack_benchmark(
6373 name = "f32_vrelu_bench",
6374 srcs = [
6375 "bench/f32-vrelu.cc",
6376 "src/xnnpack/AlignedAllocator.h",
6377 ] + MICROKERNEL_BENCHMARK_HDRS,
6378 deps = MICROKERNEL_BENCHMARK_DEPS,
6379)
6380
6381xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006382 name = "f32_vscaleexpminusmax_bench",
6383 srcs = [
6384 "bench/f32-vscaleexpminusmax.cc",
6385 "src/xnnpack/AlignedAllocator.h",
6386 ] + MICROKERNEL_BENCHMARK_HDRS,
6387 deps = MICROKERNEL_BENCHMARK_DEPS,
6388)
6389
6390xnnpack_benchmark(
6391 name = "f32_vscaleextexp_bench",
6392 srcs = [
6393 "bench/f32-vscaleextexp.cc",
6394 "src/xnnpack/AlignedAllocator.h",
6395 ] + MICROKERNEL_BENCHMARK_HDRS,
6396 deps = MICROKERNEL_BENCHMARK_DEPS,
6397)
6398
6399xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006400 name = "f32_vsigmoid_bench",
6401 srcs = [
6402 "bench/f32-vsigmoid.cc",
6403 "src/xnnpack/AlignedAllocator.h",
6404 ] + MICROKERNEL_BENCHMARK_HDRS,
6405 deps = MICROKERNEL_BENCHMARK_DEPS,
6406)
6407
6408xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006409 name = "f32_vsqrt_bench",
6410 srcs = [
6411 "bench/f32-vsqrt.cc",
6412 "src/xnnpack/AlignedAllocator.h",
6413 ] + MICROKERNEL_BENCHMARK_HDRS,
6414 deps = MICROKERNEL_BENCHMARK_DEPS,
6415)
6416
6417xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006418 name = "f32_im2col_gemm_bench",
6419 srcs = [
6420 "bench/f32-im2col-gemm.cc",
6421 "bench/conv.h",
6422 "src/xnnpack/AlignedAllocator.h",
6423 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006424 deps = MICROKERNEL_BENCHMARK_DEPS + [
6425 ":im2col",
6426 ":packing",
6427 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006428)
6429
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006430xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006431 name = "rounding_bench",
6432 srcs = [
6433 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006434 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006435 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006436 ] + MICROKERNEL_BENCHMARK_HDRS,
6437 deps = MICROKERNEL_BENCHMARK_DEPS,
6438)
6439
Marat Dukhan08c4a432019-10-03 09:29:21 -07006440########################### Benchmarks for operators ###########################
6441
6442xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006443 name = "average_pooling_bench",
6444 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006445 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006446 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006447 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006448)
6449
6450xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006451 name = "bankers_rounding_bench",
6452 srcs = ["bench/bankers-rounding.cc"],
6453 copts = xnnpack_optional_tflite_copts(),
6454 tags = ["nowin32"],
6455 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6456)
6457
6458xnnpack_benchmark(
6459 name = "ceiling_bench",
6460 srcs = ["bench/ceiling.cc"],
6461 copts = xnnpack_optional_tflite_copts(),
6462 tags = ["nowin32"],
6463 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6464)
6465
6466xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006467 name = "channel_shuffle_bench",
6468 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006469 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006470)
6471
6472xnnpack_benchmark(
6473 name = "convolution_bench",
6474 srcs = ["bench/convolution.cc"],
6475 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006476 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006477 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006478)
6479
6480xnnpack_benchmark(
6481 name = "deconvolution_bench",
6482 srcs = ["bench/deconvolution.cc"],
6483 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006484 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006485 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006486)
6487
6488xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006489 name = "elu_bench",
6490 srcs = ["bench/elu.cc"],
6491 copts = xnnpack_optional_tflite_copts(),
6492 tags = ["nowin32"],
6493 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6494)
6495
6496xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006497 name = "floor_bench",
6498 srcs = ["bench/floor.cc"],
6499 copts = xnnpack_optional_tflite_copts(),
6500 tags = ["nowin32"],
6501 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6502)
6503
6504xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006505 name = "global_average_pooling_bench",
6506 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006507 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006508)
6509
6510xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006511 name = "hardswish_bench",
6512 srcs = ["bench/hardswish.cc"],
6513 copts = xnnpack_optional_tflite_copts(),
6514 tags = ["nowin32"],
6515 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6516)
6517
6518xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006519 name = "max_pooling_bench",
6520 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006521 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006522)
6523
6524xnnpack_benchmark(
6525 name = "sigmoid_bench",
6526 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006527 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006528 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006529 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006530)
6531
6532xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006533 name = "prelu_bench",
6534 srcs = ["bench/prelu.cc"],
6535 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006536 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006537 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006538)
6539
6540xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006541 name = "softmax_bench",
6542 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006543 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006544 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006545 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006546)
6547
Marat Dukhan87727142020-06-24 15:24:10 -07006548xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006549 name = "square_root_bench",
6550 srcs = ["bench/square-root.cc"],
6551 copts = xnnpack_optional_tflite_copts(),
6552 tags = ["nowin32"],
6553 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6554)
6555
6556xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006557 name = "truncation_bench",
6558 srcs = ["bench/truncation.cc"],
6559 deps = OPERATOR_BENCHMARK_DEPS,
6560)
6561
Marat Dukhanc068bb62019-10-04 13:24:39 -07006562############################# End-to-end benchmarks ############################
6563
6564cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006565 name = "fp32_mobilenet_v1",
6566 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006567 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006568 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006569 linkstatic = True,
6570 deps = [
6571 ":XNNPACK",
6572 "@pthreadpool",
6573 ],
6574)
6575
6576cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006577 name = "fp32_sparse_mobilenet_v1",
6578 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6579 hdrs = ["models/models.h"],
6580 copts = xnnpack_std_cxxopts(),
6581 linkstatic = True,
6582 deps = [
6583 ":XNNPACK",
6584 "@pthreadpool",
6585 ],
6586)
6587
6588cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006589 name = "fp16_mobilenet_v1",
6590 srcs = ["models/fp16-mobilenet-v1.cc"],
6591 hdrs = ["models/models.h"],
6592 copts = xnnpack_std_cxxopts(),
6593 linkstatic = True,
6594 deps = [
6595 ":XNNPACK",
6596 "@FP16",
6597 "@pthreadpool",
6598 ],
6599)
6600
6601cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006602 name = "qs8_mobilenet_v1",
6603 srcs = ["models/qs8-mobilenet-v1.cc"],
6604 hdrs = ["models/models.h"],
6605 copts = xnnpack_std_cxxopts(),
6606 linkstatic = True,
6607 deps = [
6608 ":XNNPACK",
6609 "@pthreadpool",
6610 ],
6611)
6612
6613cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006614 name = "qs8_mobilenet_v2",
6615 srcs = ["models/qs8-mobilenet-v2.cc"],
6616 hdrs = ["models/models.h"],
6617 copts = xnnpack_std_cxxopts(),
6618 linkstatic = True,
6619 deps = [
6620 ":XNNPACK",
6621 "@pthreadpool",
6622 ],
6623)
6624
6625cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006626 name = "qu8_mobilenet_v1",
6627 srcs = ["models/qu8-mobilenet-v1.cc"],
6628 hdrs = ["models/models.h"],
6629 copts = xnnpack_std_cxxopts(),
6630 linkstatic = True,
6631 deps = [
6632 ":XNNPACK",
6633 "@pthreadpool",
6634 ],
6635)
6636
6637cc_library(
Marat Dukhan036b2b12021-07-21 01:12:58 -07006638 name = "qu8_mobilenet_v2",
6639 srcs = ["models/qu8-mobilenet-v2.cc"],
6640 hdrs = ["models/models.h"],
6641 copts = xnnpack_std_cxxopts(),
6642 linkstatic = True,
6643 deps = [
6644 ":XNNPACK",
6645 "@pthreadpool",
6646 ],
6647)
6648
6649cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006650 name = "fp32_mobilenet_v2",
6651 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006652 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006653 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006654 linkstatic = True,
6655 deps = [
6656 ":XNNPACK",
6657 "@pthreadpool",
6658 ],
6659)
6660
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006661cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006662 name = "fp32_sparse_mobilenet_v2",
6663 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6664 hdrs = ["models/models.h"],
6665 copts = xnnpack_std_cxxopts(),
6666 linkstatic = True,
6667 deps = [
6668 ":XNNPACK",
6669 "@pthreadpool",
6670 ],
6671)
6672
6673cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006674 name = "fp16_mobilenet_v2",
6675 srcs = ["models/fp16-mobilenet-v2.cc"],
6676 hdrs = ["models/models.h"],
6677 copts = xnnpack_std_cxxopts(),
6678 linkstatic = True,
6679 deps = [
6680 ":XNNPACK",
6681 "@FP16",
6682 "@pthreadpool",
6683 ],
6684)
6685
6686cc_library(
6687 name = "fp32_mobilenet_v3_large",
6688 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006689 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006690 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006691 linkstatic = True,
6692 deps = [
6693 ":XNNPACK",
6694 "@pthreadpool",
6695 ],
6696)
6697
6698cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006699 name = "fp32_sparse_mobilenet_v3_large",
6700 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6701 hdrs = ["models/models.h"],
6702 copts = xnnpack_std_cxxopts(),
6703 linkstatic = True,
6704 deps = [
6705 ":XNNPACK",
6706 "@pthreadpool",
6707 ],
6708)
6709
6710cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006711 name = "fp16_mobilenet_v3_large",
6712 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6713 hdrs = ["models/models.h"],
6714 copts = xnnpack_std_cxxopts(),
6715 linkstatic = True,
6716 deps = [
6717 ":XNNPACK",
6718 "@FP16",
6719 "@pthreadpool",
6720 ],
6721)
6722
6723cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006724 name = "fp32_mobilenet_v3_small",
6725 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006726 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006727 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006728 linkstatic = True,
6729 deps = [
6730 ":XNNPACK",
6731 "@pthreadpool",
6732 ],
6733)
6734
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006735cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006736 name = "fp32_sparse_mobilenet_v3_small",
6737 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6738 hdrs = ["models/models.h"],
6739 copts = xnnpack_std_cxxopts(),
6740 linkstatic = True,
6741 deps = [
6742 ":XNNPACK",
6743 "@pthreadpool",
6744 ],
6745)
6746
6747cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006748 name = "fp16_mobilenet_v3_small",
6749 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6750 hdrs = ["models/models.h"],
6751 copts = xnnpack_std_cxxopts(),
6752 linkstatic = True,
6753 deps = [
6754 ":XNNPACK",
6755 "@FP16",
6756 "@pthreadpool",
6757 ],
6758)
6759
Marat Dukhanc068bb62019-10-04 13:24:39 -07006760xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006761 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006762 srcs = [
6763 "bench/f32-dwconv-e2e.cc",
6764 "bench/end2end.h",
6765 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006766 deps = MICROKERNEL_BENCHMARK_DEPS + [
6767 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006768 ":fp32_mobilenet_v1",
6769 ":fp32_mobilenet_v2",
6770 ":fp32_mobilenet_v3_large",
6771 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006772 ],
6773)
6774
6775xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006776 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006777 srcs = [
6778 "bench/f32-gemm-e2e.cc",
6779 "bench/end2end.h",
6780 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006781 deps = MICROKERNEL_BENCHMARK_DEPS + [
6782 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006783 ":fp32_mobilenet_v1",
6784 ":fp32_mobilenet_v2",
6785 ":fp32_mobilenet_v3_large",
6786 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006787 ],
6788)
6789
6790xnnpack_benchmark(
Marat Dukhanbbfc6d32021-07-26 18:31:02 -07006791 name = "qs8_dwconv_e2e_bench",
6792 srcs = [
6793 "bench/qs8-dwconv-e2e.cc",
6794 "bench/end2end.h",
6795 ] + MICROKERNEL_BENCHMARK_HDRS,
6796 deps = MICROKERNEL_BENCHMARK_DEPS + [
6797 ":XNNPACK",
6798 ":qs8_mobilenet_v1",
6799 ":qs8_mobilenet_v2",
6800 ],
6801)
6802
6803xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006804 name = "qs8_gemm_e2e_bench",
6805 srcs = [
6806 "bench/qs8-gemm-e2e.cc",
6807 "bench/end2end.h",
6808 ] + MICROKERNEL_BENCHMARK_HDRS,
6809 deps = MICROKERNEL_BENCHMARK_DEPS + [
6810 ":XNNPACK",
6811 ":qs8_mobilenet_v1",
6812 ":qs8_mobilenet_v2",
6813 ],
6814)
6815
6816xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006817 name = "end2end_bench",
6818 srcs = ["bench/end2end.cc"],
6819 deps = [
6820 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006821 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006822 ":fp16_mobilenet_v1",
6823 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006824 ":fp16_mobilenet_v3_large",
6825 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006826 ":fp32_mobilenet_v1",
6827 ":fp32_mobilenet_v2",
6828 ":fp32_mobilenet_v3_large",
6829 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006830 ":fp32_sparse_mobilenet_v1",
6831 ":fp32_sparse_mobilenet_v2",
6832 ":fp32_sparse_mobilenet_v3_large",
6833 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006834 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006835 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006836 ":qu8_mobilenet_v1",
Marat Dukhan036b2b12021-07-21 01:12:58 -07006837 ":qu8_mobilenet_v2",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006838 "@pthreadpool",
6839 ],
6840)
6841
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006842#################### Accuracy evaluation for math functions ####################
6843
6844xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006845 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006846 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006847 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006848 "src/xnnpack/AlignedAllocator.h",
6849 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006850 deps = ACCURACY_EVAL_DEPS + [
6851 ":bench_utils",
6852 "@cpuinfo",
6853 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006854)
6855
Marat Dukhan515c9772019-10-17 18:07:57 -07006856xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006857 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006858 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006859 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006860 "src/xnnpack/AlignedAllocator.h",
6861 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006862 deps = ACCURACY_EVAL_DEPS + [
6863 ":bench_utils",
6864 "@cpuinfo",
6865 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006866)
6867
Marat Dukhan98ba4412019-10-23 02:14:28 -07006868xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006869 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006870 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006871 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006872 "src/xnnpack/AlignedAllocator.h",
6873 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006874 deps = ACCURACY_EVAL_DEPS + [
6875 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006876 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006877 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006878)
6879
6880xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006881 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006882 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006883 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006884 "src/xnnpack/AlignedAllocator.h",
6885 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006886 deps = ACCURACY_EVAL_DEPS + [
6887 ":bench_utils",
6888 "@cpuinfo",
6889 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006890)
6891
Marat Dukhanf44f0222020-12-14 11:53:27 -08006892xnnpack_benchmark(
6893 name = "f32_sigmoid_ulp_eval",
6894 srcs = [
6895 "eval/f32-sigmoid-ulp.cc",
6896 "src/xnnpack/AlignedAllocator.h",
6897 ] + ACCURACY_EVAL_HDRS,
6898 deps = ACCURACY_EVAL_DEPS + [
6899 ":bench_utils",
6900 "@cpuinfo",
6901 ],
6902)
6903
6904xnnpack_benchmark(
6905 name = "f32_sqrt_ulp_eval",
6906 srcs = [
6907 "eval/f32-sqrt-ulp.cc",
6908 "src/xnnpack/AlignedAllocator.h",
6909 ] + ACCURACY_EVAL_HDRS,
6910 deps = ACCURACY_EVAL_DEPS + [
6911 ":bench_utils",
6912 "@cpuinfo",
6913 ],
6914)
6915
6916################### Accuracy verification for math functions ##################
6917
6918xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006919 name = "f32_exp_eval",
6920 srcs = [
6921 "eval/f32-exp.cc",
6922 "src/xnnpack/AlignedAllocator.h",
6923 "src/xnnpack/math-stubs.h",
6924 ] + MICROKERNEL_TEST_HDRS,
6925 automatic = False,
6926 deps = MICROKERNEL_TEST_DEPS,
6927)
6928
6929xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006930 name = "f32_expm1minus_eval",
6931 srcs = [
6932 "eval/f32-expm1minus.cc",
6933 "src/xnnpack/AlignedAllocator.h",
6934 "src/xnnpack/math-stubs.h",
6935 ] + MICROKERNEL_TEST_HDRS,
6936 automatic = False,
6937 deps = MICROKERNEL_TEST_DEPS,
6938)
6939
Marat Dukhan8853b822020-05-07 12:19:01 -07006940xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006941 name = "f32_expminus_eval",
6942 srcs = [
6943 "eval/f32-expminus.cc",
6944 "src/xnnpack/AlignedAllocator.h",
6945 "src/xnnpack/math-stubs.h",
6946 ] + MICROKERNEL_TEST_HDRS,
6947 automatic = False,
6948 deps = MICROKERNEL_TEST_DEPS,
6949)
6950
6951xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006952 name = "f32_roundne_eval",
6953 srcs = [
6954 "eval/f32-roundne.cc",
6955 "src/xnnpack/AlignedAllocator.h",
6956 "src/xnnpack/math-stubs.h",
6957 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006958 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006959 deps = MICROKERNEL_TEST_DEPS,
6960)
6961
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006962xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006963 name = "f32_roundd_eval",
6964 srcs = [
6965 "eval/f32-roundd.cc",
6966 "src/xnnpack/AlignedAllocator.h",
6967 "src/xnnpack/math-stubs.h",
6968 ] + MICROKERNEL_TEST_HDRS,
6969 automatic = False,
6970 deps = MICROKERNEL_TEST_DEPS,
6971)
6972
6973xnnpack_unit_test(
6974 name = "f32_roundu_eval",
6975 srcs = [
6976 "eval/f32-roundu.cc",
6977 "src/xnnpack/AlignedAllocator.h",
6978 "src/xnnpack/math-stubs.h",
6979 ] + MICROKERNEL_TEST_HDRS,
6980 automatic = False,
6981 deps = MICROKERNEL_TEST_DEPS,
6982)
6983
6984xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006985 name = "f32_roundz_eval",
6986 srcs = [
6987 "eval/f32-roundz.cc",
6988 "src/xnnpack/AlignedAllocator.h",
6989 "src/xnnpack/math-stubs.h",
6990 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006991 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006992 deps = MICROKERNEL_TEST_DEPS,
6993)
6994
Marat Dukhan08c4a432019-10-03 09:29:21 -07006995######################### Unit tests for micro-kernels #########################
6996
6997xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006998 name = "f16_dwconv_minmax_test",
6999 srcs = [
7000 "test/f16-dwconv-minmax.cc",
7001 "test/dwconv-microkernel-tester.h",
7002 "src/xnnpack/AlignedAllocator.h",
7003 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7004 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7005)
7006
7007xnnpack_unit_test(
7008 name = "f16_gavgpool_minmax_test",
7009 srcs = [
7010 "test/f16-gavgpool-minmax.cc",
7011 "test/gavgpool-microkernel-tester.h",
7012 "src/xnnpack/AlignedAllocator.h",
7013 ] + MICROKERNEL_TEST_HDRS,
7014 deps = MICROKERNEL_TEST_DEPS,
7015)
7016
7017xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07007018 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007019 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07007020 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007021 "test/gemm-microkernel-tester.h",
7022 "src/xnnpack/AlignedAllocator.h",
7023 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007024 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007025)
7026
7027xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007028 name = "f16_igemm_minmax_test",
7029 srcs = [
7030 "test/f16-igemm-minmax.cc",
7031 "test/gemm-microkernel-tester.h",
7032 "src/xnnpack/AlignedAllocator.h",
7033 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7034 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7035)
7036
7037xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007038 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08007039 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007040 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08007041 "test/spmm-microkernel-tester.h",
7042 "src/xnnpack/AlignedAllocator.h",
7043 ] + MICROKERNEL_TEST_HDRS,
7044 deps = MICROKERNEL_TEST_DEPS,
7045)
7046
7047xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007048 name = "f16_vadd_minmax_test",
7049 srcs = [
7050 "test/f16-vadd-minmax.cc",
7051 "test/vbinary-microkernel-tester.h",
7052 ] + MICROKERNEL_TEST_HDRS,
7053 deps = MICROKERNEL_TEST_DEPS,
7054)
7055
7056xnnpack_unit_test(
7057 name = "f16_vaddc_minmax_test",
7058 srcs = [
7059 "test/f16-vaddc-minmax.cc",
7060 "test/vbinaryc-microkernel-tester.h",
7061 ] + MICROKERNEL_TEST_HDRS,
7062 deps = MICROKERNEL_TEST_DEPS,
7063)
7064
7065xnnpack_unit_test(
7066 name = "f16_vclamp_test",
7067 srcs = [
7068 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007069 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007070 ] + MICROKERNEL_TEST_HDRS,
7071 deps = MICROKERNEL_TEST_DEPS,
7072)
7073
7074xnnpack_unit_test(
7075 name = "f16_vdiv_minmax_test",
7076 srcs = [
7077 "test/f16-vdiv-minmax.cc",
7078 "test/vbinary-microkernel-tester.h",
7079 ] + MICROKERNEL_TEST_HDRS,
7080 deps = MICROKERNEL_TEST_DEPS,
7081)
7082
7083xnnpack_unit_test(
7084 name = "f16_vdivc_minmax_test",
7085 srcs = [
7086 "test/f16-vdivc-minmax.cc",
7087 "test/vbinaryc-microkernel-tester.h",
7088 ] + MICROKERNEL_TEST_HDRS,
7089 deps = MICROKERNEL_TEST_DEPS,
7090)
7091
7092xnnpack_unit_test(
7093 name = "f16_vrdivc_minmax_test",
7094 srcs = [
7095 "test/f16-vrdivc-minmax.cc",
7096 "test/vbinaryc-microkernel-tester.h",
7097 ] + MICROKERNEL_TEST_HDRS,
7098 deps = MICROKERNEL_TEST_DEPS,
7099)
7100
7101xnnpack_unit_test(
7102 name = "f16_vhswish_test",
7103 srcs = [
7104 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007105 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007106 ] + MICROKERNEL_TEST_HDRS,
7107 deps = MICROKERNEL_TEST_DEPS,
7108)
7109
7110xnnpack_unit_test(
7111 name = "f16_vmax_test",
7112 srcs = [
7113 "test/f16-vmax.cc",
7114 "test/vbinary-microkernel-tester.h",
7115 ] + MICROKERNEL_TEST_HDRS,
7116 deps = MICROKERNEL_TEST_DEPS,
7117)
7118
7119xnnpack_unit_test(
7120 name = "f16_vmaxc_test",
7121 srcs = [
7122 "test/f16-vmaxc.cc",
7123 "test/vbinaryc-microkernel-tester.h",
7124 ] + MICROKERNEL_TEST_HDRS,
7125 deps = MICROKERNEL_TEST_DEPS,
7126)
7127
7128xnnpack_unit_test(
7129 name = "f16_vmin_test",
7130 srcs = [
7131 "test/f16-vmin.cc",
7132 "test/vbinary-microkernel-tester.h",
7133 ] + MICROKERNEL_TEST_HDRS,
7134 deps = MICROKERNEL_TEST_DEPS,
7135)
7136
7137xnnpack_unit_test(
7138 name = "f16_vminc_test",
7139 srcs = [
7140 "test/f16-vminc.cc",
7141 "test/vbinaryc-microkernel-tester.h",
7142 ] + MICROKERNEL_TEST_HDRS,
7143 deps = MICROKERNEL_TEST_DEPS,
7144)
7145
7146xnnpack_unit_test(
7147 name = "f16_vmul_minmax_test",
7148 srcs = [
7149 "test/f16-vmul-minmax.cc",
7150 "test/vbinary-microkernel-tester.h",
7151 ] + MICROKERNEL_TEST_HDRS,
7152 deps = MICROKERNEL_TEST_DEPS,
7153)
7154
7155xnnpack_unit_test(
7156 name = "f16_vmulc_minmax_test",
7157 srcs = [
7158 "test/f16-vmulc-minmax.cc",
7159 "test/vbinaryc-microkernel-tester.h",
7160 ] + MICROKERNEL_TEST_HDRS,
7161 deps = MICROKERNEL_TEST_DEPS,
7162)
7163
7164xnnpack_unit_test(
7165 name = "f16_vmulcaddc_minmax_test",
7166 srcs = [
7167 "test/f16-vmulcaddc-minmax.cc",
7168 "test/vmulcaddc-microkernel-tester.h",
7169 "src/xnnpack/AlignedAllocator.h",
7170 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7171 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7172)
7173
7174xnnpack_unit_test(
7175 name = "f16_vsub_minmax_test",
7176 srcs = [
7177 "test/f16-vsub-minmax.cc",
7178 "test/vbinary-microkernel-tester.h",
7179 ] + MICROKERNEL_TEST_HDRS,
7180 deps = MICROKERNEL_TEST_DEPS,
7181)
7182
7183xnnpack_unit_test(
7184 name = "f16_vsubc_minmax_test",
7185 srcs = [
7186 "test/f16-vsubc-minmax.cc",
7187 "test/vbinaryc-microkernel-tester.h",
7188 ] + MICROKERNEL_TEST_HDRS,
7189 deps = MICROKERNEL_TEST_DEPS,
7190)
7191
7192xnnpack_unit_test(
7193 name = "f16_vrsubc_minmax_test",
7194 srcs = [
7195 "test/f16-vrsubc-minmax.cc",
7196 "test/vbinaryc-microkernel-tester.h",
7197 ] + MICROKERNEL_TEST_HDRS,
7198 deps = MICROKERNEL_TEST_DEPS,
7199)
7200
7201xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007202 name = "f32_argmaxpool_test",
7203 srcs = [
7204 "test/f32-argmaxpool.cc",
7205 "test/argmaxpool-microkernel-tester.h",
7206 "src/xnnpack/AlignedAllocator.h",
7207 ] + MICROKERNEL_TEST_HDRS,
7208 deps = MICROKERNEL_TEST_DEPS,
7209)
7210
7211xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007212 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007213 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007214 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007215 "test/avgpool-microkernel-tester.h",
7216 "src/xnnpack/AlignedAllocator.h",
7217 ] + MICROKERNEL_TEST_HDRS,
7218 deps = MICROKERNEL_TEST_DEPS,
7219)
7220
7221xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07007222 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007223 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07007224 "test/f32-ibilinear.cc",
7225 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007226 "src/xnnpack/AlignedAllocator.h",
7227 ] + MICROKERNEL_TEST_HDRS,
7228 deps = MICROKERNEL_TEST_DEPS,
7229)
7230
7231xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07007232 name = "f32_ibilinear_chw_test",
7233 srcs = [
7234 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07007235 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07007236 "src/xnnpack/AlignedAllocator.h",
7237 ] + MICROKERNEL_TEST_HDRS,
7238 deps = MICROKERNEL_TEST_DEPS,
7239)
7240
7241xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007242 name = "f32_igemm_test",
7243 srcs = [
7244 "test/f32-igemm.cc",
7245 "test/gemm-microkernel-tester.h",
7246 "src/xnnpack/AlignedAllocator.h",
7247 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007248 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007249)
7250
7251xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007252 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007253 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07007254 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007255 "test/gemm-microkernel-tester.h",
7256 "src/xnnpack/AlignedAllocator.h",
7257 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007258 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007259)
7260
7261xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07007262 name = "f32_igemm_minmax_test",
7263 srcs = [
7264 "test/f32-igemm-minmax.cc",
7265 "test/gemm-microkernel-tester.h",
7266 "src/xnnpack/AlignedAllocator.h",
7267 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007268 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07007269)
7270
7271xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007272 name = "f32_conv_hwc_test",
7273 srcs = [
7274 "test/f32-conv-hwc.cc",
7275 "test/conv-hwc-microkernel-tester.h",
7276 "src/xnnpack/AlignedAllocator.h",
7277 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007278 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007279)
7280
7281xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007282 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007283 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007284 "test/f32-conv-hwc2chw.cc",
7285 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007286 "src/xnnpack/AlignedAllocator.h",
7287 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007288 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007289)
7290
7291xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007292 name = "f32_dwconv_test",
7293 srcs = [
7294 "test/f32-dwconv.cc",
7295 "test/dwconv-microkernel-tester.h",
7296 "src/xnnpack/AlignedAllocator.h",
7297 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007298 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007299)
7300
7301xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007302 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007303 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007304 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007305 "test/dwconv-microkernel-tester.h",
7306 "src/xnnpack/AlignedAllocator.h",
7307 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007308 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007309)
7310
7311xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07007312 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007313 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07007314 "test/f32-dwconv2d-chw.cc",
7315 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007316 "src/xnnpack/AlignedAllocator.h",
7317 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007318 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007319)
7320
7321xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007322 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007323 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007324 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007325 "test/gavgpool-microkernel-tester.h",
7326 "src/xnnpack/AlignedAllocator.h",
7327 ] + MICROKERNEL_TEST_HDRS,
7328 deps = MICROKERNEL_TEST_DEPS,
7329)
7330
7331xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007332 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007333 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007334 "test/f32-gavgpool-cw.cc",
7335 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007336 "src/xnnpack/AlignedAllocator.h",
7337 ] + MICROKERNEL_TEST_HDRS,
7338 deps = MICROKERNEL_TEST_DEPS,
7339)
7340
7341xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007342 name = "f32_gemm_test",
7343 srcs = [
7344 "test/f32-gemm.cc",
7345 "test/gemm-microkernel-tester.h",
7346 "src/xnnpack/AlignedAllocator.h",
7347 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007348 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007349)
7350
7351xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007352 name = "f32_gemm_relu_test",
7353 srcs = [
7354 "test/f32-gemm-relu.cc",
7355 "test/gemm-microkernel-tester.h",
7356 "src/xnnpack/AlignedAllocator.h",
7357 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007358 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007359)
7360
7361xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007362 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007363 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007364 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007365 "test/gemm-microkernel-tester.h",
7366 "src/xnnpack/AlignedAllocator.h",
7367 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007368 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007369)
7370
7371xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007372 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007373 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007374 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007375 "test/gemm-microkernel-tester.h",
7376 "src/xnnpack/AlignedAllocator.h",
7377 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007378 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007379)
7380
7381xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007382 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007383 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007384 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007385 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007386 ] + MICROKERNEL_TEST_HDRS,
7387 deps = MICROKERNEL_TEST_DEPS,
7388)
7389
7390xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007391 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007392 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007393 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007394 "test/maxpool-microkernel-tester.h",
7395 ] + MICROKERNEL_TEST_HDRS,
7396 deps = MICROKERNEL_TEST_DEPS,
7397)
7398
7399xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007400 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007401 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007402 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007403 "test/avgpool-microkernel-tester.h",
7404 "src/xnnpack/AlignedAllocator.h",
7405 ] + MICROKERNEL_TEST_HDRS,
7406 deps = MICROKERNEL_TEST_DEPS,
7407)
7408
7409xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007410 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007411 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007412 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007413 "test/gemm-microkernel-tester.h",
7414 "src/xnnpack/AlignedAllocator.h",
7415 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007416 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007417)
7418
7419xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007420 name = "f16_prelu_test",
7421 srcs = [
7422 "test/f16-prelu.cc",
7423 "test/prelu-microkernel-tester.h",
7424 "src/xnnpack/AlignedAllocator.h",
7425 ] + MICROKERNEL_TEST_HDRS,
7426 deps = MICROKERNEL_TEST_DEPS,
7427)
7428
7429xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007430 name = "f32_prelu_test",
7431 srcs = [
7432 "test/f32-prelu.cc",
7433 "test/prelu-microkernel-tester.h",
7434 "src/xnnpack/AlignedAllocator.h",
7435 ] + MICROKERNEL_TEST_HDRS,
7436 deps = MICROKERNEL_TEST_DEPS,
7437)
7438
7439xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007440 name = "f32_raddexpminusmax_test",
7441 srcs = [
7442 "test/f32-raddexpminusmax.cc",
7443 "test/raddexpminusmax-microkernel-tester.h",
7444 ] + MICROKERNEL_TEST_HDRS,
7445 deps = MICROKERNEL_TEST_DEPS,
7446)
7447
7448xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007449 name = "f32_raddextexp_test",
7450 srcs = [
7451 "test/f32-raddextexp.cc",
7452 "test/raddextexp-microkernel-tester.h",
7453 ] + MICROKERNEL_TEST_HDRS,
7454 deps = MICROKERNEL_TEST_DEPS,
7455)
7456
7457xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007458 name = "f32_raddstoreexpminusmax_test",
7459 srcs = [
7460 "test/f32-raddstoreexpminusmax.cc",
7461 "test/raddstoreexpminusmax-microkernel-tester.h",
7462 ] + MICROKERNEL_TEST_HDRS,
7463 deps = MICROKERNEL_TEST_DEPS,
7464)
7465
7466xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007467 name = "f32_rmax_test",
7468 srcs = [
7469 "test/f32-rmax.cc",
7470 "test/rmax-microkernel-tester.h",
7471 ] + MICROKERNEL_TEST_HDRS,
7472 deps = MICROKERNEL_TEST_DEPS,
7473)
7474
7475xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007476 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007477 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007478 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007479 "test/spmm-microkernel-tester.h",
7480 "src/xnnpack/AlignedAllocator.h",
7481 ] + MICROKERNEL_TEST_HDRS,
7482 deps = MICROKERNEL_TEST_DEPS,
7483)
7484
7485xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007486 name = "f32_vabs_test",
7487 srcs = [
7488 "test/f32-vabs.cc",
7489 "test/vunary-microkernel-tester.h",
7490 ] + MICROKERNEL_TEST_HDRS,
7491 deps = MICROKERNEL_TEST_DEPS,
7492)
7493
7494xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007495 name = "f32_vadd_test",
7496 srcs = [
7497 "test/f32-vadd.cc",
7498 "test/vbinary-microkernel-tester.h",
7499 ] + MICROKERNEL_TEST_HDRS,
7500 deps = MICROKERNEL_TEST_DEPS,
7501)
7502
7503xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007504 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007505 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007506 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007507 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007508 ] + MICROKERNEL_TEST_HDRS,
7509 deps = MICROKERNEL_TEST_DEPS,
7510)
7511
7512xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007513 name = "f32_vadd_relu_test",
7514 srcs = [
7515 "test/f32-vadd-relu.cc",
7516 "test/vbinary-microkernel-tester.h",
7517 ] + MICROKERNEL_TEST_HDRS,
7518 deps = MICROKERNEL_TEST_DEPS,
7519)
7520
7521xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007522 name = "f32_vaddc_test",
7523 srcs = [
7524 "test/f32-vaddc.cc",
7525 "test/vbinaryc-microkernel-tester.h",
7526 ] + MICROKERNEL_TEST_HDRS,
7527 deps = MICROKERNEL_TEST_DEPS,
7528)
7529
7530xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007531 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007532 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007533 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007534 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007535 ] + MICROKERNEL_TEST_HDRS,
7536 deps = MICROKERNEL_TEST_DEPS,
7537)
7538
7539xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007540 name = "f32_vaddc_relu_test",
7541 srcs = [
7542 "test/f32-vaddc-relu.cc",
7543 "test/vbinaryc-microkernel-tester.h",
7544 ] + MICROKERNEL_TEST_HDRS,
7545 deps = MICROKERNEL_TEST_DEPS,
7546)
7547
7548xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007549 name = "f32_vclamp_test",
7550 srcs = [
7551 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007552 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007553 ] + MICROKERNEL_TEST_HDRS,
7554 deps = MICROKERNEL_TEST_DEPS,
7555)
7556
7557xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007558 name = "f32_vdiv_test",
7559 srcs = [
7560 "test/f32-vdiv.cc",
7561 "test/vbinary-microkernel-tester.h",
7562 ] + MICROKERNEL_TEST_HDRS,
7563 deps = MICROKERNEL_TEST_DEPS,
7564)
7565
7566xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007567 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007568 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007569 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007570 "test/vbinary-microkernel-tester.h",
7571 ] + MICROKERNEL_TEST_HDRS,
7572 deps = MICROKERNEL_TEST_DEPS,
7573)
7574
7575xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007576 name = "f32_vdiv_relu_test",
7577 srcs = [
7578 "test/f32-vdiv-relu.cc",
7579 "test/vbinary-microkernel-tester.h",
7580 ] + MICROKERNEL_TEST_HDRS,
7581 deps = MICROKERNEL_TEST_DEPS,
7582)
7583
7584xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007585 name = "f32_vdivc_test",
7586 srcs = [
7587 "test/f32-vdivc.cc",
7588 "test/vbinaryc-microkernel-tester.h",
7589 ] + MICROKERNEL_TEST_HDRS,
7590 deps = MICROKERNEL_TEST_DEPS,
7591)
7592
7593xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007594 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007595 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007596 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007597 "test/vbinaryc-microkernel-tester.h",
7598 ] + MICROKERNEL_TEST_HDRS,
7599 deps = MICROKERNEL_TEST_DEPS,
7600)
7601
7602xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007603 name = "f32_vdivc_relu_test",
7604 srcs = [
7605 "test/f32-vdivc-relu.cc",
7606 "test/vbinaryc-microkernel-tester.h",
7607 ] + MICROKERNEL_TEST_HDRS,
7608 deps = MICROKERNEL_TEST_DEPS,
7609)
7610
7611xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007612 name = "f32_vrdivc_test",
7613 srcs = [
7614 "test/f32-vrdivc.cc",
7615 "test/vbinaryc-microkernel-tester.h",
7616 ] + MICROKERNEL_TEST_HDRS,
7617 deps = MICROKERNEL_TEST_DEPS,
7618)
7619
7620xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007621 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007622 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007623 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007624 "test/vbinaryc-microkernel-tester.h",
7625 ] + MICROKERNEL_TEST_HDRS,
7626 deps = MICROKERNEL_TEST_DEPS,
7627)
7628
7629xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007630 name = "f32_vrdivc_relu_test",
7631 srcs = [
7632 "test/f32-vrdivc-relu.cc",
7633 "test/vbinaryc-microkernel-tester.h",
7634 ] + MICROKERNEL_TEST_HDRS,
7635 deps = MICROKERNEL_TEST_DEPS,
7636)
7637
7638xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007639 name = "f32_velu_test",
7640 srcs = [
7641 "test/f32-velu.cc",
7642 "test/vunary-microkernel-tester.h",
7643 ] + MICROKERNEL_TEST_HDRS,
7644 deps = MICROKERNEL_TEST_DEPS,
7645)
7646
7647xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007648 name = "f32_vmax_test",
7649 srcs = [
7650 "test/f32-vmax.cc",
7651 "test/vbinary-microkernel-tester.h",
7652 ] + MICROKERNEL_TEST_HDRS,
7653 deps = MICROKERNEL_TEST_DEPS,
7654)
7655
7656xnnpack_unit_test(
7657 name = "f32_vmaxc_test",
7658 srcs = [
7659 "test/f32-vmaxc.cc",
7660 "test/vbinaryc-microkernel-tester.h",
7661 ] + MICROKERNEL_TEST_HDRS,
7662 deps = MICROKERNEL_TEST_DEPS,
7663)
7664
7665xnnpack_unit_test(
7666 name = "f32_vmin_test",
7667 srcs = [
7668 "test/f32-vmin.cc",
7669 "test/vbinary-microkernel-tester.h",
7670 ] + MICROKERNEL_TEST_HDRS,
7671 deps = MICROKERNEL_TEST_DEPS,
7672)
7673
7674xnnpack_unit_test(
7675 name = "f32_vminc_test",
7676 srcs = [
7677 "test/f32-vminc.cc",
7678 "test/vbinaryc-microkernel-tester.h",
7679 ] + MICROKERNEL_TEST_HDRS,
7680 deps = MICROKERNEL_TEST_DEPS,
7681)
7682
7683xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007684 name = "f32_vmul_test",
7685 srcs = [
7686 "test/f32-vmul.cc",
7687 "test/vbinary-microkernel-tester.h",
7688 ] + MICROKERNEL_TEST_HDRS,
7689 deps = MICROKERNEL_TEST_DEPS,
7690)
7691
7692xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007693 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007694 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007695 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007696 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007697 ] + MICROKERNEL_TEST_HDRS,
7698 deps = MICROKERNEL_TEST_DEPS,
7699)
7700
7701xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007702 name = "f32_vmul_relu_test",
7703 srcs = [
7704 "test/f32-vmul-relu.cc",
7705 "test/vbinary-microkernel-tester.h",
7706 ] + MICROKERNEL_TEST_HDRS,
7707 deps = MICROKERNEL_TEST_DEPS,
7708)
7709
7710xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007711 name = "f32_vmulc_test",
7712 srcs = [
7713 "test/f32-vmulc.cc",
7714 "test/vbinaryc-microkernel-tester.h",
7715 ] + MICROKERNEL_TEST_HDRS,
7716 deps = MICROKERNEL_TEST_DEPS,
7717)
7718
7719xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007720 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007721 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007722 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007723 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007724 ] + MICROKERNEL_TEST_HDRS,
7725 deps = MICROKERNEL_TEST_DEPS,
7726)
7727
7728xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007729 name = "f32_vmulc_relu_test",
7730 srcs = [
7731 "test/f32-vmulc-relu.cc",
7732 "test/vbinaryc-microkernel-tester.h",
7733 ] + MICROKERNEL_TEST_HDRS,
7734 deps = MICROKERNEL_TEST_DEPS,
7735)
7736
7737xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007738 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007739 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007740 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007741 "test/vmulcaddc-microkernel-tester.h",
7742 "src/xnnpack/AlignedAllocator.h",
7743 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007744 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007745)
7746
7747xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007748 name = "f32_vlrelu_test",
7749 srcs = [
7750 "test/f32-vlrelu.cc",
7751 "test/vunary-microkernel-tester.h",
7752 ] + MICROKERNEL_TEST_HDRS,
7753 deps = MICROKERNEL_TEST_DEPS,
7754)
7755
7756xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007757 name = "f32_vneg_test",
7758 srcs = [
7759 "test/f32-vneg.cc",
7760 "test/vunary-microkernel-tester.h",
7761 ] + MICROKERNEL_TEST_HDRS,
7762 deps = MICROKERNEL_TEST_DEPS,
7763)
7764
7765xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007766 name = "f32_vrelu_test",
7767 srcs = [
7768 "test/f32-vrelu.cc",
7769 "test/vunary-microkernel-tester.h",
7770 ] + MICROKERNEL_TEST_HDRS,
7771 deps = MICROKERNEL_TEST_DEPS,
7772)
7773
7774xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007775 name = "f32_vrndne_test",
7776 srcs = [
7777 "test/f32-vrndne.cc",
7778 "test/vunary-microkernel-tester.h",
7779 ] + MICROKERNEL_TEST_HDRS,
7780 deps = MICROKERNEL_TEST_DEPS,
7781)
7782
7783xnnpack_unit_test(
7784 name = "f32_vrndz_test",
7785 srcs = [
7786 "test/f32-vrndz.cc",
7787 "test/vunary-microkernel-tester.h",
7788 ] + MICROKERNEL_TEST_HDRS,
7789 deps = MICROKERNEL_TEST_DEPS,
7790)
7791
7792xnnpack_unit_test(
7793 name = "f32_vrndu_test",
7794 srcs = [
7795 "test/f32-vrndu.cc",
7796 "test/vunary-microkernel-tester.h",
7797 ] + MICROKERNEL_TEST_HDRS,
7798 deps = MICROKERNEL_TEST_DEPS,
7799)
7800
7801xnnpack_unit_test(
7802 name = "f32_vrndd_test",
7803 srcs = [
7804 "test/f32-vrndd.cc",
7805 "test/vunary-microkernel-tester.h",
7806 ] + MICROKERNEL_TEST_HDRS,
7807 deps = MICROKERNEL_TEST_DEPS,
7808)
7809
7810xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007811 name = "f32_vscale_test",
7812 srcs = [
7813 "test/f32-vscale.cc",
7814 "test/vscale-microkernel-tester.h",
7815 ] + MICROKERNEL_TEST_HDRS,
7816 deps = MICROKERNEL_TEST_DEPS,
7817)
7818
7819xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007820 name = "f32_vscaleexpminusmax_test",
7821 srcs = [
7822 "test/f32-vscaleexpminusmax.cc",
7823 "test/vscaleexpminusmax-microkernel-tester.h",
7824 ] + MICROKERNEL_TEST_HDRS,
7825 deps = MICROKERNEL_TEST_DEPS,
7826)
7827
7828xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007829 name = "f32_vscaleextexp_test",
7830 srcs = [
7831 "test/f32-vscaleextexp.cc",
7832 "test/vscaleextexp-microkernel-tester.h",
7833 ] + MICROKERNEL_TEST_HDRS,
7834 deps = MICROKERNEL_TEST_DEPS,
7835)
7836
7837xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007838 name = "f32_vsigmoid_test",
7839 srcs = [
7840 "test/f32-vsigmoid.cc",
7841 "test/vunary-microkernel-tester.h",
7842 ] + MICROKERNEL_TEST_HDRS,
7843 deps = MICROKERNEL_TEST_DEPS,
7844)
7845
7846xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007847 name = "f32_vsqr_test",
7848 srcs = [
7849 "test/f32-vsqr.cc",
7850 "test/vunary-microkernel-tester.h",
7851 ] + MICROKERNEL_TEST_HDRS,
7852 deps = MICROKERNEL_TEST_DEPS,
7853)
7854
7855xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007856 name = "f32_vsqrdiff_test",
7857 srcs = [
7858 "test/f32-vsqrdiff.cc",
7859 "test/vbinary-microkernel-tester.h",
7860 ] + MICROKERNEL_TEST_HDRS,
7861 deps = MICROKERNEL_TEST_DEPS,
7862)
7863
7864xnnpack_unit_test(
7865 name = "f32_vsqrdiffc_test",
7866 srcs = [
7867 "test/f32-vsqrdiffc.cc",
7868 "test/vbinaryc-microkernel-tester.h",
7869 ] + MICROKERNEL_TEST_HDRS,
7870 deps = MICROKERNEL_TEST_DEPS,
7871)
7872
7873xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007874 name = "f32_vsqrt_test",
7875 srcs = [
7876 "test/f32-vsqrt.cc",
7877 "test/vunary-microkernel-tester.h",
7878 ] + MICROKERNEL_TEST_HDRS,
7879 deps = MICROKERNEL_TEST_DEPS,
7880)
7881
7882xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007883 name = "f32_vsub_test",
7884 srcs = [
7885 "test/f32-vsub.cc",
7886 "test/vbinary-microkernel-tester.h",
7887 ] + MICROKERNEL_TEST_HDRS,
7888 deps = MICROKERNEL_TEST_DEPS,
7889)
7890
7891xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007892 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007893 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007894 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007895 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007896 ] + MICROKERNEL_TEST_HDRS,
7897 deps = MICROKERNEL_TEST_DEPS,
7898)
7899
7900xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007901 name = "f32_vsub_relu_test",
7902 srcs = [
7903 "test/f32-vsub-relu.cc",
7904 "test/vbinary-microkernel-tester.h",
7905 ] + MICROKERNEL_TEST_HDRS,
7906 deps = MICROKERNEL_TEST_DEPS,
7907)
7908
7909xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007910 name = "f32_vsubc_test",
7911 srcs = [
7912 "test/f32-vsubc.cc",
7913 "test/vbinaryc-microkernel-tester.h",
7914 ] + MICROKERNEL_TEST_HDRS,
7915 deps = MICROKERNEL_TEST_DEPS,
7916)
7917
7918xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007919 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007920 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007921 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007922 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007923 ] + MICROKERNEL_TEST_HDRS,
7924 deps = MICROKERNEL_TEST_DEPS,
7925)
7926
7927xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007928 name = "f32_vsubc_relu_test",
7929 srcs = [
7930 "test/f32-vsubc-relu.cc",
7931 "test/vbinaryc-microkernel-tester.h",
7932 ] + MICROKERNEL_TEST_HDRS,
7933 deps = MICROKERNEL_TEST_DEPS,
7934)
7935
7936xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007937 name = "f32_vrsubc_test",
7938 srcs = [
7939 "test/f32-vrsubc.cc",
7940 "test/vbinaryc-microkernel-tester.h",
7941 ] + MICROKERNEL_TEST_HDRS,
7942 deps = MICROKERNEL_TEST_DEPS,
7943)
7944
7945xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007946 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007947 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007948 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007949 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007950 ] + MICROKERNEL_TEST_HDRS,
7951 deps = MICROKERNEL_TEST_DEPS,
7952)
7953
7954xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007955 name = "f32_vrsubc_relu_test",
7956 srcs = [
7957 "test/f32-vrsubc-relu.cc",
7958 "test/vbinaryc-microkernel-tester.h",
7959 ] + MICROKERNEL_TEST_HDRS,
7960 deps = MICROKERNEL_TEST_DEPS,
7961)
7962
7963xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007964 name = "qc8_dwconv_minmax_fp32_test",
7965 timeout = "moderate",
7966 srcs = [
7967 "test/qc8-dwconv-minmax-fp32.cc",
7968 "test/dwconv-microkernel-tester.h",
7969 "src/xnnpack/AlignedAllocator.h",
7970 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7971 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7972)
7973
7974xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007975 name = "qc8_gemm_minmax_fp32_test",
7976 timeout = "moderate",
7977 srcs = [
7978 "test/qc8-gemm-minmax-fp32.cc",
7979 "test/gemm-microkernel-tester.h",
7980 "src/xnnpack/AlignedAllocator.h",
7981 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7982 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7983)
7984
7985xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007986 name = "qc8_igemm_minmax_fp32_test",
7987 timeout = "moderate",
7988 srcs = [
7989 "test/qc8-igemm-minmax-fp32.cc",
7990 "test/gemm-microkernel-tester.h",
7991 "src/xnnpack/AlignedAllocator.h",
7992 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7993 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7994)
7995
7996xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07007997 name = "qs8_dwconv_minmax_fp32_test",
7998 srcs = [
7999 "test/qs8-dwconv-minmax-fp32.cc",
8000 "test/dwconv-microkernel-tester.h",
8001 "src/xnnpack/AlignedAllocator.h",
8002 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8003 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8004)
8005
8006xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008007 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07008008 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008009 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07008010 "test/dwconv-microkernel-tester.h",
8011 "src/xnnpack/AlignedAllocator.h",
8012 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8013 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8014)
8015
8016xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07008017 name = "qs8_dwconv_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008018 srcs = [
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07008019 "test/qs8-dwconv-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008020 "test/dwconv-microkernel-tester.h",
8021 "src/xnnpack/AlignedAllocator.h",
8022 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8023 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8024)
8025
8026xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07008027 name = "qs8_gavgpool_minmax_test",
8028 srcs = [
8029 "test/qs8-gavgpool-minmax.cc",
8030 "test/gavgpool-microkernel-tester.h",
8031 "src/xnnpack/AlignedAllocator.h",
8032 ] + MICROKERNEL_TEST_HDRS,
8033 deps = MICROKERNEL_TEST_DEPS,
8034)
8035
8036xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008037 name = "qs8_gemm_minmax_fp32_test",
8038 timeout = "moderate",
8039 srcs = [
8040 "test/qs8-gemm-minmax-fp32.cc",
8041 "test/gemm-microkernel-tester.h",
8042 "src/xnnpack/AlignedAllocator.h",
8043 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8044 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8045)
8046
8047xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008048 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07008049 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07008050 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008051 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07008052 "test/gemm-microkernel-tester.h",
8053 "src/xnnpack/AlignedAllocator.h",
8054 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8055 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8056)
8057
8058xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008059 name = "qs8_gemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008060 timeout = "moderate",
8061 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07008062 "test/qs8-gemm-minmax-rndnu.cc",
8063 "test/gemm-microkernel-tester.h",
8064 "src/xnnpack/AlignedAllocator.h",
8065 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8066 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8067)
8068
8069xnnpack_unit_test(
8070 name = "qs8_igemm_minmax_fp32_test",
8071 timeout = "moderate",
8072 srcs = [
8073 "test/qs8-igemm-minmax-fp32.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008074 "test/gemm-microkernel-tester.h",
8075 "src/xnnpack/AlignedAllocator.h",
8076 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8077 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8078)
8079
8080xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008081 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07008082 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07008083 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008084 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07008085 "test/gemm-microkernel-tester.h",
8086 "src/xnnpack/AlignedAllocator.h",
8087 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8088 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8089)
8090
8091xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008092 name = "qs8_igemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008093 timeout = "moderate",
8094 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07008095 "test/qs8-igemm-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008096 "test/gemm-microkernel-tester.h",
8097 "src/xnnpack/AlignedAllocator.h",
8098 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8099 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8100)
8101
8102xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07008103 name = "qs8_requantization_test",
8104 srcs = [
8105 "src/xnnpack/requantization-stubs.h",
8106 "test/qs8-requantization.cc",
8107 "test/requantization-tester.h",
8108 ] + MICROKERNEL_TEST_HDRS,
8109 deps = MICROKERNEL_TEST_DEPS,
8110)
8111
8112xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07008113 name = "qs8_vadd_minmax_test",
8114 srcs = [
8115 "test/qs8-vadd-minmax.cc",
8116 "test/vadd-microkernel-tester.h",
8117 ] + MICROKERNEL_TEST_HDRS,
8118 deps = MICROKERNEL_TEST_DEPS,
8119)
8120
8121xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07008122 name = "qs8_vaddc_minmax_test",
8123 srcs = [
8124 "test/qs8-vaddc-minmax.cc",
8125 "test/vaddc-microkernel-tester.h",
8126 ] + MICROKERNEL_TEST_HDRS,
8127 deps = MICROKERNEL_TEST_DEPS,
8128)
8129
8130xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008131 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008132 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008133 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008134 "test/avgpool-microkernel-tester.h",
8135 "src/xnnpack/AlignedAllocator.h",
8136 ] + MICROKERNEL_TEST_HDRS,
8137 deps = MICROKERNEL_TEST_DEPS,
8138)
8139
8140xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07008141 name = "qu8_dwconv_minmax_fp32_test",
8142 srcs = [
8143 "test/qu8-dwconv-minmax-fp32.cc",
8144 "test/dwconv-microkernel-tester.h",
8145 "src/xnnpack/AlignedAllocator.h",
8146 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8147 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8148)
8149
8150xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07008151 name = "qu8_igemm_minmax_fp32_test",
8152 srcs = [
8153 "test/qu8-igemm-minmax-fp32.cc",
8154 "test/gemm-microkernel-tester.h",
8155 "src/xnnpack/AlignedAllocator.h",
8156 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8157 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8158)
8159
8160xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008161 name = "qu8_igemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008162 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008163 "test/qu8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07008164 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008165 "src/xnnpack/AlignedAllocator.h",
8166 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008167 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008168)
8169
8170xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008171 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008172 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008173 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008174 "test/gavgpool-microkernel-tester.h",
8175 "src/xnnpack/AlignedAllocator.h",
8176 ] + MICROKERNEL_TEST_HDRS,
8177 deps = MICROKERNEL_TEST_DEPS,
8178)
8179
8180xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07008181 name = "qu8_gemm_minmax_fp32_test",
8182 srcs = [
8183 "test/qu8-gemm-minmax-fp32.cc",
8184 "test/gemm-microkernel-tester.h",
8185 "src/xnnpack/AlignedAllocator.h",
8186 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8187 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8188)
8189
8190xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008191 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008192 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008193 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008194 "test/gemm-microkernel-tester.h",
8195 "src/xnnpack/AlignedAllocator.h",
8196 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008197 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008198)
8199
8200xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07008201 name = "qu8_requantization_test",
8202 srcs = [
8203 "src/xnnpack/requantization-stubs.h",
8204 "test/qu8-requantization.cc",
8205 "test/requantization-tester.h",
8206 ] + MICROKERNEL_TEST_HDRS,
8207 deps = MICROKERNEL_TEST_DEPS,
8208)
8209
8210xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008211 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008212 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008213 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008214 "test/vadd-microkernel-tester.h",
8215 ] + MICROKERNEL_TEST_HDRS,
8216 deps = MICROKERNEL_TEST_DEPS,
8217)
8218
8219xnnpack_unit_test(
Marat Dukhan76e78c82021-07-20 21:11:23 -07008220 name = "qu8_vaddc_minmax_test",
8221 srcs = [
8222 "test/qu8-vaddc-minmax.cc",
8223 "test/vaddc-microkernel-tester.h",
8224 ] + MICROKERNEL_TEST_HDRS,
8225 deps = MICROKERNEL_TEST_DEPS,
8226)
8227
8228xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008229 name = "u8_lut32norm_test",
8230 srcs = [
8231 "test/u8-lut32norm.cc",
8232 "test/lut-norm-microkernel-tester.h",
8233 ] + MICROKERNEL_TEST_HDRS,
8234 deps = MICROKERNEL_TEST_DEPS,
8235)
8236
8237xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07008238 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008239 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07008240 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008241 "test/maxpool-microkernel-tester.h",
8242 ] + MICROKERNEL_TEST_HDRS,
8243 deps = MICROKERNEL_TEST_DEPS,
8244)
8245
8246xnnpack_unit_test(
8247 name = "u8_rmax_test",
8248 srcs = [
8249 "test/u8-rmax.cc",
8250 "test/rmax-microkernel-tester.h",
8251 ] + MICROKERNEL_TEST_HDRS,
8252 deps = MICROKERNEL_TEST_DEPS,
8253)
8254
8255xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07008256 name = "u8_vclamp_test",
8257 srcs = [
8258 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07008259 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07008260 ] + MICROKERNEL_TEST_HDRS,
8261 deps = MICROKERNEL_TEST_DEPS,
8262)
8263
8264xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008265 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08008266 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008267 "test/x32-depthtospace2d-chw2hwc.cc",
8268 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08008269 ] + MICROKERNEL_TEST_HDRS,
8270 deps = MICROKERNEL_TEST_DEPS,
8271)
8272
8273xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07008274 name = "x32_fill_test",
8275 srcs = [
8276 "test/x32-fill.cc",
8277 "test/fill-microkernel-tester.h",
8278 ] + MICROKERNEL_TEST_HDRS,
8279 deps = MICROKERNEL_TEST_DEPS,
8280)
8281
8282xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008283 name = "x32_packx_test",
8284 srcs = [
8285 "test/x32-packx.cc",
8286 "test/pack-microkernel-tester.h",
8287 "src/xnnpack/AlignedAllocator.h",
8288 ] + MICROKERNEL_TEST_HDRS,
8289 deps = MICROKERNEL_TEST_DEPS,
8290)
8291
8292xnnpack_unit_test(
8293 name = "x32_pad_test",
8294 srcs = [
8295 "test/x32-pad.cc",
8296 "test/pad-microkernel-tester.h",
8297 ] + MICROKERNEL_TEST_HDRS,
8298 deps = MICROKERNEL_TEST_DEPS,
8299)
8300
8301xnnpack_unit_test(
8302 name = "x32_unpool_test",
8303 srcs = [
8304 "test/x32-unpool.cc",
8305 "test/unpool-microkernel-tester.h",
8306 ] + MICROKERNEL_TEST_HDRS,
8307 deps = MICROKERNEL_TEST_DEPS,
8308)
8309
8310xnnpack_unit_test(
8311 name = "x32_zip_test",
8312 srcs = [
8313 "test/x32-zip.cc",
8314 "test/zip-microkernel-tester.h",
8315 ] + MICROKERNEL_TEST_HDRS,
8316 deps = MICROKERNEL_TEST_DEPS,
8317)
8318
8319xnnpack_unit_test(
8320 name = "x8_lut_test",
8321 srcs = [
8322 "test/x8-lut.cc",
8323 "test/lut-microkernel-tester.h",
8324 ] + MICROKERNEL_TEST_HDRS,
8325 deps = MICROKERNEL_TEST_DEPS,
8326)
8327
8328xnnpack_unit_test(
8329 name = "x8_zip_test",
8330 srcs = [
8331 "test/x8-zip.cc",
8332 "test/zip-microkernel-tester.h",
8333 ] + MICROKERNEL_TEST_HDRS,
8334 deps = MICROKERNEL_TEST_DEPS,
8335)
8336
Marat Dukhan20c3b922020-03-10 03:45:06 -07008337########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008338
8339xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07008340 name = "operator_size_test",
8341 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008342 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008343)
8344
Marat Dukhan20c3b922020-03-10 03:45:06 -07008345xnnpack_binary(
8346 name = "subgraph_size_test",
8347 srcs = ["test/subgraph-size.c"],
8348 deps = [":XNNPACK"],
8349)
8350
8351########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008352
8353xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008354 name = "abs_nc_test",
8355 srcs = [
8356 "test/abs-nc.cc",
8357 "test/abs-operator-tester.h",
8358 ],
8359 deps = OPERATOR_TEST_DEPS,
8360)
8361
8362xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008363 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008364 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008365 srcs = [
8366 "test/add-nd.cc",
8367 "test/binary-elementwise-operator-tester.h",
8368 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008369 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008370)
8371
8372xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008373 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008374 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008375 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008376 "test/argmax-pooling-operator-tester.h",
8377 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008378 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008379)
8380
8381xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008382 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008383 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008384 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008385 "test/average-pooling-operator-tester.h",
8386 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008387 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008388)
8389
8390xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008391 name = "bankers_rounding_nc_test",
8392 srcs = [
8393 "test/bankers-rounding-nc.cc",
8394 "test/bankers-rounding-operator-tester.h",
8395 ],
8396 deps = OPERATOR_TEST_DEPS,
8397)
8398
8399xnnpack_unit_test(
8400 name = "ceiling_nc_test",
8401 srcs = [
8402 "test/ceiling-nc.cc",
8403 "test/ceiling-operator-tester.h",
8404 ],
8405 deps = OPERATOR_TEST_DEPS,
8406)
8407
8408xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008409 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008410 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008411 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008412 "test/channel-shuffle-operator-tester.h",
8413 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008414 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008415)
8416
8417xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008418 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008419 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008420 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008421 "test/clamp-operator-tester.h",
8422 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008423 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008424)
8425
8426xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008427 name = "constant_pad_nd_test",
8428 srcs = [
8429 "test/constant-pad-nd.cc",
8430 "test/constant-pad-operator-tester.h",
8431 ],
8432 deps = OPERATOR_TEST_DEPS,
8433)
8434
8435xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008436 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008437 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008438 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008439 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008440 "test/convolution-operator-tester.h",
8441 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008442 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008443)
8444
8445xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008446 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008447 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008448 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008449 "test/convolution-nchw.cc",
8450 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008451 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008452 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008453)
8454
8455xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008456 name = "copy_nc_test",
8457 srcs = [
8458 "test/copy-nc.cc",
8459 "test/copy-operator-tester.h",
8460 ],
8461 deps = OPERATOR_TEST_DEPS,
8462)
8463
8464xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008465 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008466 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008467 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008468 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008469 "test/deconvolution-operator-tester.h",
8470 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008471 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008472)
8473
8474xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008475 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008476 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008477 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008478 "test/depth-to-space-operator-tester.h",
8479 ] + OPERATOR_TEST_PARAMS_HDRS,
8480 deps = OPERATOR_TEST_DEPS,
8481)
8482
8483xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008484 name = "depth_to_space_nhwc_test",
8485 srcs = [
8486 "test/depth-to-space-nhwc.cc",
8487 "test/depth-to-space-operator-tester.h",
8488 ] + OPERATOR_TEST_PARAMS_HDRS,
8489 deps = OPERATOR_TEST_DEPS,
8490)
8491
8492xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008493 name = "divide_nd_test",
8494 srcs = [
8495 "test/binary-elementwise-operator-tester.h",
8496 "test/divide-nd.cc",
8497 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008498 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008499)
8500
8501xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008502 name = "elu_nc_test",
8503 srcs = [
8504 "test/elu-nc.cc",
8505 "test/elu-operator-tester.h",
8506 ],
8507 deps = OPERATOR_TEST_DEPS,
8508)
8509
8510xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008511 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008512 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008513 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008514 "test/fully-connected-operator-tester.h",
8515 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008516 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008517)
8518
8519xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008520 name = "floor_nc_test",
8521 srcs = [
8522 "test/floor-nc.cc",
8523 "test/floor-operator-tester.h",
8524 ],
8525 deps = OPERATOR_TEST_DEPS,
8526)
8527
8528xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008529 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008530 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008531 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008532 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008533 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008534 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008535)
8536
8537xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008538 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008539 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008540 "test/global-average-pooling-ncw.cc",
8541 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008542 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008543 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008544)
8545
8546xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008547 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008548 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008549 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008550 "test/hardswish-operator-tester.h",
8551 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008552 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008553)
8554
8555xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008556 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008557 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008558 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008559 "test/leaky-relu-operator-tester.h",
8560 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008561 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008562)
8563
8564xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008565 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008566 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008567 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008568 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008569 "test/max-pooling-operator-tester.h",
8570 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008571 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008572)
8573
8574xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008575 name = "maximum_nd_test",
8576 srcs = [
8577 "test/binary-elementwise-operator-tester.h",
8578 "test/maximum-nd.cc",
8579 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008580 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008581)
8582
8583xnnpack_unit_test(
8584 name = "minimum_nd_test",
8585 srcs = [
8586 "test/binary-elementwise-operator-tester.h",
8587 "test/minimum-nd.cc",
8588 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008589 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008590)
8591
8592xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008593 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008594 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008595 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008596 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008597 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008598 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008599)
8600
8601xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008602 name = "negate_nc_test",
8603 srcs = [
8604 "test/negate-nc.cc",
8605 "test/negate-operator-tester.h",
8606 ],
8607 deps = OPERATOR_TEST_DEPS,
8608)
8609
8610xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008611 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008612 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008613 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008614 "test/prelu-operator-tester.h",
8615 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008616 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008617)
8618
8619xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008620 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008621 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008622 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008623 "test/resize-bilinear-operator-tester.h",
8624 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008625 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008626)
8627
8628xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008629 name = "resize_bilinear_nchw_test",
8630 srcs = [
8631 "test/resize-bilinear-nchw.cc",
8632 "test/resize-bilinear-operator-tester.h",
8633 ] + OPERATOR_TEST_PARAMS_HDRS,
8634 deps = OPERATOR_TEST_DEPS,
8635)
8636
8637xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008638 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008639 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008640 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008641 "test/sigmoid-operator-tester.h",
8642 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008643 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008644)
8645
8646xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008647 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008648 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008649 "test/softmax-nc.cc",
8650 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008651 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008652 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008653)
8654
8655xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008656 name = "square_nc_test",
8657 srcs = [
8658 "test/square-nc.cc",
8659 "test/square-operator-tester.h",
8660 ],
8661 deps = OPERATOR_TEST_DEPS,
8662)
8663
8664xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008665 name = "square_root_nc_test",
8666 srcs = [
8667 "test/square-root-nc.cc",
8668 "test/square-root-operator-tester.h",
8669 ],
8670 deps = OPERATOR_TEST_DEPS,
8671)
8672
8673xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008674 name = "squared_difference_nd_test",
8675 srcs = [
8676 "test/binary-elementwise-operator-tester.h",
8677 "test/squared-difference-nd.cc",
8678 ],
8679 deps = OPERATOR_TEST_DEPS,
8680)
8681
8682xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008683 name = "subtract_nd_test",
8684 srcs = [
8685 "test/binary-elementwise-operator-tester.h",
8686 "test/subtract-nd.cc",
8687 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008688 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008689)
8690
8691xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008692 name = "truncation_nc_test",
8693 srcs = [
8694 "test/truncation-nc.cc",
8695 "test/truncation-operator-tester.h",
8696 ],
8697 deps = OPERATOR_TEST_DEPS,
8698)
8699
8700xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008701 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008702 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008703 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008704 "test/unpooling-operator-tester.h",
8705 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008706 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008707)
8708
Chao Mei6ddfc602020-05-13 22:29:36 -07008709############################### Misc unit tests ###############################
8710
8711xnnpack_unit_test(
8712 name = "memory_planner_test",
8713 srcs = [
8714 "test/memory-planner-test.cc",
8715 ],
8716 deps = [
8717 ":XNNPACK",
8718 ":memory_planner",
8719 ],
8720)
8721
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008722xnnpack_unit_test(
8723 name = "subgraph_nchw_test",
8724 srcs = [
8725 "src/xnnpack/subgraph.h",
8726 "test/subgraph-nchw.cc",
8727 "test/subgraph-tester.h",
8728 ],
8729 deps = [
8730 ":XNNPACK",
8731 ],
8732)
8733
Marat Dukhan08c4a432019-10-03 09:29:21 -07008734############################# Build configurations #############################
8735
Marat Dukhanb8642352019-10-30 15:43:02 -07008736# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008737config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008738 name = "xnn_enable_assembly_explicit_true",
8739 define_values = {"xnn_enable_assembly": "true"},
8740)
8741
8742# Disables usage of assembly kernels.
8743config_setting(
8744 name = "xnn_enable_assembly_explicit_false",
8745 define_values = {"xnn_enable_assembly": "false"},
8746)
8747
Marat Dukhan9de90e02020-06-18 16:04:12 -07008748# Enables usage of sparse inference.
8749config_setting(
8750 name = "xnn_enable_sparse_explicit_true",
8751 define_values = {"xnn_enable_sparse": "true"},
8752)
8753
8754# Disables usage of sparse inference.
8755config_setting(
8756 name = "xnn_enable_sparse_explicit_false",
8757 define_values = {"xnn_enable_sparse": "false"},
8758)
8759
Marat Dukhan05702cf2020-03-26 15:41:33 -07008760# Disables usage of HMP-aware optimizations.
8761config_setting(
8762 name = "xnn_enable_hmp_explicit_false",
8763 define_values = {"xnn_enable_hmp": "false"},
8764)
8765
Chao Mei6ddfc602020-05-13 22:29:36 -07008766# Enable usage of optimized memory allocation
8767config_setting(
8768 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008769 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008770)
8771
8772# Disable usage of optimized memory allocation
8773config_setting(
8774 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008775 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008776)
8777
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008778# Enable QS8 inference in TFLite-specific version
8779config_setting(
8780 name = "xnn_enable_qs8_explicit_true",
8781 define_values = {"xnn_enable_qs8": "true"},
8782)
8783
8784# Disable QS8 inference in TFLite-specific version
8785config_setting(
8786 name = "xnn_enable_qs8_explicit_false",
8787 define_values = {"xnn_enable_qs8": "false"},
8788)
8789
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008790# Enable QU8 inference in TFLite-specific version
8791config_setting(
8792 name = "xnn_enable_qu8_explicit_true",
8793 define_values = {"xnn_enable_qu8": "true"},
8794)
8795
8796# Disable QU8 inference in TFLite-specific version
8797config_setting(
8798 name = "xnn_enable_qu8_explicit_false",
8799 define_values = {"xnn_enable_qu8": "false"},
8800)
8801
Marat Dukhanb8642352019-10-30 15:43:02 -07008802# Builds with -c dbg
8803config_setting(
8804 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008805 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008806 "compilation_mode": "dbg",
8807 },
8808)
8809
8810# Builds with -c opt
8811config_setting(
8812 name = "optimized_build",
8813 values = {
8814 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008815 },
8816)
8817
8818config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008819 name = "linux_k8",
8820 values = {"cpu": "k8"},
8821)
8822
8823config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008824 name = "linux_arm",
8825 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008826)
8827
8828config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008829 name = "linux_armeabi",
8830 values = {"cpu": "armeabi"},
8831)
8832
8833config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008834 name = "linux_armhf",
8835 values = {"cpu": "armhf"},
8836)
8837
8838config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008839 name = "linux_armv7a",
8840 values = {"cpu": "armv7a"},
8841)
8842
8843config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008844 name = "linux_aarch64",
8845 values = {"cpu": "aarch64"},
8846)
8847
8848config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008849 name = "android",
8850 values = {"crosstool_top": "//external:android/crosstool"},
8851)
8852
8853config_setting(
8854 name = "android_armv7",
8855 values = {
8856 "crosstool_top": "//external:android/crosstool",
8857 "cpu": "armeabi-v7a",
8858 },
8859)
8860
8861config_setting(
8862 name = "android_arm64",
8863 values = {
8864 "crosstool_top": "//external:android/crosstool",
8865 "cpu": "arm64-v8a",
8866 },
8867)
8868
8869config_setting(
8870 name = "android_x86",
8871 values = {
8872 "crosstool_top": "//external:android/crosstool",
8873 "cpu": "x86",
8874 },
8875)
8876
8877config_setting(
8878 name = "android_x86_64",
8879 values = {
8880 "crosstool_top": "//external:android/crosstool",
8881 "cpu": "x86_64",
8882 },
8883)
8884
8885config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008886 name = "windows_x86_64",
8887 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008888)
8889
8890config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008891 name = "windows_x86_64_clang",
8892 values = {
8893 "compiler": "clang-cl",
8894 "cpu": "x64_windows",
8895 },
8896)
8897
8898config_setting(
8899 name = "windows_x86_64_mingw",
8900 values = {
8901 "compiler": "mingw-gcc",
8902 "cpu": "x64_windows",
8903 },
8904)
8905
8906config_setting(
8907 name = "windows_x86_64_msys",
8908 values = {
8909 "compiler": "msys-gcc",
8910 "cpu": "x64_windows",
8911 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008912)
8913
8914config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008915 name = "macos_x86_64",
8916 values = {
8917 "apple_platform_type": "macos",
8918 "cpu": "darwin",
8919 },
8920)
8921
8922config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008923 name = "macos_arm64",
8924 values = {
8925 "apple_platform_type": "macos",
8926 "cpu": "darwin_arm64",
8927 },
8928)
8929
8930config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008931 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008932 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008933)
8934
8935config_setting(
8936 name = "emscripten_wasm",
8937 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008938 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008939 "cpu": "wasm",
8940 },
8941)
8942
8943config_setting(
8944 name = "emscripten_wasmsimd",
8945 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008946 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008947 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008948 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008949 },
8950)
8951
8952config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008953 name = "ios_armv7",
8954 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008955 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008956 "cpu": "ios_armv7",
8957 },
8958)
8959
8960config_setting(
8961 name = "ios_arm64",
8962 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008963 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008964 "cpu": "ios_arm64",
8965 },
8966)
8967
8968config_setting(
8969 name = "ios_arm64e",
8970 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008971 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008972 "cpu": "ios_arm64e",
8973 },
8974)
8975
8976config_setting(
8977 name = "ios_x86",
8978 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008979 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008980 "cpu": "ios_i386",
8981 },
8982)
8983
8984config_setting(
8985 name = "ios_x86_64",
8986 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008987 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008988 "cpu": "ios_x86_64",
8989 },
8990)
8991
8992config_setting(
8993 name = "watchos_armv7k",
8994 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008995 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008996 "cpu": "watchos_armv7k",
8997 },
8998)
8999
9000config_setting(
9001 name = "watchos_arm64_32",
9002 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009003 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009004 "cpu": "watchos_arm64_32",
9005 },
9006)
9007
9008config_setting(
9009 name = "watchos_x86",
9010 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009011 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009012 "cpu": "watchos_i386",
9013 },
9014)
9015
9016config_setting(
9017 name = "watchos_x86_64",
9018 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009019 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009020 "cpu": "watchos_x86_64",
9021 },
9022)
9023
9024config_setting(
9025 name = "tvos_arm64",
9026 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009027 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009028 "cpu": "tvos_arm64",
9029 },
9030)
9031
9032config_setting(
9033 name = "tvos_x86_64",
9034 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009035 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009036 "cpu": "tvos_x86_64",
9037 },
9038)