blob: 7156d8242983c94d59d3cb8f69afb9fa0637bd74 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
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473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhan436ebe62019-12-04 15:10:12 -0800910]
911
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1622 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1623 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1624 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1625 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1626 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhanf6011352021-07-15 15:11:14 -07001627 "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1628 "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1629 "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1630 "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1631 "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1632 "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan43bee052021-07-14 20:57:18 -07001633 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
1634 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
1635 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
1636 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
1637 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
1638 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
1639 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
1640 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
1641 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
1642 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
1643 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
1644 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001645 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001646 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07001647 "src/qu8-vadd/gen/minmax-wasmsimd-x8.c",
1648 "src/qu8-vadd/gen/minmax-wasmsimd-x16.c",
1649 "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c",
1650 "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001651 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001652 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001653 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001654 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001655 "src/x32-zip/x2-wasmsimd.c",
1656 "src/x32-zip/x3-wasmsimd.c",
1657 "src/x32-zip/x4-wasmsimd.c",
1658 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001659]
1660
Marat Dukhan08c4a432019-10-03 09:29:21 -07001661# ISA-specific micro-kernels
1662NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001663 "src/f32-argmaxpool/4x-neon-c4.c",
1664 "src/f32-argmaxpool/9p8x-neon-c4.c",
1665 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001666 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1667 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001668 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001669 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001670 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001671 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001672 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001673 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001674 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001675 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001676 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001677 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001679 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001680 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001681 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001682 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1683 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1684 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1685 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1686 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001687 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001688 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001689 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1690 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1691 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001692 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001693 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001694 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1695 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1696 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1697 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1698 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001699 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1700 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1701 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001702 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001703 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001704 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1705 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1706 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001707 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1708 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1709 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1710 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001711 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001712 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1713 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001714 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001715 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001716 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001717 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001718 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1719 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001720 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1721 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1722 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1723 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1724 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1725 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1726 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1727 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001728 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001729 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001730 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001731 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1732 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001733 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001734 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1735 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001736 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001737 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1738 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1739 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1740 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1741 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001742 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1743 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001744 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1745 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001746 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1747 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001748 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1749 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1750 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1751 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1752 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1753 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1754 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1755 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1756 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1757 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1758 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1759 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1760 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1761 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1762 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1763 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001764 "src/f32-ibilinear-chw/gen/neon-p4.c",
1765 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001766 "src/f32-ibilinear/gen/neon-c4.c",
1767 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001768 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001769 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001770 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001771 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1772 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001773 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001774 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1775 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1776 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1777 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001778 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1779 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001780 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1781 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001782 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1783 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001784 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1785 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1786 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001787 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1788 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001789 "src/f32-prelu/gen/neon-1x4.c",
1790 "src/f32-prelu/gen/neon-1x8.c",
1791 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001792 "src/f32-prelu/gen/neon-2x4.c",
1793 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001794 "src/f32-prelu/gen/neon-2x16.c",
1795 "src/f32-prelu/gen/neon-4x4.c",
1796 "src/f32-prelu/gen/neon-4x8.c",
1797 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001798 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001799 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001800 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001801 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1802 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001803 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001804 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1805 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001806 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001807 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1808 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001809 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1810 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1811 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1812 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1813 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1814 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1815 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1816 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1817 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1818 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1819 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1820 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1821 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001822 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001823 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1824 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1825 "src/f32-spmm/gen/4x1-minmax-neon.c",
1826 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1827 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1828 "src/f32-spmm/gen/8x1-minmax-neon.c",
1829 "src/f32-spmm/gen/12x1-minmax-neon.c",
1830 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1831 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1832 "src/f32-spmm/gen/16x1-minmax-neon.c",
1833 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1834 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1835 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001836 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1837 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1838 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1839 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001840 "src/f32-vbinary/gen/vmax-neon-x4.c",
1841 "src/f32-vbinary/gen/vmax-neon-x8.c",
1842 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1843 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1844 "src/f32-vbinary/gen/vmin-neon-x4.c",
1845 "src/f32-vbinary/gen/vmin-neon-x8.c",
1846 "src/f32-vbinary/gen/vminc-neon-x4.c",
1847 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001848 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1849 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1850 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1851 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1852 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1853 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001854 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1855 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1856 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1857 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001858 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1859 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1860 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1861 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001862 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1863 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001864 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1865 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1866 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1867 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1868 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1869 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1870 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1871 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1872 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1873 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1874 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1875 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001876 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1877 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1878 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001879 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1880 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001881 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1882 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001883 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1884 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001885 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1886 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001887 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1888 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1889 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1890 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1891 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1892 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001893 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1894 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1895 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1896 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1897 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1898 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1899 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1900 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1901 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1902 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1903 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1904 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1905 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1906 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1907 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1908 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1909 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1910 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001911 "src/f32-vunary/gen/vabs-neon-x4.c",
1912 "src/f32-vunary/gen/vabs-neon-x8.c",
1913 "src/f32-vunary/gen/vneg-neon-x4.c",
1914 "src/f32-vunary/gen/vneg-neon-x8.c",
1915 "src/f32-vunary/gen/vsqr-neon-x4.c",
1916 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001917 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1918 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001919 "src/math/roundd-neon-addsub.c",
1920 "src/math/roundd-neon-cvt.c",
1921 "src/math/roundne-neon-addsub.c",
1922 "src/math/roundu-neon-addsub.c",
1923 "src/math/roundu-neon-cvt.c",
1924 "src/math/roundz-neon-addsub.c",
1925 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001926 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1927 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1928 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1929 "src/math/sqrt-neon-nr1rsqrts.c",
1930 "src/math/sqrt-neon-nr2rsqrts.c",
1931 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001932 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c",
1933 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001934 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001935 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c",
1936 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001937 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001938 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c",
1939 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c",
1940 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c",
1941 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001942 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001943 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c",
1944 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c",
1945 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c",
1946 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001947 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1948 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1949 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1950 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1951 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001952 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001953 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1954 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001955 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001956 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1957 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001958 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001959 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1960 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001961 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001962 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1963 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001964 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001965 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001966 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c",
1967 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001968 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001969 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001970 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001971 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c",
1972 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001973 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001974 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001975 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001976 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c",
1977 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c",
1978 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c",
1979 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001980 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001981 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001982 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001983 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c",
1984 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c",
1985 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c",
1986 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001987 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001988 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001989 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001990 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001991 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001992 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001993 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001994 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001995 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001996 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1997 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1998 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1999 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002000 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
2001 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
2002 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
2003 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002004 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2005 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2006 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002007 "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002008 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002009 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2010 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002011 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07002012 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002013 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002014 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002015 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002016 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002017 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002018 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2019 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2020 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002021 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002022 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2023 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002024 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2025 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2026 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2027 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2028 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2029 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2030 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2031 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002033 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002034 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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Marat Dukhane903dff2021-07-16 19:43:41 -07002036 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07002037 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002038 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002039 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002040 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002041 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2042 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2043 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2044 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002045 "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002046 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2047 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2048 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2049 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2050 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2051 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2052 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2053 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002055 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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2057 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2058 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2059 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2060 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2061 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2062 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002064 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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2066 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2067 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2068 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2069 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2070 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2071 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002073 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2074 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2075 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2076 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2077 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002078 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002079 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2080 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2081 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
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Frank Barchard22fbe772021-07-20 15:56:32 -07002083 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2084 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002085 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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2087 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2088 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2089 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2090 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2091 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2092 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2093 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
2094 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2095 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2096 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002098 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002099 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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Marat Dukhancf055852021-06-26 09:05:09 -07002102 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002104 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002105 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002106 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002108 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
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2179 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2180 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2181 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2182 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2183 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002184 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002185 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002186 "src/qs8-requantization/rndna-neon.c",
Marat Dukhand3d818c2021-07-16 17:56:54 -07002187 "src/qs8-requantization/rndnu-neon-mull.c",
2188 "src/qs8-requantization/rndnu-neon-qdmulh.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002189 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2190 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2191 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2192 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2193 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2194 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2195 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2196 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002197 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2198 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002199 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
2200 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
2201 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
2202 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
2203 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
2204 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
2205 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
2206 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002207 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2208 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07002209 "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002210 "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07002211 "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
2212 "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002213 "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07002214 "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
2215 "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002216 "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07002217 "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
2218 "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002219 "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07002220 "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002221 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002222 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002223 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07002224 "src/qu8-vadd/gen/minmax-neon-ld64-x8.c",
2225 "src/qu8-vadd/gen/minmax-neon-ld64-x16.c",
2226 "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c",
2227 "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002228 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002229 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002230 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002231 "src/x8-zip/x2-neon.c",
2232 "src/x8-zip/x3-neon.c",
2233 "src/x8-zip/x4-neon.c",
2234 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002235 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002236 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002237 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002238 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002239 "src/x32-zip/x2-neon.c",
2240 "src/x32-zip/x3-neon.c",
2241 "src/x32-zip/x4-neon.c",
2242 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002243]
2244
2245NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002246 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2247 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2248 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2249 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2250 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2251 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2252 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2253 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2254 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2255 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2256 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2257 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2258 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2259 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2260 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2261 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2262 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2263 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2264 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2265 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2266 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2267 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2268 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2269 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2270 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2271 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2272 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2273 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2274 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2275 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002276 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2277 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002278 "src/f32-ibilinear/gen/neonfma-c4.c",
2279 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002280 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002281 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002282 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002283 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2284 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002285 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2286 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002287 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2288 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002289 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2290 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002291 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002292 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002293 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002294 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2295 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002296 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002297 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2298 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002299 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002300 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2301 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002302 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2303 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2304 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2305 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2306 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2307 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2308 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2309 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2310 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2311 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2312 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2313 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2314 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002315 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2316 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2317 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2318 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2319 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2320 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2321 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2322 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2323 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2324 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2325 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2326 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2327 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002328 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2329 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2330 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2331 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2332 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2333 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2334 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2335 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2336 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2337 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2338 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2339 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002340 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2341 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002342 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2343 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2344 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2345 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2346 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2347 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2348 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2349 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2350 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2351 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2352 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2353 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2354 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2355 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2356 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2357 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2358 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2359 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2360 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2361 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2362 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2363 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2364 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2365 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2366 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2367 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2368 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2369 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2370 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2371 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2372 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2373 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2374 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2375 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2376 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2377 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2378 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2379 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2380 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2381 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2382 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2383 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2384 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2385 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2386 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2387 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2388 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2389 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2390 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2391 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2392 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2393 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2394 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2395 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002396 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2397 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2398 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2399 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2400 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2401 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2402 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2403 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2404 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2405 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2406 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2407 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2408 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2409 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2410 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2411 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2412 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2413 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2414 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2415 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002416 "src/math/exp-neonfma-rr2-lut64-p2.c",
2417 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002418 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2419 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002420 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2421 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2422 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002423 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2424 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2425 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002426 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2427 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2428 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002429 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2430 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2431 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002432 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2433 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2434 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002435 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2436 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2437 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002438 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2439 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2440 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002441 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002442 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002443 "src/math/sqrt-neonfma-nr2fma.c",
2444 "src/math/sqrt-neonfma-nr2fma1adj.c",
2445 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002446]
2447
2448AARCH64_NEONFMA_UKERNELS = [
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Marat Dukhance7a3f82020-05-17 21:46:44 -07002450 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002451 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002452 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002453 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002454 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002455 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
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Marat Dukhan1f29b802020-05-15 23:46:39 -07002457 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002458 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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2460 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002461 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002462 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002463 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2467 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002468 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002471 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002472 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002473 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2474 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2475 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002476 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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2479 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002480 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002481 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002483 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002484 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002485 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002486 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002487 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2488 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002489 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2490 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
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2494 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002497 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002498 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
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2504 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2505 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2506 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2507 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2508 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2509 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2510 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2511 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2512 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2513 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2514 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2515 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2516 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2517 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2518 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002519 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2520 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002521 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2522 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002523 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2524 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002525 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2526 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002527 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2528 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002529 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2530 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2531 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2532 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2533 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2534 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002535 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2536 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2537 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2538 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2539 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2540 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2541 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2542 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2543 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2544 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2545 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2546 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2547 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2548 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2549 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2550 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2551 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2552 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002553 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2554 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002555 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002556 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002557 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002558 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002559 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002560 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002561]
2562
Marat Dukhan8853b822020-05-07 12:19:01 -07002563NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002564 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2565 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002566 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
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2568 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
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2570 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -07002572 "src/math/roundd-neonv8.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -07002574 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002575 "src/math/roundz-neonv8.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002576 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c",
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Marat Dukhan59af5812021-06-29 18:09:57 -07002578 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002579 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c",
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Marat Dukhan59af5812021-06-29 18:09:57 -07002581 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002582 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c",
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2585 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002586 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002587 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c",
2588 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c",
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Marat Dukhan59af5812021-06-29 18:09:57 -07002591 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
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2593 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
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Marat Dukhane76478b2021-06-28 16:35:40 -07002597 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002599 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002600 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002602 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002603 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2604 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002605 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002606 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2607 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002608 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
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2610 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2611 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2612 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2613 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2614 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2615 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002616 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002619 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002620 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
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Marat Dukhan14f325e2021-06-30 18:46:25 -07002622 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
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2624 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002625 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002626 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2627 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002628 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2629 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2630 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2631 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2632 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2633 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2634 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2635 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002636 "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
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Marat Dukhan8853b822020-05-07 12:19:01 -07002640]
2641
Marat Dukhan08c4a432019-10-03 09:29:21 -07002642AARCH64_NEONFP16ARITH_UKERNELS = [
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2649 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
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2651 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2652 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2653 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
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2693 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2694 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07002727]
2728
Benoit Jacoba9644732020-08-13 12:48:55 -07002729NEONDOT_UKERNELS = [
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Marat Dukhane903dff2021-07-16 19:43:41 -07002768 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002769 "src/qs8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2770 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002771 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002772 "src/qs8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2773 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002774 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002775 "src/qs8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2776 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002777 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002778 "src/qs8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2779 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002780 "src/qs8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2781 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002782 "src/qs8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2783 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002784 "src/qs8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
2785 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002786]
2787
Marat Dukhan08c4a432019-10-03 09:29:21 -07002788SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -07002789 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
2790 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07002791 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
2792 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002793 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
2794 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
2795 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
2796 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002797 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2798 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002799 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2800 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2801 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2802 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002803 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2804 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002805 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2806 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2807 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002808 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002809 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002810 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2811 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2812 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2813 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2814 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002815 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2816 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2817 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002818 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002819 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002820 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2821 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2822 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002823 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2824 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2825 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2826 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2827 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2828 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2829 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2830 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2831 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2832 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2833 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2834 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2835 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002836 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2837 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2838 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2839 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2840 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2841 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2842 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2843 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002844 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002845 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002846 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002847 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2848 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002849 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2850 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2851 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002852 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2853 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2854 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002855 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2856 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2857 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002858 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2859 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2860 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002861 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2862 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2863 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002864 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2865 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2866 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002867 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2868 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2869 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2870 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002871 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2872 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2873 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002874 "src/f32-ibilinear-chw/gen/sse-p4.c",
2875 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002876 "src/f32-ibilinear/gen/sse-c4.c",
2877 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002878 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2879 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2880 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002881 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2882 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2883 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002884 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2885 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2886 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2887 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002888 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2889 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2890 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002891 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2892 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2893 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002894 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002895 "src/f32-prelu/gen/sse-2x4.c",
2896 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002897 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002898 "src/f32-spmm/gen/4x1-minmax-sse.c",
2899 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002900 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002901 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002902 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2903 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2904 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2905 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2906 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2907 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2908 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2909 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002910 "src/f32-vbinary/gen/vmax-sse-x4.c",
2911 "src/f32-vbinary/gen/vmax-sse-x8.c",
2912 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2913 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2914 "src/f32-vbinary/gen/vmin-sse-x4.c",
2915 "src/f32-vbinary/gen/vmin-sse-x8.c",
2916 "src/f32-vbinary/gen/vminc-sse-x4.c",
2917 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002918 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2919 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2920 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2921 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2922 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2923 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2924 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2925 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002926 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2927 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2928 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2929 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002930 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2931 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2932 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2933 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002934 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2935 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002936 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2937 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002938 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2939 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002940 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2941 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002942 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2943 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002944 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2945 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002946 "src/f32-vunary/gen/vabs-sse-x4.c",
2947 "src/f32-vunary/gen/vabs-sse-x8.c",
2948 "src/f32-vunary/gen/vneg-sse-x4.c",
2949 "src/f32-vunary/gen/vneg-sse-x8.c",
2950 "src/f32-vunary/gen/vsqr-sse-x4.c",
2951 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002952 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002953 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002954 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002955 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002956 "src/math/sqrt-sse-hh1mac.c",
2957 "src/math/sqrt-sse-nr1mac.c",
2958 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002959 "src/x32-fill/sse.c",
2960 "src/x32-packx/x4-sse.c",
2961 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002962]
2963
2964SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002965 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002966 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002967 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002968 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2969 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2970 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2971 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2972 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2973 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2974 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2975 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2976 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2977 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2978 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2979 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002980 "src/f32-prelu/gen/sse2-2x4.c",
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Marat Dukhanb39689d2020-01-24 13:32:20 -08002982 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002983 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002984 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002985 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002987 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002988 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002990 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002991 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2992 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002993 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002994 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2995 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2996 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2997 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2998 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
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3000 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07003006 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
3007 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003008 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
3009 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003010 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
3011 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
3012 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
3013 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
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3015 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003016 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
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3020 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
3021 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
3022 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
3023 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
3024 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
3025 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
3026 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
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Marat Dukhanb7633f22020-11-20 16:34:56 -08003028 "src/math/exp-sse2-rr2-lut64-p2.c",
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Marat Dukhande390d42020-11-29 19:32:18 -08003030 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08003031 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08003032 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003033 "src/math/roundd-sse2-cvt.c",
3034 "src/math/roundne-sse2-cvt.c",
3035 "src/math/roundu-sse2-cvt.c",
3036 "src/math/roundz-sse2-cvt.c",
3037 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
3038 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
3039 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
3040 "src/math/sigmoid-sse2-rr2-p5-div.c",
3041 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
3042 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003043 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
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Marat Dukhan98042f22021-06-15 00:43:13 -07003045 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
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Marat Dukhan98042f22021-06-15 00:43:13 -07003047 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
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Marat Dukhan98042f22021-06-15 00:43:13 -07003049 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003050 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003051 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003053 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003054 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003055 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003056 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003057 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003058 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003059 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003060 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003061 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003062 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003063 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003064 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003065 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003066 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003067 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003069 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07003149 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07003153 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
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Marat Dukhanf0f28812021-07-08 22:34:20 -07003155 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
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3157 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
3158 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003159 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
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Marat Dukhanef47f8d2021-07-02 15:08:32 -07003161 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
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3163 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
3164 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
3165 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
3166 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
3167 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
3168 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003169 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003170 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
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3172 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
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Marat Dukhancdbe9a32021-07-01 23:52:04 -07003176 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003177 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
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3179 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
3180 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
3181 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
3182 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
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3184 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003185 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003186 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
3187 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
3188 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
3189 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
3190 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
3191 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003192 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07003193 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003194 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003195 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07003196 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
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3198 "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan99936602020-04-11 16:47:01 -07003200 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003201 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003202 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003203 "src/x8-zip/x2-sse2.c",
3204 "src/x8-zip/x3-sse2.c",
3205 "src/x8-zip/x4-sse2.c",
3206 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07003207 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003208 "src/x32-zip/x2-sse2.c",
3209 "src/x32-zip/x3-sse2.c",
3210 "src/x32-zip/x4-sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07003212]
3213
3214SSSE3_UKERNELS = [
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Marat Dukhancaf48312021-06-01 20:20:58 -07003225 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
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Marat Dukhan159688f2020-08-06 10:34:29 -07003231 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003234 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003237 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003238 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003242 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003243 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003244 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003246 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
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Marat Dukhan06716242021-05-26 15:56:39 -07003261 "src/qs8-requantization/rndna-ssse3.c",
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3269
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003270SSE41_UKERNELS = [
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07003285 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
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Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003287 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003289 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003307 "src/math/roundd-sse41.c",
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3374 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3375 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3376 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
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3378 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3379 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3380 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
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Marat Dukhan159688f2020-08-06 10:34:29 -07003383 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003409 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003410 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003411 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003412 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003413 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003419 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003422 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003427 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003428 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003429 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003430 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003431 "src/qs8-requantization/rndnu-sse4-sra.c",
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Marat Dukhand9f3ad42020-08-10 12:30:58 -07003433 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
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3435 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
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Marat Dukhanbb9225e2020-09-06 22:40:56 -07003437 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07003441 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
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3447 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
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Marat Dukhanf0f28812021-07-08 22:34:20 -07003449 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003450 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003451 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
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Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003454 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003455 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003456 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003457 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
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Marat Dukhanef47f8d2021-07-02 15:08:32 -07003482 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -07003489 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003490 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003491 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
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Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003499]
3500
Marat Dukhan08c4a432019-10-03 09:29:21 -07003501AVX_UKERNELS = [
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Marat Dukhan1c587112020-04-08 20:04:28 -07003504 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3505 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003506 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3507 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003508 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3509 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3510 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3511 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3512 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3513 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003514 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003515 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3516 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003517 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003518 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003519 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003520 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003521 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3522 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3523 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3524 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3525 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3526 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3527 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3528 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3529 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3530 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3531 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003532 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003533 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3534 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003535 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003536 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003537 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003538 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003539 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3540 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003541 "src/f32-prelu/gen/avx-2x8.c",
3542 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003543 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003544 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3545 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3546 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3547 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3548 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3549 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3550 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3551 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003552 "src/f32-vbinary/gen/vmax-avx-x8.c",
3553 "src/f32-vbinary/gen/vmax-avx-x16.c",
3554 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3555 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3556 "src/f32-vbinary/gen/vmin-avx-x8.c",
3557 "src/f32-vbinary/gen/vmin-avx-x16.c",
3558 "src/f32-vbinary/gen/vminc-avx-x8.c",
3559 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003560 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3561 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3562 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3563 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3564 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3565 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3566 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3567 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003568 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3569 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3570 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3571 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003572 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3573 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3574 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3575 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003576 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3577 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003578 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3579 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3580 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3581 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3582 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3583 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3584 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3585 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3586 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3587 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3588 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3589 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3590 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3591 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3592 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3593 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3594 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3595 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003596 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3597 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003598 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3599 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003600 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3601 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003602 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3603 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003604 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3605 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3606 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3607 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3608 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3609 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003610 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003611 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3612 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3613 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3614 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3615 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3616 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3617 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3618 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3619 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3620 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3621 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3622 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3623 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3624 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3625 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3626 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3627 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3628 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3629 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3630 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003631 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3632 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003633 "src/f32-vunary/gen/vabs-avx-x8.c",
3634 "src/f32-vunary/gen/vabs-avx-x16.c",
3635 "src/f32-vunary/gen/vneg-avx-x8.c",
3636 "src/f32-vunary/gen/vneg-avx-x16.c",
3637 "src/f32-vunary/gen/vsqr-avx-x8.c",
3638 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003639 "src/math/exp-avx-rr2-p5.c",
3640 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3641 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3642 "src/math/expm1minus-avx-rr2-p6.c",
3643 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3644 "src/math/sigmoid-avx-rr2-p5-div.c",
3645 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3646 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003647 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003648 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003649 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3650 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003651 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003652 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3653 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003654 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003655 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3656 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003657 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003658 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3659 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3660 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3661 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3662 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003663 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003664 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003665 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003666 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003667 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003668 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003669 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003670 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003671 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003672 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003673 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003674 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003675 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003676 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003677 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003678 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003679 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003680 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003681 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003682 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003683 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003684 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003685 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003686 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003687 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003688 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003689 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003690 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003691 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003692 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003693 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3694 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3695 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003696 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003697 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003698 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3699 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3700 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3701 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003702 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003703 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3704 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3705 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3706 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003707 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003708 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3709 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3710 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3711 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3712 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3713 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3714 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3715 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3716 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3717 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3718 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003719 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003720 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003721 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003722 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003723 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003724 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003725 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003726 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003727 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003728 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003729 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003730 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003731 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003732 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003733 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003734 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003735 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003736 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003737 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003738 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003739 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003740 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003741 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003742 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003743 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003744 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003745 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003746 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003747 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003748 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003749 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003750 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003751 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003752 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003753 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003754 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3755 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3756 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3757 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3758 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3759 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3760 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3761 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3762 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3763 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3764 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3765 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3766 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3767 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3768 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3769 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003770 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003771 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003772 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003773 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003774 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003775 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003776 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003777 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003778 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3779 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3780 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3781 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3782 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3783 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3784 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3785 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3786 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3787 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3788 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3789 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3790 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3791 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3792 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3793 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3794 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3795 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3796 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3797 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3798 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3799 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3800 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3801 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3802 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3803 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3804 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3805 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003806 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3807 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3808 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3809 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3810 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3811 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3812 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3813 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003814]
3815
Marat Dukhan1566fee2020-08-02 21:55:41 -07003816XOP_UKERNELS = [
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Marat Dukhan98042f22021-06-15 00:43:13 -07003818 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003819 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003820 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003821 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003822 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003823 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003824 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3825 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3826 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003827 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003828 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003829 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003830 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003831 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003832 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003833 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003834 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003835 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003836 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003837 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003838 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003839 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003840 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003841 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003842 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003843 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003844 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003845 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003846 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003847 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003848 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003849 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003850 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003851 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003853 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003854 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
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Marat Dukhancaf48312021-06-01 20:20:58 -07003856 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3857 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003858 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c",
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3860 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
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3863 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003864 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003865 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3866 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3867 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3868 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3869 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3870 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003872 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003873 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003874 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003875 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003876 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003901 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003903 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003904 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
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3908 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3909 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3910 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3911 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3912 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3913 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003914 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3915 "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3916 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3917 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003918 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
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3922 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
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3927 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3928 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3929 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3930 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3931 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3932 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3933 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3934 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3935 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3936 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3937 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3938 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
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3940 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3941 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3942 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3943 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3944 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3945 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003946 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3947 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3948 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3949 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003950]
3951
Marat Dukhanfda12b82019-11-21 12:27:59 -08003952FMA3_UKERNELS = [
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Marat Dukhan6674d692021-05-05 22:27:00 -07004007 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07004009 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
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4021
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004022AVX2_UKERNELS = [
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4069 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
4070 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
4071 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
4072 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
4073 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
4074 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
4075 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
4076 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
4077 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
4078 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
4079 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
4080 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
4081 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
4082 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
4083 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
4084 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
4085 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
4086 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
4087 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
4088 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
4089 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
4090 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
4091 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
4092 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
4093 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
4094 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
4095 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
4096 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
4097 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
4098 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004099 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
4100 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
4101 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
4102 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
4103 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
4104 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
4105 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
4106 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
4107 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
4108 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
4109 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
4110 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
4111 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
4112 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
4113 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
4114 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
4115 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
4116 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
4117 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
4118 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
4119 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
4120 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
4121 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
4122 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004123 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
4124 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
4125 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
4126 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
4127 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
4128 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
4129 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
4130 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
4131 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
4132 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
4133 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
4134 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
4135 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
4136 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
4137 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
4138 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
4139 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
4140 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
4141 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
4142 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
4143 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
4144 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
4145 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
4146 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
4147 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
4148 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
4149 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
4150 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
4151 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
4152 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004153 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
4154 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
4155 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004156 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
4157 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
4158 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
4159 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08004160 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004161 "src/math/extexp-avx2-p5.c",
4162 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
4163 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
4164 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
4165 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
4166 "src/math/sigmoid-avx2-rr1-p5-div.c",
4167 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
4168 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
4169 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
4170 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
4171 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
4172 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
4173 "src/math/sigmoid-avx2-rr2-p5-div.c",
4174 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
4175 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07004176 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4177 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4178 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
4179 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4180 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
4181 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4182 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
4183 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
4184 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
4185 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4186 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
4187 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004188 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4189 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
4190 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4191 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
4192 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4193 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07004194 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4195 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4196 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004197 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004198 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004199 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004200 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004201 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004202 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004203 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
4204 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004205 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004206 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004207 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
4208 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004209 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004210 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004211 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004212 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004213 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004214 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004215 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
4216 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004217 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004218 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004219 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
4220 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004221 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004222 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004223 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004224 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004225 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004226 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004227 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004228 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004229 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004230 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004231 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004232 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004233 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004234 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004235 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004236 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004237 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004238 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07004239 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4240 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4241 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
4242 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
4243 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4244 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
4245 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
4246 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07004247 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4248 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4249 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4250 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4251 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4252 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004253 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4254 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4255 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4256 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4257 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4258 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07004259 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4260 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4261 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4262 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004263]
4264
Marat Dukhan08c4a432019-10-03 09:29:21 -07004265AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004266 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4267 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004268 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4269 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004270 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4271 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004272 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
4273 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
4274 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4275 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4276 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4277 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004278 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4279 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4280 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4281 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4282 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4283 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004284 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4285 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4286 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4287 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4288 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4289 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004290 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4291 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4292 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4293 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4294 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4295 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004296 "src/f32-prelu/gen/avx512f-2x16.c",
4297 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004298 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4299 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004300 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004301 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004302 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004303 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4304 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004305 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004306 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4307 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4308 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004309 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004310 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4311 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004312 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004313 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004314 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004315 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4316 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004317 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004318 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4319 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4320 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004321 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004322 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4323 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004324 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004325 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004326 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004327 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4328 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004329 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004330 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4331 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4332 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004333 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004334 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004335 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4336 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4337 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4338 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4339 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4340 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4341 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4342 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004343 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4344 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4345 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4346 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4347 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4348 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4349 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4350 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004351 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4352 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4353 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4354 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4355 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4356 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4357 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4358 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004359 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4360 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4361 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4362 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004363 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4364 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4365 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4366 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004367 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4368 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004369 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4370 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4371 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4372 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4373 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4374 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4375 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4376 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4377 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4378 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4379 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4380 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4381 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4382 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4383 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4384 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004385 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4386 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004387 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4388 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004389 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4390 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004391 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4392 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4393 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4394 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4395 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4396 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4397 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4398 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004399 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004400 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4401 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4402 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4403 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4404 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4405 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4406 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4407 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4408 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4409 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4410 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4411 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4412 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4413 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4414 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4415 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4416 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4417 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4418 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4419 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4420 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4421 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4422 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4423 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004424 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4425 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4426 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4427 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4428 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4429 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4430 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4431 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4432 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4433 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4434 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4435 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4436 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4437 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4438 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4439 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4440 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4441 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4442 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4443 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4444 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4445 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4446 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4447 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4448 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4449 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4450 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4451 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4452 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4453 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4454 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4455 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4456 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4457 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4458 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4459 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4460 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4461 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4462 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4463 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4464 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4465 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4466 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4467 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4468 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4469 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4470 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4471 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004472 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4473 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4474 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4475 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4476 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4477 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4478 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4479 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004480 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4481 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4482 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4483 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4484 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4485 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004486 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4487 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4488 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4489 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4490 "src/math/exp-avx512f-rr2-p5-scalef.c",
4491 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004492 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4493 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004494 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004495 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004496 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004497 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004498 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004499 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004500 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004501 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004502 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004503 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4504 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4505 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4506 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4507 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4508 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4509 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4510 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4511 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4512 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004513 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004514 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004515 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4516 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4517 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4518 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004519 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004520 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004521 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004522]
4523
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004524AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004525 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4526 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4527 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4528 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004529 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4530 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4531 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4532 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4533 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4534 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4535 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4536 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004537 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004538 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004539 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004540 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004541 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004542 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004543 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004544 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004545 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004546 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004547 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004548 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004549 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004550 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004551 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004552 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004553 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004554 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004555 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004556 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004557 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004558 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004559 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004560 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhane76049a2021-07-22 14:48:59 -07004561 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
4562 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c",
4563 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
4564 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c",
Marat Dukhancfd606b2021-07-09 01:18:45 -07004565 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4566 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4567 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4568 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004569 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4570 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4571 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4572 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4573 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4574 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4575 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4576 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhane76049a2021-07-22 14:48:59 -07004577 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
4578 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c",
4579 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
4580 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004581]
4582
Frank Barchardbcedc082020-08-17 18:00:51 -07004583WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004584 "src/f32-vrelu/wasm_shr_x1.S",
4585 "src/f32-vrelu/wasm_shr_x2.S",
4586 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004587]
4588
Marat Dukhan08c4a432019-10-03 09:29:21 -07004589AARCH32_ASM_UKERNELS = [
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Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004591 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004592 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4593 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004594 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004595 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004596 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004597 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004598 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4599 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004600 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4601 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4602 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4603 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004604]
4605
4606AARCH64_ASM_UKERNELS = [
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Frank Barchard04336c12020-10-22 16:48:55 -07004608 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004609 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004610 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004611 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004612 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004613 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004614 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
4615 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004616 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
4617 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
4618 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
4619 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
4620 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004621 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004622 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004623 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
4624 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004625 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
4626 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004628 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004629 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
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Frank Barchard04336c12020-10-22 16:48:55 -07004631 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004632 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -07004634 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004635 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004636 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004637 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004638 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004639 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004640 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004641 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4642 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
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4796 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4797 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4798 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004799 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004800 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004801 "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004802 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4803 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004804 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4805 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004806 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
4807 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004808 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4809 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4810 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004811 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4812 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004813 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004814 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4815 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004816 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004817]
4818
Marat Dukhan1b354632020-03-23 12:50:22 -07004819INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004820 "src/xnnpack/argmaxpool.h",
4821 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004822 "src/xnnpack/common.h",
4823 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004824 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004825 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004826 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004827 "src/xnnpack/gavgpool.h",
4828 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004829 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004830 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004831 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004832 "src/xnnpack/lut.h",
4833 "src/xnnpack/math.h",
4834 "src/xnnpack/maxpool.h",
4835 "src/xnnpack/packx.h",
4836 "src/xnnpack/pad.h",
4837 "src/xnnpack/params.h",
4838 "src/xnnpack/pavgpool.h",
4839 "src/xnnpack/ppmm.h",
4840 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004841 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004842 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004843 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004844 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004845 "src/xnnpack/spmm.h",
4846 "src/xnnpack/unpool.h",
4847 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004848 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004849 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004850 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004851 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004852 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004853 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004854 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004855]
4856
4857INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004858 "include/xnnpack.h",
4859 "src/xnnpack/allocator.h",
4860 "src/xnnpack/compute.h",
4861 "src/xnnpack/im2col.h",
4862 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004863 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004864 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004865 "src/xnnpack/operator.h",
4866 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004867 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004868 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004869 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004870 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004871]
4872
Marat Dukhan1b354632020-03-23 12:50:22 -07004873ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004874 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004875]
4876
Marat Dukhan1b354632020-03-23 12:50:22 -07004877MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004878 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004879 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004880]
4881
Marat Dukhan1b354632020-03-23 12:50:22 -07004882MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004883 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004884 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004885 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004886 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004887]
4888
4889OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004890 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004891 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004892]
4893
4894WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004895 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004896 "src/xnnpack/operator.h",
4897 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004898]
4899
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004900LOGGING_COPTS = select({
4901 # No logging in optimized mode
4902 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4903 # Full logging in debug mode
4904 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4905 # Error-only logging in default (fastbuild) mode
4906 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4907})
4908
Marat Dukhan3b59de22020-06-03 20:15:19 -07004909LOGGING_SRCS = select({
4910 # No logging in optimized mode
4911 ":optimized_build": [],
4912 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004913 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004914 "src/operator-strings.c",
4915 "src/subgraph-strings.c",
4916 ],
4917})
4918
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004919LOGGING_HDRS = [
4920 "src/xnnpack/log.h",
4921]
4922
Marat Dukhan08c4a432019-10-03 09:29:21 -07004923xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004924 name = "tables",
4925 srcs = TABLE_SRCS,
4926 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004927 gcc_copts = xnnpack_gcc_std_copts(),
4928 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004929)
4930
4931xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004932 name = "scalar_ukernels",
4933 srcs = SCALAR_UKERNELS,
4934 hdrs = INTERNAL_HDRS,
4935 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004936 gcc_copts = xnnpack_gcc_std_copts(),
4937 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004938 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004939 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004940 "@FP16",
4941 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004942 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004943 ],
4944)
4945
4946xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004947 name = "scalar_ukernels_test_mode",
4948 srcs = SCALAR_UKERNELS,
4949 hdrs = INTERNAL_HDRS,
4950 aarch32_copts = ["-marm"],
4951 copts = [
4952 "-UNDEBUG",
4953 "-DXNN_TEST_MODE=1",
4954 ],
4955 gcc_copts = xnnpack_gcc_std_copts(),
4956 msvc_copts = xnnpack_msvc_std_copts(),
4957 deps = [
4958 ":tables",
4959 "@FP16",
4960 "@FXdiv",
4961 "@pthreadpool",
4962 ],
4963)
4964
4965xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004966 name = "wasm_ukernels",
4967 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004968 gcc_copts = xnnpack_gcc_std_copts(),
4969 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004970 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004971 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004972 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004973 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004974 "@FP16",
4975 "@FXdiv",
4976 "@pthreadpool",
4977 ],
4978)
4979
4980xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004981 name = "wasm_ukernels_test_mode",
4982 hdrs = INTERNAL_HDRS,
4983 copts = [
4984 "-UNDEBUG",
4985 "-DXNN_TEST_MODE=1",
4986 ],
4987 gcc_copts = xnnpack_gcc_std_copts(),
4988 msvc_copts = xnnpack_msvc_std_copts(),
4989 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004990 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004991 deps = [
4992 ":tables",
4993 "@FP16",
4994 "@FXdiv",
4995 "@pthreadpool",
4996 ],
4997)
4998
4999xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005000 name = "neon_ukernels",
5001 hdrs = INTERNAL_HDRS,
5002 aarch32_copts = [
5003 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07005004 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005005 "-mfpu=neon",
5006 ],
5007 aarch32_srcs = NEON_UKERNELS,
5008 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005009 gcc_copts = xnnpack_gcc_std_copts(),
5010 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005011 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005012 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005013 "@FP16",
5014 "@pthreadpool",
5015 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005016)
5017
5018xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005019 name = "neon_ukernels_test_mode",
5020 hdrs = INTERNAL_HDRS,
5021 aarch32_copts = [
5022 "-marm",
5023 "-march=armv7-a",
5024 "-mfpu=neon",
5025 ],
5026 aarch32_srcs = NEON_UKERNELS,
5027 aarch64_srcs = NEON_UKERNELS,
5028 copts = [
5029 "-UNDEBUG",
5030 "-DXNN_TEST_MODE=1",
5031 ],
5032 gcc_copts = xnnpack_gcc_std_copts(),
5033 msvc_copts = xnnpack_msvc_std_copts(),
5034 deps = [
5035 ":tables",
5036 "@FP16",
5037 "@pthreadpool",
5038 ],
5039)
5040
5041xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005042 name = "neonfma_ukernels",
5043 hdrs = INTERNAL_HDRS,
5044 aarch32_copts = [
5045 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07005046 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005047 "-mfpu=neon-vfpv4",
5048 ],
5049 aarch32_srcs = NEONFMA_UKERNELS,
5050 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005051 apple_aarch32_copts = [
5052 "-mcpu=swift",
5053 "-mtune=generic",
5054 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005055 gcc_copts = xnnpack_gcc_std_copts(),
5056 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005057 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005058 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005059 "@FP16",
5060 "@pthreadpool",
5061 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005062)
5063
5064xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005065 name = "neonfma_ukernels_test_mode",
5066 hdrs = INTERNAL_HDRS,
5067 aarch32_copts = [
5068 "-marm",
5069 "-march=armv7-a",
5070 "-mfpu=neon-vfpv4",
5071 ],
5072 aarch32_srcs = NEONFMA_UKERNELS,
5073 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005074 apple_aarch32_copts = [
5075 "-mcpu=swift",
5076 "-mtune=generic",
5077 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005078 copts = [
5079 "-UNDEBUG",
5080 "-DXNN_TEST_MODE=1",
5081 ],
5082 gcc_copts = xnnpack_gcc_std_copts(),
5083 msvc_copts = xnnpack_msvc_std_copts(),
5084 deps = [
5085 ":tables",
5086 "@FP16",
5087 "@pthreadpool",
5088 ],
5089)
5090
5091xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07005092 name = "neonv8_ukernels",
5093 hdrs = INTERNAL_HDRS,
5094 aarch32_copts = [
5095 "-marm",
5096 "-march=armv8-a",
5097 "-mfpu=neon-fp-armv8",
5098 ],
5099 aarch32_srcs = NEONV8_UKERNELS,
5100 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005101 apple_aarch32_copts = [
5102 "-mcpu=cyclone",
5103 "-mtune=generic",
5104 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07005105 gcc_copts = xnnpack_gcc_std_copts(),
5106 msvc_copts = xnnpack_msvc_std_copts(),
5107 deps = [
5108 ":tables",
5109 "@FP16",
5110 "@pthreadpool",
5111 ],
5112)
5113
5114xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005115 name = "neonv8_ukernels_test_mode",
5116 hdrs = INTERNAL_HDRS,
5117 aarch32_copts = [
5118 "-marm",
5119 "-march=armv8-a",
5120 "-mfpu=neon-fp-armv8",
5121 ],
5122 aarch32_srcs = NEONV8_UKERNELS,
5123 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005124 apple_aarch32_copts = [
5125 "-mcpu=cyclone",
5126 "-mtune=generic",
5127 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005128 copts = [
5129 "-UNDEBUG",
5130 "-DXNN_TEST_MODE=1",
5131 ],
5132 gcc_copts = xnnpack_gcc_std_copts(),
5133 msvc_copts = xnnpack_msvc_std_copts(),
5134 deps = [
5135 ":tables",
5136 "@FP16",
5137 "@pthreadpool",
5138 ],
5139)
5140
5141xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005142 name = "neonfp16arith_ukernels",
5143 hdrs = INTERNAL_HDRS,
5144 aarch64_copts = ["-march=armv8.2-a+fp16"],
5145 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005146 gcc_copts = xnnpack_gcc_std_copts(),
5147 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005148 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005149 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005150 "@FP16",
5151 "@pthreadpool",
5152 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005153)
5154
5155xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005156 name = "neonfp16arith_ukernels_test_mode",
5157 hdrs = INTERNAL_HDRS,
5158 aarch64_copts = ["-march=armv8.2-a+fp16"],
5159 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
5160 copts = [
5161 "-UNDEBUG",
5162 "-DXNN_TEST_MODE=1",
5163 ],
5164 gcc_copts = xnnpack_gcc_std_copts(),
5165 msvc_copts = xnnpack_msvc_std_copts(),
5166 deps = [
5167 ":tables",
5168 "@FP16",
5169 "@pthreadpool",
5170 ],
5171)
5172
5173xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07005174 name = "neondot_ukernels",
5175 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005176 aarch32_copts = [
5177 "-marm",
5178 "-march=armv8.2-a+dotprod",
5179 "-mfpu=neon-fp-armv8",
5180 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005181 aarch32_srcs = NEONDOT_UKERNELS,
5182 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5183 aarch64_srcs = NEONDOT_UKERNELS,
5184 gcc_copts = xnnpack_gcc_std_copts(),
5185 msvc_copts = xnnpack_msvc_std_copts(),
5186 deps = [
5187 ":tables",
5188 "@FP16",
5189 "@pthreadpool",
5190 ],
5191)
5192
5193xnnpack_cc_library(
5194 name = "neondot_ukernels_test_mode",
5195 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005196 aarch32_copts = [
5197 "-marm",
5198 "-march=armv8.2-a+dotprod",
5199 "-mfpu=neon-fp-armv8",
5200 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005201 aarch32_srcs = NEONDOT_UKERNELS,
5202 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5203 aarch64_srcs = NEONDOT_UKERNELS,
5204 copts = [
5205 "-UNDEBUG",
5206 "-DXNN_TEST_MODE=1",
5207 ],
5208 gcc_copts = xnnpack_gcc_std_copts(),
5209 msvc_copts = xnnpack_msvc_std_copts(),
5210 deps = [
5211 ":tables",
5212 "@FP16",
5213 "@pthreadpool",
5214 ],
5215)
5216
5217xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005218 name = "sse2_ukernels",
5219 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005220 gcc_copts = xnnpack_gcc_std_copts(),
5221 gcc_x86_copts = ["-msse2"],
5222 msvc_copts = xnnpack_msvc_std_copts(),
5223 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005224 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005225 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005226 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005227 "@FP16",
5228 "@pthreadpool",
5229 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005230)
5231
5232xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005233 name = "sse2_ukernels_test_mode",
5234 hdrs = INTERNAL_HDRS,
5235 copts = [
5236 "-UNDEBUG",
5237 "-DXNN_TEST_MODE=1",
5238 ],
5239 gcc_copts = xnnpack_gcc_std_copts(),
5240 gcc_x86_copts = ["-msse2"],
5241 msvc_copts = xnnpack_msvc_std_copts(),
5242 msvc_x86_32_copts = ["/arch:SSE2"],
5243 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
5244 deps = [
5245 ":tables",
5246 "@FP16",
5247 "@pthreadpool",
5248 ],
5249)
5250
5251xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005252 name = "ssse3_ukernels",
5253 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005254 gcc_copts = xnnpack_gcc_std_copts(),
5255 gcc_x86_copts = ["-mssse3"],
5256 msvc_copts = xnnpack_msvc_std_copts(),
5257 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005258 x86_srcs = SSSE3_UKERNELS,
5259 deps = [
5260 ":tables",
5261 "@FP16",
5262 "@pthreadpool",
5263 ],
5264)
5265
5266xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005267 name = "ssse3_ukernels_test_mode",
5268 hdrs = INTERNAL_HDRS,
5269 copts = [
5270 "-UNDEBUG",
5271 "-DXNN_TEST_MODE=1",
5272 ],
5273 gcc_copts = xnnpack_gcc_std_copts(),
5274 gcc_x86_copts = ["-mssse3"],
5275 msvc_copts = xnnpack_msvc_std_copts(),
5276 msvc_x86_32_copts = ["/arch:SSE2"],
5277 x86_srcs = SSSE3_UKERNELS,
5278 deps = [
5279 ":tables",
5280 "@FP16",
5281 "@pthreadpool",
5282 ],
5283)
5284
5285xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005286 name = "sse41_ukernels",
5287 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005288 gcc_copts = xnnpack_gcc_std_copts(),
5289 gcc_x86_copts = ["-msse4.1"],
5290 msvc_copts = xnnpack_msvc_std_copts(),
5291 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005292 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005293 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005294 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005295 "@FP16",
5296 "@pthreadpool",
5297 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005298)
5299
5300xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005301 name = "sse41_ukernels_test_mode",
5302 hdrs = INTERNAL_HDRS,
5303 copts = [
5304 "-UNDEBUG",
5305 "-DXNN_TEST_MODE=1",
5306 ],
5307 gcc_copts = xnnpack_gcc_std_copts(),
5308 gcc_x86_copts = ["-msse4.1"],
5309 msvc_copts = xnnpack_msvc_std_copts(),
5310 msvc_x86_32_copts = ["/arch:SSE2"],
5311 x86_srcs = SSE41_UKERNELS,
5312 deps = [
5313 ":tables",
5314 "@FP16",
5315 "@pthreadpool",
5316 ],
5317)
5318
5319xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005320 name = "avx_ukernels",
5321 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005322 gcc_copts = xnnpack_gcc_std_copts(),
5323 gcc_x86_copts = ["-mavx"],
5324 msvc_copts = xnnpack_msvc_std_copts(),
5325 msvc_x86_32_copts = ["/arch:AVX"],
5326 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005327 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005328 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005329 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005330 "@FP16",
5331 "@pthreadpool",
5332 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005333)
5334
5335xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005336 name = "avx_ukernels_test_mode",
5337 hdrs = INTERNAL_HDRS,
5338 copts = [
5339 "-UNDEBUG",
5340 "-DXNN_TEST_MODE=1",
5341 ],
5342 gcc_copts = xnnpack_gcc_std_copts(),
5343 gcc_x86_copts = ["-mavx"],
5344 msvc_copts = xnnpack_msvc_std_copts(),
5345 msvc_x86_32_copts = ["/arch:AVX"],
5346 msvc_x86_64_copts = ["/arch:AVX"],
5347 x86_srcs = AVX_UKERNELS,
5348 deps = [
5349 ":tables",
5350 "@FP16",
5351 "@pthreadpool",
5352 ],
5353)
5354
5355xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005356 name = "xop_ukernels",
5357 hdrs = INTERNAL_HDRS,
5358 gcc_copts = xnnpack_gcc_std_copts(),
5359 gcc_x86_copts = ["-mxop"],
5360 msvc_copts = xnnpack_msvc_std_copts(),
5361 msvc_x86_32_copts = ["/arch:AVX"],
5362 msvc_x86_64_copts = ["/arch:AVX"],
5363 x86_srcs = XOP_UKERNELS,
5364 deps = [
5365 ":tables",
5366 "@FP16",
5367 "@pthreadpool",
5368 ],
5369)
5370
5371xnnpack_cc_library(
5372 name = "xop_ukernels_test_mode",
5373 hdrs = INTERNAL_HDRS,
5374 copts = [
5375 "-UNDEBUG",
5376 "-DXNN_TEST_MODE=1",
5377 ],
5378 gcc_copts = xnnpack_gcc_std_copts(),
5379 gcc_x86_copts = ["-mxop"],
5380 msvc_copts = xnnpack_msvc_std_copts(),
5381 msvc_x86_32_copts = ["/arch:AVX"],
5382 msvc_x86_64_copts = ["/arch:AVX"],
5383 x86_srcs = XOP_UKERNELS,
5384 deps = [
5385 ":tables",
5386 "@FP16",
5387 "@pthreadpool",
5388 ],
5389)
5390
5391xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005392 name = "fma3_ukernels",
5393 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005394 gcc_copts = xnnpack_gcc_std_copts(),
5395 gcc_x86_copts = ["-mfma"],
5396 msvc_copts = xnnpack_msvc_std_copts(),
5397 msvc_x86_32_copts = ["/arch:AVX"],
5398 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005399 x86_srcs = FMA3_UKERNELS,
5400 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005401 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005402 "@FP16",
5403 "@pthreadpool",
5404 ],
5405)
5406
5407xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005408 name = "fma3_ukernels_test_mode",
5409 hdrs = INTERNAL_HDRS,
5410 copts = [
5411 "-UNDEBUG",
5412 "-DXNN_TEST_MODE=1",
5413 ],
5414 gcc_copts = xnnpack_gcc_std_copts(),
5415 gcc_x86_copts = ["-mfma"],
5416 msvc_copts = xnnpack_msvc_std_copts(),
5417 msvc_x86_32_copts = ["/arch:AVX"],
5418 msvc_x86_64_copts = ["/arch:AVX"],
5419 x86_srcs = FMA3_UKERNELS,
5420 deps = [
5421 ":tables",
5422 "@FP16",
5423 "@pthreadpool",
5424 ],
5425)
5426
5427xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005428 name = "avx2_ukernels",
5429 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005430 gcc_copts = xnnpack_gcc_std_copts(),
5431 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005432 "-mfma",
5433 "-mavx2",
5434 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005435 msvc_copts = xnnpack_msvc_std_copts(),
5436 msvc_x86_32_copts = ["/arch:AVX2"],
5437 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005438 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005439 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005440 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005441 "@FP16",
5442 "@pthreadpool",
5443 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005444)
5445
5446xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005447 name = "avx2_ukernels_test_mode",
5448 hdrs = INTERNAL_HDRS,
5449 copts = [
5450 "-UNDEBUG",
5451 "-DXNN_TEST_MODE=1",
5452 ],
5453 gcc_copts = xnnpack_gcc_std_copts(),
5454 gcc_x86_copts = [
5455 "-mfma",
5456 "-mavx2",
5457 ],
5458 msvc_copts = xnnpack_msvc_std_copts(),
5459 msvc_x86_32_copts = ["/arch:AVX2"],
5460 msvc_x86_64_copts = ["/arch:AVX2"],
5461 x86_srcs = AVX2_UKERNELS,
5462 deps = [
5463 ":tables",
5464 "@FP16",
5465 "@pthreadpool",
5466 ],
5467)
5468
5469xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005470 name = "avx512f_ukernels",
5471 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005472 gcc_copts = xnnpack_gcc_std_copts(),
5473 gcc_x86_copts = ["-mavx512f"],
5474 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5475 msvc_copts = xnnpack_msvc_std_copts(),
5476 msvc_x86_32_copts = ["/arch:AVX512"],
5477 msvc_x86_64_copts = ["/arch:AVX512"],
5478 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005479 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005480 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005481 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005482 "@FP16",
5483 "@pthreadpool",
5484 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005485)
5486
5487xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005488 name = "avx512f_ukernels_test_mode",
5489 hdrs = INTERNAL_HDRS,
5490 copts = [
5491 "-UNDEBUG",
5492 "-DXNN_TEST_MODE=1",
5493 ],
5494 gcc_copts = xnnpack_gcc_std_copts(),
5495 gcc_x86_copts = ["-mavx512f"],
5496 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5497 msvc_copts = xnnpack_msvc_std_copts(),
5498 msvc_x86_32_copts = ["/arch:AVX512"],
5499 msvc_x86_64_copts = ["/arch:AVX512"],
5500 msys_copts = ["-fno-asynchronous-unwind-tables"],
5501 x86_srcs = AVX512F_UKERNELS,
5502 deps = [
5503 ":tables",
5504 "@FP16",
5505 "@pthreadpool",
5506 ],
5507)
5508
5509xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005510 name = "avx512skx_ukernels",
5511 hdrs = INTERNAL_HDRS,
5512 gcc_copts = xnnpack_gcc_std_copts(),
5513 gcc_x86_copts = [
5514 "-mavx512f",
5515 "-mavx512cd",
5516 "-mavx512bw",
5517 "-mavx512dq",
5518 "-mavx512vl",
5519 ],
5520 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5521 msvc_copts = xnnpack_msvc_std_copts(),
5522 msvc_x86_32_copts = ["/arch:AVX512"],
5523 msvc_x86_64_copts = ["/arch:AVX512"],
5524 msys_copts = ["-fno-asynchronous-unwind-tables"],
5525 x86_srcs = AVX512SKX_UKERNELS,
5526 deps = [
5527 ":tables",
5528 "@FP16",
5529 "@pthreadpool",
5530 ],
5531)
5532
5533xnnpack_cc_library(
5534 name = "avx512skx_ukernels_test_mode",
5535 hdrs = INTERNAL_HDRS,
5536 copts = [
5537 "-UNDEBUG",
5538 "-DXNN_TEST_MODE=1",
5539 ],
5540 gcc_copts = xnnpack_gcc_std_copts(),
5541 gcc_x86_copts = [
5542 "-mavx512f",
5543 "-mavx512cd",
5544 "-mavx512bw",
5545 "-mavx512dq",
5546 "-mavx512vl",
5547 ],
5548 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5549 msvc_copts = xnnpack_msvc_std_copts(),
5550 msvc_x86_32_copts = ["/arch:AVX512"],
5551 msvc_x86_64_copts = ["/arch:AVX512"],
5552 msys_copts = ["-fno-asynchronous-unwind-tables"],
5553 x86_srcs = AVX512SKX_UKERNELS,
5554 deps = [
5555 ":tables",
5556 "@FP16",
5557 "@pthreadpool",
5558 ],
5559)
5560
5561xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005562 name = "asm_ukernels",
5563 hdrs = ["src/xnnpack/assembly.h"],
5564 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005565 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005566 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005567 wasm_srcs = WASM32_ASM_UKERNELS,
5568 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005569)
5570
Marat Dukhan3b59de22020-06-03 20:15:19 -07005571xnnpack_cc_library(
5572 name = "logging_utils",
5573 srcs = LOGGING_SRCS,
5574 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5575 copts = LOGGING_COPTS + [
5576 "-Isrc",
5577 "-Iinclude",
5578 ] + select({
5579 ":debug_build": [],
5580 "//conditions:default": xnnpack_min_size_copts(),
5581 }),
5582 gcc_copts = xnnpack_gcc_std_copts(),
5583 msvc_copts = xnnpack_msvc_std_copts(),
5584 visibility = xnnpack_visibility(),
5585 deps = [
5586 "@FP16",
5587 "@clog",
5588 "@pthreadpool",
5589 ],
5590)
5591
Marat Dukhan08c4a432019-10-03 09:29:21 -07005592xnnpack_aggregate_library(
5593 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005594 aarch32_ios_deps = [
5595 ":neon_ukernels",
5596 ":neonfma_ukernels",
5597 ":neonv8_ukernels",
5598 ":asm_ukernels",
5599 ],
5600 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005601 ":neon_ukernels",
5602 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005603 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005604 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005605 ":asm_ukernels",
5606 ],
5607 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005608 ":neon_ukernels",
5609 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005610 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005611 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005612 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005613 ":asm_ukernels",
5614 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005615 generic_deps = [
5616 ":scalar_ukernels",
5617 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005618 wasm_deps = [
5619 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005620 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005621 ],
5622 wasmsimd_deps = [
5623 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005624 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005625 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005626 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005627 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005628 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005629 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005630 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005631 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005632 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005633 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005634 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005635 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005636 ],
5637)
5638
Marat Dukhan33fcf782020-05-24 14:27:15 -07005639xnnpack_aggregate_library(
5640 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005641 aarch32_ios_deps = [
5642 ":neon_ukernels_test_mode",
5643 ":neonfma_ukernels_test_mode",
5644 ":neonv8_ukernels_test_mode",
5645 ":asm_ukernels",
5646 ],
5647 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005648 ":neon_ukernels_test_mode",
5649 ":neonfma_ukernels_test_mode",
5650 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005651 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005652 ":asm_ukernels",
5653 ],
5654 aarch64_deps = [
5655 ":neon_ukernels_test_mode",
5656 ":neonfma_ukernels_test_mode",
5657 ":neonv8_ukernels_test_mode",
5658 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005659 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005660 ":asm_ukernels",
5661 ],
5662 generic_deps = [
5663 ":scalar_ukernels_test_mode",
5664 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005665 wasm_deps = [
5666 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005667 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005668 ],
5669 wasmsimd_deps = [
5670 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005671 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005672 ],
5673 x86_deps = [
5674 ":sse2_ukernels_test_mode",
5675 ":ssse3_ukernels_test_mode",
5676 ":sse41_ukernels_test_mode",
5677 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005678 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005679 ":fma3_ukernels_test_mode",
5680 ":avx2_ukernels_test_mode",
5681 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005682 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005683 ],
5684)
5685
Marat Dukhan08c4a432019-10-03 09:29:21 -07005686xnnpack_cc_library(
5687 name = "im2col",
5688 srcs = ["src/im2col.c"],
5689 hdrs = [
5690 "src/xnnpack/common.h",
5691 "src/xnnpack/im2col.h",
5692 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005693 gcc_copts = xnnpack_gcc_std_copts(),
5694 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005695)
5696
5697xnnpack_cc_library(
5698 name = "indirection",
5699 srcs = ["src/indirection.c"],
5700 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005701 gcc_copts = xnnpack_gcc_std_copts(),
5702 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005703 deps = [
5704 "@FP16",
5705 "@FXdiv",
5706 "@pthreadpool",
5707 ],
5708)
5709
5710xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005711 name = "indirection_test_mode",
5712 srcs = ["src/indirection.c"],
5713 hdrs = INTERNAL_HDRS,
5714 copts = [
5715 "-UNDEBUG",
5716 "-DXNN_TEST_MODE=1",
5717 ],
5718 gcc_copts = xnnpack_gcc_std_copts(),
5719 msvc_copts = xnnpack_msvc_std_copts(),
5720 deps = [
5721 "@FP16",
5722 "@FXdiv",
5723 "@pthreadpool",
5724 ],
5725)
5726
5727xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005728 name = "packing",
5729 srcs = ["src/packing.c"],
5730 hdrs = INTERNAL_HDRS,
5731 gcc_copts = xnnpack_gcc_std_copts(),
5732 msvc_copts = xnnpack_msvc_std_copts(),
5733 deps = [
5734 "@FP16",
5735 "@FXdiv",
5736 "@pthreadpool",
5737 ],
5738)
5739
5740xnnpack_cc_library(
5741 name = "packing_test_mode",
5742 srcs = ["src/packing.c"],
5743 hdrs = INTERNAL_HDRS,
5744 copts = [
5745 "-UNDEBUG",
5746 "-DXNN_TEST_MODE=1",
5747 ],
5748 gcc_copts = xnnpack_gcc_std_copts(),
5749 msvc_copts = xnnpack_msvc_std_copts(),
5750 deps = [
5751 "@FP16",
5752 "@FXdiv",
5753 "@pthreadpool",
5754 ],
5755)
5756
5757xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005758 name = "operator_run",
5759 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005760 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005761 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005762 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5763 "//conditions:default": [],
5764 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005765 gcc_copts = xnnpack_gcc_std_copts(),
5766 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005767 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005768 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005769 "@FP16",
5770 "@FXdiv",
5771 "@clog",
5772 "@pthreadpool",
5773 ],
5774)
5775
Chao Mei6ddfc602020-05-13 22:29:36 -07005776xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005777 name = "operator_run_test_mode",
5778 srcs = ["src/operator-run.c"],
5779 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5780 copts = LOGGING_COPTS + [
5781 "-UNDEBUG",
5782 "-DXNN_TEST_MODE=1",
5783 ] + select({
5784 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5785 "//conditions:default": [],
5786 }),
5787 gcc_copts = xnnpack_gcc_std_copts(),
5788 msvc_copts = xnnpack_msvc_std_copts(),
5789 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005790 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005791 "@FP16",
5792 "@FXdiv",
5793 "@clog",
5794 "@pthreadpool",
5795 ],
5796)
5797
5798xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005799 name = "memory_planner",
5800 srcs = ["src/memory-planner.c"],
5801 hdrs = INTERNAL_HDRS,
5802 defines = select({
5803 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5804 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5805 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5806 }),
5807 gcc_copts = xnnpack_gcc_std_copts(),
5808 msvc_copts = xnnpack_msvc_std_copts(),
5809 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005810 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005811 "@pthreadpool",
5812 ],
5813)
5814
Marat Dukhan33fcf782020-05-24 14:27:15 -07005815xnnpack_cc_library(
5816 name = "memory_planner_test_mode",
5817 srcs = ["src/memory-planner.c"],
5818 hdrs = INTERNAL_HDRS,
5819 copts = [
5820 "-UNDEBUG",
5821 "-DXNN_TEST_MODE=1",
5822 ],
5823 defines = select({
5824 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5825 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5826 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5827 }),
5828 gcc_copts = xnnpack_gcc_std_copts(),
5829 msvc_copts = xnnpack_msvc_std_copts(),
5830 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005831 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005832 "@pthreadpool",
5833 ],
5834)
5835
Marat Dukhan08c4a432019-10-03 09:29:21 -07005836cc_library(
5837 name = "enable_assembly",
5838 defines = select({
5839 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5840 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005841 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005842 }),
5843)
5844
Marat Dukhan9de90e02020-06-18 16:04:12 -07005845cc_library(
5846 name = "enable_sparse",
5847 defines = select({
5848 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5849 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005850 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005851 }),
5852)
5853
Marat Dukhancf056b22019-10-07 10:26:29 -07005854xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005855 name = "operators",
5856 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005857 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005858 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005859 ],
5860 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005861 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005862 "-Isrc",
5863 "-Iinclude",
5864 ] + select({
5865 ":debug_build": [],
5866 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005867 }) + select({
5868 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5869 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005870 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005871 gcc_copts = xnnpack_gcc_std_copts(),
5872 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005873 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005874 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005875 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005876 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005877 "@FP16",
5878 "@FXdiv",
5879 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005880 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005881 ],
5882)
5883
Marat Dukhan10a38082020-04-17 03:58:35 -07005884xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005885 name = "operators_test_mode",
5886 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005887 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005888 "src/operator-delete.c",
5889 ],
5890 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5891 copts = LOGGING_COPTS + [
5892 "-Isrc",
5893 "-Iinclude",
5894 "-UNDEBUG",
5895 "-DXNN_TEST_MODE=1",
5896 ] + select({
5897 ":debug_build": [],
5898 "//conditions:default": xnnpack_min_size_copts(),
5899 }) + select({
5900 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5901 "//conditions:default": [],
5902 }),
5903 gcc_copts = xnnpack_gcc_std_copts(),
5904 msvc_copts = xnnpack_msvc_std_copts(),
5905 deps = [
5906 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005907 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005908 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005909 "@FP16",
5910 "@FXdiv",
5911 "@clog",
5912 "@pthreadpool",
5913 ],
5914)
5915
5916xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005917 name = "XNNPACK",
5918 srcs = [
5919 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005920 "src/runtime.c",
5921 "src/subgraph.c",
5922 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005923 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005924 hdrs = ["include/xnnpack.h"],
5925 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005926 "-Isrc",
5927 "-Iinclude",
5928 ] + select({
5929 ":debug_build": [],
5930 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005931 }) + select({
5932 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5933 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005934 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005935 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005936 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005937 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005938 visibility = xnnpack_visibility(),
5939 deps = [
5940 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005941 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005942 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005943 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005944 ":operator_run",
5945 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005946 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005947 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005948 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005949 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005950 ] + select({
5951 ":emscripten": [],
5952 "//conditions:default": ["@cpuinfo"],
5953 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005954)
5955
Marat Dukhan10a38082020-04-17 03:58:35 -07005956xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005957 name = "XNNPACK_test_mode",
5958 srcs = [
5959 "src/init.c",
5960 "src/runtime.c",
5961 "src/subgraph.c",
5962 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005963 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005964 hdrs = ["include/xnnpack.h"],
5965 copts = LOGGING_COPTS + [
5966 "-Isrc",
5967 "-Iinclude",
5968 "-UNDEBUG",
5969 "-DXNN_TEST_MODE=1",
5970 ] + select({
5971 ":debug_build": [],
5972 "//conditions:default": xnnpack_min_size_copts(),
5973 }) + select({
5974 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5975 "//conditions:default": [],
5976 }),
5977 gcc_copts = xnnpack_gcc_std_copts(),
5978 includes = ["include"],
5979 msvc_copts = xnnpack_msvc_std_copts(),
5980 visibility = xnnpack_visibility(),
5981 deps = [
5982 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005983 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005984 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005985 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005986 ":operator_run_test_mode",
5987 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005988 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005989 "@clog",
5990 "@FP16",
5991 "@pthreadpool",
5992 ] + select({
5993 ":emscripten": [],
5994 "//conditions:default": ["@cpuinfo"],
5995 }),
5996)
5997
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005998# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5999# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07006000xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006001 name = "xnnpack_for_tflite",
6002 srcs = [
6003 "src/init.c",
6004 "src/runtime.c",
6005 "src/subgraph.c",
6006 "src/tensor.c",
6007 ] + SUBGRAPH_SRCS,
6008 hdrs = ["include/xnnpack.h"],
6009 copts = LOGGING_COPTS + [
6010 "-Isrc",
6011 "-Iinclude",
6012 ] + select({
6013 ":debug_build": [],
6014 "//conditions:default": xnnpack_min_size_copts(),
6015 }) + select({
6016 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
6017 "//conditions:default": [],
6018 }),
6019 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006020 "XNN_NO_U8_OPERATORS",
6021 "XNN_NO_X8_OPERATORS",
6022 "XNN_NO_F16_OPERATORS",
6023 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07006024 ] + select({
6025 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07006026 ":xnn_enable_qs8_explicit_false": [
6027 "XNN_NO_QC8_OPERATORS",
6028 "XNN_NO_QS8_OPERATORS",
6029 ],
6030 "//conditions:default": [
6031 "XNN_NO_QC8_OPERATORS",
6032 "XNN_NO_QS8_OPERATORS",
6033 ],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07006034 }) + select({
6035 ":xnn_enable_qu8_explicit_true": [],
6036 ":xnn_enable_qu8_explicit_false": [
6037 "XNN_NO_QU8_OPERATORS",
6038 ],
6039 "//conditions:default": [
6040 "XNN_NO_QU8_OPERATORS",
6041 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07006042 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006043 gcc_copts = xnnpack_gcc_std_copts(),
6044 includes = ["include"],
6045 msvc_copts = xnnpack_msvc_std_copts(),
6046 visibility = xnnpack_visibility(),
6047 deps = [
6048 ":enable_assembly",
6049 ":enable_sparse",
6050 ":logging_utils",
6051 ":memory_planner",
6052 ":operator_run",
6053 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07006054 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006055 "@clog",
6056 "@FP16",
6057 "@pthreadpool",
6058 ] + select({
6059 ":emscripten": [],
6060 "//conditions:default": ["@cpuinfo"],
6061 }),
6062)
6063
6064# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
6065# not used by the TensorFlow.js WebAssembly backend to minimize code size.
6066xnnpack_cc_library(
6067 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006068 srcs = [
6069 "src/init.c",
6070 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07006071 hdrs = ["include/xnnpack.h"],
6072 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006073 "-Isrc",
6074 "-Iinclude",
6075 ] + select({
6076 ":debug_build": [],
6077 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07006078 }) + select({
6079 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
6080 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006081 }),
6082 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07006083 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07006084 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006085 "XNN_NO_U8_OPERATORS",
6086 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08006087 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006088 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07006089 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006090 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07006091 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006092 visibility = xnnpack_visibility(),
6093 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006094 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07006095 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006096 ":operator_run",
6097 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07006098 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006099 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006100 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006101 ] + select({
6102 ":emscripten": [],
6103 "//conditions:default": ["@cpuinfo"],
6104 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006105)
6106
Marat Dukhancf056b22019-10-07 10:26:29 -07006107xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006108 name = "bench_utils",
6109 srcs = ["bench/utils.cc"],
6110 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08006111 deps = [
6112 "@com_google_benchmark//:benchmark",
6113 "@cpuinfo",
6114 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006115)
6116
Frank Barchard7e955972019-10-11 10:34:25 -07006117######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07006118
6119xnnpack_benchmark(
Marat Dukhan0744fa02021-07-26 22:56:27 -07006120 name = "qs8_dwconv_bench",
6121 srcs = [
6122 "bench/dwconv.h",
6123 "bench/qs8-dwconv.cc",
6124 "src/xnnpack/AlignedAllocator.h",
6125 ] + MICROKERNEL_BENCHMARK_HDRS,
6126 deps = MICROKERNEL_BENCHMARK_DEPS + [
6127 ":indirection",
6128 ":packing",
6129 ],
6130)
6131
6132xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07006133 name = "qs8_gemm_bench",
6134 srcs = [
6135 "bench/gemm.h",
6136 "bench/qs8-gemm.cc",
6137 "src/xnnpack/AlignedAllocator.h",
6138 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07006139 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
6140 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07006141)
6142
6143xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006144 name = "qs8_requantization_bench",
6145 srcs = [
6146 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006147 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006148 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006149 ] + MICROKERNEL_BENCHMARK_HDRS,
6150 deps = MICROKERNEL_BENCHMARK_DEPS,
6151)
6152
6153xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07006154 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006155 srcs = [
6156 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07006157 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006158 "src/xnnpack/AlignedAllocator.h",
6159 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006160 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006161 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006162)
6163
6164xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006165 name = "qu8_requantization_bench",
6166 srcs = [
6167 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006168 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006169 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006170 ] + MICROKERNEL_BENCHMARK_HDRS,
6171 deps = MICROKERNEL_BENCHMARK_DEPS,
6172)
6173
6174xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07006175 name = "f16_igemm_bench",
6176 srcs = [
6177 "bench/f16-igemm.cc",
6178 "bench/conv.h",
6179 "bench/google/conv.h",
6180 "src/xnnpack/AlignedAllocator.h",
6181 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006182 deps = MICROKERNEL_BENCHMARK_DEPS + [
6183 ":indirection",
6184 ":packing",
6185 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07006186)
6187
6188xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006189 name = "f16_gemm_bench",
6190 srcs = [
6191 "bench/f16-gemm.cc",
6192 "bench/gemm.h",
6193 "src/xnnpack/AlignedAllocator.h",
6194 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006195 deps = MICROKERNEL_BENCHMARK_DEPS + [
6196 ":packing",
6197 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006198)
6199
6200xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006201 name = "f16_spmm_bench",
6202 srcs = [
6203 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006204 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006205 "src/xnnpack/AlignedAllocator.h",
6206 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006207 deps = MICROKERNEL_BENCHMARK_DEPS,
6208)
6209
6210xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006211 name = "f16_vrelu_bench",
6212 srcs = [
6213 "bench/f16-vrelu.cc",
6214 "src/xnnpack/AlignedAllocator.h",
6215 ] + MICROKERNEL_BENCHMARK_HDRS,
6216 deps = MICROKERNEL_BENCHMARK_DEPS,
6217)
6218
6219xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006220 name = "f32_igemm_bench",
6221 srcs = [
6222 "bench/f32-igemm.cc",
6223 "bench/conv.h",
6224 "src/xnnpack/AlignedAllocator.h",
6225 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006226 deps = MICROKERNEL_BENCHMARK_DEPS + [
6227 ":indirection",
6228 ":packing",
6229 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006230)
6231
6232xnnpack_benchmark(
6233 name = "f32_conv_hwc_bench",
6234 srcs = [
6235 "bench/f32-conv-hwc.cc",
6236 "bench/dconv.h",
6237 "src/xnnpack/AlignedAllocator.h",
6238 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006239 deps = MICROKERNEL_BENCHMARK_DEPS + [
6240 ":packing",
6241 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006242)
6243
6244xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006245 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07006246 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006247 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07006248 "bench/dconv.h",
6249 "src/xnnpack/AlignedAllocator.h",
6250 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006251 deps = MICROKERNEL_BENCHMARK_DEPS + [
6252 ":packing",
6253 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07006254)
6255
6256xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07006257 name = "f16_dwconv_bench",
6258 srcs = [
6259 "bench/f16-dwconv.cc",
6260 "bench/dwconv.h",
6261 "bench/google/dwconv.h",
6262 "src/xnnpack/AlignedAllocator.h",
6263 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006264 deps = MICROKERNEL_BENCHMARK_DEPS + [
6265 ":indirection",
6266 ":packing",
6267 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07006268)
6269
6270xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006271 name = "f32_dwconv_bench",
6272 srcs = [
6273 "bench/f32-dwconv.cc",
6274 "bench/dwconv.h",
6275 "src/xnnpack/AlignedAllocator.h",
6276 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006277 deps = MICROKERNEL_BENCHMARK_DEPS + [
6278 ":indirection",
6279 ":packing",
6280 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006281)
6282
6283xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006284 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006285 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006286 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006287 "bench/dwconv.h",
6288 "src/xnnpack/AlignedAllocator.h",
6289 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006290 deps = MICROKERNEL_BENCHMARK_DEPS + [
6291 ":indirection",
6292 ":packing",
6293 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006294)
6295
6296xnnpack_benchmark(
6297 name = "f32_gemm_bench",
6298 srcs = [
6299 "bench/f32-gemm.cc",
6300 "bench/gemm.h",
6301 "src/xnnpack/AlignedAllocator.h",
6302 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006303 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006304 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006305)
6306
6307xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006308 name = "f32_raddexpminusmax_bench",
6309 srcs = [
6310 "bench/f32-raddexpminusmax.cc",
6311 "src/xnnpack/AlignedAllocator.h",
6312 ] + MICROKERNEL_BENCHMARK_HDRS,
6313 deps = MICROKERNEL_BENCHMARK_DEPS,
6314)
6315
6316xnnpack_benchmark(
6317 name = "f32_raddextexp_bench",
6318 srcs = [
6319 "bench/f32-raddextexp.cc",
6320 "src/xnnpack/AlignedAllocator.h",
6321 ] + MICROKERNEL_BENCHMARK_HDRS,
6322 deps = MICROKERNEL_BENCHMARK_DEPS,
6323)
6324
6325xnnpack_benchmark(
6326 name = "f32_raddstoreexpminusmax_bench",
6327 srcs = [
6328 "bench/f32-raddstoreexpminusmax.cc",
6329 "src/xnnpack/AlignedAllocator.h",
6330 ] + MICROKERNEL_BENCHMARK_HDRS,
6331 deps = MICROKERNEL_BENCHMARK_DEPS,
6332)
6333
6334xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006335 name = "f32_rmax_bench",
6336 srcs = [
6337 "bench/f32-rmax.cc",
6338 "src/xnnpack/AlignedAllocator.h",
6339 ] + MICROKERNEL_BENCHMARK_HDRS,
6340 deps = MICROKERNEL_BENCHMARK_DEPS,
6341)
6342
6343xnnpack_benchmark(
6344 name = "f32_spmm_bench",
6345 srcs = [
6346 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006347 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006348 "src/xnnpack/AlignedAllocator.h",
6349 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006350 deps = MICROKERNEL_BENCHMARK_DEPS,
6351)
6352
6353xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006354 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006355 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006356 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006357 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006358 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006359 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006360)
6361
6362xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006363 name = "f32_velu_bench",
6364 srcs = [
6365 "bench/f32-velu.cc",
6366 "src/xnnpack/AlignedAllocator.h",
6367 ] + MICROKERNEL_BENCHMARK_HDRS,
6368 deps = MICROKERNEL_BENCHMARK_DEPS,
6369)
6370
6371xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006372 name = "f32_vhswish_bench",
6373 srcs = [
6374 "bench/f32-vhswish.cc",
6375 "src/xnnpack/AlignedAllocator.h",
6376 ] + MICROKERNEL_BENCHMARK_HDRS,
6377 deps = MICROKERNEL_BENCHMARK_DEPS,
6378)
6379
6380xnnpack_benchmark(
6381 name = "f32_vrelu_bench",
6382 srcs = [
6383 "bench/f32-vrelu.cc",
6384 "src/xnnpack/AlignedAllocator.h",
6385 ] + MICROKERNEL_BENCHMARK_HDRS,
6386 deps = MICROKERNEL_BENCHMARK_DEPS,
6387)
6388
6389xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006390 name = "f32_vscaleexpminusmax_bench",
6391 srcs = [
6392 "bench/f32-vscaleexpminusmax.cc",
6393 "src/xnnpack/AlignedAllocator.h",
6394 ] + MICROKERNEL_BENCHMARK_HDRS,
6395 deps = MICROKERNEL_BENCHMARK_DEPS,
6396)
6397
6398xnnpack_benchmark(
6399 name = "f32_vscaleextexp_bench",
6400 srcs = [
6401 "bench/f32-vscaleextexp.cc",
6402 "src/xnnpack/AlignedAllocator.h",
6403 ] + MICROKERNEL_BENCHMARK_HDRS,
6404 deps = MICROKERNEL_BENCHMARK_DEPS,
6405)
6406
6407xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006408 name = "f32_vsigmoid_bench",
6409 srcs = [
6410 "bench/f32-vsigmoid.cc",
6411 "src/xnnpack/AlignedAllocator.h",
6412 ] + MICROKERNEL_BENCHMARK_HDRS,
6413 deps = MICROKERNEL_BENCHMARK_DEPS,
6414)
6415
6416xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006417 name = "f32_vsqrt_bench",
6418 srcs = [
6419 "bench/f32-vsqrt.cc",
6420 "src/xnnpack/AlignedAllocator.h",
6421 ] + MICROKERNEL_BENCHMARK_HDRS,
6422 deps = MICROKERNEL_BENCHMARK_DEPS,
6423)
6424
6425xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006426 name = "f32_im2col_gemm_bench",
6427 srcs = [
6428 "bench/f32-im2col-gemm.cc",
6429 "bench/conv.h",
6430 "src/xnnpack/AlignedAllocator.h",
6431 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006432 deps = MICROKERNEL_BENCHMARK_DEPS + [
6433 ":im2col",
6434 ":packing",
6435 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006436)
6437
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006438xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006439 name = "rounding_bench",
6440 srcs = [
6441 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006442 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006443 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006444 ] + MICROKERNEL_BENCHMARK_HDRS,
6445 deps = MICROKERNEL_BENCHMARK_DEPS,
6446)
6447
Marat Dukhan08c4a432019-10-03 09:29:21 -07006448########################### Benchmarks for operators ###########################
6449
6450xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006451 name = "average_pooling_bench",
6452 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006453 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006454 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006455 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006456)
6457
6458xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006459 name = "bankers_rounding_bench",
6460 srcs = ["bench/bankers-rounding.cc"],
6461 copts = xnnpack_optional_tflite_copts(),
6462 tags = ["nowin32"],
6463 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6464)
6465
6466xnnpack_benchmark(
6467 name = "ceiling_bench",
6468 srcs = ["bench/ceiling.cc"],
6469 copts = xnnpack_optional_tflite_copts(),
6470 tags = ["nowin32"],
6471 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6472)
6473
6474xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006475 name = "channel_shuffle_bench",
6476 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006477 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006478)
6479
6480xnnpack_benchmark(
6481 name = "convolution_bench",
6482 srcs = ["bench/convolution.cc"],
6483 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006484 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006485 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006486)
6487
6488xnnpack_benchmark(
6489 name = "deconvolution_bench",
6490 srcs = ["bench/deconvolution.cc"],
6491 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006492 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006493 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006494)
6495
6496xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006497 name = "elu_bench",
6498 srcs = ["bench/elu.cc"],
6499 copts = xnnpack_optional_tflite_copts(),
6500 tags = ["nowin32"],
6501 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6502)
6503
6504xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006505 name = "floor_bench",
6506 srcs = ["bench/floor.cc"],
6507 copts = xnnpack_optional_tflite_copts(),
6508 tags = ["nowin32"],
6509 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6510)
6511
6512xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006513 name = "global_average_pooling_bench",
6514 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006515 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006516)
6517
6518xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006519 name = "hardswish_bench",
6520 srcs = ["bench/hardswish.cc"],
6521 copts = xnnpack_optional_tflite_copts(),
6522 tags = ["nowin32"],
6523 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6524)
6525
6526xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006527 name = "max_pooling_bench",
6528 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006529 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006530)
6531
6532xnnpack_benchmark(
6533 name = "sigmoid_bench",
6534 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006535 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006536 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006537 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006538)
6539
6540xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006541 name = "prelu_bench",
6542 srcs = ["bench/prelu.cc"],
6543 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006544 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006545 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006546)
6547
6548xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006549 name = "softmax_bench",
6550 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006551 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006552 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006553 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006554)
6555
Marat Dukhan87727142020-06-24 15:24:10 -07006556xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006557 name = "square_root_bench",
6558 srcs = ["bench/square-root.cc"],
6559 copts = xnnpack_optional_tflite_copts(),
6560 tags = ["nowin32"],
6561 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6562)
6563
6564xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006565 name = "truncation_bench",
6566 srcs = ["bench/truncation.cc"],
6567 deps = OPERATOR_BENCHMARK_DEPS,
6568)
6569
Marat Dukhanc068bb62019-10-04 13:24:39 -07006570############################# End-to-end benchmarks ############################
6571
6572cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006573 name = "fp32_mobilenet_v1",
6574 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006575 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006576 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006577 linkstatic = True,
6578 deps = [
6579 ":XNNPACK",
6580 "@pthreadpool",
6581 ],
6582)
6583
6584cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006585 name = "fp32_sparse_mobilenet_v1",
6586 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6587 hdrs = ["models/models.h"],
6588 copts = xnnpack_std_cxxopts(),
6589 linkstatic = True,
6590 deps = [
6591 ":XNNPACK",
6592 "@pthreadpool",
6593 ],
6594)
6595
6596cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006597 name = "fp16_mobilenet_v1",
6598 srcs = ["models/fp16-mobilenet-v1.cc"],
6599 hdrs = ["models/models.h"],
6600 copts = xnnpack_std_cxxopts(),
6601 linkstatic = True,
6602 deps = [
6603 ":XNNPACK",
6604 "@FP16",
6605 "@pthreadpool",
6606 ],
6607)
6608
6609cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006610 name = "qs8_mobilenet_v1",
6611 srcs = ["models/qs8-mobilenet-v1.cc"],
6612 hdrs = ["models/models.h"],
6613 copts = xnnpack_std_cxxopts(),
6614 linkstatic = True,
6615 deps = [
6616 ":XNNPACK",
6617 "@pthreadpool",
6618 ],
6619)
6620
6621cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006622 name = "qs8_mobilenet_v2",
6623 srcs = ["models/qs8-mobilenet-v2.cc"],
6624 hdrs = ["models/models.h"],
6625 copts = xnnpack_std_cxxopts(),
6626 linkstatic = True,
6627 deps = [
6628 ":XNNPACK",
6629 "@pthreadpool",
6630 ],
6631)
6632
6633cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006634 name = "qu8_mobilenet_v1",
6635 srcs = ["models/qu8-mobilenet-v1.cc"],
6636 hdrs = ["models/models.h"],
6637 copts = xnnpack_std_cxxopts(),
6638 linkstatic = True,
6639 deps = [
6640 ":XNNPACK",
6641 "@pthreadpool",
6642 ],
6643)
6644
6645cc_library(
Marat Dukhan036b2b12021-07-21 01:12:58 -07006646 name = "qu8_mobilenet_v2",
6647 srcs = ["models/qu8-mobilenet-v2.cc"],
6648 hdrs = ["models/models.h"],
6649 copts = xnnpack_std_cxxopts(),
6650 linkstatic = True,
6651 deps = [
6652 ":XNNPACK",
6653 "@pthreadpool",
6654 ],
6655)
6656
6657cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006658 name = "fp32_mobilenet_v2",
6659 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006660 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006661 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006662 linkstatic = True,
6663 deps = [
6664 ":XNNPACK",
6665 "@pthreadpool",
6666 ],
6667)
6668
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006669cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006670 name = "fp32_sparse_mobilenet_v2",
6671 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6672 hdrs = ["models/models.h"],
6673 copts = xnnpack_std_cxxopts(),
6674 linkstatic = True,
6675 deps = [
6676 ":XNNPACK",
6677 "@pthreadpool",
6678 ],
6679)
6680
6681cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006682 name = "fp16_mobilenet_v2",
6683 srcs = ["models/fp16-mobilenet-v2.cc"],
6684 hdrs = ["models/models.h"],
6685 copts = xnnpack_std_cxxopts(),
6686 linkstatic = True,
6687 deps = [
6688 ":XNNPACK",
6689 "@FP16",
6690 "@pthreadpool",
6691 ],
6692)
6693
6694cc_library(
6695 name = "fp32_mobilenet_v3_large",
6696 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006697 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006698 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006699 linkstatic = True,
6700 deps = [
6701 ":XNNPACK",
6702 "@pthreadpool",
6703 ],
6704)
6705
6706cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006707 name = "fp32_sparse_mobilenet_v3_large",
6708 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6709 hdrs = ["models/models.h"],
6710 copts = xnnpack_std_cxxopts(),
6711 linkstatic = True,
6712 deps = [
6713 ":XNNPACK",
6714 "@pthreadpool",
6715 ],
6716)
6717
6718cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006719 name = "fp16_mobilenet_v3_large",
6720 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6721 hdrs = ["models/models.h"],
6722 copts = xnnpack_std_cxxopts(),
6723 linkstatic = True,
6724 deps = [
6725 ":XNNPACK",
6726 "@FP16",
6727 "@pthreadpool",
6728 ],
6729)
6730
6731cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006732 name = "fp32_mobilenet_v3_small",
6733 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006734 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006735 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006736 linkstatic = True,
6737 deps = [
6738 ":XNNPACK",
6739 "@pthreadpool",
6740 ],
6741)
6742
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006743cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006744 name = "fp32_sparse_mobilenet_v3_small",
6745 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6746 hdrs = ["models/models.h"],
6747 copts = xnnpack_std_cxxopts(),
6748 linkstatic = True,
6749 deps = [
6750 ":XNNPACK",
6751 "@pthreadpool",
6752 ],
6753)
6754
6755cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006756 name = "fp16_mobilenet_v3_small",
6757 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6758 hdrs = ["models/models.h"],
6759 copts = xnnpack_std_cxxopts(),
6760 linkstatic = True,
6761 deps = [
6762 ":XNNPACK",
6763 "@FP16",
6764 "@pthreadpool",
6765 ],
6766)
6767
Marat Dukhanc068bb62019-10-04 13:24:39 -07006768xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006769 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006770 srcs = [
6771 "bench/f32-dwconv-e2e.cc",
6772 "bench/end2end.h",
6773 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006774 deps = MICROKERNEL_BENCHMARK_DEPS + [
6775 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006776 ":fp32_mobilenet_v1",
6777 ":fp32_mobilenet_v2",
6778 ":fp32_mobilenet_v3_large",
6779 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006780 ],
6781)
6782
6783xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006784 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006785 srcs = [
6786 "bench/f32-gemm-e2e.cc",
6787 "bench/end2end.h",
6788 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006789 deps = MICROKERNEL_BENCHMARK_DEPS + [
6790 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006791 ":fp32_mobilenet_v1",
6792 ":fp32_mobilenet_v2",
6793 ":fp32_mobilenet_v3_large",
6794 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006795 ],
6796)
6797
6798xnnpack_benchmark(
Marat Dukhanbbfc6d32021-07-26 18:31:02 -07006799 name = "qs8_dwconv_e2e_bench",
6800 srcs = [
6801 "bench/qs8-dwconv-e2e.cc",
6802 "bench/end2end.h",
6803 ] + MICROKERNEL_BENCHMARK_HDRS,
6804 deps = MICROKERNEL_BENCHMARK_DEPS + [
6805 ":XNNPACK",
6806 ":qs8_mobilenet_v1",
6807 ":qs8_mobilenet_v2",
6808 ],
6809)
6810
6811xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006812 name = "qs8_gemm_e2e_bench",
6813 srcs = [
6814 "bench/qs8-gemm-e2e.cc",
6815 "bench/end2end.h",
6816 ] + MICROKERNEL_BENCHMARK_HDRS,
6817 deps = MICROKERNEL_BENCHMARK_DEPS + [
6818 ":XNNPACK",
6819 ":qs8_mobilenet_v1",
6820 ":qs8_mobilenet_v2",
6821 ],
6822)
6823
6824xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006825 name = "end2end_bench",
6826 srcs = ["bench/end2end.cc"],
6827 deps = [
6828 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006829 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006830 ":fp16_mobilenet_v1",
6831 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006832 ":fp16_mobilenet_v3_large",
6833 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006834 ":fp32_mobilenet_v1",
6835 ":fp32_mobilenet_v2",
6836 ":fp32_mobilenet_v3_large",
6837 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006838 ":fp32_sparse_mobilenet_v1",
6839 ":fp32_sparse_mobilenet_v2",
6840 ":fp32_sparse_mobilenet_v3_large",
6841 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006842 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006843 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006844 ":qu8_mobilenet_v1",
Marat Dukhan036b2b12021-07-21 01:12:58 -07006845 ":qu8_mobilenet_v2",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006846 "@pthreadpool",
6847 ],
6848)
6849
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006850#################### Accuracy evaluation for math functions ####################
6851
6852xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006853 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006854 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006855 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006856 "src/xnnpack/AlignedAllocator.h",
6857 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006858 deps = ACCURACY_EVAL_DEPS + [
6859 ":bench_utils",
6860 "@cpuinfo",
6861 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006862)
6863
Marat Dukhan515c9772019-10-17 18:07:57 -07006864xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006865 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006866 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006867 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006868 "src/xnnpack/AlignedAllocator.h",
6869 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006870 deps = ACCURACY_EVAL_DEPS + [
6871 ":bench_utils",
6872 "@cpuinfo",
6873 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006874)
6875
Marat Dukhan98ba4412019-10-23 02:14:28 -07006876xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006877 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006878 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006879 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006880 "src/xnnpack/AlignedAllocator.h",
6881 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006882 deps = ACCURACY_EVAL_DEPS + [
6883 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006884 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006885 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006886)
6887
6888xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006889 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006890 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006891 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006892 "src/xnnpack/AlignedAllocator.h",
6893 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006894 deps = ACCURACY_EVAL_DEPS + [
6895 ":bench_utils",
6896 "@cpuinfo",
6897 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006898)
6899
Marat Dukhanf44f0222020-12-14 11:53:27 -08006900xnnpack_benchmark(
6901 name = "f32_sigmoid_ulp_eval",
6902 srcs = [
6903 "eval/f32-sigmoid-ulp.cc",
6904 "src/xnnpack/AlignedAllocator.h",
6905 ] + ACCURACY_EVAL_HDRS,
6906 deps = ACCURACY_EVAL_DEPS + [
6907 ":bench_utils",
6908 "@cpuinfo",
6909 ],
6910)
6911
6912xnnpack_benchmark(
6913 name = "f32_sqrt_ulp_eval",
6914 srcs = [
6915 "eval/f32-sqrt-ulp.cc",
6916 "src/xnnpack/AlignedAllocator.h",
6917 ] + ACCURACY_EVAL_HDRS,
6918 deps = ACCURACY_EVAL_DEPS + [
6919 ":bench_utils",
6920 "@cpuinfo",
6921 ],
6922)
6923
6924################### Accuracy verification for math functions ##################
6925
6926xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006927 name = "f32_exp_eval",
6928 srcs = [
6929 "eval/f32-exp.cc",
6930 "src/xnnpack/AlignedAllocator.h",
6931 "src/xnnpack/math-stubs.h",
6932 ] + MICROKERNEL_TEST_HDRS,
6933 automatic = False,
6934 deps = MICROKERNEL_TEST_DEPS,
6935)
6936
6937xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006938 name = "f32_expm1minus_eval",
6939 srcs = [
6940 "eval/f32-expm1minus.cc",
6941 "src/xnnpack/AlignedAllocator.h",
6942 "src/xnnpack/math-stubs.h",
6943 ] + MICROKERNEL_TEST_HDRS,
6944 automatic = False,
6945 deps = MICROKERNEL_TEST_DEPS,
6946)
6947
Marat Dukhan8853b822020-05-07 12:19:01 -07006948xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006949 name = "f32_expminus_eval",
6950 srcs = [
6951 "eval/f32-expminus.cc",
6952 "src/xnnpack/AlignedAllocator.h",
6953 "src/xnnpack/math-stubs.h",
6954 ] + MICROKERNEL_TEST_HDRS,
6955 automatic = False,
6956 deps = MICROKERNEL_TEST_DEPS,
6957)
6958
6959xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006960 name = "f32_roundne_eval",
6961 srcs = [
6962 "eval/f32-roundne.cc",
6963 "src/xnnpack/AlignedAllocator.h",
6964 "src/xnnpack/math-stubs.h",
6965 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006966 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006967 deps = MICROKERNEL_TEST_DEPS,
6968)
6969
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006970xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006971 name = "f32_roundd_eval",
6972 srcs = [
6973 "eval/f32-roundd.cc",
6974 "src/xnnpack/AlignedAllocator.h",
6975 "src/xnnpack/math-stubs.h",
6976 ] + MICROKERNEL_TEST_HDRS,
6977 automatic = False,
6978 deps = MICROKERNEL_TEST_DEPS,
6979)
6980
6981xnnpack_unit_test(
6982 name = "f32_roundu_eval",
6983 srcs = [
6984 "eval/f32-roundu.cc",
6985 "src/xnnpack/AlignedAllocator.h",
6986 "src/xnnpack/math-stubs.h",
6987 ] + MICROKERNEL_TEST_HDRS,
6988 automatic = False,
6989 deps = MICROKERNEL_TEST_DEPS,
6990)
6991
6992xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006993 name = "f32_roundz_eval",
6994 srcs = [
6995 "eval/f32-roundz.cc",
6996 "src/xnnpack/AlignedAllocator.h",
6997 "src/xnnpack/math-stubs.h",
6998 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006999 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07007000 deps = MICROKERNEL_TEST_DEPS,
7001)
7002
Marat Dukhan08c4a432019-10-03 09:29:21 -07007003######################### Unit tests for micro-kernels #########################
7004
7005xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007006 name = "f16_dwconv_minmax_test",
7007 srcs = [
7008 "test/f16-dwconv-minmax.cc",
7009 "test/dwconv-microkernel-tester.h",
7010 "src/xnnpack/AlignedAllocator.h",
7011 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7012 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7013)
7014
7015xnnpack_unit_test(
7016 name = "f16_gavgpool_minmax_test",
7017 srcs = [
7018 "test/f16-gavgpool-minmax.cc",
7019 "test/gavgpool-microkernel-tester.h",
7020 "src/xnnpack/AlignedAllocator.h",
7021 ] + MICROKERNEL_TEST_HDRS,
7022 deps = MICROKERNEL_TEST_DEPS,
7023)
7024
7025xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07007026 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007027 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07007028 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007029 "test/gemm-microkernel-tester.h",
7030 "src/xnnpack/AlignedAllocator.h",
7031 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007032 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007033)
7034
7035xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007036 name = "f16_igemm_minmax_test",
7037 srcs = [
7038 "test/f16-igemm-minmax.cc",
7039 "test/gemm-microkernel-tester.h",
7040 "src/xnnpack/AlignedAllocator.h",
7041 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7042 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7043)
7044
7045xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007046 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08007047 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007048 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08007049 "test/spmm-microkernel-tester.h",
7050 "src/xnnpack/AlignedAllocator.h",
7051 ] + MICROKERNEL_TEST_HDRS,
7052 deps = MICROKERNEL_TEST_DEPS,
7053)
7054
7055xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007056 name = "f16_vadd_minmax_test",
7057 srcs = [
7058 "test/f16-vadd-minmax.cc",
7059 "test/vbinary-microkernel-tester.h",
7060 ] + MICROKERNEL_TEST_HDRS,
7061 deps = MICROKERNEL_TEST_DEPS,
7062)
7063
7064xnnpack_unit_test(
7065 name = "f16_vaddc_minmax_test",
7066 srcs = [
7067 "test/f16-vaddc-minmax.cc",
7068 "test/vbinaryc-microkernel-tester.h",
7069 ] + MICROKERNEL_TEST_HDRS,
7070 deps = MICROKERNEL_TEST_DEPS,
7071)
7072
7073xnnpack_unit_test(
7074 name = "f16_vclamp_test",
7075 srcs = [
7076 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007077 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007078 ] + MICROKERNEL_TEST_HDRS,
7079 deps = MICROKERNEL_TEST_DEPS,
7080)
7081
7082xnnpack_unit_test(
7083 name = "f16_vdiv_minmax_test",
7084 srcs = [
7085 "test/f16-vdiv-minmax.cc",
7086 "test/vbinary-microkernel-tester.h",
7087 ] + MICROKERNEL_TEST_HDRS,
7088 deps = MICROKERNEL_TEST_DEPS,
7089)
7090
7091xnnpack_unit_test(
7092 name = "f16_vdivc_minmax_test",
7093 srcs = [
7094 "test/f16-vdivc-minmax.cc",
7095 "test/vbinaryc-microkernel-tester.h",
7096 ] + MICROKERNEL_TEST_HDRS,
7097 deps = MICROKERNEL_TEST_DEPS,
7098)
7099
7100xnnpack_unit_test(
7101 name = "f16_vrdivc_minmax_test",
7102 srcs = [
7103 "test/f16-vrdivc-minmax.cc",
7104 "test/vbinaryc-microkernel-tester.h",
7105 ] + MICROKERNEL_TEST_HDRS,
7106 deps = MICROKERNEL_TEST_DEPS,
7107)
7108
7109xnnpack_unit_test(
7110 name = "f16_vhswish_test",
7111 srcs = [
7112 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007113 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007114 ] + MICROKERNEL_TEST_HDRS,
7115 deps = MICROKERNEL_TEST_DEPS,
7116)
7117
7118xnnpack_unit_test(
7119 name = "f16_vmax_test",
7120 srcs = [
7121 "test/f16-vmax.cc",
7122 "test/vbinary-microkernel-tester.h",
7123 ] + MICROKERNEL_TEST_HDRS,
7124 deps = MICROKERNEL_TEST_DEPS,
7125)
7126
7127xnnpack_unit_test(
7128 name = "f16_vmaxc_test",
7129 srcs = [
7130 "test/f16-vmaxc.cc",
7131 "test/vbinaryc-microkernel-tester.h",
7132 ] + MICROKERNEL_TEST_HDRS,
7133 deps = MICROKERNEL_TEST_DEPS,
7134)
7135
7136xnnpack_unit_test(
7137 name = "f16_vmin_test",
7138 srcs = [
7139 "test/f16-vmin.cc",
7140 "test/vbinary-microkernel-tester.h",
7141 ] + MICROKERNEL_TEST_HDRS,
7142 deps = MICROKERNEL_TEST_DEPS,
7143)
7144
7145xnnpack_unit_test(
7146 name = "f16_vminc_test",
7147 srcs = [
7148 "test/f16-vminc.cc",
7149 "test/vbinaryc-microkernel-tester.h",
7150 ] + MICROKERNEL_TEST_HDRS,
7151 deps = MICROKERNEL_TEST_DEPS,
7152)
7153
7154xnnpack_unit_test(
7155 name = "f16_vmul_minmax_test",
7156 srcs = [
7157 "test/f16-vmul-minmax.cc",
7158 "test/vbinary-microkernel-tester.h",
7159 ] + MICROKERNEL_TEST_HDRS,
7160 deps = MICROKERNEL_TEST_DEPS,
7161)
7162
7163xnnpack_unit_test(
7164 name = "f16_vmulc_minmax_test",
7165 srcs = [
7166 "test/f16-vmulc-minmax.cc",
7167 "test/vbinaryc-microkernel-tester.h",
7168 ] + MICROKERNEL_TEST_HDRS,
7169 deps = MICROKERNEL_TEST_DEPS,
7170)
7171
7172xnnpack_unit_test(
7173 name = "f16_vmulcaddc_minmax_test",
7174 srcs = [
7175 "test/f16-vmulcaddc-minmax.cc",
7176 "test/vmulcaddc-microkernel-tester.h",
7177 "src/xnnpack/AlignedAllocator.h",
7178 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7179 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7180)
7181
7182xnnpack_unit_test(
7183 name = "f16_vsub_minmax_test",
7184 srcs = [
7185 "test/f16-vsub-minmax.cc",
7186 "test/vbinary-microkernel-tester.h",
7187 ] + MICROKERNEL_TEST_HDRS,
7188 deps = MICROKERNEL_TEST_DEPS,
7189)
7190
7191xnnpack_unit_test(
7192 name = "f16_vsubc_minmax_test",
7193 srcs = [
7194 "test/f16-vsubc-minmax.cc",
7195 "test/vbinaryc-microkernel-tester.h",
7196 ] + MICROKERNEL_TEST_HDRS,
7197 deps = MICROKERNEL_TEST_DEPS,
7198)
7199
7200xnnpack_unit_test(
7201 name = "f16_vrsubc_minmax_test",
7202 srcs = [
7203 "test/f16-vrsubc-minmax.cc",
7204 "test/vbinaryc-microkernel-tester.h",
7205 ] + MICROKERNEL_TEST_HDRS,
7206 deps = MICROKERNEL_TEST_DEPS,
7207)
7208
7209xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007210 name = "f32_argmaxpool_test",
7211 srcs = [
7212 "test/f32-argmaxpool.cc",
7213 "test/argmaxpool-microkernel-tester.h",
7214 "src/xnnpack/AlignedAllocator.h",
7215 ] + MICROKERNEL_TEST_HDRS,
7216 deps = MICROKERNEL_TEST_DEPS,
7217)
7218
7219xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007220 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007221 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007222 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007223 "test/avgpool-microkernel-tester.h",
7224 "src/xnnpack/AlignedAllocator.h",
7225 ] + MICROKERNEL_TEST_HDRS,
7226 deps = MICROKERNEL_TEST_DEPS,
7227)
7228
7229xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07007230 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007231 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07007232 "test/f32-ibilinear.cc",
7233 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007234 "src/xnnpack/AlignedAllocator.h",
7235 ] + MICROKERNEL_TEST_HDRS,
7236 deps = MICROKERNEL_TEST_DEPS,
7237)
7238
7239xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07007240 name = "f32_ibilinear_chw_test",
7241 srcs = [
7242 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07007243 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07007244 "src/xnnpack/AlignedAllocator.h",
7245 ] + MICROKERNEL_TEST_HDRS,
7246 deps = MICROKERNEL_TEST_DEPS,
7247)
7248
7249xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007250 name = "f32_igemm_test",
7251 srcs = [
7252 "test/f32-igemm.cc",
7253 "test/gemm-microkernel-tester.h",
7254 "src/xnnpack/AlignedAllocator.h",
7255 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007256 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007257)
7258
7259xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007260 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007261 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07007262 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007263 "test/gemm-microkernel-tester.h",
7264 "src/xnnpack/AlignedAllocator.h",
7265 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007266 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007267)
7268
7269xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07007270 name = "f32_igemm_minmax_test",
7271 srcs = [
7272 "test/f32-igemm-minmax.cc",
7273 "test/gemm-microkernel-tester.h",
7274 "src/xnnpack/AlignedAllocator.h",
7275 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007276 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07007277)
7278
7279xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007280 name = "f32_conv_hwc_test",
7281 srcs = [
7282 "test/f32-conv-hwc.cc",
7283 "test/conv-hwc-microkernel-tester.h",
7284 "src/xnnpack/AlignedAllocator.h",
7285 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007286 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007287)
7288
7289xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007290 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007291 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007292 "test/f32-conv-hwc2chw.cc",
7293 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007294 "src/xnnpack/AlignedAllocator.h",
7295 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007296 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007297)
7298
7299xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007300 name = "f32_dwconv_test",
7301 srcs = [
7302 "test/f32-dwconv.cc",
7303 "test/dwconv-microkernel-tester.h",
7304 "src/xnnpack/AlignedAllocator.h",
7305 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007306 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007307)
7308
7309xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007310 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007311 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007312 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007313 "test/dwconv-microkernel-tester.h",
7314 "src/xnnpack/AlignedAllocator.h",
7315 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007316 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007317)
7318
7319xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07007320 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007321 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07007322 "test/f32-dwconv2d-chw.cc",
7323 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007324 "src/xnnpack/AlignedAllocator.h",
7325 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007326 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007327)
7328
7329xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007330 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007331 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007332 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007333 "test/gavgpool-microkernel-tester.h",
7334 "src/xnnpack/AlignedAllocator.h",
7335 ] + MICROKERNEL_TEST_HDRS,
7336 deps = MICROKERNEL_TEST_DEPS,
7337)
7338
7339xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007340 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007341 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007342 "test/f32-gavgpool-cw.cc",
7343 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007344 "src/xnnpack/AlignedAllocator.h",
7345 ] + MICROKERNEL_TEST_HDRS,
7346 deps = MICROKERNEL_TEST_DEPS,
7347)
7348
7349xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007350 name = "f32_gemm_test",
7351 srcs = [
7352 "test/f32-gemm.cc",
7353 "test/gemm-microkernel-tester.h",
7354 "src/xnnpack/AlignedAllocator.h",
7355 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007356 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007357)
7358
7359xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007360 name = "f32_gemm_relu_test",
7361 srcs = [
7362 "test/f32-gemm-relu.cc",
7363 "test/gemm-microkernel-tester.h",
7364 "src/xnnpack/AlignedAllocator.h",
7365 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007366 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007367)
7368
7369xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007370 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007371 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007372 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007373 "test/gemm-microkernel-tester.h",
7374 "src/xnnpack/AlignedAllocator.h",
7375 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007376 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007377)
7378
7379xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007380 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007381 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007382 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007383 "test/gemm-microkernel-tester.h",
7384 "src/xnnpack/AlignedAllocator.h",
7385 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007386 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007387)
7388
7389xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007390 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007391 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007392 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007393 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007394 ] + MICROKERNEL_TEST_HDRS,
7395 deps = MICROKERNEL_TEST_DEPS,
7396)
7397
7398xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007399 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007400 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007401 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007402 "test/maxpool-microkernel-tester.h",
7403 ] + MICROKERNEL_TEST_HDRS,
7404 deps = MICROKERNEL_TEST_DEPS,
7405)
7406
7407xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007408 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007409 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007410 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007411 "test/avgpool-microkernel-tester.h",
7412 "src/xnnpack/AlignedAllocator.h",
7413 ] + MICROKERNEL_TEST_HDRS,
7414 deps = MICROKERNEL_TEST_DEPS,
7415)
7416
7417xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007418 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007419 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007420 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007421 "test/gemm-microkernel-tester.h",
7422 "src/xnnpack/AlignedAllocator.h",
7423 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007424 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007425)
7426
7427xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007428 name = "f16_prelu_test",
7429 srcs = [
7430 "test/f16-prelu.cc",
7431 "test/prelu-microkernel-tester.h",
7432 "src/xnnpack/AlignedAllocator.h",
7433 ] + MICROKERNEL_TEST_HDRS,
7434 deps = MICROKERNEL_TEST_DEPS,
7435)
7436
7437xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007438 name = "f32_prelu_test",
7439 srcs = [
7440 "test/f32-prelu.cc",
7441 "test/prelu-microkernel-tester.h",
7442 "src/xnnpack/AlignedAllocator.h",
7443 ] + MICROKERNEL_TEST_HDRS,
7444 deps = MICROKERNEL_TEST_DEPS,
7445)
7446
7447xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007448 name = "f32_raddexpminusmax_test",
7449 srcs = [
7450 "test/f32-raddexpminusmax.cc",
7451 "test/raddexpminusmax-microkernel-tester.h",
7452 ] + MICROKERNEL_TEST_HDRS,
7453 deps = MICROKERNEL_TEST_DEPS,
7454)
7455
7456xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007457 name = "f32_raddextexp_test",
7458 srcs = [
7459 "test/f32-raddextexp.cc",
7460 "test/raddextexp-microkernel-tester.h",
7461 ] + MICROKERNEL_TEST_HDRS,
7462 deps = MICROKERNEL_TEST_DEPS,
7463)
7464
7465xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007466 name = "f32_raddstoreexpminusmax_test",
7467 srcs = [
7468 "test/f32-raddstoreexpminusmax.cc",
7469 "test/raddstoreexpminusmax-microkernel-tester.h",
7470 ] + MICROKERNEL_TEST_HDRS,
7471 deps = MICROKERNEL_TEST_DEPS,
7472)
7473
7474xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007475 name = "f32_rmax_test",
7476 srcs = [
7477 "test/f32-rmax.cc",
7478 "test/rmax-microkernel-tester.h",
7479 ] + MICROKERNEL_TEST_HDRS,
7480 deps = MICROKERNEL_TEST_DEPS,
7481)
7482
7483xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007484 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007485 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007486 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007487 "test/spmm-microkernel-tester.h",
7488 "src/xnnpack/AlignedAllocator.h",
7489 ] + MICROKERNEL_TEST_HDRS,
7490 deps = MICROKERNEL_TEST_DEPS,
7491)
7492
7493xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007494 name = "f32_vabs_test",
7495 srcs = [
7496 "test/f32-vabs.cc",
7497 "test/vunary-microkernel-tester.h",
7498 ] + MICROKERNEL_TEST_HDRS,
7499 deps = MICROKERNEL_TEST_DEPS,
7500)
7501
7502xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007503 name = "f32_vadd_test",
7504 srcs = [
7505 "test/f32-vadd.cc",
7506 "test/vbinary-microkernel-tester.h",
7507 ] + MICROKERNEL_TEST_HDRS,
7508 deps = MICROKERNEL_TEST_DEPS,
7509)
7510
7511xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007512 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007513 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007514 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007515 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007516 ] + MICROKERNEL_TEST_HDRS,
7517 deps = MICROKERNEL_TEST_DEPS,
7518)
7519
7520xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007521 name = "f32_vadd_relu_test",
7522 srcs = [
7523 "test/f32-vadd-relu.cc",
7524 "test/vbinary-microkernel-tester.h",
7525 ] + MICROKERNEL_TEST_HDRS,
7526 deps = MICROKERNEL_TEST_DEPS,
7527)
7528
7529xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007530 name = "f32_vaddc_test",
7531 srcs = [
7532 "test/f32-vaddc.cc",
7533 "test/vbinaryc-microkernel-tester.h",
7534 ] + MICROKERNEL_TEST_HDRS,
7535 deps = MICROKERNEL_TEST_DEPS,
7536)
7537
7538xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007539 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007540 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007541 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007542 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007543 ] + MICROKERNEL_TEST_HDRS,
7544 deps = MICROKERNEL_TEST_DEPS,
7545)
7546
7547xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007548 name = "f32_vaddc_relu_test",
7549 srcs = [
7550 "test/f32-vaddc-relu.cc",
7551 "test/vbinaryc-microkernel-tester.h",
7552 ] + MICROKERNEL_TEST_HDRS,
7553 deps = MICROKERNEL_TEST_DEPS,
7554)
7555
7556xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007557 name = "f32_vclamp_test",
7558 srcs = [
7559 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007560 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007561 ] + MICROKERNEL_TEST_HDRS,
7562 deps = MICROKERNEL_TEST_DEPS,
7563)
7564
7565xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007566 name = "f32_vdiv_test",
7567 srcs = [
7568 "test/f32-vdiv.cc",
7569 "test/vbinary-microkernel-tester.h",
7570 ] + MICROKERNEL_TEST_HDRS,
7571 deps = MICROKERNEL_TEST_DEPS,
7572)
7573
7574xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007575 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007576 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007577 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007578 "test/vbinary-microkernel-tester.h",
7579 ] + MICROKERNEL_TEST_HDRS,
7580 deps = MICROKERNEL_TEST_DEPS,
7581)
7582
7583xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007584 name = "f32_vdiv_relu_test",
7585 srcs = [
7586 "test/f32-vdiv-relu.cc",
7587 "test/vbinary-microkernel-tester.h",
7588 ] + MICROKERNEL_TEST_HDRS,
7589 deps = MICROKERNEL_TEST_DEPS,
7590)
7591
7592xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007593 name = "f32_vdivc_test",
7594 srcs = [
7595 "test/f32-vdivc.cc",
7596 "test/vbinaryc-microkernel-tester.h",
7597 ] + MICROKERNEL_TEST_HDRS,
7598 deps = MICROKERNEL_TEST_DEPS,
7599)
7600
7601xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007602 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007603 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007604 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007605 "test/vbinaryc-microkernel-tester.h",
7606 ] + MICROKERNEL_TEST_HDRS,
7607 deps = MICROKERNEL_TEST_DEPS,
7608)
7609
7610xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007611 name = "f32_vdivc_relu_test",
7612 srcs = [
7613 "test/f32-vdivc-relu.cc",
7614 "test/vbinaryc-microkernel-tester.h",
7615 ] + MICROKERNEL_TEST_HDRS,
7616 deps = MICROKERNEL_TEST_DEPS,
7617)
7618
7619xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007620 name = "f32_vrdivc_test",
7621 srcs = [
7622 "test/f32-vrdivc.cc",
7623 "test/vbinaryc-microkernel-tester.h",
7624 ] + MICROKERNEL_TEST_HDRS,
7625 deps = MICROKERNEL_TEST_DEPS,
7626)
7627
7628xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007629 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007630 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007631 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007632 "test/vbinaryc-microkernel-tester.h",
7633 ] + MICROKERNEL_TEST_HDRS,
7634 deps = MICROKERNEL_TEST_DEPS,
7635)
7636
7637xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007638 name = "f32_vrdivc_relu_test",
7639 srcs = [
7640 "test/f32-vrdivc-relu.cc",
7641 "test/vbinaryc-microkernel-tester.h",
7642 ] + MICROKERNEL_TEST_HDRS,
7643 deps = MICROKERNEL_TEST_DEPS,
7644)
7645
7646xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007647 name = "f32_velu_test",
7648 srcs = [
7649 "test/f32-velu.cc",
7650 "test/vunary-microkernel-tester.h",
7651 ] + MICROKERNEL_TEST_HDRS,
7652 deps = MICROKERNEL_TEST_DEPS,
7653)
7654
7655xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007656 name = "f32_vmax_test",
7657 srcs = [
7658 "test/f32-vmax.cc",
7659 "test/vbinary-microkernel-tester.h",
7660 ] + MICROKERNEL_TEST_HDRS,
7661 deps = MICROKERNEL_TEST_DEPS,
7662)
7663
7664xnnpack_unit_test(
7665 name = "f32_vmaxc_test",
7666 srcs = [
7667 "test/f32-vmaxc.cc",
7668 "test/vbinaryc-microkernel-tester.h",
7669 ] + MICROKERNEL_TEST_HDRS,
7670 deps = MICROKERNEL_TEST_DEPS,
7671)
7672
7673xnnpack_unit_test(
7674 name = "f32_vmin_test",
7675 srcs = [
7676 "test/f32-vmin.cc",
7677 "test/vbinary-microkernel-tester.h",
7678 ] + MICROKERNEL_TEST_HDRS,
7679 deps = MICROKERNEL_TEST_DEPS,
7680)
7681
7682xnnpack_unit_test(
7683 name = "f32_vminc_test",
7684 srcs = [
7685 "test/f32-vminc.cc",
7686 "test/vbinaryc-microkernel-tester.h",
7687 ] + MICROKERNEL_TEST_HDRS,
7688 deps = MICROKERNEL_TEST_DEPS,
7689)
7690
7691xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007692 name = "f32_vmul_test",
7693 srcs = [
7694 "test/f32-vmul.cc",
7695 "test/vbinary-microkernel-tester.h",
7696 ] + MICROKERNEL_TEST_HDRS,
7697 deps = MICROKERNEL_TEST_DEPS,
7698)
7699
7700xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007701 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007702 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007703 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007704 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007705 ] + MICROKERNEL_TEST_HDRS,
7706 deps = MICROKERNEL_TEST_DEPS,
7707)
7708
7709xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007710 name = "f32_vmul_relu_test",
7711 srcs = [
7712 "test/f32-vmul-relu.cc",
7713 "test/vbinary-microkernel-tester.h",
7714 ] + MICROKERNEL_TEST_HDRS,
7715 deps = MICROKERNEL_TEST_DEPS,
7716)
7717
7718xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007719 name = "f32_vmulc_test",
7720 srcs = [
7721 "test/f32-vmulc.cc",
7722 "test/vbinaryc-microkernel-tester.h",
7723 ] + MICROKERNEL_TEST_HDRS,
7724 deps = MICROKERNEL_TEST_DEPS,
7725)
7726
7727xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007728 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007729 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007730 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007731 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007732 ] + MICROKERNEL_TEST_HDRS,
7733 deps = MICROKERNEL_TEST_DEPS,
7734)
7735
7736xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007737 name = "f32_vmulc_relu_test",
7738 srcs = [
7739 "test/f32-vmulc-relu.cc",
7740 "test/vbinaryc-microkernel-tester.h",
7741 ] + MICROKERNEL_TEST_HDRS,
7742 deps = MICROKERNEL_TEST_DEPS,
7743)
7744
7745xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007746 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007747 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007748 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007749 "test/vmulcaddc-microkernel-tester.h",
7750 "src/xnnpack/AlignedAllocator.h",
7751 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007752 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007753)
7754
7755xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007756 name = "f32_vlrelu_test",
7757 srcs = [
7758 "test/f32-vlrelu.cc",
7759 "test/vunary-microkernel-tester.h",
7760 ] + MICROKERNEL_TEST_HDRS,
7761 deps = MICROKERNEL_TEST_DEPS,
7762)
7763
7764xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007765 name = "f32_vneg_test",
7766 srcs = [
7767 "test/f32-vneg.cc",
7768 "test/vunary-microkernel-tester.h",
7769 ] + MICROKERNEL_TEST_HDRS,
7770 deps = MICROKERNEL_TEST_DEPS,
7771)
7772
7773xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007774 name = "f32_vrelu_test",
7775 srcs = [
7776 "test/f32-vrelu.cc",
7777 "test/vunary-microkernel-tester.h",
7778 ] + MICROKERNEL_TEST_HDRS,
7779 deps = MICROKERNEL_TEST_DEPS,
7780)
7781
7782xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007783 name = "f32_vrndne_test",
7784 srcs = [
7785 "test/f32-vrndne.cc",
7786 "test/vunary-microkernel-tester.h",
7787 ] + MICROKERNEL_TEST_HDRS,
7788 deps = MICROKERNEL_TEST_DEPS,
7789)
7790
7791xnnpack_unit_test(
7792 name = "f32_vrndz_test",
7793 srcs = [
7794 "test/f32-vrndz.cc",
7795 "test/vunary-microkernel-tester.h",
7796 ] + MICROKERNEL_TEST_HDRS,
7797 deps = MICROKERNEL_TEST_DEPS,
7798)
7799
7800xnnpack_unit_test(
7801 name = "f32_vrndu_test",
7802 srcs = [
7803 "test/f32-vrndu.cc",
7804 "test/vunary-microkernel-tester.h",
7805 ] + MICROKERNEL_TEST_HDRS,
7806 deps = MICROKERNEL_TEST_DEPS,
7807)
7808
7809xnnpack_unit_test(
7810 name = "f32_vrndd_test",
7811 srcs = [
7812 "test/f32-vrndd.cc",
7813 "test/vunary-microkernel-tester.h",
7814 ] + MICROKERNEL_TEST_HDRS,
7815 deps = MICROKERNEL_TEST_DEPS,
7816)
7817
7818xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007819 name = "f32_vscale_test",
7820 srcs = [
7821 "test/f32-vscale.cc",
7822 "test/vscale-microkernel-tester.h",
7823 ] + MICROKERNEL_TEST_HDRS,
7824 deps = MICROKERNEL_TEST_DEPS,
7825)
7826
7827xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007828 name = "f32_vscaleexpminusmax_test",
7829 srcs = [
7830 "test/f32-vscaleexpminusmax.cc",
7831 "test/vscaleexpminusmax-microkernel-tester.h",
7832 ] + MICROKERNEL_TEST_HDRS,
7833 deps = MICROKERNEL_TEST_DEPS,
7834)
7835
7836xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007837 name = "f32_vscaleextexp_test",
7838 srcs = [
7839 "test/f32-vscaleextexp.cc",
7840 "test/vscaleextexp-microkernel-tester.h",
7841 ] + MICROKERNEL_TEST_HDRS,
7842 deps = MICROKERNEL_TEST_DEPS,
7843)
7844
7845xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007846 name = "f32_vsigmoid_test",
7847 srcs = [
7848 "test/f32-vsigmoid.cc",
7849 "test/vunary-microkernel-tester.h",
7850 ] + MICROKERNEL_TEST_HDRS,
7851 deps = MICROKERNEL_TEST_DEPS,
7852)
7853
7854xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007855 name = "f32_vsqr_test",
7856 srcs = [
7857 "test/f32-vsqr.cc",
7858 "test/vunary-microkernel-tester.h",
7859 ] + MICROKERNEL_TEST_HDRS,
7860 deps = MICROKERNEL_TEST_DEPS,
7861)
7862
7863xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007864 name = "f32_vsqrdiff_test",
7865 srcs = [
7866 "test/f32-vsqrdiff.cc",
7867 "test/vbinary-microkernel-tester.h",
7868 ] + MICROKERNEL_TEST_HDRS,
7869 deps = MICROKERNEL_TEST_DEPS,
7870)
7871
7872xnnpack_unit_test(
7873 name = "f32_vsqrdiffc_test",
7874 srcs = [
7875 "test/f32-vsqrdiffc.cc",
7876 "test/vbinaryc-microkernel-tester.h",
7877 ] + MICROKERNEL_TEST_HDRS,
7878 deps = MICROKERNEL_TEST_DEPS,
7879)
7880
7881xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007882 name = "f32_vsqrt_test",
7883 srcs = [
7884 "test/f32-vsqrt.cc",
7885 "test/vunary-microkernel-tester.h",
7886 ] + MICROKERNEL_TEST_HDRS,
7887 deps = MICROKERNEL_TEST_DEPS,
7888)
7889
7890xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007891 name = "f32_vsub_test",
7892 srcs = [
7893 "test/f32-vsub.cc",
7894 "test/vbinary-microkernel-tester.h",
7895 ] + MICROKERNEL_TEST_HDRS,
7896 deps = MICROKERNEL_TEST_DEPS,
7897)
7898
7899xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007900 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007901 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007902 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007903 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007904 ] + MICROKERNEL_TEST_HDRS,
7905 deps = MICROKERNEL_TEST_DEPS,
7906)
7907
7908xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007909 name = "f32_vsub_relu_test",
7910 srcs = [
7911 "test/f32-vsub-relu.cc",
7912 "test/vbinary-microkernel-tester.h",
7913 ] + MICROKERNEL_TEST_HDRS,
7914 deps = MICROKERNEL_TEST_DEPS,
7915)
7916
7917xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007918 name = "f32_vsubc_test",
7919 srcs = [
7920 "test/f32-vsubc.cc",
7921 "test/vbinaryc-microkernel-tester.h",
7922 ] + MICROKERNEL_TEST_HDRS,
7923 deps = MICROKERNEL_TEST_DEPS,
7924)
7925
7926xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007927 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007928 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007929 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007930 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007931 ] + MICROKERNEL_TEST_HDRS,
7932 deps = MICROKERNEL_TEST_DEPS,
7933)
7934
7935xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007936 name = "f32_vsubc_relu_test",
7937 srcs = [
7938 "test/f32-vsubc-relu.cc",
7939 "test/vbinaryc-microkernel-tester.h",
7940 ] + MICROKERNEL_TEST_HDRS,
7941 deps = MICROKERNEL_TEST_DEPS,
7942)
7943
7944xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007945 name = "f32_vrsubc_test",
7946 srcs = [
7947 "test/f32-vrsubc.cc",
7948 "test/vbinaryc-microkernel-tester.h",
7949 ] + MICROKERNEL_TEST_HDRS,
7950 deps = MICROKERNEL_TEST_DEPS,
7951)
7952
7953xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007954 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007955 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007956 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007957 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007958 ] + MICROKERNEL_TEST_HDRS,
7959 deps = MICROKERNEL_TEST_DEPS,
7960)
7961
7962xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007963 name = "f32_vrsubc_relu_test",
7964 srcs = [
7965 "test/f32-vrsubc-relu.cc",
7966 "test/vbinaryc-microkernel-tester.h",
7967 ] + MICROKERNEL_TEST_HDRS,
7968 deps = MICROKERNEL_TEST_DEPS,
7969)
7970
7971xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007972 name = "qc8_dwconv_minmax_fp32_test",
7973 timeout = "moderate",
7974 srcs = [
7975 "test/qc8-dwconv-minmax-fp32.cc",
7976 "test/dwconv-microkernel-tester.h",
7977 "src/xnnpack/AlignedAllocator.h",
7978 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7979 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7980)
7981
7982xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007983 name = "qc8_gemm_minmax_fp32_test",
7984 timeout = "moderate",
7985 srcs = [
7986 "test/qc8-gemm-minmax-fp32.cc",
7987 "test/gemm-microkernel-tester.h",
7988 "src/xnnpack/AlignedAllocator.h",
7989 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7990 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7991)
7992
7993xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007994 name = "qc8_igemm_minmax_fp32_test",
7995 timeout = "moderate",
7996 srcs = [
7997 "test/qc8-igemm-minmax-fp32.cc",
7998 "test/gemm-microkernel-tester.h",
7999 "src/xnnpack/AlignedAllocator.h",
8000 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8001 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8002)
8003
8004xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07008005 name = "qs8_dwconv_minmax_fp32_test",
8006 srcs = [
8007 "test/qs8-dwconv-minmax-fp32.cc",
8008 "test/dwconv-microkernel-tester.h",
8009 "src/xnnpack/AlignedAllocator.h",
8010 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8011 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8012)
8013
8014xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008015 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07008016 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008017 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07008018 "test/dwconv-microkernel-tester.h",
8019 "src/xnnpack/AlignedAllocator.h",
8020 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8021 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8022)
8023
8024xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07008025 name = "qs8_dwconv_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008026 srcs = [
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07008027 "test/qs8-dwconv-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008028 "test/dwconv-microkernel-tester.h",
8029 "src/xnnpack/AlignedAllocator.h",
8030 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8031 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8032)
8033
8034xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07008035 name = "qs8_gavgpool_minmax_test",
8036 srcs = [
8037 "test/qs8-gavgpool-minmax.cc",
8038 "test/gavgpool-microkernel-tester.h",
8039 "src/xnnpack/AlignedAllocator.h",
8040 ] + MICROKERNEL_TEST_HDRS,
8041 deps = MICROKERNEL_TEST_DEPS,
8042)
8043
8044xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008045 name = "qs8_gemm_minmax_fp32_test",
8046 timeout = "moderate",
8047 srcs = [
8048 "test/qs8-gemm-minmax-fp32.cc",
8049 "test/gemm-microkernel-tester.h",
8050 "src/xnnpack/AlignedAllocator.h",
8051 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8052 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8053)
8054
8055xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008056 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07008057 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07008058 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008059 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07008060 "test/gemm-microkernel-tester.h",
8061 "src/xnnpack/AlignedAllocator.h",
8062 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8063 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8064)
8065
8066xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008067 name = "qs8_gemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008068 timeout = "moderate",
8069 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07008070 "test/qs8-gemm-minmax-rndnu.cc",
8071 "test/gemm-microkernel-tester.h",
8072 "src/xnnpack/AlignedAllocator.h",
8073 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8074 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8075)
8076
8077xnnpack_unit_test(
8078 name = "qs8_igemm_minmax_fp32_test",
8079 timeout = "moderate",
8080 srcs = [
8081 "test/qs8-igemm-minmax-fp32.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008082 "test/gemm-microkernel-tester.h",
8083 "src/xnnpack/AlignedAllocator.h",
8084 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8085 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8086)
8087
8088xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008089 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07008090 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07008091 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008092 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07008093 "test/gemm-microkernel-tester.h",
8094 "src/xnnpack/AlignedAllocator.h",
8095 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8096 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8097)
8098
8099xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008100 name = "qs8_igemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008101 timeout = "moderate",
8102 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07008103 "test/qs8-igemm-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008104 "test/gemm-microkernel-tester.h",
8105 "src/xnnpack/AlignedAllocator.h",
8106 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8107 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8108)
8109
8110xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07008111 name = "qs8_requantization_test",
8112 srcs = [
8113 "src/xnnpack/requantization-stubs.h",
8114 "test/qs8-requantization.cc",
8115 "test/requantization-tester.h",
8116 ] + MICROKERNEL_TEST_HDRS,
8117 deps = MICROKERNEL_TEST_DEPS,
8118)
8119
8120xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07008121 name = "qs8_vadd_minmax_test",
8122 srcs = [
8123 "test/qs8-vadd-minmax.cc",
8124 "test/vadd-microkernel-tester.h",
8125 ] + MICROKERNEL_TEST_HDRS,
8126 deps = MICROKERNEL_TEST_DEPS,
8127)
8128
8129xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07008130 name = "qs8_vaddc_minmax_test",
8131 srcs = [
8132 "test/qs8-vaddc-minmax.cc",
8133 "test/vaddc-microkernel-tester.h",
8134 ] + MICROKERNEL_TEST_HDRS,
8135 deps = MICROKERNEL_TEST_DEPS,
8136)
8137
8138xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008139 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008140 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008141 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008142 "test/avgpool-microkernel-tester.h",
8143 "src/xnnpack/AlignedAllocator.h",
8144 ] + MICROKERNEL_TEST_HDRS,
8145 deps = MICROKERNEL_TEST_DEPS,
8146)
8147
8148xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07008149 name = "qu8_dwconv_minmax_fp32_test",
8150 srcs = [
8151 "test/qu8-dwconv-minmax-fp32.cc",
8152 "test/dwconv-microkernel-tester.h",
8153 "src/xnnpack/AlignedAllocator.h",
8154 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8155 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8156)
8157
8158xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008159 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008160 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008161 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008162 "test/gavgpool-microkernel-tester.h",
8163 "src/xnnpack/AlignedAllocator.h",
8164 ] + MICROKERNEL_TEST_HDRS,
8165 deps = MICROKERNEL_TEST_DEPS,
8166)
8167
8168xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07008169 name = "qu8_gemm_minmax_fp32_test",
8170 srcs = [
8171 "test/qu8-gemm-minmax-fp32.cc",
8172 "test/gemm-microkernel-tester.h",
8173 "src/xnnpack/AlignedAllocator.h",
8174 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8175 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8176)
8177
8178xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008179 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008180 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008181 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008182 "test/gemm-microkernel-tester.h",
8183 "src/xnnpack/AlignedAllocator.h",
8184 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008185 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008186)
8187
8188xnnpack_unit_test(
Marat Dukhan173661d2021-07-26 23:47:08 -07008189 name = "qu8_gemm_minmax_rndnu_test",
8190 srcs = [
8191 "test/qu8-gemm-minmax-rndnu.cc",
8192 "test/gemm-microkernel-tester.h",
8193 "src/xnnpack/AlignedAllocator.h",
8194 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8195 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8196)
8197
8198xnnpack_unit_test(
8199 name = "qu8_igemm_minmax_fp32_test",
8200 srcs = [
8201 "test/qu8-igemm-minmax-fp32.cc",
8202 "test/gemm-microkernel-tester.h",
8203 "src/xnnpack/AlignedAllocator.h",
8204 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8205 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8206)
8207
8208xnnpack_unit_test(
8209 name = "qu8_igemm_minmax_gemmlowp_test",
8210 srcs = [
8211 "test/qu8-igemm-minmax-gemmlowp.cc",
8212 "test/gemm-microkernel-tester.h",
8213 "src/xnnpack/AlignedAllocator.h",
8214 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8215 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8216)
8217
8218xnnpack_unit_test(
8219 name = "qu8_igemm_minmax_rndnu_test",
8220 srcs = [
8221 "test/qu8-igemm-minmax-rndnu.cc",
8222 "test/gemm-microkernel-tester.h",
8223 "src/xnnpack/AlignedAllocator.h",
8224 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8225 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8226)
8227
8228xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07008229 name = "qu8_requantization_test",
8230 srcs = [
8231 "src/xnnpack/requantization-stubs.h",
8232 "test/qu8-requantization.cc",
8233 "test/requantization-tester.h",
8234 ] + MICROKERNEL_TEST_HDRS,
8235 deps = MICROKERNEL_TEST_DEPS,
8236)
8237
8238xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008239 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008240 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008241 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008242 "test/vadd-microkernel-tester.h",
8243 ] + MICROKERNEL_TEST_HDRS,
8244 deps = MICROKERNEL_TEST_DEPS,
8245)
8246
8247xnnpack_unit_test(
Marat Dukhan76e78c82021-07-20 21:11:23 -07008248 name = "qu8_vaddc_minmax_test",
8249 srcs = [
8250 "test/qu8-vaddc-minmax.cc",
8251 "test/vaddc-microkernel-tester.h",
8252 ] + MICROKERNEL_TEST_HDRS,
8253 deps = MICROKERNEL_TEST_DEPS,
8254)
8255
8256xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008257 name = "u8_lut32norm_test",
8258 srcs = [
8259 "test/u8-lut32norm.cc",
8260 "test/lut-norm-microkernel-tester.h",
8261 ] + MICROKERNEL_TEST_HDRS,
8262 deps = MICROKERNEL_TEST_DEPS,
8263)
8264
8265xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07008266 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008267 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07008268 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008269 "test/maxpool-microkernel-tester.h",
8270 ] + MICROKERNEL_TEST_HDRS,
8271 deps = MICROKERNEL_TEST_DEPS,
8272)
8273
8274xnnpack_unit_test(
8275 name = "u8_rmax_test",
8276 srcs = [
8277 "test/u8-rmax.cc",
8278 "test/rmax-microkernel-tester.h",
8279 ] + MICROKERNEL_TEST_HDRS,
8280 deps = MICROKERNEL_TEST_DEPS,
8281)
8282
8283xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07008284 name = "u8_vclamp_test",
8285 srcs = [
8286 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07008287 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07008288 ] + MICROKERNEL_TEST_HDRS,
8289 deps = MICROKERNEL_TEST_DEPS,
8290)
8291
8292xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008293 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08008294 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008295 "test/x32-depthtospace2d-chw2hwc.cc",
8296 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08008297 ] + MICROKERNEL_TEST_HDRS,
8298 deps = MICROKERNEL_TEST_DEPS,
8299)
8300
8301xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07008302 name = "x32_fill_test",
8303 srcs = [
8304 "test/x32-fill.cc",
8305 "test/fill-microkernel-tester.h",
8306 ] + MICROKERNEL_TEST_HDRS,
8307 deps = MICROKERNEL_TEST_DEPS,
8308)
8309
8310xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008311 name = "x32_packx_test",
8312 srcs = [
8313 "test/x32-packx.cc",
8314 "test/pack-microkernel-tester.h",
8315 "src/xnnpack/AlignedAllocator.h",
8316 ] + MICROKERNEL_TEST_HDRS,
8317 deps = MICROKERNEL_TEST_DEPS,
8318)
8319
8320xnnpack_unit_test(
8321 name = "x32_pad_test",
8322 srcs = [
8323 "test/x32-pad.cc",
8324 "test/pad-microkernel-tester.h",
8325 ] + MICROKERNEL_TEST_HDRS,
8326 deps = MICROKERNEL_TEST_DEPS,
8327)
8328
8329xnnpack_unit_test(
8330 name = "x32_unpool_test",
8331 srcs = [
8332 "test/x32-unpool.cc",
8333 "test/unpool-microkernel-tester.h",
8334 ] + MICROKERNEL_TEST_HDRS,
8335 deps = MICROKERNEL_TEST_DEPS,
8336)
8337
8338xnnpack_unit_test(
8339 name = "x32_zip_test",
8340 srcs = [
8341 "test/x32-zip.cc",
8342 "test/zip-microkernel-tester.h",
8343 ] + MICROKERNEL_TEST_HDRS,
8344 deps = MICROKERNEL_TEST_DEPS,
8345)
8346
8347xnnpack_unit_test(
8348 name = "x8_lut_test",
8349 srcs = [
8350 "test/x8-lut.cc",
8351 "test/lut-microkernel-tester.h",
8352 ] + MICROKERNEL_TEST_HDRS,
8353 deps = MICROKERNEL_TEST_DEPS,
8354)
8355
8356xnnpack_unit_test(
8357 name = "x8_zip_test",
8358 srcs = [
8359 "test/x8-zip.cc",
8360 "test/zip-microkernel-tester.h",
8361 ] + MICROKERNEL_TEST_HDRS,
8362 deps = MICROKERNEL_TEST_DEPS,
8363)
8364
Marat Dukhan20c3b922020-03-10 03:45:06 -07008365########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008366
8367xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07008368 name = "operator_size_test",
8369 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008370 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008371)
8372
Marat Dukhan20c3b922020-03-10 03:45:06 -07008373xnnpack_binary(
8374 name = "subgraph_size_test",
8375 srcs = ["test/subgraph-size.c"],
8376 deps = [":XNNPACK"],
8377)
8378
8379########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008380
8381xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008382 name = "abs_nc_test",
8383 srcs = [
8384 "test/abs-nc.cc",
8385 "test/abs-operator-tester.h",
8386 ],
8387 deps = OPERATOR_TEST_DEPS,
8388)
8389
8390xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008391 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008392 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008393 srcs = [
8394 "test/add-nd.cc",
8395 "test/binary-elementwise-operator-tester.h",
8396 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008397 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008398)
8399
8400xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008401 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008402 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008403 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008404 "test/argmax-pooling-operator-tester.h",
8405 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008406 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008407)
8408
8409xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008410 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008411 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008412 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008413 "test/average-pooling-operator-tester.h",
8414 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008415 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008416)
8417
8418xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008419 name = "bankers_rounding_nc_test",
8420 srcs = [
8421 "test/bankers-rounding-nc.cc",
8422 "test/bankers-rounding-operator-tester.h",
8423 ],
8424 deps = OPERATOR_TEST_DEPS,
8425)
8426
8427xnnpack_unit_test(
8428 name = "ceiling_nc_test",
8429 srcs = [
8430 "test/ceiling-nc.cc",
8431 "test/ceiling-operator-tester.h",
8432 ],
8433 deps = OPERATOR_TEST_DEPS,
8434)
8435
8436xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008437 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008438 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008439 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008440 "test/channel-shuffle-operator-tester.h",
8441 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008442 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008443)
8444
8445xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008446 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008447 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008448 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008449 "test/clamp-operator-tester.h",
8450 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008451 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008452)
8453
8454xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008455 name = "constant_pad_nd_test",
8456 srcs = [
8457 "test/constant-pad-nd.cc",
8458 "test/constant-pad-operator-tester.h",
8459 ],
8460 deps = OPERATOR_TEST_DEPS,
8461)
8462
8463xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008464 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008465 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008466 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008467 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008468 "test/convolution-operator-tester.h",
8469 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008470 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008471)
8472
8473xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008474 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008475 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008476 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008477 "test/convolution-nchw.cc",
8478 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008479 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008480 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008481)
8482
8483xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008484 name = "copy_nc_test",
8485 srcs = [
8486 "test/copy-nc.cc",
8487 "test/copy-operator-tester.h",
8488 ],
8489 deps = OPERATOR_TEST_DEPS,
8490)
8491
8492xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008493 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008494 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008495 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008496 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008497 "test/deconvolution-operator-tester.h",
8498 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008499 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008500)
8501
8502xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008503 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008504 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008505 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008506 "test/depth-to-space-operator-tester.h",
8507 ] + OPERATOR_TEST_PARAMS_HDRS,
8508 deps = OPERATOR_TEST_DEPS,
8509)
8510
8511xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008512 name = "depth_to_space_nhwc_test",
8513 srcs = [
8514 "test/depth-to-space-nhwc.cc",
8515 "test/depth-to-space-operator-tester.h",
8516 ] + OPERATOR_TEST_PARAMS_HDRS,
8517 deps = OPERATOR_TEST_DEPS,
8518)
8519
8520xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008521 name = "divide_nd_test",
8522 srcs = [
8523 "test/binary-elementwise-operator-tester.h",
8524 "test/divide-nd.cc",
8525 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008526 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008527)
8528
8529xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008530 name = "elu_nc_test",
8531 srcs = [
8532 "test/elu-nc.cc",
8533 "test/elu-operator-tester.h",
8534 ],
8535 deps = OPERATOR_TEST_DEPS,
8536)
8537
8538xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008539 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008540 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008541 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008542 "test/fully-connected-operator-tester.h",
8543 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008544 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008545)
8546
8547xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008548 name = "floor_nc_test",
8549 srcs = [
8550 "test/floor-nc.cc",
8551 "test/floor-operator-tester.h",
8552 ],
8553 deps = OPERATOR_TEST_DEPS,
8554)
8555
8556xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008557 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008558 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008559 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008560 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008561 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008562 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008563)
8564
8565xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008566 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008567 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008568 "test/global-average-pooling-ncw.cc",
8569 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008570 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008571 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008572)
8573
8574xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008575 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008576 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008577 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008578 "test/hardswish-operator-tester.h",
8579 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008580 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008581)
8582
8583xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008584 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008585 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008586 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008587 "test/leaky-relu-operator-tester.h",
8588 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008589 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008590)
8591
8592xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008593 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008594 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008595 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008596 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008597 "test/max-pooling-operator-tester.h",
8598 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008599 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008600)
8601
8602xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008603 name = "maximum_nd_test",
8604 srcs = [
8605 "test/binary-elementwise-operator-tester.h",
8606 "test/maximum-nd.cc",
8607 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008608 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008609)
8610
8611xnnpack_unit_test(
8612 name = "minimum_nd_test",
8613 srcs = [
8614 "test/binary-elementwise-operator-tester.h",
8615 "test/minimum-nd.cc",
8616 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008617 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008618)
8619
8620xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008621 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008622 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008623 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008624 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008625 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008626 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008627)
8628
8629xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008630 name = "negate_nc_test",
8631 srcs = [
8632 "test/negate-nc.cc",
8633 "test/negate-operator-tester.h",
8634 ],
8635 deps = OPERATOR_TEST_DEPS,
8636)
8637
8638xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008639 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008640 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008641 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008642 "test/prelu-operator-tester.h",
8643 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008644 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008645)
8646
8647xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008648 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008649 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008650 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008651 "test/resize-bilinear-operator-tester.h",
8652 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008653 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008654)
8655
8656xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008657 name = "resize_bilinear_nchw_test",
8658 srcs = [
8659 "test/resize-bilinear-nchw.cc",
8660 "test/resize-bilinear-operator-tester.h",
8661 ] + OPERATOR_TEST_PARAMS_HDRS,
8662 deps = OPERATOR_TEST_DEPS,
8663)
8664
8665xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008666 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008667 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008668 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008669 "test/sigmoid-operator-tester.h",
8670 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008671 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008672)
8673
8674xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008675 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008676 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008677 "test/softmax-nc.cc",
8678 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008679 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008680 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008681)
8682
8683xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008684 name = "square_nc_test",
8685 srcs = [
8686 "test/square-nc.cc",
8687 "test/square-operator-tester.h",
8688 ],
8689 deps = OPERATOR_TEST_DEPS,
8690)
8691
8692xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008693 name = "square_root_nc_test",
8694 srcs = [
8695 "test/square-root-nc.cc",
8696 "test/square-root-operator-tester.h",
8697 ],
8698 deps = OPERATOR_TEST_DEPS,
8699)
8700
8701xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008702 name = "squared_difference_nd_test",
8703 srcs = [
8704 "test/binary-elementwise-operator-tester.h",
8705 "test/squared-difference-nd.cc",
8706 ],
8707 deps = OPERATOR_TEST_DEPS,
8708)
8709
8710xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008711 name = "subtract_nd_test",
8712 srcs = [
8713 "test/binary-elementwise-operator-tester.h",
8714 "test/subtract-nd.cc",
8715 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008716 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008717)
8718
8719xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008720 name = "truncation_nc_test",
8721 srcs = [
8722 "test/truncation-nc.cc",
8723 "test/truncation-operator-tester.h",
8724 ],
8725 deps = OPERATOR_TEST_DEPS,
8726)
8727
8728xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008729 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008730 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008731 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008732 "test/unpooling-operator-tester.h",
8733 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008734 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008735)
8736
Chao Mei6ddfc602020-05-13 22:29:36 -07008737############################### Misc unit tests ###############################
8738
8739xnnpack_unit_test(
8740 name = "memory_planner_test",
8741 srcs = [
8742 "test/memory-planner-test.cc",
8743 ],
8744 deps = [
8745 ":XNNPACK",
8746 ":memory_planner",
8747 ],
8748)
8749
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008750xnnpack_unit_test(
8751 name = "subgraph_nchw_test",
8752 srcs = [
8753 "src/xnnpack/subgraph.h",
8754 "test/subgraph-nchw.cc",
8755 "test/subgraph-tester.h",
8756 ],
8757 deps = [
8758 ":XNNPACK",
8759 ],
8760)
8761
Marat Dukhan08c4a432019-10-03 09:29:21 -07008762############################# Build configurations #############################
8763
Marat Dukhanb8642352019-10-30 15:43:02 -07008764# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008765config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008766 name = "xnn_enable_assembly_explicit_true",
8767 define_values = {"xnn_enable_assembly": "true"},
8768)
8769
8770# Disables usage of assembly kernels.
8771config_setting(
8772 name = "xnn_enable_assembly_explicit_false",
8773 define_values = {"xnn_enable_assembly": "false"},
8774)
8775
Marat Dukhan9de90e02020-06-18 16:04:12 -07008776# Enables usage of sparse inference.
8777config_setting(
8778 name = "xnn_enable_sparse_explicit_true",
8779 define_values = {"xnn_enable_sparse": "true"},
8780)
8781
8782# Disables usage of sparse inference.
8783config_setting(
8784 name = "xnn_enable_sparse_explicit_false",
8785 define_values = {"xnn_enable_sparse": "false"},
8786)
8787
Marat Dukhan05702cf2020-03-26 15:41:33 -07008788# Disables usage of HMP-aware optimizations.
8789config_setting(
8790 name = "xnn_enable_hmp_explicit_false",
8791 define_values = {"xnn_enable_hmp": "false"},
8792)
8793
Chao Mei6ddfc602020-05-13 22:29:36 -07008794# Enable usage of optimized memory allocation
8795config_setting(
8796 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008797 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008798)
8799
8800# Disable usage of optimized memory allocation
8801config_setting(
8802 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008803 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008804)
8805
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008806# Enable QS8 inference in TFLite-specific version
8807config_setting(
8808 name = "xnn_enable_qs8_explicit_true",
8809 define_values = {"xnn_enable_qs8": "true"},
8810)
8811
8812# Disable QS8 inference in TFLite-specific version
8813config_setting(
8814 name = "xnn_enable_qs8_explicit_false",
8815 define_values = {"xnn_enable_qs8": "false"},
8816)
8817
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008818# Enable QU8 inference in TFLite-specific version
8819config_setting(
8820 name = "xnn_enable_qu8_explicit_true",
8821 define_values = {"xnn_enable_qu8": "true"},
8822)
8823
8824# Disable QU8 inference in TFLite-specific version
8825config_setting(
8826 name = "xnn_enable_qu8_explicit_false",
8827 define_values = {"xnn_enable_qu8": "false"},
8828)
8829
Marat Dukhanb8642352019-10-30 15:43:02 -07008830# Builds with -c dbg
8831config_setting(
8832 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008833 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008834 "compilation_mode": "dbg",
8835 },
8836)
8837
8838# Builds with -c opt
8839config_setting(
8840 name = "optimized_build",
8841 values = {
8842 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008843 },
8844)
8845
8846config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008847 name = "linux_k8",
8848 values = {"cpu": "k8"},
8849)
8850
8851config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008852 name = "linux_arm",
8853 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008854)
8855
8856config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008857 name = "linux_armeabi",
8858 values = {"cpu": "armeabi"},
8859)
8860
8861config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008862 name = "linux_armhf",
8863 values = {"cpu": "armhf"},
8864)
8865
8866config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008867 name = "linux_armv7a",
8868 values = {"cpu": "armv7a"},
8869)
8870
8871config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008872 name = "linux_aarch64",
8873 values = {"cpu": "aarch64"},
8874)
8875
8876config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008877 name = "android",
8878 values = {"crosstool_top": "//external:android/crosstool"},
8879)
8880
8881config_setting(
8882 name = "android_armv7",
8883 values = {
8884 "crosstool_top": "//external:android/crosstool",
8885 "cpu": "armeabi-v7a",
8886 },
8887)
8888
8889config_setting(
8890 name = "android_arm64",
8891 values = {
8892 "crosstool_top": "//external:android/crosstool",
8893 "cpu": "arm64-v8a",
8894 },
8895)
8896
8897config_setting(
8898 name = "android_x86",
8899 values = {
8900 "crosstool_top": "//external:android/crosstool",
8901 "cpu": "x86",
8902 },
8903)
8904
8905config_setting(
8906 name = "android_x86_64",
8907 values = {
8908 "crosstool_top": "//external:android/crosstool",
8909 "cpu": "x86_64",
8910 },
8911)
8912
8913config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008914 name = "windows_x86_64",
8915 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008916)
8917
8918config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008919 name = "windows_x86_64_clang",
8920 values = {
8921 "compiler": "clang-cl",
8922 "cpu": "x64_windows",
8923 },
8924)
8925
8926config_setting(
8927 name = "windows_x86_64_mingw",
8928 values = {
8929 "compiler": "mingw-gcc",
8930 "cpu": "x64_windows",
8931 },
8932)
8933
8934config_setting(
8935 name = "windows_x86_64_msys",
8936 values = {
8937 "compiler": "msys-gcc",
8938 "cpu": "x64_windows",
8939 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008940)
8941
8942config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008943 name = "macos_x86_64",
8944 values = {
8945 "apple_platform_type": "macos",
8946 "cpu": "darwin",
8947 },
8948)
8949
8950config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008951 name = "macos_arm64",
8952 values = {
8953 "apple_platform_type": "macos",
8954 "cpu": "darwin_arm64",
8955 },
8956)
8957
8958config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008959 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008960 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008961)
8962
8963config_setting(
8964 name = "emscripten_wasm",
8965 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008966 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008967 "cpu": "wasm",
8968 },
8969)
8970
8971config_setting(
8972 name = "emscripten_wasmsimd",
8973 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008974 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008975 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008976 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008977 },
8978)
8979
8980config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008981 name = "ios_armv7",
8982 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008983 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008984 "cpu": "ios_armv7",
8985 },
8986)
8987
8988config_setting(
8989 name = "ios_arm64",
8990 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008991 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008992 "cpu": "ios_arm64",
8993 },
8994)
8995
8996config_setting(
8997 name = "ios_arm64e",
8998 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008999 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009000 "cpu": "ios_arm64e",
9001 },
9002)
9003
9004config_setting(
9005 name = "ios_x86",
9006 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009007 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009008 "cpu": "ios_i386",
9009 },
9010)
9011
9012config_setting(
9013 name = "ios_x86_64",
9014 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009015 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009016 "cpu": "ios_x86_64",
9017 },
9018)
9019
9020config_setting(
9021 name = "watchos_armv7k",
9022 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009023 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009024 "cpu": "watchos_armv7k",
9025 },
9026)
9027
9028config_setting(
9029 name = "watchos_arm64_32",
9030 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009031 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009032 "cpu": "watchos_arm64_32",
9033 },
9034)
9035
9036config_setting(
9037 name = "watchos_x86",
9038 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009039 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009040 "cpu": "watchos_i386",
9041 },
9042)
9043
9044config_setting(
9045 name = "watchos_x86_64",
9046 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009047 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009048 "cpu": "watchos_x86_64",
9049 },
9050)
9051
9052config_setting(
9053 name = "tvos_arm64",
9054 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009055 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009056 "cpu": "tvos_arm64",
9057 },
9058)
9059
9060config_setting(
9061 name = "tvos_x86_64",
9062 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009063 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009064 "cpu": "tvos_x86_64",
9065 },
9066)