blob: a1addda948edf94f66eee556e567752d8ff464dc [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700252 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
474 "src/math/expm1minus-scalar-rr2-p5.c",
475 "src/math/expm1minus-scalar-rr2-p6.c",
Frank Barchard22136062020-11-24 18:44:46 -0800476 "src/math/expminus-scalar-rr2-lut64-p2.c",
477 "src/math/expminus-scalar-rr2-lut2048-p1.c",
478 "src/math/expminus-scalar-rr2-p5.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
483 "src/math/roundne-scalar-nearbyint.c",
484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
489 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700494 "src/params-init.c",
Marat Dukhan57547062021-06-30 16:53:29 -0700495 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
496 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
497 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
498 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
499 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
500 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
501 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
502 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
503 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
504 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
505 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
506 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhand6021542021-06-30 09:04:20 -0700507 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
508 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
509 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
510 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
511 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
512 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
513 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
514 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
515 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
516 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
517 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
518 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
519 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
520 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
521 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
522 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
523 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
524 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
525 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
526 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
527 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
528 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
529 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
530 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
531 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
532 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
533 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
534 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
535 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
536 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
537 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
538 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700539 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
540 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
541 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700542 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
543 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
544 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700545 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
546 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
547 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700548 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
549 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
550 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700551 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
552 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
553 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700554 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
555 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
556 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700557 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
558 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
559 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
560 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
561 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
562 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700563 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
564 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700565 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700566 "src/qs8-gemm/gen/1x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700567 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
568 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700569 "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700570 "src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700571 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
572 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700573 "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700574 "src/qs8-gemm/gen/2x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700575 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
576 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700577 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700578 "src/qs8-gemm/gen/2x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700579 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
580 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700581 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700582 "src/qs8-gemm/gen/3x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700583 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
584 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700585 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700586 "src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700587 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
588 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700589 "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700590 "src/qs8-gemm/gen/4x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700591 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
592 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700593 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700594 "src/qs8-gemm/gen/4x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700595 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
596 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700597 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700598 "src/qs8-igemm/gen/1x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700599 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
600 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700601 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700602 "src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700603 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
604 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700605 "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700606 "src/qs8-igemm/gen/2x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700607 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
608 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700609 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700610 "src/qs8-igemm/gen/2x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700611 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
612 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700613 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700614 "src/qs8-igemm/gen/3x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700615 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
616 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700617 "src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700618 "src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700619 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
620 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700621 "src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700622 "src/qs8-igemm/gen/4x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700623 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
624 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700625 "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700626 "src/qs8-igemm/gen/4x4-minmax-rndnu-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700627 "src/qs8-requantization/fp32-scalar-lrintf.c",
628 "src/qs8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700629 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700630 "src/qs8-requantization/rndna-scalar-signed64.c",
631 "src/qs8-requantization/rndna-scalar-unsigned32.c",
632 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan062bee32021-05-27 20:31:07 -0700633 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700634 "src/qs8-vadd/gen/minmax-scalar-x1.c",
635 "src/qs8-vadd/gen/minmax-scalar-x2.c",
636 "src/qs8-vadd/gen/minmax-scalar-x4.c",
637 "src/qs8-vaddc/gen/minmax-scalar-x1.c",
638 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
639 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700640 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
641 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1f714282021-07-15 15:41:32 -0700642 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
643 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
644 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
645 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
646 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
647 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
648 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
649 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
650 "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
651 "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
652 "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
653 "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700654 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
655 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan927d4742021-07-15 13:42:49 -0700656 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
657 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
658 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
659 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
660 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
661 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
662 "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
663 "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
664 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
665 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
666 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
667 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
668 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
669 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
670 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
671 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan927d4742021-07-15 13:42:49 -0700672 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
673 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
674 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
675 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
676 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
677 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
678 "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
679 "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
680 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
681 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
682 "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
683 "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
684 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
685 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
686 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
687 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700688 "src/qu8-requantization/fp32-scalar-lrintf.c",
689 "src/qu8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700690 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700691 "src/qu8-requantization/rndna-scalar-signed64.c",
692 "src/qu8-requantization/rndna-scalar-unsigned32.c",
693 "src/qu8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -0700694 "src/qu8-vadd/gen/minmax-scalar-x1.c",
695 "src/qu8-vadd/gen/minmax-scalar-x2.c",
696 "src/qu8-vadd/gen/minmax-scalar-x4.c",
697 "src/qu8-vaddc/gen/minmax-scalar-x1.c",
698 "src/qu8-vaddc/gen/minmax-scalar-x2.c",
699 "src/qu8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700700 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700701 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700702 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700703 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700704 "src/x8-lut/scalar.c",
705 "src/x8-zip/x2-scalar.c",
706 "src/x8-zip/x3-scalar.c",
707 "src/x8-zip/x4-scalar.c",
708 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800709 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700710 "src/x32-fill/scalar-float.c",
711 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700712 "src/x32-packx/x2-scalar.c",
713 "src/x32-packx/x3-scalar.c",
714 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700715 "src/x32-pad/scalar-float.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700716 "src/x32-pad/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700717 "src/x32-unpool/scalar.c",
718 "src/x32-zip/x2-scalar.c",
719 "src/x32-zip/x3-scalar.c",
720 "src/x32-zip/x4-scalar.c",
721 "src/x32-zip/xm-scalar.c",
Marat Dukhan048931b2020-11-24 20:53:54 -0800722 "src/xx-copy/memcpy.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700723]
724
Marat Dukhan436ebe62019-12-04 15:10:12 -0800725WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700726 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
727 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700728 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
729 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700730 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
731 "src/f32-dwconv/gen/up1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700732 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
733 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700734 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
735 "src/f32-dwconv/gen/up1x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700736 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
737 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700738 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
739 "src/f32-dwconv/gen/up1x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700740 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
741 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700742 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
743 "src/f32-dwconv/gen/up2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700744 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
745 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700746 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
747 "src/f32-dwconv/gen/up2x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700748 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
749 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700750 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
751 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700752 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
753 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700754 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
755 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
756 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
757 "src/f32-gemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700758 "src/f32-gemm/gen/1x4-relu-wasm.c",
759 "src/f32-gemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700760 "src/f32-gemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700761 "src/f32-gemm/gen/2x4-relu-wasm.c",
762 "src/f32-gemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700763 "src/f32-gemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700764 "src/f32-gemm/gen/4x2-relu-wasm.c",
765 "src/f32-gemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700766 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700767 "src/f32-gemm/gen/4x4-relu-wasm.c",
768 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700769 "src/f32-igemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700770 "src/f32-igemm/gen/1x4-relu-wasm.c",
771 "src/f32-igemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700772 "src/f32-igemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700773 "src/f32-igemm/gen/2x4-relu-wasm.c",
774 "src/f32-igemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700775 "src/f32-igemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700776 "src/f32-igemm/gen/4x2-relu-wasm.c",
777 "src/f32-igemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700778 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700779 "src/f32-igemm/gen/4x4-relu-wasm.c",
780 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700781 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
782 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
783 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700784 "src/f32-prelu/gen/wasm-2x1.c",
785 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700786 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
787 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
788 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700789 "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700790 "src/f32-vbinary/gen/vadd-relu-wasm-x1.c",
791 "src/f32-vbinary/gen/vadd-relu-wasm-x2.c",
792 "src/f32-vbinary/gen/vadd-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700793 "src/f32-vbinary/gen/vadd-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700794 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
795 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
796 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
797 "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700798 "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c",
799 "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c",
800 "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700801 "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700802 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
803 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
804 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
805 "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700806 "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c",
807 "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c",
808 "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700809 "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700810 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
811 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
812 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
813 "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700814 "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c",
815 "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c",
816 "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700817 "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800818 "src/f32-vbinary/gen/vmax-wasm-x1.c",
819 "src/f32-vbinary/gen/vmax-wasm-x2.c",
820 "src/f32-vbinary/gen/vmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700821 "src/f32-vbinary/gen/vmax-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800822 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
823 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
824 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700825 "src/f32-vbinary/gen/vmaxc-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800826 "src/f32-vbinary/gen/vmin-wasm-x1.c",
827 "src/f32-vbinary/gen/vmin-wasm-x2.c",
828 "src/f32-vbinary/gen/vmin-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700829 "src/f32-vbinary/gen/vmin-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800830 "src/f32-vbinary/gen/vminc-wasm-x1.c",
831 "src/f32-vbinary/gen/vminc-wasm-x2.c",
832 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700833 "src/f32-vbinary/gen/vminc-wasm-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700834 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
835 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
836 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700837 "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700838 "src/f32-vbinary/gen/vmul-relu-wasm-x1.c",
839 "src/f32-vbinary/gen/vmul-relu-wasm-x2.c",
840 "src/f32-vbinary/gen/vmul-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700841 "src/f32-vbinary/gen/vmul-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700842 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
843 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
844 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
845 "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700846 "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c",
847 "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c",
848 "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700849 "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700850 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
851 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
852 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
853 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700854 "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c",
855 "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c",
856 "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700857 "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700858 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
859 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
860 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
861 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700862 "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c",
863 "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c",
864 "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700865 "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700866 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
867 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
868 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
869 "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700870 "src/f32-vbinary/gen/vsub-relu-wasm-x1.c",
871 "src/f32-vbinary/gen/vsub-relu-wasm-x2.c",
872 "src/f32-vbinary/gen/vsub-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700873 "src/f32-vbinary/gen/vsub-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700874 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
875 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
876 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
877 "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700878 "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c",
879 "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c",
880 "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700881 "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700882 "src/f32-vclamp/gen/vclamp-wasm-x1.c",
883 "src/f32-vclamp/gen/vclamp-wasm-x2.c",
884 "src/f32-vclamp/gen/vclamp-wasm-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800885 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c",
886 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c",
887 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c",
888 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c",
889 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c",
890 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c",
891 "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c",
892 "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c",
893 "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c",
894 "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c",
895 "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c",
896 "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700897 "src/f32-vhswish/gen/vhswish-wasm-x1.c",
898 "src/f32-vhswish/gen/vhswish-wasm-x2.c",
899 "src/f32-vhswish/gen/vhswish-wasm-x4.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700900 "src/f32-vlrelu/gen/vlrelu-wasm-x1.c",
901 "src/f32-vlrelu/gen/vlrelu-wasm-x2.c",
902 "src/f32-vlrelu/gen/vlrelu-wasm-x4.c",
Frank Barchardd4416d62021-05-17 15:51:37 -0700903 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
904 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
905 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700906 "src/f32-vrelu/gen/vrelu-wasm-x1.c",
907 "src/f32-vrelu/gen/vrelu-wasm-x2.c",
908 "src/f32-vrelu/gen/vrelu-wasm-x4.c",
909 "src/f32-vrelu/gen/vrelu-wasm-x8.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800910]
911
Marat Dukhan290055c2020-06-09 12:24:29 -0700912WASMSIMD_UKERNELS = [
Marat Dukhan40f05522020-07-16 22:33:12 -0700913 "src/f32-argmaxpool/4x-wasmsimd-c4.c",
914 "src/f32-argmaxpool/9p8x-wasmsimd-c4.c",
915 "src/f32-argmaxpool/9x-wasmsimd-c4.c",
Marat Dukhan3b7432d2020-07-16 17:46:32 -0700916 "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c",
917 "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c",
918 "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c",
919 "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard22136062020-11-24 18:44:46 -0800920 "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800921 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700922 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800923 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700924 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700925 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800926 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700927 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800928 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700929 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700930 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800931 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700932 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800933 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700934 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
935 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800936 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700937 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800938 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700939 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700940 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800941 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700942 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800943 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700944 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700945 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800946 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700947 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800948 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700949 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
950 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800951 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
952 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
953 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
954 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
955 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
956 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
957 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
958 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
959 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c",
960 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800961 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
962 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
963 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
964 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c",
965 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
966 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c",
967 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c",
968 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c",
969 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c",
970 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800971 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
972 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
973 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
974 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
975 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
976 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
977 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
978 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
979 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c",
980 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800981 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
982 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
983 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
984 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c",
985 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
986 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c",
987 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c",
988 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c",
989 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c",
990 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c",
Frank Barchardc5704bf2020-12-21 23:09:00 -0800991 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
992 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
993 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
994 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
995 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
996 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
997 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
998 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800999 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1000 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1001 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1002 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c",
1003 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1004 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c",
1005 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c",
1006 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c",
Frank Barchardcadd4222021-01-20 16:27:25 -08001007 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1008 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1009 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1010 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
1011 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1012 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
1013 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
1014 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001015 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1016 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1017 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1018 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c",
1019 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1020 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c",
1021 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c",
1022 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -08001023 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1024 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1025 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1026 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1027 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1028 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1029 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1030 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1031 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1032 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
1033 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c",
1034 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c",
1035 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001036 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1037 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1038 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1039 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1040 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c",
1041 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1042 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1043 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c",
1044 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1045 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c",
1046 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c",
1047 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c",
1048 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -08001049 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1050 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1051 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1052 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1053 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1054 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1055 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1056 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1057 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1058 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
1059 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c",
1060 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c",
1061 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001062 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1063 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1064 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1065 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1066 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c",
1067 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1068 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1069 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c",
1070 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1071 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c",
1072 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c",
1073 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c",
1074 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001075 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1076 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1077 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1078 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1079 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1080 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1081 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1082 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1083 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1084 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001085 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1086 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1087 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1088 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1089 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c",
1090 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1091 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1092 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c",
1093 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1094 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001095 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1096 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1097 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1098 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1099 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1100 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1101 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1102 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1103 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1104 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001105 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1106 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1107 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1108 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1109 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c",
1110 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1111 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1112 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c",
1113 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1114 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001115 "src/f32-gavgpool-cw/wasmsimd-arm-x4.c",
1116 "src/f32-gavgpool-cw/wasmsimd-x86-x4.c",
Marat Dukhanc6016802020-07-16 18:51:28 -07001117 "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c",
1118 "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c",
1119 "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c",
1120 "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001121 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c",
1122 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c",
1123 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c",
1124 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001125 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
1126 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001127 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c",
1128 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c",
1129 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c",
1130 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001131 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
1132 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001133 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c",
1134 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c",
1135 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c",
1136 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001137 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
1138 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001139 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c",
1140 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c",
1141 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c",
1142 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001143 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
1144 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001145 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c",
1146 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c",
1147 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c",
1148 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001149 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
1150 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001151 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1152 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1153 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1154 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001155 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c",
1156 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
1157 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1158 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001159 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1160 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1161 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1162 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001163 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1164 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1165 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1166 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1167 "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c",
1168 "src/f32-gemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001169 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1170 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1171 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1172 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001173 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c",
1174 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
1175 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1176 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001177 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1178 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1179 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1180 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001181 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c",
1182 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
1183 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1184 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001185 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1186 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1187 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1188 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001189 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1190 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
XNNPACK Team965272b2020-10-23 21:10:15 -07001191 "src/f32-ibilinear-chw/gen/wasmsimd-p4.c",
1192 "src/f32-ibilinear-chw/gen/wasmsimd-p8.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001193 "src/f32-ibilinear/gen/wasmsimd-c4.c",
1194 "src/f32-ibilinear/gen/wasmsimd-c8.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001195 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1196 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1197 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1198 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001199 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c",
1200 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
1201 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1202 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001203 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1204 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1205 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1206 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001207 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1208 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1209 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1210 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1211 "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c",
1212 "src/f32-igemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001213 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1214 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1215 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1216 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001217 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c",
1218 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
1219 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1220 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001221 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1222 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1223 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1224 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001225 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c",
1226 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
1227 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1228 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001229 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1230 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1231 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1232 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001233 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1234 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhanf6e24802020-07-08 22:20:40 -07001235 "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c",
1236 "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c",
Marat Dukhan1483c532020-07-16 18:08:19 -07001237 "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c",
1238 "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c",
1239 "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c",
1240 "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001241 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1242 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001243 "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c",
1244 "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c",
1245 "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001246 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
1247 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001248 "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c",
1249 "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c",
1250 "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c",
1251 "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c",
1252 "src/f32-prelu/gen/wasmsimd-minmax-1x4.c",
1253 "src/f32-prelu/gen/wasmsimd-minmax-1x8.c",
1254 "src/f32-prelu/gen/wasmsimd-minmax-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001255 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
1256 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001257 "src/f32-prelu/gen/wasmsimd-minmax-2x16.c",
1258 "src/f32-prelu/gen/wasmsimd-minmax-4x4.c",
1259 "src/f32-prelu/gen/wasmsimd-minmax-4x8.c",
1260 "src/f32-prelu/gen/wasmsimd-minmax-4x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001261 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001262 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001263 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001264 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c",
1265 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001266 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001267 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c",
1268 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001269 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001270 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c",
1271 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001272 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c",
Marat Dukhan8c417962020-07-08 12:27:50 -07001273 "src/f32-rmax/wasmsimd-arm.c",
1274 "src/f32-rmax/wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001275 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c",
1276 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001277 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c",
1278 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001279 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001280 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c",
1281 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001282 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c",
1283 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001284 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001285 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c",
1286 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001287 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c",
1288 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001289 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001290 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c",
1291 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001292 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c",
1293 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001294 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001295 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c",
1296 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001297 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c",
1298 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001299 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001300 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c",
1301 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001302 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c",
1303 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001304 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001305 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c",
1306 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001307 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c",
1308 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001309 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001310 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c",
1311 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001312 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c",
1313 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001314 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001315 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
1316 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001317 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001318 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
1319 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001320 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001321 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c",
1322 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001323 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001324 "src/f32-vbinary/gen/vadd-wasmsimd-x4.c",
1325 "src/f32-vbinary/gen/vadd-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001326 "src/f32-vbinary/gen/vadd-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001327 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
1328 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001329 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001330 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
1331 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001332 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001333 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c",
1334 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001335 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001336 "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c",
1337 "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001338 "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001339 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
1340 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001341 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001342 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
1343 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001344 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001345 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c",
1346 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001347 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001348 "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c",
1349 "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001350 "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001351 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
1352 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001353 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001354 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
1355 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001356 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001357 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c",
1358 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001359 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001360 "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c",
1361 "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001362 "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001363 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
1364 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001365 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001366 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
1367 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001368 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001369 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
1370 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001371 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001372 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
1373 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001374 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001375 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
1376 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001377 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001378 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
1379 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001380 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001381 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
1382 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001383 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001384 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
1385 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001386 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001387 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
1388 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001389 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001390 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
1391 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001392 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001393 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c",
1394 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001395 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001396 "src/f32-vbinary/gen/vmul-wasmsimd-x4.c",
1397 "src/f32-vbinary/gen/vmul-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001398 "src/f32-vbinary/gen/vmul-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001399 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
1400 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001401 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001402 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
1403 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001404 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001405 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c",
1406 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001407 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001408 "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c",
1409 "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001410 "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001411 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
1412 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001413 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001414 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
1415 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001416 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001417 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c",
1418 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001419 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001420 "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c",
1421 "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001422 "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001423 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
1424 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001425 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001426 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
1427 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001428 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001429 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c",
1430 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001431 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001432 "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c",
1433 "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001434 "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001435 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
1436 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001437 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001438 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
1439 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001440 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001441 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
1442 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001443 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001444 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
1445 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001446 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001447 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c",
1448 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001449 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001450 "src/f32-vbinary/gen/vsub-wasmsimd-x4.c",
1451 "src/f32-vbinary/gen/vsub-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001452 "src/f32-vbinary/gen/vsub-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001453 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
1454 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001455 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001456 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
1457 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001458 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001459 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c",
1460 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001461 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001462 "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c",
1463 "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001464 "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001465 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
1466 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c",
1467 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c",
1468 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001469 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
1470 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c",
1471 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c",
1472 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c",
1473 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c",
1474 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001475 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c",
1476 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c",
1477 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c",
1478 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c",
1479 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c",
1480 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08001481 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c",
1482 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c",
1483 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c",
1484 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c",
1485 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c",
1486 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001487 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c",
1488 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c",
1489 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c",
1490 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c",
1491 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c",
1492 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001493 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1494 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1495 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001496 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1497 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1498 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1499 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001500 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001501 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001502 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001503 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001504 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1505 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1506 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001507 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1508 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1509 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1510 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001511 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1512 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
1513 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1514 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1515 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1516 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
1517 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1518 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1519 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1520 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001521 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1522 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1523 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1524 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1525 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1526 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1527 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1528 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1529 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1530 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1531 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1532 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001533 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1534 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001535 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1536 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1537 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1538 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1539 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1540 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001541 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1542 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1543 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1544 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001545 "src/math/roundd-wasmsimd-addsub.c",
1546 "src/math/roundd-wasmsimd-cvt.c",
1547 "src/math/roundne-wasmsimd-addsub.c",
1548 "src/math/roundu-wasmsimd-addsub.c",
1549 "src/math/roundu-wasmsimd-cvt.c",
1550 "src/math/roundz-wasmsimd-addsub.c",
1551 "src/math/roundz-wasmsimd-cvt.c",
1552 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1553 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhan313eef72021-06-30 16:11:31 -07001554 "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001555 "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1556 "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1557 "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1558 "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1559 "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001560 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001561 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001562 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001563 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001564 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001565 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001566 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001567 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001568 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001569 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan47c12202021-06-30 15:09:34 -07001570 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001571 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan69aa6232021-06-30 14:17:26 -07001572 "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1573 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001574 "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1575 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c",
1576 "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1577 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
1578 "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1579 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c",
1580 "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1581 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
1582 "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
1583 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07001584 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
1585 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
1586 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001587 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
1588 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
1589 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001590 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001591 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001592 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001593 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001594 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001595 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001596 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001597 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001598 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001599 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001600 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001601 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001602 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001603 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001604 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001605 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001606 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001607 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001608 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001609 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001610 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001611 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001612 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001613 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001614 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan4741e412021-06-30 13:38:06 -07001615 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
Frank Barchard1663c0c2021-07-01 11:20:06 -07001616 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001617 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001618 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001619 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1620 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
1621 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
1622 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1623 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1624 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1625 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1626 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhanf6011352021-07-15 15:11:14 -07001627 "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
1628 "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
1629 "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
1630 "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
1631 "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
1632 "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan43bee052021-07-14 20:57:18 -07001633 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
1634 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
1635 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
1636 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
1637 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
1638 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
1639 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c",
1640 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c",
1641 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c",
1642 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c",
1643 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c",
1644 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001645 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001646 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07001647 "src/qu8-vadd/gen/minmax-wasmsimd-x8.c",
1648 "src/qu8-vadd/gen/minmax-wasmsimd-x16.c",
1649 "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c",
1650 "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001651 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001652 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001653 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001654 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001655 "src/x32-zip/x2-wasmsimd.c",
1656 "src/x32-zip/x3-wasmsimd.c",
1657 "src/x32-zip/x4-wasmsimd.c",
1658 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001659]
1660
Marat Dukhan08c4a432019-10-03 09:29:21 -07001661# ISA-specific micro-kernels
1662NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001663 "src/f32-argmaxpool/4x-neon-c4.c",
1664 "src/f32-argmaxpool/9p8x-neon-c4.c",
1665 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001666 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1667 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001668 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001669 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001670 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001671 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001672 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001673 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001674 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001675 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001676 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001677 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001679 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001680 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001681 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001682 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1683 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1684 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1685 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1686 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001687 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001688 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001689 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1690 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1691 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001692 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001693 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001694 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1695 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1696 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1697 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1698 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001699 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1700 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1701 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001702 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001703 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001704 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1705 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1706 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001707 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1708 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1709 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1710 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001711 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001712 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1713 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001714 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001715 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001716 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001717 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001718 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1719 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001720 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1721 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1722 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1723 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1724 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1725 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1726 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1727 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001728 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001729 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001730 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001731 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1732 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001733 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001734 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1735 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001736 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001737 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1738 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1739 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1740 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1741 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001742 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1743 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001744 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1745 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001746 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1747 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001748 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1749 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1750 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1751 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1752 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1753 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1754 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1755 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1756 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1757 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1758 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1759 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1760 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1761 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1762 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1763 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001764 "src/f32-ibilinear-chw/gen/neon-p4.c",
1765 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001766 "src/f32-ibilinear/gen/neon-c4.c",
1767 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001768 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001769 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001770 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001771 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1772 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001773 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001774 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1775 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1776 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1777 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001778 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1779 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001780 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1781 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001782 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1783 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001784 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1785 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1786 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001787 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1788 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001789 "src/f32-prelu/gen/neon-1x4.c",
1790 "src/f32-prelu/gen/neon-1x8.c",
1791 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001792 "src/f32-prelu/gen/neon-2x4.c",
1793 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001794 "src/f32-prelu/gen/neon-2x16.c",
1795 "src/f32-prelu/gen/neon-4x4.c",
1796 "src/f32-prelu/gen/neon-4x8.c",
1797 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001798 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001799 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001800 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001801 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1802 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001803 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001804 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1805 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001806 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001807 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1808 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001809 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1810 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1811 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1812 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1813 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1814 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1815 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1816 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1817 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1818 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1819 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1820 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1821 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001822 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001823 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1824 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1825 "src/f32-spmm/gen/4x1-minmax-neon.c",
1826 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1827 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1828 "src/f32-spmm/gen/8x1-minmax-neon.c",
1829 "src/f32-spmm/gen/12x1-minmax-neon.c",
1830 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1831 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1832 "src/f32-spmm/gen/16x1-minmax-neon.c",
1833 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1834 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1835 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001836 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1837 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1838 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1839 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001840 "src/f32-vbinary/gen/vmax-neon-x4.c",
1841 "src/f32-vbinary/gen/vmax-neon-x8.c",
1842 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1843 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1844 "src/f32-vbinary/gen/vmin-neon-x4.c",
1845 "src/f32-vbinary/gen/vmin-neon-x8.c",
1846 "src/f32-vbinary/gen/vminc-neon-x4.c",
1847 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001848 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1849 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1850 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1851 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1852 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1853 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001854 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1855 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1856 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1857 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001858 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1859 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1860 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1861 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001862 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1863 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001864 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1865 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1866 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1867 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1868 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1869 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1870 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1871 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1872 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1873 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1874 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1875 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001876 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1877 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1878 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001879 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1880 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001881 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1882 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001883 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1884 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001885 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1886 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001887 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1888 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1889 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1890 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1891 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1892 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001893 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1894 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1895 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1896 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1897 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1898 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1899 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1900 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1901 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1902 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1903 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1904 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1905 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1906 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1907 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1908 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1909 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1910 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001911 "src/f32-vunary/gen/vabs-neon-x4.c",
1912 "src/f32-vunary/gen/vabs-neon-x8.c",
1913 "src/f32-vunary/gen/vneg-neon-x4.c",
1914 "src/f32-vunary/gen/vneg-neon-x8.c",
1915 "src/f32-vunary/gen/vsqr-neon-x4.c",
1916 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001917 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1918 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001919 "src/math/roundd-neon-addsub.c",
1920 "src/math/roundd-neon-cvt.c",
1921 "src/math/roundne-neon-addsub.c",
1922 "src/math/roundu-neon-addsub.c",
1923 "src/math/roundu-neon-cvt.c",
1924 "src/math/roundz-neon-addsub.c",
1925 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001926 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1927 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1928 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1929 "src/math/sqrt-neon-nr1rsqrts.c",
1930 "src/math/sqrt-neon-nr2rsqrts.c",
1931 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001932 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c",
1933 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001934 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001935 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c",
1936 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001937 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001938 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c",
1939 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c",
1940 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c",
1941 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001942 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001943 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c",
1944 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c",
1945 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c",
1946 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07001947 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
1948 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
1949 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
1950 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
1951 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001952 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001953 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1954 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001955 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001956 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1957 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001958 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001959 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
1960 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07001961 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07001962 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
1963 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001964 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001965 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001966 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c",
1967 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001968 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001969 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001970 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001971 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c",
1972 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001973 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001974 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001975 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001976 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c",
1977 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c",
1978 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c",
1979 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001980 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001981 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001982 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07001983 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c",
1984 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c",
1985 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c",
1986 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07001987 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001988 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001989 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001990 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001991 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001992 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001993 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07001994 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07001995 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001996 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1997 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1998 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1999 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002000 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
2001 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
2002 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
2003 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002004 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2005 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2006 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002007 "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002008 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002009 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2010 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002011 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07002012 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002013 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002014 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002015 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002016 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002017 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002018 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2019 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2020 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002021 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002022 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2023 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002024 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2025 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2026 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2027 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2028 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2029 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2030 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2031 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002032 "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002033 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002034 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2035 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002036 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhan2d3c97c2021-06-25 18:00:28 -07002037 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002038 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002039 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002040 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002041 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2042 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2043 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2044 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002045 "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002046 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2047 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2048 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2049 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2050 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2051 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2052 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2053 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002054 "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002055 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2056 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2057 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2058 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2059 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2060 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2061 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2062 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002063 "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002064 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2065 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2066 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2067 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2068 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2069 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2070 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2071 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002072 "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002073 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2074 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2075 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2076 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2077 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002078 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002079 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2080 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2081 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002082 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002083 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2084 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002085 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2086 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2087 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2088 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2089 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2090 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2091 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2092 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2093 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
2094 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2095 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
2096 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002097 "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002098 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002099 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2100 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002101 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002102 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002103 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002104 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002105 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002106 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002107 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002108 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2109 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
2110 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002111 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002112 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2113 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002114 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2115 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2116 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2117 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
2118 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2119 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2120 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
2121 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002122 "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002123 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002124 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2125 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002126 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c",
Marat Dukhancf055852021-06-26 09:05:09 -07002127 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002128 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002129 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002130 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002131 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2132 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2133 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
2134 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002135 "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002136 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2137 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2138 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2139 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
2140 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2141 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2142 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
2143 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002144 "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002145 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2146 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2147 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2148 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
2149 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
2150 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2151 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
2152 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002153 "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002154 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2155 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2156 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2157 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
2158 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2159 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2160 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
2161 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002162 "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002163 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2164 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2165 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
2166 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
2167 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002168 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002169 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2170 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
2171 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002172 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002173 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2174 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002175 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
2176 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
2177 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
2178 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
2179 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
2180 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2181 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
2182 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
2183 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002184 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002185 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002186 "src/qs8-requantization/rndna-neon.c",
Marat Dukhand3d818c2021-07-16 17:56:54 -07002187 "src/qs8-requantization/rndnu-neon-mull.c",
2188 "src/qs8-requantization/rndnu-neon-qdmulh.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07002189 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
2190 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2191 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
2192 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2193 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
2194 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2195 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
2196 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002197 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2198 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002199 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Marat Dukhan73a899a2021-07-27 00:10:38 -07002200 "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002201 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Marat Dukhan73a899a2021-07-27 00:10:38 -07002202 "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002203 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Marat Dukhan73a899a2021-07-27 00:10:38 -07002204 "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002205 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Marat Dukhan73a899a2021-07-27 00:10:38 -07002206 "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002207 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
2208 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
2209 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
2210 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002211 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2212 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07002213 "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002214 "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07002215 "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
2216 "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002217 "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07002218 "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
2219 "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002220 "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07002221 "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
2222 "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002223 "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07002224 "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002225 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002226 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002227 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07002228 "src/qu8-vadd/gen/minmax-neon-ld64-x8.c",
2229 "src/qu8-vadd/gen/minmax-neon-ld64-x16.c",
2230 "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c",
2231 "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002232 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002233 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002234 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002235 "src/x8-zip/x2-neon.c",
2236 "src/x8-zip/x3-neon.c",
2237 "src/x8-zip/x4-neon.c",
2238 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07002239 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002240 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07002241 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002242 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002243 "src/x32-zip/x2-neon.c",
2244 "src/x32-zip/x3-neon.c",
2245 "src/x32-zip/x4-neon.c",
2246 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002247]
2248
2249NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07002250 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
2251 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
2252 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
2253 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
2254 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
2255 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
2256 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
2257 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
2258 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
2259 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
2260 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
2261 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
2262 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
2263 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
2264 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
2265 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
2266 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
2267 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
2268 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
2269 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
2270 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
2271 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
2272 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
2273 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
2274 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2275 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
2276 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2277 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
2278 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
2279 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002280 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
2281 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002282 "src/f32-ibilinear/gen/neonfma-c4.c",
2283 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002284 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002285 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002286 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002287 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
2288 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002289 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
2290 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002291 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
2292 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002293 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
2294 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002295 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002296 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002297 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002298 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
2299 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002300 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002301 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
2302 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002303 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002304 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
2305 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002306 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
2307 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
2308 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
2309 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
2310 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
2311 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
2312 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
2313 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
2314 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
2315 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
2316 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
2317 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
2318 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08002319 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
2320 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
2321 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
2322 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
2323 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
2324 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
2325 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
2326 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
2327 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
2328 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
2329 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
2330 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
2331 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002332 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2333 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2334 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2335 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2336 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2337 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2338 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2339 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2340 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2341 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2342 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2343 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002344 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2345 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002346 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2347 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2348 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2349 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2350 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2351 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2352 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2353 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2354 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2355 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2356 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2357 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2358 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2359 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2360 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2361 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2362 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2363 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2364 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2365 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2366 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2367 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2368 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2369 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2370 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2371 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2372 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2373 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2374 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2375 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2376 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2377 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2378 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2379 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2380 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2381 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2382 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2383 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2384 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2385 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2386 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2387 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2388 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2389 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2390 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2391 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2392 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2393 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2394 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2395 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2396 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2397 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2398 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2399 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002400 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2401 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2402 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2403 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2404 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2405 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2406 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2407 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2408 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2409 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2410 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2411 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2412 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2413 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2414 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2415 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2416 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2417 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2418 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2419 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002420 "src/math/exp-neonfma-rr2-lut64-p2.c",
2421 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002422 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2423 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002424 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2425 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2426 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002427 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2428 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2429 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002430 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2431 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2432 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002433 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2434 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2435 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002436 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2437 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2438 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002439 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2440 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2441 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002442 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2443 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2444 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002445 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002446 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002447 "src/math/sqrt-neonfma-nr2fma.c",
2448 "src/math/sqrt-neonfma-nr2fma1adj.c",
2449 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002450]
2451
2452AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002453 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002454 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002455 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002456 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002457 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002458 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002459 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002460 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002461 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002462 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2463 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
2464 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002465 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002466 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002467 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
2468 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
2469 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
2470 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2471 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002472 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2473 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2474 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002475 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002476 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002477 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2478 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2479 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002480 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2481 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2482 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2483 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002484 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002485 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2486 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002487 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002488 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002489 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002490 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002491 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2492 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002493 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2494 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2495 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2496 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2497 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2498 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2499 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2500 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002501 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002502 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002503 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2504 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2505 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2506 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2507 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2508 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2509 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2510 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2511 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2512 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2513 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2514 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2515 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2516 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2517 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2518 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2519 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2520 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2521 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2522 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002523 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2524 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002525 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2526 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002527 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2528 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002529 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2530 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002531 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2532 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002533 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2534 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2535 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2536 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2537 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2538 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002539 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2540 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2541 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2542 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2543 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2544 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2545 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2546 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2547 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2548 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2549 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2550 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2551 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2552 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2553 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2554 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2555 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2556 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002557 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2558 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002559 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002560 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002561 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002562 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002563 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002564 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002565]
2566
Marat Dukhan8853b822020-05-07 12:19:01 -07002567NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002568 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2569 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002570 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2571 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2572 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2573 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2574 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2575 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002576 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002577 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002578 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002579 "src/math/roundz-neonv8.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002580 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c",
2581 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002582 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002583 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c",
2584 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002585 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002586 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c",
2587 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c",
2588 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c",
2589 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002590 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002591 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c",
2592 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c",
2593 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c",
2594 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002595 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2596 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2597 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2598 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2599 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002600 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002601 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2602 "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002603 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002604 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2605 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002606 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002607 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2608 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002609 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002610 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2611 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002612 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2613 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2614 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2615 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2616 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2617 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2618 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2619 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002620 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002621 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2622 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002623 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002624 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2625 "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002626 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002627 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c",
2628 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan14f325e2021-06-30 18:46:25 -07002629 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002630 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c",
2631 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07002632 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
2633 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
2634 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
2635 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
2636 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
2637 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
2638 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
2639 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07002640 "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2641 "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
2642 "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
2643 "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002644]
2645
Marat Dukhan08c4a432019-10-03 09:29:21 -07002646AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchard5a599a62020-06-04 20:12:44 -07002647 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
2648 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
2649 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2650 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002651 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2652 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2653 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2654 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2655 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2656 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2657 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2658 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002659 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2660 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002661 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
2662 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
2663 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2664 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2665 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2666 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
2667 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2668 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2669 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2670 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2671 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2672 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2673 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2674 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2675 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2676 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002677 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2678 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2679 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2680 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2681 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2682 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2683 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2684 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002685 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002686 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002687 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002688 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002689 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002690 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002691 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002692 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002693 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002694 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2695 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2696 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2697 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2698 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2699 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2700 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2701 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2702 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2703 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2704 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2705 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2706 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2707 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2708 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2709 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2710 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2711 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2712 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2713 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2714 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2715 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2716 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2717 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2718 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2719 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2720 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2721 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2722 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002723 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2724 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002725 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2726 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002727 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2728 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002729 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2730 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002731]
2732
Benoit Jacoba9644732020-08-13 12:48:55 -07002733NEONDOT_UKERNELS = [
Marat Dukhane76478b2021-06-28 16:35:40 -07002734 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2735 "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2736 "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2737 "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2738 "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2739 "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2740 "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2741 "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2742 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2743 "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2744 "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2745 "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2746 "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2747 "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2748 "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2749 "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002750 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2751 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002752 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002753 "src/qs8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
2754 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002755 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002756 "src/qs8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2757 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002758 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002759 "src/qs8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
2760 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002761 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002762 "src/qs8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2763 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002764 "src/qs8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
2765 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002766 "src/qs8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2767 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002768 "src/qs8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
2769 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002770 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2771 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002772 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002773 "src/qs8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
2774 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002775 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002776 "src/qs8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2777 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002778 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002779 "src/qs8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
2780 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07002781 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002782 "src/qs8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2783 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002784 "src/qs8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
2785 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002786 "src/qs8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2787 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002788 "src/qs8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
2789 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002790]
2791
Marat Dukhan08c4a432019-10-03 09:29:21 -07002792SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -07002793 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
2794 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07002795 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
2796 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002797 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
2798 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
2799 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
2800 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002801 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2802 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002803 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2804 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2805 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2806 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002807 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2808 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002809 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2810 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2811 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002812 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002813 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002814 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2815 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2816 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2817 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2818 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002819 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2820 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2821 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002822 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002823 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002824 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2825 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2826 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002827 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2828 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2829 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2830 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2831 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2832 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2833 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2834 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2835 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2836 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2837 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2838 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2839 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002840 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2841 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2842 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2843 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2844 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2845 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2846 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2847 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002848 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002849 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002850 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002851 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2852 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002853 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2854 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2855 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002856 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2857 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2858 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002859 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2860 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2861 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002862 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2863 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2864 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002865 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2866 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2867 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002868 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2869 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2870 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002871 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2872 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2873 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2874 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002875 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2876 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2877 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002878 "src/f32-ibilinear-chw/gen/sse-p4.c",
2879 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002880 "src/f32-ibilinear/gen/sse-c4.c",
2881 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002882 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2883 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2884 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002885 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2886 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2887 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002888 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2889 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2890 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2891 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002892 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2893 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2894 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002895 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2896 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2897 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002898 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002899 "src/f32-prelu/gen/sse-2x4.c",
2900 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002901 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002902 "src/f32-spmm/gen/4x1-minmax-sse.c",
2903 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002904 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002905 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002906 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2907 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2908 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2909 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2910 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2911 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2912 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2913 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002914 "src/f32-vbinary/gen/vmax-sse-x4.c",
2915 "src/f32-vbinary/gen/vmax-sse-x8.c",
2916 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2917 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2918 "src/f32-vbinary/gen/vmin-sse-x4.c",
2919 "src/f32-vbinary/gen/vmin-sse-x8.c",
2920 "src/f32-vbinary/gen/vminc-sse-x4.c",
2921 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002922 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2923 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2924 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2925 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2926 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2927 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2928 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2929 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002930 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2931 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2932 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2933 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002934 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2935 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2936 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2937 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002938 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2939 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002940 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2941 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002942 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2943 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002944 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2945 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002946 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2947 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002948 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2949 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002950 "src/f32-vunary/gen/vabs-sse-x4.c",
2951 "src/f32-vunary/gen/vabs-sse-x8.c",
2952 "src/f32-vunary/gen/vneg-sse-x4.c",
2953 "src/f32-vunary/gen/vneg-sse-x8.c",
2954 "src/f32-vunary/gen/vsqr-sse-x4.c",
2955 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002956 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002957 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002958 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002959 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002960 "src/math/sqrt-sse-hh1mac.c",
2961 "src/math/sqrt-sse-nr1mac.c",
2962 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002963 "src/x32-fill/sse.c",
2964 "src/x32-packx/x4-sse.c",
2965 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002966]
2967
2968SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002969 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002970 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002971 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002972 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2973 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2974 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2975 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2976 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2977 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2978 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2979 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2980 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2981 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2982 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2983 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002984 "src/f32-prelu/gen/sse2-2x4.c",
2985 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002986 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002987 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002988 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002989 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2990 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002991 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002992 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2993 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002994 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002995 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2996 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002997 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002998 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2999 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
3000 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
3001 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
3002 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
3003 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
3004 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
3005 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
3006 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
3007 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
3008 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
3009 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003010 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
3011 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003012 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
3013 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003014 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
3015 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
3016 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
3017 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
3018 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
3019 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003020 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
3021 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
3022 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
3023 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
3024 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
3025 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
3026 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
3027 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
3028 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
3029 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
3030 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
3031 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003032 "src/math/exp-sse2-rr2-lut64-p2.c",
3033 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003034 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08003035 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08003036 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003037 "src/math/roundd-sse2-cvt.c",
3038 "src/math/roundne-sse2-cvt.c",
3039 "src/math/roundu-sse2-cvt.c",
3040 "src/math/roundz-sse2-cvt.c",
3041 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
3042 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
3043 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
3044 "src/math/sigmoid-sse2-rr2-p5-div.c",
3045 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
3046 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003047 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003048 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003049 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003050 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003051 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003052 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003053 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003054 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003055 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
3056 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003057 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003058 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003059 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003060 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003061 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003062 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003063 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003064 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003065 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003066 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003067 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003068 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003069 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003070 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003071 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003072 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003073 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003074 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003075 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003076 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003077 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003078 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003079 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003080 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003081 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003082 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003083 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003084 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003085 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003086 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003087 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003088 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003089 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003090 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
3091 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003092 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003093 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
3094 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003095 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003096 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
3097 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
3098 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
3099 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
3100 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003101 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
3102 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
3103 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003104 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
3105 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
3106 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003107 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003108 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003109 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003110 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003111 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003112 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003113 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003114 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003115 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003116 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003117 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003118 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003119 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003120 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003121 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003122 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003123 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003124 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003125 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003126 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003127 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003128 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003129 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003130 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003131 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003132 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003133 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003134 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003135 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003136 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003137 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003138 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003139 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003140 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003141 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003142 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003143 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003144 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003145 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07003146 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003147 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003148 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003149 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
3150 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
3151 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
3152 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003153 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
3154 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
3155 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
3156 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003157 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
3158 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003159 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
3160 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
3161 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
3162 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003163 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
3164 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003165 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
3166 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
3167 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
3168 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
3169 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
3170 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
3171 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
3172 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003173 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003174 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
3175 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
3176 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
3177 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
3178 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
3179 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003180 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003181 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
3182 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
3183 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
3184 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
3185 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
3186 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
3187 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
3188 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003189 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003190 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
3191 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
3192 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
3193 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
3194 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
3195 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003196 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07003197 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003198 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003199 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07003200 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
3201 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
3202 "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
3203 "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07003204 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003205 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003206 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003207 "src/x8-zip/x2-sse2.c",
3208 "src/x8-zip/x3-sse2.c",
3209 "src/x8-zip/x4-sse2.c",
3210 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07003211 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003212 "src/x32-zip/x2-sse2.c",
3213 "src/x32-zip/x3-sse2.c",
3214 "src/x32-zip/x4-sse2.c",
3215 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07003216]
3217
3218SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07003219 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
3220 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c",
3221 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07003222 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003223 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07003224 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
3225 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c",
3226 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c",
3227 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
3228 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003229 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003230 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c",
3231 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
3232 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
3233 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
3234 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003235 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
3236 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
3237 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003238 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
3239 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c",
3240 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003241 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003242 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003243 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003244 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003245 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003246 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003247 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003248 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003249 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003250 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003251 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003252 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003253 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003254 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003255 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003256 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003257 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003258 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003259 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003260 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003261 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003262 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003263 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003264 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003265 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003266 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3267 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
3268 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
3269 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003270 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003271 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003272]
3273
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003274SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08003275 "src/f32-prelu/gen/sse41-2x4.c",
3276 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003277 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
3278 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
3279 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
3280 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
3281 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
3282 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
3283 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
3284 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
3285 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
3286 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
3287 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
3288 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003289 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
3290 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003291 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
3292 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003293 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
3294 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
3295 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
3296 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
3297 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
3298 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003299 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
3300 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
3301 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
3302 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
3303 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
3304 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
3305 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
3306 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
3307 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
3308 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
3309 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
3310 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003311 "src/math/roundd-sse41.c",
3312 "src/math/roundne-sse41.c",
3313 "src/math/roundu-sse41.c",
3314 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003315 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003316 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003317 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3318 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003319 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003320 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3321 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003322 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003323 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3324 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003325 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003326 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3327 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3328 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3329 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3330 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003331 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003332 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003333 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003334 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003335 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003336 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003337 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003338 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003339 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003340 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003341 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003342 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003343 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003344 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003345 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003346 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003347 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003348 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003349 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003350 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003351 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003352 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003353 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003354 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003355 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003356 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003357 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003358 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003359 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003360 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003361 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
3362 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
3363 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003364 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003365 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003366 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
3367 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
3368 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
3369 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003370 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003371 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
3372 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
3373 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
3374 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003375 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003376 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
3377 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
3378 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
3379 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
3380 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
3381 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
3382 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
3383 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
3384 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
3385 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
3386 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07003387 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
3388 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
3389 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003390 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
3391 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
3392 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003393 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003394 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003395 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003396 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003397 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003398 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003399 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003400 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003401 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003402 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003403 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003404 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003405 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003406 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003407 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003408 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003409 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003410 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003411 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003412 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003413 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003414 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003415 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003416 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003417 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003418 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003419 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003420 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003421 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003422 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003423 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003424 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003425 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003426 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003427 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003428 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003429 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003430 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003431 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003432 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003433 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003434 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003435 "src/qs8-requantization/rndnu-sse4-sra.c",
3436 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003437 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3438 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3439 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3440 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003441 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3442 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3443 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3444 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003445 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3446 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3447 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3448 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003449 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3450 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3451 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3452 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003453 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003454 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003455 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003456 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003457 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003458 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003459 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003460 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003461 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3462 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3463 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3464 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3465 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3466 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3467 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3468 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003469 "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003470 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3471 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3472 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3473 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3474 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3475 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003476 "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003477 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
3478 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
3479 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
3480 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
3481 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
3482 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
3483 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
3484 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003485 "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003486 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
3487 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3488 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
3489 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3490 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
3491 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancdbe9a32021-07-01 23:52:04 -07003492 "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003493 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003494 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003495 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3496 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3497 "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3498 "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3499 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3500 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3501 "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3502 "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003503]
3504
Marat Dukhan08c4a432019-10-03 09:29:21 -07003505AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003506 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3507 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003508 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3509 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003510 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3511 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003512 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3513 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3514 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3515 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3516 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3517 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003518 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003519 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3520 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003521 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003522 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003523 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003524 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003525 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3526 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3527 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3528 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3529 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3530 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3531 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3532 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3533 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3534 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3535 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003536 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003537 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3538 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003539 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003540 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003541 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003542 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003543 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3544 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003545 "src/f32-prelu/gen/avx-2x8.c",
3546 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003547 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003548 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3549 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3550 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3551 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3552 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3553 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3554 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3555 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003556 "src/f32-vbinary/gen/vmax-avx-x8.c",
3557 "src/f32-vbinary/gen/vmax-avx-x16.c",
3558 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3559 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3560 "src/f32-vbinary/gen/vmin-avx-x8.c",
3561 "src/f32-vbinary/gen/vmin-avx-x16.c",
3562 "src/f32-vbinary/gen/vminc-avx-x8.c",
3563 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003564 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3565 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3566 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3567 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3568 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3569 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3570 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3571 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003572 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3573 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3574 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3575 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003576 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3577 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3578 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3579 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003580 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3581 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003582 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3583 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3584 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3585 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3586 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3587 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3588 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3589 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3590 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3591 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3592 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3593 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3594 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3595 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3596 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3597 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3598 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3599 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003600 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3601 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003602 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3603 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003604 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3605 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003606 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3607 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003608 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3609 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3610 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3611 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3612 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3613 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003614 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003615 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3616 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3617 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3618 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3619 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3620 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3621 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3622 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3623 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3624 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3625 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3626 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3627 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3628 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3629 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3630 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3631 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3632 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3633 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3634 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003635 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3636 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003637 "src/f32-vunary/gen/vabs-avx-x8.c",
3638 "src/f32-vunary/gen/vabs-avx-x16.c",
3639 "src/f32-vunary/gen/vneg-avx-x8.c",
3640 "src/f32-vunary/gen/vneg-avx-x16.c",
3641 "src/f32-vunary/gen/vsqr-avx-x8.c",
3642 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003643 "src/math/exp-avx-rr2-p5.c",
3644 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3645 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3646 "src/math/expm1minus-avx-rr2-p6.c",
3647 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3648 "src/math/sigmoid-avx-rr2-p5-div.c",
3649 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3650 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003651 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003652 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003653 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3654 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003655 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003656 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3657 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003658 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003659 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3660 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003661 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003662 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3663 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3664 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3665 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3666 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003667 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003668 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003669 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003670 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003671 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003672 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003673 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003674 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003675 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003676 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003677 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003678 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003679 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003680 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003681 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003682 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003683 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003684 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003685 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003686 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003687 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003688 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003689 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003690 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003691 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003692 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003693 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003694 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003695 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003696 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003697 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3698 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3699 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003700 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003701 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003702 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3703 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3704 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3705 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003706 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003707 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3708 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3709 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3710 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003711 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003712 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3713 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3714 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3715 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3716 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3717 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3718 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3719 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3720 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3721 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3722 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003723 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003724 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003725 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003726 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003727 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003728 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003729 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003730 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003731 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003732 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003733 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003734 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003735 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003736 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003737 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003738 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003739 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003740 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003741 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003742 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003743 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003744 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003745 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003746 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003747 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003748 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003749 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003750 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003751 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003752 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003753 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003754 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003755 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003756 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003757 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003758 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3759 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3760 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3761 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3762 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3763 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3764 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3765 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3766 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3767 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3768 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3769 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3770 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3771 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3772 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3773 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003774 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003775 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003776 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003777 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003778 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003779 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07003780 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003781 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003782 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3783 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3784 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3785 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3786 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3787 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3788 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3789 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3790 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3791 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3792 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3793 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3794 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3795 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3796 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3797 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3798 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3799 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3800 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3801 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3802 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3803 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3804 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3805 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3806 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3807 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3808 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3809 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003810 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3811 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3812 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3813 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3814 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3815 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3816 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3817 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003818]
3819
Marat Dukhan1566fee2020-08-02 21:55:41 -07003820XOP_UKERNELS = [
Marat Dukhan09668562021-07-26 16:52:20 -07003821 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003822 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003823 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003824 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003825 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003826 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003827 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003828 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3829 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3830 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003831 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003832 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003833 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003834 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003835 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003836 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003837 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003838 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003839 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003840 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003841 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003842 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003843 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003844 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003845 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003846 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003847 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003848 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003849 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003850 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003851 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003852 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003853 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003854 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003855 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003856 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003857 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003858 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003859 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003860 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3861 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003862 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003863 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3864 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003865 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003866 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3867 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07003868 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003869 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3870 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3871 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3872 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3873 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3874 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003875 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003876 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003877 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003878 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003879 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003880 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003881 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003882 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003883 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003884 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003885 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003886 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003887 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003888 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003889 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003890 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003891 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003892 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003893 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003894 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003895 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003896 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003897 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003898 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003899 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003900 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003901 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003902 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003903 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003904 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003905 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003906 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003907 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003908 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003909 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003910 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3911 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3912 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3913 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3914 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3915 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3916 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3917 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07003918 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3919 "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3920 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3921 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07003922 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3923 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3924 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3925 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3926 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3927 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3928 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3929 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3930 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3931 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3932 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3933 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3934 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3935 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3936 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3937 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3938 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3939 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3940 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3941 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3942 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3943 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3944 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3945 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3946 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3947 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3948 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3949 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07003950 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3951 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3952 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3953 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003954]
3955
Marat Dukhanfda12b82019-11-21 12:27:59 -08003956FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003957 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
3958 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003959 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3960 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003961 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3962 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003963 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
3964 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
3965 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
3966 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
3967 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3968 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003969 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003970 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3971 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3972 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3973 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003974 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003975 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
3976 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003977 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003978 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
3979 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003980 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3981 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3982 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003983 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3984 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3985 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3986 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3987 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3988 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3989 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3990 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3991 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3992 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3993 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3994 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3995 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3996 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003997 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003998 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3999 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
4000 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
4001 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004002 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004003 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
4004 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004005 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004006 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
4007 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004008 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
4009 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
4010 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004011 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
4012 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004013 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
4014 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
4015 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
4016 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
4017 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
4018 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
4019 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
4020 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004021 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004022 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004023 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004024]
4025
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004026AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004027 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
4028 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004029 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004030 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004031 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004032 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
4033 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004034 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004035 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
4036 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
4037 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004038 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004039 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
4040 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004041 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004042 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004043 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004044 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
4045 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004046 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004047 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
4048 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
4049 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004050 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004051 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
4052 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004053 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004054 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004055 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004056 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
4057 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004058 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004059 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
4060 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
4061 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004062 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004063 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
4064 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
4065 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
4066 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
4067 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
4068 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
4069 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
4070 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
4071 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
4072 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
4073 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
4074 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
4075 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
4076 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
4077 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
4078 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
4079 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
4080 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
4081 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
4082 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
4083 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
4084 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
4085 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
4086 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
4087 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
4088 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
4089 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
4090 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
4091 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
4092 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
4093 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
4094 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
4095 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
4096 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
4097 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
4098 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
4099 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
4100 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
4101 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
4102 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004103 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
4104 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
4105 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
4106 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
4107 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
4108 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
4109 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
4110 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
4111 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
4112 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
4113 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
4114 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
4115 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
4116 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
4117 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
4118 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
4119 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
4120 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
4121 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
4122 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
4123 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
4124 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
4125 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
4126 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004127 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
4128 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
4129 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
4130 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
4131 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
4132 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
4133 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
4134 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
4135 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
4136 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
4137 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
4138 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
4139 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
4140 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
4141 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
4142 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
4143 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
4144 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
4145 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
4146 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
4147 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
4148 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
4149 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
4150 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
4151 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
4152 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
4153 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
4154 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
4155 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
4156 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004157 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
4158 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
4159 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004160 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
4161 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
4162 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
4163 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08004164 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004165 "src/math/extexp-avx2-p5.c",
4166 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
4167 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
4168 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
4169 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
4170 "src/math/sigmoid-avx2-rr1-p5-div.c",
4171 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
4172 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
4173 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
4174 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
4175 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
4176 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
4177 "src/math/sigmoid-avx2-rr2-p5-div.c",
4178 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
4179 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07004180 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4181 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4182 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
4183 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4184 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
4185 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4186 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
4187 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
4188 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
4189 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4190 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
4191 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004192 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4193 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
4194 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4195 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
4196 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4197 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07004198 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4199 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4200 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004201 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004202 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004203 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004204 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004205 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004206 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004207 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
4208 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004209 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004210 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004211 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
4212 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004213 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004214 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004215 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004216 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004217 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004218 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004219 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
4220 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004221 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004222 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004223 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
4224 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004225 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004226 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004227 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004228 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004229 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004230 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004231 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004232 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004233 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004234 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07004235 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004236 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004237 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004238 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004239 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004240 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07004241 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004242 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07004243 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4244 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4245 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
4246 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
4247 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4248 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
4249 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
4250 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07004251 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
4252 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
4253 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
4254 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
4255 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
4256 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07004257 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
4258 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
4259 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
4260 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
4261 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
4262 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07004263 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
4264 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
4265 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
4266 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004267]
4268
Marat Dukhan08c4a432019-10-03 09:29:21 -07004269AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07004270 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
4271 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004272 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
4273 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004274 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
4275 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004276 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
4277 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
4278 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
4279 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
4280 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
4281 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004282 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
4283 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
4284 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
4285 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
4286 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
4287 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004288 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
4289 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
4290 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
4291 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
4292 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
4293 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004294 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
4295 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
4296 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
4297 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
4298 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
4299 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07004300 "src/f32-prelu/gen/avx512f-2x16.c",
4301 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004302 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4303 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004304 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004305 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004306 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004307 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4308 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004309 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004310 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4311 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4312 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004313 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004314 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
4315 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004316 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004317 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004318 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004319 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
4320 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004321 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004322 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
4323 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
4324 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004325 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004326 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
4327 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004328 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004329 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004330 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004331 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
4332 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004333 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004334 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
4335 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
4336 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004337 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004338 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004339 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
4340 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
4341 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
4342 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
4343 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
4344 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
4345 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
4346 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08004347 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
4348 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
4349 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
4350 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
4351 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
4352 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
4353 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
4354 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004355 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
4356 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
4357 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
4358 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
4359 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
4360 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
4361 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
4362 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004363 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
4364 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
4365 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
4366 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004367 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
4368 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
4369 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
4370 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004371 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
4372 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004373 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
4374 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
4375 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
4376 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
4377 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
4378 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
4379 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
4380 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
4381 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
4382 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
4383 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
4384 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
4385 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
4386 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
4387 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
4388 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004389 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
4390 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004391 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
4392 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004393 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
4394 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004395 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
4396 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
4397 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
4398 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
4399 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
4400 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
4401 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
4402 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07004403 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08004404 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
4405 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
4406 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
4407 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
4408 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
4409 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
4410 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
4411 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
4412 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
4413 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
4414 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
4415 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
4416 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
4417 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
4418 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
4419 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
4420 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
4421 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
4422 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
4423 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
4424 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
4425 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
4426 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
4427 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004428 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
4429 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
4430 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
4431 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
4432 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
4433 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
4434 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
4435 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
4436 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
4437 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
4438 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
4439 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
4440 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
4441 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
4442 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
4443 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
4444 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
4445 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
4446 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
4447 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
4448 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
4449 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
4450 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
4451 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
4452 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
4453 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
4454 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
4455 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
4456 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
4457 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
4458 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
4459 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
4460 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
4461 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
4462 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
4463 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
4464 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
4465 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
4466 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
4467 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
4468 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
4469 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
4470 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
4471 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
4472 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
4473 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
4474 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
4475 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004476 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
4477 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
4478 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
4479 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
4480 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
4481 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
4482 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
4483 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004484 "src/f32-vunary/gen/vabs-avx512f-x16.c",
4485 "src/f32-vunary/gen/vabs-avx512f-x32.c",
4486 "src/f32-vunary/gen/vneg-avx512f-x16.c",
4487 "src/f32-vunary/gen/vneg-avx512f-x32.c",
4488 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
4489 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004490 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
4491 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
4492 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
4493 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
4494 "src/math/exp-avx512f-rr2-p5-scalef.c",
4495 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004496 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
4497 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07004498 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004499 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004500 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004501 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004502 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07004503 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004504 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004505 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004506 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004507 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4508 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4509 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4510 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4511 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4512 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4513 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4514 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4515 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4516 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004517 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004518 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004519 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
4520 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4521 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4522 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004523 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004524 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004525 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004526]
4527
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004528AVX512SKX_UKERNELS = [
Marat Dukhan98042f22021-06-15 00:43:13 -07004529 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4530 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4531 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4532 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07004533 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4534 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4535 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4536 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4537 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4538 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4539 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4540 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004541 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004542 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004543 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004544 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004545 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004546 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004547 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004548 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004549 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004550 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004551 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004552 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004553 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004554 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004555 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004556 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004557 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004558 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004559 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004560 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004561 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004562 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004563 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004564 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhane76049a2021-07-22 14:48:59 -07004565 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
4566 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c",
4567 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
4568 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c",
Marat Dukhancfd606b2021-07-09 01:18:45 -07004569 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
4570 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
4571 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
4572 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07004573 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4574 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4575 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4576 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
4577 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
4578 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
4579 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
4580 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhane76049a2021-07-22 14:48:59 -07004581 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
4582 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c",
4583 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
4584 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004585]
4586
Frank Barchardbcedc082020-08-17 18:00:51 -07004587WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004588 "src/f32-vrelu/wasm_shr_x1.S",
4589 "src/f32-vrelu/wasm_shr_x2.S",
4590 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004591]
4592
Marat Dukhan08c4a432019-10-03 09:29:21 -07004593AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004594 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004595 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004596 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4597 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004598 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004599 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004600 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004601 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004602 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4603 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004604 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4605 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4606 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4607 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004608]
4609
4610AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004611 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004612 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004613 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004614 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004615 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004616 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004617 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004618 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
4619 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004620 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
4621 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
4622 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
4623 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
4624 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07004625 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07004626 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07004627 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
4628 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004629 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
4630 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004631 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004632 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004633 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004634 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004635 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004636 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4637 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004638 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004639 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004640 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004641 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004642 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004643 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004644 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004645 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4646 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004647 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004648 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004649 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004650 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004651 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004652 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004653 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
4654 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004655 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004656 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
4657 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4658 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004659 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4660 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
4661 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004662 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004663 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004664 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004665 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004666 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4667 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004668 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4669 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
4670 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
4671 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004672 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004673 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004674 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004675 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4676 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004677 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4678 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4679 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4680 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004681 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004682 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004683 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004684 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004685 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004686 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4687 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4688 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4689 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004690 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004691 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004692 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004693 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4694 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4695 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4696 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004697 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4698 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004699 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4700 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4701 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4702 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4703 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004704 "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004705 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4706 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4707 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4708 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4709 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4710 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004711 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4712 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4713 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4714 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4715 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4716 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4717 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4718 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004719 "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004720 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4721 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
4722 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4723 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4724 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004725 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4726 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4727 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4728 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004729 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4730 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4731 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4732 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004733 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4734 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4735 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4736 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004737 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4738 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004739 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4740 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004741 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S",
4742 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004743 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4744 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4745 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4746 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
4747 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004748 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4749 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4750 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4751 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004752 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004753 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4754 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4755 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4756 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
4757 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004758 "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004759 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004760 "src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004761 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4762 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004763 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4764 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004765 "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
4766 "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004767 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4768 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
4769 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4770 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004771 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4772 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4773 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004774 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004775 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4776 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S",
4777 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004778 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004779 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4780 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4781 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4782 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004783 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4784 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4785 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4786 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004787 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4788 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4789 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4790 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard960ae342021-07-01 11:31:11 -07004791 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S",
4792 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4793 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S",
4794 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004795 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4796 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4797 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4798 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004799 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S",
4800 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4801 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S",
4802 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard1663c0c2021-07-01 11:20:06 -07004803 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004804 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004805 "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07004806 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
4807 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07004808 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4809 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004810 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
4811 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07004812 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
4813 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
4814 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004815 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4816 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004817 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07004818 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
4819 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07004820 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004821]
4822
Marat Dukhan1b354632020-03-23 12:50:22 -07004823INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004824 "src/xnnpack/argmaxpool.h",
4825 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004826 "src/xnnpack/common.h",
4827 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004828 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004829 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004830 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004831 "src/xnnpack/gavgpool.h",
4832 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004833 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004834 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004835 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004836 "src/xnnpack/lut.h",
4837 "src/xnnpack/math.h",
4838 "src/xnnpack/maxpool.h",
4839 "src/xnnpack/packx.h",
4840 "src/xnnpack/pad.h",
4841 "src/xnnpack/params.h",
4842 "src/xnnpack/pavgpool.h",
4843 "src/xnnpack/ppmm.h",
4844 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004845 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004846 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004847 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004848 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004849 "src/xnnpack/spmm.h",
4850 "src/xnnpack/unpool.h",
4851 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004852 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004853 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004854 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004855 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004856 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004857 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004858 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004859]
4860
4861INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004862 "include/xnnpack.h",
4863 "src/xnnpack/allocator.h",
4864 "src/xnnpack/compute.h",
4865 "src/xnnpack/im2col.h",
4866 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004867 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004868 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004869 "src/xnnpack/operator.h",
4870 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004871 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004872 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004873 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004874 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004875]
4876
Marat Dukhan1b354632020-03-23 12:50:22 -07004877ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004878 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004879]
4880
Marat Dukhan1b354632020-03-23 12:50:22 -07004881MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004882 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004883 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004884]
4885
Marat Dukhan1b354632020-03-23 12:50:22 -07004886MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004887 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004888 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004889 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004890 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004891]
4892
4893OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004894 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004895 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004896]
4897
4898WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004899 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004900 "src/xnnpack/operator.h",
4901 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004902]
4903
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004904LOGGING_COPTS = select({
4905 # No logging in optimized mode
4906 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4907 # Full logging in debug mode
4908 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4909 # Error-only logging in default (fastbuild) mode
4910 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4911})
4912
Marat Dukhan3b59de22020-06-03 20:15:19 -07004913LOGGING_SRCS = select({
4914 # No logging in optimized mode
4915 ":optimized_build": [],
4916 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004917 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004918 "src/operator-strings.c",
4919 "src/subgraph-strings.c",
4920 ],
4921})
4922
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004923LOGGING_HDRS = [
4924 "src/xnnpack/log.h",
4925]
4926
Marat Dukhan08c4a432019-10-03 09:29:21 -07004927xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004928 name = "tables",
4929 srcs = TABLE_SRCS,
4930 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004931 gcc_copts = xnnpack_gcc_std_copts(),
4932 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004933)
4934
4935xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004936 name = "scalar_ukernels",
4937 srcs = SCALAR_UKERNELS,
4938 hdrs = INTERNAL_HDRS,
4939 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004940 gcc_copts = xnnpack_gcc_std_copts(),
4941 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004942 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004943 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004944 "@FP16",
4945 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004946 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004947 ],
4948)
4949
4950xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004951 name = "scalar_ukernels_test_mode",
4952 srcs = SCALAR_UKERNELS,
4953 hdrs = INTERNAL_HDRS,
4954 aarch32_copts = ["-marm"],
4955 copts = [
4956 "-UNDEBUG",
4957 "-DXNN_TEST_MODE=1",
4958 ],
4959 gcc_copts = xnnpack_gcc_std_copts(),
4960 msvc_copts = xnnpack_msvc_std_copts(),
4961 deps = [
4962 ":tables",
4963 "@FP16",
4964 "@FXdiv",
4965 "@pthreadpool",
4966 ],
4967)
4968
4969xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004970 name = "wasm_ukernels",
4971 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004972 gcc_copts = xnnpack_gcc_std_copts(),
4973 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004974 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004975 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004976 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004977 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004978 "@FP16",
4979 "@FXdiv",
4980 "@pthreadpool",
4981 ],
4982)
4983
4984xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004985 name = "wasm_ukernels_test_mode",
4986 hdrs = INTERNAL_HDRS,
4987 copts = [
4988 "-UNDEBUG",
4989 "-DXNN_TEST_MODE=1",
4990 ],
4991 gcc_copts = xnnpack_gcc_std_copts(),
4992 msvc_copts = xnnpack_msvc_std_copts(),
4993 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004994 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004995 deps = [
4996 ":tables",
4997 "@FP16",
4998 "@FXdiv",
4999 "@pthreadpool",
5000 ],
5001)
5002
5003xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005004 name = "neon_ukernels",
5005 hdrs = INTERNAL_HDRS,
5006 aarch32_copts = [
5007 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07005008 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005009 "-mfpu=neon",
5010 ],
5011 aarch32_srcs = NEON_UKERNELS,
5012 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005013 gcc_copts = xnnpack_gcc_std_copts(),
5014 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005015 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005016 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005017 "@FP16",
5018 "@pthreadpool",
5019 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005020)
5021
5022xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005023 name = "neon_ukernels_test_mode",
5024 hdrs = INTERNAL_HDRS,
5025 aarch32_copts = [
5026 "-marm",
5027 "-march=armv7-a",
5028 "-mfpu=neon",
5029 ],
5030 aarch32_srcs = NEON_UKERNELS,
5031 aarch64_srcs = NEON_UKERNELS,
5032 copts = [
5033 "-UNDEBUG",
5034 "-DXNN_TEST_MODE=1",
5035 ],
5036 gcc_copts = xnnpack_gcc_std_copts(),
5037 msvc_copts = xnnpack_msvc_std_copts(),
5038 deps = [
5039 ":tables",
5040 "@FP16",
5041 "@pthreadpool",
5042 ],
5043)
5044
5045xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005046 name = "neonfma_ukernels",
5047 hdrs = INTERNAL_HDRS,
5048 aarch32_copts = [
5049 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07005050 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005051 "-mfpu=neon-vfpv4",
5052 ],
5053 aarch32_srcs = NEONFMA_UKERNELS,
5054 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005055 apple_aarch32_copts = [
5056 "-mcpu=swift",
5057 "-mtune=generic",
5058 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005059 gcc_copts = xnnpack_gcc_std_copts(),
5060 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005061 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005062 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005063 "@FP16",
5064 "@pthreadpool",
5065 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005066)
5067
5068xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005069 name = "neonfma_ukernels_test_mode",
5070 hdrs = INTERNAL_HDRS,
5071 aarch32_copts = [
5072 "-marm",
5073 "-march=armv7-a",
5074 "-mfpu=neon-vfpv4",
5075 ],
5076 aarch32_srcs = NEONFMA_UKERNELS,
5077 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005078 apple_aarch32_copts = [
5079 "-mcpu=swift",
5080 "-mtune=generic",
5081 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005082 copts = [
5083 "-UNDEBUG",
5084 "-DXNN_TEST_MODE=1",
5085 ],
5086 gcc_copts = xnnpack_gcc_std_copts(),
5087 msvc_copts = xnnpack_msvc_std_copts(),
5088 deps = [
5089 ":tables",
5090 "@FP16",
5091 "@pthreadpool",
5092 ],
5093)
5094
5095xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07005096 name = "neonv8_ukernels",
5097 hdrs = INTERNAL_HDRS,
5098 aarch32_copts = [
5099 "-marm",
5100 "-march=armv8-a",
5101 "-mfpu=neon-fp-armv8",
5102 ],
5103 aarch32_srcs = NEONV8_UKERNELS,
5104 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005105 apple_aarch32_copts = [
5106 "-mcpu=cyclone",
5107 "-mtune=generic",
5108 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07005109 gcc_copts = xnnpack_gcc_std_copts(),
5110 msvc_copts = xnnpack_msvc_std_copts(),
5111 deps = [
5112 ":tables",
5113 "@FP16",
5114 "@pthreadpool",
5115 ],
5116)
5117
5118xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005119 name = "neonv8_ukernels_test_mode",
5120 hdrs = INTERNAL_HDRS,
5121 aarch32_copts = [
5122 "-marm",
5123 "-march=armv8-a",
5124 "-mfpu=neon-fp-armv8",
5125 ],
5126 aarch32_srcs = NEONV8_UKERNELS,
5127 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07005128 apple_aarch32_copts = [
5129 "-mcpu=cyclone",
5130 "-mtune=generic",
5131 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005132 copts = [
5133 "-UNDEBUG",
5134 "-DXNN_TEST_MODE=1",
5135 ],
5136 gcc_copts = xnnpack_gcc_std_copts(),
5137 msvc_copts = xnnpack_msvc_std_copts(),
5138 deps = [
5139 ":tables",
5140 "@FP16",
5141 "@pthreadpool",
5142 ],
5143)
5144
5145xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005146 name = "neonfp16arith_ukernels",
5147 hdrs = INTERNAL_HDRS,
5148 aarch64_copts = ["-march=armv8.2-a+fp16"],
5149 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005150 gcc_copts = xnnpack_gcc_std_copts(),
5151 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08005152 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005153 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005154 "@FP16",
5155 "@pthreadpool",
5156 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005157)
5158
5159xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005160 name = "neonfp16arith_ukernels_test_mode",
5161 hdrs = INTERNAL_HDRS,
5162 aarch64_copts = ["-march=armv8.2-a+fp16"],
5163 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
5164 copts = [
5165 "-UNDEBUG",
5166 "-DXNN_TEST_MODE=1",
5167 ],
5168 gcc_copts = xnnpack_gcc_std_copts(),
5169 msvc_copts = xnnpack_msvc_std_copts(),
5170 deps = [
5171 ":tables",
5172 "@FP16",
5173 "@pthreadpool",
5174 ],
5175)
5176
5177xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07005178 name = "neondot_ukernels",
5179 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005180 aarch32_copts = [
5181 "-marm",
5182 "-march=armv8.2-a+dotprod",
5183 "-mfpu=neon-fp-armv8",
5184 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005185 aarch32_srcs = NEONDOT_UKERNELS,
5186 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5187 aarch64_srcs = NEONDOT_UKERNELS,
5188 gcc_copts = xnnpack_gcc_std_copts(),
5189 msvc_copts = xnnpack_msvc_std_copts(),
5190 deps = [
5191 ":tables",
5192 "@FP16",
5193 "@pthreadpool",
5194 ],
5195)
5196
5197xnnpack_cc_library(
5198 name = "neondot_ukernels_test_mode",
5199 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07005200 aarch32_copts = [
5201 "-marm",
5202 "-march=armv8.2-a+dotprod",
5203 "-mfpu=neon-fp-armv8",
5204 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07005205 aarch32_srcs = NEONDOT_UKERNELS,
5206 aarch64_copts = ["-march=armv8.2-a+dotprod"],
5207 aarch64_srcs = NEONDOT_UKERNELS,
5208 copts = [
5209 "-UNDEBUG",
5210 "-DXNN_TEST_MODE=1",
5211 ],
5212 gcc_copts = xnnpack_gcc_std_copts(),
5213 msvc_copts = xnnpack_msvc_std_copts(),
5214 deps = [
5215 ":tables",
5216 "@FP16",
5217 "@pthreadpool",
5218 ],
5219)
5220
5221xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005222 name = "sse2_ukernels",
5223 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005224 gcc_copts = xnnpack_gcc_std_copts(),
5225 gcc_x86_copts = ["-msse2"],
5226 msvc_copts = xnnpack_msvc_std_copts(),
5227 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005228 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005229 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005230 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005231 "@FP16",
5232 "@pthreadpool",
5233 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005234)
5235
5236xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005237 name = "sse2_ukernels_test_mode",
5238 hdrs = INTERNAL_HDRS,
5239 copts = [
5240 "-UNDEBUG",
5241 "-DXNN_TEST_MODE=1",
5242 ],
5243 gcc_copts = xnnpack_gcc_std_copts(),
5244 gcc_x86_copts = ["-msse2"],
5245 msvc_copts = xnnpack_msvc_std_copts(),
5246 msvc_x86_32_copts = ["/arch:SSE2"],
5247 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
5248 deps = [
5249 ":tables",
5250 "@FP16",
5251 "@pthreadpool",
5252 ],
5253)
5254
5255xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005256 name = "ssse3_ukernels",
5257 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005258 gcc_copts = xnnpack_gcc_std_copts(),
5259 gcc_x86_copts = ["-mssse3"],
5260 msvc_copts = xnnpack_msvc_std_copts(),
5261 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005262 x86_srcs = SSSE3_UKERNELS,
5263 deps = [
5264 ":tables",
5265 "@FP16",
5266 "@pthreadpool",
5267 ],
5268)
5269
5270xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005271 name = "ssse3_ukernels_test_mode",
5272 hdrs = INTERNAL_HDRS,
5273 copts = [
5274 "-UNDEBUG",
5275 "-DXNN_TEST_MODE=1",
5276 ],
5277 gcc_copts = xnnpack_gcc_std_copts(),
5278 gcc_x86_copts = ["-mssse3"],
5279 msvc_copts = xnnpack_msvc_std_copts(),
5280 msvc_x86_32_copts = ["/arch:SSE2"],
5281 x86_srcs = SSSE3_UKERNELS,
5282 deps = [
5283 ":tables",
5284 "@FP16",
5285 "@pthreadpool",
5286 ],
5287)
5288
5289xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005290 name = "sse41_ukernels",
5291 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005292 gcc_copts = xnnpack_gcc_std_copts(),
5293 gcc_x86_copts = ["-msse4.1"],
5294 msvc_copts = xnnpack_msvc_std_copts(),
5295 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005296 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005297 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005298 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005299 "@FP16",
5300 "@pthreadpool",
5301 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005302)
5303
5304xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005305 name = "sse41_ukernels_test_mode",
5306 hdrs = INTERNAL_HDRS,
5307 copts = [
5308 "-UNDEBUG",
5309 "-DXNN_TEST_MODE=1",
5310 ],
5311 gcc_copts = xnnpack_gcc_std_copts(),
5312 gcc_x86_copts = ["-msse4.1"],
5313 msvc_copts = xnnpack_msvc_std_copts(),
5314 msvc_x86_32_copts = ["/arch:SSE2"],
5315 x86_srcs = SSE41_UKERNELS,
5316 deps = [
5317 ":tables",
5318 "@FP16",
5319 "@pthreadpool",
5320 ],
5321)
5322
5323xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005324 name = "avx_ukernels",
5325 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005326 gcc_copts = xnnpack_gcc_std_copts(),
5327 gcc_x86_copts = ["-mavx"],
5328 msvc_copts = xnnpack_msvc_std_copts(),
5329 msvc_x86_32_copts = ["/arch:AVX"],
5330 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005331 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005332 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005333 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005334 "@FP16",
5335 "@pthreadpool",
5336 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005337)
5338
5339xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005340 name = "avx_ukernels_test_mode",
5341 hdrs = INTERNAL_HDRS,
5342 copts = [
5343 "-UNDEBUG",
5344 "-DXNN_TEST_MODE=1",
5345 ],
5346 gcc_copts = xnnpack_gcc_std_copts(),
5347 gcc_x86_copts = ["-mavx"],
5348 msvc_copts = xnnpack_msvc_std_copts(),
5349 msvc_x86_32_copts = ["/arch:AVX"],
5350 msvc_x86_64_copts = ["/arch:AVX"],
5351 x86_srcs = AVX_UKERNELS,
5352 deps = [
5353 ":tables",
5354 "@FP16",
5355 "@pthreadpool",
5356 ],
5357)
5358
5359xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07005360 name = "xop_ukernels",
5361 hdrs = INTERNAL_HDRS,
5362 gcc_copts = xnnpack_gcc_std_copts(),
5363 gcc_x86_copts = ["-mxop"],
5364 msvc_copts = xnnpack_msvc_std_copts(),
5365 msvc_x86_32_copts = ["/arch:AVX"],
5366 msvc_x86_64_copts = ["/arch:AVX"],
5367 x86_srcs = XOP_UKERNELS,
5368 deps = [
5369 ":tables",
5370 "@FP16",
5371 "@pthreadpool",
5372 ],
5373)
5374
5375xnnpack_cc_library(
5376 name = "xop_ukernels_test_mode",
5377 hdrs = INTERNAL_HDRS,
5378 copts = [
5379 "-UNDEBUG",
5380 "-DXNN_TEST_MODE=1",
5381 ],
5382 gcc_copts = xnnpack_gcc_std_copts(),
5383 gcc_x86_copts = ["-mxop"],
5384 msvc_copts = xnnpack_msvc_std_copts(),
5385 msvc_x86_32_copts = ["/arch:AVX"],
5386 msvc_x86_64_copts = ["/arch:AVX"],
5387 x86_srcs = XOP_UKERNELS,
5388 deps = [
5389 ":tables",
5390 "@FP16",
5391 "@pthreadpool",
5392 ],
5393)
5394
5395xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08005396 name = "fma3_ukernels",
5397 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005398 gcc_copts = xnnpack_gcc_std_copts(),
5399 gcc_x86_copts = ["-mfma"],
5400 msvc_copts = xnnpack_msvc_std_copts(),
5401 msvc_x86_32_copts = ["/arch:AVX"],
5402 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08005403 x86_srcs = FMA3_UKERNELS,
5404 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005405 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005406 "@FP16",
5407 "@pthreadpool",
5408 ],
5409)
5410
5411xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005412 name = "fma3_ukernels_test_mode",
5413 hdrs = INTERNAL_HDRS,
5414 copts = [
5415 "-UNDEBUG",
5416 "-DXNN_TEST_MODE=1",
5417 ],
5418 gcc_copts = xnnpack_gcc_std_copts(),
5419 gcc_x86_copts = ["-mfma"],
5420 msvc_copts = xnnpack_msvc_std_copts(),
5421 msvc_x86_32_copts = ["/arch:AVX"],
5422 msvc_x86_64_copts = ["/arch:AVX"],
5423 x86_srcs = FMA3_UKERNELS,
5424 deps = [
5425 ":tables",
5426 "@FP16",
5427 "@pthreadpool",
5428 ],
5429)
5430
5431xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005432 name = "avx2_ukernels",
5433 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005434 gcc_copts = xnnpack_gcc_std_copts(),
5435 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005436 "-mfma",
5437 "-mavx2",
5438 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005439 msvc_copts = xnnpack_msvc_std_copts(),
5440 msvc_x86_32_copts = ["/arch:AVX2"],
5441 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005442 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005443 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005444 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005445 "@FP16",
5446 "@pthreadpool",
5447 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005448)
5449
5450xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005451 name = "avx2_ukernels_test_mode",
5452 hdrs = INTERNAL_HDRS,
5453 copts = [
5454 "-UNDEBUG",
5455 "-DXNN_TEST_MODE=1",
5456 ],
5457 gcc_copts = xnnpack_gcc_std_copts(),
5458 gcc_x86_copts = [
5459 "-mfma",
5460 "-mavx2",
5461 ],
5462 msvc_copts = xnnpack_msvc_std_copts(),
5463 msvc_x86_32_copts = ["/arch:AVX2"],
5464 msvc_x86_64_copts = ["/arch:AVX2"],
5465 x86_srcs = AVX2_UKERNELS,
5466 deps = [
5467 ":tables",
5468 "@FP16",
5469 "@pthreadpool",
5470 ],
5471)
5472
5473xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005474 name = "avx512f_ukernels",
5475 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005476 gcc_copts = xnnpack_gcc_std_copts(),
5477 gcc_x86_copts = ["-mavx512f"],
5478 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5479 msvc_copts = xnnpack_msvc_std_copts(),
5480 msvc_x86_32_copts = ["/arch:AVX512"],
5481 msvc_x86_64_copts = ["/arch:AVX512"],
5482 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005483 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08005484 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08005485 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08005486 "@FP16",
5487 "@pthreadpool",
5488 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005489)
5490
5491xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005492 name = "avx512f_ukernels_test_mode",
5493 hdrs = INTERNAL_HDRS,
5494 copts = [
5495 "-UNDEBUG",
5496 "-DXNN_TEST_MODE=1",
5497 ],
5498 gcc_copts = xnnpack_gcc_std_copts(),
5499 gcc_x86_copts = ["-mavx512f"],
5500 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5501 msvc_copts = xnnpack_msvc_std_copts(),
5502 msvc_x86_32_copts = ["/arch:AVX512"],
5503 msvc_x86_64_copts = ["/arch:AVX512"],
5504 msys_copts = ["-fno-asynchronous-unwind-tables"],
5505 x86_srcs = AVX512F_UKERNELS,
5506 deps = [
5507 ":tables",
5508 "@FP16",
5509 "@pthreadpool",
5510 ],
5511)
5512
5513xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005514 name = "avx512skx_ukernels",
5515 hdrs = INTERNAL_HDRS,
5516 gcc_copts = xnnpack_gcc_std_copts(),
5517 gcc_x86_copts = [
5518 "-mavx512f",
5519 "-mavx512cd",
5520 "-mavx512bw",
5521 "-mavx512dq",
5522 "-mavx512vl",
5523 ],
5524 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5525 msvc_copts = xnnpack_msvc_std_copts(),
5526 msvc_x86_32_copts = ["/arch:AVX512"],
5527 msvc_x86_64_copts = ["/arch:AVX512"],
5528 msys_copts = ["-fno-asynchronous-unwind-tables"],
5529 x86_srcs = AVX512SKX_UKERNELS,
5530 deps = [
5531 ":tables",
5532 "@FP16",
5533 "@pthreadpool",
5534 ],
5535)
5536
5537xnnpack_cc_library(
5538 name = "avx512skx_ukernels_test_mode",
5539 hdrs = INTERNAL_HDRS,
5540 copts = [
5541 "-UNDEBUG",
5542 "-DXNN_TEST_MODE=1",
5543 ],
5544 gcc_copts = xnnpack_gcc_std_copts(),
5545 gcc_x86_copts = [
5546 "-mavx512f",
5547 "-mavx512cd",
5548 "-mavx512bw",
5549 "-mavx512dq",
5550 "-mavx512vl",
5551 ],
5552 mingw_copts = ["-fno-asynchronous-unwind-tables"],
5553 msvc_copts = xnnpack_msvc_std_copts(),
5554 msvc_x86_32_copts = ["/arch:AVX512"],
5555 msvc_x86_64_copts = ["/arch:AVX512"],
5556 msys_copts = ["-fno-asynchronous-unwind-tables"],
5557 x86_srcs = AVX512SKX_UKERNELS,
5558 deps = [
5559 ":tables",
5560 "@FP16",
5561 "@pthreadpool",
5562 ],
5563)
5564
5565xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005566 name = "asm_ukernels",
5567 hdrs = ["src/xnnpack/assembly.h"],
5568 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07005569 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005570 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07005571 wasm_srcs = WASM32_ASM_UKERNELS,
5572 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005573)
5574
Marat Dukhan3b59de22020-06-03 20:15:19 -07005575xnnpack_cc_library(
5576 name = "logging_utils",
5577 srcs = LOGGING_SRCS,
5578 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5579 copts = LOGGING_COPTS + [
5580 "-Isrc",
5581 "-Iinclude",
5582 ] + select({
5583 ":debug_build": [],
5584 "//conditions:default": xnnpack_min_size_copts(),
5585 }),
5586 gcc_copts = xnnpack_gcc_std_copts(),
5587 msvc_copts = xnnpack_msvc_std_copts(),
5588 visibility = xnnpack_visibility(),
5589 deps = [
5590 "@FP16",
5591 "@clog",
5592 "@pthreadpool",
5593 ],
5594)
5595
Marat Dukhan08c4a432019-10-03 09:29:21 -07005596xnnpack_aggregate_library(
5597 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005598 aarch32_ios_deps = [
5599 ":neon_ukernels",
5600 ":neonfma_ukernels",
5601 ":neonv8_ukernels",
5602 ":asm_ukernels",
5603 ],
5604 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005605 ":neon_ukernels",
5606 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005607 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005608 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005609 ":asm_ukernels",
5610 ],
5611 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005612 ":neon_ukernels",
5613 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07005614 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005615 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07005616 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005617 ":asm_ukernels",
5618 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005619 generic_deps = [
5620 ":scalar_ukernels",
5621 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005622 wasm_deps = [
5623 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005624 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005625 ],
5626 wasmsimd_deps = [
5627 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005628 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005629 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005630 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005631 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005632 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005633 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005634 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005635 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005636 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005637 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005638 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005639 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005640 ],
5641)
5642
Marat Dukhan33fcf782020-05-24 14:27:15 -07005643xnnpack_aggregate_library(
5644 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005645 aarch32_ios_deps = [
5646 ":neon_ukernels_test_mode",
5647 ":neonfma_ukernels_test_mode",
5648 ":neonv8_ukernels_test_mode",
5649 ":asm_ukernels",
5650 ],
5651 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005652 ":neon_ukernels_test_mode",
5653 ":neonfma_ukernels_test_mode",
5654 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005655 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005656 ":asm_ukernels",
5657 ],
5658 aarch64_deps = [
5659 ":neon_ukernels_test_mode",
5660 ":neonfma_ukernels_test_mode",
5661 ":neonv8_ukernels_test_mode",
5662 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005663 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005664 ":asm_ukernels",
5665 ],
5666 generic_deps = [
5667 ":scalar_ukernels_test_mode",
5668 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005669 wasm_deps = [
5670 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005671 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005672 ],
5673 wasmsimd_deps = [
5674 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005675 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005676 ],
5677 x86_deps = [
5678 ":sse2_ukernels_test_mode",
5679 ":ssse3_ukernels_test_mode",
5680 ":sse41_ukernels_test_mode",
5681 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005682 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005683 ":fma3_ukernels_test_mode",
5684 ":avx2_ukernels_test_mode",
5685 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005686 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005687 ],
5688)
5689
Marat Dukhan08c4a432019-10-03 09:29:21 -07005690xnnpack_cc_library(
5691 name = "im2col",
5692 srcs = ["src/im2col.c"],
5693 hdrs = [
5694 "src/xnnpack/common.h",
5695 "src/xnnpack/im2col.h",
5696 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005697 gcc_copts = xnnpack_gcc_std_copts(),
5698 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005699)
5700
5701xnnpack_cc_library(
5702 name = "indirection",
5703 srcs = ["src/indirection.c"],
5704 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005705 gcc_copts = xnnpack_gcc_std_copts(),
5706 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005707 deps = [
5708 "@FP16",
5709 "@FXdiv",
5710 "@pthreadpool",
5711 ],
5712)
5713
5714xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005715 name = "indirection_test_mode",
5716 srcs = ["src/indirection.c"],
5717 hdrs = INTERNAL_HDRS,
5718 copts = [
5719 "-UNDEBUG",
5720 "-DXNN_TEST_MODE=1",
5721 ],
5722 gcc_copts = xnnpack_gcc_std_copts(),
5723 msvc_copts = xnnpack_msvc_std_copts(),
5724 deps = [
5725 "@FP16",
5726 "@FXdiv",
5727 "@pthreadpool",
5728 ],
5729)
5730
5731xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005732 name = "packing",
5733 srcs = ["src/packing.c"],
5734 hdrs = INTERNAL_HDRS,
5735 gcc_copts = xnnpack_gcc_std_copts(),
5736 msvc_copts = xnnpack_msvc_std_copts(),
5737 deps = [
5738 "@FP16",
5739 "@FXdiv",
5740 "@pthreadpool",
5741 ],
5742)
5743
5744xnnpack_cc_library(
5745 name = "packing_test_mode",
5746 srcs = ["src/packing.c"],
5747 hdrs = INTERNAL_HDRS,
5748 copts = [
5749 "-UNDEBUG",
5750 "-DXNN_TEST_MODE=1",
5751 ],
5752 gcc_copts = xnnpack_gcc_std_copts(),
5753 msvc_copts = xnnpack_msvc_std_copts(),
5754 deps = [
5755 "@FP16",
5756 "@FXdiv",
5757 "@pthreadpool",
5758 ],
5759)
5760
5761xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005762 name = "operator_run",
5763 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005764 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005765 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005766 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5767 "//conditions:default": [],
5768 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005769 gcc_copts = xnnpack_gcc_std_copts(),
5770 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005771 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005772 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005773 "@FP16",
5774 "@FXdiv",
5775 "@clog",
5776 "@pthreadpool",
5777 ],
5778)
5779
Chao Mei6ddfc602020-05-13 22:29:36 -07005780xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005781 name = "operator_run_test_mode",
5782 srcs = ["src/operator-run.c"],
5783 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5784 copts = LOGGING_COPTS + [
5785 "-UNDEBUG",
5786 "-DXNN_TEST_MODE=1",
5787 ] + select({
5788 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5789 "//conditions:default": [],
5790 }),
5791 gcc_copts = xnnpack_gcc_std_copts(),
5792 msvc_copts = xnnpack_msvc_std_copts(),
5793 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005794 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005795 "@FP16",
5796 "@FXdiv",
5797 "@clog",
5798 "@pthreadpool",
5799 ],
5800)
5801
5802xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005803 name = "memory_planner",
5804 srcs = ["src/memory-planner.c"],
5805 hdrs = INTERNAL_HDRS,
5806 defines = select({
5807 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5808 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5809 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5810 }),
5811 gcc_copts = xnnpack_gcc_std_copts(),
5812 msvc_copts = xnnpack_msvc_std_copts(),
5813 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005814 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005815 "@pthreadpool",
5816 ],
5817)
5818
Marat Dukhan33fcf782020-05-24 14:27:15 -07005819xnnpack_cc_library(
5820 name = "memory_planner_test_mode",
5821 srcs = ["src/memory-planner.c"],
5822 hdrs = INTERNAL_HDRS,
5823 copts = [
5824 "-UNDEBUG",
5825 "-DXNN_TEST_MODE=1",
5826 ],
5827 defines = select({
5828 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5829 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5830 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5831 }),
5832 gcc_copts = xnnpack_gcc_std_copts(),
5833 msvc_copts = xnnpack_msvc_std_copts(),
5834 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005835 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005836 "@pthreadpool",
5837 ],
5838)
5839
Marat Dukhan08c4a432019-10-03 09:29:21 -07005840cc_library(
5841 name = "enable_assembly",
5842 defines = select({
5843 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5844 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005845 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005846 }),
5847)
5848
Marat Dukhan9de90e02020-06-18 16:04:12 -07005849cc_library(
5850 name = "enable_sparse",
5851 defines = select({
5852 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5853 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005854 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005855 }),
5856)
5857
Marat Dukhancf056b22019-10-07 10:26:29 -07005858xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005859 name = "operators",
5860 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005861 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005862 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005863 ],
5864 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005865 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005866 "-Isrc",
5867 "-Iinclude",
5868 ] + select({
5869 ":debug_build": [],
5870 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005871 }) + select({
5872 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5873 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005874 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005875 gcc_copts = xnnpack_gcc_std_copts(),
5876 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005877 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005878 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005879 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005880 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005881 "@FP16",
5882 "@FXdiv",
5883 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005884 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005885 ],
5886)
5887
Marat Dukhan10a38082020-04-17 03:58:35 -07005888xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005889 name = "operators_test_mode",
5890 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005891 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005892 "src/operator-delete.c",
5893 ],
5894 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5895 copts = LOGGING_COPTS + [
5896 "-Isrc",
5897 "-Iinclude",
5898 "-UNDEBUG",
5899 "-DXNN_TEST_MODE=1",
5900 ] + select({
5901 ":debug_build": [],
5902 "//conditions:default": xnnpack_min_size_copts(),
5903 }) + select({
5904 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5905 "//conditions:default": [],
5906 }),
5907 gcc_copts = xnnpack_gcc_std_copts(),
5908 msvc_copts = xnnpack_msvc_std_copts(),
5909 deps = [
5910 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005911 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005912 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005913 "@FP16",
5914 "@FXdiv",
5915 "@clog",
5916 "@pthreadpool",
5917 ],
5918)
5919
5920xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005921 name = "XNNPACK",
5922 srcs = [
5923 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005924 "src/runtime.c",
5925 "src/subgraph.c",
5926 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005927 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005928 hdrs = ["include/xnnpack.h"],
5929 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005930 "-Isrc",
5931 "-Iinclude",
5932 ] + select({
5933 ":debug_build": [],
5934 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005935 }) + select({
5936 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5937 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005938 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005939 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005940 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005941 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005942 visibility = xnnpack_visibility(),
5943 deps = [
5944 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005945 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005946 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005947 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005948 ":operator_run",
5949 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005950 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005951 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005952 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005953 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005954 ] + select({
5955 ":emscripten": [],
5956 "//conditions:default": ["@cpuinfo"],
5957 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005958)
5959
Marat Dukhan10a38082020-04-17 03:58:35 -07005960xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005961 name = "XNNPACK_test_mode",
5962 srcs = [
5963 "src/init.c",
5964 "src/runtime.c",
5965 "src/subgraph.c",
5966 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005967 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005968 hdrs = ["include/xnnpack.h"],
5969 copts = LOGGING_COPTS + [
5970 "-Isrc",
5971 "-Iinclude",
5972 "-UNDEBUG",
5973 "-DXNN_TEST_MODE=1",
5974 ] + select({
5975 ":debug_build": [],
5976 "//conditions:default": xnnpack_min_size_copts(),
5977 }) + select({
5978 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5979 "//conditions:default": [],
5980 }),
5981 gcc_copts = xnnpack_gcc_std_copts(),
5982 includes = ["include"],
5983 msvc_copts = xnnpack_msvc_std_copts(),
5984 visibility = xnnpack_visibility(),
5985 deps = [
5986 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005987 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005988 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005989 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005990 ":operator_run_test_mode",
5991 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005992 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005993 "@clog",
5994 "@FP16",
5995 "@pthreadpool",
5996 ] + select({
5997 ":emscripten": [],
5998 "//conditions:default": ["@cpuinfo"],
5999 }),
6000)
6001
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006002# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
6003# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07006004xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006005 name = "xnnpack_for_tflite",
6006 srcs = [
6007 "src/init.c",
6008 "src/runtime.c",
6009 "src/subgraph.c",
6010 "src/tensor.c",
6011 ] + SUBGRAPH_SRCS,
6012 hdrs = ["include/xnnpack.h"],
6013 copts = LOGGING_COPTS + [
6014 "-Isrc",
6015 "-Iinclude",
6016 ] + select({
6017 ":debug_build": [],
6018 "//conditions:default": xnnpack_min_size_copts(),
6019 }) + select({
6020 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
6021 "//conditions:default": [],
6022 }),
6023 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006024 "XNN_NO_U8_OPERATORS",
6025 "XNN_NO_X8_OPERATORS",
6026 "XNN_NO_F16_OPERATORS",
6027 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07006028 ] + select({
6029 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07006030 ":xnn_enable_qs8_explicit_false": [
6031 "XNN_NO_QC8_OPERATORS",
6032 "XNN_NO_QS8_OPERATORS",
6033 ],
6034 "//conditions:default": [
6035 "XNN_NO_QC8_OPERATORS",
6036 "XNN_NO_QS8_OPERATORS",
6037 ],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07006038 }) + select({
6039 ":xnn_enable_qu8_explicit_true": [],
6040 ":xnn_enable_qu8_explicit_false": [
6041 "XNN_NO_QU8_OPERATORS",
6042 ],
6043 "//conditions:default": [
6044 "XNN_NO_QU8_OPERATORS",
6045 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07006046 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006047 gcc_copts = xnnpack_gcc_std_copts(),
6048 includes = ["include"],
6049 msvc_copts = xnnpack_msvc_std_copts(),
6050 visibility = xnnpack_visibility(),
6051 deps = [
6052 ":enable_assembly",
6053 ":enable_sparse",
6054 ":logging_utils",
6055 ":memory_planner",
6056 ":operator_run",
6057 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07006058 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07006059 "@clog",
6060 "@FP16",
6061 "@pthreadpool",
6062 ] + select({
6063 ":emscripten": [],
6064 "//conditions:default": ["@cpuinfo"],
6065 }),
6066)
6067
6068# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
6069# not used by the TensorFlow.js WebAssembly backend to minimize code size.
6070xnnpack_cc_library(
6071 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006072 srcs = [
6073 "src/init.c",
6074 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07006075 hdrs = ["include/xnnpack.h"],
6076 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006077 "-Isrc",
6078 "-Iinclude",
6079 ] + select({
6080 ":debug_build": [],
6081 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07006082 }) + select({
6083 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
6084 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006085 }),
6086 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07006087 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07006088 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006089 "XNN_NO_U8_OPERATORS",
6090 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08006091 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006092 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07006093 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006094 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07006095 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006096 visibility = xnnpack_visibility(),
6097 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006098 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07006099 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006100 ":operator_run",
6101 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07006102 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006103 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006104 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07006105 ] + select({
6106 ":emscripten": [],
6107 "//conditions:default": ["@cpuinfo"],
6108 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006109)
6110
Marat Dukhancf056b22019-10-07 10:26:29 -07006111xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006112 name = "bench_utils",
6113 srcs = ["bench/utils.cc"],
6114 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08006115 deps = [
6116 "@com_google_benchmark//:benchmark",
6117 "@cpuinfo",
6118 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006119)
6120
Frank Barchard7e955972019-10-11 10:34:25 -07006121######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07006122
6123xnnpack_benchmark(
Marat Dukhan0744fa02021-07-26 22:56:27 -07006124 name = "qs8_dwconv_bench",
6125 srcs = [
6126 "bench/dwconv.h",
6127 "bench/qs8-dwconv.cc",
6128 "src/xnnpack/AlignedAllocator.h",
6129 ] + MICROKERNEL_BENCHMARK_HDRS,
6130 deps = MICROKERNEL_BENCHMARK_DEPS + [
6131 ":indirection",
6132 ":packing",
6133 ],
6134)
6135
6136xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07006137 name = "qs8_gemm_bench",
6138 srcs = [
6139 "bench/gemm.h",
6140 "bench/qs8-gemm.cc",
6141 "src/xnnpack/AlignedAllocator.h",
6142 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07006143 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
6144 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07006145)
6146
6147xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006148 name = "qs8_requantization_bench",
6149 srcs = [
6150 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006151 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006152 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07006153 ] + MICROKERNEL_BENCHMARK_HDRS,
6154 deps = MICROKERNEL_BENCHMARK_DEPS,
6155)
6156
6157xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07006158 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006159 srcs = [
6160 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07006161 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006162 "src/xnnpack/AlignedAllocator.h",
6163 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006164 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006165 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006166)
6167
6168xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006169 name = "qu8_requantization_bench",
6170 srcs = [
6171 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006172 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006173 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07006174 ] + MICROKERNEL_BENCHMARK_HDRS,
6175 deps = MICROKERNEL_BENCHMARK_DEPS,
6176)
6177
6178xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07006179 name = "f16_igemm_bench",
6180 srcs = [
6181 "bench/f16-igemm.cc",
6182 "bench/conv.h",
6183 "bench/google/conv.h",
6184 "src/xnnpack/AlignedAllocator.h",
6185 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006186 deps = MICROKERNEL_BENCHMARK_DEPS + [
6187 ":indirection",
6188 ":packing",
6189 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07006190)
6191
6192xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006193 name = "f16_gemm_bench",
6194 srcs = [
6195 "bench/f16-gemm.cc",
6196 "bench/gemm.h",
6197 "src/xnnpack/AlignedAllocator.h",
6198 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006199 deps = MICROKERNEL_BENCHMARK_DEPS + [
6200 ":packing",
6201 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006202)
6203
6204xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006205 name = "f16_spmm_bench",
6206 srcs = [
6207 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006208 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006209 "src/xnnpack/AlignedAllocator.h",
6210 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006211 deps = MICROKERNEL_BENCHMARK_DEPS,
6212)
6213
6214xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006215 name = "f16_vrelu_bench",
6216 srcs = [
6217 "bench/f16-vrelu.cc",
6218 "src/xnnpack/AlignedAllocator.h",
6219 ] + MICROKERNEL_BENCHMARK_HDRS,
6220 deps = MICROKERNEL_BENCHMARK_DEPS,
6221)
6222
6223xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006224 name = "f32_igemm_bench",
6225 srcs = [
6226 "bench/f32-igemm.cc",
6227 "bench/conv.h",
6228 "src/xnnpack/AlignedAllocator.h",
6229 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006230 deps = MICROKERNEL_BENCHMARK_DEPS + [
6231 ":indirection",
6232 ":packing",
6233 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006234)
6235
6236xnnpack_benchmark(
6237 name = "f32_conv_hwc_bench",
6238 srcs = [
6239 "bench/f32-conv-hwc.cc",
6240 "bench/dconv.h",
6241 "src/xnnpack/AlignedAllocator.h",
6242 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006243 deps = MICROKERNEL_BENCHMARK_DEPS + [
6244 ":packing",
6245 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006246)
6247
6248xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006249 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07006250 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006251 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07006252 "bench/dconv.h",
6253 "src/xnnpack/AlignedAllocator.h",
6254 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006255 deps = MICROKERNEL_BENCHMARK_DEPS + [
6256 ":packing",
6257 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07006258)
6259
6260xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07006261 name = "f16_dwconv_bench",
6262 srcs = [
6263 "bench/f16-dwconv.cc",
6264 "bench/dwconv.h",
6265 "bench/google/dwconv.h",
6266 "src/xnnpack/AlignedAllocator.h",
6267 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006268 deps = MICROKERNEL_BENCHMARK_DEPS + [
6269 ":indirection",
6270 ":packing",
6271 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07006272)
6273
6274xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006275 name = "f32_dwconv_bench",
6276 srcs = [
6277 "bench/f32-dwconv.cc",
6278 "bench/dwconv.h",
6279 "src/xnnpack/AlignedAllocator.h",
6280 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006281 deps = MICROKERNEL_BENCHMARK_DEPS + [
6282 ":indirection",
6283 ":packing",
6284 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006285)
6286
6287xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006288 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006289 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006290 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006291 "bench/dwconv.h",
6292 "src/xnnpack/AlignedAllocator.h",
6293 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006294 deps = MICROKERNEL_BENCHMARK_DEPS + [
6295 ":indirection",
6296 ":packing",
6297 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006298)
6299
6300xnnpack_benchmark(
6301 name = "f32_gemm_bench",
6302 srcs = [
6303 "bench/f32-gemm.cc",
6304 "bench/gemm.h",
6305 "src/xnnpack/AlignedAllocator.h",
6306 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006307 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07006308 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006309)
6310
6311xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006312 name = "f32_raddexpminusmax_bench",
6313 srcs = [
6314 "bench/f32-raddexpminusmax.cc",
6315 "src/xnnpack/AlignedAllocator.h",
6316 ] + MICROKERNEL_BENCHMARK_HDRS,
6317 deps = MICROKERNEL_BENCHMARK_DEPS,
6318)
6319
6320xnnpack_benchmark(
6321 name = "f32_raddextexp_bench",
6322 srcs = [
6323 "bench/f32-raddextexp.cc",
6324 "src/xnnpack/AlignedAllocator.h",
6325 ] + MICROKERNEL_BENCHMARK_HDRS,
6326 deps = MICROKERNEL_BENCHMARK_DEPS,
6327)
6328
6329xnnpack_benchmark(
6330 name = "f32_raddstoreexpminusmax_bench",
6331 srcs = [
6332 "bench/f32-raddstoreexpminusmax.cc",
6333 "src/xnnpack/AlignedAllocator.h",
6334 ] + MICROKERNEL_BENCHMARK_HDRS,
6335 deps = MICROKERNEL_BENCHMARK_DEPS,
6336)
6337
6338xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006339 name = "f32_rmax_bench",
6340 srcs = [
6341 "bench/f32-rmax.cc",
6342 "src/xnnpack/AlignedAllocator.h",
6343 ] + MICROKERNEL_BENCHMARK_HDRS,
6344 deps = MICROKERNEL_BENCHMARK_DEPS,
6345)
6346
6347xnnpack_benchmark(
6348 name = "f32_spmm_bench",
6349 srcs = [
6350 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08006351 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006352 "src/xnnpack/AlignedAllocator.h",
6353 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006354 deps = MICROKERNEL_BENCHMARK_DEPS,
6355)
6356
6357xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006358 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006359 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006360 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006361 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006362 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08006363 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07006364)
6365
6366xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006367 name = "f32_velu_bench",
6368 srcs = [
6369 "bench/f32-velu.cc",
6370 "src/xnnpack/AlignedAllocator.h",
6371 ] + MICROKERNEL_BENCHMARK_HDRS,
6372 deps = MICROKERNEL_BENCHMARK_DEPS,
6373)
6374
6375xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006376 name = "f32_vhswish_bench",
6377 srcs = [
6378 "bench/f32-vhswish.cc",
6379 "src/xnnpack/AlignedAllocator.h",
6380 ] + MICROKERNEL_BENCHMARK_HDRS,
6381 deps = MICROKERNEL_BENCHMARK_DEPS,
6382)
6383
6384xnnpack_benchmark(
6385 name = "f32_vrelu_bench",
6386 srcs = [
6387 "bench/f32-vrelu.cc",
6388 "src/xnnpack/AlignedAllocator.h",
6389 ] + MICROKERNEL_BENCHMARK_HDRS,
6390 deps = MICROKERNEL_BENCHMARK_DEPS,
6391)
6392
6393xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006394 name = "f32_vscaleexpminusmax_bench",
6395 srcs = [
6396 "bench/f32-vscaleexpminusmax.cc",
6397 "src/xnnpack/AlignedAllocator.h",
6398 ] + MICROKERNEL_BENCHMARK_HDRS,
6399 deps = MICROKERNEL_BENCHMARK_DEPS,
6400)
6401
6402xnnpack_benchmark(
6403 name = "f32_vscaleextexp_bench",
6404 srcs = [
6405 "bench/f32-vscaleextexp.cc",
6406 "src/xnnpack/AlignedAllocator.h",
6407 ] + MICROKERNEL_BENCHMARK_HDRS,
6408 deps = MICROKERNEL_BENCHMARK_DEPS,
6409)
6410
6411xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07006412 name = "f32_vsigmoid_bench",
6413 srcs = [
6414 "bench/f32-vsigmoid.cc",
6415 "src/xnnpack/AlignedAllocator.h",
6416 ] + MICROKERNEL_BENCHMARK_HDRS,
6417 deps = MICROKERNEL_BENCHMARK_DEPS,
6418)
6419
6420xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006421 name = "f32_vsqrt_bench",
6422 srcs = [
6423 "bench/f32-vsqrt.cc",
6424 "src/xnnpack/AlignedAllocator.h",
6425 ] + MICROKERNEL_BENCHMARK_HDRS,
6426 deps = MICROKERNEL_BENCHMARK_DEPS,
6427)
6428
6429xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006430 name = "f32_im2col_gemm_bench",
6431 srcs = [
6432 "bench/f32-im2col-gemm.cc",
6433 "bench/conv.h",
6434 "src/xnnpack/AlignedAllocator.h",
6435 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006436 deps = MICROKERNEL_BENCHMARK_DEPS + [
6437 ":im2col",
6438 ":packing",
6439 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006440)
6441
Marat Dukhanfe7acb62020-03-09 19:30:05 -07006442xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006443 name = "rounding_bench",
6444 srcs = [
6445 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006446 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006447 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07006448 ] + MICROKERNEL_BENCHMARK_HDRS,
6449 deps = MICROKERNEL_BENCHMARK_DEPS,
6450)
6451
Marat Dukhan08c4a432019-10-03 09:29:21 -07006452########################### Benchmarks for operators ###########################
6453
6454xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006455 name = "average_pooling_bench",
6456 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07006457 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006458 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006459 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006460)
6461
6462xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006463 name = "bankers_rounding_bench",
6464 srcs = ["bench/bankers-rounding.cc"],
6465 copts = xnnpack_optional_tflite_copts(),
6466 tags = ["nowin32"],
6467 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6468)
6469
6470xnnpack_benchmark(
6471 name = "ceiling_bench",
6472 srcs = ["bench/ceiling.cc"],
6473 copts = xnnpack_optional_tflite_copts(),
6474 tags = ["nowin32"],
6475 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6476)
6477
6478xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006479 name = "channel_shuffle_bench",
6480 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006481 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006482)
6483
6484xnnpack_benchmark(
6485 name = "convolution_bench",
6486 srcs = ["bench/convolution.cc"],
6487 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006488 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006489 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006490)
6491
6492xnnpack_benchmark(
6493 name = "deconvolution_bench",
6494 srcs = ["bench/deconvolution.cc"],
6495 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006496 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006497 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006498)
6499
6500xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08006501 name = "elu_bench",
6502 srcs = ["bench/elu.cc"],
6503 copts = xnnpack_optional_tflite_copts(),
6504 tags = ["nowin32"],
6505 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6506)
6507
6508xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006509 name = "floor_bench",
6510 srcs = ["bench/floor.cc"],
6511 copts = xnnpack_optional_tflite_copts(),
6512 tags = ["nowin32"],
6513 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6514)
6515
6516xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006517 name = "global_average_pooling_bench",
6518 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006519 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006520)
6521
6522xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07006523 name = "hardswish_bench",
6524 srcs = ["bench/hardswish.cc"],
6525 copts = xnnpack_optional_tflite_copts(),
6526 tags = ["nowin32"],
6527 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6528)
6529
6530xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006531 name = "max_pooling_bench",
6532 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006533 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006534)
6535
6536xnnpack_benchmark(
6537 name = "sigmoid_bench",
6538 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08006539 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006540 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006541 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006542)
6543
6544xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07006545 name = "prelu_bench",
6546 srcs = ["bench/prelu.cc"],
6547 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07006548 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006549 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07006550)
6551
6552xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08006553 name = "softmax_bench",
6554 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08006555 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07006556 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07006557 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006558)
6559
Marat Dukhan87727142020-06-24 15:24:10 -07006560xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07006561 name = "square_root_bench",
6562 srcs = ["bench/square-root.cc"],
6563 copts = xnnpack_optional_tflite_copts(),
6564 tags = ["nowin32"],
6565 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
6566)
6567
6568xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07006569 name = "truncation_bench",
6570 srcs = ["bench/truncation.cc"],
6571 deps = OPERATOR_BENCHMARK_DEPS,
6572)
6573
Marat Dukhanc068bb62019-10-04 13:24:39 -07006574############################# End-to-end benchmarks ############################
6575
6576cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006577 name = "fp32_mobilenet_v1",
6578 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006579 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006580 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006581 linkstatic = True,
6582 deps = [
6583 ":XNNPACK",
6584 "@pthreadpool",
6585 ],
6586)
6587
6588cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006589 name = "fp32_sparse_mobilenet_v1",
6590 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
6591 hdrs = ["models/models.h"],
6592 copts = xnnpack_std_cxxopts(),
6593 linkstatic = True,
6594 deps = [
6595 ":XNNPACK",
6596 "@pthreadpool",
6597 ],
6598)
6599
6600cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006601 name = "fp16_mobilenet_v1",
6602 srcs = ["models/fp16-mobilenet-v1.cc"],
6603 hdrs = ["models/models.h"],
6604 copts = xnnpack_std_cxxopts(),
6605 linkstatic = True,
6606 deps = [
6607 ":XNNPACK",
6608 "@FP16",
6609 "@pthreadpool",
6610 ],
6611)
6612
6613cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006614 name = "qs8_mobilenet_v1",
6615 srcs = ["models/qs8-mobilenet-v1.cc"],
6616 hdrs = ["models/models.h"],
6617 copts = xnnpack_std_cxxopts(),
6618 linkstatic = True,
6619 deps = [
6620 ":XNNPACK",
6621 "@pthreadpool",
6622 ],
6623)
6624
6625cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07006626 name = "qs8_mobilenet_v2",
6627 srcs = ["models/qs8-mobilenet-v2.cc"],
6628 hdrs = ["models/models.h"],
6629 copts = xnnpack_std_cxxopts(),
6630 linkstatic = True,
6631 deps = [
6632 ":XNNPACK",
6633 "@pthreadpool",
6634 ],
6635)
6636
6637cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006638 name = "qu8_mobilenet_v1",
6639 srcs = ["models/qu8-mobilenet-v1.cc"],
6640 hdrs = ["models/models.h"],
6641 copts = xnnpack_std_cxxopts(),
6642 linkstatic = True,
6643 deps = [
6644 ":XNNPACK",
6645 "@pthreadpool",
6646 ],
6647)
6648
6649cc_library(
Marat Dukhan036b2b12021-07-21 01:12:58 -07006650 name = "qu8_mobilenet_v2",
6651 srcs = ["models/qu8-mobilenet-v2.cc"],
6652 hdrs = ["models/models.h"],
6653 copts = xnnpack_std_cxxopts(),
6654 linkstatic = True,
6655 deps = [
6656 ":XNNPACK",
6657 "@pthreadpool",
6658 ],
6659)
6660
6661cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006662 name = "fp32_mobilenet_v2",
6663 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006664 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006665 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006666 linkstatic = True,
6667 deps = [
6668 ":XNNPACK",
6669 "@pthreadpool",
6670 ],
6671)
6672
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006673cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006674 name = "fp32_sparse_mobilenet_v2",
6675 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6676 hdrs = ["models/models.h"],
6677 copts = xnnpack_std_cxxopts(),
6678 linkstatic = True,
6679 deps = [
6680 ":XNNPACK",
6681 "@pthreadpool",
6682 ],
6683)
6684
6685cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006686 name = "fp16_mobilenet_v2",
6687 srcs = ["models/fp16-mobilenet-v2.cc"],
6688 hdrs = ["models/models.h"],
6689 copts = xnnpack_std_cxxopts(),
6690 linkstatic = True,
6691 deps = [
6692 ":XNNPACK",
6693 "@FP16",
6694 "@pthreadpool",
6695 ],
6696)
6697
6698cc_library(
6699 name = "fp32_mobilenet_v3_large",
6700 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006701 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006702 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006703 linkstatic = True,
6704 deps = [
6705 ":XNNPACK",
6706 "@pthreadpool",
6707 ],
6708)
6709
6710cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006711 name = "fp32_sparse_mobilenet_v3_large",
6712 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6713 hdrs = ["models/models.h"],
6714 copts = xnnpack_std_cxxopts(),
6715 linkstatic = True,
6716 deps = [
6717 ":XNNPACK",
6718 "@pthreadpool",
6719 ],
6720)
6721
6722cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006723 name = "fp16_mobilenet_v3_large",
6724 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6725 hdrs = ["models/models.h"],
6726 copts = xnnpack_std_cxxopts(),
6727 linkstatic = True,
6728 deps = [
6729 ":XNNPACK",
6730 "@FP16",
6731 "@pthreadpool",
6732 ],
6733)
6734
6735cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006736 name = "fp32_mobilenet_v3_small",
6737 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006738 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006739 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006740 linkstatic = True,
6741 deps = [
6742 ":XNNPACK",
6743 "@pthreadpool",
6744 ],
6745)
6746
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006747cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006748 name = "fp32_sparse_mobilenet_v3_small",
6749 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6750 hdrs = ["models/models.h"],
6751 copts = xnnpack_std_cxxopts(),
6752 linkstatic = True,
6753 deps = [
6754 ":XNNPACK",
6755 "@pthreadpool",
6756 ],
6757)
6758
6759cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006760 name = "fp16_mobilenet_v3_small",
6761 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6762 hdrs = ["models/models.h"],
6763 copts = xnnpack_std_cxxopts(),
6764 linkstatic = True,
6765 deps = [
6766 ":XNNPACK",
6767 "@FP16",
6768 "@pthreadpool",
6769 ],
6770)
6771
Marat Dukhanc068bb62019-10-04 13:24:39 -07006772xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006773 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006774 srcs = [
6775 "bench/f32-dwconv-e2e.cc",
6776 "bench/end2end.h",
6777 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006778 deps = MICROKERNEL_BENCHMARK_DEPS + [
6779 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006780 ":fp32_mobilenet_v1",
6781 ":fp32_mobilenet_v2",
6782 ":fp32_mobilenet_v3_large",
6783 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006784 ],
6785)
6786
6787xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006788 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006789 srcs = [
6790 "bench/f32-gemm-e2e.cc",
6791 "bench/end2end.h",
6792 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006793 deps = MICROKERNEL_BENCHMARK_DEPS + [
6794 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006795 ":fp32_mobilenet_v1",
6796 ":fp32_mobilenet_v2",
6797 ":fp32_mobilenet_v3_large",
6798 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006799 ],
6800)
6801
6802xnnpack_benchmark(
Marat Dukhanbbfc6d32021-07-26 18:31:02 -07006803 name = "qs8_dwconv_e2e_bench",
6804 srcs = [
6805 "bench/qs8-dwconv-e2e.cc",
6806 "bench/end2end.h",
6807 ] + MICROKERNEL_BENCHMARK_HDRS,
6808 deps = MICROKERNEL_BENCHMARK_DEPS + [
6809 ":XNNPACK",
6810 ":qs8_mobilenet_v1",
6811 ":qs8_mobilenet_v2",
6812 ],
6813)
6814
6815xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006816 name = "qs8_gemm_e2e_bench",
6817 srcs = [
6818 "bench/qs8-gemm-e2e.cc",
6819 "bench/end2end.h",
6820 ] + MICROKERNEL_BENCHMARK_HDRS,
6821 deps = MICROKERNEL_BENCHMARK_DEPS + [
6822 ":XNNPACK",
6823 ":qs8_mobilenet_v1",
6824 ":qs8_mobilenet_v2",
6825 ],
6826)
6827
6828xnnpack_benchmark(
Marat Dukhan6084fb82021-07-27 07:45:02 -07006829 name = "qu8_dwconv_e2e_bench",
6830 srcs = [
6831 "bench/qu8-dwconv-e2e.cc",
6832 "bench/end2end.h",
6833 ] + MICROKERNEL_BENCHMARK_HDRS,
6834 deps = MICROKERNEL_BENCHMARK_DEPS + [
6835 ":XNNPACK",
6836 ":qu8_mobilenet_v1",
6837 ":qu8_mobilenet_v2",
6838 ],
6839)
6840
6841xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006842 name = "end2end_bench",
6843 srcs = ["bench/end2end.cc"],
6844 deps = [
6845 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006846 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006847 ":fp16_mobilenet_v1",
6848 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006849 ":fp16_mobilenet_v3_large",
6850 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006851 ":fp32_mobilenet_v1",
6852 ":fp32_mobilenet_v2",
6853 ":fp32_mobilenet_v3_large",
6854 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006855 ":fp32_sparse_mobilenet_v1",
6856 ":fp32_sparse_mobilenet_v2",
6857 ":fp32_sparse_mobilenet_v3_large",
6858 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006859 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006860 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006861 ":qu8_mobilenet_v1",
Marat Dukhan036b2b12021-07-21 01:12:58 -07006862 ":qu8_mobilenet_v2",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006863 "@pthreadpool",
6864 ],
6865)
6866
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006867#################### Accuracy evaluation for math functions ####################
6868
6869xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006870 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006871 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006872 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006873 "src/xnnpack/AlignedAllocator.h",
6874 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006875 deps = ACCURACY_EVAL_DEPS + [
6876 ":bench_utils",
6877 "@cpuinfo",
6878 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006879)
6880
Marat Dukhan515c9772019-10-17 18:07:57 -07006881xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006882 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006883 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006884 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006885 "src/xnnpack/AlignedAllocator.h",
6886 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006887 deps = ACCURACY_EVAL_DEPS + [
6888 ":bench_utils",
6889 "@cpuinfo",
6890 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006891)
6892
Marat Dukhan98ba4412019-10-23 02:14:28 -07006893xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006894 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006895 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006896 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006897 "src/xnnpack/AlignedAllocator.h",
6898 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006899 deps = ACCURACY_EVAL_DEPS + [
6900 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006901 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006902 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006903)
6904
6905xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006906 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006907 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006908 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006909 "src/xnnpack/AlignedAllocator.h",
6910 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006911 deps = ACCURACY_EVAL_DEPS + [
6912 ":bench_utils",
6913 "@cpuinfo",
6914 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006915)
6916
Marat Dukhanf44f0222020-12-14 11:53:27 -08006917xnnpack_benchmark(
6918 name = "f32_sigmoid_ulp_eval",
6919 srcs = [
6920 "eval/f32-sigmoid-ulp.cc",
6921 "src/xnnpack/AlignedAllocator.h",
6922 ] + ACCURACY_EVAL_HDRS,
6923 deps = ACCURACY_EVAL_DEPS + [
6924 ":bench_utils",
6925 "@cpuinfo",
6926 ],
6927)
6928
6929xnnpack_benchmark(
6930 name = "f32_sqrt_ulp_eval",
6931 srcs = [
6932 "eval/f32-sqrt-ulp.cc",
6933 "src/xnnpack/AlignedAllocator.h",
6934 ] + ACCURACY_EVAL_HDRS,
6935 deps = ACCURACY_EVAL_DEPS + [
6936 ":bench_utils",
6937 "@cpuinfo",
6938 ],
6939)
6940
6941################### Accuracy verification for math functions ##################
6942
6943xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006944 name = "f32_exp_eval",
6945 srcs = [
6946 "eval/f32-exp.cc",
6947 "src/xnnpack/AlignedAllocator.h",
6948 "src/xnnpack/math-stubs.h",
6949 ] + MICROKERNEL_TEST_HDRS,
6950 automatic = False,
6951 deps = MICROKERNEL_TEST_DEPS,
6952)
6953
6954xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006955 name = "f32_expm1minus_eval",
6956 srcs = [
6957 "eval/f32-expm1minus.cc",
6958 "src/xnnpack/AlignedAllocator.h",
6959 "src/xnnpack/math-stubs.h",
6960 ] + MICROKERNEL_TEST_HDRS,
6961 automatic = False,
6962 deps = MICROKERNEL_TEST_DEPS,
6963)
6964
Marat Dukhan8853b822020-05-07 12:19:01 -07006965xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006966 name = "f32_expminus_eval",
6967 srcs = [
6968 "eval/f32-expminus.cc",
6969 "src/xnnpack/AlignedAllocator.h",
6970 "src/xnnpack/math-stubs.h",
6971 ] + MICROKERNEL_TEST_HDRS,
6972 automatic = False,
6973 deps = MICROKERNEL_TEST_DEPS,
6974)
6975
6976xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006977 name = "f32_roundne_eval",
6978 srcs = [
6979 "eval/f32-roundne.cc",
6980 "src/xnnpack/AlignedAllocator.h",
6981 "src/xnnpack/math-stubs.h",
6982 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006983 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006984 deps = MICROKERNEL_TEST_DEPS,
6985)
6986
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006987xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006988 name = "f32_roundd_eval",
6989 srcs = [
6990 "eval/f32-roundd.cc",
6991 "src/xnnpack/AlignedAllocator.h",
6992 "src/xnnpack/math-stubs.h",
6993 ] + MICROKERNEL_TEST_HDRS,
6994 automatic = False,
6995 deps = MICROKERNEL_TEST_DEPS,
6996)
6997
6998xnnpack_unit_test(
6999 name = "f32_roundu_eval",
7000 srcs = [
7001 "eval/f32-roundu.cc",
7002 "src/xnnpack/AlignedAllocator.h",
7003 "src/xnnpack/math-stubs.h",
7004 ] + MICROKERNEL_TEST_HDRS,
7005 automatic = False,
7006 deps = MICROKERNEL_TEST_DEPS,
7007)
7008
7009xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07007010 name = "f32_roundz_eval",
7011 srcs = [
7012 "eval/f32-roundz.cc",
7013 "src/xnnpack/AlignedAllocator.h",
7014 "src/xnnpack/math-stubs.h",
7015 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07007016 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07007017 deps = MICROKERNEL_TEST_DEPS,
7018)
7019
Marat Dukhan08c4a432019-10-03 09:29:21 -07007020######################### Unit tests for micro-kernels #########################
7021
7022xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007023 name = "f16_dwconv_minmax_test",
7024 srcs = [
7025 "test/f16-dwconv-minmax.cc",
7026 "test/dwconv-microkernel-tester.h",
7027 "src/xnnpack/AlignedAllocator.h",
7028 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7029 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7030)
7031
7032xnnpack_unit_test(
7033 name = "f16_gavgpool_minmax_test",
7034 srcs = [
7035 "test/f16-gavgpool-minmax.cc",
7036 "test/gavgpool-microkernel-tester.h",
7037 "src/xnnpack/AlignedAllocator.h",
7038 ] + MICROKERNEL_TEST_HDRS,
7039 deps = MICROKERNEL_TEST_DEPS,
7040)
7041
7042xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07007043 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007044 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07007045 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007046 "test/gemm-microkernel-tester.h",
7047 "src/xnnpack/AlignedAllocator.h",
7048 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007049 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007050)
7051
7052xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007053 name = "f16_igemm_minmax_test",
7054 srcs = [
7055 "test/f16-igemm-minmax.cc",
7056 "test/gemm-microkernel-tester.h",
7057 "src/xnnpack/AlignedAllocator.h",
7058 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7059 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7060)
7061
7062xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007063 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08007064 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007065 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08007066 "test/spmm-microkernel-tester.h",
7067 "src/xnnpack/AlignedAllocator.h",
7068 ] + MICROKERNEL_TEST_HDRS,
7069 deps = MICROKERNEL_TEST_DEPS,
7070)
7071
7072xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007073 name = "f16_vadd_minmax_test",
7074 srcs = [
7075 "test/f16-vadd-minmax.cc",
7076 "test/vbinary-microkernel-tester.h",
7077 ] + MICROKERNEL_TEST_HDRS,
7078 deps = MICROKERNEL_TEST_DEPS,
7079)
7080
7081xnnpack_unit_test(
7082 name = "f16_vaddc_minmax_test",
7083 srcs = [
7084 "test/f16-vaddc-minmax.cc",
7085 "test/vbinaryc-microkernel-tester.h",
7086 ] + MICROKERNEL_TEST_HDRS,
7087 deps = MICROKERNEL_TEST_DEPS,
7088)
7089
7090xnnpack_unit_test(
7091 name = "f16_vclamp_test",
7092 srcs = [
7093 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007094 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007095 ] + MICROKERNEL_TEST_HDRS,
7096 deps = MICROKERNEL_TEST_DEPS,
7097)
7098
7099xnnpack_unit_test(
7100 name = "f16_vdiv_minmax_test",
7101 srcs = [
7102 "test/f16-vdiv-minmax.cc",
7103 "test/vbinary-microkernel-tester.h",
7104 ] + MICROKERNEL_TEST_HDRS,
7105 deps = MICROKERNEL_TEST_DEPS,
7106)
7107
7108xnnpack_unit_test(
7109 name = "f16_vdivc_minmax_test",
7110 srcs = [
7111 "test/f16-vdivc-minmax.cc",
7112 "test/vbinaryc-microkernel-tester.h",
7113 ] + MICROKERNEL_TEST_HDRS,
7114 deps = MICROKERNEL_TEST_DEPS,
7115)
7116
7117xnnpack_unit_test(
7118 name = "f16_vrdivc_minmax_test",
7119 srcs = [
7120 "test/f16-vrdivc-minmax.cc",
7121 "test/vbinaryc-microkernel-tester.h",
7122 ] + MICROKERNEL_TEST_HDRS,
7123 deps = MICROKERNEL_TEST_DEPS,
7124)
7125
7126xnnpack_unit_test(
7127 name = "f16_vhswish_test",
7128 srcs = [
7129 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007130 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007131 ] + MICROKERNEL_TEST_HDRS,
7132 deps = MICROKERNEL_TEST_DEPS,
7133)
7134
7135xnnpack_unit_test(
7136 name = "f16_vmax_test",
7137 srcs = [
7138 "test/f16-vmax.cc",
7139 "test/vbinary-microkernel-tester.h",
7140 ] + MICROKERNEL_TEST_HDRS,
7141 deps = MICROKERNEL_TEST_DEPS,
7142)
7143
7144xnnpack_unit_test(
7145 name = "f16_vmaxc_test",
7146 srcs = [
7147 "test/f16-vmaxc.cc",
7148 "test/vbinaryc-microkernel-tester.h",
7149 ] + MICROKERNEL_TEST_HDRS,
7150 deps = MICROKERNEL_TEST_DEPS,
7151)
7152
7153xnnpack_unit_test(
7154 name = "f16_vmin_test",
7155 srcs = [
7156 "test/f16-vmin.cc",
7157 "test/vbinary-microkernel-tester.h",
7158 ] + MICROKERNEL_TEST_HDRS,
7159 deps = MICROKERNEL_TEST_DEPS,
7160)
7161
7162xnnpack_unit_test(
7163 name = "f16_vminc_test",
7164 srcs = [
7165 "test/f16-vminc.cc",
7166 "test/vbinaryc-microkernel-tester.h",
7167 ] + MICROKERNEL_TEST_HDRS,
7168 deps = MICROKERNEL_TEST_DEPS,
7169)
7170
7171xnnpack_unit_test(
7172 name = "f16_vmul_minmax_test",
7173 srcs = [
7174 "test/f16-vmul-minmax.cc",
7175 "test/vbinary-microkernel-tester.h",
7176 ] + MICROKERNEL_TEST_HDRS,
7177 deps = MICROKERNEL_TEST_DEPS,
7178)
7179
7180xnnpack_unit_test(
7181 name = "f16_vmulc_minmax_test",
7182 srcs = [
7183 "test/f16-vmulc-minmax.cc",
7184 "test/vbinaryc-microkernel-tester.h",
7185 ] + MICROKERNEL_TEST_HDRS,
7186 deps = MICROKERNEL_TEST_DEPS,
7187)
7188
7189xnnpack_unit_test(
7190 name = "f16_vmulcaddc_minmax_test",
7191 srcs = [
7192 "test/f16-vmulcaddc-minmax.cc",
7193 "test/vmulcaddc-microkernel-tester.h",
7194 "src/xnnpack/AlignedAllocator.h",
7195 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7196 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7197)
7198
7199xnnpack_unit_test(
7200 name = "f16_vsub_minmax_test",
7201 srcs = [
7202 "test/f16-vsub-minmax.cc",
7203 "test/vbinary-microkernel-tester.h",
7204 ] + MICROKERNEL_TEST_HDRS,
7205 deps = MICROKERNEL_TEST_DEPS,
7206)
7207
7208xnnpack_unit_test(
7209 name = "f16_vsubc_minmax_test",
7210 srcs = [
7211 "test/f16-vsubc-minmax.cc",
7212 "test/vbinaryc-microkernel-tester.h",
7213 ] + MICROKERNEL_TEST_HDRS,
7214 deps = MICROKERNEL_TEST_DEPS,
7215)
7216
7217xnnpack_unit_test(
7218 name = "f16_vrsubc_minmax_test",
7219 srcs = [
7220 "test/f16-vrsubc-minmax.cc",
7221 "test/vbinaryc-microkernel-tester.h",
7222 ] + MICROKERNEL_TEST_HDRS,
7223 deps = MICROKERNEL_TEST_DEPS,
7224)
7225
7226xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007227 name = "f32_argmaxpool_test",
7228 srcs = [
7229 "test/f32-argmaxpool.cc",
7230 "test/argmaxpool-microkernel-tester.h",
7231 "src/xnnpack/AlignedAllocator.h",
7232 ] + MICROKERNEL_TEST_HDRS,
7233 deps = MICROKERNEL_TEST_DEPS,
7234)
7235
7236xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007237 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007238 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007239 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007240 "test/avgpool-microkernel-tester.h",
7241 "src/xnnpack/AlignedAllocator.h",
7242 ] + MICROKERNEL_TEST_HDRS,
7243 deps = MICROKERNEL_TEST_DEPS,
7244)
7245
7246xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07007247 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007248 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07007249 "test/f32-ibilinear.cc",
7250 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08007251 "src/xnnpack/AlignedAllocator.h",
7252 ] + MICROKERNEL_TEST_HDRS,
7253 deps = MICROKERNEL_TEST_DEPS,
7254)
7255
7256xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07007257 name = "f32_ibilinear_chw_test",
7258 srcs = [
7259 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07007260 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07007261 "src/xnnpack/AlignedAllocator.h",
7262 ] + MICROKERNEL_TEST_HDRS,
7263 deps = MICROKERNEL_TEST_DEPS,
7264)
7265
7266xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007267 name = "f32_igemm_test",
7268 srcs = [
7269 "test/f32-igemm.cc",
7270 "test/gemm-microkernel-tester.h",
7271 "src/xnnpack/AlignedAllocator.h",
7272 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007273 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007274)
7275
7276xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007277 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007278 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07007279 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007280 "test/gemm-microkernel-tester.h",
7281 "src/xnnpack/AlignedAllocator.h",
7282 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007283 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007284)
7285
7286xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07007287 name = "f32_igemm_minmax_test",
7288 srcs = [
7289 "test/f32-igemm-minmax.cc",
7290 "test/gemm-microkernel-tester.h",
7291 "src/xnnpack/AlignedAllocator.h",
7292 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007293 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07007294)
7295
7296xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007297 name = "f32_conv_hwc_test",
7298 srcs = [
7299 "test/f32-conv-hwc.cc",
7300 "test/conv-hwc-microkernel-tester.h",
7301 "src/xnnpack/AlignedAllocator.h",
7302 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007303 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007304)
7305
7306xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007307 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007308 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007309 "test/f32-conv-hwc2chw.cc",
7310 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007311 "src/xnnpack/AlignedAllocator.h",
7312 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007313 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007314)
7315
7316xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007317 name = "f32_dwconv_test",
7318 srcs = [
7319 "test/f32-dwconv.cc",
7320 "test/dwconv-microkernel-tester.h",
7321 "src/xnnpack/AlignedAllocator.h",
7322 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007323 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007324)
7325
7326xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007327 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007328 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007329 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007330 "test/dwconv-microkernel-tester.h",
7331 "src/xnnpack/AlignedAllocator.h",
7332 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007333 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007334)
7335
7336xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07007337 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007338 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07007339 "test/f32-dwconv2d-chw.cc",
7340 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007341 "src/xnnpack/AlignedAllocator.h",
7342 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007343 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007344)
7345
7346xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007347 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007348 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007349 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007350 "test/gavgpool-microkernel-tester.h",
7351 "src/xnnpack/AlignedAllocator.h",
7352 ] + MICROKERNEL_TEST_HDRS,
7353 deps = MICROKERNEL_TEST_DEPS,
7354)
7355
7356xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07007357 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007358 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07007359 "test/f32-gavgpool-cw.cc",
7360 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007361 "src/xnnpack/AlignedAllocator.h",
7362 ] + MICROKERNEL_TEST_HDRS,
7363 deps = MICROKERNEL_TEST_DEPS,
7364)
7365
7366xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07007367 name = "f32_gemm_test",
7368 srcs = [
7369 "test/f32-gemm.cc",
7370 "test/gemm-microkernel-tester.h",
7371 "src/xnnpack/AlignedAllocator.h",
7372 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007373 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07007374)
7375
7376xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07007377 name = "f32_gemm_relu_test",
7378 srcs = [
7379 "test/f32-gemm-relu.cc",
7380 "test/gemm-microkernel-tester.h",
7381 "src/xnnpack/AlignedAllocator.h",
7382 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007383 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07007384)
7385
7386xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007387 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007388 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007389 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007390 "test/gemm-microkernel-tester.h",
7391 "src/xnnpack/AlignedAllocator.h",
7392 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007393 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007394)
7395
7396xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007397 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007398 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007399 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007400 "test/gemm-microkernel-tester.h",
7401 "src/xnnpack/AlignedAllocator.h",
7402 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007403 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007404)
7405
7406xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007407 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07007408 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07007409 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07007410 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007411 ] + MICROKERNEL_TEST_HDRS,
7412 deps = MICROKERNEL_TEST_DEPS,
7413)
7414
7415xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007416 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007417 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007418 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007419 "test/maxpool-microkernel-tester.h",
7420 ] + MICROKERNEL_TEST_HDRS,
7421 deps = MICROKERNEL_TEST_DEPS,
7422)
7423
7424xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007425 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007426 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007427 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007428 "test/avgpool-microkernel-tester.h",
7429 "src/xnnpack/AlignedAllocator.h",
7430 ] + MICROKERNEL_TEST_HDRS,
7431 deps = MICROKERNEL_TEST_DEPS,
7432)
7433
7434xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07007435 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007436 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07007437 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007438 "test/gemm-microkernel-tester.h",
7439 "src/xnnpack/AlignedAllocator.h",
7440 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007441 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007442)
7443
7444xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07007445 name = "f16_prelu_test",
7446 srcs = [
7447 "test/f16-prelu.cc",
7448 "test/prelu-microkernel-tester.h",
7449 "src/xnnpack/AlignedAllocator.h",
7450 ] + MICROKERNEL_TEST_HDRS,
7451 deps = MICROKERNEL_TEST_DEPS,
7452)
7453
7454xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007455 name = "f32_prelu_test",
7456 srcs = [
7457 "test/f32-prelu.cc",
7458 "test/prelu-microkernel-tester.h",
7459 "src/xnnpack/AlignedAllocator.h",
7460 ] + MICROKERNEL_TEST_HDRS,
7461 deps = MICROKERNEL_TEST_DEPS,
7462)
7463
7464xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007465 name = "f32_raddexpminusmax_test",
7466 srcs = [
7467 "test/f32-raddexpminusmax.cc",
7468 "test/raddexpminusmax-microkernel-tester.h",
7469 ] + MICROKERNEL_TEST_HDRS,
7470 deps = MICROKERNEL_TEST_DEPS,
7471)
7472
7473xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007474 name = "f32_raddextexp_test",
7475 srcs = [
7476 "test/f32-raddextexp.cc",
7477 "test/raddextexp-microkernel-tester.h",
7478 ] + MICROKERNEL_TEST_HDRS,
7479 deps = MICROKERNEL_TEST_DEPS,
7480)
7481
7482xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007483 name = "f32_raddstoreexpminusmax_test",
7484 srcs = [
7485 "test/f32-raddstoreexpminusmax.cc",
7486 "test/raddstoreexpminusmax-microkernel-tester.h",
7487 ] + MICROKERNEL_TEST_HDRS,
7488 deps = MICROKERNEL_TEST_DEPS,
7489)
7490
7491xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007492 name = "f32_rmax_test",
7493 srcs = [
7494 "test/f32-rmax.cc",
7495 "test/rmax-microkernel-tester.h",
7496 ] + MICROKERNEL_TEST_HDRS,
7497 deps = MICROKERNEL_TEST_DEPS,
7498)
7499
7500xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07007501 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007502 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07007503 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007504 "test/spmm-microkernel-tester.h",
7505 "src/xnnpack/AlignedAllocator.h",
7506 ] + MICROKERNEL_TEST_HDRS,
7507 deps = MICROKERNEL_TEST_DEPS,
7508)
7509
7510xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007511 name = "f32_vabs_test",
7512 srcs = [
7513 "test/f32-vabs.cc",
7514 "test/vunary-microkernel-tester.h",
7515 ] + MICROKERNEL_TEST_HDRS,
7516 deps = MICROKERNEL_TEST_DEPS,
7517)
7518
7519xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007520 name = "f32_vadd_test",
7521 srcs = [
7522 "test/f32-vadd.cc",
7523 "test/vbinary-microkernel-tester.h",
7524 ] + MICROKERNEL_TEST_HDRS,
7525 deps = MICROKERNEL_TEST_DEPS,
7526)
7527
7528xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007529 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007530 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007531 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007532 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007533 ] + MICROKERNEL_TEST_HDRS,
7534 deps = MICROKERNEL_TEST_DEPS,
7535)
7536
7537xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007538 name = "f32_vadd_relu_test",
7539 srcs = [
7540 "test/f32-vadd-relu.cc",
7541 "test/vbinary-microkernel-tester.h",
7542 ] + MICROKERNEL_TEST_HDRS,
7543 deps = MICROKERNEL_TEST_DEPS,
7544)
7545
7546xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007547 name = "f32_vaddc_test",
7548 srcs = [
7549 "test/f32-vaddc.cc",
7550 "test/vbinaryc-microkernel-tester.h",
7551 ] + MICROKERNEL_TEST_HDRS,
7552 deps = MICROKERNEL_TEST_DEPS,
7553)
7554
7555xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007556 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007557 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007558 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007559 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007560 ] + MICROKERNEL_TEST_HDRS,
7561 deps = MICROKERNEL_TEST_DEPS,
7562)
7563
7564xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007565 name = "f32_vaddc_relu_test",
7566 srcs = [
7567 "test/f32-vaddc-relu.cc",
7568 "test/vbinaryc-microkernel-tester.h",
7569 ] + MICROKERNEL_TEST_HDRS,
7570 deps = MICROKERNEL_TEST_DEPS,
7571)
7572
7573xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007574 name = "f32_vclamp_test",
7575 srcs = [
7576 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07007577 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007578 ] + MICROKERNEL_TEST_HDRS,
7579 deps = MICROKERNEL_TEST_DEPS,
7580)
7581
7582xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007583 name = "f32_vdiv_test",
7584 srcs = [
7585 "test/f32-vdiv.cc",
7586 "test/vbinary-microkernel-tester.h",
7587 ] + MICROKERNEL_TEST_HDRS,
7588 deps = MICROKERNEL_TEST_DEPS,
7589)
7590
7591xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007592 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007593 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007594 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007595 "test/vbinary-microkernel-tester.h",
7596 ] + MICROKERNEL_TEST_HDRS,
7597 deps = MICROKERNEL_TEST_DEPS,
7598)
7599
7600xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007601 name = "f32_vdiv_relu_test",
7602 srcs = [
7603 "test/f32-vdiv-relu.cc",
7604 "test/vbinary-microkernel-tester.h",
7605 ] + MICROKERNEL_TEST_HDRS,
7606 deps = MICROKERNEL_TEST_DEPS,
7607)
7608
7609xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007610 name = "f32_vdivc_test",
7611 srcs = [
7612 "test/f32-vdivc.cc",
7613 "test/vbinaryc-microkernel-tester.h",
7614 ] + MICROKERNEL_TEST_HDRS,
7615 deps = MICROKERNEL_TEST_DEPS,
7616)
7617
7618xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007619 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007620 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007621 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007622 "test/vbinaryc-microkernel-tester.h",
7623 ] + MICROKERNEL_TEST_HDRS,
7624 deps = MICROKERNEL_TEST_DEPS,
7625)
7626
7627xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007628 name = "f32_vdivc_relu_test",
7629 srcs = [
7630 "test/f32-vdivc-relu.cc",
7631 "test/vbinaryc-microkernel-tester.h",
7632 ] + MICROKERNEL_TEST_HDRS,
7633 deps = MICROKERNEL_TEST_DEPS,
7634)
7635
7636xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007637 name = "f32_vrdivc_test",
7638 srcs = [
7639 "test/f32-vrdivc.cc",
7640 "test/vbinaryc-microkernel-tester.h",
7641 ] + MICROKERNEL_TEST_HDRS,
7642 deps = MICROKERNEL_TEST_DEPS,
7643)
7644
7645xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007646 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007647 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007648 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08007649 "test/vbinaryc-microkernel-tester.h",
7650 ] + MICROKERNEL_TEST_HDRS,
7651 deps = MICROKERNEL_TEST_DEPS,
7652)
7653
7654xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007655 name = "f32_vrdivc_relu_test",
7656 srcs = [
7657 "test/f32-vrdivc-relu.cc",
7658 "test/vbinaryc-microkernel-tester.h",
7659 ] + MICROKERNEL_TEST_HDRS,
7660 deps = MICROKERNEL_TEST_DEPS,
7661)
7662
7663xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08007664 name = "f32_velu_test",
7665 srcs = [
7666 "test/f32-velu.cc",
7667 "test/vunary-microkernel-tester.h",
7668 ] + MICROKERNEL_TEST_HDRS,
7669 deps = MICROKERNEL_TEST_DEPS,
7670)
7671
7672xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08007673 name = "f32_vmax_test",
7674 srcs = [
7675 "test/f32-vmax.cc",
7676 "test/vbinary-microkernel-tester.h",
7677 ] + MICROKERNEL_TEST_HDRS,
7678 deps = MICROKERNEL_TEST_DEPS,
7679)
7680
7681xnnpack_unit_test(
7682 name = "f32_vmaxc_test",
7683 srcs = [
7684 "test/f32-vmaxc.cc",
7685 "test/vbinaryc-microkernel-tester.h",
7686 ] + MICROKERNEL_TEST_HDRS,
7687 deps = MICROKERNEL_TEST_DEPS,
7688)
7689
7690xnnpack_unit_test(
7691 name = "f32_vmin_test",
7692 srcs = [
7693 "test/f32-vmin.cc",
7694 "test/vbinary-microkernel-tester.h",
7695 ] + MICROKERNEL_TEST_HDRS,
7696 deps = MICROKERNEL_TEST_DEPS,
7697)
7698
7699xnnpack_unit_test(
7700 name = "f32_vminc_test",
7701 srcs = [
7702 "test/f32-vminc.cc",
7703 "test/vbinaryc-microkernel-tester.h",
7704 ] + MICROKERNEL_TEST_HDRS,
7705 deps = MICROKERNEL_TEST_DEPS,
7706)
7707
7708xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007709 name = "f32_vmul_test",
7710 srcs = [
7711 "test/f32-vmul.cc",
7712 "test/vbinary-microkernel-tester.h",
7713 ] + MICROKERNEL_TEST_HDRS,
7714 deps = MICROKERNEL_TEST_DEPS,
7715)
7716
7717xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007718 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007719 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007720 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007721 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007722 ] + MICROKERNEL_TEST_HDRS,
7723 deps = MICROKERNEL_TEST_DEPS,
7724)
7725
7726xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007727 name = "f32_vmul_relu_test",
7728 srcs = [
7729 "test/f32-vmul-relu.cc",
7730 "test/vbinary-microkernel-tester.h",
7731 ] + MICROKERNEL_TEST_HDRS,
7732 deps = MICROKERNEL_TEST_DEPS,
7733)
7734
7735xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007736 name = "f32_vmulc_test",
7737 srcs = [
7738 "test/f32-vmulc.cc",
7739 "test/vbinaryc-microkernel-tester.h",
7740 ] + MICROKERNEL_TEST_HDRS,
7741 deps = MICROKERNEL_TEST_DEPS,
7742)
7743
7744xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007745 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007746 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007747 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007748 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007749 ] + MICROKERNEL_TEST_HDRS,
7750 deps = MICROKERNEL_TEST_DEPS,
7751)
7752
7753xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007754 name = "f32_vmulc_relu_test",
7755 srcs = [
7756 "test/f32-vmulc-relu.cc",
7757 "test/vbinaryc-microkernel-tester.h",
7758 ] + MICROKERNEL_TEST_HDRS,
7759 deps = MICROKERNEL_TEST_DEPS,
7760)
7761
7762xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007763 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007764 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007765 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007766 "test/vmulcaddc-microkernel-tester.h",
7767 "src/xnnpack/AlignedAllocator.h",
7768 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007769 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007770)
7771
7772xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007773 name = "f32_vlrelu_test",
7774 srcs = [
7775 "test/f32-vlrelu.cc",
7776 "test/vunary-microkernel-tester.h",
7777 ] + MICROKERNEL_TEST_HDRS,
7778 deps = MICROKERNEL_TEST_DEPS,
7779)
7780
7781xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007782 name = "f32_vneg_test",
7783 srcs = [
7784 "test/f32-vneg.cc",
7785 "test/vunary-microkernel-tester.h",
7786 ] + MICROKERNEL_TEST_HDRS,
7787 deps = MICROKERNEL_TEST_DEPS,
7788)
7789
7790xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007791 name = "f32_vrelu_test",
7792 srcs = [
7793 "test/f32-vrelu.cc",
7794 "test/vunary-microkernel-tester.h",
7795 ] + MICROKERNEL_TEST_HDRS,
7796 deps = MICROKERNEL_TEST_DEPS,
7797)
7798
7799xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007800 name = "f32_vrndne_test",
7801 srcs = [
7802 "test/f32-vrndne.cc",
7803 "test/vunary-microkernel-tester.h",
7804 ] + MICROKERNEL_TEST_HDRS,
7805 deps = MICROKERNEL_TEST_DEPS,
7806)
7807
7808xnnpack_unit_test(
7809 name = "f32_vrndz_test",
7810 srcs = [
7811 "test/f32-vrndz.cc",
7812 "test/vunary-microkernel-tester.h",
7813 ] + MICROKERNEL_TEST_HDRS,
7814 deps = MICROKERNEL_TEST_DEPS,
7815)
7816
7817xnnpack_unit_test(
7818 name = "f32_vrndu_test",
7819 srcs = [
7820 "test/f32-vrndu.cc",
7821 "test/vunary-microkernel-tester.h",
7822 ] + MICROKERNEL_TEST_HDRS,
7823 deps = MICROKERNEL_TEST_DEPS,
7824)
7825
7826xnnpack_unit_test(
7827 name = "f32_vrndd_test",
7828 srcs = [
7829 "test/f32-vrndd.cc",
7830 "test/vunary-microkernel-tester.h",
7831 ] + MICROKERNEL_TEST_HDRS,
7832 deps = MICROKERNEL_TEST_DEPS,
7833)
7834
7835xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007836 name = "f32_vscale_test",
7837 srcs = [
7838 "test/f32-vscale.cc",
7839 "test/vscale-microkernel-tester.h",
7840 ] + MICROKERNEL_TEST_HDRS,
7841 deps = MICROKERNEL_TEST_DEPS,
7842)
7843
7844xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007845 name = "f32_vscaleexpminusmax_test",
7846 srcs = [
7847 "test/f32-vscaleexpminusmax.cc",
7848 "test/vscaleexpminusmax-microkernel-tester.h",
7849 ] + MICROKERNEL_TEST_HDRS,
7850 deps = MICROKERNEL_TEST_DEPS,
7851)
7852
7853xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007854 name = "f32_vscaleextexp_test",
7855 srcs = [
7856 "test/f32-vscaleextexp.cc",
7857 "test/vscaleextexp-microkernel-tester.h",
7858 ] + MICROKERNEL_TEST_HDRS,
7859 deps = MICROKERNEL_TEST_DEPS,
7860)
7861
7862xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007863 name = "f32_vsigmoid_test",
7864 srcs = [
7865 "test/f32-vsigmoid.cc",
7866 "test/vunary-microkernel-tester.h",
7867 ] + MICROKERNEL_TEST_HDRS,
7868 deps = MICROKERNEL_TEST_DEPS,
7869)
7870
7871xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007872 name = "f32_vsqr_test",
7873 srcs = [
7874 "test/f32-vsqr.cc",
7875 "test/vunary-microkernel-tester.h",
7876 ] + MICROKERNEL_TEST_HDRS,
7877 deps = MICROKERNEL_TEST_DEPS,
7878)
7879
7880xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007881 name = "f32_vsqrdiff_test",
7882 srcs = [
7883 "test/f32-vsqrdiff.cc",
7884 "test/vbinary-microkernel-tester.h",
7885 ] + MICROKERNEL_TEST_HDRS,
7886 deps = MICROKERNEL_TEST_DEPS,
7887)
7888
7889xnnpack_unit_test(
7890 name = "f32_vsqrdiffc_test",
7891 srcs = [
7892 "test/f32-vsqrdiffc.cc",
7893 "test/vbinaryc-microkernel-tester.h",
7894 ] + MICROKERNEL_TEST_HDRS,
7895 deps = MICROKERNEL_TEST_DEPS,
7896)
7897
7898xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007899 name = "f32_vsqrt_test",
7900 srcs = [
7901 "test/f32-vsqrt.cc",
7902 "test/vunary-microkernel-tester.h",
7903 ] + MICROKERNEL_TEST_HDRS,
7904 deps = MICROKERNEL_TEST_DEPS,
7905)
7906
7907xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007908 name = "f32_vsub_test",
7909 srcs = [
7910 "test/f32-vsub.cc",
7911 "test/vbinary-microkernel-tester.h",
7912 ] + MICROKERNEL_TEST_HDRS,
7913 deps = MICROKERNEL_TEST_DEPS,
7914)
7915
7916xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007917 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007918 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007919 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007920 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007921 ] + MICROKERNEL_TEST_HDRS,
7922 deps = MICROKERNEL_TEST_DEPS,
7923)
7924
7925xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007926 name = "f32_vsub_relu_test",
7927 srcs = [
7928 "test/f32-vsub-relu.cc",
7929 "test/vbinary-microkernel-tester.h",
7930 ] + MICROKERNEL_TEST_HDRS,
7931 deps = MICROKERNEL_TEST_DEPS,
7932)
7933
7934xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007935 name = "f32_vsubc_test",
7936 srcs = [
7937 "test/f32-vsubc.cc",
7938 "test/vbinaryc-microkernel-tester.h",
7939 ] + MICROKERNEL_TEST_HDRS,
7940 deps = MICROKERNEL_TEST_DEPS,
7941)
7942
7943xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007944 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007945 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007946 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007947 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007948 ] + MICROKERNEL_TEST_HDRS,
7949 deps = MICROKERNEL_TEST_DEPS,
7950)
7951
7952xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007953 name = "f32_vsubc_relu_test",
7954 srcs = [
7955 "test/f32-vsubc-relu.cc",
7956 "test/vbinaryc-microkernel-tester.h",
7957 ] + MICROKERNEL_TEST_HDRS,
7958 deps = MICROKERNEL_TEST_DEPS,
7959)
7960
7961xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007962 name = "f32_vrsubc_test",
7963 srcs = [
7964 "test/f32-vrsubc.cc",
7965 "test/vbinaryc-microkernel-tester.h",
7966 ] + MICROKERNEL_TEST_HDRS,
7967 deps = MICROKERNEL_TEST_DEPS,
7968)
7969
7970xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007971 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007972 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007973 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007974 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007975 ] + MICROKERNEL_TEST_HDRS,
7976 deps = MICROKERNEL_TEST_DEPS,
7977)
7978
7979xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007980 name = "f32_vrsubc_relu_test",
7981 srcs = [
7982 "test/f32-vrsubc-relu.cc",
7983 "test/vbinaryc-microkernel-tester.h",
7984 ] + MICROKERNEL_TEST_HDRS,
7985 deps = MICROKERNEL_TEST_DEPS,
7986)
7987
7988xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007989 name = "qc8_dwconv_minmax_fp32_test",
7990 timeout = "moderate",
7991 srcs = [
7992 "test/qc8-dwconv-minmax-fp32.cc",
7993 "test/dwconv-microkernel-tester.h",
7994 "src/xnnpack/AlignedAllocator.h",
7995 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7996 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7997)
7998
7999xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07008000 name = "qc8_gemm_minmax_fp32_test",
8001 timeout = "moderate",
8002 srcs = [
8003 "test/qc8-gemm-minmax-fp32.cc",
8004 "test/gemm-microkernel-tester.h",
8005 "src/xnnpack/AlignedAllocator.h",
8006 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8007 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8008)
8009
8010xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07008011 name = "qc8_igemm_minmax_fp32_test",
8012 timeout = "moderate",
8013 srcs = [
8014 "test/qc8-igemm-minmax-fp32.cc",
8015 "test/gemm-microkernel-tester.h",
8016 "src/xnnpack/AlignedAllocator.h",
8017 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8018 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8019)
8020
8021xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07008022 name = "qs8_dwconv_minmax_fp32_test",
8023 srcs = [
8024 "test/qs8-dwconv-minmax-fp32.cc",
8025 "test/dwconv-microkernel-tester.h",
8026 "src/xnnpack/AlignedAllocator.h",
8027 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8028 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8029)
8030
8031xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008032 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07008033 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008034 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07008035 "test/dwconv-microkernel-tester.h",
8036 "src/xnnpack/AlignedAllocator.h",
8037 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8038 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8039)
8040
8041xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07008042 name = "qs8_dwconv_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008043 srcs = [
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07008044 "test/qs8-dwconv-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008045 "test/dwconv-microkernel-tester.h",
8046 "src/xnnpack/AlignedAllocator.h",
8047 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8048 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8049)
8050
8051xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07008052 name = "qs8_gavgpool_minmax_test",
8053 srcs = [
8054 "test/qs8-gavgpool-minmax.cc",
8055 "test/gavgpool-microkernel-tester.h",
8056 "src/xnnpack/AlignedAllocator.h",
8057 ] + MICROKERNEL_TEST_HDRS,
8058 deps = MICROKERNEL_TEST_DEPS,
8059)
8060
8061xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008062 name = "qs8_gemm_minmax_fp32_test",
8063 timeout = "moderate",
8064 srcs = [
8065 "test/qs8-gemm-minmax-fp32.cc",
8066 "test/gemm-microkernel-tester.h",
8067 "src/xnnpack/AlignedAllocator.h",
8068 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8069 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8070)
8071
8072xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008073 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07008074 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07008075 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008076 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07008077 "test/gemm-microkernel-tester.h",
8078 "src/xnnpack/AlignedAllocator.h",
8079 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8080 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8081)
8082
8083xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008084 name = "qs8_gemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008085 timeout = "moderate",
8086 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07008087 "test/qs8-gemm-minmax-rndnu.cc",
8088 "test/gemm-microkernel-tester.h",
8089 "src/xnnpack/AlignedAllocator.h",
8090 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8091 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8092)
8093
8094xnnpack_unit_test(
8095 name = "qs8_igemm_minmax_fp32_test",
8096 timeout = "moderate",
8097 srcs = [
8098 "test/qs8-igemm-minmax-fp32.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008099 "test/gemm-microkernel-tester.h",
8100 "src/xnnpack/AlignedAllocator.h",
8101 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8102 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8103)
8104
8105xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008106 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07008107 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07008108 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07008109 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07008110 "test/gemm-microkernel-tester.h",
8111 "src/xnnpack/AlignedAllocator.h",
8112 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8113 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8114)
8115
8116xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -07008117 name = "qs8_igemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008118 timeout = "moderate",
8119 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -07008120 "test/qs8-igemm-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07008121 "test/gemm-microkernel-tester.h",
8122 "src/xnnpack/AlignedAllocator.h",
8123 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8124 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8125)
8126
8127xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07008128 name = "qs8_requantization_test",
8129 srcs = [
8130 "src/xnnpack/requantization-stubs.h",
8131 "test/qs8-requantization.cc",
8132 "test/requantization-tester.h",
8133 ] + MICROKERNEL_TEST_HDRS,
8134 deps = MICROKERNEL_TEST_DEPS,
8135)
8136
8137xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07008138 name = "qs8_vadd_minmax_test",
8139 srcs = [
8140 "test/qs8-vadd-minmax.cc",
8141 "test/vadd-microkernel-tester.h",
8142 ] + MICROKERNEL_TEST_HDRS,
8143 deps = MICROKERNEL_TEST_DEPS,
8144)
8145
8146xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07008147 name = "qs8_vaddc_minmax_test",
8148 srcs = [
8149 "test/qs8-vaddc-minmax.cc",
8150 "test/vaddc-microkernel-tester.h",
8151 ] + MICROKERNEL_TEST_HDRS,
8152 deps = MICROKERNEL_TEST_DEPS,
8153)
8154
8155xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008156 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008157 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008158 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008159 "test/avgpool-microkernel-tester.h",
8160 "src/xnnpack/AlignedAllocator.h",
8161 ] + MICROKERNEL_TEST_HDRS,
8162 deps = MICROKERNEL_TEST_DEPS,
8163)
8164
8165xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07008166 name = "qu8_dwconv_minmax_fp32_test",
8167 srcs = [
8168 "test/qu8-dwconv-minmax-fp32.cc",
8169 "test/dwconv-microkernel-tester.h",
8170 "src/xnnpack/AlignedAllocator.h",
8171 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8172 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8173)
8174
8175xnnpack_unit_test(
Marat Dukhan73a899a2021-07-27 00:10:38 -07008176 name = "qu8_dwconv_minmax_rndnu_test",
8177 srcs = [
8178 "test/qu8-dwconv-minmax-rndnu.cc",
8179 "test/dwconv-microkernel-tester.h",
8180 "src/xnnpack/AlignedAllocator.h",
8181 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8182 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8183)
8184
8185xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008186 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008187 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008188 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008189 "test/gavgpool-microkernel-tester.h",
8190 "src/xnnpack/AlignedAllocator.h",
8191 ] + MICROKERNEL_TEST_HDRS,
8192 deps = MICROKERNEL_TEST_DEPS,
8193)
8194
8195xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -07008196 name = "qu8_gemm_minmax_fp32_test",
8197 srcs = [
8198 "test/qu8-gemm-minmax-fp32.cc",
8199 "test/gemm-microkernel-tester.h",
8200 "src/xnnpack/AlignedAllocator.h",
8201 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8202 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8203)
8204
8205xnnpack_unit_test(
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008206 name = "qu8_gemm_minmax_gemmlowp_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008207 srcs = [
Marat Dukhanc2e8f662021-07-01 17:06:34 -07008208 "test/qu8-gemm-minmax-gemmlowp.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008209 "test/gemm-microkernel-tester.h",
8210 "src/xnnpack/AlignedAllocator.h",
8211 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008212 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008213)
8214
8215xnnpack_unit_test(
Marat Dukhan173661d2021-07-26 23:47:08 -07008216 name = "qu8_gemm_minmax_rndnu_test",
8217 srcs = [
8218 "test/qu8-gemm-minmax-rndnu.cc",
8219 "test/gemm-microkernel-tester.h",
8220 "src/xnnpack/AlignedAllocator.h",
8221 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8222 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8223)
8224
8225xnnpack_unit_test(
8226 name = "qu8_igemm_minmax_fp32_test",
8227 srcs = [
8228 "test/qu8-igemm-minmax-fp32.cc",
8229 "test/gemm-microkernel-tester.h",
8230 "src/xnnpack/AlignedAllocator.h",
8231 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8232 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8233)
8234
8235xnnpack_unit_test(
8236 name = "qu8_igemm_minmax_gemmlowp_test",
8237 srcs = [
8238 "test/qu8-igemm-minmax-gemmlowp.cc",
8239 "test/gemm-microkernel-tester.h",
8240 "src/xnnpack/AlignedAllocator.h",
8241 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8242 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8243)
8244
8245xnnpack_unit_test(
8246 name = "qu8_igemm_minmax_rndnu_test",
8247 srcs = [
8248 "test/qu8-igemm-minmax-rndnu.cc",
8249 "test/gemm-microkernel-tester.h",
8250 "src/xnnpack/AlignedAllocator.h",
8251 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
8252 deps = MICROKERNEL_TEST_DEPS + [":packing"],
8253)
8254
8255xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07008256 name = "qu8_requantization_test",
8257 srcs = [
8258 "src/xnnpack/requantization-stubs.h",
8259 "test/qu8-requantization.cc",
8260 "test/requantization-tester.h",
8261 ] + MICROKERNEL_TEST_HDRS,
8262 deps = MICROKERNEL_TEST_DEPS,
8263)
8264
8265xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008266 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008267 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07008268 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008269 "test/vadd-microkernel-tester.h",
8270 ] + MICROKERNEL_TEST_HDRS,
8271 deps = MICROKERNEL_TEST_DEPS,
8272)
8273
8274xnnpack_unit_test(
Marat Dukhan76e78c82021-07-20 21:11:23 -07008275 name = "qu8_vaddc_minmax_test",
8276 srcs = [
8277 "test/qu8-vaddc-minmax.cc",
8278 "test/vaddc-microkernel-tester.h",
8279 ] + MICROKERNEL_TEST_HDRS,
8280 deps = MICROKERNEL_TEST_DEPS,
8281)
8282
8283xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008284 name = "u8_lut32norm_test",
8285 srcs = [
8286 "test/u8-lut32norm.cc",
8287 "test/lut-norm-microkernel-tester.h",
8288 ] + MICROKERNEL_TEST_HDRS,
8289 deps = MICROKERNEL_TEST_DEPS,
8290)
8291
8292xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07008293 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008294 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07008295 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008296 "test/maxpool-microkernel-tester.h",
8297 ] + MICROKERNEL_TEST_HDRS,
8298 deps = MICROKERNEL_TEST_DEPS,
8299)
8300
8301xnnpack_unit_test(
8302 name = "u8_rmax_test",
8303 srcs = [
8304 "test/u8-rmax.cc",
8305 "test/rmax-microkernel-tester.h",
8306 ] + MICROKERNEL_TEST_HDRS,
8307 deps = MICROKERNEL_TEST_DEPS,
8308)
8309
8310xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07008311 name = "u8_vclamp_test",
8312 srcs = [
8313 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07008314 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07008315 ] + MICROKERNEL_TEST_HDRS,
8316 deps = MICROKERNEL_TEST_DEPS,
8317)
8318
8319xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008320 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08008321 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08008322 "test/x32-depthtospace2d-chw2hwc.cc",
8323 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08008324 ] + MICROKERNEL_TEST_HDRS,
8325 deps = MICROKERNEL_TEST_DEPS,
8326)
8327
8328xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07008329 name = "x32_fill_test",
8330 srcs = [
8331 "test/x32-fill.cc",
8332 "test/fill-microkernel-tester.h",
8333 ] + MICROKERNEL_TEST_HDRS,
8334 deps = MICROKERNEL_TEST_DEPS,
8335)
8336
8337xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008338 name = "x32_packx_test",
8339 srcs = [
8340 "test/x32-packx.cc",
8341 "test/pack-microkernel-tester.h",
8342 "src/xnnpack/AlignedAllocator.h",
8343 ] + MICROKERNEL_TEST_HDRS,
8344 deps = MICROKERNEL_TEST_DEPS,
8345)
8346
8347xnnpack_unit_test(
8348 name = "x32_pad_test",
8349 srcs = [
8350 "test/x32-pad.cc",
8351 "test/pad-microkernel-tester.h",
8352 ] + MICROKERNEL_TEST_HDRS,
8353 deps = MICROKERNEL_TEST_DEPS,
8354)
8355
8356xnnpack_unit_test(
8357 name = "x32_unpool_test",
8358 srcs = [
8359 "test/x32-unpool.cc",
8360 "test/unpool-microkernel-tester.h",
8361 ] + MICROKERNEL_TEST_HDRS,
8362 deps = MICROKERNEL_TEST_DEPS,
8363)
8364
8365xnnpack_unit_test(
8366 name = "x32_zip_test",
8367 srcs = [
8368 "test/x32-zip.cc",
8369 "test/zip-microkernel-tester.h",
8370 ] + MICROKERNEL_TEST_HDRS,
8371 deps = MICROKERNEL_TEST_DEPS,
8372)
8373
8374xnnpack_unit_test(
8375 name = "x8_lut_test",
8376 srcs = [
8377 "test/x8-lut.cc",
8378 "test/lut-microkernel-tester.h",
8379 ] + MICROKERNEL_TEST_HDRS,
8380 deps = MICROKERNEL_TEST_DEPS,
8381)
8382
8383xnnpack_unit_test(
8384 name = "x8_zip_test",
8385 srcs = [
8386 "test/x8-zip.cc",
8387 "test/zip-microkernel-tester.h",
8388 ] + MICROKERNEL_TEST_HDRS,
8389 deps = MICROKERNEL_TEST_DEPS,
8390)
8391
Marat Dukhan20c3b922020-03-10 03:45:06 -07008392########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008393
8394xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07008395 name = "operator_size_test",
8396 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008397 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008398)
8399
Marat Dukhan20c3b922020-03-10 03:45:06 -07008400xnnpack_binary(
8401 name = "subgraph_size_test",
8402 srcs = ["test/subgraph-size.c"],
8403 deps = [":XNNPACK"],
8404)
8405
8406########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008407
8408xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008409 name = "abs_nc_test",
8410 srcs = [
8411 "test/abs-nc.cc",
8412 "test/abs-operator-tester.h",
8413 ],
8414 deps = OPERATOR_TEST_DEPS,
8415)
8416
8417xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008418 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008419 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008420 srcs = [
8421 "test/add-nd.cc",
8422 "test/binary-elementwise-operator-tester.h",
8423 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008424 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008425)
8426
8427xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008428 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008429 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008430 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008431 "test/argmax-pooling-operator-tester.h",
8432 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008433 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008434)
8435
8436xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008437 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008438 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008439 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008440 "test/average-pooling-operator-tester.h",
8441 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008442 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008443)
8444
8445xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008446 name = "bankers_rounding_nc_test",
8447 srcs = [
8448 "test/bankers-rounding-nc.cc",
8449 "test/bankers-rounding-operator-tester.h",
8450 ],
8451 deps = OPERATOR_TEST_DEPS,
8452)
8453
8454xnnpack_unit_test(
8455 name = "ceiling_nc_test",
8456 srcs = [
8457 "test/ceiling-nc.cc",
8458 "test/ceiling-operator-tester.h",
8459 ],
8460 deps = OPERATOR_TEST_DEPS,
8461)
8462
8463xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008464 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008465 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008466 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008467 "test/channel-shuffle-operator-tester.h",
8468 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008469 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008470)
8471
8472xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008473 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008474 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008475 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008476 "test/clamp-operator-tester.h",
8477 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008478 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008479)
8480
8481xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07008482 name = "constant_pad_nd_test",
8483 srcs = [
8484 "test/constant-pad-nd.cc",
8485 "test/constant-pad-operator-tester.h",
8486 ],
8487 deps = OPERATOR_TEST_DEPS,
8488)
8489
8490xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008491 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008492 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008493 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008494 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008495 "test/convolution-operator-tester.h",
8496 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008497 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008498)
8499
8500xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008501 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008502 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008503 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008504 "test/convolution-nchw.cc",
8505 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008506 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008507 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008508)
8509
8510xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07008511 name = "copy_nc_test",
8512 srcs = [
8513 "test/copy-nc.cc",
8514 "test/copy-operator-tester.h",
8515 ],
8516 deps = OPERATOR_TEST_DEPS,
8517)
8518
8519xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008520 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08008521 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008522 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008523 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008524 "test/deconvolution-operator-tester.h",
8525 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008526 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008527)
8528
8529xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08008530 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008531 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08008532 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08008533 "test/depth-to-space-operator-tester.h",
8534 ] + OPERATOR_TEST_PARAMS_HDRS,
8535 deps = OPERATOR_TEST_DEPS,
8536)
8537
8538xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08008539 name = "depth_to_space_nhwc_test",
8540 srcs = [
8541 "test/depth-to-space-nhwc.cc",
8542 "test/depth-to-space-operator-tester.h",
8543 ] + OPERATOR_TEST_PARAMS_HDRS,
8544 deps = OPERATOR_TEST_DEPS,
8545)
8546
8547xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08008548 name = "divide_nd_test",
8549 srcs = [
8550 "test/binary-elementwise-operator-tester.h",
8551 "test/divide-nd.cc",
8552 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008553 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08008554)
8555
8556xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08008557 name = "elu_nc_test",
8558 srcs = [
8559 "test/elu-nc.cc",
8560 "test/elu-operator-tester.h",
8561 ],
8562 deps = OPERATOR_TEST_DEPS,
8563)
8564
8565xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008566 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008567 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008568 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008569 "test/fully-connected-operator-tester.h",
8570 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008571 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008572)
8573
8574xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008575 name = "floor_nc_test",
8576 srcs = [
8577 "test/floor-nc.cc",
8578 "test/floor-operator-tester.h",
8579 ],
8580 deps = OPERATOR_TEST_DEPS,
8581)
8582
8583xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008584 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008585 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008586 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008587 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07008588 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008589 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008590)
8591
8592xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008593 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008594 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008595 "test/global-average-pooling-ncw.cc",
8596 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008597 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008598 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008599)
8600
8601xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008602 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008603 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008604 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008605 "test/hardswish-operator-tester.h",
8606 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008607 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008608)
8609
8610xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008611 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008612 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008613 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008614 "test/leaky-relu-operator-tester.h",
8615 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008616 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008617)
8618
8619xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008620 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08008621 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008622 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008623 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008624 "test/max-pooling-operator-tester.h",
8625 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008626 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008627)
8628
8629xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08008630 name = "maximum_nd_test",
8631 srcs = [
8632 "test/binary-elementwise-operator-tester.h",
8633 "test/maximum-nd.cc",
8634 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008635 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008636)
8637
8638xnnpack_unit_test(
8639 name = "minimum_nd_test",
8640 srcs = [
8641 "test/binary-elementwise-operator-tester.h",
8642 "test/minimum-nd.cc",
8643 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008644 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08008645)
8646
8647xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008648 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008649 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08008650 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008651 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08008652 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008653 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08008654)
8655
8656xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008657 name = "negate_nc_test",
8658 srcs = [
8659 "test/negate-nc.cc",
8660 "test/negate-operator-tester.h",
8661 ],
8662 deps = OPERATOR_TEST_DEPS,
8663)
8664
8665xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008666 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008667 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008668 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008669 "test/prelu-operator-tester.h",
8670 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008671 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008672)
8673
8674xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008675 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08008676 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008677 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08008678 "test/resize-bilinear-operator-tester.h",
8679 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07008680 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08008681)
8682
8683xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07008684 name = "resize_bilinear_nchw_test",
8685 srcs = [
8686 "test/resize-bilinear-nchw.cc",
8687 "test/resize-bilinear-operator-tester.h",
8688 ] + OPERATOR_TEST_PARAMS_HDRS,
8689 deps = OPERATOR_TEST_DEPS,
8690)
8691
8692xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008693 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008694 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008695 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008696 "test/sigmoid-operator-tester.h",
8697 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008698 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008699)
8700
8701xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008702 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008703 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08008704 "test/softmax-nc.cc",
8705 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008706 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008707 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008708)
8709
8710xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07008711 name = "square_nc_test",
8712 srcs = [
8713 "test/square-nc.cc",
8714 "test/square-operator-tester.h",
8715 ],
8716 deps = OPERATOR_TEST_DEPS,
8717)
8718
8719xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07008720 name = "square_root_nc_test",
8721 srcs = [
8722 "test/square-root-nc.cc",
8723 "test/square-root-operator-tester.h",
8724 ],
8725 deps = OPERATOR_TEST_DEPS,
8726)
8727
8728xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07008729 name = "squared_difference_nd_test",
8730 srcs = [
8731 "test/binary-elementwise-operator-tester.h",
8732 "test/squared-difference-nd.cc",
8733 ],
8734 deps = OPERATOR_TEST_DEPS,
8735)
8736
8737xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008738 name = "subtract_nd_test",
8739 srcs = [
8740 "test/binary-elementwise-operator-tester.h",
8741 "test/subtract-nd.cc",
8742 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008743 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08008744)
8745
8746xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07008747 name = "truncation_nc_test",
8748 srcs = [
8749 "test/truncation-nc.cc",
8750 "test/truncation-operator-tester.h",
8751 ],
8752 deps = OPERATOR_TEST_DEPS,
8753)
8754
8755xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08008756 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008757 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08008758 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008759 "test/unpooling-operator-tester.h",
8760 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07008761 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07008762)
8763
Chao Mei6ddfc602020-05-13 22:29:36 -07008764############################### Misc unit tests ###############################
8765
8766xnnpack_unit_test(
8767 name = "memory_planner_test",
8768 srcs = [
8769 "test/memory-planner-test.cc",
8770 ],
8771 deps = [
8772 ":XNNPACK",
8773 ":memory_planner",
8774 ],
8775)
8776
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008777xnnpack_unit_test(
8778 name = "subgraph_nchw_test",
8779 srcs = [
8780 "src/xnnpack/subgraph.h",
8781 "test/subgraph-nchw.cc",
8782 "test/subgraph-tester.h",
8783 ],
8784 deps = [
8785 ":XNNPACK",
8786 ],
8787)
8788
Marat Dukhan08c4a432019-10-03 09:29:21 -07008789############################# Build configurations #############################
8790
Marat Dukhanb8642352019-10-30 15:43:02 -07008791# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008792config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008793 name = "xnn_enable_assembly_explicit_true",
8794 define_values = {"xnn_enable_assembly": "true"},
8795)
8796
8797# Disables usage of assembly kernels.
8798config_setting(
8799 name = "xnn_enable_assembly_explicit_false",
8800 define_values = {"xnn_enable_assembly": "false"},
8801)
8802
Marat Dukhan9de90e02020-06-18 16:04:12 -07008803# Enables usage of sparse inference.
8804config_setting(
8805 name = "xnn_enable_sparse_explicit_true",
8806 define_values = {"xnn_enable_sparse": "true"},
8807)
8808
8809# Disables usage of sparse inference.
8810config_setting(
8811 name = "xnn_enable_sparse_explicit_false",
8812 define_values = {"xnn_enable_sparse": "false"},
8813)
8814
Marat Dukhan05702cf2020-03-26 15:41:33 -07008815# Disables usage of HMP-aware optimizations.
8816config_setting(
8817 name = "xnn_enable_hmp_explicit_false",
8818 define_values = {"xnn_enable_hmp": "false"},
8819)
8820
Chao Mei6ddfc602020-05-13 22:29:36 -07008821# Enable usage of optimized memory allocation
8822config_setting(
8823 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008824 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008825)
8826
8827# Disable usage of optimized memory allocation
8828config_setting(
8829 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008830 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008831)
8832
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008833# Enable QS8 inference in TFLite-specific version
8834config_setting(
8835 name = "xnn_enable_qs8_explicit_true",
8836 define_values = {"xnn_enable_qs8": "true"},
8837)
8838
8839# Disable QS8 inference in TFLite-specific version
8840config_setting(
8841 name = "xnn_enable_qs8_explicit_false",
8842 define_values = {"xnn_enable_qs8": "false"},
8843)
8844
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008845# Enable QU8 inference in TFLite-specific version
8846config_setting(
8847 name = "xnn_enable_qu8_explicit_true",
8848 define_values = {"xnn_enable_qu8": "true"},
8849)
8850
8851# Disable QU8 inference in TFLite-specific version
8852config_setting(
8853 name = "xnn_enable_qu8_explicit_false",
8854 define_values = {"xnn_enable_qu8": "false"},
8855)
8856
Marat Dukhanb8642352019-10-30 15:43:02 -07008857# Builds with -c dbg
8858config_setting(
8859 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008860 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008861 "compilation_mode": "dbg",
8862 },
8863)
8864
8865# Builds with -c opt
8866config_setting(
8867 name = "optimized_build",
8868 values = {
8869 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008870 },
8871)
8872
8873config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008874 name = "linux_k8",
8875 values = {"cpu": "k8"},
8876)
8877
8878config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008879 name = "linux_arm",
8880 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008881)
8882
8883config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008884 name = "linux_armeabi",
8885 values = {"cpu": "armeabi"},
8886)
8887
8888config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008889 name = "linux_armhf",
8890 values = {"cpu": "armhf"},
8891)
8892
8893config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008894 name = "linux_armv7a",
8895 values = {"cpu": "armv7a"},
8896)
8897
8898config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008899 name = "linux_aarch64",
8900 values = {"cpu": "aarch64"},
8901)
8902
8903config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008904 name = "android",
8905 values = {"crosstool_top": "//external:android/crosstool"},
8906)
8907
8908config_setting(
8909 name = "android_armv7",
8910 values = {
8911 "crosstool_top": "//external:android/crosstool",
8912 "cpu": "armeabi-v7a",
8913 },
8914)
8915
8916config_setting(
8917 name = "android_arm64",
8918 values = {
8919 "crosstool_top": "//external:android/crosstool",
8920 "cpu": "arm64-v8a",
8921 },
8922)
8923
8924config_setting(
8925 name = "android_x86",
8926 values = {
8927 "crosstool_top": "//external:android/crosstool",
8928 "cpu": "x86",
8929 },
8930)
8931
8932config_setting(
8933 name = "android_x86_64",
8934 values = {
8935 "crosstool_top": "//external:android/crosstool",
8936 "cpu": "x86_64",
8937 },
8938)
8939
8940config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008941 name = "windows_x86_64",
8942 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008943)
8944
8945config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008946 name = "windows_x86_64_clang",
8947 values = {
8948 "compiler": "clang-cl",
8949 "cpu": "x64_windows",
8950 },
8951)
8952
8953config_setting(
8954 name = "windows_x86_64_mingw",
8955 values = {
8956 "compiler": "mingw-gcc",
8957 "cpu": "x64_windows",
8958 },
8959)
8960
8961config_setting(
8962 name = "windows_x86_64_msys",
8963 values = {
8964 "compiler": "msys-gcc",
8965 "cpu": "x64_windows",
8966 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008967)
8968
8969config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008970 name = "macos_x86_64",
8971 values = {
8972 "apple_platform_type": "macos",
8973 "cpu": "darwin",
8974 },
8975)
8976
8977config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008978 name = "macos_arm64",
8979 values = {
8980 "apple_platform_type": "macos",
8981 "cpu": "darwin_arm64",
8982 },
8983)
8984
8985config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008986 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008987 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008988)
8989
8990config_setting(
8991 name = "emscripten_wasm",
8992 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008993 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008994 "cpu": "wasm",
8995 },
8996)
8997
8998config_setting(
8999 name = "emscripten_wasmsimd",
9000 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07009001 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07009002 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07009003 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07009004 },
9005)
9006
9007config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009008 name = "ios_armv7",
9009 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009010 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009011 "cpu": "ios_armv7",
9012 },
9013)
9014
9015config_setting(
9016 name = "ios_arm64",
9017 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009018 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009019 "cpu": "ios_arm64",
9020 },
9021)
9022
9023config_setting(
9024 name = "ios_arm64e",
9025 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009026 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009027 "cpu": "ios_arm64e",
9028 },
9029)
9030
9031config_setting(
9032 name = "ios_x86",
9033 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009034 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009035 "cpu": "ios_i386",
9036 },
9037)
9038
9039config_setting(
9040 name = "ios_x86_64",
9041 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009042 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009043 "cpu": "ios_x86_64",
9044 },
9045)
9046
9047config_setting(
9048 name = "watchos_armv7k",
9049 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009050 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009051 "cpu": "watchos_armv7k",
9052 },
9053)
9054
9055config_setting(
9056 name = "watchos_arm64_32",
9057 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009058 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009059 "cpu": "watchos_arm64_32",
9060 },
9061)
9062
9063config_setting(
9064 name = "watchos_x86",
9065 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009066 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009067 "cpu": "watchos_i386",
9068 },
9069)
9070
9071config_setting(
9072 name = "watchos_x86_64",
9073 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009074 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009075 "cpu": "watchos_x86_64",
9076 },
9077)
9078
9079config_setting(
9080 name = "tvos_arm64",
9081 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009082 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009083 "cpu": "tvos_arm64",
9084 },
9085)
9086
9087config_setting(
9088 name = "tvos_x86_64",
9089 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08009090 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08009091 "cpu": "tvos_x86_64",
9092 },
9093)