| Frank Barchard | 1a95305 | 2020-11-16 18:44:58 -0800 | [diff] [blame] | 1 | # Copyright 2020 Google LLC |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2 | # |
| 3 | # This source code is licensed under the BSD-style license found in the |
| 4 | # LICENSE file in the root directory of this source tree. |
| 5 | # |
| 6 | # Description: |
| 7 | # XNNPACK - optimized floating-point neural network operators library |
| 8 | |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9 | load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility") |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 10 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11 | licenses(["notice"]) |
| 12 | |
| 13 | exports_files(["LICENSE"]) |
| 14 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 15 | OPERATOR_BENCHMARK_DEPS = [ |
| 16 | ":XNNPACK", |
| 17 | ":bench_utils", |
| 18 | "@cpuinfo", |
| Frank Barchard | 0c84973 | 2020-06-12 13:31:32 -0700 | [diff] [blame] | 19 | "@FP16", |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 20 | "@pthreadpool", |
| 21 | ] |
| 22 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 23 | MICROKERNEL_BENCHMARK_DEPS = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 24 | ":bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 25 | ":bench_utils", |
| Frank Barchard | 7e95597 | 2019-10-11 10:34:25 -0700 | [diff] [blame] | 26 | ":enable_assembly", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 27 | "@cpuinfo", |
| 28 | "@FP16", |
| 29 | "@pthreadpool", |
| 30 | ] |
| 31 | |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 32 | ACCURACY_EVAL_DEPS = [ |
| 33 | ":XNNPACK", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 34 | ":bench_microkernels", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 35 | "@FP16", |
| 36 | "@pthreadpool", |
| 37 | ] |
| 38 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 39 | MICROKERNEL_TEST_DEPS = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 40 | ":test_microkernels", |
| Frank Barchard | 7e95597 | 2019-10-11 10:34:25 -0700 | [diff] [blame] | 41 | ":enable_assembly", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 42 | "@cpuinfo", |
| 43 | "@FP16", |
| 44 | "@pthreadpool", |
| 45 | ] |
| 46 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 47 | OPERATOR_TEST_DEPS = [ |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 48 | ":XNNPACK_test_mode", |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 49 | "@pthreadpool", |
| 50 | "@FP16", |
| 51 | ] |
| 52 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 53 | OPERATOR_SRCS = [ |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 54 | "src/operators/argmax-pooling-nhwc.c", |
| 55 | "src/operators/average-pooling-nhwc.c", |
| 56 | "src/operators/binary-elementwise-nd.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 57 | "src/operators/channel-shuffle-nc.c", |
| Marat Dukhan | 065b11e | 2020-05-22 09:49:41 -0700 | [diff] [blame] | 58 | "src/operators/constant-pad-nd.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 59 | "src/operators/convolution-nchw.c", |
| 60 | "src/operators/convolution-nhwc.c", |
| 61 | "src/operators/deconvolution-nhwc.c", |
| Marat Dukhan | 13b68f2 | 2020-11-12 11:55:19 -0800 | [diff] [blame] | 62 | "src/operators/depth-to-space-nchw2nhwc.c", |
| Marat Dukhan | 0e52117 | 2020-11-25 13:10:04 -0800 | [diff] [blame] | 63 | "src/operators/depth-to-space-nhwc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 64 | "src/operators/fully-connected-nc.c", |
| 65 | "src/operators/global-average-pooling-ncw.c", |
| 66 | "src/operators/global-average-pooling-nwc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 67 | "src/operators/leaky-relu-nc.c", |
| 68 | "src/operators/max-pooling-nhwc.c", |
| 69 | "src/operators/prelu-nc.c", |
| Artsiom Ablavatski | 9791810 | 2020-10-27 15:52:59 -0700 | [diff] [blame] | 70 | "src/operators/resize-bilinear-nchw.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 71 | "src/operators/resize-bilinear-nhwc.c", |
| 72 | "src/operators/sigmoid-nc.c", |
| 73 | "src/operators/softmax-nc.c", |
| Marat Dukhan | c3065f5 | 2020-06-04 13:33:32 -0700 | [diff] [blame] | 74 | "src/operators/unary-elementwise-nc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 75 | "src/operators/unpooling-nhwc.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 76 | ] |
| 77 | |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 78 | SUBGRAPH_SRCS = [ |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 79 | "src/subgraph/abs.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 80 | "src/subgraph/add2.c", |
| 81 | "src/subgraph/argmax-pooling-2d.c", |
| 82 | "src/subgraph/average-pooling-2d.c", |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 83 | "src/subgraph/bankers-rounding.c", |
| 84 | "src/subgraph/ceiling.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 85 | "src/subgraph/clamp.c", |
| 86 | "src/subgraph/convolution-2d.c", |
| 87 | "src/subgraph/deconvolution-2d.c", |
| Artsiom Ablavatski | bbe8506 | 2020-11-05 14:07:37 -0800 | [diff] [blame] | 88 | "src/subgraph/depth-to-space.c", |
| Frank Barchard | 9cef5ea | 2020-11-18 14:52:08 -0800 | [diff] [blame] | 89 | "src/subgraph/depthwise-convolution-2d.c", |
| Marat Dukhan | 9d3a459 | 2020-06-05 16:52:42 -0700 | [diff] [blame] | 90 | "src/subgraph/divide.c", |
| Marat Dukhan | a160020 | 2020-12-01 22:17:16 -0800 | [diff] [blame] | 91 | "src/subgraph/elu.c", |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 92 | "src/subgraph/floor.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 93 | "src/subgraph/fully-connected.c", |
| Marat Dukhan | a059b7d | 2020-06-11 11:41:27 -0700 | [diff] [blame] | 94 | "src/subgraph/global-average-pooling-2d.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 95 | "src/subgraph/hardswish.c", |
| Marat Dukhan | 5bbebac | 2020-06-10 19:42:15 -0700 | [diff] [blame] | 96 | "src/subgraph/leaky-relu.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 97 | "src/subgraph/max-pooling-2d.c", |
| Marat Dukhan | 9d3a459 | 2020-06-05 16:52:42 -0700 | [diff] [blame] | 98 | "src/subgraph/maximum2.c", |
| 99 | "src/subgraph/minimum2.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 100 | "src/subgraph/multiply2.c", |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 101 | "src/subgraph/negate.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 102 | "src/subgraph/prelu.c", |
| 103 | "src/subgraph/sigmoid.c", |
| 104 | "src/subgraph/softmax.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 105 | "src/subgraph/square-root.c", |
| 106 | "src/subgraph/square.c", |
| 107 | "src/subgraph/squared-difference.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 108 | "src/subgraph/static-constant-pad.c", |
| Marat Dukhan | d27202d | 2020-07-09 23:43:40 -0700 | [diff] [blame] | 109 | "src/subgraph/static-reshape.c", |
| Marat Dukhan | aff24e2 | 2020-07-23 01:43:58 -0700 | [diff] [blame] | 110 | "src/subgraph/static-resize-bilinear-2d.c", |
| Marat Dukhan | 9d3a459 | 2020-06-05 16:52:42 -0700 | [diff] [blame] | 111 | "src/subgraph/subtract.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 112 | "src/subgraph/unpooling-2d.c", |
| 113 | ] |
| 114 | |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 115 | TABLE_SRCS = [ |
| 116 | "src/tables/exp2-k-over-64.c", |
| 117 | "src/tables/exp2-k-over-2048.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 118 | "src/tables/exp2minus-k-over-4.c", |
| 119 | "src/tables/exp2minus-k-over-8.c", |
| Marat Dukhan | c60742b | 2020-11-23 12:33:27 -0800 | [diff] [blame] | 120 | "src/tables/exp2minus-k-over-16.c", |
| Marat Dukhan | 1f256fc | 2020-09-24 21:27:14 -0700 | [diff] [blame] | 121 | "src/tables/exp2minus-k-over-64.c", |
| 122 | "src/tables/exp2minus-k-over-2048.c", |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 123 | ] |
| 124 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 125 | PROD_SCALAR_MICROKERNEL_SRCS = [ |
| 126 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 127 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 128 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| 129 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 130 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| 131 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 132 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| 133 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| 134 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| 135 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 136 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 137 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 138 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 139 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 140 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| 141 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c", |
| 142 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 143 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c", |
| 144 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| 145 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c", |
| 146 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 147 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c", |
| 148 | "src/f32-gavgpool-cw/scalar-x1.c", |
| 149 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 150 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 151 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| 152 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 153 | "src/f32-gemm/gen/1x4-scalar.c", |
| 154 | "src/f32-gemm/gen/2x4-minmax-scalar.c", |
| 155 | "src/f32-gemm/gen/2x4-relu-scalar.c", |
| 156 | "src/f32-gemm/gen/2x4-scalar.c", |
| 157 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| 158 | "src/f32-gemm/gen/4x2-relu-scalar.c", |
| 159 | "src/f32-gemm/gen/4x2-scalar.c", |
| 160 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| 161 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 162 | "src/f32-gemm/gen/4x4-scalar.c", |
| 163 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| 164 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 165 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| 166 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 167 | "src/f32-igemm/gen/1x4-scalar.c", |
| 168 | "src/f32-igemm/gen/2x4-minmax-scalar.c", |
| 169 | "src/f32-igemm/gen/2x4-relu-scalar.c", |
| 170 | "src/f32-igemm/gen/2x4-scalar.c", |
| 171 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| 172 | "src/f32-igemm/gen/4x2-relu-scalar.c", |
| 173 | "src/f32-igemm/gen/4x2-scalar.c", |
| 174 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| 175 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 176 | "src/f32-igemm/gen/4x4-scalar.c", |
| 177 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 178 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 179 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 180 | "src/f32-prelu/gen/scalar-2x4.c", |
| 181 | "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c", |
| 182 | "src/f32-rmax/scalar.c", |
| 183 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 184 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 185 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 186 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 187 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 188 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| 189 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c", |
| 190 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| 191 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c", |
| 192 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| 193 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| 194 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| 195 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| 196 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 197 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| 198 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| 199 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c", |
| 200 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 201 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| 202 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| 203 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 204 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 205 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| 206 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c", |
| 207 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 208 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| 209 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| 210 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 211 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| 212 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 213 | "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c", |
| 214 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 215 | "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c", |
| 216 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 217 | "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c", |
| 218 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| 219 | "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c", |
| 220 | "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c", |
| 221 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 222 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 223 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 224 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| 225 | "src/params-init.c", |
| 226 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| 227 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| 228 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| 229 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| 230 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| 231 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| 232 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| 233 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| 234 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| 235 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | 66a3ca1 | 2021-08-06 18:24:19 -0700 | [diff] [blame] | 236 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c", |
| 237 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 238 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| 239 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| 240 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c", |
| 241 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c", |
| 242 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c", |
| 243 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c", |
| 244 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| 245 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| 246 | "src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c", |
| 247 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| 248 | "src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c", |
| 249 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| 250 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| 251 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| 252 | "src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c", |
| 253 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| 254 | "src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c", |
| 255 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | 66a3ca1 | 2021-08-06 18:24:19 -0700 | [diff] [blame] | 256 | "src/qs8-vadd/gen/minmax-scalar-x1.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 257 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 66a3ca1 | 2021-08-06 18:24:19 -0700 | [diff] [blame] | 258 | "src/qs8-vaddc/gen/minmax-scalar-x1.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 259 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 260 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 261 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 262 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 263 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 264 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 265 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 266 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 267 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| 268 | "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c", |
| 269 | "src/qu8-gavgpool/7x-minmax-scalar-c1.c", |
| 270 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| 271 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| 272 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| 273 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| 274 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| 275 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| 276 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| 277 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| 278 | "src/qu8-vadd/gen/minmax-scalar-x1.c", |
| 279 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| 280 | "src/qu8-vaddc/gen/minmax-scalar-x1.c", |
| 281 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 282 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 283 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 284 | "src/u8-lut32norm/scalar.c", |
| 285 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| 286 | "src/u8-rmax/scalar.c", |
| 287 | "src/u8-vclamp/scalar-x4.c", |
| 288 | "src/x8-lut/scalar.c", |
| 289 | "src/x8-zip/x2-scalar.c", |
| 290 | "src/x8-zip/x3-scalar.c", |
| 291 | "src/x8-zip/x4-scalar.c", |
| 292 | "src/x8-zip/xm-scalar.c", |
| 293 | "src/x32-depthtospace2d-chw2hwc/scalar.c", |
| 294 | "src/x32-fill/scalar-float.c", |
| 295 | "src/x32-fill/scalar-int.c", |
| 296 | "src/x32-packx/x2-scalar.c", |
| 297 | "src/x32-packx/x3-scalar.c", |
| 298 | "src/x32-packx/x4-scalar.c", |
| 299 | "src/x32-pad/scalar-float.c", |
| 300 | "src/x32-pad/scalar-int.c", |
| 301 | "src/x32-unpool/scalar.c", |
| 302 | "src/x32-zip/x2-scalar.c", |
| 303 | "src/x32-zip/x3-scalar.c", |
| 304 | "src/x32-zip/x4-scalar.c", |
| 305 | "src/x32-zip/xm-scalar.c", |
| 306 | "src/xx-copy/memcpy.c", |
| 307 | ] |
| 308 | |
| 309 | ALL_SCALAR_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 310 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 311 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 312 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 313 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 314 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 315 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 316 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 317 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 318 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 319 | "src/f32-dwconv/gen/up1x4-minmax-scalar.c", |
| 320 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 321 | "src/f32-dwconv/gen/up1x4-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 322 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 323 | "src/f32-dwconv/gen/up1x9-minmax-scalar.c", |
| 324 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 325 | "src/f32-dwconv/gen/up1x9-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 326 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 327 | "src/f32-dwconv/gen/up1x25-minmax-scalar.c", |
| 328 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 329 | "src/f32-dwconv/gen/up1x25-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 330 | "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 331 | "src/f32-dwconv/gen/up2x4-minmax-scalar.c", |
| 332 | "src/f32-dwconv/gen/up2x4-scalar-acc2.c", |
| 333 | "src/f32-dwconv/gen/up2x4-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 334 | "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 335 | "src/f32-dwconv/gen/up2x9-minmax-scalar.c", |
| 336 | "src/f32-dwconv/gen/up2x9-scalar-acc2.c", |
| 337 | "src/f32-dwconv/gen/up2x9-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 338 | "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 339 | "src/f32-dwconv/gen/up2x25-minmax-scalar.c", |
| 340 | "src/f32-dwconv/gen/up2x25-scalar-acc2.c", |
| 341 | "src/f32-dwconv/gen/up2x25-scalar.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 342 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c", |
| 343 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c", |
| 344 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c", |
| Marat Dukhan | 91249d2 | 2020-10-24 12:02:51 -0700 | [diff] [blame] | 345 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 346 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| Marat Dukhan | 91249d2 | 2020-10-24 12:02:51 -0700 | [diff] [blame] | 347 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c", |
| 348 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c", |
| 349 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c", |
| 350 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c", |
| 351 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c", |
| Marat Dukhan | cf5b3c3 | 2020-10-25 19:21:10 -0700 | [diff] [blame] | 352 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 353 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c", |
| 354 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 355 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c", |
| Marat Dukhan | cf5b3c3 | 2020-10-25 19:21:10 -0700 | [diff] [blame] | 356 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 357 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c", |
| 358 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c", |
| 359 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c", |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 360 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c", |
| 361 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c", |
| 362 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c", |
| 363 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 364 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c", |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 365 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c", |
| 366 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 367 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c", |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 368 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 369 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c", |
| Marat Dukhan | 29c0c33 | 2020-10-28 22:11:00 -0700 | [diff] [blame] | 370 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c", |
| 371 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c", |
| 372 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c", |
| 373 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 374 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c", |
| 375 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c", |
| 376 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c", |
| 377 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c", |
| 378 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c", |
| 379 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 380 | "src/f32-gavgpool-cw/scalar-x1.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 381 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 382 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 383 | "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c", |
| 384 | "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c", |
| 385 | "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 386 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| 387 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 388 | "src/f32-gemm/gen/1x4-scalar.c", |
| 389 | "src/f32-gemm/gen/2x4-minmax-scalar.c", |
| 390 | "src/f32-gemm/gen/2x4-relu-scalar.c", |
| 391 | "src/f32-gemm/gen/2x4-scalar.c", |
| 392 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| 393 | "src/f32-gemm/gen/4x2-relu-scalar.c", |
| 394 | "src/f32-gemm/gen/4x2-scalar.c", |
| 395 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| 396 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 397 | "src/f32-gemm/gen/4x4-scalar.c", |
| XNNPACK Team | 2143267 | 2020-10-19 19:58:48 -0700 | [diff] [blame] | 398 | "src/f32-ibilinear-chw/gen/scalar-p1.c", |
| 399 | "src/f32-ibilinear-chw/gen/scalar-p2.c", |
| 400 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 401 | "src/f32-ibilinear/gen/scalar-c1.c", |
| 402 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 403 | "src/f32-ibilinear/gen/scalar-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 404 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 405 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 406 | "src/f32-igemm/gen/1x4-scalar.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 407 | "src/f32-igemm/gen/2x4-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 408 | "src/f32-igemm/gen/2x4-relu-scalar.c", |
| 409 | "src/f32-igemm/gen/2x4-scalar.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 410 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 411 | "src/f32-igemm/gen/4x2-relu-scalar.c", |
| 412 | "src/f32-igemm/gen/4x2-scalar.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 413 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 414 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 415 | "src/f32-igemm/gen/4x4-scalar.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 416 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 417 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 418 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 419 | "src/f32-ppmm/gen/2x4-minmax-scalar.c", |
| 420 | "src/f32-ppmm/gen/3x3-minmax-scalar.c", |
| 421 | "src/f32-ppmm/gen/4x2-minmax-scalar.c", |
| 422 | "src/f32-ppmm/gen/4x4-minmax-scalar.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 423 | "src/f32-prelu/gen/scalar-2x1.c", |
| 424 | "src/f32-prelu/gen/scalar-2x4.c", |
| Marat Dukhan | f46f675 | 2020-01-21 11:03:49 -0800 | [diff] [blame] | 425 | "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c", |
| Marat Dukhan | f46f675 | 2020-01-21 11:03:49 -0800 | [diff] [blame] | 426 | "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 427 | "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c", |
| Marat Dukhan | f46f675 | 2020-01-21 11:03:49 -0800 | [diff] [blame] | 428 | "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c", |
| 429 | "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 430 | "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c", |
| Marat Dukhan | f46f675 | 2020-01-21 11:03:49 -0800 | [diff] [blame] | 431 | "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c", |
| Marat Dukhan | f46f675 | 2020-01-21 11:03:49 -0800 | [diff] [blame] | 432 | "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 433 | "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c", |
| Marat Dukhan | f46f675 | 2020-01-21 11:03:49 -0800 | [diff] [blame] | 434 | "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c", |
| 435 | "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 436 | "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 437 | "src/f32-rmax/scalar.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 438 | "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c", |
| 439 | "src/f32-spmm/gen/1x1-minmax-scalar.c", |
| 440 | "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c", |
| 441 | "src/f32-spmm/gen/2x1-minmax-scalar.c", |
| 442 | "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c", |
| 443 | "src/f32-spmm/gen/4x1-minmax-scalar.c", |
| 444 | "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c", |
| 445 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 446 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 447 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 448 | "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c", |
| 449 | "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c", |
| 450 | "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 451 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 452 | "src/f32-vbinary/gen/vadd-relu-scalar-x1.c", |
| 453 | "src/f32-vbinary/gen/vadd-relu-scalar-x2.c", |
| 454 | "src/f32-vbinary/gen/vadd-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 455 | "src/f32-vbinary/gen/vadd-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 456 | "src/f32-vbinary/gen/vadd-scalar-x1.c", |
| 457 | "src/f32-vbinary/gen/vadd-scalar-x2.c", |
| 458 | "src/f32-vbinary/gen/vadd-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 459 | "src/f32-vbinary/gen/vadd-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 460 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c", |
| 461 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c", |
| 462 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 463 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 464 | "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c", |
| 465 | "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c", |
| 466 | "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 467 | "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 468 | "src/f32-vbinary/gen/vaddc-scalar-x1.c", |
| 469 | "src/f32-vbinary/gen/vaddc-scalar-x2.c", |
| 470 | "src/f32-vbinary/gen/vaddc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 471 | "src/f32-vbinary/gen/vaddc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 472 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c", |
| 473 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| 474 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 475 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 476 | "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c", |
| 477 | "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c", |
| 478 | "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 479 | "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 480 | "src/f32-vbinary/gen/vdiv-scalar-x1.c", |
| 481 | "src/f32-vbinary/gen/vdiv-scalar-x2.c", |
| 482 | "src/f32-vbinary/gen/vdiv-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 483 | "src/f32-vbinary/gen/vdiv-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 484 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c", |
| 485 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| 486 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 487 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 488 | "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c", |
| 489 | "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c", |
| 490 | "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 491 | "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 492 | "src/f32-vbinary/gen/vdivc-scalar-x1.c", |
| 493 | "src/f32-vbinary/gen/vdivc-scalar-x2.c", |
| 494 | "src/f32-vbinary/gen/vdivc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 495 | "src/f32-vbinary/gen/vdivc-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 496 | "src/f32-vbinary/gen/vmax-scalar-x1.c", |
| 497 | "src/f32-vbinary/gen/vmax-scalar-x2.c", |
| 498 | "src/f32-vbinary/gen/vmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 499 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 500 | "src/f32-vbinary/gen/vmaxc-scalar-x1.c", |
| 501 | "src/f32-vbinary/gen/vmaxc-scalar-x2.c", |
| 502 | "src/f32-vbinary/gen/vmaxc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 503 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 504 | "src/f32-vbinary/gen/vmin-scalar-x1.c", |
| 505 | "src/f32-vbinary/gen/vmin-scalar-x2.c", |
| 506 | "src/f32-vbinary/gen/vmin-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 507 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 508 | "src/f32-vbinary/gen/vminc-scalar-x1.c", |
| 509 | "src/f32-vbinary/gen/vminc-scalar-x2.c", |
| 510 | "src/f32-vbinary/gen/vminc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 511 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 512 | "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c", |
| 513 | "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c", |
| 514 | "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 515 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 516 | "src/f32-vbinary/gen/vmul-relu-scalar-x1.c", |
| 517 | "src/f32-vbinary/gen/vmul-relu-scalar-x2.c", |
| 518 | "src/f32-vbinary/gen/vmul-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 519 | "src/f32-vbinary/gen/vmul-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 520 | "src/f32-vbinary/gen/vmul-scalar-x1.c", |
| 521 | "src/f32-vbinary/gen/vmul-scalar-x2.c", |
| 522 | "src/f32-vbinary/gen/vmul-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 523 | "src/f32-vbinary/gen/vmul-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 524 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c", |
| 525 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c", |
| 526 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 527 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 528 | "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c", |
| 529 | "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c", |
| 530 | "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 531 | "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 532 | "src/f32-vbinary/gen/vmulc-scalar-x1.c", |
| 533 | "src/f32-vbinary/gen/vmulc-scalar-x2.c", |
| 534 | "src/f32-vbinary/gen/vmulc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 535 | "src/f32-vbinary/gen/vmulc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 536 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c", |
| 537 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| 538 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 539 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 540 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c", |
| 541 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c", |
| 542 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 543 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 544 | "src/f32-vbinary/gen/vrdivc-scalar-x1.c", |
| 545 | "src/f32-vbinary/gen/vrdivc-scalar-x2.c", |
| 546 | "src/f32-vbinary/gen/vrdivc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 547 | "src/f32-vbinary/gen/vrdivc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 548 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c", |
| 549 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c", |
| 550 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 551 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 552 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c", |
| 553 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c", |
| 554 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 555 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 556 | "src/f32-vbinary/gen/vrsubc-scalar-x1.c", |
| 557 | "src/f32-vbinary/gen/vrsubc-scalar-x2.c", |
| 558 | "src/f32-vbinary/gen/vrsubc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 559 | "src/f32-vbinary/gen/vrsubc-scalar-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 560 | "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c", |
| 561 | "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c", |
| 562 | "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 563 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 564 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c", |
| 565 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c", |
| 566 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 567 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 568 | "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c", |
| 569 | "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c", |
| 570 | "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 571 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 572 | "src/f32-vbinary/gen/vsub-relu-scalar-x1.c", |
| 573 | "src/f32-vbinary/gen/vsub-relu-scalar-x2.c", |
| 574 | "src/f32-vbinary/gen/vsub-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 575 | "src/f32-vbinary/gen/vsub-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 576 | "src/f32-vbinary/gen/vsub-scalar-x1.c", |
| 577 | "src/f32-vbinary/gen/vsub-scalar-x2.c", |
| 578 | "src/f32-vbinary/gen/vsub-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 579 | "src/f32-vbinary/gen/vsub-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 580 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c", |
| 581 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c", |
| 582 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 583 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 584 | "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c", |
| 585 | "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c", |
| 586 | "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 587 | "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 588 | "src/f32-vbinary/gen/vsubc-scalar-x1.c", |
| 589 | "src/f32-vbinary/gen/vsubc-scalar-x2.c", |
| 590 | "src/f32-vbinary/gen/vsubc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 591 | "src/f32-vbinary/gen/vsubc-scalar-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 592 | "src/f32-vclamp/gen/vclamp-scalar-x1.c", |
| 593 | "src/f32-vclamp/gen/vclamp-scalar-x2.c", |
| 594 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 595 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c", |
| 596 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c", |
| 597 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c", |
| 598 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 599 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c", |
| 600 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c", |
| 601 | "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c", |
| 602 | "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c", |
| 603 | "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c", |
| 604 | "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c", |
| 605 | "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c", |
| 606 | "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 607 | "src/f32-vhswish/gen/vhswish-scalar-x1.c", |
| 608 | "src/f32-vhswish/gen/vhswish-scalar-x2.c", |
| 609 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 610 | "src/f32-vlrelu/gen/vlrelu-scalar-x1.c", |
| 611 | "src/f32-vlrelu/gen/vlrelu-scalar-x2.c", |
| 612 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 613 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 614 | "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c", |
| 615 | "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 616 | "src/f32-vrelu/gen/vrelu-scalar-x1.c", |
| 617 | "src/f32-vrelu/gen/vrelu-scalar-x2.c", |
| 618 | "src/f32-vrelu/gen/vrelu-scalar-x4.c", |
| 619 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 620 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 621 | "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c", |
| 622 | "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 623 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 624 | "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c", |
| 625 | "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c", |
| 626 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 627 | "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c", |
| 628 | "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c", |
| 629 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| 630 | "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c", |
| 631 | "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 632 | "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c", |
| 633 | "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c", |
| 634 | "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c", |
| 635 | "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c", |
| 636 | "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c", |
| 637 | "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c", |
| 638 | "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c", |
| 639 | "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c", |
| 640 | "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 641 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 642 | "src/f32-vsqrt/gen/scalar-sqrt-x2.c", |
| 643 | "src/f32-vsqrt/gen/scalar-sqrt-x4.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 644 | "src/f32-vunary/gen/vabs-scalar-x1.c", |
| 645 | "src/f32-vunary/gen/vabs-scalar-x2.c", |
| 646 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 647 | "src/f32-vunary/gen/vneg-scalar-x1.c", |
| 648 | "src/f32-vunary/gen/vneg-scalar-x2.c", |
| 649 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 650 | "src/f32-vunary/gen/vsqr-scalar-x1.c", |
| 651 | "src/f32-vunary/gen/vsqr-scalar-x2.c", |
| 652 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 653 | "src/math/expm1minus-scalar-rr2-lut4-p4.c", |
| 654 | "src/math/expm1minus-scalar-rr2-lut8-p3.c", |
| 655 | "src/math/expm1minus-scalar-rr2-lut8-p4.c", |
| Marat Dukhan | c60742b | 2020-11-23 12:33:27 -0800 | [diff] [blame] | 656 | "src/math/expm1minus-scalar-rr2-lut16-p3.c", |
| 657 | "src/math/expm1minus-scalar-rr2-lut16-p4.c", |
| 658 | "src/math/expm1minus-scalar-rr2-p5.c", |
| 659 | "src/math/expm1minus-scalar-rr2-p6.c", |
| Frank Barchard | 2213606 | 2020-11-24 18:44:46 -0800 | [diff] [blame] | 660 | "src/math/expminus-scalar-rr2-lut64-p2.c", |
| 661 | "src/math/expminus-scalar-rr2-lut2048-p1.c", |
| 662 | "src/math/expminus-scalar-rr2-p5.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 663 | "src/math/roundd-scalar-addsub.c", |
| 664 | "src/math/roundd-scalar-cvt.c", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 665 | "src/math/roundd-scalar-floor.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 666 | "src/math/roundne-scalar-addsub.c", |
| 667 | "src/math/roundne-scalar-nearbyint.c", |
| 668 | "src/math/roundne-scalar-rint.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 669 | "src/math/roundu-scalar-addsub.c", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 670 | "src/math/roundu-scalar-ceil.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 671 | "src/math/roundu-scalar-cvt.c", |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 672 | "src/math/roundz-scalar-addsub.c", |
| 673 | "src/math/roundz-scalar-cvt.c", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 674 | "src/math/roundz-scalar-trunc.c", |
| Marat Dukhan | f8475d6 | 2020-09-17 15:01:43 -0700 | [diff] [blame] | 675 | "src/math/sigmoid-scalar-rr2-lut64-p2-div.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 676 | "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c", |
| Marat Dukhan | f8475d6 | 2020-09-17 15:01:43 -0700 | [diff] [blame] | 677 | "src/math/sigmoid-scalar-rr2-p5-div.c", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 678 | "src/params-init.c", |
| Marat Dukhan | 5754706 | 2021-06-30 16:53:29 -0700 | [diff] [blame] | 679 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c", |
| 680 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c", |
| 681 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c", |
| 682 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c", |
| 683 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c", |
| 684 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| 685 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c", |
| 686 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| 687 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c", |
| 688 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c", |
| 689 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c", |
| 690 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d602154 | 2021-06-30 09:04:20 -0700 | [diff] [blame] | 691 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| 692 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| 693 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| 694 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| 695 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| 696 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| 697 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| 698 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| 699 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| 700 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| 701 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| 702 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| 703 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| 704 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| 705 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| 706 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| 707 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| 708 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| 709 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| 710 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| 711 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| 712 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| 713 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| 714 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| 715 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| 716 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| 717 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| 718 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| 719 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| 720 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| 721 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| 722 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | 85d772b | 2021-06-30 11:02:42 -0700 | [diff] [blame] | 723 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c", |
| 724 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c", |
| 725 | "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 726 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c", |
| 727 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c", |
| 728 | "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c", |
| Marat Dukhan | 85d772b | 2021-06-30 11:02:42 -0700 | [diff] [blame] | 729 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c", |
| 730 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| 731 | "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 732 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c", |
| 733 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| 734 | "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c", |
| Marat Dukhan | 85d772b | 2021-06-30 11:02:42 -0700 | [diff] [blame] | 735 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c", |
| 736 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c", |
| 737 | "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 738 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c", |
| 739 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c", |
| 740 | "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c", |
| Marat Dukhan | 047b620 | 2021-05-11 20:32:25 -0700 | [diff] [blame] | 741 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c", |
| 742 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c", |
| 743 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c", |
| 744 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c", |
| 745 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c", |
| 746 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 747 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| 748 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 749 | "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 750 | "src/qs8-gemm/gen/1x2-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 751 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| 752 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 753 | "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 754 | "src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 755 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| 756 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 757 | "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 758 | "src/qs8-gemm/gen/2x2-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 759 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| 760 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 761 | "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 762 | "src/qs8-gemm/gen/2x4-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 763 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| 764 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 765 | "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 766 | "src/qs8-gemm/gen/3x2-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 767 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| 768 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 769 | "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 770 | "src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 771 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| 772 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 773 | "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 774 | "src/qs8-gemm/gen/4x2-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 775 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| 776 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 777 | "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 778 | "src/qs8-gemm/gen/4x4-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 779 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| 780 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 781 | "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 782 | "src/qs8-igemm/gen/1x2-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 783 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| 784 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 785 | "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 786 | "src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 787 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| 788 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 789 | "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 790 | "src/qs8-igemm/gen/2x2-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 791 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| 792 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 793 | "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 794 | "src/qs8-igemm/gen/2x4-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 795 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| 796 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 797 | "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 798 | "src/qs8-igemm/gen/3x2-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 799 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| 800 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 801 | "src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 802 | "src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 803 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| 804 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 805 | "src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 806 | "src/qs8-igemm/gen/4x2-minmax-rndnu-scalar.c", |
| Marat Dukhan | 779b253 | 2021-06-29 14:14:13 -0700 | [diff] [blame] | 807 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| 808 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 809 | "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c", |
| Frank Barchard | 1a2dbe1 | 2021-07-22 20:13:58 -0700 | [diff] [blame] | 810 | "src/qs8-igemm/gen/4x4-minmax-rndnu-scalar.c", |
| Marat Dukhan | 2e23d2b | 2020-07-29 16:01:37 -0700 | [diff] [blame] | 811 | "src/qs8-requantization/fp32-scalar-lrintf.c", |
| 812 | "src/qs8-requantization/fp32-scalar-magic.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 813 | "src/qs8-requantization/gemmlowp-scalar.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 814 | "src/qs8-requantization/rndna-scalar-signed64.c", |
| 815 | "src/qs8-requantization/rndna-scalar-unsigned32.c", |
| 816 | "src/qs8-requantization/rndna-scalar-unsigned64.c", |
| Marat Dukhan | 062bee3 | 2021-05-27 20:31:07 -0700 | [diff] [blame] | 817 | "src/qs8-requantization/rndnu-scalar.c", |
| Marat Dukhan | d481c28 | 2021-05-11 23:48:31 -0700 | [diff] [blame] | 818 | "src/qs8-vadd/gen/minmax-scalar-x1.c", |
| 819 | "src/qs8-vadd/gen/minmax-scalar-x2.c", |
| 820 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| 821 | "src/qs8-vaddc/gen/minmax-scalar-x1.c", |
| 822 | "src/qs8-vaddc/gen/minmax-scalar-x2.c", |
| 823 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 7999341 | 2021-08-02 15:02:57 -0700 | [diff] [blame] | 824 | "src/qs8-vmul/gen/minmax-fp32-scalar-x1.c", |
| 825 | "src/qs8-vmul/gen/minmax-fp32-scalar-x2.c", |
| 826 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 827 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x1.c", |
| 828 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x2.c", |
| 829 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 830 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 831 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 1f71428 | 2021-07-15 15:41:32 -0700 | [diff] [blame] | 832 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c", |
| 833 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c", |
| 834 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c", |
| 835 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c", |
| 836 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c", |
| 837 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| 838 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c", |
| 839 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| 840 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c", |
| 841 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c", |
| 842 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c", |
| 843 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 844 | "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c", |
| 845 | "src/qu8-gavgpool/7x-minmax-scalar-c1.c", |
| Marat Dukhan | 927d474 | 2021-07-15 13:42:49 -0700 | [diff] [blame] | 846 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| 847 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| 848 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| 849 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| 850 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| 851 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| 852 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| 853 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| 854 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| 855 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| 856 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| 857 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| 858 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| 859 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| 860 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| 861 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | 927d474 | 2021-07-15 13:42:49 -0700 | [diff] [blame] | 862 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| 863 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| 864 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| 865 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| 866 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| 867 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| 868 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| 869 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| 870 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| 871 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| 872 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| 873 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| 874 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| 875 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| 876 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| 877 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 878 | "src/qu8-requantization/fp32-scalar-lrintf.c", |
| 879 | "src/qu8-requantization/fp32-scalar-magic.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 880 | "src/qu8-requantization/gemmlowp-scalar.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 881 | "src/qu8-requantization/rndna-scalar-signed64.c", |
| 882 | "src/qu8-requantization/rndna-scalar-unsigned32.c", |
| 883 | "src/qu8-requantization/rndna-scalar-unsigned64.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 884 | "src/qu8-vadd/gen/minmax-scalar-x1.c", |
| 885 | "src/qu8-vadd/gen/minmax-scalar-x2.c", |
| 886 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| 887 | "src/qu8-vaddc/gen/minmax-scalar-x1.c", |
| 888 | "src/qu8-vaddc/gen/minmax-scalar-x2.c", |
| 889 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 7999341 | 2021-08-02 15:02:57 -0700 | [diff] [blame] | 890 | "src/qu8-vmul/gen/minmax-fp32-scalar-x1.c", |
| 891 | "src/qu8-vmul/gen/minmax-fp32-scalar-x2.c", |
| 892 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 893 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x1.c", |
| 894 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x2.c", |
| 895 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 896 | "src/u8-lut32norm/scalar.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 897 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 898 | "src/u8-rmax/scalar.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 899 | "src/u8-vclamp/scalar-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 900 | "src/x8-lut/scalar.c", |
| 901 | "src/x8-zip/x2-scalar.c", |
| 902 | "src/x8-zip/x3-scalar.c", |
| 903 | "src/x8-zip/x4-scalar.c", |
| 904 | "src/x8-zip/xm-scalar.c", |
| Marat Dukhan | ad71b9a | 2020-11-20 00:01:51 -0800 | [diff] [blame] | 905 | "src/x32-depthtospace2d-chw2hwc/scalar.c", |
| Marat Dukhan | 3bb3bfc | 2020-05-19 17:42:46 -0700 | [diff] [blame] | 906 | "src/x32-fill/scalar-float.c", |
| 907 | "src/x32-fill/scalar-int.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 908 | "src/x32-packx/x2-scalar.c", |
| 909 | "src/x32-packx/x3-scalar.c", |
| 910 | "src/x32-packx/x4-scalar.c", |
| Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 911 | "src/x32-pad/scalar-float.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 912 | "src/x32-pad/scalar-int.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 913 | "src/x32-unpool/scalar.c", |
| 914 | "src/x32-zip/x2-scalar.c", |
| 915 | "src/x32-zip/x3-scalar.c", |
| 916 | "src/x32-zip/x4-scalar.c", |
| 917 | "src/x32-zip/xm-scalar.c", |
| Marat Dukhan | 048931b | 2020-11-24 20:53:54 -0800 | [diff] [blame] | 918 | "src/xx-copy/memcpy.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 919 | ] |
| 920 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 921 | ALL_WASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 922 | "src/f32-avgpool/9p8x-minmax-wasm-c1.c", |
| 923 | "src/f32-avgpool/9x-minmax-wasm-c1.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 924 | "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c", |
| 925 | "src/f32-dwconv/gen/up1x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 926 | "src/f32-dwconv/gen/up1x4-wasm-acc2.c", |
| 927 | "src/f32-dwconv/gen/up1x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 928 | "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c", |
| 929 | "src/f32-dwconv/gen/up1x9-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 930 | "src/f32-dwconv/gen/up1x9-wasm-acc2.c", |
| 931 | "src/f32-dwconv/gen/up1x9-wasm.c", |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 932 | "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c", |
| 933 | "src/f32-dwconv/gen/up1x25-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 934 | "src/f32-dwconv/gen/up1x25-wasm-acc2.c", |
| 935 | "src/f32-dwconv/gen/up1x25-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 936 | "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c", |
| 937 | "src/f32-dwconv/gen/up2x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 938 | "src/f32-dwconv/gen/up2x4-wasm-acc2.c", |
| 939 | "src/f32-dwconv/gen/up2x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 940 | "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c", |
| 941 | "src/f32-dwconv/gen/up2x9-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 942 | "src/f32-dwconv/gen/up2x9-wasm-acc2.c", |
| 943 | "src/f32-dwconv/gen/up2x9-wasm.c", |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 944 | "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c", |
| 945 | "src/f32-dwconv/gen/up2x25-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 946 | "src/f32-dwconv/gen/up2x25-wasm-acc2.c", |
| 947 | "src/f32-dwconv/gen/up2x25-wasm.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 948 | "src/f32-gavgpool/7p7x-minmax-wasm-c1.c", |
| 949 | "src/f32-gavgpool/7x-minmax-wasm-c1.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 950 | "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c", |
| 951 | "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c", |
| 952 | "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c", |
| 953 | "src/f32-gemm/gen/1x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 954 | "src/f32-gemm/gen/1x4-relu-wasm.c", |
| 955 | "src/f32-gemm/gen/1x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 956 | "src/f32-gemm/gen/2x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 957 | "src/f32-gemm/gen/2x4-relu-wasm.c", |
| 958 | "src/f32-gemm/gen/2x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 959 | "src/f32-gemm/gen/4x2-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 960 | "src/f32-gemm/gen/4x2-relu-wasm.c", |
| 961 | "src/f32-gemm/gen/4x2-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 962 | "src/f32-gemm/gen/4x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 963 | "src/f32-gemm/gen/4x4-relu-wasm.c", |
| 964 | "src/f32-gemm/gen/4x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 965 | "src/f32-igemm/gen/1x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 966 | "src/f32-igemm/gen/1x4-relu-wasm.c", |
| 967 | "src/f32-igemm/gen/1x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 968 | "src/f32-igemm/gen/2x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 969 | "src/f32-igemm/gen/2x4-relu-wasm.c", |
| 970 | "src/f32-igemm/gen/2x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 971 | "src/f32-igemm/gen/4x2-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 972 | "src/f32-igemm/gen/4x2-relu-wasm.c", |
| 973 | "src/f32-igemm/gen/4x2-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 974 | "src/f32-igemm/gen/4x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 975 | "src/f32-igemm/gen/4x4-relu-wasm.c", |
| 976 | "src/f32-igemm/gen/4x4-wasm.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 977 | "src/f32-maxpool/9p8x-minmax-wasm-c1.c", |
| 978 | "src/f32-pavgpool/9p8x-minmax-wasm-c1.c", |
| 979 | "src/f32-pavgpool/9x-minmax-wasm-c1.c", |
| Marat Dukhan | 7c1f808 | 2020-06-25 13:26:20 -0700 | [diff] [blame] | 980 | "src/f32-prelu/gen/wasm-2x1.c", |
| 981 | "src/f32-prelu/gen/wasm-2x4.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 982 | "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c", |
| 983 | "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c", |
| 984 | "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 985 | "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 986 | "src/f32-vbinary/gen/vadd-relu-wasm-x1.c", |
| 987 | "src/f32-vbinary/gen/vadd-relu-wasm-x2.c", |
| 988 | "src/f32-vbinary/gen/vadd-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 989 | "src/f32-vbinary/gen/vadd-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 990 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c", |
| 991 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c", |
| 992 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c", |
| 993 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 994 | "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c", |
| 995 | "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c", |
| 996 | "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 997 | "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 998 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c", |
| 999 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c", |
| 1000 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c", |
| 1001 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1002 | "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c", |
| 1003 | "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c", |
| 1004 | "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1005 | "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1006 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c", |
| 1007 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c", |
| 1008 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c", |
| 1009 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1010 | "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c", |
| 1011 | "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c", |
| 1012 | "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1013 | "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1014 | "src/f32-vbinary/gen/vmax-wasm-x1.c", |
| 1015 | "src/f32-vbinary/gen/vmax-wasm-x2.c", |
| 1016 | "src/f32-vbinary/gen/vmax-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1017 | "src/f32-vbinary/gen/vmax-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1018 | "src/f32-vbinary/gen/vmaxc-wasm-x1.c", |
| 1019 | "src/f32-vbinary/gen/vmaxc-wasm-x2.c", |
| 1020 | "src/f32-vbinary/gen/vmaxc-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1021 | "src/f32-vbinary/gen/vmaxc-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1022 | "src/f32-vbinary/gen/vmin-wasm-x1.c", |
| 1023 | "src/f32-vbinary/gen/vmin-wasm-x2.c", |
| 1024 | "src/f32-vbinary/gen/vmin-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1025 | "src/f32-vbinary/gen/vmin-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1026 | "src/f32-vbinary/gen/vminc-wasm-x1.c", |
| 1027 | "src/f32-vbinary/gen/vminc-wasm-x2.c", |
| 1028 | "src/f32-vbinary/gen/vminc-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1029 | "src/f32-vbinary/gen/vminc-wasm-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 1030 | "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c", |
| 1031 | "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c", |
| 1032 | "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1033 | "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1034 | "src/f32-vbinary/gen/vmul-relu-wasm-x1.c", |
| 1035 | "src/f32-vbinary/gen/vmul-relu-wasm-x2.c", |
| 1036 | "src/f32-vbinary/gen/vmul-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1037 | "src/f32-vbinary/gen/vmul-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1038 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c", |
| 1039 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c", |
| 1040 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c", |
| 1041 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1042 | "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c", |
| 1043 | "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c", |
| 1044 | "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1045 | "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1046 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c", |
| 1047 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c", |
| 1048 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c", |
| 1049 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1050 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c", |
| 1051 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c", |
| 1052 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1053 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1054 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c", |
| 1055 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c", |
| 1056 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c", |
| 1057 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1058 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c", |
| 1059 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c", |
| 1060 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1061 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1062 | "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c", |
| 1063 | "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c", |
| 1064 | "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c", |
| 1065 | "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1066 | "src/f32-vbinary/gen/vsub-relu-wasm-x1.c", |
| 1067 | "src/f32-vbinary/gen/vsub-relu-wasm-x2.c", |
| 1068 | "src/f32-vbinary/gen/vsub-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1069 | "src/f32-vbinary/gen/vsub-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1070 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c", |
| 1071 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c", |
| 1072 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c", |
| 1073 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1074 | "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c", |
| 1075 | "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c", |
| 1076 | "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1077 | "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 1078 | "src/f32-vclamp/gen/vclamp-wasm-x1.c", |
| 1079 | "src/f32-vclamp/gen/vclamp-wasm-x2.c", |
| 1080 | "src/f32-vclamp/gen/vclamp-wasm-x4.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1081 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c", |
| 1082 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c", |
| 1083 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c", |
| 1084 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c", |
| 1085 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c", |
| 1086 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c", |
| 1087 | "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c", |
| 1088 | "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c", |
| 1089 | "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c", |
| 1090 | "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c", |
| 1091 | "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c", |
| 1092 | "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 1093 | "src/f32-vhswish/gen/vhswish-wasm-x1.c", |
| 1094 | "src/f32-vhswish/gen/vhswish-wasm-x2.c", |
| 1095 | "src/f32-vhswish/gen/vhswish-wasm-x4.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 1096 | "src/f32-vlrelu/gen/vlrelu-wasm-x1.c", |
| 1097 | "src/f32-vlrelu/gen/vlrelu-wasm-x2.c", |
| 1098 | "src/f32-vlrelu/gen/vlrelu-wasm-x4.c", |
| Frank Barchard | d4416d6 | 2021-05-17 15:51:37 -0700 | [diff] [blame] | 1099 | "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c", |
| 1100 | "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c", |
| 1101 | "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 1102 | "src/f32-vrelu/gen/vrelu-wasm-x1.c", |
| 1103 | "src/f32-vrelu/gen/vrelu-wasm-x2.c", |
| 1104 | "src/f32-vrelu/gen/vrelu-wasm-x4.c", |
| 1105 | "src/f32-vrelu/gen/vrelu-wasm-x8.c", |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1106 | ] |
| 1107 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 1108 | ALL_WASMSIMD_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 40f0552 | 2020-07-16 22:33:12 -0700 | [diff] [blame] | 1109 | "src/f32-argmaxpool/4x-wasmsimd-c4.c", |
| 1110 | "src/f32-argmaxpool/9p8x-wasmsimd-c4.c", |
| 1111 | "src/f32-argmaxpool/9x-wasmsimd-c4.c", |
| Marat Dukhan | 3b7432d | 2020-07-16 17:46:32 -0700 | [diff] [blame] | 1112 | "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1113 | "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| 1114 | "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c", |
| 1115 | "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c", |
| Frank Barchard | 2213606 | 2020-11-24 18:44:46 -0800 | [diff] [blame] | 1116 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1117 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1118 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1119 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1120 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1121 | "src/f32-dwconv/gen/up4x4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1122 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1123 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1124 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1125 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1126 | "src/f32-dwconv/gen/up4x9-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1127 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1128 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1129 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1130 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c", |
| 1131 | "src/f32-dwconv/gen/up4x25-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1132 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1133 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1134 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1135 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1136 | "src/f32-dwconv/gen/up8x4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1137 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1138 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1139 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1140 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1141 | "src/f32-dwconv/gen/up8x9-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1142 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1143 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1144 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1145 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c", |
| 1146 | "src/f32-dwconv/gen/up8x25-wasmsimd.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1147 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1148 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1149 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1150 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1151 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1152 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1153 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1154 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| 1155 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c", |
| 1156 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c", |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 1157 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1158 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1159 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1160 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c", |
| 1161 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1162 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c", |
| 1163 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c", |
| 1164 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c", |
| 1165 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c", |
| 1166 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1167 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1168 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1169 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1170 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1171 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1172 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1173 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1174 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| 1175 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c", |
| 1176 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c", |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 1177 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1178 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1179 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1180 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c", |
| 1181 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1182 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c", |
| 1183 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c", |
| 1184 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c", |
| 1185 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c", |
| 1186 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c", |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 1187 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1188 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1189 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1190 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1191 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1192 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1193 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1194 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1195 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1196 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1197 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1198 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c", |
| 1199 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1200 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c", |
| 1201 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c", |
| 1202 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c", |
| Frank Barchard | cadd422 | 2021-01-20 16:27:25 -0800 | [diff] [blame] | 1203 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1204 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1205 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1206 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1207 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1208 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1209 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1210 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1211 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1212 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1213 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1214 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c", |
| 1215 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1216 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c", |
| 1217 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c", |
| 1218 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c", |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 1219 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1220 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1221 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1222 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c", |
| 1223 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1224 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1225 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c", |
| 1226 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1227 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c", |
| 1228 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1229 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c", |
| 1230 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| 1231 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1232 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1233 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1234 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1235 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c", |
| 1236 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c", |
| 1237 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1238 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c", |
| 1239 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c", |
| 1240 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c", |
| 1241 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c", |
| 1242 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c", |
| 1243 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c", |
| 1244 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c", |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 1245 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1246 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1247 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1248 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c", |
| 1249 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1250 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1251 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c", |
| 1252 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1253 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c", |
| 1254 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1255 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c", |
| 1256 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| 1257 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1258 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1259 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1260 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1261 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c", |
| 1262 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c", |
| 1263 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1264 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c", |
| 1265 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c", |
| 1266 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c", |
| 1267 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c", |
| 1268 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c", |
| 1269 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c", |
| 1270 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c", |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 1271 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1272 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1273 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1274 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c", |
| 1275 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1276 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1277 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c", |
| 1278 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1279 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c", |
| 1280 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1281 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1282 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1283 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1284 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c", |
| 1285 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c", |
| 1286 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1287 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c", |
| 1288 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c", |
| 1289 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c", |
| 1290 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c", |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 1291 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1292 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1293 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1294 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c", |
| 1295 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1296 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1297 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c", |
| 1298 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1299 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c", |
| 1300 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1301 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1302 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1303 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1304 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c", |
| 1305 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c", |
| 1306 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1307 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c", |
| 1308 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c", |
| 1309 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c", |
| 1310 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1311 | "src/f32-gavgpool-cw/wasmsimd-arm-x4.c", |
| 1312 | "src/f32-gavgpool-cw/wasmsimd-x86-x4.c", |
| Marat Dukhan | c601680 | 2020-07-16 18:51:28 -0700 | [diff] [blame] | 1313 | "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c", |
| 1314 | "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c", |
| 1315 | "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c", |
| 1316 | "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1317 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1318 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c", |
| 1319 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1320 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1321 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c", |
| 1322 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1323 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1324 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c", |
| 1325 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1326 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1327 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c", |
| 1328 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1329 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1330 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c", |
| 1331 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1332 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1333 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c", |
| 1334 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1335 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1336 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c", |
| 1337 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1338 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1339 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c", |
| 1340 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1341 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1342 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c", |
| 1343 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1344 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1345 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c", |
| 1346 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1347 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1348 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c", |
| 1349 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1350 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1351 | "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c", |
| 1352 | "src/f32-gemm/gen/1x8-wasmsimd-splat.c", |
| 1353 | "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c", |
| 1354 | "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1355 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1356 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c", |
| 1357 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1358 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1359 | "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c", |
| 1360 | "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c", |
| 1361 | "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c", |
| 1362 | "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c", |
| 1363 | "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c", |
| 1364 | "src/f32-gemm/gen/4x2c4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1365 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1366 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1367 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1368 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1369 | "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c", |
| 1370 | "src/f32-gemm/gen/4x8-wasmsimd-splat.c", |
| 1371 | "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c", |
| 1372 | "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1373 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1374 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c", |
| 1375 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1376 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1377 | "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c", |
| 1378 | "src/f32-gemm/gen/5x8-wasmsimd-splat.c", |
| 1379 | "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c", |
| 1380 | "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1381 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1382 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c", |
| 1383 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1384 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1385 | "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c", |
| 1386 | "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c", |
| XNNPACK Team | 965272b | 2020-10-23 21:10:15 -0700 | [diff] [blame] | 1387 | "src/f32-ibilinear-chw/gen/wasmsimd-p4.c", |
| 1388 | "src/f32-ibilinear-chw/gen/wasmsimd-p8.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 1389 | "src/f32-ibilinear/gen/wasmsimd-c4.c", |
| 1390 | "src/f32-ibilinear/gen/wasmsimd-c8.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1391 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1392 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c", |
| 1393 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1394 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1395 | "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c", |
| 1396 | "src/f32-igemm/gen/1x8-wasmsimd-splat.c", |
| 1397 | "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c", |
| 1398 | "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1399 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1400 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c", |
| 1401 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1402 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1403 | "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c", |
| 1404 | "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c", |
| 1405 | "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c", |
| 1406 | "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c", |
| 1407 | "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c", |
| 1408 | "src/f32-igemm/gen/4x2c4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1409 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1410 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1411 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1412 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1413 | "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c", |
| 1414 | "src/f32-igemm/gen/4x8-wasmsimd-splat.c", |
| 1415 | "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c", |
| 1416 | "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1417 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1418 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c", |
| 1419 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1420 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1421 | "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c", |
| 1422 | "src/f32-igemm/gen/5x8-wasmsimd-splat.c", |
| 1423 | "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c", |
| 1424 | "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1425 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1426 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c", |
| 1427 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1428 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1429 | "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c", |
| 1430 | "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c", |
| Marat Dukhan | f6e2480 | 2020-07-08 22:20:40 -0700 | [diff] [blame] | 1431 | "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1432 | "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1433 | "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1434 | "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| 1435 | "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c", |
| 1436 | "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1437 | "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1438 | "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 1439 | "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c", |
| 1440 | "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c", |
| 1441 | "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c", |
| Marat Dukhan | 195f8eb | 2020-06-25 12:50:57 -0700 | [diff] [blame] | 1442 | "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c", |
| 1443 | "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 1444 | "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c", |
| 1445 | "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c", |
| 1446 | "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c", |
| 1447 | "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c", |
| 1448 | "src/f32-prelu/gen/wasmsimd-minmax-1x4.c", |
| 1449 | "src/f32-prelu/gen/wasmsimd-minmax-1x8.c", |
| 1450 | "src/f32-prelu/gen/wasmsimd-minmax-1x16.c", |
| Marat Dukhan | 195f8eb | 2020-06-25 12:50:57 -0700 | [diff] [blame] | 1451 | "src/f32-prelu/gen/wasmsimd-minmax-2x4.c", |
| 1452 | "src/f32-prelu/gen/wasmsimd-minmax-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 1453 | "src/f32-prelu/gen/wasmsimd-minmax-2x16.c", |
| 1454 | "src/f32-prelu/gen/wasmsimd-minmax-4x4.c", |
| 1455 | "src/f32-prelu/gen/wasmsimd-minmax-4x8.c", |
| 1456 | "src/f32-prelu/gen/wasmsimd-minmax-4x16.c", |
| Marat Dukhan | 52238f0 | 2020-07-16 15:30:28 -0700 | [diff] [blame] | 1457 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c", |
| Marat Dukhan | 52238f0 | 2020-07-16 15:30:28 -0700 | [diff] [blame] | 1458 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1459 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c", |
| Marat Dukhan | 52238f0 | 2020-07-16 15:30:28 -0700 | [diff] [blame] | 1460 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c", |
| 1461 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1462 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c", |
| Marat Dukhan | 52238f0 | 2020-07-16 15:30:28 -0700 | [diff] [blame] | 1463 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c", |
| 1464 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1465 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c", |
| Marat Dukhan | 52238f0 | 2020-07-16 15:30:28 -0700 | [diff] [blame] | 1466 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c", |
| 1467 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1468 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c", |
| Marat Dukhan | 8c41796 | 2020-07-08 12:27:50 -0700 | [diff] [blame] | 1469 | "src/f32-rmax/wasmsimd-arm.c", |
| 1470 | "src/f32-rmax/wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1471 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1472 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1473 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c", |
| 1474 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1475 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1476 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 1477 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1478 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c", |
| 1479 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1480 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1481 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1482 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1483 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c", |
| 1484 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1485 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1486 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 1487 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1488 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c", |
| 1489 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1490 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1491 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1492 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1493 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c", |
| 1494 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1495 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1496 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 1497 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1498 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c", |
| 1499 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1500 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1501 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1502 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1503 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c", |
| 1504 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 1505 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1506 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 1507 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1508 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c", |
| 1509 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 1510 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1511 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c", |
| 1512 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1513 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1514 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c", |
| 1515 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1516 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1517 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c", |
| 1518 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1519 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1520 | "src/f32-vbinary/gen/vadd-wasmsimd-x4.c", |
| 1521 | "src/f32-vbinary/gen/vadd-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1522 | "src/f32-vbinary/gen/vadd-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1523 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c", |
| 1524 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1525 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1526 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c", |
| 1527 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1528 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1529 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c", |
| 1530 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1531 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1532 | "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c", |
| 1533 | "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1534 | "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1535 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c", |
| 1536 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1537 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1538 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c", |
| 1539 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1540 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1541 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c", |
| 1542 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1543 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1544 | "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c", |
| 1545 | "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1546 | "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1547 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c", |
| 1548 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1549 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1550 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c", |
| 1551 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1552 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1553 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c", |
| 1554 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1555 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1556 | "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c", |
| 1557 | "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1558 | "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1559 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c", |
| 1560 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1561 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1562 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c", |
| 1563 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1564 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1565 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c", |
| 1566 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1567 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1568 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c", |
| 1569 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1570 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1571 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c", |
| 1572 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1573 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1574 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c", |
| 1575 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1576 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1577 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c", |
| 1578 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1579 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1580 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c", |
| 1581 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1582 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1583 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c", |
| 1584 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1585 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1586 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c", |
| 1587 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1588 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1589 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c", |
| 1590 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1591 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1592 | "src/f32-vbinary/gen/vmul-wasmsimd-x4.c", |
| 1593 | "src/f32-vbinary/gen/vmul-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1594 | "src/f32-vbinary/gen/vmul-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1595 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c", |
| 1596 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1597 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1598 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c", |
| 1599 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1600 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1601 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c", |
| 1602 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1603 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1604 | "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c", |
| 1605 | "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1606 | "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1607 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c", |
| 1608 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1609 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1610 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c", |
| 1611 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1612 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1613 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c", |
| 1614 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1615 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1616 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c", |
| 1617 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1618 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1619 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c", |
| 1620 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1621 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1622 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c", |
| 1623 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1624 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1625 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c", |
| 1626 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1627 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1628 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c", |
| 1629 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1630 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1631 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c", |
| 1632 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1633 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1634 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c", |
| 1635 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1636 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1637 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c", |
| 1638 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1639 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1640 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c", |
| 1641 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1642 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1643 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c", |
| 1644 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1645 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1646 | "src/f32-vbinary/gen/vsub-wasmsimd-x4.c", |
| 1647 | "src/f32-vbinary/gen/vsub-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1648 | "src/f32-vbinary/gen/vsub-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1649 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c", |
| 1650 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1651 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1652 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c", |
| 1653 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1654 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1655 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c", |
| 1656 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1657 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1658 | "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c", |
| 1659 | "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1660 | "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 1661 | "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c", |
| 1662 | "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c", |
| 1663 | "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c", |
| 1664 | "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1665 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c", |
| 1666 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c", |
| 1667 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c", |
| 1668 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c", |
| 1669 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c", |
| 1670 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1671 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c", |
| 1672 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c", |
| 1673 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c", |
| 1674 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c", |
| 1675 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c", |
| 1676 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c", |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 1677 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c", |
| 1678 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c", |
| 1679 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c", |
| 1680 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c", |
| 1681 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c", |
| 1682 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1683 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c", |
| 1684 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c", |
| 1685 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c", |
| 1686 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c", |
| 1687 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c", |
| 1688 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 1689 | "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c", |
| 1690 | "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c", |
| 1691 | "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 1692 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c", |
| 1693 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c", |
| 1694 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c", |
| 1695 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c", |
| Marat Dukhan | d816f62 | 2020-07-15 10:14:39 -0700 | [diff] [blame] | 1696 | "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c", |
| Marat Dukhan | d816f62 | 2020-07-15 10:14:39 -0700 | [diff] [blame] | 1697 | "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1698 | "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c", |
| Marat Dukhan | d816f62 | 2020-07-15 10:14:39 -0700 | [diff] [blame] | 1699 | "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 1700 | "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c", |
| 1701 | "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c", |
| 1702 | "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c", |
| Marat Dukhan | b82b2cd | 2020-07-16 02:23:42 -0700 | [diff] [blame] | 1703 | "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c", |
| 1704 | "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c", |
| 1705 | "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c", |
| 1706 | "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1707 | "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c", |
| 1708 | "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c", |
| 1709 | "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c", |
| 1710 | "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c", |
| 1711 | "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c", |
| 1712 | "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c", |
| 1713 | "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c", |
| 1714 | "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c", |
| 1715 | "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c", |
| 1716 | "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 1717 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c", |
| 1718 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c", |
| 1719 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c", |
| 1720 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c", |
| 1721 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c", |
| 1722 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c", |
| 1723 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c", |
| 1724 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c", |
| 1725 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c", |
| 1726 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c", |
| 1727 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c", |
| 1728 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 1729 | "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c", |
| 1730 | "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c", |
| Marat Dukhan | 37c8351 | 2020-06-29 13:25:53 -0700 | [diff] [blame] | 1731 | "src/f32-vunary/gen/vabs-wasmsimd-x4.c", |
| 1732 | "src/f32-vunary/gen/vabs-wasmsimd-x8.c", |
| 1733 | "src/f32-vunary/gen/vneg-wasmsimd-x4.c", |
| 1734 | "src/f32-vunary/gen/vneg-wasmsimd-x8.c", |
| 1735 | "src/f32-vunary/gen/vsqr-wasmsimd-x4.c", |
| 1736 | "src/f32-vunary/gen/vsqr-wasmsimd-x8.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 1737 | "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c", |
| 1738 | "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c", |
| 1739 | "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c", |
| 1740 | "src/math/expm1minus-wasmsimd-rr2-p6-max.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1741 | "src/math/roundd-wasmsimd-addsub.c", |
| 1742 | "src/math/roundd-wasmsimd-cvt.c", |
| 1743 | "src/math/roundne-wasmsimd-addsub.c", |
| 1744 | "src/math/roundu-wasmsimd-addsub.c", |
| 1745 | "src/math/roundu-wasmsimd-cvt.c", |
| 1746 | "src/math/roundz-wasmsimd-addsub.c", |
| 1747 | "src/math/roundz-wasmsimd-cvt.c", |
| 1748 | "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c", |
| 1749 | "src/math/sigmoid-wasmsimd-rr2-p5-div.c", |
| Marat Dukhan | 313eef7 | 2021-06-30 16:11:31 -0700 | [diff] [blame] | 1750 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1751 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| 1752 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| 1753 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| 1754 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| 1755 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 47c1220 | 2021-06-30 15:09:34 -0700 | [diff] [blame] | 1756 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1757 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 47c1220 | 2021-06-30 15:09:34 -0700 | [diff] [blame] | 1758 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1759 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 47c1220 | 2021-06-30 15:09:34 -0700 | [diff] [blame] | 1760 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1761 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 47c1220 | 2021-06-30 15:09:34 -0700 | [diff] [blame] | 1762 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1763 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 47c1220 | 2021-06-30 15:09:34 -0700 | [diff] [blame] | 1764 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1765 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 47c1220 | 2021-06-30 15:09:34 -0700 | [diff] [blame] | 1766 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1767 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 69aa623 | 2021-06-30 14:17:26 -0700 | [diff] [blame] | 1768 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| 1769 | "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1770 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| 1771 | "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c", |
| 1772 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| 1773 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c", |
| 1774 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| 1775 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c", |
| 1776 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| 1777 | "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c", |
| 1778 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| 1779 | "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c", |
| Marat Dukhan | b5e3d17 | 2020-08-06 13:29:53 -0700 | [diff] [blame] | 1780 | "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c", |
| 1781 | "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c", |
| 1782 | "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1783 | "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c", |
| 1784 | "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c", |
| 1785 | "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c", |
| Marat Dukhan | 4741e41 | 2021-06-30 13:38:06 -0700 | [diff] [blame] | 1786 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1787 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 8674629 | 2021-08-06 17:27:18 -0700 | [diff] [blame] | 1788 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd.c", |
| Marat Dukhan | 4741e41 | 2021-06-30 13:38:06 -0700 | [diff] [blame] | 1789 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1790 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 8674629 | 2021-08-06 17:27:18 -0700 | [diff] [blame] | 1791 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd.c", |
| Marat Dukhan | 4741e41 | 2021-06-30 13:38:06 -0700 | [diff] [blame] | 1792 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1793 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 4741e41 | 2021-06-30 13:38:06 -0700 | [diff] [blame] | 1794 | "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c", |
| Marat Dukhan | 8674629 | 2021-08-06 17:27:18 -0700 | [diff] [blame] | 1795 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd.c", |
| Marat Dukhan | 4741e41 | 2021-06-30 13:38:06 -0700 | [diff] [blame] | 1796 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1797 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 4741e41 | 2021-06-30 13:38:06 -0700 | [diff] [blame] | 1798 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1799 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 4741e41 | 2021-06-30 13:38:06 -0700 | [diff] [blame] | 1800 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 1801 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 4741e41 | 2021-06-30 13:38:06 -0700 | [diff] [blame] | 1802 | "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c", |
| Marat Dukhan | 2e23d2b | 2020-07-29 16:01:37 -0700 | [diff] [blame] | 1803 | "src/qs8-requantization/fp32-wasmsimd.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 1804 | "src/qs8-requantization/gemmlowp-wasmsimd.c", |
| Marat Dukhan | 5df27f8 | 2020-09-02 23:59:21 -0700 | [diff] [blame] | 1805 | "src/qs8-vadd/gen/minmax-wasmsimd-x8.c", |
| 1806 | "src/qs8-vadd/gen/minmax-wasmsimd-x16.c", |
| 1807 | "src/qs8-vadd/gen/minmax-wasmsimd-x24.c", |
| 1808 | "src/qs8-vadd/gen/minmax-wasmsimd-x32.c", |
| 1809 | "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c", |
| 1810 | "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c", |
| 1811 | "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c", |
| 1812 | "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c", |
| Marat Dukhan | 661ea6d | 2021-08-02 11:25:41 -0700 | [diff] [blame] | 1813 | "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 1814 | "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| 1815 | "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 1816 | "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| Marat Dukhan | f601135 | 2021-07-15 15:11:14 -0700 | [diff] [blame] | 1817 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| 1818 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| 1819 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| 1820 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| 1821 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| 1822 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 43bee05 | 2021-07-14 20:57:18 -0700 | [diff] [blame] | 1823 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c", |
| 1824 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c", |
| 1825 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c", |
| 1826 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c", |
| 1827 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c", |
| 1828 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c", |
| 1829 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld64.c", |
| 1830 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-ld128.c", |
| 1831 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld64.c", |
| 1832 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-ld128.c", |
| 1833 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld64.c", |
| 1834 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-ld128.c", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 1835 | "src/qu8-requantization/fp32-wasmsimd.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 1836 | "src/qu8-requantization/gemmlowp-wasmsimd.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 1837 | "src/qu8-vadd/gen/minmax-wasmsimd-x8.c", |
| 1838 | "src/qu8-vadd/gen/minmax-wasmsimd-x16.c", |
| 1839 | "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c", |
| 1840 | "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c", |
| Marat Dukhan | 661ea6d | 2021-08-02 11:25:41 -0700 | [diff] [blame] | 1841 | "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 1842 | "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| 1843 | "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 1844 | "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| Marat Dukhan | 8ee3701 | 2020-07-16 13:17:13 -0700 | [diff] [blame] | 1845 | "src/x32-fill/wasmsimd.c", |
| Marat Dukhan | 66d99e9 | 2020-07-16 12:56:21 -0700 | [diff] [blame] | 1846 | "src/x32-packx/x4-wasmsimd.c", |
| Marat Dukhan | 9306ae0 | 2020-07-16 15:51:13 -0700 | [diff] [blame] | 1847 | "src/x32-pad/wasmsimd.c", |
| Marat Dukhan | 9d4bfa2 | 2020-07-16 19:07:04 -0700 | [diff] [blame] | 1848 | "src/x32-unpool/wasmsimd.c", |
| Marat Dukhan | e3b7876 | 2020-07-16 20:02:58 -0700 | [diff] [blame] | 1849 | "src/x32-zip/x2-wasmsimd.c", |
| 1850 | "src/x32-zip/x3-wasmsimd.c", |
| 1851 | "src/x32-zip/x4-wasmsimd.c", |
| 1852 | "src/x32-zip/xm-wasmsimd.c", |
| Marat Dukhan | 290055c | 2020-06-09 12:24:29 -0700 | [diff] [blame] | 1853 | ] |
| 1854 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1855 | # ISA-specific micro-kernels |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 1856 | PROD_NEON_MICROKERNEL_SRCS = [ |
| 1857 | "src/f32-argmaxpool/4x-neon-c4.c", |
| 1858 | "src/f32-argmaxpool/9p8x-neon-c4.c", |
| 1859 | "src/f32-argmaxpool/9x-neon-c4.c", |
| 1860 | "src/f32-avgpool/9p8x-minmax-neon-c4.c", |
| 1861 | "src/f32-avgpool/9x-minmax-neon-c4.c", |
| 1862 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c", |
| 1863 | "src/f32-dwconv/gen/up4x4-minmax-neon.c", |
| 1864 | "src/f32-dwconv/gen/up4x9-minmax-neon.c", |
| 1865 | "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c", |
| 1866 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c", |
| 1867 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c", |
| 1868 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c", |
| 1869 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c", |
| 1870 | "src/f32-gavgpool-cw/neon-x4.c", |
| 1871 | "src/f32-gavgpool/7p7x-minmax-neon-c4.c", |
| 1872 | "src/f32-gavgpool/7x-minmax-neon-c4.c", |
| 1873 | "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 1874 | "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 1875 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 1876 | "src/f32-ibilinear-chw/gen/neon-p8.c", |
| 1877 | "src/f32-ibilinear/gen/neon-c8.c", |
| 1878 | "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 1879 | "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 1880 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 1881 | "src/f32-maxpool/9p8x-minmax-neon-c4.c", |
| 1882 | "src/f32-pavgpool/9p8x-minmax-neon-c4.c", |
| 1883 | "src/f32-pavgpool/9x-minmax-neon-c4.c", |
| 1884 | "src/f32-prelu/gen/neon-2x8.c", |
| 1885 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c", |
| 1886 | "src/f32-rmax/neon.c", |
| 1887 | "src/f32-spmm/gen/32x1-minmax-neon.c", |
| 1888 | "src/f32-vbinary/gen/vadd-minmax-neon-x8.c", |
| 1889 | "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c", |
| 1890 | "src/f32-vbinary/gen/vmax-neon-x8.c", |
| 1891 | "src/f32-vbinary/gen/vmaxc-neon-x8.c", |
| 1892 | "src/f32-vbinary/gen/vmin-neon-x8.c", |
| 1893 | "src/f32-vbinary/gen/vminc-neon-x8.c", |
| 1894 | "src/f32-vbinary/gen/vmul-minmax-neon-x8.c", |
| 1895 | "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c", |
| 1896 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c", |
| 1897 | "src/f32-vbinary/gen/vsqrdiff-neon-x8.c", |
| 1898 | "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c", |
| 1899 | "src/f32-vbinary/gen/vsub-minmax-neon-x8.c", |
| 1900 | "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c", |
| 1901 | "src/f32-vclamp/gen/vclamp-neon-x8.c", |
| 1902 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c", |
| 1903 | "src/f32-vhswish/gen/vhswish-neon-x16.c", |
| 1904 | "src/f32-vlrelu/gen/vlrelu-neon-x8.c", |
| 1905 | "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c", |
| 1906 | "src/f32-vrnd/gen/vrndd-neon-x8.c", |
| 1907 | "src/f32-vrnd/gen/vrndne-neon-x8.c", |
| 1908 | "src/f32-vrnd/gen/vrndu-neon-x8.c", |
| 1909 | "src/f32-vrnd/gen/vrndz-neon-x8.c", |
| 1910 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c", |
| 1911 | "src/f32-vunary/gen/vabs-neon-x8.c", |
| 1912 | "src/f32-vunary/gen/vneg-neon-x8.c", |
| 1913 | "src/f32-vunary/gen/vsqr-neon-x8.c", |
| 1914 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c", |
| 1915 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c", |
| 1916 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| 1917 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| 1918 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| 1919 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| 1920 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c", |
| 1921 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c", |
| 1922 | "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c", |
| 1923 | "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c", |
| 1924 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c", |
| 1925 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 1926 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c", |
| 1927 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c", |
| 1928 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 1929 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c", |
| Marat Dukhan | 01debd9 | 2021-07-29 18:14:21 -0700 | [diff] [blame] | 1930 | "src/qs8-vadd/gen/minmax-neon-ld64-x16.c", |
| 1931 | "src/qs8-vadd/gen/minmax-neon-ld64-x32.c", |
| 1932 | "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 1933 | "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 1934 | "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 1935 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 1936 | "src/qu8-avgpool/9p8x-minmax-neon-c8.c", |
| 1937 | "src/qu8-avgpool/9x-minmax-neon-c8.c", |
| 1938 | "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| 1939 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| 1940 | "src/qu8-gavgpool/7p7x-minmax-neon-c8.c", |
| 1941 | "src/qu8-gavgpool/7x-minmax-neon-c8.c", |
| 1942 | "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 1943 | "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 1944 | "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| 1945 | "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| 1946 | "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 1947 | "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 1948 | "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| 1949 | "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| 1950 | "src/qu8-vadd/gen/minmax-neon-ld64-x8.c", |
| 1951 | "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 1952 | "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 1953 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 1954 | "src/u8-maxpool/9p8x-minmax-neon-c16.c", |
| 1955 | "src/u8-rmax/neon.c", |
| 1956 | "src/u8-vclamp/neon-x64.c", |
| 1957 | "src/x8-zip/x2-neon.c", |
| 1958 | "src/x8-zip/x3-neon.c", |
| 1959 | "src/x8-zip/x4-neon.c", |
| 1960 | "src/x8-zip/xm-neon.c", |
| 1961 | "src/x32-fill/neon.c", |
| 1962 | "src/x32-packx/x4-neon-st4.c", |
| 1963 | "src/x32-pad/neon.c", |
| 1964 | "src/x32-unpool/neon.c", |
| 1965 | "src/x32-zip/x2-neon.c", |
| 1966 | "src/x32-zip/x3-neon.c", |
| 1967 | "src/x32-zip/x4-neon.c", |
| 1968 | "src/x32-zip/xm-neon.c", |
| 1969 | ] |
| 1970 | |
| 1971 | ALL_NEON_MICROKERNEL_SRCS = [ |
| Marat Dukhan | ef25c6d | 2020-07-24 00:59:40 -0700 | [diff] [blame] | 1972 | "src/f32-argmaxpool/4x-neon-c4.c", |
| 1973 | "src/f32-argmaxpool/9p8x-neon-c4.c", |
| 1974 | "src/f32-argmaxpool/9x-neon-c4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1975 | "src/f32-avgpool/9p8x-minmax-neon-c4.c", |
| 1976 | "src/f32-avgpool/9x-minmax-neon-c4.c", |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 1977 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 1978 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1979 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 1980 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c", |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 1981 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 1982 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1983 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 1984 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c", |
| Marat Dukhan | c763488 | 2020-12-07 15:11:12 -0800 | [diff] [blame] | 1985 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c", |
| Marat Dukhan | f5425ea | 2020-04-24 01:46:00 -0700 | [diff] [blame] | 1986 | "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1987 | "src/f32-dwconv/gen/up4x4-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1988 | "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1989 | "src/f32-dwconv/gen/up4x9-minmax-neon.c", |
| Marat Dukhan | f5425ea | 2020-04-24 01:46:00 -0700 | [diff] [blame] | 1990 | "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1991 | "src/f32-dwconv/gen/up4x25-minmax-neon.c", |
| 1992 | "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c", |
| 1993 | "src/f32-dwconv/gen/up8x4-minmax-neon.c", |
| 1994 | "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c", |
| 1995 | "src/f32-dwconv/gen/up8x9-minmax-neon.c", |
| Marat Dukhan | f5425ea | 2020-04-24 01:46:00 -0700 | [diff] [blame] | 1996 | "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1997 | "src/f32-dwconv/gen/up8x25-minmax-neon.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 1998 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c", |
| 1999 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c", |
| 2000 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c", |
| Marat Dukhan | c581e48 | 2020-10-24 01:28:11 -0700 | [diff] [blame] | 2001 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2002 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c", |
| Marat Dukhan | c581e48 | 2020-10-24 01:28:11 -0700 | [diff] [blame] | 2003 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c", |
| 2004 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c", |
| 2005 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c", |
| 2006 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c", |
| 2007 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 2008 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c", |
| 2009 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c", |
| 2010 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2011 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 2012 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2013 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c", |
| 2014 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c", |
| 2015 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2016 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c", |
| 2017 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c", |
| 2018 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c", |
| 2019 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2020 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2021 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c", |
| 2022 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2023 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2024 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2025 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2026 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2027 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c", |
| 2028 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 2029 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c", |
| 2030 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c", |
| 2031 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c", |
| 2032 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c", |
| 2033 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c", |
| 2034 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c", |
| 2035 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c", |
| 2036 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 2037 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2038 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 2039 | "src/f32-gavgpool-cw/neon-x4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2040 | "src/f32-gavgpool/7p7x-minmax-neon-c4.c", |
| 2041 | "src/f32-gavgpool/7x-minmax-neon-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2042 | "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2043 | "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c", |
| 2044 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2045 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2046 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c", |
| 2047 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c", |
| 2048 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c", |
| 2049 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c", |
| 2050 | "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2051 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c", |
| 2052 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2053 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c", |
| 2054 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2055 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c", |
| 2056 | "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2057 | "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c", |
| 2058 | "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 2059 | "src/f32-gemm/gen/1x8s4-minmax-neon.c", |
| 2060 | "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2061 | "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c", |
| 2062 | "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c", |
| 2063 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2064 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c", |
| 2065 | "src/f32-gemm/gen/4x8s4-minmax-neon.c", |
| 2066 | "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c", |
| 2067 | "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c", |
| 2068 | "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c", |
| 2069 | "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c", |
| 2070 | "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c", |
| 2071 | "src/f32-gemm/gen/6x8s4-minmax-neon.c", |
| 2072 | "src/f32-gemm/gen/8x8s4-minmax-neon.c", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 2073 | "src/f32-ibilinear-chw/gen/neon-p4.c", |
| 2074 | "src/f32-ibilinear-chw/gen/neon-p8.c", |
| Frank Barchard | 8247e21 | 2021-02-03 18:12:33 -0800 | [diff] [blame] | 2075 | "src/f32-ibilinear/gen/neon-c4.c", |
| 2076 | "src/f32-ibilinear/gen/neon-c8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2077 | "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2078 | "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2079 | "src/f32-igemm/gen/1x8s4-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2080 | "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2081 | "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2082 | "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2083 | "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c", |
| 2084 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2085 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c", |
| 2086 | "src/f32-igemm/gen/4x8s4-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2087 | "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c", |
| 2088 | "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2089 | "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c", |
| 2090 | "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2091 | "src/f32-igemm/gen/6x8s4-minmax-neon.c", |
| 2092 | "src/f32-igemm/gen/8x8s4-minmax-neon.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2093 | "src/f32-maxpool/9p8x-minmax-neon-c4.c", |
| 2094 | "src/f32-pavgpool/9p8x-minmax-neon-c4.c", |
| 2095 | "src/f32-pavgpool/9x-minmax-neon-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2096 | "src/f32-ppmm/gen/4x8-minmax-neon.c", |
| 2097 | "src/f32-ppmm/gen/8x8-minmax-neon.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 2098 | "src/f32-prelu/gen/neon-1x4.c", |
| 2099 | "src/f32-prelu/gen/neon-1x8.c", |
| 2100 | "src/f32-prelu/gen/neon-1x16.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 2101 | "src/f32-prelu/gen/neon-2x4.c", |
| 2102 | "src/f32-prelu/gen/neon-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 2103 | "src/f32-prelu/gen/neon-2x16.c", |
| 2104 | "src/f32-prelu/gen/neon-4x4.c", |
| 2105 | "src/f32-prelu/gen/neon-4x8.c", |
| 2106 | "src/f32-prelu/gen/neon-4x16.c", |
| Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame] | 2107 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c", |
| Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame] | 2108 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2109 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c", |
| Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame] | 2110 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c", |
| 2111 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2112 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c", |
| Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame] | 2113 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c", |
| 2114 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2115 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c", |
| Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame] | 2116 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c", |
| 2117 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2118 | "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c", |
| 2119 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c", |
| 2120 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c", |
| 2121 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c", |
| 2122 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c", |
| 2123 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c", |
| 2124 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c", |
| 2125 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c", |
| 2126 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c", |
| 2127 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c", |
| 2128 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c", |
| 2129 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c", |
| 2130 | "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2131 | "src/f32-rmax/neon.c", |
| Marat Dukhan | 5b86c43 | 2020-12-06 19:15:03 -0800 | [diff] [blame] | 2132 | "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c", |
| 2133 | "src/f32-spmm/gen/4x1-minmax-neon-x2.c", |
| 2134 | "src/f32-spmm/gen/4x1-minmax-neon.c", |
| 2135 | "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c", |
| 2136 | "src/f32-spmm/gen/8x1-minmax-neon-x2.c", |
| 2137 | "src/f32-spmm/gen/8x1-minmax-neon.c", |
| 2138 | "src/f32-spmm/gen/12x1-minmax-neon.c", |
| 2139 | "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c", |
| 2140 | "src/f32-spmm/gen/16x1-minmax-neon-x2.c", |
| 2141 | "src/f32-spmm/gen/16x1-minmax-neon.c", |
| 2142 | "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c", |
| 2143 | "src/f32-spmm/gen/32x1-minmax-neon-x2.c", |
| 2144 | "src/f32-spmm/gen/32x1-minmax-neon.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 2145 | "src/f32-vbinary/gen/vadd-minmax-neon-x4.c", |
| 2146 | "src/f32-vbinary/gen/vadd-minmax-neon-x8.c", |
| 2147 | "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c", |
| 2148 | "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 2149 | "src/f32-vbinary/gen/vmax-neon-x4.c", |
| 2150 | "src/f32-vbinary/gen/vmax-neon-x8.c", |
| 2151 | "src/f32-vbinary/gen/vmaxc-neon-x4.c", |
| 2152 | "src/f32-vbinary/gen/vmaxc-neon-x8.c", |
| 2153 | "src/f32-vbinary/gen/vmin-neon-x4.c", |
| 2154 | "src/f32-vbinary/gen/vmin-neon-x8.c", |
| 2155 | "src/f32-vbinary/gen/vminc-neon-x4.c", |
| 2156 | "src/f32-vbinary/gen/vminc-neon-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 2157 | "src/f32-vbinary/gen/vmul-minmax-neon-x4.c", |
| 2158 | "src/f32-vbinary/gen/vmul-minmax-neon-x8.c", |
| 2159 | "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c", |
| 2160 | "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c", |
| 2161 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c", |
| 2162 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 2163 | "src/f32-vbinary/gen/vsqrdiff-neon-x4.c", |
| 2164 | "src/f32-vbinary/gen/vsqrdiff-neon-x8.c", |
| 2165 | "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c", |
| 2166 | "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 2167 | "src/f32-vbinary/gen/vsub-minmax-neon-x4.c", |
| 2168 | "src/f32-vbinary/gen/vsub-minmax-neon-x8.c", |
| 2169 | "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c", |
| 2170 | "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2171 | "src/f32-vclamp/gen/vclamp-neon-x4.c", |
| 2172 | "src/f32-vclamp/gen/vclamp-neon-x8.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2173 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c", |
| 2174 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c", |
| 2175 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c", |
| 2176 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c", |
| 2177 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c", |
| 2178 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c", |
| 2179 | "src/f32-velu/gen/velu-neon-rr2-p6-x4.c", |
| 2180 | "src/f32-velu/gen/velu-neon-rr2-p6-x8.c", |
| 2181 | "src/f32-velu/gen/velu-neon-rr2-p6-x12.c", |
| 2182 | "src/f32-velu/gen/velu-neon-rr2-p6-x16.c", |
| 2183 | "src/f32-velu/gen/velu-neon-rr2-p6-x20.c", |
| 2184 | "src/f32-velu/gen/velu-neon-rr2-p6-x24.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 2185 | "src/f32-vhswish/gen/vhswish-neon-x4.c", |
| 2186 | "src/f32-vhswish/gen/vhswish-neon-x8.c", |
| 2187 | "src/f32-vhswish/gen/vhswish-neon-x16.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 2188 | "src/f32-vlrelu/gen/vlrelu-neon-x4.c", |
| 2189 | "src/f32-vlrelu/gen/vlrelu-neon-x8.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2190 | "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c", |
| 2191 | "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2192 | "src/f32-vrelu/gen/vrelu-neon-x4.c", |
| 2193 | "src/f32-vrelu/gen/vrelu-neon-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 2194 | "src/f32-vrnd/gen/vrndd-neon-x4.c", |
| 2195 | "src/f32-vrnd/gen/vrndd-neon-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2196 | "src/f32-vrnd/gen/vrndne-neon-x4.c", |
| 2197 | "src/f32-vrnd/gen/vrndne-neon-x8.c", |
| 2198 | "src/f32-vrnd/gen/vrndu-neon-x4.c", |
| 2199 | "src/f32-vrnd/gen/vrndu-neon-x8.c", |
| 2200 | "src/f32-vrnd/gen/vrndz-neon-x4.c", |
| 2201 | "src/f32-vrnd/gen/vrndz-neon-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2202 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c", |
| 2203 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c", |
| 2204 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c", |
| 2205 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c", |
| 2206 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c", |
| 2207 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c", |
| 2208 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c", |
| 2209 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c", |
| 2210 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c", |
| 2211 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c", |
| 2212 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c", |
| 2213 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c", |
| 2214 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c", |
| 2215 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c", |
| 2216 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c", |
| 2217 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c", |
| 2218 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c", |
| 2219 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 2220 | "src/f32-vunary/gen/vabs-neon-x4.c", |
| 2221 | "src/f32-vunary/gen/vabs-neon-x8.c", |
| 2222 | "src/f32-vunary/gen/vneg-neon-x4.c", |
| 2223 | "src/f32-vunary/gen/vneg-neon-x8.c", |
| 2224 | "src/f32-vunary/gen/vsqr-neon-x4.c", |
| 2225 | "src/f32-vunary/gen/vsqr-neon-x8.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 2226 | "src/math/expm1minus-neon-rr2-lut16-p3.c", |
| 2227 | "src/math/expm1minus-neon-rr2-p6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2228 | "src/math/roundd-neon-addsub.c", |
| 2229 | "src/math/roundd-neon-cvt.c", |
| 2230 | "src/math/roundne-neon-addsub.c", |
| 2231 | "src/math/roundu-neon-addsub.c", |
| 2232 | "src/math/roundu-neon-cvt.c", |
| 2233 | "src/math/roundz-neon-addsub.c", |
| 2234 | "src/math/roundz-neon-cvt.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2235 | "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c", |
| 2236 | "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c", |
| 2237 | "src/math/sigmoid-neon-rr2-p5-nr2recps.c", |
| 2238 | "src/math/sqrt-neon-nr1rsqrts.c", |
| 2239 | "src/math/sqrt-neon-nr2rsqrts.c", |
| 2240 | "src/math/sqrt-neon-nr3rsqrts.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2241 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c", |
| 2242 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2243 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2244 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c", |
| 2245 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2246 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2247 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c", |
| 2248 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c", |
| 2249 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c", |
| 2250 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2251 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2252 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c", |
| 2253 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c", |
| 2254 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c", |
| 2255 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2256 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| 2257 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| 2258 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| 2259 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| 2260 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2261 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2262 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c", |
| 2263 | "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2264 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2265 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c", |
| 2266 | "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2267 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2268 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c", |
| 2269 | "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2270 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2271 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c", |
| 2272 | "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 2273 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2274 | "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2275 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c", |
| 2276 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 2277 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 2278 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2279 | "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2280 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c", |
| 2281 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 2282 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 2283 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2284 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2285 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c", |
| 2286 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c", |
| 2287 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c", |
| 2288 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 2289 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 2290 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2291 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2292 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c", |
| 2293 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c", |
| 2294 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c", |
| 2295 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 2296 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 2297 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2298 | "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 2299 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2300 | "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 2301 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2302 | "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 2303 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2304 | "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c", |
| Marat Dukhan | 281262d | 2020-08-10 13:23:21 -0700 | [diff] [blame] | 2305 | "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c", |
| 2306 | "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c", |
| 2307 | "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c", |
| 2308 | "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2309 | "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c", |
| 2310 | "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c", |
| 2311 | "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c", |
| 2312 | "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2313 | "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c", |
| 2314 | "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2315 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2316 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2317 | "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2318 | "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 2319 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c", |
| Marat Dukhan | 2d3c97c | 2021-06-25 18:00:28 -0700 | [diff] [blame] | 2320 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2321 | "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2322 | "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 2323 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2324 | "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2325 | "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2326 | "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 2327 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 2328 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 2329 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2330 | "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2331 | "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2332 | "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2333 | "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2334 | "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2335 | "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2336 | "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2337 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2338 | "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2339 | "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 2340 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c", |
| Marat Dukhan | 2d3c97c | 2021-06-25 18:00:28 -0700 | [diff] [blame] | 2341 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2342 | "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2343 | "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 2344 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2345 | "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2346 | "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2347 | "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2348 | "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2349 | "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2350 | "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2351 | "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2352 | "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2353 | "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2354 | "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2355 | "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2356 | "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2357 | "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2358 | "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2359 | "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2360 | "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2361 | "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2362 | "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2363 | "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2364 | "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2365 | "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2366 | "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2367 | "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2368 | "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2369 | "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2370 | "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2371 | "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2372 | "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2373 | "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2374 | "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2375 | "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 2376 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 2377 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 2378 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2379 | "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2380 | "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2381 | "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2382 | "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2383 | "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2384 | "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2385 | "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2386 | "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c", |
| 2387 | "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2388 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2389 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2390 | "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2391 | "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 2392 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c", |
| Marat Dukhan | cf05585 | 2021-06-26 09:05:09 -0700 | [diff] [blame] | 2393 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2394 | "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2395 | "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 2396 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2397 | "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2398 | "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2399 | "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 2400 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 2401 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 2402 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2403 | "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2404 | "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2405 | "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2406 | "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2407 | "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2408 | "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2409 | "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2410 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2411 | "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2412 | "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 2413 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c", |
| Marat Dukhan | cf05585 | 2021-06-26 09:05:09 -0700 | [diff] [blame] | 2414 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2415 | "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2416 | "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 2417 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2418 | "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2419 | "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2420 | "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2421 | "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2422 | "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2423 | "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2424 | "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2425 | "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2426 | "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2427 | "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2428 | "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2429 | "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2430 | "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2431 | "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2432 | "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2433 | "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2434 | "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2435 | "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2436 | "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2437 | "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2438 | "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2439 | "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2440 | "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 2441 | "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2442 | "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2443 | "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2444 | "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2445 | "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2446 | "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2447 | "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2448 | "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 2449 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 2450 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 2451 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2452 | "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c", |
| 2453 | "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c", |
| 2454 | "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c", |
| 2455 | "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c", |
| 2456 | "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2457 | "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 2458 | "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c", |
| Marat Dukhan | 2e23d2b | 2020-07-29 16:01:37 -0700 | [diff] [blame] | 2459 | "src/qs8-requantization/fp32-neon.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 2460 | "src/qs8-requantization/gemmlowp-neon.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 2461 | "src/qs8-requantization/rndna-neon.c", |
| Marat Dukhan | d3d818c | 2021-07-16 17:56:54 -0700 | [diff] [blame] | 2462 | "src/qs8-requantization/rndnu-neon-mull.c", |
| 2463 | "src/qs8-requantization/rndnu-neon-qdmulh.c", |
| Marat Dukhan | ba7b279 | 2020-09-02 14:26:45 -0700 | [diff] [blame] | 2464 | "src/qs8-vadd/gen/minmax-neon-ld64-x8.c", |
| 2465 | "src/qs8-vadd/gen/minmax-neon-ld64-x16.c", |
| 2466 | "src/qs8-vadd/gen/minmax-neon-ld64-x24.c", |
| 2467 | "src/qs8-vadd/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 2468 | "src/qs8-vadd/gen/minmax-neon-ld128-x16.c", |
| 2469 | "src/qs8-vadd/gen/minmax-neon-ld128-x32.c", |
| Marat Dukhan | ba7b279 | 2020-09-02 14:26:45 -0700 | [diff] [blame] | 2470 | "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c", |
| 2471 | "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 2472 | "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c", |
| 2473 | "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 2474 | "src/qs8-vaddc/gen/minmax-neon-ld128-x16.c", |
| 2475 | "src/qs8-vaddc/gen/minmax-neon-ld128-x32.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 2476 | "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x8.c", |
| 2477 | "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 2478 | "src/qs8-vmul/gen/minmax-fp32-neon-ld128-x16.c", |
| 2479 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x8.c", |
| 2480 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| 2481 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld128-x16.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 2482 | "src/qu8-avgpool/9p8x-minmax-neon-c8.c", |
| 2483 | "src/qu8-avgpool/9x-minmax-neon-c8.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 2484 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 2485 | "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 2486 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 2487 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 2488 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 2489 | "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 2490 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 2491 | "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 2492 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| 2493 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| 2494 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| 2495 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 2496 | "src/qu8-gavgpool/7p7x-minmax-neon-c8.c", |
| 2497 | "src/qu8-gavgpool/7x-minmax-neon-c8.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 2498 | "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 2499 | "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 2500 | "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 2501 | "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 2502 | "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 2503 | "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| 2504 | "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 2505 | "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 2506 | "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 2507 | "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 2508 | "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 2509 | "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 2510 | "src/qu8-requantization/fp32-neon.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 2511 | "src/qu8-requantization/gemmlowp-neon.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 2512 | "src/qu8-requantization/rndna-neon.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 2513 | "src/qu8-vadd/gen/minmax-neon-ld64-x8.c", |
| 2514 | "src/qu8-vadd/gen/minmax-neon-ld64-x16.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 2515 | "src/qu8-vadd/gen/minmax-neon-ld128-x16.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 2516 | "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c", |
| 2517 | "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 2518 | "src/qu8-vaddc/gen/minmax-neon-ld128-x16.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 2519 | "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x8.c", |
| 2520 | "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 2521 | "src/qu8-vmul/gen/minmax-fp32-neon-ld128-x16.c", |
| 2522 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x8.c", |
| 2523 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| 2524 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld128-x16.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2525 | "src/u8-maxpool/9p8x-minmax-neon-c16.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2526 | "src/u8-rmax/neon.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 2527 | "src/u8-vclamp/neon-x64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2528 | "src/x8-zip/x2-neon.c", |
| 2529 | "src/x8-zip/x3-neon.c", |
| 2530 | "src/x8-zip/x4-neon.c", |
| 2531 | "src/x8-zip/xm-neon.c", |
| Marat Dukhan | 3bb3bfc | 2020-05-19 17:42:46 -0700 | [diff] [blame] | 2532 | "src/x32-fill/neon.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2533 | "src/x32-packx/x4-neon-st4.c", |
| Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 2534 | "src/x32-pad/neon.c", |
| Marat Dukhan | 57dccd8 | 2020-04-14 00:53:10 -0700 | [diff] [blame] | 2535 | "src/x32-unpool/neon.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2536 | "src/x32-zip/x2-neon.c", |
| 2537 | "src/x32-zip/x3-neon.c", |
| 2538 | "src/x32-zip/x4-neon.c", |
| 2539 | "src/x32-zip/xm-neon.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2540 | ] |
| 2541 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2542 | PROD_NEONFMA_MICROKERNEL_SRCS = [ |
| 2543 | "src/f32-dwconv/gen/up4x9-minmax-neonfma.c", |
| 2544 | "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c", |
| 2545 | "src/f32-dwconv/gen/up8x4-minmax-neonfma.c", |
| 2546 | "src/f32-dwconv/gen/up8x9-minmax-neonfma.c", |
| 2547 | "src/f32-gemm/gen/1x8s4-minmax-neonfma.c", |
| 2548 | "src/f32-gemm/gen/6x8s4-minmax-neonfma.c", |
| 2549 | "src/f32-ibilinear-chw/gen/neonfma-p8.c", |
| 2550 | "src/f32-ibilinear/gen/neonfma-c8.c", |
| 2551 | "src/f32-igemm/gen/1x8s4-minmax-neonfma.c", |
| 2552 | "src/f32-igemm/gen/6x8s4-minmax-neonfma.c", |
| 2553 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c", |
| 2554 | "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c", |
| 2555 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c", |
| 2556 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c", |
| 2557 | "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c", |
| 2558 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c", |
| 2559 | ] |
| 2560 | |
| 2561 | ALL_NEONFMA_MICROKERNEL_SRCS = [ |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2562 | "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c", |
| 2563 | "src/f32-dwconv/gen/up4x4-minmax-neonfma.c", |
| 2564 | "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c", |
| 2565 | "src/f32-dwconv/gen/up4x9-minmax-neonfma.c", |
| 2566 | "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c", |
| 2567 | "src/f32-dwconv/gen/up4x25-minmax-neonfma.c", |
| 2568 | "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c", |
| 2569 | "src/f32-dwconv/gen/up8x4-minmax-neonfma.c", |
| 2570 | "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c", |
| 2571 | "src/f32-dwconv/gen/up8x9-minmax-neonfma.c", |
| 2572 | "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c", |
| 2573 | "src/f32-dwconv/gen/up8x25-minmax-neonfma.c", |
| 2574 | "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c", |
| 2575 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c", |
| 2576 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c", |
| 2577 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c", |
| 2578 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c", |
| 2579 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c", |
| 2580 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c", |
| 2581 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c", |
| 2582 | "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c", |
| 2583 | "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c", |
| 2584 | "src/f32-gemm/gen/1x8s4-minmax-neonfma.c", |
| 2585 | "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c", |
| 2586 | "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c", |
| 2587 | "src/f32-gemm/gen/4x8s4-minmax-neonfma.c", |
| 2588 | "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c", |
| 2589 | "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c", |
| 2590 | "src/f32-gemm/gen/6x8s4-minmax-neonfma.c", |
| 2591 | "src/f32-gemm/gen/8x8s4-minmax-neonfma.c", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 2592 | "src/f32-ibilinear-chw/gen/neonfma-p4.c", |
| 2593 | "src/f32-ibilinear-chw/gen/neonfma-p8.c", |
| Frank Barchard | 8247e21 | 2021-02-03 18:12:33 -0800 | [diff] [blame] | 2594 | "src/f32-ibilinear/gen/neonfma-c4.c", |
| 2595 | "src/f32-ibilinear/gen/neonfma-c8.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2596 | "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2597 | "src/f32-igemm/gen/1x8s4-minmax-neonfma.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2598 | "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2599 | "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c", |
| 2600 | "src/f32-igemm/gen/4x8s4-minmax-neonfma.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2601 | "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c", |
| 2602 | "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2603 | "src/f32-igemm/gen/6x8s4-minmax-neonfma.c", |
| 2604 | "src/f32-igemm/gen/8x8s4-minmax-neonfma.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2605 | "src/f32-ppmm/gen/4x8-minmax-neonfma.c", |
| 2606 | "src/f32-ppmm/gen/8x8-minmax-neonfma.c", |
| Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame] | 2607 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c", |
| Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame] | 2608 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2609 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c", |
| Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame] | 2610 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c", |
| 2611 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2612 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c", |
| Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame] | 2613 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c", |
| 2614 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2615 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c", |
| Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame] | 2616 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c", |
| 2617 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2618 | "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c", |
| 2619 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c", |
| 2620 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c", |
| 2621 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c", |
| 2622 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c", |
| 2623 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c", |
| 2624 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c", |
| 2625 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c", |
| 2626 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c", |
| 2627 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c", |
| 2628 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c", |
| 2629 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c", |
| 2630 | "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c", |
| Marat Dukhan | 2fa7a0c | 2020-12-06 19:09:02 -0800 | [diff] [blame] | 2631 | "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c", |
| 2632 | "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c", |
| 2633 | "src/f32-spmm/gen/4x1-minmax-neonfma.c", |
| 2634 | "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c", |
| 2635 | "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c", |
| 2636 | "src/f32-spmm/gen/8x1-minmax-neonfma.c", |
| 2637 | "src/f32-spmm/gen/12x1-minmax-neonfma.c", |
| 2638 | "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c", |
| 2639 | "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c", |
| 2640 | "src/f32-spmm/gen/16x1-minmax-neonfma.c", |
| 2641 | "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c", |
| 2642 | "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c", |
| 2643 | "src/f32-spmm/gen/32x1-minmax-neonfma.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2644 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c", |
| 2645 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c", |
| 2646 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c", |
| 2647 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c", |
| 2648 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c", |
| 2649 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c", |
| 2650 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c", |
| 2651 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c", |
| 2652 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c", |
| 2653 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c", |
| 2654 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c", |
| 2655 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2656 | "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c", |
| 2657 | "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2658 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c", |
| 2659 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c", |
| 2660 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c", |
| 2661 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c", |
| 2662 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c", |
| 2663 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c", |
| 2664 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c", |
| 2665 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c", |
| 2666 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c", |
| 2667 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c", |
| 2668 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c", |
| 2669 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c", |
| 2670 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c", |
| 2671 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c", |
| 2672 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c", |
| 2673 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c", |
| 2674 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c", |
| 2675 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c", |
| 2676 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c", |
| 2677 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c", |
| 2678 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c", |
| 2679 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c", |
| 2680 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c", |
| 2681 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c", |
| 2682 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c", |
| 2683 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c", |
| 2684 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c", |
| 2685 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c", |
| 2686 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c", |
| 2687 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c", |
| 2688 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c", |
| 2689 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c", |
| 2690 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c", |
| 2691 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c", |
| 2692 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c", |
| 2693 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c", |
| 2694 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c", |
| 2695 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c", |
| 2696 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c", |
| 2697 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c", |
| 2698 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c", |
| 2699 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c", |
| 2700 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c", |
| 2701 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c", |
| 2702 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c", |
| 2703 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c", |
| 2704 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c", |
| 2705 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c", |
| 2706 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c", |
| 2707 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c", |
| 2708 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c", |
| 2709 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c", |
| 2710 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c", |
| 2711 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 2712 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c", |
| 2713 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c", |
| 2714 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c", |
| 2715 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c", |
| 2716 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c", |
| 2717 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c", |
| 2718 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c", |
| 2719 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c", |
| 2720 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c", |
| 2721 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c", |
| 2722 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c", |
| 2723 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c", |
| 2724 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c", |
| 2725 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c", |
| 2726 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c", |
| 2727 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c", |
| 2728 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c", |
| 2729 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c", |
| 2730 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c", |
| 2731 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 2732 | "src/math/exp-neonfma-rr2-lut64-p2.c", |
| 2733 | "src/math/exp-neonfma-rr2-p5.c", |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 2734 | "src/math/expm1minus-neonfma-rr1-lut16-p3.c", |
| 2735 | "src/math/expm1minus-neonfma-rr1-p6.c", |
| Marat Dukhan | 9dd119a | 2020-11-20 18:20:04 -0800 | [diff] [blame] | 2736 | "src/math/expminus-neonfma-rr2-lut64-p2.c", |
| 2737 | "src/math/expminus-neonfma-rr2-lut2048-p1.c", |
| 2738 | "src/math/expminus-neonfma-rr2-p5.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 2739 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c", |
| 2740 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c", |
| 2741 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2742 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c", |
| 2743 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c", |
| 2744 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 2745 | "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c", |
| 2746 | "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c", |
| 2747 | "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 2748 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c", |
| 2749 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c", |
| 2750 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2751 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c", |
| 2752 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c", |
| 2753 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 2754 | "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c", |
| 2755 | "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c", |
| 2756 | "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 2757 | "src/math/sqrt-neonfma-nr1fma.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 2758 | "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2759 | "src/math/sqrt-neonfma-nr2fma.c", |
| 2760 | "src/math/sqrt-neonfma-nr2fma1adj.c", |
| 2761 | "src/math/sqrt-neonfma-nr3fma.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2762 | ] |
| 2763 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2764 | PROD_AARCH64_NEONFMA_MICROKERNEL_SRCS = [ |
| 2765 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c", |
| 2766 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c", |
| 2767 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c", |
| 2768 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c", |
| 2769 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c", |
| 2770 | "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 2771 | "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 2772 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 2773 | "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 2774 | "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 2775 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 2776 | "src/f32-spmm/gen/32x2-minmax-neonfma.c", |
| 2777 | "src/f32-spmm/gen/32x4-minmax-neonfma.c", |
| 2778 | "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c", |
| 2779 | "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c", |
| 2780 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c", |
| 2781 | "src/f32-vsqrt/gen/neon-sqrt-x4.c", |
| 2782 | ] |
| 2783 | |
| 2784 | ALL_AARCH64_NEONFMA_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 2785 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2786 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2787 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2788 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c", |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 2789 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2790 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2791 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2792 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 2793 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2794 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c", |
| 2795 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c", |
| 2796 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c", |
| Marat Dukhan | 1268a24 | 2020-10-24 00:36:32 -0700 | [diff] [blame] | 2797 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2798 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c", |
| Marat Dukhan | 1268a24 | 2020-10-24 00:36:32 -0700 | [diff] [blame] | 2799 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c", |
| 2800 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c", |
| 2801 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c", |
| 2802 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c", |
| 2803 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 2804 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c", |
| 2805 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c", |
| 2806 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2807 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 2808 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2809 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c", |
| 2810 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c", |
| 2811 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2812 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c", |
| 2813 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c", |
| 2814 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c", |
| 2815 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2816 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2817 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c", |
| 2818 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2819 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2820 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2821 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2822 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2823 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c", |
| 2824 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 2825 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c", |
| 2826 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c", |
| 2827 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c", |
| 2828 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c", |
| 2829 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c", |
| 2830 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c", |
| 2831 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c", |
| 2832 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 2833 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2834 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2835 | "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c", |
| 2836 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c", |
| 2837 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c", |
| 2838 | "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c", |
| 2839 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c", |
| 2840 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c", |
| 2841 | "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 2842 | "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 2843 | "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c", |
| 2844 | "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c", |
| 2845 | "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c", |
| 2846 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 2847 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c", |
| 2848 | "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 2849 | "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 2850 | "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c", |
| 2851 | "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c", |
| 2852 | "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c", |
| 2853 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 2854 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 2855 | "src/f32-spmm/gen/4x2-minmax-neonfma.c", |
| 2856 | "src/f32-spmm/gen/4x4-minmax-neonfma.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 2857 | "src/f32-spmm/gen/8x2-minmax-neonfma.c", |
| 2858 | "src/f32-spmm/gen/8x4-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2859 | "src/f32-spmm/gen/12x2-minmax-neonfma.c", |
| 2860 | "src/f32-spmm/gen/12x4-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2861 | "src/f32-spmm/gen/16x2-minmax-neonfma.c", |
| 2862 | "src/f32-spmm/gen/16x4-minmax-neonfma.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 2863 | "src/f32-spmm/gen/32x2-minmax-neonfma.c", |
| 2864 | "src/f32-spmm/gen/32x4-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2865 | "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c", |
| 2866 | "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c", |
| 2867 | "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c", |
| 2868 | "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c", |
| 2869 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c", |
| 2870 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2871 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c", |
| 2872 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c", |
| 2873 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c", |
| 2874 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c", |
| 2875 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c", |
| 2876 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c", |
| 2877 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c", |
| 2878 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c", |
| 2879 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c", |
| 2880 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c", |
| 2881 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c", |
| 2882 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c", |
| 2883 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c", |
| 2884 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c", |
| 2885 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c", |
| 2886 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c", |
| 2887 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c", |
| 2888 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 2889 | "src/f32-vsqrt/gen/neon-sqrt-x4.c", |
| 2890 | "src/f32-vsqrt/gen/neon-sqrt-x8.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 2891 | "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2892 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 2893 | "src/math/sigmoid-neonfma-rr1-p5-div.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 2894 | "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2895 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 2896 | "src/math/sigmoid-neonfma-rr2-p5-div.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2897 | ] |
| 2898 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2899 | PROD_NEONV8_MICROKERNEL_SRCS = [ |
| 2900 | "src/f32-vrnd/gen/vrndd-neonv8-x8.c", |
| 2901 | "src/f32-vrnd/gen/vrndne-neonv8-x8.c", |
| 2902 | "src/f32-vrnd/gen/vrndu-neonv8-x8.c", |
| 2903 | "src/f32-vrnd/gen/vrndz-neonv8-x8.c", |
| 2904 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 2905 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 2906 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| 2907 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2908 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 2909 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| 2910 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2911 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 2912 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| 2913 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2914 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 2915 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| 2916 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2917 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 2918 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 2919 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 2920 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 2921 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2922 | ] |
| 2923 | |
| 2924 | ALL_NEONV8_MICROKERNEL_SRCS = [ |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 2925 | "src/f32-vrnd/gen/vrndd-neonv8-x4.c", |
| 2926 | "src/f32-vrnd/gen/vrndd-neonv8-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2927 | "src/f32-vrnd/gen/vrndne-neonv8-x4.c", |
| 2928 | "src/f32-vrnd/gen/vrndne-neonv8-x8.c", |
| 2929 | "src/f32-vrnd/gen/vrndu-neonv8-x4.c", |
| 2930 | "src/f32-vrnd/gen/vrndu-neonv8-x8.c", |
| 2931 | "src/f32-vrnd/gen/vrndz-neonv8-x4.c", |
| 2932 | "src/f32-vrnd/gen/vrndz-neonv8-x8.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 2933 | "src/math/roundd-neonv8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2934 | "src/math/roundne-neonv8.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 2935 | "src/math/roundu-neonv8.c", |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 2936 | "src/math/roundz-neonv8.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2937 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 2938 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2939 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2940 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 2941 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2942 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2943 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 2944 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c", |
| 2945 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c", |
| 2946 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2947 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2948 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 2949 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c", |
| 2950 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c", |
| 2951 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2952 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 2953 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 2954 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 2955 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 2956 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2957 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2958 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2959 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2960 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2961 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2962 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2963 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2964 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2965 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2966 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2967 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2968 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2969 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| 2970 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| 2971 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| 2972 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 2973 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 2974 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 2975 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 2976 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2977 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2978 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2979 | "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2980 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2981 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2982 | "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2983 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2984 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2985 | "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 14f325e | 2021-06-30 18:46:25 -0700 | [diff] [blame] | 2986 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 2987 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c", |
| 2988 | "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 2989 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 2990 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 2991 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c", |
| 2992 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 2993 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 2994 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 2995 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| 2996 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| 2997 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| 2998 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 2999 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 3000 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 3001 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 3002 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 3003 | "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 3004 | "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 3005 | "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 3006 | "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 3007 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 3008 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 3009 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c", |
| 3010 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 3011 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 3012 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 3013 | ] |
| 3014 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3015 | PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [ |
| 3016 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c", |
| 3017 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c", |
| 3018 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c", |
| 3019 | "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c", |
| 3020 | "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c", |
| 3021 | "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 3022 | "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 3023 | "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 3024 | "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 3025 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c", |
| 3026 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c", |
| 3027 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c", |
| 3028 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c", |
| 3029 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c", |
| 3030 | "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c", |
| 3031 | ] |
| 3032 | |
| 3033 | ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [ |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 3034 | "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c", |
| 3035 | "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c", |
| 3036 | "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c", |
| 3037 | "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3038 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c", |
| 3039 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c", |
| 3040 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c", |
| 3041 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c", |
| 3042 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c", |
| 3043 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c", |
| 3044 | "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c", |
| 3045 | "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c", |
| Frank Barchard | 0bb49a7 | 2020-06-04 11:35:11 -0700 | [diff] [blame] | 3046 | "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c", |
| 3047 | "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3048 | "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c", |
| 3049 | "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c", |
| 3050 | "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c", |
| 3051 | "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c", |
| 3052 | "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c", |
| 3053 | "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c", |
| 3054 | "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c", |
| 3055 | "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c", |
| 3056 | "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c", |
| 3057 | "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 3058 | "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c", |
| 3059 | "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c", |
| 3060 | "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c", |
| 3061 | "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 3062 | "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c", |
| 3063 | "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3064 | "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c", |
| 3065 | "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 3066 | "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c", |
| 3067 | "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c", |
| 3068 | "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c", |
| 3069 | "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 3070 | "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c", |
| 3071 | "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c", |
| Frank Barchard | b196659 | 2020-05-12 13:47:06 -0700 | [diff] [blame] | 3072 | "src/f16-prelu/gen/neonfp16arith-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 3073 | "src/f16-prelu/gen/neonfp16arith-2x16.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 3074 | "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3075 | "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 3076 | "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3077 | "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 3078 | "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3079 | "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 3080 | "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3081 | "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c", |
| 3082 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c", |
| 3083 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c", |
| 3084 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c", |
| 3085 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c", |
| 3086 | "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c", |
| 3087 | "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c", |
| 3088 | "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c", |
| 3089 | "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c", |
| 3090 | "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c", |
| 3091 | "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c", |
| 3092 | "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c", |
| 3093 | "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c", |
| 3094 | "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c", |
| 3095 | "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c", |
| 3096 | "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c", |
| 3097 | "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c", |
| 3098 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c", |
| 3099 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c", |
| 3100 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c", |
| 3101 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c", |
| 3102 | "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c", |
| 3103 | "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c", |
| 3104 | "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c", |
| 3105 | "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c", |
| 3106 | "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c", |
| 3107 | "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c", |
| 3108 | "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c", |
| 3109 | "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 3110 | "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c", |
| 3111 | "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 3112 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c", |
| 3113 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3114 | "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c", |
| 3115 | "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c", |
| Frank Barchard | d4416d6 | 2021-05-17 15:51:37 -0700 | [diff] [blame] | 3116 | "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c", |
| 3117 | "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3118 | ] |
| 3119 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3120 | PROD_NEONDOT_MICROKERNEL_SRCS = [ |
| 3121 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 3122 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 3123 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 3124 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 3125 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 3126 | "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 3127 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 3128 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 3129 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 3130 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 3131 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 3132 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 3133 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 3134 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 3135 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 3136 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 3137 | ] |
| 3138 | |
| 3139 | ALL_NEONDOT_MICROKERNEL_SRCS = [ |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 3140 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 3141 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 3142 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 3143 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 3144 | "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c", |
| 3145 | "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c", |
| 3146 | "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c", |
| 3147 | "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c", |
| 3148 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 3149 | "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 3150 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 3151 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 3152 | "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c", |
| 3153 | "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c", |
| 3154 | "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c", |
| 3155 | "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c", |
| Marat Dukhan | 18630de | 2021-06-02 22:20:01 -0700 | [diff] [blame] | 3156 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 3157 | "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 3158 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 3159 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 3160 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 3161 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 4486f87 | 2021-08-07 15:22:50 -0700 | [diff] [blame^] | 3162 | "src/qs8-gemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 3163 | "src/qs8-gemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 3164 | "src/qs8-gemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 3165 | "src/qs8-gemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 18630de | 2021-06-02 22:20:01 -0700 | [diff] [blame] | 3166 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 3167 | "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 3168 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 3169 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 3170 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 3171 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 4486f87 | 2021-08-07 15:22:50 -0700 | [diff] [blame^] | 3172 | "src/qs8-igemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 3173 | "src/qs8-igemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 3174 | "src/qs8-igemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 3175 | "src/qs8-igemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 3176 | ] |
| 3177 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3178 | PROD_SSE_MICROKERNEL_SRCS = [ |
| 3179 | "src/f32-avgpool/9p8x-minmax-sse-c4.c", |
| 3180 | "src/f32-avgpool/9x-minmax-sse-c4.c", |
| 3181 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c", |
| 3182 | "src/f32-dwconv/gen/up8x4-minmax-sse.c", |
| 3183 | "src/f32-dwconv/gen/up8x9-minmax-sse.c", |
| 3184 | "src/f32-dwconv/gen/up8x25-minmax-sse.c", |
| 3185 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c", |
| 3186 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c", |
| 3187 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c", |
| 3188 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c", |
| 3189 | "src/f32-gavgpool-cw/sse-x4.c", |
| 3190 | "src/f32-gavgpool/7p7x-minmax-sse-c4.c", |
| 3191 | "src/f32-gavgpool/7x-minmax-sse-c4.c", |
| 3192 | "src/f32-gemm/gen/1x8-minmax-sse-load1.c", |
| 3193 | "src/f32-gemm/gen/4x2c4-minmax-sse.c", |
| 3194 | "src/f32-gemm/gen/4x8-minmax-sse-load1.c", |
| 3195 | "src/f32-ibilinear-chw/gen/sse-p8.c", |
| 3196 | "src/f32-ibilinear/gen/sse-c8.c", |
| 3197 | "src/f32-igemm/gen/1x8-minmax-sse-load1.c", |
| 3198 | "src/f32-igemm/gen/4x2c4-minmax-sse.c", |
| 3199 | "src/f32-igemm/gen/4x8-minmax-sse-load1.c", |
| 3200 | "src/f32-maxpool/9p8x-minmax-sse-c4.c", |
| 3201 | "src/f32-pavgpool/9p8x-minmax-sse-c4.c", |
| 3202 | "src/f32-pavgpool/9x-minmax-sse-c4.c", |
| 3203 | "src/f32-rmax/sse.c", |
| 3204 | "src/f32-spmm/gen/32x1-minmax-sse.c", |
| 3205 | "src/f32-vbinary/gen/vadd-minmax-sse-x8.c", |
| 3206 | "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c", |
| 3207 | "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c", |
| 3208 | "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c", |
| 3209 | "src/f32-vbinary/gen/vmax-sse-x8.c", |
| 3210 | "src/f32-vbinary/gen/vmaxc-sse-x8.c", |
| 3211 | "src/f32-vbinary/gen/vmin-sse-x8.c", |
| 3212 | "src/f32-vbinary/gen/vminc-sse-x8.c", |
| 3213 | "src/f32-vbinary/gen/vmul-minmax-sse-x8.c", |
| 3214 | "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c", |
| 3215 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c", |
| 3216 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c", |
| 3217 | "src/f32-vbinary/gen/vsqrdiff-sse-x8.c", |
| 3218 | "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c", |
| 3219 | "src/f32-vbinary/gen/vsub-minmax-sse-x8.c", |
| 3220 | "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c", |
| 3221 | "src/f32-vclamp/gen/vclamp-sse-x8.c", |
| 3222 | "src/f32-vhswish/gen/vhswish-sse-x8.c", |
| 3223 | "src/f32-vlrelu/gen/vlrelu-sse-x8.c", |
| 3224 | "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c", |
| 3225 | "src/f32-vsqrt/gen/sse-sqrt-x4.c", |
| 3226 | "src/f32-vunary/gen/vabs-sse-x8.c", |
| 3227 | "src/f32-vunary/gen/vneg-sse-x8.c", |
| 3228 | "src/f32-vunary/gen/vsqr-sse-x8.c", |
| 3229 | "src/x32-fill/sse.c", |
| 3230 | "src/x32-packx/x4-sse.c", |
| 3231 | "src/x32-pad/sse.c", |
| 3232 | ] |
| 3233 | |
| 3234 | ALL_SSE_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3235 | "src/f32-avgpool/9p8x-minmax-sse-c4.c", |
| 3236 | "src/f32-avgpool/9x-minmax-sse-c4.c", |
| Erich Elsen | b123340 | 2020-06-08 15:53:15 -0700 | [diff] [blame] | 3237 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c", |
| 3238 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3239 | "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c", |
| 3240 | "src/f32-dwconv/gen/up4x4-minmax-sse.c", |
| 3241 | "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c", |
| 3242 | "src/f32-dwconv/gen/up4x9-minmax-sse.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3243 | "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c", |
| 3244 | "src/f32-dwconv/gen/up4x25-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3245 | "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c", |
| 3246 | "src/f32-dwconv/gen/up8x4-minmax-sse.c", |
| 3247 | "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c", |
| 3248 | "src/f32-dwconv/gen/up8x9-minmax-sse.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3249 | "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c", |
| 3250 | "src/f32-dwconv/gen/up8x25-minmax-sse.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3251 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c", |
| 3252 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c", |
| 3253 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c", |
| Marat Dukhan | 470078a | 2020-10-23 22:36:52 -0700 | [diff] [blame] | 3254 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3255 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c", |
| Marat Dukhan | 470078a | 2020-10-23 22:36:52 -0700 | [diff] [blame] | 3256 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c", |
| 3257 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c", |
| 3258 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c", |
| 3259 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c", |
| 3260 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c", |
| Marat Dukhan | 0ff9718 | 2020-10-25 19:14:03 -0700 | [diff] [blame] | 3261 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c", |
| 3262 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c", |
| 3263 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3264 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c", |
| Marat Dukhan | 0ff9718 | 2020-10-25 19:14:03 -0700 | [diff] [blame] | 3265 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3266 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c", |
| 3267 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c", |
| 3268 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c", |
| Marat Dukhan | d050389 | 2020-10-30 08:22:04 -0700 | [diff] [blame] | 3269 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c", |
| 3270 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c", |
| 3271 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c", |
| 3272 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c", |
| 3273 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c", |
| 3274 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c", |
| 3275 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c", |
| 3276 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c", |
| 3277 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c", |
| 3278 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c", |
| 3279 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c", |
| 3280 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c", |
| 3281 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c", |
| Marat Dukhan | ccca214 | 2020-10-30 17:32:45 -0700 | [diff] [blame] | 3282 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c", |
| 3283 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c", |
| 3284 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c", |
| 3285 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c", |
| 3286 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c", |
| 3287 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c", |
| 3288 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c", |
| 3289 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c", |
| Marat Dukhan | ccca214 | 2020-10-30 17:32:45 -0700 | [diff] [blame] | 3290 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 3291 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 3292 | "src/f32-gavgpool-cw/sse-x4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3293 | "src/f32-gavgpool/7p7x-minmax-sse-c4.c", |
| 3294 | "src/f32-gavgpool/7x-minmax-sse-c4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3295 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c", |
| 3296 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c", |
| 3297 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 3298 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c", |
| 3299 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c", |
| 3300 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3301 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c", |
| 3302 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c", |
| 3303 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 3304 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c", |
| 3305 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c", |
| 3306 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3307 | "src/f32-gemm/gen/1x8-minmax-sse-dup.c", |
| 3308 | "src/f32-gemm/gen/1x8-minmax-sse-load1.c", |
| 3309 | "src/f32-gemm/gen/1x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 3310 | "src/f32-gemm/gen/3x8-minmax-sse-dup.c", |
| 3311 | "src/f32-gemm/gen/3x8-minmax-sse-load1.c", |
| 3312 | "src/f32-gemm/gen/3x8s4-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3313 | "src/f32-gemm/gen/4x2c4-minmax-sse.c", |
| 3314 | "src/f32-gemm/gen/4x8-minmax-sse-dup.c", |
| 3315 | "src/f32-gemm/gen/4x8-minmax-sse-load1.c", |
| 3316 | "src/f32-gemm/gen/4x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 3317 | "src/f32-gemm/gen/5x8-minmax-sse-dup.c", |
| 3318 | "src/f32-gemm/gen/5x8-minmax-sse-load1.c", |
| 3319 | "src/f32-gemm/gen/5x8s4-minmax-sse.c", |
| Artsiom Ablavatski | b3ffd58 | 2021-03-31 13:00:08 -0700 | [diff] [blame] | 3320 | "src/f32-ibilinear-chw/gen/sse-p4.c", |
| 3321 | "src/f32-ibilinear-chw/gen/sse-p8.c", |
| Frank Barchard | 4a35204 | 2021-04-13 15:52:08 -0700 | [diff] [blame] | 3322 | "src/f32-ibilinear/gen/sse-c4.c", |
| 3323 | "src/f32-ibilinear/gen/sse-c8.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3324 | "src/f32-igemm/gen/1x8-minmax-sse-dup.c", |
| 3325 | "src/f32-igemm/gen/1x8-minmax-sse-load1.c", |
| 3326 | "src/f32-igemm/gen/1x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 3327 | "src/f32-igemm/gen/3x8-minmax-sse-dup.c", |
| 3328 | "src/f32-igemm/gen/3x8-minmax-sse-load1.c", |
| 3329 | "src/f32-igemm/gen/3x8s4-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3330 | "src/f32-igemm/gen/4x2c4-minmax-sse.c", |
| 3331 | "src/f32-igemm/gen/4x8-minmax-sse-dup.c", |
| 3332 | "src/f32-igemm/gen/4x8-minmax-sse-load1.c", |
| 3333 | "src/f32-igemm/gen/4x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 3334 | "src/f32-igemm/gen/5x8-minmax-sse-dup.c", |
| 3335 | "src/f32-igemm/gen/5x8-minmax-sse-load1.c", |
| 3336 | "src/f32-igemm/gen/5x8s4-minmax-sse.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3337 | "src/f32-maxpool/9p8x-minmax-sse-c4.c", |
| 3338 | "src/f32-pavgpool/9p8x-minmax-sse-c4.c", |
| 3339 | "src/f32-pavgpool/9x-minmax-sse-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3340 | "src/f32-ppmm/gen/4x8-minmax-sse.c", |
| Marat Dukhan | 39b5e94 | 2020-06-24 15:03:48 -0700 | [diff] [blame] | 3341 | "src/f32-prelu/gen/sse-2x4.c", |
| 3342 | "src/f32-prelu/gen/sse-2x8.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3343 | "src/f32-rmax/sse.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 3344 | "src/f32-spmm/gen/4x1-minmax-sse.c", |
| 3345 | "src/f32-spmm/gen/8x1-minmax-sse.c", |
| Erich Elsen | 6e80fdc | 2020-06-09 15:35:37 -0700 | [diff] [blame] | 3346 | "src/f32-spmm/gen/16x1-minmax-sse.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 3347 | "src/f32-spmm/gen/32x1-minmax-sse.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 3348 | "src/f32-vbinary/gen/vadd-minmax-sse-x4.c", |
| 3349 | "src/f32-vbinary/gen/vadd-minmax-sse-x8.c", |
| 3350 | "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c", |
| 3351 | "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c", |
| 3352 | "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c", |
| 3353 | "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c", |
| 3354 | "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c", |
| 3355 | "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 3356 | "src/f32-vbinary/gen/vmax-sse-x4.c", |
| 3357 | "src/f32-vbinary/gen/vmax-sse-x8.c", |
| 3358 | "src/f32-vbinary/gen/vmaxc-sse-x4.c", |
| 3359 | "src/f32-vbinary/gen/vmaxc-sse-x8.c", |
| 3360 | "src/f32-vbinary/gen/vmin-sse-x4.c", |
| 3361 | "src/f32-vbinary/gen/vmin-sse-x8.c", |
| 3362 | "src/f32-vbinary/gen/vminc-sse-x4.c", |
| 3363 | "src/f32-vbinary/gen/vminc-sse-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 3364 | "src/f32-vbinary/gen/vmul-minmax-sse-x4.c", |
| 3365 | "src/f32-vbinary/gen/vmul-minmax-sse-x8.c", |
| 3366 | "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c", |
| 3367 | "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c", |
| 3368 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c", |
| 3369 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c", |
| 3370 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c", |
| 3371 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 3372 | "src/f32-vbinary/gen/vsqrdiff-sse-x4.c", |
| 3373 | "src/f32-vbinary/gen/vsqrdiff-sse-x8.c", |
| 3374 | "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c", |
| 3375 | "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 3376 | "src/f32-vbinary/gen/vsub-minmax-sse-x4.c", |
| 3377 | "src/f32-vbinary/gen/vsub-minmax-sse-x8.c", |
| 3378 | "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c", |
| 3379 | "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 3380 | "src/f32-vclamp/gen/vclamp-sse-x4.c", |
| 3381 | "src/f32-vclamp/gen/vclamp-sse-x8.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 3382 | "src/f32-vhswish/gen/vhswish-sse-x4.c", |
| 3383 | "src/f32-vhswish/gen/vhswish-sse-x8.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 3384 | "src/f32-vlrelu/gen/vlrelu-sse-x4.c", |
| 3385 | "src/f32-vlrelu/gen/vlrelu-sse-x8.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3386 | "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c", |
| 3387 | "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 3388 | "src/f32-vrelu/gen/vrelu-sse-x4.c", |
| 3389 | "src/f32-vrelu/gen/vrelu-sse-x8.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 3390 | "src/f32-vsqrt/gen/sse-sqrt-x4.c", |
| 3391 | "src/f32-vsqrt/gen/sse-sqrt-x8.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 3392 | "src/f32-vunary/gen/vabs-sse-x4.c", |
| 3393 | "src/f32-vunary/gen/vabs-sse-x8.c", |
| 3394 | "src/f32-vunary/gen/vneg-sse-x4.c", |
| 3395 | "src/f32-vunary/gen/vneg-sse-x8.c", |
| 3396 | "src/f32-vunary/gen/vsqr-sse-x4.c", |
| 3397 | "src/f32-vunary/gen/vsqr-sse-x8.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 3398 | "src/math/roundd-sse-addsub.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3399 | "src/math/roundne-sse-addsub.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 3400 | "src/math/roundu-sse-addsub.c", |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 3401 | "src/math/roundz-sse-addsub.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 3402 | "src/math/sqrt-sse-hh1mac.c", |
| 3403 | "src/math/sqrt-sse-nr1mac.c", |
| 3404 | "src/math/sqrt-sse-nr2mac.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3405 | "src/x32-fill/sse.c", |
| 3406 | "src/x32-packx/x4-sse.c", |
| 3407 | "src/x32-pad/sse.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3408 | ] |
| 3409 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3410 | PROD_SSE2_MICROKERNEL_SRCS = [ |
| 3411 | "src/f32-argmaxpool/4x-sse2-c4.c", |
| 3412 | "src/f32-argmaxpool/9p8x-sse2-c4.c", |
| 3413 | "src/f32-argmaxpool/9x-sse2-c4.c", |
| 3414 | "src/f32-prelu/gen/sse2-2x8.c", |
| 3415 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c", |
| 3416 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c", |
| 3417 | "src/f32-vlrelu/gen/vlrelu-sse2-x8.c", |
| 3418 | "src/f32-vrnd/gen/vrndd-sse2-x8.c", |
| 3419 | "src/f32-vrnd/gen/vrndne-sse2-x8.c", |
| 3420 | "src/f32-vrnd/gen/vrndu-sse2-x8.c", |
| 3421 | "src/f32-vrnd/gen/vrndz-sse2-x8.c", |
| 3422 | "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c", |
| 3423 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 3424 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 3425 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 3426 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 3427 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 3428 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 3429 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| 3430 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| 3431 | "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c", |
| 3432 | "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c", |
| 3433 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 3434 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 3435 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 3436 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 3437 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 3438 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 3439 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 3440 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3441 | "src/qu8-avgpool/9p8x-minmax-sse2-c8.c", |
| 3442 | "src/qu8-avgpool/9x-minmax-sse2-c8.c", |
| 3443 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 3444 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 3445 | "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c", |
| 3446 | "src/qu8-gavgpool/7x-minmax-sse2-c8.c", |
| 3447 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 3448 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 3449 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 3450 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 3451 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 3452 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 3453 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 3454 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3455 | "src/u8-maxpool/9p8x-minmax-sse2-c16.c", |
| 3456 | "src/u8-rmax/sse2.c", |
| 3457 | "src/u8-vclamp/sse2-x64.c", |
| 3458 | "src/x8-zip/x2-sse2.c", |
| 3459 | "src/x8-zip/x3-sse2.c", |
| 3460 | "src/x8-zip/x4-sse2.c", |
| 3461 | "src/x8-zip/xm-sse2.c", |
| 3462 | "src/x32-unpool/sse2.c", |
| 3463 | "src/x32-zip/x2-sse2.c", |
| 3464 | "src/x32-zip/x3-sse2.c", |
| 3465 | "src/x32-zip/x4-sse2.c", |
| 3466 | "src/x32-zip/xm-sse2.c", |
| 3467 | ] |
| 3468 | |
| 3469 | ALL_SSE2_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 3470 | "src/f32-argmaxpool/4x-sse2-c4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3471 | "src/f32-argmaxpool/9p8x-sse2-c4.c", |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 3472 | "src/f32-argmaxpool/9x-sse2-c4.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 3473 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c", |
| 3474 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c", |
| 3475 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c", |
| 3476 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c", |
| 3477 | "src/f32-gemm/gen/1x8-minmax-sse2-dup.c", |
| 3478 | "src/f32-gemm/gen/3x8-minmax-sse2-dup.c", |
| 3479 | "src/f32-gemm/gen/4x8-minmax-sse2-dup.c", |
| 3480 | "src/f32-gemm/gen/5x8-minmax-sse2-dup.c", |
| 3481 | "src/f32-igemm/gen/1x8-minmax-sse2-dup.c", |
| 3482 | "src/f32-igemm/gen/3x8-minmax-sse2-dup.c", |
| 3483 | "src/f32-igemm/gen/4x8-minmax-sse2-dup.c", |
| 3484 | "src/f32-igemm/gen/5x8-minmax-sse2-dup.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 3485 | "src/f32-prelu/gen/sse2-2x4.c", |
| 3486 | "src/f32-prelu/gen/sse2-2x8.c", |
| Marat Dukhan | b39689d | 2020-01-24 13:32:20 -0800 | [diff] [blame] | 3487 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c", |
| Marat Dukhan | b39689d | 2020-01-24 13:32:20 -0800 | [diff] [blame] | 3488 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3489 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c", |
| Marat Dukhan | b39689d | 2020-01-24 13:32:20 -0800 | [diff] [blame] | 3490 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c", |
| 3491 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3492 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c", |
| Marat Dukhan | b39689d | 2020-01-24 13:32:20 -0800 | [diff] [blame] | 3493 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c", |
| 3494 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3495 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c", |
| Marat Dukhan | b39689d | 2020-01-24 13:32:20 -0800 | [diff] [blame] | 3496 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c", |
| 3497 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3498 | "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3499 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c", |
| 3500 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c", |
| 3501 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c", |
| 3502 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c", |
| 3503 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c", |
| 3504 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c", |
| 3505 | "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c", |
| 3506 | "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c", |
| 3507 | "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c", |
| 3508 | "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c", |
| 3509 | "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c", |
| 3510 | "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 3511 | "src/f32-vlrelu/gen/vlrelu-sse2-x4.c", |
| 3512 | "src/f32-vlrelu/gen/vlrelu-sse2-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 3513 | "src/f32-vrnd/gen/vrndd-sse2-x4.c", |
| 3514 | "src/f32-vrnd/gen/vrndd-sse2-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3515 | "src/f32-vrnd/gen/vrndne-sse2-x4.c", |
| 3516 | "src/f32-vrnd/gen/vrndne-sse2-x8.c", |
| 3517 | "src/f32-vrnd/gen/vrndu-sse2-x4.c", |
| 3518 | "src/f32-vrnd/gen/vrndu-sse2-x8.c", |
| 3519 | "src/f32-vrnd/gen/vrndz-sse2-x4.c", |
| 3520 | "src/f32-vrnd/gen/vrndz-sse2-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 3521 | "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c", |
| 3522 | "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c", |
| 3523 | "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c", |
| 3524 | "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c", |
| 3525 | "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c", |
| 3526 | "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c", |
| 3527 | "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c", |
| 3528 | "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c", |
| 3529 | "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c", |
| 3530 | "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c", |
| 3531 | "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c", |
| 3532 | "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 3533 | "src/math/exp-sse2-rr2-lut64-p2.c", |
| 3534 | "src/math/exp-sse2-rr2-p5.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 3535 | "src/math/expm1minus-sse2-rr2-lut16-p3.c", |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 3536 | "src/math/expm1minus-sse2-rr2-p6.c", |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 3537 | "src/math/expminus-sse2-rr2-p5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3538 | "src/math/roundd-sse2-cvt.c", |
| 3539 | "src/math/roundne-sse2-cvt.c", |
| 3540 | "src/math/roundu-sse2-cvt.c", |
| 3541 | "src/math/roundz-sse2-cvt.c", |
| 3542 | "src/math/sigmoid-sse2-rr2-lut64-p2-div.c", |
| 3543 | "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c", |
| 3544 | "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c", |
| 3545 | "src/math/sigmoid-sse2-rr2-p5-div.c", |
| 3546 | "src/math/sigmoid-sse2-rr2-p5-nr1.c", |
| 3547 | "src/math/sigmoid-sse2-rr2-p5-nr2.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3548 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3549 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3550 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3551 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3552 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3553 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3554 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3555 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 3556 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c", |
| 3557 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3558 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3559 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3560 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3561 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3562 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3563 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3564 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3565 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3566 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3567 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3568 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3569 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3570 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3571 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3572 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3573 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3574 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3575 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3576 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3577 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3578 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3579 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3580 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3581 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3582 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3583 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3584 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3585 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3586 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3587 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 3588 | "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3589 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3590 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3591 | "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3592 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3593 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3594 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3595 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3596 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3597 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c", |
| 3598 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c", |
| 3599 | "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c", |
| 3600 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c", |
| 3601 | "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c", |
| Marat Dukhan | 159688f | 2020-08-06 10:34:29 -0700 | [diff] [blame] | 3602 | "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c", |
| 3603 | "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c", |
| 3604 | "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3605 | "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c", |
| 3606 | "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c", |
| 3607 | "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3608 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3609 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3610 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3611 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3612 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3613 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3614 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3615 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3616 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3617 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3618 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3619 | "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3620 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3621 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3622 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3623 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3624 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3625 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3626 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3627 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3628 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3629 | "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3630 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3631 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3632 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3633 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3634 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3635 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3636 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3637 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3638 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3639 | "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3640 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3641 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3642 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3643 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3644 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3645 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3646 | "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c", |
| Marat Dukhan | f62bbdc | 2020-08-04 13:59:04 -0700 | [diff] [blame] | 3647 | "src/qs8-requantization/fp32-sse2.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 3648 | "src/qs8-requantization/gemmlowp-sse2.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 3649 | "src/qs8-requantization/rndna-sse2.c", |
| Marat Dukhan | d9f3ad4 | 2020-08-10 12:30:58 -0700 | [diff] [blame] | 3650 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 3651 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c", |
| 3652 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c", |
| 3653 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c", |
| Marat Dukhan | 0270d9f | 2020-08-11 00:56:46 -0700 | [diff] [blame] | 3654 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| 3655 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c", |
| 3656 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c", |
| 3657 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 3658 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 3659 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| 3660 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 3661 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 3662 | "src/qu8-avgpool/9p8x-minmax-sse2-c8.c", |
| 3663 | "src/qu8-avgpool/9x-minmax-sse2-c8.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 3664 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 3665 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 3666 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| 3667 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 3668 | "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c", |
| 3669 | "src/qu8-gavgpool/7x-minmax-sse2-c8.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 3670 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 3671 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 3672 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 3673 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 3674 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 3675 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 3676 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 3677 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | cdbe9a3 | 2021-07-01 23:52:04 -0700 | [diff] [blame] | 3678 | "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 3679 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 3680 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 3681 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 3682 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 3683 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 3684 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | cdbe9a3 | 2021-07-01 23:52:04 -0700 | [diff] [blame] | 3685 | "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 3686 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 3687 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 3688 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 3689 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 3690 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 3691 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 3692 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 3693 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | cdbe9a3 | 2021-07-01 23:52:04 -0700 | [diff] [blame] | 3694 | "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 3695 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 3696 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 3697 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 3698 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 3699 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 3700 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | cdbe9a3 | 2021-07-01 23:52:04 -0700 | [diff] [blame] | 3701 | "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 3702 | "src/qu8-requantization/fp32-sse2.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 3703 | "src/qu8-requantization/gemmlowp-sse2.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 3704 | "src/qu8-requantization/rndna-sse2.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 3705 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 3706 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c", |
| 3707 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| 3708 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 3709 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 3710 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| 3711 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 3712 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3713 | "src/u8-maxpool/9p8x-minmax-sse2-c16.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3714 | "src/u8-rmax/sse2.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 3715 | "src/u8-vclamp/sse2-x64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3716 | "src/x8-zip/x2-sse2.c", |
| 3717 | "src/x8-zip/x3-sse2.c", |
| 3718 | "src/x8-zip/x4-sse2.c", |
| 3719 | "src/x8-zip/xm-sse2.c", |
| Marat Dukhan | 57dccd8 | 2020-04-14 00:53:10 -0700 | [diff] [blame] | 3720 | "src/x32-unpool/sse2.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3721 | "src/x32-zip/x2-sse2.c", |
| 3722 | "src/x32-zip/x3-sse2.c", |
| 3723 | "src/x32-zip/x4-sse2.c", |
| 3724 | "src/x32-zip/xm-sse2.c", |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 3725 | ] |
| 3726 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3727 | PROD_SSSE3_MICROKERNEL_SRCS = [ |
| 3728 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c", |
| 3729 | "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c", |
| 3730 | "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c", |
| 3731 | ] |
| 3732 | |
| 3733 | ALL_SSSE3_MICROKERNEL_SRCS = [ |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3734 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c", |
| 3735 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c", |
| 3736 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c", |
| Marat Dukhan | 98f2eeb | 2020-10-23 23:13:41 -0700 | [diff] [blame] | 3737 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3738 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c", |
| Marat Dukhan | 98f2eeb | 2020-10-23 23:13:41 -0700 | [diff] [blame] | 3739 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c", |
| 3740 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c", |
| 3741 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c", |
| 3742 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c", |
| 3743 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 3744 | "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3745 | "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c", |
| 3746 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c", |
| 3747 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c", |
| 3748 | "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c", |
| 3749 | "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c", |
| Marat Dukhan | 159688f | 2020-08-06 10:34:29 -0700 | [diff] [blame] | 3750 | "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c", |
| 3751 | "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c", |
| 3752 | "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3753 | "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c", |
| 3754 | "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c", |
| 3755 | "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3756 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-ssse3.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3757 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3758 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3759 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-ssse3.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3760 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3761 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3762 | "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3763 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-ssse3.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3764 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3765 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3766 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-ssse3.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3767 | "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3768 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3769 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3770 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3771 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3772 | "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3773 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3774 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3775 | "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 3776 | "src/qs8-requantization/gemmlowp-ssse3.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 3777 | "src/qs8-requantization/rndna-ssse3.c", |
| Marat Dukhan | cdbe9a3 | 2021-07-01 23:52:04 -0700 | [diff] [blame] | 3778 | "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c", |
| 3779 | "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c", |
| 3780 | "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c", |
| 3781 | "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 3782 | "src/qu8-requantization/gemmlowp-ssse3.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 3783 | "src/qu8-requantization/rndna-ssse3.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3784 | ] |
| 3785 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3786 | PROD_SSE41_MICROKERNEL_SRCS = [ |
| 3787 | "src/f32-prelu/gen/sse41-2x8.c", |
| 3788 | "src/f32-vlrelu/gen/vlrelu-sse41-x8.c", |
| 3789 | "src/f32-vrnd/gen/vrndd-sse41-x8.c", |
| 3790 | "src/f32-vrnd/gen/vrndne-sse41-x8.c", |
| 3791 | "src/f32-vrnd/gen/vrndu-sse41-x8.c", |
| 3792 | "src/f32-vrnd/gen/vrndz-sse41-x8.c", |
| 3793 | "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c", |
| 3794 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 3795 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| 3796 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 3797 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 3798 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 3799 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 3800 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| 3801 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| 3802 | "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c", |
| 3803 | "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c", |
| 3804 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 3805 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 3806 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 3807 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 3808 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 3809 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 3810 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 3811 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3812 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 3813 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| 3814 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 3815 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 3816 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 3817 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 3818 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 3819 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 3820 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 3821 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3822 | ] |
| 3823 | |
| 3824 | ALL_SSE41_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 3825 | "src/f32-prelu/gen/sse41-2x4.c", |
| 3826 | "src/f32-prelu/gen/sse41-2x8.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3827 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c", |
| 3828 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c", |
| 3829 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c", |
| 3830 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c", |
| 3831 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c", |
| 3832 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c", |
| 3833 | "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c", |
| 3834 | "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c", |
| 3835 | "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c", |
| 3836 | "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c", |
| 3837 | "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c", |
| 3838 | "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 3839 | "src/f32-vlrelu/gen/vlrelu-sse41-x4.c", |
| 3840 | "src/f32-vlrelu/gen/vlrelu-sse41-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 3841 | "src/f32-vrnd/gen/vrndd-sse41-x4.c", |
| 3842 | "src/f32-vrnd/gen/vrndd-sse41-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3843 | "src/f32-vrnd/gen/vrndne-sse41-x4.c", |
| 3844 | "src/f32-vrnd/gen/vrndne-sse41-x8.c", |
| 3845 | "src/f32-vrnd/gen/vrndu-sse41-x4.c", |
| 3846 | "src/f32-vrnd/gen/vrndu-sse41-x8.c", |
| 3847 | "src/f32-vrnd/gen/vrndz-sse41-x4.c", |
| 3848 | "src/f32-vrnd/gen/vrndz-sse41-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 3849 | "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c", |
| 3850 | "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c", |
| 3851 | "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c", |
| 3852 | "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c", |
| 3853 | "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c", |
| 3854 | "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c", |
| 3855 | "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c", |
| 3856 | "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c", |
| 3857 | "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c", |
| 3858 | "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c", |
| 3859 | "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c", |
| 3860 | "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3861 | "src/math/roundd-sse41.c", |
| 3862 | "src/math/roundne-sse41.c", |
| 3863 | "src/math/roundu-sse41.c", |
| 3864 | "src/math/roundz-sse41.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3865 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3866 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 3867 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3868 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3869 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 3870 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3871 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3872 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 3873 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3874 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3875 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 3876 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| 3877 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c", |
| 3878 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c", |
| 3879 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c", |
| 3880 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3881 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3882 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3883 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3884 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3885 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3886 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3887 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3888 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3889 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3890 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3891 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3892 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3893 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3894 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3895 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3896 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3897 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3898 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3899 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3900 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3901 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3902 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3903 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3904 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3905 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3906 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 3907 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3908 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3909 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3910 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 3911 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| 3912 | "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c", |
| 3913 | "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3914 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3915 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3916 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| 3917 | "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c", |
| 3918 | "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3919 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3920 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3921 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| 3922 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c", |
| 3923 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 3924 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3925 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3926 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| 3927 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c", |
| 3928 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c", |
| 3929 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c", |
| 3930 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c", |
| 3931 | "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c", |
| 3932 | "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c", |
| 3933 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c", |
| 3934 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c", |
| 3935 | "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c", |
| 3936 | "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c", |
| Marat Dukhan | 159688f | 2020-08-06 10:34:29 -0700 | [diff] [blame] | 3937 | "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c", |
| 3938 | "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c", |
| 3939 | "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3940 | "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c", |
| 3941 | "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c", |
| 3942 | "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3943 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3944 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3945 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3946 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3947 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3948 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3949 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3950 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3951 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3952 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3953 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3954 | "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3955 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3956 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3957 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3958 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3959 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3960 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3961 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3962 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3963 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3964 | "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 3965 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3966 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3967 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3968 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3969 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3970 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3971 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3972 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3973 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3974 | "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3975 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3976 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3977 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3978 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3979 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 3980 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 3981 | "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c", |
| Marat Dukhan | 2e23d2b | 2020-07-29 16:01:37 -0700 | [diff] [blame] | 3982 | "src/qs8-requantization/fp32-sse4.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 3983 | "src/qs8-requantization/gemmlowp-sse4.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 3984 | "src/qs8-requantization/rndna-sse4.c", |
| Marat Dukhan | 0d979d5 | 2021-06-09 13:21:18 -0700 | [diff] [blame] | 3985 | "src/qs8-requantization/rndnu-sse4-sra.c", |
| 3986 | "src/qs8-requantization/rndnu-sse4-srl.c", |
| Marat Dukhan | d9f3ad4 | 2020-08-10 12:30:58 -0700 | [diff] [blame] | 3987 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 3988 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c", |
| 3989 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c", |
| 3990 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c", |
| Marat Dukhan | bb9225e | 2020-09-06 22:40:56 -0700 | [diff] [blame] | 3991 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c", |
| 3992 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c", |
| 3993 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c", |
| 3994 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c", |
| Marat Dukhan | 0270d9f | 2020-08-11 00:56:46 -0700 | [diff] [blame] | 3995 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| 3996 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c", |
| 3997 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c", |
| 3998 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c", |
| Marat Dukhan | bb9225e | 2020-09-06 22:40:56 -0700 | [diff] [blame] | 3999 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c", |
| 4000 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c", |
| 4001 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c", |
| 4002 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 4003 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 4004 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 4005 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 4006 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 4007 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 4008 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 4009 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 4010 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 4011 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 4012 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 4013 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 4014 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 4015 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 4016 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 4017 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 4018 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 4019 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 4020 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 4021 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 4022 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | cdbe9a3 | 2021-07-01 23:52:04 -0700 | [diff] [blame] | 4023 | "src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 4024 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 4025 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 4026 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 4027 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 4028 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 4029 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | cdbe9a3 | 2021-07-01 23:52:04 -0700 | [diff] [blame] | 4030 | "src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 4031 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 4032 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 4033 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 4034 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 4035 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 4036 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 4037 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 4038 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | cdbe9a3 | 2021-07-01 23:52:04 -0700 | [diff] [blame] | 4039 | "src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 4040 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 4041 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 4042 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 4043 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 4044 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 4045 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | cdbe9a3 | 2021-07-01 23:52:04 -0700 | [diff] [blame] | 4046 | "src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 4047 | "src/qu8-requantization/gemmlowp-sse4.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 4048 | "src/qu8-requantization/rndna-sse4.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 4049 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 4050 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c", |
| 4051 | "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c", |
| 4052 | "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c", |
| 4053 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| 4054 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c", |
| 4055 | "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c", |
| 4056 | "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 4057 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 4058 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 4059 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 4060 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 4061 | ] |
| 4062 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4063 | PROD_AVX_MICROKERNEL_SRCS = [ |
| 4064 | "src/f32-dwconv/gen/up8x25-minmax-avx.c", |
| 4065 | "src/f32-dwconv/gen/up16x4-minmax-avx.c", |
| 4066 | "src/f32-dwconv/gen/up16x9-minmax-avx.c", |
| 4067 | "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c", |
| 4068 | "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c", |
| 4069 | "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c", |
| 4070 | "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c", |
| 4071 | "src/f32-prelu/gen/avx-2x16.c", |
| 4072 | "src/f32-vbinary/gen/vadd-minmax-avx-x16.c", |
| 4073 | "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c", |
| 4074 | "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c", |
| 4075 | "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c", |
| 4076 | "src/f32-vbinary/gen/vmax-avx-x16.c", |
| 4077 | "src/f32-vbinary/gen/vmaxc-avx-x16.c", |
| 4078 | "src/f32-vbinary/gen/vmin-avx-x16.c", |
| 4079 | "src/f32-vbinary/gen/vminc-avx-x16.c", |
| 4080 | "src/f32-vbinary/gen/vmul-minmax-avx-x16.c", |
| 4081 | "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c", |
| 4082 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c", |
| 4083 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c", |
| 4084 | "src/f32-vbinary/gen/vsqrdiff-avx-x16.c", |
| 4085 | "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c", |
| 4086 | "src/f32-vbinary/gen/vsub-minmax-avx-x16.c", |
| 4087 | "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c", |
| 4088 | "src/f32-vclamp/gen/vclamp-avx-x16.c", |
| 4089 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c", |
| 4090 | "src/f32-vhswish/gen/vhswish-avx-x16.c", |
| 4091 | "src/f32-vlrelu/gen/vlrelu-avx-x16.c", |
| 4092 | "src/f32-vrnd/gen/vrndd-avx-x16.c", |
| 4093 | "src/f32-vrnd/gen/vrndne-avx-x16.c", |
| 4094 | "src/f32-vrnd/gen/vrndu-avx-x16.c", |
| 4095 | "src/f32-vrnd/gen/vrndz-avx-x16.c", |
| 4096 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c", |
| 4097 | "src/f32-vsqrt/gen/avx-sqrt-x8.c", |
| 4098 | "src/f32-vunary/gen/vabs-avx-x16.c", |
| 4099 | "src/f32-vunary/gen/vneg-avx-x16.c", |
| 4100 | "src/f32-vunary/gen/vsqr-avx-x16.c", |
| Marat Dukhan | 2848059 | 2021-07-27 23:52:27 -0700 | [diff] [blame] | 4101 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| 4102 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4103 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 4104 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 4105 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 4106 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 4107 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| 4108 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| 4109 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 4110 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 4111 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 4112 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 4113 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 4114 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 4115 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 4116 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4117 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| 4118 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| 4119 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 4120 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 4121 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 4122 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 4123 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 4124 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 4125 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 4126 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4127 | ] |
| 4128 | |
| 4129 | ALL_AVX_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4130 | "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c", |
| 4131 | "src/f32-dwconv/gen/up8x4-minmax-avx.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4132 | "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c", |
| 4133 | "src/f32-dwconv/gen/up8x9-minmax-avx.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4134 | "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c", |
| 4135 | "src/f32-dwconv/gen/up8x25-minmax-avx.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4136 | "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c", |
| 4137 | "src/f32-dwconv/gen/up16x4-minmax-avx.c", |
| 4138 | "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c", |
| 4139 | "src/f32-dwconv/gen/up16x9-minmax-avx.c", |
| 4140 | "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c", |
| 4141 | "src/f32-dwconv/gen/up16x25-minmax-avx.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4142 | "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4143 | "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c", |
| 4144 | "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4145 | "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4146 | "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4147 | "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4148 | "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4149 | "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c", |
| 4150 | "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c", |
| 4151 | "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c", |
| 4152 | "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c", |
| 4153 | "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c", |
| 4154 | "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c", |
| 4155 | "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c", |
| 4156 | "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c", |
| 4157 | "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c", |
| 4158 | "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c", |
| 4159 | "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4160 | "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4161 | "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c", |
| 4162 | "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4163 | "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4164 | "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4165 | "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4166 | "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4167 | "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c", |
| 4168 | "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 90eca0a | 2020-03-11 00:52:23 -0700 | [diff] [blame] | 4169 | "src/f32-prelu/gen/avx-2x8.c", |
| 4170 | "src/f32-prelu/gen/avx-2x16.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 4171 | "src/f32-rmax/avx.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 4172 | "src/f32-vbinary/gen/vadd-minmax-avx-x8.c", |
| 4173 | "src/f32-vbinary/gen/vadd-minmax-avx-x16.c", |
| 4174 | "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c", |
| 4175 | "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c", |
| 4176 | "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c", |
| 4177 | "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c", |
| 4178 | "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c", |
| 4179 | "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c", |
| Marat Dukhan | 9a88efe | 2019-12-10 15:54:24 -0800 | [diff] [blame] | 4180 | "src/f32-vbinary/gen/vmax-avx-x8.c", |
| 4181 | "src/f32-vbinary/gen/vmax-avx-x16.c", |
| 4182 | "src/f32-vbinary/gen/vmaxc-avx-x8.c", |
| 4183 | "src/f32-vbinary/gen/vmaxc-avx-x16.c", |
| 4184 | "src/f32-vbinary/gen/vmin-avx-x8.c", |
| 4185 | "src/f32-vbinary/gen/vmin-avx-x16.c", |
| 4186 | "src/f32-vbinary/gen/vminc-avx-x8.c", |
| 4187 | "src/f32-vbinary/gen/vminc-avx-x16.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 4188 | "src/f32-vbinary/gen/vmul-minmax-avx-x8.c", |
| 4189 | "src/f32-vbinary/gen/vmul-minmax-avx-x16.c", |
| 4190 | "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c", |
| 4191 | "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c", |
| 4192 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c", |
| 4193 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c", |
| 4194 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c", |
| 4195 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 4196 | "src/f32-vbinary/gen/vsqrdiff-avx-x8.c", |
| 4197 | "src/f32-vbinary/gen/vsqrdiff-avx-x16.c", |
| 4198 | "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c", |
| 4199 | "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 4200 | "src/f32-vbinary/gen/vsub-minmax-avx-x8.c", |
| 4201 | "src/f32-vbinary/gen/vsub-minmax-avx-x16.c", |
| 4202 | "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c", |
| 4203 | "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4204 | "src/f32-vclamp/gen/vclamp-avx-x8.c", |
| 4205 | "src/f32-vclamp/gen/vclamp-avx-x16.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4206 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c", |
| 4207 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c", |
| 4208 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c", |
| 4209 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c", |
| 4210 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c", |
| 4211 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c", |
| 4212 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c", |
| 4213 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c", |
| 4214 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c", |
| 4215 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c", |
| 4216 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c", |
| 4217 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c", |
| 4218 | "src/f32-velu/gen/velu-avx-rr2-p6-x8.c", |
| 4219 | "src/f32-velu/gen/velu-avx-rr2-p6-x16.c", |
| 4220 | "src/f32-velu/gen/velu-avx-rr2-p6-x24.c", |
| 4221 | "src/f32-velu/gen/velu-avx-rr2-p6-x32.c", |
| 4222 | "src/f32-velu/gen/velu-avx-rr2-p6-x40.c", |
| 4223 | "src/f32-velu/gen/velu-avx-rr2-p6-x48.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 4224 | "src/f32-vhswish/gen/vhswish-avx-x8.c", |
| 4225 | "src/f32-vhswish/gen/vhswish-avx-x16.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 4226 | "src/f32-vlrelu/gen/vlrelu-avx-x8.c", |
| 4227 | "src/f32-vlrelu/gen/vlrelu-avx-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4228 | "src/f32-vrelu/gen/vrelu-avx-x8.c", |
| 4229 | "src/f32-vrelu/gen/vrelu-avx-x16.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 4230 | "src/f32-vrnd/gen/vrndd-avx-x8.c", |
| 4231 | "src/f32-vrnd/gen/vrndd-avx-x16.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4232 | "src/f32-vrnd/gen/vrndne-avx-x8.c", |
| 4233 | "src/f32-vrnd/gen/vrndne-avx-x16.c", |
| 4234 | "src/f32-vrnd/gen/vrndu-avx-x8.c", |
| 4235 | "src/f32-vrnd/gen/vrndu-avx-x16.c", |
| 4236 | "src/f32-vrnd/gen/vrndz-avx-x8.c", |
| 4237 | "src/f32-vrnd/gen/vrndz-avx-x16.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 4238 | "src/f32-vscale/avx-x32.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4239 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c", |
| 4240 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c", |
| 4241 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c", |
| 4242 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c", |
| 4243 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c", |
| 4244 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c", |
| 4245 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c", |
| 4246 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c", |
| 4247 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c", |
| 4248 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c", |
| 4249 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c", |
| 4250 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c", |
| 4251 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c", |
| 4252 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c", |
| 4253 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c", |
| 4254 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c", |
| 4255 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c", |
| 4256 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c", |
| 4257 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c", |
| 4258 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 4259 | "src/f32-vsqrt/gen/avx-sqrt-x8.c", |
| 4260 | "src/f32-vsqrt/gen/avx-sqrt-x16.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 4261 | "src/f32-vunary/gen/vabs-avx-x8.c", |
| 4262 | "src/f32-vunary/gen/vabs-avx-x16.c", |
| 4263 | "src/f32-vunary/gen/vneg-avx-x8.c", |
| 4264 | "src/f32-vunary/gen/vneg-avx-x16.c", |
| 4265 | "src/f32-vunary/gen/vsqr-avx-x8.c", |
| 4266 | "src/f32-vunary/gen/vsqr-avx-x16.c", |
| Frank Barchard | 4a35204 | 2021-04-13 15:52:08 -0700 | [diff] [blame] | 4267 | "src/math/exp-avx-rr2-p5.c", |
| 4268 | "src/math/expm1minus-avx-rr2-lut4-p4-perm.c", |
| 4269 | "src/math/expm1minus-avx-rr2-lut16-p3.c", |
| 4270 | "src/math/expm1minus-avx-rr2-p6.c", |
| 4271 | "src/math/sigmoid-avx-rr2-lut64-p2-div.c", |
| 4272 | "src/math/sigmoid-avx-rr2-p5-div.c", |
| 4273 | "src/math/sigmoid-avx-rr2-p5-nr1.c", |
| 4274 | "src/math/sigmoid-avx-rr2-p5-nr2.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4275 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4276 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 4277 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4278 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4279 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 4280 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4281 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4282 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 4283 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4284 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4285 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 4286 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| 4287 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c", |
| 4288 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c", |
| 4289 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c", |
| 4290 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4291 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4292 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4293 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4294 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4295 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4296 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4297 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4298 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4299 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4300 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4301 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4302 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4303 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4304 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4305 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4306 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4307 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4308 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4309 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4310 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4311 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4312 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4313 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4314 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4315 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4316 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4317 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4318 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4319 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4320 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 4321 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| 4322 | "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c", |
| 4323 | "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4324 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4325 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4326 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| 4327 | "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c", |
| 4328 | "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4329 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4330 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4331 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| 4332 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c", |
| 4333 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4334 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4335 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4336 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| 4337 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c", |
| 4338 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c", |
| 4339 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c", |
| 4340 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c", |
| 4341 | "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c", |
| 4342 | "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c", |
| 4343 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c", |
| 4344 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c", |
| 4345 | "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c", |
| 4346 | "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4347 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4348 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4349 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4350 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4351 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4352 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4353 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4354 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4355 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4356 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4357 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4358 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4359 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4360 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4361 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4362 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4363 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4364 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4365 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4366 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4367 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4368 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4369 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4370 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4371 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4372 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4373 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4374 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4375 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4376 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4377 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4378 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4379 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4380 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4381 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | e9c4b96 | 2021-04-02 16:56:55 -0700 | [diff] [blame] | 4382 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c", |
| 4383 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c", |
| 4384 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c", |
| 4385 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c", |
| 4386 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 4387 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c", |
| 4388 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c", |
| 4389 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c", |
| 4390 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c", |
| 4391 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c", |
| 4392 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c", |
| 4393 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c", |
| 4394 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| 4395 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c", |
| 4396 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c", |
| 4397 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 4398 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 4399 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 4400 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 4401 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 4402 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 4403 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 4404 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 4405 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 4406 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 4407 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 4408 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 4409 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 4410 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 4411 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 4412 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 4413 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 4414 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 4415 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 4416 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 4417 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 4418 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 4419 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 4420 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 4421 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 4422 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 4423 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| 4424 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 4425 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 4426 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 4427 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 4428 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 4429 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 4430 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 4431 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 4432 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 4433 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 4434 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 4435 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 4436 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 4437 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 4438 | "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c", |
| 4439 | "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c", |
| 4440 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 4441 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c", |
| 4442 | "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c", |
| 4443 | "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c", |
| 4444 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| 4445 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 4446 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 4447 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 4448 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 4449 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 4450 | ] |
| 4451 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4452 | PROD_XOP_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 2848059 | 2021-07-27 23:52:27 -0700 | [diff] [blame] | 4453 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| 4454 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4455 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 4456 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 4457 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 4458 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 4459 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| 4460 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| 4461 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 4462 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 4463 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 4464 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 4465 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 4466 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 4467 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 4468 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 4469 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 4470 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 4471 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 4472 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 4473 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 4474 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 4475 | ] |
| 4476 | |
| 4477 | ALL_XOP_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4478 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 4479 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4480 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 4481 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4482 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 4483 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4484 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 4485 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 4486 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c", |
| 4487 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4488 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4489 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4490 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4491 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4492 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4493 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4494 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4495 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4496 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4497 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4498 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4499 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4500 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4501 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4502 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4503 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4504 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4505 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4506 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4507 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4508 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4509 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4510 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4511 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4512 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4513 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4514 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4515 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4516 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 4517 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| 4518 | "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4519 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4520 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| 4521 | "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4522 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4523 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 4524 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4525 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4526 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 4527 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c", |
| 4528 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c", |
| 4529 | "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c", |
| 4530 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c", |
| 4531 | "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4532 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4533 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4534 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4535 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4536 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4537 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4538 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4539 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4540 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4541 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4542 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4543 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4544 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4545 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4546 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4547 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4548 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4549 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4550 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4551 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4552 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4553 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4554 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4555 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4556 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4557 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4558 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4559 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4560 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4561 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4562 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4563 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4564 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4565 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4566 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | bb9225e | 2020-09-06 22:40:56 -0700 | [diff] [blame] | 4567 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 4568 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c", |
| 4569 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c", |
| 4570 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c", |
| 4571 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 4572 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c", |
| 4573 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c", |
| 4574 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 4575 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| 4576 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| 4577 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 4578 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 4579 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 4580 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 4581 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 4582 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 4583 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 4584 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 4585 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 4586 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 4587 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 4588 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 4589 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 4590 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 4591 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 4592 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| 4593 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 4594 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 4595 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 4596 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 4597 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 4598 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 4599 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 4600 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 4601 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 4602 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 4603 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 4604 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 4605 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 4606 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 4607 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 4608 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c", |
| 4609 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 4610 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c", |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 4611 | ] |
| 4612 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4613 | PROD_FMA3_MICROKERNEL_SRCS = [ |
| 4614 | "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c", |
| 4615 | "src/f32-dwconv/gen/up8x4-minmax-fma3.c", |
| 4616 | "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c", |
| 4617 | "src/f32-dwconv/gen/up8x9-minmax-fma3.c", |
| 4618 | "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c", |
| 4619 | "src/f32-dwconv/gen/up8x25-minmax-fma3.c", |
| 4620 | "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c", |
| 4621 | "src/f32-dwconv/gen/up16x4-minmax-fma3.c", |
| 4622 | "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c", |
| 4623 | "src/f32-dwconv/gen/up16x9-minmax-fma3.c", |
| 4624 | "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c", |
| 4625 | "src/f32-dwconv/gen/up16x25-minmax-fma3.c", |
| 4626 | "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c", |
| 4627 | "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 4628 | "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 4629 | "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c", |
| 4630 | "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c", |
| 4631 | "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 4632 | "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 4633 | "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c", |
| 4634 | "src/f32-vhswish/gen/vhswish-fma3-x16.c", |
| 4635 | ] |
| 4636 | |
| 4637 | ALL_FMA3_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4638 | "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c", |
| 4639 | "src/f32-dwconv/gen/up8x4-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4640 | "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c", |
| 4641 | "src/f32-dwconv/gen/up8x9-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4642 | "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c", |
| 4643 | "src/f32-dwconv/gen/up8x25-minmax-fma3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4644 | "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c", |
| 4645 | "src/f32-dwconv/gen/up16x4-minmax-fma3.c", |
| 4646 | "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c", |
| 4647 | "src/f32-dwconv/gen/up16x9-minmax-fma3.c", |
| 4648 | "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c", |
| 4649 | "src/f32-dwconv/gen/up16x25-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4650 | "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4651 | "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c", |
| 4652 | "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c", |
| 4653 | "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c", |
| 4654 | "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4655 | "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4656 | "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c", |
| 4657 | "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4658 | "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4659 | "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c", |
| 4660 | "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4661 | "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c", |
| 4662 | "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c", |
| 4663 | "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4664 | "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c", |
| 4665 | "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c", |
| 4666 | "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 4667 | "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c", |
| 4668 | "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c", |
| 4669 | "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c", |
| 4670 | "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c", |
| 4671 | "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 4672 | "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c", |
| 4673 | "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c", |
| 4674 | "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c", |
| 4675 | "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c", |
| 4676 | "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c", |
| 4677 | "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4678 | "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4679 | "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c", |
| 4680 | "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 4681 | "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c", |
| 4682 | "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4683 | "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4684 | "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c", |
| 4685 | "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4686 | "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4687 | "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c", |
| 4688 | "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4689 | "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c", |
| 4690 | "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c", |
| 4691 | "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 4692 | "src/f32-vhswish/gen/vhswish-fma3-x8.c", |
| 4693 | "src/f32-vhswish/gen/vhswish-fma3-x16.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 4694 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c", |
| 4695 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c", |
| 4696 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c", |
| 4697 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c", |
| 4698 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c", |
| 4699 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c", |
| 4700 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c", |
| 4701 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 4702 | "src/math/sqrt-fma3-nr1fma.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 4703 | "src/math/sqrt-fma3-nr1fma1adj.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4704 | "src/math/sqrt-fma3-nr2fma.c", |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 4705 | ] |
| 4706 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4707 | PROD_AVX2_MICROKERNEL_SRCS = [ |
| 4708 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c", |
| 4709 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c", |
| 4710 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 4711 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 4712 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 4713 | "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 4714 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 4715 | "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 4716 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 4717 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 4718 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 4719 | "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 4720 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 4721 | "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 4722 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 4723 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 4724 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 4725 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 4726 | "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 4727 | "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 4728 | "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 4729 | "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 4730 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 4731 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 4732 | ] |
| 4733 | |
| 4734 | ALL_AVX2_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4735 | "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c", |
| 4736 | "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4737 | "src/f32-raddexpminusmax/gen/avx2-p5-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4738 | "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4739 | "src/f32-raddexpminusmax/gen/avx2-p5-x72.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4740 | "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c", |
| 4741 | "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4742 | "src/f32-raddexpminusmax/gen/avx2-p5-x80.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4743 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c", |
| 4744 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c", |
| 4745 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4746 | "src/f32-raddexpminusmax/gen/avx2-p5-x96.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4747 | "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c", |
| 4748 | "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4749 | "src/f32-raddextexp/gen/avx2-p5-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4750 | "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4751 | "src/f32-raddextexp/gen/avx2-p5-x72.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4752 | "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c", |
| 4753 | "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4754 | "src/f32-raddextexp/gen/avx2-p5-x80.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4755 | "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c", |
| 4756 | "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c", |
| 4757 | "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4758 | "src/f32-raddextexp/gen/avx2-p5-x96.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4759 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c", |
| 4760 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4761 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4762 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4763 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4764 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c", |
| 4765 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4766 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4767 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c", |
| 4768 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c", |
| 4769 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4770 | "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4771 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c", |
| 4772 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c", |
| 4773 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c", |
| 4774 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c", |
| 4775 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c", |
| 4776 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c", |
| 4777 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c", |
| 4778 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c", |
| 4779 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c", |
| 4780 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c", |
| 4781 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c", |
| 4782 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c", |
| 4783 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c", |
| 4784 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c", |
| 4785 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c", |
| 4786 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c", |
| 4787 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c", |
| 4788 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c", |
| 4789 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c", |
| 4790 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c", |
| 4791 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c", |
| 4792 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c", |
| 4793 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c", |
| 4794 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c", |
| 4795 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c", |
| 4796 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c", |
| 4797 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c", |
| 4798 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c", |
| 4799 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c", |
| 4800 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c", |
| 4801 | "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c", |
| 4802 | "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c", |
| 4803 | "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c", |
| 4804 | "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c", |
| 4805 | "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c", |
| 4806 | "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c", |
| 4807 | "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c", |
| 4808 | "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c", |
| 4809 | "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c", |
| 4810 | "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 4811 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c", |
| 4812 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c", |
| 4813 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c", |
| 4814 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c", |
| 4815 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c", |
| 4816 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c", |
| 4817 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c", |
| 4818 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c", |
| 4819 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c", |
| 4820 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c", |
| 4821 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c", |
| 4822 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c", |
| 4823 | "src/f32-vscaleextexp/gen/avx2-p5-x8.c", |
| 4824 | "src/f32-vscaleextexp/gen/avx2-p5-x16.c", |
| 4825 | "src/f32-vscaleextexp/gen/avx2-p5-x24.c", |
| 4826 | "src/f32-vscaleextexp/gen/avx2-p5-x32.c", |
| 4827 | "src/f32-vscaleextexp/gen/avx2-p5-x40.c", |
| 4828 | "src/f32-vscaleextexp/gen/avx2-p5-x48.c", |
| 4829 | "src/f32-vscaleextexp/gen/avx2-p5-x56.c", |
| 4830 | "src/f32-vscaleextexp/gen/avx2-p5-x64.c", |
| 4831 | "src/f32-vscaleextexp/gen/avx2-p5-x72.c", |
| 4832 | "src/f32-vscaleextexp/gen/avx2-p5-x80.c", |
| 4833 | "src/f32-vscaleextexp/gen/avx2-p5-x88.c", |
| 4834 | "src/f32-vscaleextexp/gen/avx2-p5-x96.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4835 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c", |
| 4836 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c", |
| 4837 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c", |
| 4838 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c", |
| 4839 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c", |
| 4840 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c", |
| 4841 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c", |
| 4842 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c", |
| 4843 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c", |
| 4844 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c", |
| 4845 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c", |
| 4846 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c", |
| 4847 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c", |
| 4848 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c", |
| 4849 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c", |
| 4850 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c", |
| 4851 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c", |
| 4852 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c", |
| 4853 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c", |
| 4854 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c", |
| 4855 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c", |
| 4856 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c", |
| 4857 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c", |
| 4858 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c", |
| 4859 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c", |
| 4860 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c", |
| 4861 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c", |
| 4862 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c", |
| 4863 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c", |
| 4864 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 4865 | "src/math/exp-avx2-rr2-lut8-p3-perm.c", |
| 4866 | "src/math/exp-avx2-rr2-lut8-p4-perm.c", |
| 4867 | "src/math/exp-avx2-rr2-p5.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 4868 | "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c", |
| 4869 | "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c", |
| 4870 | "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c", |
| 4871 | "src/math/expm1minus-avx2-rr1-p6.c", |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 4872 | "src/math/expminus-avx2-rr2-p5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4873 | "src/math/extexp-avx2-p5.c", |
| 4874 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c", |
| 4875 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c", |
| 4876 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c", |
| 4877 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c", |
| 4878 | "src/math/sigmoid-avx2-rr1-p5-div.c", |
| 4879 | "src/math/sigmoid-avx2-rr1-p5-nr1fma.c", |
| 4880 | "src/math/sigmoid-avx2-rr1-p5-nr2fma.c", |
| 4881 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c", |
| 4882 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c", |
| 4883 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c", |
| 4884 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c", |
| 4885 | "src/math/sigmoid-avx2-rr2-p5-div.c", |
| 4886 | "src/math/sigmoid-avx2-rr2-p5-nr1fma.c", |
| 4887 | "src/math/sigmoid-avx2-rr2-p5-nr2fma.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 4888 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| 4889 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4890 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4891 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 4892 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 4893 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4894 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4895 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 4896 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 4897 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 4898 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c", |
| 4899 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4900 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4901 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 4902 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 4903 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4904 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4905 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 4906 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 4907 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 4908 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 4909 | "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c", |
| 4910 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 4911 | "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c", |
| 4912 | "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 4913 | "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | e06c813 | 2021-06-03 08:59:11 -0700 | [diff] [blame] | 4914 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 4915 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 4916 | "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4917 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 4918 | "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4919 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 4920 | "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4921 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4922 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 4923 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4924 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4925 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16-vpmovsx.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 4926 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4927 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4928 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 4929 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4930 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4931 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16-vpmovsx.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 4932 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4933 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 4934 | "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4935 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 4936 | "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4937 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4938 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 4939 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4940 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4941 | "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16-vpmovsx.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 4942 | "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4943 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4944 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 4945 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4946 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 4947 | "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16-vpmovsx.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 4948 | "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4949 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 4950 | "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4951 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 4952 | "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4953 | "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 4954 | "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 4955 | "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4956 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4957 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 4958 | "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 4959 | "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c", |
| Marat Dukhan | e6dc0b6 | 2020-09-08 23:57:14 -0700 | [diff] [blame] | 4960 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c", |
| 4961 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 4962 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c", |
| 4963 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c", |
| 4964 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c", |
| 4965 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 4966 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c", |
| 4967 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c", |
| Marat Dukhan | 09c312b | 2021-07-09 00:45:04 -0700 | [diff] [blame] | 4968 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| 4969 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| 4970 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 4971 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 4972 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| 4973 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 902ef7f | 2021-07-02 16:11:06 -0700 | [diff] [blame] | 4974 | "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 4975 | "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 4976 | "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 4977 | "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 4978 | "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 4979 | "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 4980 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c", |
| 4981 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 4982 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c", |
| 4983 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 4984 | ] |
| 4985 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4986 | PROD_AVX512F_MICROKERNEL_SRCS = [ |
| 4987 | "src/f32-dwconv/gen/up16x4-minmax-avx512f.c", |
| 4988 | "src/f32-dwconv/gen/up16x9-minmax-avx512f.c", |
| 4989 | "src/f32-dwconv/gen/up16x25-minmax-avx512f.c", |
| 4990 | "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 4991 | "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 4992 | "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 4993 | "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 4994 | "src/f32-prelu/gen/avx512f-2x16.c", |
| 4995 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c", |
| 4996 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c", |
| 4997 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c", |
| 4998 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c", |
| 4999 | "src/f32-vbinary/gen/vmax-avx512f-x32.c", |
| 5000 | "src/f32-vbinary/gen/vmaxc-avx512f-x32.c", |
| 5001 | "src/f32-vbinary/gen/vmin-avx512f-x32.c", |
| 5002 | "src/f32-vbinary/gen/vminc-avx512f-x32.c", |
| 5003 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c", |
| 5004 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c", |
| 5005 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c", |
| 5006 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c", |
| 5007 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c", |
| 5008 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c", |
| 5009 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c", |
| 5010 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c", |
| 5011 | "src/f32-vclamp/gen/vclamp-avx512f-x16.c", |
| 5012 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c", |
| 5013 | "src/f32-vhswish/gen/vhswish-avx512f-x16.c", |
| 5014 | "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c", |
| 5015 | "src/f32-vrnd/gen/vrndd-avx512f-x16.c", |
| 5016 | "src/f32-vrnd/gen/vrndne-avx512f-x16.c", |
| 5017 | "src/f32-vrnd/gen/vrndu-avx512f-x16.c", |
| 5018 | "src/f32-vrnd/gen/vrndz-avx512f-x16.c", |
| 5019 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c", |
| 5020 | "src/f32-vunary/gen/vabs-avx512f-x16.c", |
| 5021 | "src/f32-vunary/gen/vneg-avx512f-x16.c", |
| 5022 | "src/f32-vunary/gen/vsqr-avx512f-x16.c", |
| 5023 | ] |
| 5024 | |
| 5025 | ALL_AVX512F_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5026 | "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c", |
| 5027 | "src/f32-dwconv/gen/up16x4-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5028 | "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c", |
| 5029 | "src/f32-dwconv/gen/up16x9-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5030 | "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c", |
| 5031 | "src/f32-dwconv/gen/up16x25-minmax-avx512f.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5032 | "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c", |
| 5033 | "src/f32-dwconv/gen/up32x4-minmax-avx512f.c", |
| 5034 | "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c", |
| 5035 | "src/f32-dwconv/gen/up32x9-minmax-avx512f.c", |
| 5036 | "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c", |
| 5037 | "src/f32-dwconv/gen/up32x25-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5038 | "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c", |
| 5039 | "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c", |
| 5040 | "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c", |
| 5041 | "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c", |
| 5042 | "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c", |
| 5043 | "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5044 | "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 5045 | "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c", |
| 5046 | "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c", |
| 5047 | "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c", |
| 5048 | "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 5049 | "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5050 | "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 5051 | "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c", |
| 5052 | "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c", |
| 5053 | "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c", |
| 5054 | "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 5055 | "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c", |
| Marat Dukhan | 90eca0a | 2020-03-11 00:52:23 -0700 | [diff] [blame] | 5056 | "src/f32-prelu/gen/avx512f-2x16.c", |
| 5057 | "src/f32-prelu/gen/avx512f-2x32.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5058 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c", |
| 5059 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5060 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5061 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5062 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5063 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c", |
| 5064 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5065 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5066 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c", |
| 5067 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c", |
| 5068 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5069 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5070 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c", |
| 5071 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5072 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5073 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5074 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5075 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c", |
| 5076 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5077 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5078 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c", |
| 5079 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c", |
| 5080 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5081 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5082 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c", |
| 5083 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5084 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5085 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5086 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5087 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c", |
| 5088 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5089 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5090 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c", |
| 5091 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c", |
| 5092 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5093 | "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5094 | "src/f32-rmax/avx512f.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 5095 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c", |
| 5096 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c", |
| 5097 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c", |
| 5098 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c", |
| 5099 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c", |
| 5100 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c", |
| 5101 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c", |
| 5102 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c", |
| Marat Dukhan | 9a88efe | 2019-12-10 15:54:24 -0800 | [diff] [blame] | 5103 | "src/f32-vbinary/gen/vmax-avx512f-x16.c", |
| 5104 | "src/f32-vbinary/gen/vmax-avx512f-x32.c", |
| 5105 | "src/f32-vbinary/gen/vmaxc-avx512f-x16.c", |
| 5106 | "src/f32-vbinary/gen/vmaxc-avx512f-x32.c", |
| 5107 | "src/f32-vbinary/gen/vmin-avx512f-x16.c", |
| 5108 | "src/f32-vbinary/gen/vmin-avx512f-x32.c", |
| 5109 | "src/f32-vbinary/gen/vminc-avx512f-x16.c", |
| 5110 | "src/f32-vbinary/gen/vminc-avx512f-x32.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 5111 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c", |
| 5112 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c", |
| 5113 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c", |
| 5114 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c", |
| 5115 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c", |
| 5116 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c", |
| 5117 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c", |
| 5118 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 5119 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c", |
| 5120 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c", |
| 5121 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c", |
| 5122 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 5123 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c", |
| 5124 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c", |
| 5125 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c", |
| 5126 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 5127 | "src/f32-vclamp/gen/vclamp-avx512f-x16.c", |
| 5128 | "src/f32-vclamp/gen/vclamp-avx512f-x32.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5129 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c", |
| 5130 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c", |
| 5131 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c", |
| 5132 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c", |
| 5133 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c", |
| 5134 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c", |
| 5135 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c", |
| 5136 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c", |
| 5137 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c", |
| 5138 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c", |
| 5139 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c", |
| 5140 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c", |
| 5141 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c", |
| 5142 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c", |
| 5143 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c", |
| 5144 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 5145 | "src/f32-vhswish/gen/vhswish-avx512f-x16.c", |
| 5146 | "src/f32-vhswish/gen/vhswish-avx512f-x32.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 5147 | "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c", |
| 5148 | "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 5149 | "src/f32-vrelu/gen/vrelu-avx512f-x16.c", |
| 5150 | "src/f32-vrelu/gen/vrelu-avx512f-x32.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5151 | "src/f32-vrnd/gen/vrndd-avx512f-x16.c", |
| 5152 | "src/f32-vrnd/gen/vrndd-avx512f-x32.c", |
| 5153 | "src/f32-vrnd/gen/vrndne-avx512f-x16.c", |
| 5154 | "src/f32-vrnd/gen/vrndne-avx512f-x32.c", |
| 5155 | "src/f32-vrnd/gen/vrndu-avx512f-x16.c", |
| 5156 | "src/f32-vrnd/gen/vrndu-avx512f-x32.c", |
| 5157 | "src/f32-vrnd/gen/vrndz-avx512f-x16.c", |
| 5158 | "src/f32-vrnd/gen/vrndz-avx512f-x32.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 5159 | "src/f32-vscale/avx512f-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 5160 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c", |
| 5161 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c", |
| 5162 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c", |
| 5163 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c", |
| 5164 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c", |
| 5165 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c", |
| 5166 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c", |
| 5167 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| 5168 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| 5169 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| 5170 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c", |
| 5171 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| 5172 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c", |
| 5173 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c", |
| 5174 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c", |
| 5175 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c", |
| 5176 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c", |
| 5177 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c", |
| 5178 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c", |
| 5179 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c", |
| 5180 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c", |
| 5181 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c", |
| 5182 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c", |
| 5183 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 5184 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c", |
| 5185 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c", |
| 5186 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c", |
| 5187 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c", |
| 5188 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c", |
| 5189 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c", |
| 5190 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c", |
| 5191 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c", |
| 5192 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c", |
| 5193 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c", |
| 5194 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c", |
| 5195 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c", |
| 5196 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c", |
| 5197 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c", |
| 5198 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c", |
| 5199 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c", |
| 5200 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c", |
| 5201 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c", |
| 5202 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c", |
| 5203 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c", |
| 5204 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c", |
| 5205 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c", |
| 5206 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c", |
| 5207 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c", |
| 5208 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c", |
| 5209 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c", |
| 5210 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c", |
| 5211 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c", |
| 5212 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c", |
| 5213 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c", |
| 5214 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c", |
| 5215 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c", |
| 5216 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c", |
| 5217 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c", |
| 5218 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c", |
| 5219 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c", |
| 5220 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c", |
| 5221 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c", |
| 5222 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c", |
| 5223 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c", |
| 5224 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c", |
| 5225 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c", |
| 5226 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c", |
| 5227 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c", |
| 5228 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c", |
| 5229 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c", |
| 5230 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c", |
| 5231 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 5232 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c", |
| 5233 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c", |
| 5234 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c", |
| 5235 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c", |
| 5236 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c", |
| 5237 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c", |
| 5238 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c", |
| 5239 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 5240 | "src/f32-vunary/gen/vabs-avx512f-x16.c", |
| 5241 | "src/f32-vunary/gen/vabs-avx512f-x32.c", |
| 5242 | "src/f32-vunary/gen/vneg-avx512f-x16.c", |
| 5243 | "src/f32-vunary/gen/vneg-avx512f-x32.c", |
| 5244 | "src/f32-vunary/gen/vsqr-avx512f-x16.c", |
| 5245 | "src/f32-vunary/gen/vsqr-avx512f-x32.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 5246 | "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c", |
| 5247 | "src/math/exp-avx512f-rr2-lut16-p3-perm.c", |
| 5248 | "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c", |
| 5249 | "src/math/exp-avx512f-rr2-lut32-p2-perm2.c", |
| 5250 | "src/math/exp-avx512f-rr2-p5-scalef.c", |
| 5251 | "src/math/exp-avx512f-rr2-p5.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 5252 | "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c", |
| 5253 | "src/math/expm1minus-avx512f-rr1-p6.c", |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 5254 | "src/math/extexp-avx512f-p5.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 5255 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 5256 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5257 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 5258 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 5259 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5260 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 5261 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 5262 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5263 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c", |
| 5264 | "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c", |
| 5265 | "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c", |
| 5266 | "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c", |
| 5267 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c", |
| 5268 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c", |
| 5269 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c", |
| 5270 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c", |
| 5271 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c", |
| 5272 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 5273 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 5274 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5275 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c", |
| 5276 | "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c", |
| 5277 | "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c", |
| 5278 | "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 5279 | "src/math/sqrt-avx512f-nr1fma.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 5280 | "src/math/sqrt-avx512f-nr1fma1adj.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5281 | "src/math/sqrt-avx512f-nr2fma.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5282 | ] |
| 5283 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5284 | PROD_AVX512SKX_MICROKERNEL_SRCS = [ |
| 5285 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 5286 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 5287 | "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 5288 | "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 5289 | "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 5290 | "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 5291 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 5292 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 5293 | "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 5294 | "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 5295 | "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 5296 | "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 5297 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 5298 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 5299 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 5300 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 5301 | "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 5302 | "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 5303 | "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 5304 | "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 5305 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 5306 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 5307 | ] |
| 5308 | |
| 5309 | ALL_AVX512SKX_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5310 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| 5311 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| 5312 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 5313 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | c3e3f1c | 2021-06-03 09:56:16 -0700 | [diff] [blame] | 5314 | "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 5315 | "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 5316 | "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 5317 | "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 5318 | "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 5319 | "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 5320 | "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 5321 | "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5322 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5323 | "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5324 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5325 | "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5326 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5327 | "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5328 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5329 | "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5330 | "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5331 | "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5332 | "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5333 | "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5334 | "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5335 | "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5336 | "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5337 | "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 5338 | "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5339 | "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c", |
| Marat Dukhan | e76049a | 2021-07-22 14:48:59 -0700 | [diff] [blame] | 5340 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 5341 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| 5342 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 5343 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| Marat Dukhan | cfd606b | 2021-07-09 01:18:45 -0700 | [diff] [blame] | 5344 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| 5345 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| 5346 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 5347 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 3cf2e22 | 2021-07-08 11:38:45 -0700 | [diff] [blame] | 5348 | "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 5349 | "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 5350 | "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 5351 | "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 5352 | "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 5353 | "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 5354 | "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 5355 | "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | e76049a | 2021-07-22 14:48:59 -0700 | [diff] [blame] | 5356 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 5357 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| 5358 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 5359 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 5360 | ] |
| 5361 | |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 5362 | WASM32_ASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 5363 | "src/f32-vrelu/wasm_shr_x1.S", |
| 5364 | "src/f32-vrelu/wasm_shr_x2.S", |
| 5365 | "src/f32-vrelu/wasm_shr_x4.S", |
| Frank Barchard | bcedc08 | 2020-08-17 18:00:51 -0700 | [diff] [blame] | 5366 | ] |
| 5367 | |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 5368 | AARCH32_ASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 32f9381 | 2020-05-17 20:31:21 -0700 | [diff] [blame] | 5369 | "src/f32-gemm/4x4-aarch32-vfp-ld64.S", |
| Marat Dukhan | 3b98f6b | 2020-05-17 10:09:22 -0700 | [diff] [blame] | 5370 | "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5371 | "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S", |
| 5372 | "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S", |
| Frank Barchard | 490febe | 2020-07-16 18:42:17 -0700 | [diff] [blame] | 5373 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5374 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S", |
| Frank Barchard | 569561d | 2020-06-17 13:11:12 -0700 | [diff] [blame] | 5375 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S", |
| Frank Barchard | 490febe | 2020-07-16 18:42:17 -0700 | [diff] [blame] | 5376 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5377 | "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S", |
| 5378 | "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S", |
| Frank Barchard | 490febe | 2020-07-16 18:42:17 -0700 | [diff] [blame] | 5379 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S", |
| 5380 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S", |
| 5381 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S", |
| 5382 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5383 | ] |
| 5384 | |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 5385 | AARCH64_ASM_MICROKERNEL_SRCS = [ |
| Frank Barchard | bddfbcd | 2020-04-15 12:32:41 -0700 | [diff] [blame] | 5386 | "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5387 | "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| Frank Barchard | bddfbcd | 2020-04-15 12:32:41 -0700 | [diff] [blame] | 5388 | "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5389 | "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| Frank Barchard | bddfbcd | 2020-04-15 12:32:41 -0700 | [diff] [blame] | 5390 | "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 80fc5f4 | 2021-06-07 10:43:16 -0700 | [diff] [blame] | 5391 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S", |
| Frank Barchard | 9737461 | 2021-06-07 11:51:07 -0700 | [diff] [blame] | 5392 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5393 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| 5394 | "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5395 | "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S", |
| 5396 | "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 5397 | "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S", |
| 5398 | "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 5399 | "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 80fc5f4 | 2021-06-07 10:43:16 -0700 | [diff] [blame] | 5400 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S", |
| Frank Barchard | 9737461 | 2021-06-07 11:51:07 -0700 | [diff] [blame] | 5401 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5402 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 5403 | "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5404 | "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S", |
| 5405 | "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5406 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5407 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5408 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5409 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5410 | "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5411 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| 5412 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5413 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5414 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5415 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5416 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5417 | "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5418 | "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5419 | "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5420 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| 5421 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5422 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5423 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5424 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5425 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5426 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5427 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5428 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 5429 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5430 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5431 | "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S", |
| 5432 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 5433 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5434 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 5435 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S", |
| 5436 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5437 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5438 | "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5439 | "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5440 | "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5441 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 5442 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5443 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S", |
| 5444 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 5445 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S", |
| 5446 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5447 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5448 | "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5449 | "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5450 | "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 5451 | "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5452 | "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S", |
| 5453 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 5454 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S", |
| 5455 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5456 | "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5457 | "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5458 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | e349124 | 2021-06-11 14:04:57 -0700 | [diff] [blame] | 5459 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 79cd5f9 | 2021-06-21 17:34:59 -0700 | [diff] [blame] | 5460 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5461 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| 5462 | "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 5463 | "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| 5464 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | e349124 | 2021-06-11 14:04:57 -0700 | [diff] [blame] | 5465 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 79cd5f9 | 2021-06-21 17:34:59 -0700 | [diff] [blame] | 5466 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 5467 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 960ae34 | 2021-07-01 11:31:11 -0700 | [diff] [blame] | 5468 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5469 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5470 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S", |
| 5471 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 5472 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 5473 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| Frank Barchard | 960ae34 | 2021-07-01 11:31:11 -0700 | [diff] [blame] | 5474 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5475 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5476 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S", |
| 5477 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S", |
| 5478 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 5479 | "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 5480 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| 5481 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| 5482 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 5483 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 5484 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 5485 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | 960ae34 | 2021-07-01 11:31:11 -0700 | [diff] [blame] | 5486 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5487 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5488 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S", |
| 5489 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S", |
| 5490 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5491 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5492 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S", |
| 5493 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 5494 | "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 5495 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| 5496 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| 5497 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 5498 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 5499 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | 960ae34 | 2021-07-01 11:31:11 -0700 | [diff] [blame] | 5500 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5501 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5502 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S", |
| 5503 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 5504 | "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5505 | "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5506 | "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S", |
| 5507 | "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5508 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5509 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5510 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S", |
| 5511 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 1a0b276 | 2021-06-29 18:37:59 -0700 | [diff] [blame] | 5512 | "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 5513 | "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5514 | "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S", |
| 5515 | "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5516 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S", |
| 5517 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| Frank Barchard | 960ae34 | 2021-07-01 11:31:11 -0700 | [diff] [blame] | 5518 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5519 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5520 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S", |
| 5521 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S", |
| 5522 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 5523 | "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5524 | "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5525 | "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S", |
| 5526 | "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5527 | "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5528 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5529 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5530 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S", |
| 5531 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S", |
| 5532 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull-padal.S", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 5533 | "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5534 | "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5535 | "src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 98af05c | 2021-06-30 12:15:04 -0700 | [diff] [blame] | 5536 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| 5537 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 5538 | "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S", |
| 5539 | "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5540 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| 5541 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 1a0b276 | 2021-06-29 18:37:59 -0700 | [diff] [blame] | 5542 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 5543 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 5544 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 5545 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5546 | "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S", |
| 5547 | "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S", |
| 5548 | "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S", |
| Frank Barchard | 0ae35f2 | 2021-06-15 17:34:24 -0700 | [diff] [blame] | 5549 | "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5550 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 5551 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S", |
| 5552 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| Frank Barchard | 60729d0 | 2021-07-20 12:25:09 -0700 | [diff] [blame] | 5553 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | 960ae34 | 2021-07-01 11:31:11 -0700 | [diff] [blame] | 5554 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5555 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5556 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S", |
| 5557 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 5558 | "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5559 | "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5560 | "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S", |
| 5561 | "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5562 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5563 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5564 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S", |
| 5565 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 960ae34 | 2021-07-01 11:31:11 -0700 | [diff] [blame] | 5566 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5567 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5568 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S", |
| 5569 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S", |
| Marat Dukhan | d65d20e | 2021-05-24 16:59:51 -0700 | [diff] [blame] | 5570 | "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5571 | "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5572 | "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S", |
| 5573 | "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5574 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S", |
| 5575 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S", |
| 5576 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S", |
| 5577 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 1663c0c | 2021-07-01 11:20:06 -0700 | [diff] [blame] | 5578 | "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5579 | "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5580 | "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S", |
| Frank Barchard | 98af05c | 2021-06-30 12:15:04 -0700 | [diff] [blame] | 5581 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| 5582 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 5583 | "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S", |
| 5584 | "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5585 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| 5586 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 1a0b276 | 2021-06-29 18:37:59 -0700 | [diff] [blame] | 5587 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 5588 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 5589 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | d208bec | 2021-05-28 11:36:39 -0700 | [diff] [blame] | 5590 | "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S", |
| 5591 | "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S", |
| Frank Barchard | 0ae35f2 | 2021-06-15 17:34:24 -0700 | [diff] [blame] | 5592 | "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 5593 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 5594 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| Frank Barchard | 60729d0 | 2021-07-20 12:25:09 -0700 | [diff] [blame] | 5595 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5596 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 5597 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5598 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 5599 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5600 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 5601 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5602 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 5603 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5604 | ] |
| 5605 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 5606 | INTERNAL_MICROKERNEL_HDRS = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5607 | "src/xnnpack/argmaxpool.h", |
| 5608 | "src/xnnpack/avgpool.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5609 | "src/xnnpack/common.h", |
| 5610 | "src/xnnpack/conv.h", |
| Yury Kartynnik | e784186 | 2020-11-04 18:22:18 -0800 | [diff] [blame] | 5611 | "src/xnnpack/depthtospace.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5612 | "src/xnnpack/dwconv.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5613 | "src/xnnpack/fill.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5614 | "src/xnnpack/gavgpool.h", |
| 5615 | "src/xnnpack/gemm.h", |
| Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 5616 | "src/xnnpack/ibilinear.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5617 | "src/xnnpack/igemm.h", |
| Marat Dukhan | cfb3134 | 2019-12-05 10:42:57 -0800 | [diff] [blame] | 5618 | "src/xnnpack/intrinsics-polyfill.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5619 | "src/xnnpack/lut.h", |
| 5620 | "src/xnnpack/math.h", |
| 5621 | "src/xnnpack/maxpool.h", |
| 5622 | "src/xnnpack/packx.h", |
| 5623 | "src/xnnpack/pad.h", |
| 5624 | "src/xnnpack/params.h", |
| 5625 | "src/xnnpack/pavgpool.h", |
| 5626 | "src/xnnpack/ppmm.h", |
| 5627 | "src/xnnpack/prelu.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 5628 | "src/xnnpack/raddexpminusmax.h", |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 5629 | "src/xnnpack/raddextexp.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 5630 | "src/xnnpack/raddstoreexpminusmax.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5631 | "src/xnnpack/rmax.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5632 | "src/xnnpack/spmm.h", |
| 5633 | "src/xnnpack/unpool.h", |
| 5634 | "src/xnnpack/vadd.h", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 5635 | "src/xnnpack/vbinary.h", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5636 | "src/xnnpack/vmul.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5637 | "src/xnnpack/vmulcaddc.h", |
| Marat Dukhan | 05ac8e3 | 2019-10-21 15:39:33 -0700 | [diff] [blame] | 5638 | "src/xnnpack/vscale.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 5639 | "src/xnnpack/vscaleexpminusmax.h", |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 5640 | "src/xnnpack/vscaleextexp.h", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 5641 | "src/xnnpack/vunary.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5642 | "src/xnnpack/zip.h", |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 5643 | ] |
| 5644 | |
| 5645 | INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5646 | "include/xnnpack.h", |
| 5647 | "src/xnnpack/allocator.h", |
| 5648 | "src/xnnpack/compute.h", |
| 5649 | "src/xnnpack/im2col.h", |
| 5650 | "src/xnnpack/indirection.h", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 5651 | "src/xnnpack/math-stubs.h", |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 5652 | "src/xnnpack/memory-planner.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5653 | "src/xnnpack/operator.h", |
| 5654 | "src/xnnpack/pack.h", |
| Marat Dukhan | eeaa7bd | 2019-10-25 17:31:25 -0700 | [diff] [blame] | 5655 | "src/xnnpack/params-init.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5656 | "src/xnnpack/requantization-stubs.h", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 5657 | "src/xnnpack/requantization.h", |
| Marat Dukhan | 1d75a54 | 2020-02-03 12:23:01 -0800 | [diff] [blame] | 5658 | "src/xnnpack/subgraph.h", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 5659 | ] |
| 5660 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 5661 | ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 5662 | "src/xnnpack/math-stubs.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5663 | ] |
| 5664 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 5665 | MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5666 | "include/xnnpack.h", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 5667 | "src/xnnpack/params-init.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5668 | ] |
| 5669 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 5670 | MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 5671 | "include/xnnpack.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5672 | "src/xnnpack/isa-checks.h", |
| Marat Dukhan | eeaa7bd | 2019-10-25 17:31:25 -0700 | [diff] [blame] | 5673 | "src/xnnpack/params-init.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5674 | "src/xnnpack/requantization.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5675 | ] |
| 5676 | |
| 5677 | OPERATOR_TEST_PARAMS_HDRS = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5678 | "src/xnnpack/common.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5679 | "src/xnnpack/params.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5680 | ] |
| 5681 | |
| 5682 | WEIGHTS_PACK_HDRS = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5683 | "src/xnnpack/compute.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5684 | "src/xnnpack/operator.h", |
| 5685 | "src/xnnpack/pack.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5686 | ] |
| 5687 | |
| Marat Dukhan | c8e00eb | 2019-10-04 14:55:26 -0700 | [diff] [blame] | 5688 | LOGGING_COPTS = select({ |
| 5689 | # No logging in optimized mode |
| 5690 | ":optimized_build": ["-DXNN_LOG_LEVEL=0"], |
| 5691 | # Full logging in debug mode |
| 5692 | ":debug_build": ["-DXNN_LOG_LEVEL=5"], |
| 5693 | # Error-only logging in default (fastbuild) mode |
| 5694 | "//conditions:default": ["-DXNN_LOG_LEVEL=2"], |
| 5695 | }) |
| 5696 | |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 5697 | LOGGING_SRCS = select({ |
| 5698 | # No logging in optimized mode |
| 5699 | ":optimized_build": [], |
| 5700 | "//conditions:default": [ |
| Marat Dukhan | ccd3a1d | 2021-03-29 16:03:12 -0700 | [diff] [blame] | 5701 | "src/datatype-strings.c", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 5702 | "src/operator-strings.c", |
| 5703 | "src/subgraph-strings.c", |
| 5704 | ], |
| 5705 | }) |
| 5706 | |
| Marat Dukhan | c8e00eb | 2019-10-04 14:55:26 -0700 | [diff] [blame] | 5707 | LOGGING_HDRS = [ |
| 5708 | "src/xnnpack/log.h", |
| 5709 | ] |
| 5710 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5711 | xnnpack_cc_library( |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 5712 | name = "tables", |
| 5713 | srcs = TABLE_SRCS, |
| 5714 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 5715 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5716 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 5717 | ) |
| 5718 | |
| 5719 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5720 | name = "scalar_bench_microkernels", |
| 5721 | srcs = ALL_SCALAR_MICROKERNEL_SRCS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5722 | hdrs = INTERNAL_HDRS, |
| 5723 | aarch32_copts = ["-marm"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 5724 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5725 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5726 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 5727 | ":tables", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5728 | "@FP16", |
| 5729 | "@FXdiv", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 5730 | "@pthreadpool", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5731 | ], |
| 5732 | ) |
| 5733 | |
| 5734 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5735 | name = "scalar_prod_microkernels", |
| 5736 | srcs = PROD_SCALAR_MICROKERNEL_SRCS, |
| 5737 | hdrs = INTERNAL_HDRS, |
| 5738 | aarch32_copts = ["-marm"], |
| 5739 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5740 | msvc_copts = xnnpack_msvc_std_copts(), |
| 5741 | deps = [ |
| 5742 | ":tables", |
| 5743 | "@FP16", |
| 5744 | "@FXdiv", |
| 5745 | "@pthreadpool", |
| 5746 | ], |
| 5747 | ) |
| 5748 | |
| 5749 | xnnpack_cc_library( |
| 5750 | name = "scalar_test_microkernels", |
| 5751 | srcs = ALL_SCALAR_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 5752 | hdrs = INTERNAL_HDRS, |
| 5753 | aarch32_copts = ["-marm"], |
| 5754 | copts = [ |
| 5755 | "-UNDEBUG", |
| 5756 | "-DXNN_TEST_MODE=1", |
| 5757 | ], |
| 5758 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5759 | msvc_copts = xnnpack_msvc_std_copts(), |
| 5760 | deps = [ |
| 5761 | ":tables", |
| 5762 | "@FP16", |
| 5763 | "@FXdiv", |
| 5764 | "@pthreadpool", |
| 5765 | ], |
| 5766 | ) |
| 5767 | |
| 5768 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5769 | name = "wasm_bench_microkernels", |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 5770 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 5771 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5772 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5773 | wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| 5774 | wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 5775 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 5776 | ":tables", |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 5777 | "@FP16", |
| 5778 | "@FXdiv", |
| 5779 | "@pthreadpool", |
| 5780 | ], |
| 5781 | ) |
| 5782 | |
| 5783 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5784 | name = "wasm_prod_microkernels", |
| 5785 | hdrs = INTERNAL_HDRS, |
| 5786 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5787 | msvc_copts = xnnpack_msvc_std_copts(), |
| 5788 | wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| 5789 | wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| 5790 | deps = [ |
| 5791 | ":tables", |
| 5792 | "@FP16", |
| 5793 | "@FXdiv", |
| 5794 | "@pthreadpool", |
| 5795 | ], |
| 5796 | ) |
| 5797 | |
| 5798 | xnnpack_cc_library( |
| 5799 | name = "wasm_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 5800 | hdrs = INTERNAL_HDRS, |
| 5801 | copts = [ |
| 5802 | "-UNDEBUG", |
| 5803 | "-DXNN_TEST_MODE=1", |
| 5804 | ], |
| 5805 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5806 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5807 | wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| 5808 | wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 5809 | deps = [ |
| 5810 | ":tables", |
| 5811 | "@FP16", |
| 5812 | "@FXdiv", |
| 5813 | "@pthreadpool", |
| 5814 | ], |
| 5815 | ) |
| 5816 | |
| 5817 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5818 | name = "neon_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5819 | hdrs = INTERNAL_HDRS, |
| 5820 | aarch32_copts = [ |
| 5821 | "-marm", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 5822 | "-march=armv7-a", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5823 | "-mfpu=neon", |
| 5824 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5825 | aarch32_srcs = ALL_NEON_MICROKERNEL_SRCS, |
| 5826 | aarch64_srcs = ALL_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 5827 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5828 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 5829 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 5830 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 5831 | "@FP16", |
| 5832 | "@pthreadpool", |
| 5833 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5834 | ) |
| 5835 | |
| 5836 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5837 | name = "neon_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 5838 | hdrs = INTERNAL_HDRS, |
| 5839 | aarch32_copts = [ |
| 5840 | "-marm", |
| 5841 | "-march=armv7-a", |
| 5842 | "-mfpu=neon", |
| 5843 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5844 | aarch32_srcs = PROD_NEON_MICROKERNEL_SRCS, |
| 5845 | aarch64_srcs = PROD_NEON_MICROKERNEL_SRCS, |
| 5846 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5847 | msvc_copts = xnnpack_msvc_std_copts(), |
| 5848 | deps = [ |
| 5849 | ":tables", |
| 5850 | "@FP16", |
| 5851 | "@pthreadpool", |
| 5852 | ], |
| 5853 | ) |
| 5854 | |
| 5855 | xnnpack_cc_library( |
| 5856 | name = "neon_test_microkernels", |
| 5857 | hdrs = INTERNAL_HDRS, |
| 5858 | aarch32_copts = [ |
| 5859 | "-marm", |
| 5860 | "-march=armv7-a", |
| 5861 | "-mfpu=neon", |
| 5862 | ], |
| 5863 | aarch32_srcs = ALL_NEON_MICROKERNEL_SRCS, |
| 5864 | aarch64_srcs = ALL_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 5865 | copts = [ |
| 5866 | "-UNDEBUG", |
| 5867 | "-DXNN_TEST_MODE=1", |
| 5868 | ], |
| 5869 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5870 | msvc_copts = xnnpack_msvc_std_copts(), |
| 5871 | deps = [ |
| 5872 | ":tables", |
| 5873 | "@FP16", |
| 5874 | "@pthreadpool", |
| 5875 | ], |
| 5876 | ) |
| 5877 | |
| 5878 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5879 | name = "neonfma_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5880 | hdrs = INTERNAL_HDRS, |
| 5881 | aarch32_copts = [ |
| 5882 | "-marm", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 5883 | "-march=armv7-a", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5884 | "-mfpu=neon-vfpv4", |
| 5885 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5886 | aarch32_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| 5887 | aarch64_srcs = ALL_NEONFMA_MICROKERNEL_SRCS + ALL_AARCH64_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 5888 | apple_aarch32_copts = [ |
| 5889 | "-mcpu=swift", |
| 5890 | "-mtune=generic", |
| 5891 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 5892 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5893 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 5894 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 5895 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 5896 | "@FP16", |
| 5897 | "@pthreadpool", |
| 5898 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5899 | ) |
| 5900 | |
| 5901 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5902 | name = "neonfma_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 5903 | hdrs = INTERNAL_HDRS, |
| 5904 | aarch32_copts = [ |
| 5905 | "-marm", |
| 5906 | "-march=armv7-a", |
| 5907 | "-mfpu=neon-vfpv4", |
| 5908 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5909 | aarch32_srcs = PROD_NEONFMA_MICROKERNEL_SRCS, |
| 5910 | aarch64_srcs = PROD_NEONFMA_MICROKERNEL_SRCS + PROD_AARCH64_NEONFMA_MICROKERNEL_SRCS, |
| 5911 | apple_aarch32_copts = [ |
| 5912 | "-mcpu=swift", |
| 5913 | "-mtune=generic", |
| 5914 | ], |
| 5915 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5916 | msvc_copts = xnnpack_msvc_std_copts(), |
| 5917 | deps = [ |
| 5918 | ":tables", |
| 5919 | "@FP16", |
| 5920 | "@pthreadpool", |
| 5921 | ], |
| 5922 | ) |
| 5923 | |
| 5924 | xnnpack_cc_library( |
| 5925 | name = "neonfma_test_microkernels", |
| 5926 | hdrs = INTERNAL_HDRS, |
| 5927 | aarch32_copts = [ |
| 5928 | "-marm", |
| 5929 | "-march=armv7-a", |
| 5930 | "-mfpu=neon-vfpv4", |
| 5931 | ], |
| 5932 | aarch32_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| 5933 | aarch64_srcs = ALL_NEONFMA_MICROKERNEL_SRCS + ALL_AARCH64_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 5934 | apple_aarch32_copts = [ |
| 5935 | "-mcpu=swift", |
| 5936 | "-mtune=generic", |
| 5937 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 5938 | copts = [ |
| 5939 | "-UNDEBUG", |
| 5940 | "-DXNN_TEST_MODE=1", |
| 5941 | ], |
| 5942 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5943 | msvc_copts = xnnpack_msvc_std_copts(), |
| 5944 | deps = [ |
| 5945 | ":tables", |
| 5946 | "@FP16", |
| 5947 | "@pthreadpool", |
| 5948 | ], |
| 5949 | ) |
| 5950 | |
| 5951 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5952 | name = "neonv8_bench_microkernels", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 5953 | hdrs = INTERNAL_HDRS, |
| 5954 | aarch32_copts = [ |
| 5955 | "-marm", |
| 5956 | "-march=armv8-a", |
| 5957 | "-mfpu=neon-fp-armv8", |
| 5958 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5959 | aarch32_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| 5960 | aarch64_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 5961 | apple_aarch32_copts = [ |
| 5962 | "-mcpu=cyclone", |
| 5963 | "-mtune=generic", |
| 5964 | ], |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 5965 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5966 | msvc_copts = xnnpack_msvc_std_copts(), |
| 5967 | deps = [ |
| 5968 | ":tables", |
| 5969 | "@FP16", |
| 5970 | "@pthreadpool", |
| 5971 | ], |
| 5972 | ) |
| 5973 | |
| 5974 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5975 | name = "neonv8_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 5976 | hdrs = INTERNAL_HDRS, |
| 5977 | aarch32_copts = [ |
| 5978 | "-marm", |
| 5979 | "-march=armv8-a", |
| 5980 | "-mfpu=neon-fp-armv8", |
| 5981 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5982 | aarch32_srcs = PROD_NEONV8_MICROKERNEL_SRCS, |
| 5983 | aarch64_srcs = PROD_NEONV8_MICROKERNEL_SRCS, |
| 5984 | apple_aarch32_copts = [ |
| 5985 | "-mcpu=cyclone", |
| 5986 | "-mtune=generic", |
| 5987 | ], |
| 5988 | gcc_copts = xnnpack_gcc_std_copts(), |
| 5989 | msvc_copts = xnnpack_msvc_std_copts(), |
| 5990 | deps = [ |
| 5991 | ":tables", |
| 5992 | "@FP16", |
| 5993 | "@pthreadpool", |
| 5994 | ], |
| 5995 | ) |
| 5996 | |
| 5997 | xnnpack_cc_library( |
| 5998 | name = "neonv8_test_microkernels", |
| 5999 | hdrs = INTERNAL_HDRS, |
| 6000 | aarch32_copts = [ |
| 6001 | "-marm", |
| 6002 | "-march=armv8-a", |
| 6003 | "-mfpu=neon-fp-armv8", |
| 6004 | ], |
| 6005 | aarch32_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| 6006 | aarch64_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 6007 | apple_aarch32_copts = [ |
| 6008 | "-mcpu=cyclone", |
| 6009 | "-mtune=generic", |
| 6010 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6011 | copts = [ |
| 6012 | "-UNDEBUG", |
| 6013 | "-DXNN_TEST_MODE=1", |
| 6014 | ], |
| 6015 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6016 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6017 | deps = [ |
| 6018 | ":tables", |
| 6019 | "@FP16", |
| 6020 | "@pthreadpool", |
| 6021 | ], |
| 6022 | ) |
| 6023 | |
| 6024 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6025 | name = "neonfp16arith_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6026 | hdrs = INTERNAL_HDRS, |
| 6027 | aarch64_copts = ["-march=armv8.2-a+fp16"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6028 | aarch64_srcs = ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6029 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6030 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6031 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 6032 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6033 | "@FP16", |
| 6034 | "@pthreadpool", |
| 6035 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6036 | ) |
| 6037 | |
| 6038 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6039 | name = "neonfp16arith_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6040 | hdrs = INTERNAL_HDRS, |
| 6041 | aarch64_copts = ["-march=armv8.2-a+fp16"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6042 | aarch64_srcs = PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| 6043 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6044 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6045 | deps = [ |
| 6046 | ":tables", |
| 6047 | "@FP16", |
| 6048 | "@pthreadpool", |
| 6049 | ], |
| 6050 | ) |
| 6051 | |
| 6052 | xnnpack_cc_library( |
| 6053 | name = "neonfp16arith_test_microkernels", |
| 6054 | hdrs = INTERNAL_HDRS, |
| 6055 | aarch64_copts = ["-march=armv8.2-a+fp16"], |
| 6056 | aarch64_srcs = ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6057 | copts = [ |
| 6058 | "-UNDEBUG", |
| 6059 | "-DXNN_TEST_MODE=1", |
| 6060 | ], |
| 6061 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6062 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6063 | deps = [ |
| 6064 | ":tables", |
| 6065 | "@FP16", |
| 6066 | "@pthreadpool", |
| 6067 | ], |
| 6068 | ) |
| 6069 | |
| 6070 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6071 | name = "neondot_bench_microkernels", |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 6072 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 799ac75 | 2020-08-13 16:08:03 -0700 | [diff] [blame] | 6073 | aarch32_copts = [ |
| 6074 | "-marm", |
| 6075 | "-march=armv8.2-a+dotprod", |
| 6076 | "-mfpu=neon-fp-armv8", |
| 6077 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6078 | aarch32_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 6079 | aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6080 | aarch64_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 6081 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6082 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6083 | deps = [ |
| 6084 | ":tables", |
| 6085 | "@FP16", |
| 6086 | "@pthreadpool", |
| 6087 | ], |
| 6088 | ) |
| 6089 | |
| 6090 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6091 | name = "neondot_prod_microkernels", |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 6092 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 799ac75 | 2020-08-13 16:08:03 -0700 | [diff] [blame] | 6093 | aarch32_copts = [ |
| 6094 | "-marm", |
| 6095 | "-march=armv8.2-a+dotprod", |
| 6096 | "-mfpu=neon-fp-armv8", |
| 6097 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6098 | aarch32_srcs = PROD_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 6099 | aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6100 | aarch64_srcs = PROD_NEONDOT_MICROKERNEL_SRCS, |
| 6101 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6102 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6103 | deps = [ |
| 6104 | ":tables", |
| 6105 | "@FP16", |
| 6106 | "@pthreadpool", |
| 6107 | ], |
| 6108 | ) |
| 6109 | |
| 6110 | xnnpack_cc_library( |
| 6111 | name = "neondot_test_microkernels", |
| 6112 | hdrs = INTERNAL_HDRS, |
| 6113 | aarch32_copts = [ |
| 6114 | "-marm", |
| 6115 | "-march=armv8.2-a+dotprod", |
| 6116 | "-mfpu=neon-fp-armv8", |
| 6117 | ], |
| 6118 | aarch32_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| 6119 | aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| 6120 | aarch64_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 6121 | copts = [ |
| 6122 | "-UNDEBUG", |
| 6123 | "-DXNN_TEST_MODE=1", |
| 6124 | ], |
| 6125 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6126 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6127 | deps = [ |
| 6128 | ":tables", |
| 6129 | "@FP16", |
| 6130 | "@pthreadpool", |
| 6131 | ], |
| 6132 | ) |
| 6133 | |
| 6134 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6135 | name = "sse2_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6136 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6137 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6138 | gcc_x86_copts = ["-msse2"], |
| 6139 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6140 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6141 | x86_srcs = ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6142 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 6143 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6144 | "@FP16", |
| 6145 | "@pthreadpool", |
| 6146 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6147 | ) |
| 6148 | |
| 6149 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6150 | name = "sse2_prod_microkernels", |
| 6151 | hdrs = INTERNAL_HDRS, |
| 6152 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6153 | gcc_x86_copts = ["-msse2"], |
| 6154 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6155 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 6156 | x86_srcs = PROD_SSE_MICROKERNEL_SRCS + PROD_SSE2_MICROKERNEL_SRCS, |
| 6157 | deps = [ |
| 6158 | ":tables", |
| 6159 | "@FP16", |
| 6160 | "@pthreadpool", |
| 6161 | ], |
| 6162 | ) |
| 6163 | |
| 6164 | xnnpack_cc_library( |
| 6165 | name = "sse2_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6166 | hdrs = INTERNAL_HDRS, |
| 6167 | copts = [ |
| 6168 | "-UNDEBUG", |
| 6169 | "-DXNN_TEST_MODE=1", |
| 6170 | ], |
| 6171 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6172 | gcc_x86_copts = ["-msse2"], |
| 6173 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6174 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6175 | x86_srcs = ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6176 | deps = [ |
| 6177 | ":tables", |
| 6178 | "@FP16", |
| 6179 | "@pthreadpool", |
| 6180 | ], |
| 6181 | ) |
| 6182 | |
| 6183 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6184 | name = "ssse3_bench_microkernels", |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 6185 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6186 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6187 | gcc_x86_copts = ["-mssse3"], |
| 6188 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6189 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6190 | x86_srcs = ALL_SSSE3_MICROKERNEL_SRCS, |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 6191 | deps = [ |
| 6192 | ":tables", |
| 6193 | "@FP16", |
| 6194 | "@pthreadpool", |
| 6195 | ], |
| 6196 | ) |
| 6197 | |
| 6198 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6199 | name = "ssse3_prod_microkernels", |
| 6200 | hdrs = INTERNAL_HDRS, |
| 6201 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6202 | gcc_x86_copts = ["-mssse3"], |
| 6203 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6204 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 6205 | x86_srcs = PROD_SSSE3_MICROKERNEL_SRCS, |
| 6206 | deps = [ |
| 6207 | ":tables", |
| 6208 | "@FP16", |
| 6209 | "@pthreadpool", |
| 6210 | ], |
| 6211 | ) |
| 6212 | |
| 6213 | xnnpack_cc_library( |
| 6214 | name = "ssse3_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6215 | hdrs = INTERNAL_HDRS, |
| 6216 | copts = [ |
| 6217 | "-UNDEBUG", |
| 6218 | "-DXNN_TEST_MODE=1", |
| 6219 | ], |
| 6220 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6221 | gcc_x86_copts = ["-mssse3"], |
| 6222 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6223 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6224 | x86_srcs = ALL_SSSE3_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6225 | deps = [ |
| 6226 | ":tables", |
| 6227 | "@FP16", |
| 6228 | "@pthreadpool", |
| 6229 | ], |
| 6230 | ) |
| 6231 | |
| 6232 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6233 | name = "sse41_bench_microkernels", |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 6234 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6235 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6236 | gcc_x86_copts = ["-msse4.1"], |
| 6237 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6238 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6239 | x86_srcs = ALL_SSE41_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6240 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 6241 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6242 | "@FP16", |
| 6243 | "@pthreadpool", |
| 6244 | ], |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 6245 | ) |
| 6246 | |
| 6247 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6248 | name = "sse41_prod_microkernels", |
| 6249 | hdrs = INTERNAL_HDRS, |
| 6250 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6251 | gcc_x86_copts = ["-msse4.1"], |
| 6252 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6253 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 6254 | x86_srcs = PROD_SSE41_MICROKERNEL_SRCS, |
| 6255 | deps = [ |
| 6256 | ":tables", |
| 6257 | "@FP16", |
| 6258 | "@pthreadpool", |
| 6259 | ], |
| 6260 | ) |
| 6261 | |
| 6262 | xnnpack_cc_library( |
| 6263 | name = "sse41_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6264 | hdrs = INTERNAL_HDRS, |
| 6265 | copts = [ |
| 6266 | "-UNDEBUG", |
| 6267 | "-DXNN_TEST_MODE=1", |
| 6268 | ], |
| 6269 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6270 | gcc_x86_copts = ["-msse4.1"], |
| 6271 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6272 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6273 | x86_srcs = ALL_SSE41_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6274 | deps = [ |
| 6275 | ":tables", |
| 6276 | "@FP16", |
| 6277 | "@pthreadpool", |
| 6278 | ], |
| 6279 | ) |
| 6280 | |
| 6281 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6282 | name = "avx_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6283 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6284 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6285 | gcc_x86_copts = ["-mavx"], |
| 6286 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6287 | msvc_x86_32_copts = ["/arch:AVX"], |
| 6288 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6289 | x86_srcs = ALL_AVX_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6290 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 6291 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6292 | "@FP16", |
| 6293 | "@pthreadpool", |
| 6294 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6295 | ) |
| 6296 | |
| 6297 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6298 | name = "avx_prod_microkernels", |
| 6299 | hdrs = INTERNAL_HDRS, |
| 6300 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6301 | gcc_x86_copts = ["-mavx"], |
| 6302 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6303 | msvc_x86_32_copts = ["/arch:AVX"], |
| 6304 | msvc_x86_64_copts = ["/arch:AVX"], |
| 6305 | x86_srcs = PROD_AVX_MICROKERNEL_SRCS, |
| 6306 | deps = [ |
| 6307 | ":tables", |
| 6308 | "@FP16", |
| 6309 | "@pthreadpool", |
| 6310 | ], |
| 6311 | ) |
| 6312 | |
| 6313 | xnnpack_cc_library( |
| 6314 | name = "avx_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6315 | hdrs = INTERNAL_HDRS, |
| 6316 | copts = [ |
| 6317 | "-UNDEBUG", |
| 6318 | "-DXNN_TEST_MODE=1", |
| 6319 | ], |
| 6320 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6321 | gcc_x86_copts = ["-mavx"], |
| 6322 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6323 | msvc_x86_32_copts = ["/arch:AVX"], |
| 6324 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6325 | x86_srcs = ALL_AVX_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6326 | deps = [ |
| 6327 | ":tables", |
| 6328 | "@FP16", |
| 6329 | "@pthreadpool", |
| 6330 | ], |
| 6331 | ) |
| 6332 | |
| 6333 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6334 | name = "xop_bench_microkernels", |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 6335 | hdrs = INTERNAL_HDRS, |
| 6336 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6337 | gcc_x86_copts = ["-mxop"], |
| 6338 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6339 | msvc_x86_32_copts = ["/arch:AVX"], |
| 6340 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6341 | x86_srcs = ALL_XOP_MICROKERNEL_SRCS, |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 6342 | deps = [ |
| 6343 | ":tables", |
| 6344 | "@FP16", |
| 6345 | "@pthreadpool", |
| 6346 | ], |
| 6347 | ) |
| 6348 | |
| 6349 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6350 | name = "xop_prod_microkernels", |
| 6351 | hdrs = INTERNAL_HDRS, |
| 6352 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6353 | gcc_x86_copts = ["-mxop"], |
| 6354 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6355 | msvc_x86_32_copts = ["/arch:AVX"], |
| 6356 | msvc_x86_64_copts = ["/arch:AVX"], |
| 6357 | x86_srcs = PROD_XOP_MICROKERNEL_SRCS, |
| 6358 | deps = [ |
| 6359 | ":tables", |
| 6360 | "@FP16", |
| 6361 | "@pthreadpool", |
| 6362 | ], |
| 6363 | ) |
| 6364 | |
| 6365 | xnnpack_cc_library( |
| 6366 | name = "xop_test_microkernels", |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 6367 | hdrs = INTERNAL_HDRS, |
| 6368 | copts = [ |
| 6369 | "-UNDEBUG", |
| 6370 | "-DXNN_TEST_MODE=1", |
| 6371 | ], |
| 6372 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6373 | gcc_x86_copts = ["-mxop"], |
| 6374 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6375 | msvc_x86_32_copts = ["/arch:AVX"], |
| 6376 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6377 | x86_srcs = ALL_XOP_MICROKERNEL_SRCS, |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 6378 | deps = [ |
| 6379 | ":tables", |
| 6380 | "@FP16", |
| 6381 | "@pthreadpool", |
| 6382 | ], |
| 6383 | ) |
| 6384 | |
| 6385 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6386 | name = "fma3_bench_microkernels", |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 6387 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6388 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6389 | gcc_x86_copts = ["-mfma"], |
| 6390 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6391 | msvc_x86_32_copts = ["/arch:AVX"], |
| 6392 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6393 | x86_srcs = ALL_FMA3_MICROKERNEL_SRCS, |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 6394 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 6395 | ":tables", |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 6396 | "@FP16", |
| 6397 | "@pthreadpool", |
| 6398 | ], |
| 6399 | ) |
| 6400 | |
| 6401 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6402 | name = "fma3_prod_microkernels", |
| 6403 | hdrs = INTERNAL_HDRS, |
| 6404 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6405 | gcc_x86_copts = ["-mfma"], |
| 6406 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6407 | msvc_x86_32_copts = ["/arch:AVX"], |
| 6408 | msvc_x86_64_copts = ["/arch:AVX"], |
| 6409 | x86_srcs = PROD_FMA3_MICROKERNEL_SRCS, |
| 6410 | deps = [ |
| 6411 | ":tables", |
| 6412 | "@FP16", |
| 6413 | "@pthreadpool", |
| 6414 | ], |
| 6415 | ) |
| 6416 | |
| 6417 | xnnpack_cc_library( |
| 6418 | name = "fma3_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6419 | hdrs = INTERNAL_HDRS, |
| 6420 | copts = [ |
| 6421 | "-UNDEBUG", |
| 6422 | "-DXNN_TEST_MODE=1", |
| 6423 | ], |
| 6424 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6425 | gcc_x86_copts = ["-mfma"], |
| 6426 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6427 | msvc_x86_32_copts = ["/arch:AVX"], |
| 6428 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6429 | x86_srcs = ALL_FMA3_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6430 | deps = [ |
| 6431 | ":tables", |
| 6432 | "@FP16", |
| 6433 | "@pthreadpool", |
| 6434 | ], |
| 6435 | ) |
| 6436 | |
| 6437 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6438 | name = "avx2_bench_microkernels", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 6439 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6440 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6441 | gcc_x86_copts = [ |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 6442 | "-mfma", |
| 6443 | "-mavx2", |
| 6444 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6445 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6446 | msvc_x86_32_copts = ["/arch:AVX2"], |
| 6447 | msvc_x86_64_copts = ["/arch:AVX2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6448 | x86_srcs = ALL_AVX2_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6449 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 6450 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6451 | "@FP16", |
| 6452 | "@pthreadpool", |
| 6453 | ], |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 6454 | ) |
| 6455 | |
| 6456 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6457 | name = "avx2_prod_microkernels", |
| 6458 | hdrs = INTERNAL_HDRS, |
| 6459 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6460 | gcc_x86_copts = [ |
| 6461 | "-mfma", |
| 6462 | "-mavx2", |
| 6463 | ], |
| 6464 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6465 | msvc_x86_32_copts = ["/arch:AVX2"], |
| 6466 | msvc_x86_64_copts = ["/arch:AVX2"], |
| 6467 | x86_srcs = PROD_AVX2_MICROKERNEL_SRCS, |
| 6468 | deps = [ |
| 6469 | ":tables", |
| 6470 | "@FP16", |
| 6471 | "@pthreadpool", |
| 6472 | ], |
| 6473 | ) |
| 6474 | |
| 6475 | xnnpack_cc_library( |
| 6476 | name = "avx2_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6477 | hdrs = INTERNAL_HDRS, |
| 6478 | copts = [ |
| 6479 | "-UNDEBUG", |
| 6480 | "-DXNN_TEST_MODE=1", |
| 6481 | ], |
| 6482 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6483 | gcc_x86_copts = [ |
| 6484 | "-mfma", |
| 6485 | "-mavx2", |
| 6486 | ], |
| 6487 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6488 | msvc_x86_32_copts = ["/arch:AVX2"], |
| 6489 | msvc_x86_64_copts = ["/arch:AVX2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6490 | x86_srcs = ALL_AVX2_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6491 | deps = [ |
| 6492 | ":tables", |
| 6493 | "@FP16", |
| 6494 | "@pthreadpool", |
| 6495 | ], |
| 6496 | ) |
| 6497 | |
| 6498 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6499 | name = "avx512f_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6500 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6501 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6502 | gcc_x86_copts = ["-mavx512f"], |
| 6503 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 6504 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6505 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 6506 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 6507 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6508 | x86_srcs = ALL_AVX512F_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6509 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 6510 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 6511 | "@FP16", |
| 6512 | "@pthreadpool", |
| 6513 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6514 | ) |
| 6515 | |
| 6516 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6517 | name = "avx512f_prod_microkernels", |
| 6518 | hdrs = INTERNAL_HDRS, |
| 6519 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6520 | gcc_x86_copts = ["-mavx512f"], |
| 6521 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 6522 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6523 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 6524 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 6525 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| 6526 | x86_srcs = PROD_AVX512F_MICROKERNEL_SRCS, |
| 6527 | deps = [ |
| 6528 | ":tables", |
| 6529 | "@FP16", |
| 6530 | "@pthreadpool", |
| 6531 | ], |
| 6532 | ) |
| 6533 | |
| 6534 | xnnpack_cc_library( |
| 6535 | name = "avx512f_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6536 | hdrs = INTERNAL_HDRS, |
| 6537 | copts = [ |
| 6538 | "-UNDEBUG", |
| 6539 | "-DXNN_TEST_MODE=1", |
| 6540 | ], |
| 6541 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6542 | gcc_x86_copts = ["-mavx512f"], |
| 6543 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 6544 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6545 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 6546 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 6547 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6548 | x86_srcs = ALL_AVX512F_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6549 | deps = [ |
| 6550 | ":tables", |
| 6551 | "@FP16", |
| 6552 | "@pthreadpool", |
| 6553 | ], |
| 6554 | ) |
| 6555 | |
| 6556 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6557 | name = "avx512skx_bench_microkernels", |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 6558 | hdrs = INTERNAL_HDRS, |
| 6559 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6560 | gcc_x86_copts = [ |
| 6561 | "-mavx512f", |
| 6562 | "-mavx512cd", |
| 6563 | "-mavx512bw", |
| 6564 | "-mavx512dq", |
| 6565 | "-mavx512vl", |
| 6566 | ], |
| 6567 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 6568 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6569 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 6570 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 6571 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6572 | x86_srcs = ALL_AVX512SKX_MICROKERNEL_SRCS, |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 6573 | deps = [ |
| 6574 | ":tables", |
| 6575 | "@FP16", |
| 6576 | "@pthreadpool", |
| 6577 | ], |
| 6578 | ) |
| 6579 | |
| 6580 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6581 | name = "avx512skx_prod_microkernels", |
| 6582 | hdrs = INTERNAL_HDRS, |
| 6583 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6584 | gcc_x86_copts = [ |
| 6585 | "-mavx512f", |
| 6586 | "-mavx512cd", |
| 6587 | "-mavx512bw", |
| 6588 | "-mavx512dq", |
| 6589 | "-mavx512vl", |
| 6590 | ], |
| 6591 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 6592 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6593 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 6594 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 6595 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| 6596 | x86_srcs = PROD_AVX512SKX_MICROKERNEL_SRCS, |
| 6597 | deps = [ |
| 6598 | ":tables", |
| 6599 | "@FP16", |
| 6600 | "@pthreadpool", |
| 6601 | ], |
| 6602 | ) |
| 6603 | |
| 6604 | xnnpack_cc_library( |
| 6605 | name = "avx512skx_test_microkernels", |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 6606 | hdrs = INTERNAL_HDRS, |
| 6607 | copts = [ |
| 6608 | "-UNDEBUG", |
| 6609 | "-DXNN_TEST_MODE=1", |
| 6610 | ], |
| 6611 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6612 | gcc_x86_copts = [ |
| 6613 | "-mavx512f", |
| 6614 | "-mavx512cd", |
| 6615 | "-mavx512bw", |
| 6616 | "-mavx512dq", |
| 6617 | "-mavx512vl", |
| 6618 | ], |
| 6619 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 6620 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6621 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 6622 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 6623 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6624 | x86_srcs = ALL_AVX512SKX_MICROKERNEL_SRCS, |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 6625 | deps = [ |
| 6626 | ":tables", |
| 6627 | "@FP16", |
| 6628 | "@pthreadpool", |
| 6629 | ], |
| 6630 | ) |
| 6631 | |
| 6632 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6633 | name = "asm_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6634 | hdrs = ["src/xnnpack/assembly.h"], |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 6635 | aarch32_srcs = AARCH32_ASM_MICROKERNEL_SRCS, |
| Frank Barchard | 31bb45b | 2020-10-06 00:26:33 -0700 | [diff] [blame] | 6636 | aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"], |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 6637 | aarch64_srcs = AARCH64_ASM_MICROKERNEL_SRCS, |
| 6638 | wasm_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| 6639 | wasmsimd_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6640 | ) |
| 6641 | |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 6642 | xnnpack_cc_library( |
| 6643 | name = "logging_utils", |
| 6644 | srcs = LOGGING_SRCS, |
| 6645 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| 6646 | copts = LOGGING_COPTS + [ |
| 6647 | "-Isrc", |
| 6648 | "-Iinclude", |
| 6649 | ] + select({ |
| 6650 | ":debug_build": [], |
| 6651 | "//conditions:default": xnnpack_min_size_copts(), |
| 6652 | }), |
| 6653 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6654 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6655 | visibility = xnnpack_visibility(), |
| 6656 | deps = [ |
| 6657 | "@FP16", |
| 6658 | "@clog", |
| 6659 | "@pthreadpool", |
| 6660 | ], |
| 6661 | ) |
| 6662 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6663 | xnnpack_aggregate_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6664 | name = "bench_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 6665 | aarch32_ios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6666 | ":neon_bench_microkernels", |
| 6667 | ":neonfma_bench_microkernels", |
| 6668 | ":neonv8_bench_microkernels", |
| 6669 | ":asm_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 6670 | ], |
| 6671 | aarch32_nonios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6672 | ":neon_bench_microkernels", |
| 6673 | ":neonfma_bench_microkernels", |
| 6674 | ":neonv8_bench_microkernels", |
| 6675 | ":neondot_bench_microkernels", |
| 6676 | ":asm_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6677 | ], |
| 6678 | aarch64_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6679 | ":neon_bench_microkernels", |
| 6680 | ":neonfma_bench_microkernels", |
| 6681 | ":neonv8_bench_microkernels", |
| 6682 | ":neonfp16arith_bench_microkernels", |
| 6683 | ":neondot_bench_microkernels", |
| 6684 | ":asm_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6685 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6686 | generic_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6687 | ":scalar_bench_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6688 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6689 | wasm_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6690 | ":wasm_bench_microkernels", |
| 6691 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6692 | ], |
| 6693 | wasmsimd_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6694 | ":wasm_bench_microkernels", |
| 6695 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6696 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6697 | x86_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6698 | ":sse2_bench_microkernels", |
| 6699 | ":ssse3_bench_microkernels", |
| 6700 | ":sse41_bench_microkernels", |
| 6701 | ":avx_bench_microkernels", |
| 6702 | ":xop_bench_microkernels", |
| 6703 | ":fma3_bench_microkernels", |
| 6704 | ":avx2_bench_microkernels", |
| 6705 | ":avx512f_bench_microkernels", |
| 6706 | ":avx512skx_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6707 | ], |
| 6708 | ) |
| 6709 | |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6710 | xnnpack_aggregate_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6711 | name = "prod_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 6712 | aarch32_ios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6713 | ":neon_prod_microkernels", |
| 6714 | ":neonfma_prod_microkernels", |
| 6715 | ":neonv8_prod_microkernels", |
| 6716 | ":asm_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 6717 | ], |
| 6718 | aarch32_nonios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6719 | ":neon_prod_microkernels", |
| 6720 | ":neonfma_prod_microkernels", |
| 6721 | ":neonv8_prod_microkernels", |
| 6722 | ":neondot_prod_microkernels", |
| 6723 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6724 | ], |
| 6725 | aarch64_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6726 | ":neon_prod_microkernels", |
| 6727 | ":neonfma_prod_microkernels", |
| 6728 | ":neonv8_prod_microkernels", |
| 6729 | ":neonfp16arith_prod_microkernels", |
| 6730 | ":neondot_prod_microkernels", |
| 6731 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6732 | ], |
| 6733 | generic_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6734 | ":scalar_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6735 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6736 | wasm_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6737 | ":wasm_prod_microkernels", |
| 6738 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6739 | ], |
| 6740 | wasmsimd_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6741 | ":wasm_prod_microkernels", |
| 6742 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6743 | ], |
| 6744 | x86_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6745 | ":sse2_prod_microkernels", |
| 6746 | ":ssse3_prod_microkernels", |
| 6747 | ":sse41_prod_microkernels", |
| 6748 | ":avx_prod_microkernels", |
| 6749 | ":xop_prod_microkernels", |
| 6750 | ":fma3_prod_microkernels", |
| 6751 | ":avx2_prod_microkernels", |
| 6752 | ":avx512f_prod_microkernels", |
| 6753 | ":avx512skx_prod_microkernels", |
| 6754 | ], |
| 6755 | ) |
| 6756 | |
| 6757 | xnnpack_aggregate_library( |
| 6758 | name = "test_microkernels", |
| 6759 | aarch32_ios_deps = [ |
| 6760 | ":neon_test_microkernels", |
| 6761 | ":neonfma_test_microkernels", |
| 6762 | ":neonv8_test_microkernels", |
| 6763 | ":asm_microkernels", |
| 6764 | ], |
| 6765 | aarch32_nonios_deps = [ |
| 6766 | ":neon_test_microkernels", |
| 6767 | ":neonfma_test_microkernels", |
| 6768 | ":neonv8_test_microkernels", |
| 6769 | ":neondot_test_microkernels", |
| 6770 | ":asm_microkernels", |
| 6771 | ], |
| 6772 | aarch64_deps = [ |
| 6773 | ":neon_test_microkernels", |
| 6774 | ":neonfma_test_microkernels", |
| 6775 | ":neonv8_test_microkernels", |
| 6776 | ":neonfp16arith_test_microkernels", |
| 6777 | ":neondot_test_microkernels", |
| 6778 | ":asm_microkernels", |
| 6779 | ], |
| 6780 | generic_deps = [ |
| 6781 | ":scalar_test_microkernels", |
| 6782 | ], |
| 6783 | wasm_deps = [ |
| 6784 | ":wasm_test_microkernels", |
| 6785 | ":asm_microkernels", |
| 6786 | ], |
| 6787 | wasmsimd_deps = [ |
| 6788 | ":wasm_test_microkernels", |
| 6789 | ":asm_microkernels", |
| 6790 | ], |
| 6791 | x86_deps = [ |
| 6792 | ":sse2_test_microkernels", |
| 6793 | ":ssse3_test_microkernels", |
| 6794 | ":sse41_test_microkernels", |
| 6795 | ":avx_test_microkernels", |
| 6796 | ":xop_test_microkernels", |
| 6797 | ":fma3_test_microkernels", |
| 6798 | ":avx2_test_microkernels", |
| 6799 | ":avx512f_test_microkernels", |
| 6800 | ":avx512skx_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6801 | ], |
| 6802 | ) |
| 6803 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6804 | xnnpack_cc_library( |
| 6805 | name = "im2col", |
| 6806 | srcs = ["src/im2col.c"], |
| 6807 | hdrs = [ |
| 6808 | "src/xnnpack/common.h", |
| 6809 | "src/xnnpack/im2col.h", |
| 6810 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6811 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6812 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6813 | ) |
| 6814 | |
| 6815 | xnnpack_cc_library( |
| 6816 | name = "indirection", |
| 6817 | srcs = ["src/indirection.c"], |
| 6818 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6819 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6820 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6821 | deps = [ |
| 6822 | "@FP16", |
| 6823 | "@FXdiv", |
| 6824 | "@pthreadpool", |
| 6825 | ], |
| 6826 | ) |
| 6827 | |
| 6828 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6829 | name = "indirection_test_mode", |
| 6830 | srcs = ["src/indirection.c"], |
| 6831 | hdrs = INTERNAL_HDRS, |
| 6832 | copts = [ |
| 6833 | "-UNDEBUG", |
| 6834 | "-DXNN_TEST_MODE=1", |
| 6835 | ], |
| 6836 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6837 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6838 | deps = [ |
| 6839 | "@FP16", |
| 6840 | "@FXdiv", |
| 6841 | "@pthreadpool", |
| 6842 | ], |
| 6843 | ) |
| 6844 | |
| 6845 | xnnpack_cc_library( |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 6846 | name = "packing", |
| 6847 | srcs = ["src/packing.c"], |
| 6848 | hdrs = INTERNAL_HDRS, |
| 6849 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6850 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6851 | deps = [ |
| 6852 | "@FP16", |
| 6853 | "@FXdiv", |
| 6854 | "@pthreadpool", |
| 6855 | ], |
| 6856 | ) |
| 6857 | |
| 6858 | xnnpack_cc_library( |
| 6859 | name = "packing_test_mode", |
| 6860 | srcs = ["src/packing.c"], |
| 6861 | hdrs = INTERNAL_HDRS, |
| 6862 | copts = [ |
| 6863 | "-UNDEBUG", |
| 6864 | "-DXNN_TEST_MODE=1", |
| 6865 | ], |
| 6866 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6867 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6868 | deps = [ |
| 6869 | "@FP16", |
| 6870 | "@FXdiv", |
| 6871 | "@pthreadpool", |
| 6872 | ], |
| 6873 | ) |
| 6874 | |
| 6875 | xnnpack_cc_library( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6876 | name = "operator_run", |
| 6877 | srcs = ["src/operator-run.c"], |
| Marat Dukhan | c8e00eb | 2019-10-04 14:55:26 -0700 | [diff] [blame] | 6878 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6879 | copts = LOGGING_COPTS + select({ |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 6880 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 6881 | "//conditions:default": [], |
| 6882 | }), |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6883 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6884 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6885 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 6886 | ":logging_utils", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6887 | "@FP16", |
| 6888 | "@FXdiv", |
| 6889 | "@clog", |
| 6890 | "@pthreadpool", |
| 6891 | ], |
| 6892 | ) |
| 6893 | |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 6894 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6895 | name = "operator_run_test_mode", |
| 6896 | srcs = ["src/operator-run.c"], |
| 6897 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| 6898 | copts = LOGGING_COPTS + [ |
| 6899 | "-UNDEBUG", |
| 6900 | "-DXNN_TEST_MODE=1", |
| 6901 | ] + select({ |
| 6902 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 6903 | "//conditions:default": [], |
| 6904 | }), |
| 6905 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6906 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6907 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 6908 | ":logging_utils", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6909 | "@FP16", |
| 6910 | "@FXdiv", |
| 6911 | "@clog", |
| 6912 | "@pthreadpool", |
| 6913 | ], |
| 6914 | ) |
| 6915 | |
| 6916 | xnnpack_cc_library( |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 6917 | name = "memory_planner", |
| 6918 | srcs = ["src/memory-planner.c"], |
| 6919 | hdrs = INTERNAL_HDRS, |
| 6920 | defines = select({ |
| 6921 | ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"], |
| 6922 | ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"], |
| 6923 | "//conditions:default": ["XNN_ENABLE_MEMOPT=1"], |
| 6924 | }), |
| 6925 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6926 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6927 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 6928 | ":logging_utils", |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 6929 | "@pthreadpool", |
| 6930 | ], |
| 6931 | ) |
| 6932 | |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6933 | xnnpack_cc_library( |
| 6934 | name = "memory_planner_test_mode", |
| 6935 | srcs = ["src/memory-planner.c"], |
| 6936 | hdrs = INTERNAL_HDRS, |
| 6937 | copts = [ |
| 6938 | "-UNDEBUG", |
| 6939 | "-DXNN_TEST_MODE=1", |
| 6940 | ], |
| 6941 | defines = select({ |
| 6942 | ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"], |
| 6943 | ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"], |
| 6944 | "//conditions:default": ["XNN_ENABLE_MEMOPT=1"], |
| 6945 | }), |
| 6946 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6947 | msvc_copts = xnnpack_msvc_std_copts(), |
| 6948 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 6949 | ":logging_utils", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 6950 | "@pthreadpool", |
| 6951 | ], |
| 6952 | ) |
| 6953 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6954 | cc_library( |
| 6955 | name = "enable_assembly", |
| 6956 | defines = select({ |
| 6957 | ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"], |
| 6958 | ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"], |
| Frank Barchard | 810171d | 2019-10-10 10:34:51 -0700 | [diff] [blame] | 6959 | "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6960 | }), |
| 6961 | ) |
| 6962 | |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 6963 | cc_library( |
| 6964 | name = "enable_sparse", |
| 6965 | defines = select({ |
| 6966 | ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"], |
| 6967 | ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"], |
| Marat Dukhan | b36582b | 2020-12-08 11:16:28 -0800 | [diff] [blame] | 6968 | "//conditions:default": ["XNN_ENABLE_SPARSE=1"], |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 6969 | }), |
| 6970 | ) |
| 6971 | |
| Marat Dukhan | cf056b2 | 2019-10-07 10:26:29 -0700 | [diff] [blame] | 6972 | xnnpack_cc_library( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6973 | name = "operators", |
| 6974 | srcs = OPERATOR_SRCS + [ |
| Marat Dukhan | 496389f | 2021-04-07 15:47:12 -0700 | [diff] [blame] | 6975 | "src/allocator.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6976 | "src/operator-delete.c", |
| Marat Dukhan | cf056b2 | 2019-10-07 10:26:29 -0700 | [diff] [blame] | 6977 | ], |
| 6978 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6979 | copts = LOGGING_COPTS + [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6980 | "-Isrc", |
| 6981 | "-Iinclude", |
| 6982 | ] + select({ |
| 6983 | ":debug_build": [], |
| 6984 | "//conditions:default": xnnpack_min_size_copts(), |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 6985 | }) + select({ |
| 6986 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 6987 | "//conditions:default": [], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6988 | }), |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 6989 | gcc_copts = xnnpack_gcc_std_copts(), |
| 6990 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6991 | deps = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6992 | ":indirection", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 6993 | ":logging_utils", |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 6994 | ":packing", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6995 | "@FP16", |
| 6996 | "@FXdiv", |
| 6997 | "@clog", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6998 | "@pthreadpool", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 6999 | ], |
| 7000 | ) |
| 7001 | |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7002 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7003 | name = "operators_test_mode", |
| 7004 | srcs = OPERATOR_SRCS + [ |
| Marat Dukhan | 496389f | 2021-04-07 15:47:12 -0700 | [diff] [blame] | 7005 | "src/allocator.c", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7006 | "src/operator-delete.c", |
| 7007 | ], |
| 7008 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| 7009 | copts = LOGGING_COPTS + [ |
| 7010 | "-Isrc", |
| 7011 | "-Iinclude", |
| 7012 | "-UNDEBUG", |
| 7013 | "-DXNN_TEST_MODE=1", |
| 7014 | ] + select({ |
| 7015 | ":debug_build": [], |
| 7016 | "//conditions:default": xnnpack_min_size_copts(), |
| 7017 | }) + select({ |
| 7018 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 7019 | "//conditions:default": [], |
| 7020 | }), |
| 7021 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7022 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7023 | deps = [ |
| 7024 | ":indirection_test_mode", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 7025 | ":logging_utils", |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7026 | ":packing_test_mode", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7027 | "@FP16", |
| 7028 | "@FXdiv", |
| 7029 | "@clog", |
| 7030 | "@pthreadpool", |
| 7031 | ], |
| 7032 | ) |
| 7033 | |
| 7034 | xnnpack_cc_library( |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7035 | name = "XNNPACK", |
| 7036 | srcs = [ |
| 7037 | "src/init.c", |
| Marat Dukhan | ccfdbd1 | 2020-02-03 14:27:45 -0800 | [diff] [blame] | 7038 | "src/runtime.c", |
| 7039 | "src/subgraph.c", |
| 7040 | "src/tensor.c", |
| Marat Dukhan | f03da0d | 2020-06-10 16:00:20 -0700 | [diff] [blame] | 7041 | ] + SUBGRAPH_SRCS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7042 | hdrs = ["include/xnnpack.h"], |
| 7043 | copts = LOGGING_COPTS + [ |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7044 | "-Isrc", |
| 7045 | "-Iinclude", |
| 7046 | ] + select({ |
| 7047 | ":debug_build": [], |
| 7048 | "//conditions:default": xnnpack_min_size_copts(), |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 7049 | }) + select({ |
| 7050 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 7051 | "//conditions:default": [], |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7052 | }), |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7053 | gcc_copts = xnnpack_gcc_std_copts(), |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7054 | includes = ["include"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7055 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7056 | visibility = xnnpack_visibility(), |
| 7057 | deps = [ |
| 7058 | ":enable_assembly", |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 7059 | ":enable_sparse", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 7060 | ":logging_utils", |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 7061 | ":memory_planner", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7062 | ":operator_run", |
| 7063 | ":operators", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7064 | ":prod_microkernels", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7065 | "@clog", |
| Marat Dukhan | ab2946c | 2020-05-21 20:04:13 -0700 | [diff] [blame] | 7066 | "@FP16", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7067 | "@pthreadpool", |
| Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 7068 | ] + select({ |
| 7069 | ":emscripten": [], |
| 7070 | "//conditions:default": ["@cpuinfo"], |
| 7071 | }), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7072 | ) |
| 7073 | |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7074 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7075 | name = "XNNPACK_test_mode", |
| 7076 | srcs = [ |
| 7077 | "src/init.c", |
| 7078 | "src/runtime.c", |
| 7079 | "src/subgraph.c", |
| 7080 | "src/tensor.c", |
| Marat Dukhan | f03da0d | 2020-06-10 16:00:20 -0700 | [diff] [blame] | 7081 | ] + SUBGRAPH_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7082 | hdrs = ["include/xnnpack.h"], |
| 7083 | copts = LOGGING_COPTS + [ |
| 7084 | "-Isrc", |
| 7085 | "-Iinclude", |
| 7086 | "-UNDEBUG", |
| 7087 | "-DXNN_TEST_MODE=1", |
| 7088 | ] + select({ |
| 7089 | ":debug_build": [], |
| 7090 | "//conditions:default": xnnpack_min_size_copts(), |
| 7091 | }) + select({ |
| 7092 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 7093 | "//conditions:default": [], |
| 7094 | }), |
| 7095 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7096 | includes = ["include"], |
| 7097 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7098 | visibility = xnnpack_visibility(), |
| 7099 | deps = [ |
| 7100 | ":enable_assembly", |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 7101 | ":enable_sparse", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 7102 | ":logging_utils", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7103 | ":memory_planner_test_mode", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7104 | ":operator_run_test_mode", |
| 7105 | ":operators_test_mode", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7106 | ":test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7107 | "@clog", |
| 7108 | "@FP16", |
| 7109 | "@pthreadpool", |
| 7110 | ] + select({ |
| 7111 | ":emscripten": [], |
| 7112 | "//conditions:default": ["@cpuinfo"], |
| 7113 | }), |
| 7114 | ) |
| 7115 | |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 7116 | # Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently |
| 7117 | # not used by the TensorFlow Lite XNNPACK delegate to minimize code size. |
| Marat Dukhan | ae046f5 | 2020-06-15 13:16:14 -0700 | [diff] [blame] | 7118 | xnnpack_cc_library( |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 7119 | name = "xnnpack_for_tflite", |
| 7120 | srcs = [ |
| 7121 | "src/init.c", |
| 7122 | "src/runtime.c", |
| 7123 | "src/subgraph.c", |
| 7124 | "src/tensor.c", |
| 7125 | ] + SUBGRAPH_SRCS, |
| 7126 | hdrs = ["include/xnnpack.h"], |
| 7127 | copts = LOGGING_COPTS + [ |
| 7128 | "-Isrc", |
| 7129 | "-Iinclude", |
| 7130 | ] + select({ |
| 7131 | ":debug_build": [], |
| 7132 | "//conditions:default": xnnpack_min_size_copts(), |
| 7133 | }) + select({ |
| 7134 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 7135 | "//conditions:default": [], |
| 7136 | }), |
| 7137 | defines = [ |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 7138 | "XNN_NO_U8_OPERATORS", |
| 7139 | "XNN_NO_X8_OPERATORS", |
| 7140 | "XNN_NO_F16_OPERATORS", |
| 7141 | "XNN_NO_X16_OPERATORS", |
| Marat Dukhan | b939cdb | 2021-03-30 18:51:51 -0700 | [diff] [blame] | 7142 | ] + select({ |
| 7143 | ":xnn_enable_qs8_explicit_true": [], |
| Marat Dukhan | 5e35386 | 2021-06-15 09:03:25 -0700 | [diff] [blame] | 7144 | ":xnn_enable_qs8_explicit_false": [ |
| 7145 | "XNN_NO_QC8_OPERATORS", |
| 7146 | "XNN_NO_QS8_OPERATORS", |
| 7147 | ], |
| 7148 | "//conditions:default": [ |
| 7149 | "XNN_NO_QC8_OPERATORS", |
| 7150 | "XNN_NO_QS8_OPERATORS", |
| 7151 | ], |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 7152 | }) + select({ |
| 7153 | ":xnn_enable_qu8_explicit_true": [], |
| 7154 | ":xnn_enable_qu8_explicit_false": [ |
| 7155 | "XNN_NO_QU8_OPERATORS", |
| 7156 | ], |
| 7157 | "//conditions:default": [ |
| 7158 | "XNN_NO_QU8_OPERATORS", |
| 7159 | ], |
| Marat Dukhan | b939cdb | 2021-03-30 18:51:51 -0700 | [diff] [blame] | 7160 | }), |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 7161 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7162 | includes = ["include"], |
| 7163 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7164 | visibility = xnnpack_visibility(), |
| 7165 | deps = [ |
| 7166 | ":enable_assembly", |
| 7167 | ":enable_sparse", |
| 7168 | ":logging_utils", |
| 7169 | ":memory_planner", |
| 7170 | ":operator_run", |
| 7171 | ":operators", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7172 | ":prod_microkernels", |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 7173 | "@clog", |
| 7174 | "@FP16", |
| 7175 | "@pthreadpool", |
| 7176 | ] + select({ |
| 7177 | ":emscripten": [], |
| 7178 | "//conditions:default": ["@cpuinfo"], |
| 7179 | }), |
| 7180 | ) |
| 7181 | |
| 7182 | # Specialized XNNPACK version for TensorFlow.js. Excludes operators currently |
| 7183 | # not used by the TensorFlow.js WebAssembly backend to minimize code size. |
| 7184 | xnnpack_cc_library( |
| 7185 | name = "xnnpack_for_tfjs", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7186 | srcs = [ |
| 7187 | "src/init.c", |
| 7188 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7189 | hdrs = ["include/xnnpack.h"], |
| 7190 | copts = LOGGING_COPTS + [ |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7191 | "-Isrc", |
| 7192 | "-Iinclude", |
| 7193 | ] + select({ |
| 7194 | ":debug_build": [], |
| 7195 | "//conditions:default": xnnpack_min_size_copts(), |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 7196 | }) + select({ |
| 7197 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 7198 | "//conditions:default": [], |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7199 | }), |
| 7200 | defines = [ |
| Marat Dukhan | 16f1e1a | 2020-08-04 16:38:22 -0700 | [diff] [blame] | 7201 | "XNN_NO_QS8_OPERATORS", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 7202 | "XNN_NO_QU8_OPERATORS", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7203 | "XNN_NO_U8_OPERATORS", |
| 7204 | "XNN_NO_X8_OPERATORS", |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 7205 | "XNN_NO_NCHW_OPERATORS", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7206 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7207 | gcc_copts = xnnpack_gcc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7208 | includes = ["include"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7209 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7210 | visibility = xnnpack_visibility(), |
| 7211 | deps = [ |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7212 | ":enable_assembly", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 7213 | ":logging_utils", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7214 | ":operator_run", |
| 7215 | ":operators", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7216 | ":prod_microkernels", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7217 | "@clog", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7218 | "@pthreadpool", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 7219 | ] + select({ |
| 7220 | ":emscripten": [], |
| 7221 | "//conditions:default": ["@cpuinfo"], |
| 7222 | }), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7223 | ) |
| 7224 | |
| Marat Dukhan | cf056b2 | 2019-10-07 10:26:29 -0700 | [diff] [blame] | 7225 | xnnpack_cc_library( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7226 | name = "bench_utils", |
| 7227 | srcs = ["bench/utils.cc"], |
| 7228 | hdrs = ["bench/utils.h"], |
| Marat Dukhan | bad48fe | 2019-11-04 10:35:22 -0800 | [diff] [blame] | 7229 | deps = [ |
| 7230 | "@com_google_benchmark//:benchmark", |
| 7231 | "@cpuinfo", |
| 7232 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7233 | ) |
| 7234 | |
| Frank Barchard | 7e95597 | 2019-10-11 10:34:25 -0700 | [diff] [blame] | 7235 | ######################### Benchmarks for micro-kernels ######################### |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7236 | |
| 7237 | xnnpack_benchmark( |
| Marat Dukhan | 0744fa0 | 2021-07-26 22:56:27 -0700 | [diff] [blame] | 7238 | name = "qs8_dwconv_bench", |
| 7239 | srcs = [ |
| 7240 | "bench/dwconv.h", |
| 7241 | "bench/qs8-dwconv.cc", |
| 7242 | "src/xnnpack/AlignedAllocator.h", |
| 7243 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7244 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7245 | ":indirection", |
| 7246 | ":packing", |
| 7247 | ], |
| 7248 | ) |
| 7249 | |
| 7250 | xnnpack_benchmark( |
| Marat Dukhan | 595e170 | 2020-07-31 10:12:52 -0700 | [diff] [blame] | 7251 | name = "qs8_gemm_bench", |
| 7252 | srcs = [ |
| 7253 | "bench/gemm.h", |
| 7254 | "bench/qs8-gemm.cc", |
| 7255 | "src/xnnpack/AlignedAllocator.h", |
| 7256 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Frank Barchard | 31328cb | 2020-10-12 11:55:18 -0700 | [diff] [blame] | 7257 | copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(), |
| 7258 | deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(), |
| Marat Dukhan | 595e170 | 2020-07-31 10:12:52 -0700 | [diff] [blame] | 7259 | ) |
| 7260 | |
| 7261 | xnnpack_benchmark( |
| Marat Dukhan | 56bdd4a | 2020-08-03 19:47:04 -0700 | [diff] [blame] | 7262 | name = "qs8_requantization_bench", |
| 7263 | srcs = [ |
| 7264 | "bench/qs8-requantization.cc", |
| Marat Dukhan | 56bdd4a | 2020-08-03 19:47:04 -0700 | [diff] [blame] | 7265 | "src/xnnpack/AlignedAllocator.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7266 | "src/xnnpack/requantization-stubs.h", |
| Marat Dukhan | 56bdd4a | 2020-08-03 19:47:04 -0700 | [diff] [blame] | 7267 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7268 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7269 | ) |
| 7270 | |
| 7271 | xnnpack_benchmark( |
| Marat Dukhan | 83a8d2f | 2021-07-29 16:41:19 -0700 | [diff] [blame] | 7272 | name = "qs8_vadd_bench", |
| 7273 | srcs = [ |
| 7274 | "bench/qs8-vadd.cc", |
| 7275 | "src/xnnpack/AlignedAllocator.h", |
| 7276 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7277 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7278 | ) |
| 7279 | |
| 7280 | xnnpack_benchmark( |
| 7281 | name = "qs8_vaddc_bench", |
| 7282 | srcs = [ |
| 7283 | "bench/qs8-vaddc.cc", |
| 7284 | "src/xnnpack/AlignedAllocator.h", |
| 7285 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7286 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7287 | ) |
| 7288 | |
| 7289 | xnnpack_benchmark( |
| Marat Dukhan | 795e5ab | 2021-08-02 19:07:52 -0700 | [diff] [blame] | 7290 | name = "qs8_vmul_bench", |
| 7291 | srcs = [ |
| 7292 | "bench/qs8-vmul.cc", |
| 7293 | "src/xnnpack/AlignedAllocator.h", |
| 7294 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7295 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7296 | ) |
| 7297 | |
| 7298 | xnnpack_benchmark( |
| Marat Dukhan | 8b024c9 | 2021-08-03 00:05:14 -0700 | [diff] [blame] | 7299 | name = "qs8_vmulc_bench", |
| 7300 | srcs = [ |
| 7301 | "bench/qs8-vmulc.cc", |
| 7302 | "src/xnnpack/AlignedAllocator.h", |
| 7303 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7304 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7305 | ) |
| 7306 | |
| 7307 | xnnpack_benchmark( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 7308 | name = "qu8_gemm_bench", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7309 | srcs = [ |
| 7310 | "bench/gemm.h", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 7311 | "bench/qu8-gemm.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7312 | "src/xnnpack/AlignedAllocator.h", |
| 7313 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7314 | copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(), |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7315 | deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7316 | ) |
| 7317 | |
| 7318 | xnnpack_benchmark( |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 7319 | name = "qu8_requantization_bench", |
| 7320 | srcs = [ |
| 7321 | "bench/qu8-requantization.cc", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 7322 | "src/xnnpack/AlignedAllocator.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7323 | "src/xnnpack/requantization-stubs.h", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 7324 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7325 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7326 | ) |
| 7327 | |
| 7328 | xnnpack_benchmark( |
| Marat Dukhan | 1ef9de8 | 2021-07-29 17:15:33 -0700 | [diff] [blame] | 7329 | name = "qu8_vadd_bench", |
| 7330 | srcs = [ |
| 7331 | "bench/qu8-vadd.cc", |
| 7332 | "src/xnnpack/AlignedAllocator.h", |
| 7333 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7334 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7335 | ) |
| 7336 | |
| 7337 | xnnpack_benchmark( |
| 7338 | name = "qu8_vaddc_bench", |
| 7339 | srcs = [ |
| 7340 | "bench/qu8-vaddc.cc", |
| 7341 | "src/xnnpack/AlignedAllocator.h", |
| 7342 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7343 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7344 | ) |
| 7345 | |
| 7346 | xnnpack_benchmark( |
| Marat Dukhan | 795e5ab | 2021-08-02 19:07:52 -0700 | [diff] [blame] | 7347 | name = "qu8_vmul_bench", |
| 7348 | srcs = [ |
| 7349 | "bench/qu8-vmul.cc", |
| 7350 | "src/xnnpack/AlignedAllocator.h", |
| 7351 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7352 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7353 | ) |
| 7354 | |
| 7355 | xnnpack_benchmark( |
| Marat Dukhan | 8b024c9 | 2021-08-03 00:05:14 -0700 | [diff] [blame] | 7356 | name = "qu8_vmulc_bench", |
| 7357 | srcs = [ |
| 7358 | "bench/qu8-vmulc.cc", |
| 7359 | "src/xnnpack/AlignedAllocator.h", |
| 7360 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7361 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7362 | ) |
| 7363 | |
| 7364 | xnnpack_benchmark( |
| Frank Barchard | 40d20fe | 2020-05-05 00:37:45 -0700 | [diff] [blame] | 7365 | name = "f16_igemm_bench", |
| 7366 | srcs = [ |
| 7367 | "bench/f16-igemm.cc", |
| 7368 | "bench/conv.h", |
| Frank Barchard | 40d20fe | 2020-05-05 00:37:45 -0700 | [diff] [blame] | 7369 | "src/xnnpack/AlignedAllocator.h", |
| 7370 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7371 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7372 | ":indirection", |
| 7373 | ":packing", |
| 7374 | ], |
| Frank Barchard | 40d20fe | 2020-05-05 00:37:45 -0700 | [diff] [blame] | 7375 | ) |
| 7376 | |
| 7377 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7378 | name = "f16_gemm_bench", |
| 7379 | srcs = [ |
| 7380 | "bench/f16-gemm.cc", |
| 7381 | "bench/gemm.h", |
| 7382 | "src/xnnpack/AlignedAllocator.h", |
| 7383 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7384 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7385 | ":packing", |
| 7386 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7387 | ) |
| 7388 | |
| 7389 | xnnpack_benchmark( |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 7390 | name = "f16_spmm_bench", |
| 7391 | srcs = [ |
| 7392 | "bench/f16-spmm.cc", |
| Marat Dukhan | 1631e3e | 2020-12-06 19:29:31 -0800 | [diff] [blame] | 7393 | "bench/spmm.h", |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 7394 | "src/xnnpack/AlignedAllocator.h", |
| 7395 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 7396 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7397 | ) |
| 7398 | |
| 7399 | xnnpack_benchmark( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 7400 | name = "f16_vrelu_bench", |
| 7401 | srcs = [ |
| 7402 | "bench/f16-vrelu.cc", |
| 7403 | "src/xnnpack/AlignedAllocator.h", |
| 7404 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7405 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7406 | ) |
| 7407 | |
| 7408 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7409 | name = "f32_igemm_bench", |
| 7410 | srcs = [ |
| 7411 | "bench/f32-igemm.cc", |
| 7412 | "bench/conv.h", |
| 7413 | "src/xnnpack/AlignedAllocator.h", |
| 7414 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7415 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7416 | ":indirection", |
| 7417 | ":packing", |
| 7418 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7419 | ) |
| 7420 | |
| 7421 | xnnpack_benchmark( |
| 7422 | name = "f32_conv_hwc_bench", |
| 7423 | srcs = [ |
| 7424 | "bench/f32-conv-hwc.cc", |
| 7425 | "bench/dconv.h", |
| 7426 | "src/xnnpack/AlignedAllocator.h", |
| 7427 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7428 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7429 | ":packing", |
| 7430 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7431 | ) |
| 7432 | |
| 7433 | xnnpack_benchmark( |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 7434 | name = "f32_conv_hwc2chw_bench", |
| Erich Elsen | 563df5f | 2019-10-23 08:02:21 -0700 | [diff] [blame] | 7435 | srcs = [ |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 7436 | "bench/f32-conv-hwc2chw.cc", |
| Erich Elsen | 563df5f | 2019-10-23 08:02:21 -0700 | [diff] [blame] | 7437 | "bench/dconv.h", |
| 7438 | "src/xnnpack/AlignedAllocator.h", |
| 7439 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7440 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7441 | ":packing", |
| 7442 | ], |
| Erich Elsen | 563df5f | 2019-10-23 08:02:21 -0700 | [diff] [blame] | 7443 | ) |
| 7444 | |
| 7445 | xnnpack_benchmark( |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 7446 | name = "f16_dwconv_bench", |
| 7447 | srcs = [ |
| 7448 | "bench/f16-dwconv.cc", |
| 7449 | "bench/dwconv.h", |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 7450 | "src/xnnpack/AlignedAllocator.h", |
| 7451 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7452 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7453 | ":indirection", |
| 7454 | ":packing", |
| 7455 | ], |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 7456 | ) |
| 7457 | |
| 7458 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7459 | name = "f32_dwconv_bench", |
| 7460 | srcs = [ |
| 7461 | "bench/f32-dwconv.cc", |
| 7462 | "bench/dwconv.h", |
| 7463 | "src/xnnpack/AlignedAllocator.h", |
| 7464 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7465 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7466 | ":indirection", |
| 7467 | ":packing", |
| 7468 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7469 | ) |
| 7470 | |
| 7471 | xnnpack_benchmark( |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 7472 | name = "f32_dwconv2d_chw_bench", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7473 | srcs = [ |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 7474 | "bench/f32-dwconv2d-chw.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7475 | "bench/dwconv.h", |
| 7476 | "src/xnnpack/AlignedAllocator.h", |
| 7477 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7478 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7479 | ":indirection", |
| 7480 | ":packing", |
| 7481 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7482 | ) |
| 7483 | |
| 7484 | xnnpack_benchmark( |
| 7485 | name = "f32_gemm_bench", |
| 7486 | srcs = [ |
| 7487 | "bench/f32-gemm.cc", |
| 7488 | "bench/gemm.h", |
| 7489 | "src/xnnpack/AlignedAllocator.h", |
| 7490 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7491 | copts = xnnpack_optional_ruy_copts(), |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7492 | deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7493 | ) |
| 7494 | |
| 7495 | xnnpack_benchmark( |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 7496 | name = "f32_raddexpminusmax_bench", |
| 7497 | srcs = [ |
| 7498 | "bench/f32-raddexpminusmax.cc", |
| 7499 | "src/xnnpack/AlignedAllocator.h", |
| 7500 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7501 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7502 | ) |
| 7503 | |
| 7504 | xnnpack_benchmark( |
| 7505 | name = "f32_raddextexp_bench", |
| 7506 | srcs = [ |
| 7507 | "bench/f32-raddextexp.cc", |
| 7508 | "src/xnnpack/AlignedAllocator.h", |
| 7509 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7510 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7511 | ) |
| 7512 | |
| 7513 | xnnpack_benchmark( |
| 7514 | name = "f32_raddstoreexpminusmax_bench", |
| 7515 | srcs = [ |
| 7516 | "bench/f32-raddstoreexpminusmax.cc", |
| 7517 | "src/xnnpack/AlignedAllocator.h", |
| 7518 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7519 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7520 | ) |
| 7521 | |
| 7522 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7523 | name = "f32_rmax_bench", |
| 7524 | srcs = [ |
| 7525 | "bench/f32-rmax.cc", |
| 7526 | "src/xnnpack/AlignedAllocator.h", |
| 7527 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7528 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7529 | ) |
| 7530 | |
| 7531 | xnnpack_benchmark( |
| 7532 | name = "f32_spmm_bench", |
| 7533 | srcs = [ |
| 7534 | "bench/f32-spmm.cc", |
| Marat Dukhan | 1631e3e | 2020-12-06 19:29:31 -0800 | [diff] [blame] | 7535 | "bench/spmm.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7536 | "src/xnnpack/AlignedAllocator.h", |
| 7537 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7538 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7539 | ) |
| 7540 | |
| 7541 | xnnpack_benchmark( |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 7542 | name = "f32_softmax_bench", |
| Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 7543 | srcs = [ |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 7544 | "bench/f32-softmax.cc", |
| Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 7545 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7546 | copts = xnnpack_optional_dnnl_copts(), |
| Marat Dukhan | 8d3c693 | 2020-03-06 20:27:27 -0800 | [diff] [blame] | 7547 | deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(), |
| Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 7548 | ) |
| 7549 | |
| 7550 | xnnpack_benchmark( |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7551 | name = "f32_velu_bench", |
| 7552 | srcs = [ |
| 7553 | "bench/f32-velu.cc", |
| 7554 | "src/xnnpack/AlignedAllocator.h", |
| 7555 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7556 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7557 | ) |
| 7558 | |
| 7559 | xnnpack_benchmark( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 7560 | name = "f32_vhswish_bench", |
| 7561 | srcs = [ |
| 7562 | "bench/f32-vhswish.cc", |
| 7563 | "src/xnnpack/AlignedAllocator.h", |
| 7564 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7565 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7566 | ) |
| 7567 | |
| 7568 | xnnpack_benchmark( |
| 7569 | name = "f32_vrelu_bench", |
| 7570 | srcs = [ |
| 7571 | "bench/f32-vrelu.cc", |
| 7572 | "src/xnnpack/AlignedAllocator.h", |
| 7573 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7574 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7575 | ) |
| 7576 | |
| 7577 | xnnpack_benchmark( |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 7578 | name = "f32_vscaleexpminusmax_bench", |
| 7579 | srcs = [ |
| 7580 | "bench/f32-vscaleexpminusmax.cc", |
| 7581 | "src/xnnpack/AlignedAllocator.h", |
| 7582 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7583 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7584 | ) |
| 7585 | |
| 7586 | xnnpack_benchmark( |
| 7587 | name = "f32_vscaleextexp_bench", |
| 7588 | srcs = [ |
| 7589 | "bench/f32-vscaleextexp.cc", |
| 7590 | "src/xnnpack/AlignedAllocator.h", |
| 7591 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7592 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7593 | ) |
| 7594 | |
| 7595 | xnnpack_benchmark( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 7596 | name = "f32_vsigmoid_bench", |
| 7597 | srcs = [ |
| 7598 | "bench/f32-vsigmoid.cc", |
| 7599 | "src/xnnpack/AlignedAllocator.h", |
| 7600 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7601 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7602 | ) |
| 7603 | |
| 7604 | xnnpack_benchmark( |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 7605 | name = "f32_vsqrt_bench", |
| 7606 | srcs = [ |
| 7607 | "bench/f32-vsqrt.cc", |
| 7608 | "src/xnnpack/AlignedAllocator.h", |
| 7609 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7610 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7611 | ) |
| 7612 | |
| 7613 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7614 | name = "f32_im2col_gemm_bench", |
| 7615 | srcs = [ |
| 7616 | "bench/f32-im2col-gemm.cc", |
| 7617 | "bench/conv.h", |
| 7618 | "src/xnnpack/AlignedAllocator.h", |
| 7619 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 7620 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7621 | ":im2col", |
| 7622 | ":packing", |
| 7623 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7624 | ) |
| 7625 | |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 7626 | xnnpack_benchmark( |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 7627 | name = "rounding_bench", |
| 7628 | srcs = [ |
| 7629 | "bench/rounding.cc", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 7630 | "src/xnnpack/AlignedAllocator.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7631 | "src/xnnpack/math-stubs.h", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 7632 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7633 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 7634 | ) |
| 7635 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7636 | ########################### Benchmarks for operators ########################### |
| 7637 | |
| 7638 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7639 | name = "average_pooling_bench", |
| 7640 | srcs = ["bench/average-pooling.cc"], |
| Marat Dukhan | 7a16d8b | 2020-03-11 04:22:44 -0700 | [diff] [blame] | 7641 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 7642 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7643 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7644 | ) |
| 7645 | |
| 7646 | xnnpack_benchmark( |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 7647 | name = "bankers_rounding_bench", |
| 7648 | srcs = ["bench/bankers-rounding.cc"], |
| 7649 | copts = xnnpack_optional_tflite_copts(), |
| 7650 | tags = ["nowin32"], |
| 7651 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 7652 | ) |
| 7653 | |
| 7654 | xnnpack_benchmark( |
| 7655 | name = "ceiling_bench", |
| 7656 | srcs = ["bench/ceiling.cc"], |
| 7657 | copts = xnnpack_optional_tflite_copts(), |
| 7658 | tags = ["nowin32"], |
| 7659 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 7660 | ) |
| 7661 | |
| 7662 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7663 | name = "channel_shuffle_bench", |
| 7664 | srcs = ["bench/channel-shuffle.cc"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7665 | deps = OPERATOR_BENCHMARK_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7666 | ) |
| 7667 | |
| 7668 | xnnpack_benchmark( |
| 7669 | name = "convolution_bench", |
| 7670 | srcs = ["bench/convolution.cc"], |
| 7671 | copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 7672 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7673 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7674 | ) |
| 7675 | |
| 7676 | xnnpack_benchmark( |
| 7677 | name = "deconvolution_bench", |
| 7678 | srcs = ["bench/deconvolution.cc"], |
| 7679 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 7680 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7681 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7682 | ) |
| 7683 | |
| 7684 | xnnpack_benchmark( |
| Marat Dukhan | b6bd4bc | 2020-12-01 17:01:40 -0800 | [diff] [blame] | 7685 | name = "elu_bench", |
| 7686 | srcs = ["bench/elu.cc"], |
| 7687 | copts = xnnpack_optional_tflite_copts(), |
| 7688 | tags = ["nowin32"], |
| 7689 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 7690 | ) |
| 7691 | |
| 7692 | xnnpack_benchmark( |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 7693 | name = "floor_bench", |
| 7694 | srcs = ["bench/floor.cc"], |
| 7695 | copts = xnnpack_optional_tflite_copts(), |
| 7696 | tags = ["nowin32"], |
| 7697 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 7698 | ) |
| 7699 | |
| 7700 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7701 | name = "global_average_pooling_bench", |
| 7702 | srcs = ["bench/global-average-pooling.cc"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7703 | deps = OPERATOR_BENCHMARK_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7704 | ) |
| 7705 | |
| 7706 | xnnpack_benchmark( |
| Marat Dukhan | ad35260 | 2020-06-25 21:50:54 -0700 | [diff] [blame] | 7707 | name = "hardswish_bench", |
| 7708 | srcs = ["bench/hardswish.cc"], |
| 7709 | copts = xnnpack_optional_tflite_copts(), |
| 7710 | tags = ["nowin32"], |
| 7711 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 7712 | ) |
| 7713 | |
| 7714 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7715 | name = "max_pooling_bench", |
| 7716 | srcs = ["bench/max-pooling.cc"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7717 | deps = OPERATOR_BENCHMARK_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7718 | ) |
| 7719 | |
| 7720 | xnnpack_benchmark( |
| 7721 | name = "sigmoid_bench", |
| 7722 | srcs = ["bench/sigmoid.cc"], |
| Marat Dukhan | c3b9e86 | 2019-11-17 13:18:54 -0800 | [diff] [blame] | 7723 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | ca2ba70 | 2020-04-24 01:31:47 -0700 | [diff] [blame] | 7724 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7725 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7726 | ) |
| 7727 | |
| 7728 | xnnpack_benchmark( |
| Marat Dukhan | 95b2243 | 2019-10-30 16:30:14 -0700 | [diff] [blame] | 7729 | name = "prelu_bench", |
| 7730 | srcs = ["bench/prelu.cc"], |
| 7731 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 7732 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7733 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 95b2243 | 2019-10-30 16:30:14 -0700 | [diff] [blame] | 7734 | ) |
| 7735 | |
| 7736 | xnnpack_benchmark( |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 7737 | name = "softmax_bench", |
| 7738 | srcs = ["bench/softmax.cc"], |
| Marat Dukhan | 9c0db96 | 2020-01-28 12:30:14 -0800 | [diff] [blame] | 7739 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | ca2ba70 | 2020-04-24 01:31:47 -0700 | [diff] [blame] | 7740 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7741 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7742 | ) |
| 7743 | |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 7744 | xnnpack_benchmark( |
| Marat Dukhan | 6804bbd | 2020-06-30 19:26:11 -0700 | [diff] [blame] | 7745 | name = "square_root_bench", |
| 7746 | srcs = ["bench/square-root.cc"], |
| 7747 | copts = xnnpack_optional_tflite_copts(), |
| 7748 | tags = ["nowin32"], |
| 7749 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 7750 | ) |
| 7751 | |
| 7752 | xnnpack_benchmark( |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 7753 | name = "truncation_bench", |
| 7754 | srcs = ["bench/truncation.cc"], |
| 7755 | deps = OPERATOR_BENCHMARK_DEPS, |
| 7756 | ) |
| 7757 | |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 7758 | ############################# End-to-end benchmarks ############################ |
| 7759 | |
| 7760 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 7761 | name = "fp32_mobilenet_v1", |
| 7762 | srcs = ["models/fp32-mobilenet-v1.cc"], |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 7763 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 7764 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 7765 | linkstatic = True, |
| 7766 | deps = [ |
| 7767 | ":XNNPACK", |
| 7768 | "@pthreadpool", |
| 7769 | ], |
| 7770 | ) |
| 7771 | |
| 7772 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 7773 | name = "fp32_sparse_mobilenet_v1", |
| 7774 | srcs = ["models/fp32-sparse-mobilenet-v1.cc"], |
| 7775 | hdrs = ["models/models.h"], |
| 7776 | copts = xnnpack_std_cxxopts(), |
| 7777 | linkstatic = True, |
| 7778 | deps = [ |
| 7779 | ":XNNPACK", |
| 7780 | "@pthreadpool", |
| 7781 | ], |
| 7782 | ) |
| 7783 | |
| 7784 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 7785 | name = "fp16_mobilenet_v1", |
| 7786 | srcs = ["models/fp16-mobilenet-v1.cc"], |
| 7787 | hdrs = ["models/models.h"], |
| 7788 | copts = xnnpack_std_cxxopts(), |
| 7789 | linkstatic = True, |
| 7790 | deps = [ |
| 7791 | ":XNNPACK", |
| 7792 | "@FP16", |
| 7793 | "@pthreadpool", |
| 7794 | ], |
| 7795 | ) |
| 7796 | |
| 7797 | cc_library( |
| Marat Dukhan | 0743cdf | 2020-08-04 18:52:07 -0700 | [diff] [blame] | 7798 | name = "qs8_mobilenet_v1", |
| 7799 | srcs = ["models/qs8-mobilenet-v1.cc"], |
| 7800 | hdrs = ["models/models.h"], |
| 7801 | copts = xnnpack_std_cxxopts(), |
| 7802 | linkstatic = True, |
| 7803 | deps = [ |
| 7804 | ":XNNPACK", |
| 7805 | "@pthreadpool", |
| 7806 | ], |
| 7807 | ) |
| 7808 | |
| 7809 | cc_library( |
| Marat Dukhan | 70a9618 | 2020-09-03 17:13:58 -0700 | [diff] [blame] | 7810 | name = "qs8_mobilenet_v2", |
| 7811 | srcs = ["models/qs8-mobilenet-v2.cc"], |
| 7812 | hdrs = ["models/models.h"], |
| 7813 | copts = xnnpack_std_cxxopts(), |
| 7814 | linkstatic = True, |
| 7815 | deps = [ |
| 7816 | ":XNNPACK", |
| 7817 | "@pthreadpool", |
| 7818 | ], |
| 7819 | ) |
| 7820 | |
| 7821 | cc_library( |
| Marat Dukhan | 12a23bb | 2021-03-08 08:13:21 -0800 | [diff] [blame] | 7822 | name = "qu8_mobilenet_v1", |
| 7823 | srcs = ["models/qu8-mobilenet-v1.cc"], |
| 7824 | hdrs = ["models/models.h"], |
| 7825 | copts = xnnpack_std_cxxopts(), |
| 7826 | linkstatic = True, |
| 7827 | deps = [ |
| 7828 | ":XNNPACK", |
| 7829 | "@pthreadpool", |
| 7830 | ], |
| 7831 | ) |
| 7832 | |
| 7833 | cc_library( |
| Marat Dukhan | 036b2b1 | 2021-07-21 01:12:58 -0700 | [diff] [blame] | 7834 | name = "qu8_mobilenet_v2", |
| 7835 | srcs = ["models/qu8-mobilenet-v2.cc"], |
| 7836 | hdrs = ["models/models.h"], |
| 7837 | copts = xnnpack_std_cxxopts(), |
| 7838 | linkstatic = True, |
| 7839 | deps = [ |
| 7840 | ":XNNPACK", |
| 7841 | "@pthreadpool", |
| 7842 | ], |
| 7843 | ) |
| 7844 | |
| 7845 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 7846 | name = "fp32_mobilenet_v2", |
| 7847 | srcs = ["models/fp32-mobilenet-v2.cc"], |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 7848 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 7849 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 7850 | linkstatic = True, |
| 7851 | deps = [ |
| 7852 | ":XNNPACK", |
| 7853 | "@pthreadpool", |
| 7854 | ], |
| 7855 | ) |
| 7856 | |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 7857 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 7858 | name = "fp32_sparse_mobilenet_v2", |
| 7859 | srcs = ["models/fp32-sparse-mobilenet-v2.cc"], |
| 7860 | hdrs = ["models/models.h"], |
| 7861 | copts = xnnpack_std_cxxopts(), |
| 7862 | linkstatic = True, |
| 7863 | deps = [ |
| 7864 | ":XNNPACK", |
| 7865 | "@pthreadpool", |
| 7866 | ], |
| 7867 | ) |
| 7868 | |
| 7869 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 7870 | name = "fp16_mobilenet_v2", |
| 7871 | srcs = ["models/fp16-mobilenet-v2.cc"], |
| 7872 | hdrs = ["models/models.h"], |
| 7873 | copts = xnnpack_std_cxxopts(), |
| 7874 | linkstatic = True, |
| 7875 | deps = [ |
| 7876 | ":XNNPACK", |
| 7877 | "@FP16", |
| 7878 | "@pthreadpool", |
| 7879 | ], |
| 7880 | ) |
| 7881 | |
| 7882 | cc_library( |
| 7883 | name = "fp32_mobilenet_v3_large", |
| 7884 | srcs = ["models/fp32-mobilenet-v3-large.cc"], |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 7885 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 7886 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 7887 | linkstatic = True, |
| 7888 | deps = [ |
| 7889 | ":XNNPACK", |
| 7890 | "@pthreadpool", |
| 7891 | ], |
| 7892 | ) |
| 7893 | |
| 7894 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 7895 | name = "fp32_sparse_mobilenet_v3_large", |
| 7896 | srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"], |
| 7897 | hdrs = ["models/models.h"], |
| 7898 | copts = xnnpack_std_cxxopts(), |
| 7899 | linkstatic = True, |
| 7900 | deps = [ |
| 7901 | ":XNNPACK", |
| 7902 | "@pthreadpool", |
| 7903 | ], |
| 7904 | ) |
| 7905 | |
| 7906 | cc_library( |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 7907 | name = "fp16_mobilenet_v3_large", |
| 7908 | srcs = ["models/fp16-mobilenet-v3-large.cc"], |
| 7909 | hdrs = ["models/models.h"], |
| 7910 | copts = xnnpack_std_cxxopts(), |
| 7911 | linkstatic = True, |
| 7912 | deps = [ |
| 7913 | ":XNNPACK", |
| 7914 | "@FP16", |
| 7915 | "@pthreadpool", |
| 7916 | ], |
| 7917 | ) |
| 7918 | |
| 7919 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 7920 | name = "fp32_mobilenet_v3_small", |
| 7921 | srcs = ["models/fp32-mobilenet-v3-small.cc"], |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 7922 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 7923 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 7924 | linkstatic = True, |
| 7925 | deps = [ |
| 7926 | ":XNNPACK", |
| 7927 | "@pthreadpool", |
| 7928 | ], |
| 7929 | ) |
| 7930 | |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 7931 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 7932 | name = "fp32_sparse_mobilenet_v3_small", |
| 7933 | srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"], |
| 7934 | hdrs = ["models/models.h"], |
| 7935 | copts = xnnpack_std_cxxopts(), |
| 7936 | linkstatic = True, |
| 7937 | deps = [ |
| 7938 | ":XNNPACK", |
| 7939 | "@pthreadpool", |
| 7940 | ], |
| 7941 | ) |
| 7942 | |
| 7943 | cc_library( |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 7944 | name = "fp16_mobilenet_v3_small", |
| 7945 | srcs = ["models/fp16-mobilenet-v3-small.cc"], |
| 7946 | hdrs = ["models/models.h"], |
| 7947 | copts = xnnpack_std_cxxopts(), |
| 7948 | linkstatic = True, |
| 7949 | deps = [ |
| 7950 | ":XNNPACK", |
| 7951 | "@FP16", |
| 7952 | "@pthreadpool", |
| 7953 | ], |
| 7954 | ) |
| 7955 | |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 7956 | xnnpack_benchmark( |
| Marat Dukhan | ef4416e | 2019-10-31 13:44:40 -0700 | [diff] [blame] | 7957 | name = "f32_dwconv_e2e_bench", |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 7958 | srcs = [ |
| 7959 | "bench/f32-dwconv-e2e.cc", |
| 7960 | "bench/end2end.h", |
| 7961 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ef4416e | 2019-10-31 13:44:40 -0700 | [diff] [blame] | 7962 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7963 | ":XNNPACK", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 7964 | ":fp32_mobilenet_v1", |
| 7965 | ":fp32_mobilenet_v2", |
| 7966 | ":fp32_mobilenet_v3_large", |
| 7967 | ":fp32_mobilenet_v3_small", |
| Marat Dukhan | ef4416e | 2019-10-31 13:44:40 -0700 | [diff] [blame] | 7968 | ], |
| 7969 | ) |
| 7970 | |
| 7971 | xnnpack_benchmark( |
| Marat Dukhan | 5f18d26 | 2019-10-31 10:24:14 -0700 | [diff] [blame] | 7972 | name = "f32_gemm_e2e_bench", |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 7973 | srcs = [ |
| 7974 | "bench/f32-gemm-e2e.cc", |
| 7975 | "bench/end2end.h", |
| 7976 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 5f18d26 | 2019-10-31 10:24:14 -0700 | [diff] [blame] | 7977 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7978 | ":XNNPACK", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 7979 | ":fp32_mobilenet_v1", |
| 7980 | ":fp32_mobilenet_v2", |
| 7981 | ":fp32_mobilenet_v3_large", |
| 7982 | ":fp32_mobilenet_v3_small", |
| Marat Dukhan | 5f18d26 | 2019-10-31 10:24:14 -0700 | [diff] [blame] | 7983 | ], |
| 7984 | ) |
| 7985 | |
| 7986 | xnnpack_benchmark( |
| Marat Dukhan | bbfc6d3 | 2021-07-26 18:31:02 -0700 | [diff] [blame] | 7987 | name = "qs8_dwconv_e2e_bench", |
| 7988 | srcs = [ |
| 7989 | "bench/qs8-dwconv-e2e.cc", |
| 7990 | "bench/end2end.h", |
| 7991 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 7992 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 7993 | ":XNNPACK", |
| 7994 | ":qs8_mobilenet_v1", |
| 7995 | ":qs8_mobilenet_v2", |
| 7996 | ], |
| 7997 | ) |
| 7998 | |
| 7999 | xnnpack_benchmark( |
| Frank Barchard | dc909cb | 2021-02-08 13:59:31 -0800 | [diff] [blame] | 8000 | name = "qs8_gemm_e2e_bench", |
| 8001 | srcs = [ |
| 8002 | "bench/qs8-gemm-e2e.cc", |
| 8003 | "bench/end2end.h", |
| 8004 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 8005 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 8006 | ":XNNPACK", |
| 8007 | ":qs8_mobilenet_v1", |
| 8008 | ":qs8_mobilenet_v2", |
| 8009 | ], |
| 8010 | ) |
| 8011 | |
| 8012 | xnnpack_benchmark( |
| Marat Dukhan | 6084fb8 | 2021-07-27 07:45:02 -0700 | [diff] [blame] | 8013 | name = "qu8_dwconv_e2e_bench", |
| 8014 | srcs = [ |
| 8015 | "bench/qu8-dwconv-e2e.cc", |
| 8016 | "bench/end2end.h", |
| 8017 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 8018 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 8019 | ":XNNPACK", |
| 8020 | ":qu8_mobilenet_v1", |
| 8021 | ":qu8_mobilenet_v2", |
| 8022 | ], |
| 8023 | ) |
| 8024 | |
| 8025 | xnnpack_benchmark( |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 8026 | name = "end2end_bench", |
| 8027 | srcs = ["bench/end2end.cc"], |
| 8028 | deps = [ |
| 8029 | ":XNNPACK", |
| Frank Barchard | c712fa4 | 2019-10-31 14:00:21 -0700 | [diff] [blame] | 8030 | ":bench_utils", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 8031 | ":fp16_mobilenet_v1", |
| 8032 | ":fp16_mobilenet_v2", |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 8033 | ":fp16_mobilenet_v3_large", |
| 8034 | ":fp16_mobilenet_v3_small", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 8035 | ":fp32_mobilenet_v1", |
| 8036 | ":fp32_mobilenet_v2", |
| 8037 | ":fp32_mobilenet_v3_large", |
| 8038 | ":fp32_mobilenet_v3_small", |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 8039 | ":fp32_sparse_mobilenet_v1", |
| 8040 | ":fp32_sparse_mobilenet_v2", |
| 8041 | ":fp32_sparse_mobilenet_v3_large", |
| 8042 | ":fp32_sparse_mobilenet_v3_small", |
| Marat Dukhan | 0743cdf | 2020-08-04 18:52:07 -0700 | [diff] [blame] | 8043 | ":qs8_mobilenet_v1", |
| Marat Dukhan | 70a9618 | 2020-09-03 17:13:58 -0700 | [diff] [blame] | 8044 | ":qs8_mobilenet_v2", |
| Marat Dukhan | 12a23bb | 2021-03-08 08:13:21 -0800 | [diff] [blame] | 8045 | ":qu8_mobilenet_v1", |
| Marat Dukhan | 036b2b1 | 2021-07-21 01:12:58 -0700 | [diff] [blame] | 8046 | ":qu8_mobilenet_v2", |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 8047 | "@pthreadpool", |
| 8048 | ], |
| 8049 | ) |
| 8050 | |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 8051 | #################### Accuracy evaluation for math functions #################### |
| 8052 | |
| 8053 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 8054 | name = "f32_exp_ulp_eval", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 8055 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 8056 | "eval/f32-exp-ulp.cc", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 8057 | "src/xnnpack/AlignedAllocator.h", |
| 8058 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 8059 | deps = ACCURACY_EVAL_DEPS + [ |
| 8060 | ":bench_utils", |
| 8061 | "@cpuinfo", |
| 8062 | ], |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 8063 | ) |
| 8064 | |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 8065 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 8066 | name = "f32_expminus_ulp_eval", |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 8067 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 8068 | "eval/f32-expminus-ulp.cc", |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 8069 | "src/xnnpack/AlignedAllocator.h", |
| 8070 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 8071 | deps = ACCURACY_EVAL_DEPS + [ |
| 8072 | ":bench_utils", |
| 8073 | "@cpuinfo", |
| 8074 | ], |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 8075 | ) |
| 8076 | |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 8077 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 8078 | name = "f32_expm1minus_ulp_eval", |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 8079 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 8080 | "eval/f32-expm1minus-ulp.cc", |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 8081 | "src/xnnpack/AlignedAllocator.h", |
| 8082 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 8083 | deps = ACCURACY_EVAL_DEPS + [ |
| 8084 | ":bench_utils", |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 8085 | "@cpuinfo", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 8086 | ], |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 8087 | ) |
| 8088 | |
| 8089 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 8090 | name = "f32_extexp_ulp_eval", |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 8091 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 8092 | "eval/f32-extexp-ulp.cc", |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 8093 | "src/xnnpack/AlignedAllocator.h", |
| 8094 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 8095 | deps = ACCURACY_EVAL_DEPS + [ |
| 8096 | ":bench_utils", |
| 8097 | "@cpuinfo", |
| 8098 | ], |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 8099 | ) |
| 8100 | |
| Marat Dukhan | f44f022 | 2020-12-14 11:53:27 -0800 | [diff] [blame] | 8101 | xnnpack_benchmark( |
| 8102 | name = "f32_sigmoid_ulp_eval", |
| 8103 | srcs = [ |
| 8104 | "eval/f32-sigmoid-ulp.cc", |
| 8105 | "src/xnnpack/AlignedAllocator.h", |
| 8106 | ] + ACCURACY_EVAL_HDRS, |
| 8107 | deps = ACCURACY_EVAL_DEPS + [ |
| 8108 | ":bench_utils", |
| 8109 | "@cpuinfo", |
| 8110 | ], |
| 8111 | ) |
| 8112 | |
| 8113 | xnnpack_benchmark( |
| 8114 | name = "f32_sqrt_ulp_eval", |
| 8115 | srcs = [ |
| 8116 | "eval/f32-sqrt-ulp.cc", |
| 8117 | "src/xnnpack/AlignedAllocator.h", |
| 8118 | ] + ACCURACY_EVAL_HDRS, |
| 8119 | deps = ACCURACY_EVAL_DEPS + [ |
| 8120 | ":bench_utils", |
| 8121 | "@cpuinfo", |
| 8122 | ], |
| 8123 | ) |
| 8124 | |
| 8125 | ################### Accuracy verification for math functions ################## |
| 8126 | |
| 8127 | xnnpack_unit_test( |
| Marat Dukhan | f7291fc | 2020-12-15 11:02:50 -0800 | [diff] [blame] | 8128 | name = "f32_exp_eval", |
| 8129 | srcs = [ |
| 8130 | "eval/f32-exp.cc", |
| 8131 | "src/xnnpack/AlignedAllocator.h", |
| 8132 | "src/xnnpack/math-stubs.h", |
| 8133 | ] + MICROKERNEL_TEST_HDRS, |
| 8134 | automatic = False, |
| 8135 | deps = MICROKERNEL_TEST_DEPS, |
| 8136 | ) |
| 8137 | |
| 8138 | xnnpack_unit_test( |
| Marat Dukhan | f44f022 | 2020-12-14 11:53:27 -0800 | [diff] [blame] | 8139 | name = "f32_expm1minus_eval", |
| 8140 | srcs = [ |
| 8141 | "eval/f32-expm1minus.cc", |
| 8142 | "src/xnnpack/AlignedAllocator.h", |
| 8143 | "src/xnnpack/math-stubs.h", |
| 8144 | ] + MICROKERNEL_TEST_HDRS, |
| 8145 | automatic = False, |
| 8146 | deps = MICROKERNEL_TEST_DEPS, |
| 8147 | ) |
| 8148 | |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 8149 | xnnpack_unit_test( |
| Marat Dukhan | d28a5a2 | 2020-12-14 15:27:22 -0800 | [diff] [blame] | 8150 | name = "f32_expminus_eval", |
| 8151 | srcs = [ |
| 8152 | "eval/f32-expminus.cc", |
| 8153 | "src/xnnpack/AlignedAllocator.h", |
| 8154 | "src/xnnpack/math-stubs.h", |
| 8155 | ] + MICROKERNEL_TEST_HDRS, |
| 8156 | automatic = False, |
| 8157 | deps = MICROKERNEL_TEST_DEPS, |
| 8158 | ) |
| 8159 | |
| 8160 | xnnpack_unit_test( |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 8161 | name = "f32_roundne_eval", |
| 8162 | srcs = [ |
| 8163 | "eval/f32-roundne.cc", |
| 8164 | "src/xnnpack/AlignedAllocator.h", |
| 8165 | "src/xnnpack/math-stubs.h", |
| 8166 | ] + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | 22eed3d | 2020-05-11 20:13:37 -0700 | [diff] [blame] | 8167 | automatic = False, |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 8168 | deps = MICROKERNEL_TEST_DEPS, |
| 8169 | ) |
| 8170 | |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 8171 | xnnpack_unit_test( |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 8172 | name = "f32_roundd_eval", |
| 8173 | srcs = [ |
| 8174 | "eval/f32-roundd.cc", |
| 8175 | "src/xnnpack/AlignedAllocator.h", |
| 8176 | "src/xnnpack/math-stubs.h", |
| 8177 | ] + MICROKERNEL_TEST_HDRS, |
| 8178 | automatic = False, |
| 8179 | deps = MICROKERNEL_TEST_DEPS, |
| 8180 | ) |
| 8181 | |
| 8182 | xnnpack_unit_test( |
| 8183 | name = "f32_roundu_eval", |
| 8184 | srcs = [ |
| 8185 | "eval/f32-roundu.cc", |
| 8186 | "src/xnnpack/AlignedAllocator.h", |
| 8187 | "src/xnnpack/math-stubs.h", |
| 8188 | ] + MICROKERNEL_TEST_HDRS, |
| 8189 | automatic = False, |
| 8190 | deps = MICROKERNEL_TEST_DEPS, |
| 8191 | ) |
| 8192 | |
| 8193 | xnnpack_unit_test( |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 8194 | name = "f32_roundz_eval", |
| 8195 | srcs = [ |
| 8196 | "eval/f32-roundz.cc", |
| 8197 | "src/xnnpack/AlignedAllocator.h", |
| 8198 | "src/xnnpack/math-stubs.h", |
| 8199 | ] + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 8200 | automatic = False, |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 8201 | deps = MICROKERNEL_TEST_DEPS, |
| 8202 | ) |
| 8203 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8204 | ######################### Unit tests for micro-kernels ######################### |
| 8205 | |
| 8206 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 8207 | name = "f16_dwconv_minmax_test", |
| 8208 | srcs = [ |
| 8209 | "test/f16-dwconv-minmax.cc", |
| 8210 | "test/dwconv-microkernel-tester.h", |
| 8211 | "src/xnnpack/AlignedAllocator.h", |
| 8212 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 8213 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 8214 | ) |
| 8215 | |
| 8216 | xnnpack_unit_test( |
| 8217 | name = "f16_gavgpool_minmax_test", |
| 8218 | srcs = [ |
| 8219 | "test/f16-gavgpool-minmax.cc", |
| 8220 | "test/gavgpool-microkernel-tester.h", |
| 8221 | "src/xnnpack/AlignedAllocator.h", |
| 8222 | ] + MICROKERNEL_TEST_HDRS, |
| 8223 | deps = MICROKERNEL_TEST_DEPS, |
| 8224 | ) |
| 8225 | |
| 8226 | xnnpack_unit_test( |
| Marat Dukhan | de06f49 | 2020-04-09 00:19:31 -0700 | [diff] [blame] | 8227 | name = "f16_gemm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8228 | srcs = [ |
| Marat Dukhan | de06f49 | 2020-04-09 00:19:31 -0700 | [diff] [blame] | 8229 | "test/f16-gemm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8230 | "test/gemm-microkernel-tester.h", |
| 8231 | "src/xnnpack/AlignedAllocator.h", |
| 8232 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8233 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8234 | ) |
| 8235 | |
| 8236 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 8237 | name = "f16_igemm_minmax_test", |
| 8238 | srcs = [ |
| 8239 | "test/f16-igemm-minmax.cc", |
| 8240 | "test/gemm-microkernel-tester.h", |
| 8241 | "src/xnnpack/AlignedAllocator.h", |
| 8242 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 8243 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 8244 | ) |
| 8245 | |
| 8246 | xnnpack_unit_test( |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 8247 | name = "f16_spmm_minmax_test", |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 8248 | srcs = [ |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 8249 | "test/f16-spmm-minmax.cc", |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 8250 | "test/spmm-microkernel-tester.h", |
| 8251 | "src/xnnpack/AlignedAllocator.h", |
| 8252 | ] + MICROKERNEL_TEST_HDRS, |
| 8253 | deps = MICROKERNEL_TEST_DEPS, |
| 8254 | ) |
| 8255 | |
| 8256 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 8257 | name = "f16_vadd_minmax_test", |
| 8258 | srcs = [ |
| 8259 | "test/f16-vadd-minmax.cc", |
| 8260 | "test/vbinary-microkernel-tester.h", |
| 8261 | ] + MICROKERNEL_TEST_HDRS, |
| 8262 | deps = MICROKERNEL_TEST_DEPS, |
| 8263 | ) |
| 8264 | |
| 8265 | xnnpack_unit_test( |
| 8266 | name = "f16_vaddc_minmax_test", |
| 8267 | srcs = [ |
| 8268 | "test/f16-vaddc-minmax.cc", |
| 8269 | "test/vbinaryc-microkernel-tester.h", |
| 8270 | ] + MICROKERNEL_TEST_HDRS, |
| 8271 | deps = MICROKERNEL_TEST_DEPS, |
| 8272 | ) |
| 8273 | |
| 8274 | xnnpack_unit_test( |
| 8275 | name = "f16_vclamp_test", |
| 8276 | srcs = [ |
| 8277 | "test/f16-vclamp.cc", |
| Marat Dukhan | a6c0516 | 2021-05-13 16:52:02 -0700 | [diff] [blame] | 8278 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 8279 | ] + MICROKERNEL_TEST_HDRS, |
| 8280 | deps = MICROKERNEL_TEST_DEPS, |
| 8281 | ) |
| 8282 | |
| 8283 | xnnpack_unit_test( |
| 8284 | name = "f16_vdiv_minmax_test", |
| 8285 | srcs = [ |
| 8286 | "test/f16-vdiv-minmax.cc", |
| 8287 | "test/vbinary-microkernel-tester.h", |
| 8288 | ] + MICROKERNEL_TEST_HDRS, |
| 8289 | deps = MICROKERNEL_TEST_DEPS, |
| 8290 | ) |
| 8291 | |
| 8292 | xnnpack_unit_test( |
| 8293 | name = "f16_vdivc_minmax_test", |
| 8294 | srcs = [ |
| 8295 | "test/f16-vdivc-minmax.cc", |
| 8296 | "test/vbinaryc-microkernel-tester.h", |
| 8297 | ] + MICROKERNEL_TEST_HDRS, |
| 8298 | deps = MICROKERNEL_TEST_DEPS, |
| 8299 | ) |
| 8300 | |
| 8301 | xnnpack_unit_test( |
| 8302 | name = "f16_vrdivc_minmax_test", |
| 8303 | srcs = [ |
| 8304 | "test/f16-vrdivc-minmax.cc", |
| 8305 | "test/vbinaryc-microkernel-tester.h", |
| 8306 | ] + MICROKERNEL_TEST_HDRS, |
| 8307 | deps = MICROKERNEL_TEST_DEPS, |
| 8308 | ) |
| 8309 | |
| 8310 | xnnpack_unit_test( |
| 8311 | name = "f16_vhswish_test", |
| 8312 | srcs = [ |
| 8313 | "test/f16-vhswish.cc", |
| Marat Dukhan | a6c0516 | 2021-05-13 16:52:02 -0700 | [diff] [blame] | 8314 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 8315 | ] + MICROKERNEL_TEST_HDRS, |
| 8316 | deps = MICROKERNEL_TEST_DEPS, |
| 8317 | ) |
| 8318 | |
| 8319 | xnnpack_unit_test( |
| 8320 | name = "f16_vmax_test", |
| 8321 | srcs = [ |
| 8322 | "test/f16-vmax.cc", |
| 8323 | "test/vbinary-microkernel-tester.h", |
| 8324 | ] + MICROKERNEL_TEST_HDRS, |
| 8325 | deps = MICROKERNEL_TEST_DEPS, |
| 8326 | ) |
| 8327 | |
| 8328 | xnnpack_unit_test( |
| 8329 | name = "f16_vmaxc_test", |
| 8330 | srcs = [ |
| 8331 | "test/f16-vmaxc.cc", |
| 8332 | "test/vbinaryc-microkernel-tester.h", |
| 8333 | ] + MICROKERNEL_TEST_HDRS, |
| 8334 | deps = MICROKERNEL_TEST_DEPS, |
| 8335 | ) |
| 8336 | |
| 8337 | xnnpack_unit_test( |
| 8338 | name = "f16_vmin_test", |
| 8339 | srcs = [ |
| 8340 | "test/f16-vmin.cc", |
| 8341 | "test/vbinary-microkernel-tester.h", |
| 8342 | ] + MICROKERNEL_TEST_HDRS, |
| 8343 | deps = MICROKERNEL_TEST_DEPS, |
| 8344 | ) |
| 8345 | |
| 8346 | xnnpack_unit_test( |
| 8347 | name = "f16_vminc_test", |
| 8348 | srcs = [ |
| 8349 | "test/f16-vminc.cc", |
| 8350 | "test/vbinaryc-microkernel-tester.h", |
| 8351 | ] + MICROKERNEL_TEST_HDRS, |
| 8352 | deps = MICROKERNEL_TEST_DEPS, |
| 8353 | ) |
| 8354 | |
| 8355 | xnnpack_unit_test( |
| 8356 | name = "f16_vmul_minmax_test", |
| 8357 | srcs = [ |
| 8358 | "test/f16-vmul-minmax.cc", |
| 8359 | "test/vbinary-microkernel-tester.h", |
| 8360 | ] + MICROKERNEL_TEST_HDRS, |
| 8361 | deps = MICROKERNEL_TEST_DEPS, |
| 8362 | ) |
| 8363 | |
| 8364 | xnnpack_unit_test( |
| 8365 | name = "f16_vmulc_minmax_test", |
| 8366 | srcs = [ |
| 8367 | "test/f16-vmulc-minmax.cc", |
| 8368 | "test/vbinaryc-microkernel-tester.h", |
| 8369 | ] + MICROKERNEL_TEST_HDRS, |
| 8370 | deps = MICROKERNEL_TEST_DEPS, |
| 8371 | ) |
| 8372 | |
| 8373 | xnnpack_unit_test( |
| 8374 | name = "f16_vmulcaddc_minmax_test", |
| 8375 | srcs = [ |
| 8376 | "test/f16-vmulcaddc-minmax.cc", |
| 8377 | "test/vmulcaddc-microkernel-tester.h", |
| 8378 | "src/xnnpack/AlignedAllocator.h", |
| 8379 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 8380 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 8381 | ) |
| 8382 | |
| 8383 | xnnpack_unit_test( |
| 8384 | name = "f16_vsub_minmax_test", |
| 8385 | srcs = [ |
| 8386 | "test/f16-vsub-minmax.cc", |
| 8387 | "test/vbinary-microkernel-tester.h", |
| 8388 | ] + MICROKERNEL_TEST_HDRS, |
| 8389 | deps = MICROKERNEL_TEST_DEPS, |
| 8390 | ) |
| 8391 | |
| 8392 | xnnpack_unit_test( |
| 8393 | name = "f16_vsubc_minmax_test", |
| 8394 | srcs = [ |
| 8395 | "test/f16-vsubc-minmax.cc", |
| 8396 | "test/vbinaryc-microkernel-tester.h", |
| 8397 | ] + MICROKERNEL_TEST_HDRS, |
| 8398 | deps = MICROKERNEL_TEST_DEPS, |
| 8399 | ) |
| 8400 | |
| 8401 | xnnpack_unit_test( |
| 8402 | name = "f16_vrsubc_minmax_test", |
| 8403 | srcs = [ |
| 8404 | "test/f16-vrsubc-minmax.cc", |
| 8405 | "test/vbinaryc-microkernel-tester.h", |
| 8406 | ] + MICROKERNEL_TEST_HDRS, |
| 8407 | deps = MICROKERNEL_TEST_DEPS, |
| 8408 | ) |
| 8409 | |
| 8410 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8411 | name = "f32_argmaxpool_test", |
| 8412 | srcs = [ |
| 8413 | "test/f32-argmaxpool.cc", |
| 8414 | "test/argmaxpool-microkernel-tester.h", |
| 8415 | "src/xnnpack/AlignedAllocator.h", |
| 8416 | ] + MICROKERNEL_TEST_HDRS, |
| 8417 | deps = MICROKERNEL_TEST_DEPS, |
| 8418 | ) |
| 8419 | |
| 8420 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 8421 | name = "f32_avgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8422 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 8423 | "test/f32-avgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8424 | "test/avgpool-microkernel-tester.h", |
| 8425 | "src/xnnpack/AlignedAllocator.h", |
| 8426 | ] + MICROKERNEL_TEST_HDRS, |
| 8427 | deps = MICROKERNEL_TEST_DEPS, |
| 8428 | ) |
| 8429 | |
| 8430 | xnnpack_unit_test( |
| Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 8431 | name = "f32_ibilinear_test", |
| Marat Dukhan | 35dacfb | 2019-11-07 19:18:16 -0800 | [diff] [blame] | 8432 | srcs = [ |
| Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 8433 | "test/f32-ibilinear.cc", |
| 8434 | "test/ibilinear-microkernel-tester.h", |
| Marat Dukhan | 35dacfb | 2019-11-07 19:18:16 -0800 | [diff] [blame] | 8435 | "src/xnnpack/AlignedAllocator.h", |
| 8436 | ] + MICROKERNEL_TEST_HDRS, |
| 8437 | deps = MICROKERNEL_TEST_DEPS, |
| 8438 | ) |
| 8439 | |
| 8440 | xnnpack_unit_test( |
| XNNPACK Team | 2143267 | 2020-10-19 19:58:48 -0700 | [diff] [blame] | 8441 | name = "f32_ibilinear_chw_test", |
| 8442 | srcs = [ |
| 8443 | "test/f32-ibilinear-chw.cc", |
| XNNPACK Team | 6be46b2 | 2020-10-22 23:34:54 -0700 | [diff] [blame] | 8444 | "test/ibilinear-microkernel-tester.h", |
| XNNPACK Team | 2143267 | 2020-10-19 19:58:48 -0700 | [diff] [blame] | 8445 | "src/xnnpack/AlignedAllocator.h", |
| 8446 | ] + MICROKERNEL_TEST_HDRS, |
| 8447 | deps = MICROKERNEL_TEST_DEPS, |
| 8448 | ) |
| 8449 | |
| 8450 | xnnpack_unit_test( |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 8451 | name = "f32_igemm_test", |
| 8452 | srcs = [ |
| 8453 | "test/f32-igemm.cc", |
| 8454 | "test/gemm-microkernel-tester.h", |
| 8455 | "src/xnnpack/AlignedAllocator.h", |
| 8456 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8457 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 8458 | ) |
| 8459 | |
| 8460 | xnnpack_unit_test( |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 8461 | name = "f32_igemm_relu_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8462 | srcs = [ |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 8463 | "test/f32-igemm-relu.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8464 | "test/gemm-microkernel-tester.h", |
| 8465 | "src/xnnpack/AlignedAllocator.h", |
| 8466 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8467 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8468 | ) |
| 8469 | |
| 8470 | xnnpack_unit_test( |
| Marat Dukhan | e207b7b | 2020-05-28 16:27:42 -0700 | [diff] [blame] | 8471 | name = "f32_igemm_minmax_test", |
| 8472 | srcs = [ |
| 8473 | "test/f32-igemm-minmax.cc", |
| 8474 | "test/gemm-microkernel-tester.h", |
| 8475 | "src/xnnpack/AlignedAllocator.h", |
| 8476 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8477 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | e207b7b | 2020-05-28 16:27:42 -0700 | [diff] [blame] | 8478 | ) |
| 8479 | |
| 8480 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8481 | name = "f32_conv_hwc_test", |
| 8482 | srcs = [ |
| 8483 | "test/f32-conv-hwc.cc", |
| 8484 | "test/conv-hwc-microkernel-tester.h", |
| 8485 | "src/xnnpack/AlignedAllocator.h", |
| 8486 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8487 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8488 | ) |
| 8489 | |
| 8490 | xnnpack_unit_test( |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 8491 | name = "f32_conv_hwc2chw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8492 | srcs = [ |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 8493 | "test/f32-conv-hwc2chw.cc", |
| 8494 | "test/conv-hwc2chw-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8495 | "src/xnnpack/AlignedAllocator.h", |
| 8496 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8497 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8498 | ) |
| 8499 | |
| 8500 | xnnpack_unit_test( |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 8501 | name = "f32_dwconv_test", |
| 8502 | srcs = [ |
| 8503 | "test/f32-dwconv.cc", |
| 8504 | "test/dwconv-microkernel-tester.h", |
| 8505 | "src/xnnpack/AlignedAllocator.h", |
| 8506 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8507 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 8508 | ) |
| 8509 | |
| 8510 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 8511 | name = "f32_dwconv_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8512 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 8513 | "test/f32-dwconv-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8514 | "test/dwconv-microkernel-tester.h", |
| 8515 | "src/xnnpack/AlignedAllocator.h", |
| 8516 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8517 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8518 | ) |
| 8519 | |
| 8520 | xnnpack_unit_test( |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 8521 | name = "f32_dwconv2d_chw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8522 | srcs = [ |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 8523 | "test/f32-dwconv2d-chw.cc", |
| 8524 | "test/dwconv2d-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8525 | "src/xnnpack/AlignedAllocator.h", |
| 8526 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8527 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8528 | ) |
| 8529 | |
| 8530 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 8531 | name = "f32_gavgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8532 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 8533 | "test/f32-gavgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8534 | "test/gavgpool-microkernel-tester.h", |
| 8535 | "src/xnnpack/AlignedAllocator.h", |
| 8536 | ] + MICROKERNEL_TEST_HDRS, |
| 8537 | deps = MICROKERNEL_TEST_DEPS, |
| 8538 | ) |
| 8539 | |
| 8540 | xnnpack_unit_test( |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 8541 | name = "f32_gavgpool_cw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8542 | srcs = [ |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 8543 | "test/f32-gavgpool-cw.cc", |
| 8544 | "test/gavgpool-cw-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8545 | "src/xnnpack/AlignedAllocator.h", |
| 8546 | ] + MICROKERNEL_TEST_HDRS, |
| 8547 | deps = MICROKERNEL_TEST_DEPS, |
| 8548 | ) |
| 8549 | |
| 8550 | xnnpack_unit_test( |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 8551 | name = "f32_gemm_test", |
| 8552 | srcs = [ |
| 8553 | "test/f32-gemm.cc", |
| 8554 | "test/gemm-microkernel-tester.h", |
| 8555 | "src/xnnpack/AlignedAllocator.h", |
| 8556 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8557 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 8558 | ) |
| 8559 | |
| 8560 | xnnpack_unit_test( |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 8561 | name = "f32_gemm_relu_test", |
| 8562 | srcs = [ |
| 8563 | "test/f32-gemm-relu.cc", |
| 8564 | "test/gemm-microkernel-tester.h", |
| 8565 | "src/xnnpack/AlignedAllocator.h", |
| 8566 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8567 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 8568 | ) |
| 8569 | |
| 8570 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 8571 | name = "f32_gemm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8572 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 8573 | "test/f32-gemm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8574 | "test/gemm-microkernel-tester.h", |
| 8575 | "src/xnnpack/AlignedAllocator.h", |
| 8576 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8577 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8578 | ) |
| 8579 | |
| 8580 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 8581 | name = "f32_gemminc_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8582 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 8583 | "test/f32-gemminc-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8584 | "test/gemm-microkernel-tester.h", |
| 8585 | "src/xnnpack/AlignedAllocator.h", |
| 8586 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8587 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8588 | ) |
| 8589 | |
| 8590 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 8591 | name = "f32_vhswish_test", |
| Frank Barchard | b196659 | 2020-05-12 13:47:06 -0700 | [diff] [blame] | 8592 | srcs = [ |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 8593 | "test/f32-vhswish.cc", |
| Marat Dukhan | 949b6e7 | 2021-05-13 11:21:06 -0700 | [diff] [blame] | 8594 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8595 | ] + MICROKERNEL_TEST_HDRS, |
| 8596 | deps = MICROKERNEL_TEST_DEPS, |
| 8597 | ) |
| 8598 | |
| 8599 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 8600 | name = "f32_maxpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8601 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 8602 | "test/f32-maxpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8603 | "test/maxpool-microkernel-tester.h", |
| 8604 | ] + MICROKERNEL_TEST_HDRS, |
| 8605 | deps = MICROKERNEL_TEST_DEPS, |
| 8606 | ) |
| 8607 | |
| 8608 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 8609 | name = "f32_pavgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8610 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 8611 | "test/f32-pavgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8612 | "test/avgpool-microkernel-tester.h", |
| 8613 | "src/xnnpack/AlignedAllocator.h", |
| 8614 | ] + MICROKERNEL_TEST_HDRS, |
| 8615 | deps = MICROKERNEL_TEST_DEPS, |
| 8616 | ) |
| 8617 | |
| 8618 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 8619 | name = "f32_ppmm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8620 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 8621 | "test/f32-ppmm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8622 | "test/gemm-microkernel-tester.h", |
| 8623 | "src/xnnpack/AlignedAllocator.h", |
| 8624 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8625 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8626 | ) |
| 8627 | |
| 8628 | xnnpack_unit_test( |
| Frank Barchard | b196659 | 2020-05-12 13:47:06 -0700 | [diff] [blame] | 8629 | name = "f16_prelu_test", |
| 8630 | srcs = [ |
| 8631 | "test/f16-prelu.cc", |
| 8632 | "test/prelu-microkernel-tester.h", |
| 8633 | "src/xnnpack/AlignedAllocator.h", |
| 8634 | ] + MICROKERNEL_TEST_HDRS, |
| 8635 | deps = MICROKERNEL_TEST_DEPS, |
| 8636 | ) |
| 8637 | |
| 8638 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8639 | name = "f32_prelu_test", |
| 8640 | srcs = [ |
| 8641 | "test/f32-prelu.cc", |
| 8642 | "test/prelu-microkernel-tester.h", |
| 8643 | "src/xnnpack/AlignedAllocator.h", |
| 8644 | ] + MICROKERNEL_TEST_HDRS, |
| 8645 | deps = MICROKERNEL_TEST_DEPS, |
| 8646 | ) |
| 8647 | |
| 8648 | xnnpack_unit_test( |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 8649 | name = "f32_raddexpminusmax_test", |
| 8650 | srcs = [ |
| 8651 | "test/f32-raddexpminusmax.cc", |
| 8652 | "test/raddexpminusmax-microkernel-tester.h", |
| 8653 | ] + MICROKERNEL_TEST_HDRS, |
| 8654 | deps = MICROKERNEL_TEST_DEPS, |
| 8655 | ) |
| 8656 | |
| 8657 | xnnpack_unit_test( |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 8658 | name = "f32_raddextexp_test", |
| 8659 | srcs = [ |
| 8660 | "test/f32-raddextexp.cc", |
| 8661 | "test/raddextexp-microkernel-tester.h", |
| 8662 | ] + MICROKERNEL_TEST_HDRS, |
| 8663 | deps = MICROKERNEL_TEST_DEPS, |
| 8664 | ) |
| 8665 | |
| 8666 | xnnpack_unit_test( |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 8667 | name = "f32_raddstoreexpminusmax_test", |
| 8668 | srcs = [ |
| 8669 | "test/f32-raddstoreexpminusmax.cc", |
| 8670 | "test/raddstoreexpminusmax-microkernel-tester.h", |
| 8671 | ] + MICROKERNEL_TEST_HDRS, |
| 8672 | deps = MICROKERNEL_TEST_DEPS, |
| 8673 | ) |
| 8674 | |
| 8675 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8676 | name = "f32_rmax_test", |
| 8677 | srcs = [ |
| 8678 | "test/f32-rmax.cc", |
| 8679 | "test/rmax-microkernel-tester.h", |
| 8680 | ] + MICROKERNEL_TEST_HDRS, |
| 8681 | deps = MICROKERNEL_TEST_DEPS, |
| 8682 | ) |
| 8683 | |
| 8684 | xnnpack_unit_test( |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 8685 | name = "f32_spmm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8686 | srcs = [ |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 8687 | "test/f32-spmm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8688 | "test/spmm-microkernel-tester.h", |
| 8689 | "src/xnnpack/AlignedAllocator.h", |
| 8690 | ] + MICROKERNEL_TEST_HDRS, |
| 8691 | deps = MICROKERNEL_TEST_DEPS, |
| 8692 | ) |
| 8693 | |
| 8694 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 8695 | name = "f32_vabs_test", |
| 8696 | srcs = [ |
| 8697 | "test/f32-vabs.cc", |
| 8698 | "test/vunary-microkernel-tester.h", |
| 8699 | ] + MICROKERNEL_TEST_HDRS, |
| 8700 | deps = MICROKERNEL_TEST_DEPS, |
| 8701 | ) |
| 8702 | |
| 8703 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 8704 | name = "f32_vadd_test", |
| 8705 | srcs = [ |
| 8706 | "test/f32-vadd.cc", |
| 8707 | "test/vbinary-microkernel-tester.h", |
| 8708 | ] + MICROKERNEL_TEST_HDRS, |
| 8709 | deps = MICROKERNEL_TEST_DEPS, |
| 8710 | ) |
| 8711 | |
| 8712 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8713 | name = "f32_vadd_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8714 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8715 | "test/f32-vadd-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 8716 | "test/vbinary-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 8717 | ] + MICROKERNEL_TEST_HDRS, |
| 8718 | deps = MICROKERNEL_TEST_DEPS, |
| 8719 | ) |
| 8720 | |
| 8721 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 8722 | name = "f32_vadd_relu_test", |
| 8723 | srcs = [ |
| 8724 | "test/f32-vadd-relu.cc", |
| 8725 | "test/vbinary-microkernel-tester.h", |
| 8726 | ] + MICROKERNEL_TEST_HDRS, |
| 8727 | deps = MICROKERNEL_TEST_DEPS, |
| 8728 | ) |
| 8729 | |
| 8730 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 8731 | name = "f32_vaddc_test", |
| 8732 | srcs = [ |
| 8733 | "test/f32-vaddc.cc", |
| 8734 | "test/vbinaryc-microkernel-tester.h", |
| 8735 | ] + MICROKERNEL_TEST_HDRS, |
| 8736 | deps = MICROKERNEL_TEST_DEPS, |
| 8737 | ) |
| 8738 | |
| 8739 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8740 | name = "f32_vaddc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 8741 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8742 | "test/f32-vaddc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 8743 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8744 | ] + MICROKERNEL_TEST_HDRS, |
| 8745 | deps = MICROKERNEL_TEST_DEPS, |
| 8746 | ) |
| 8747 | |
| 8748 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 8749 | name = "f32_vaddc_relu_test", |
| 8750 | srcs = [ |
| 8751 | "test/f32-vaddc-relu.cc", |
| 8752 | "test/vbinaryc-microkernel-tester.h", |
| 8753 | ] + MICROKERNEL_TEST_HDRS, |
| 8754 | deps = MICROKERNEL_TEST_DEPS, |
| 8755 | ) |
| 8756 | |
| 8757 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 8758 | name = "f32_vclamp_test", |
| 8759 | srcs = [ |
| 8760 | "test/f32-vclamp.cc", |
| Marat Dukhan | 60d3f24 | 2021-05-13 11:59:02 -0700 | [diff] [blame] | 8761 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 8762 | ] + MICROKERNEL_TEST_HDRS, |
| 8763 | deps = MICROKERNEL_TEST_DEPS, |
| 8764 | ) |
| 8765 | |
| 8766 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 8767 | name = "f32_vdiv_test", |
| 8768 | srcs = [ |
| 8769 | "test/f32-vdiv.cc", |
| 8770 | "test/vbinary-microkernel-tester.h", |
| 8771 | ] + MICROKERNEL_TEST_HDRS, |
| 8772 | deps = MICROKERNEL_TEST_DEPS, |
| 8773 | ) |
| 8774 | |
| 8775 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8776 | name = "f32_vdiv_minmax_test", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 8777 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8778 | "test/f32-vdiv-minmax.cc", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 8779 | "test/vbinary-microkernel-tester.h", |
| 8780 | ] + MICROKERNEL_TEST_HDRS, |
| 8781 | deps = MICROKERNEL_TEST_DEPS, |
| 8782 | ) |
| 8783 | |
| 8784 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 8785 | name = "f32_vdiv_relu_test", |
| 8786 | srcs = [ |
| 8787 | "test/f32-vdiv-relu.cc", |
| 8788 | "test/vbinary-microkernel-tester.h", |
| 8789 | ] + MICROKERNEL_TEST_HDRS, |
| 8790 | deps = MICROKERNEL_TEST_DEPS, |
| 8791 | ) |
| 8792 | |
| 8793 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 8794 | name = "f32_vdivc_test", |
| 8795 | srcs = [ |
| 8796 | "test/f32-vdivc.cc", |
| 8797 | "test/vbinaryc-microkernel-tester.h", |
| 8798 | ] + MICROKERNEL_TEST_HDRS, |
| 8799 | deps = MICROKERNEL_TEST_DEPS, |
| 8800 | ) |
| 8801 | |
| 8802 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8803 | name = "f32_vdivc_minmax_test", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 8804 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8805 | "test/f32-vdivc-minmax.cc", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 8806 | "test/vbinaryc-microkernel-tester.h", |
| 8807 | ] + MICROKERNEL_TEST_HDRS, |
| 8808 | deps = MICROKERNEL_TEST_DEPS, |
| 8809 | ) |
| 8810 | |
| 8811 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 8812 | name = "f32_vdivc_relu_test", |
| 8813 | srcs = [ |
| 8814 | "test/f32-vdivc-relu.cc", |
| 8815 | "test/vbinaryc-microkernel-tester.h", |
| 8816 | ] + MICROKERNEL_TEST_HDRS, |
| 8817 | deps = MICROKERNEL_TEST_DEPS, |
| 8818 | ) |
| 8819 | |
| 8820 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 8821 | name = "f32_vrdivc_test", |
| 8822 | srcs = [ |
| 8823 | "test/f32-vrdivc.cc", |
| 8824 | "test/vbinaryc-microkernel-tester.h", |
| 8825 | ] + MICROKERNEL_TEST_HDRS, |
| 8826 | deps = MICROKERNEL_TEST_DEPS, |
| 8827 | ) |
| 8828 | |
| 8829 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8830 | name = "f32_vrdivc_minmax_test", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 8831 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8832 | "test/f32-vrdivc-minmax.cc", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 8833 | "test/vbinaryc-microkernel-tester.h", |
| 8834 | ] + MICROKERNEL_TEST_HDRS, |
| 8835 | deps = MICROKERNEL_TEST_DEPS, |
| 8836 | ) |
| 8837 | |
| 8838 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 8839 | name = "f32_vrdivc_relu_test", |
| 8840 | srcs = [ |
| 8841 | "test/f32-vrdivc-relu.cc", |
| 8842 | "test/vbinaryc-microkernel-tester.h", |
| 8843 | ] + MICROKERNEL_TEST_HDRS, |
| 8844 | deps = MICROKERNEL_TEST_DEPS, |
| 8845 | ) |
| 8846 | |
| 8847 | xnnpack_unit_test( |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8848 | name = "f32_velu_test", |
| 8849 | srcs = [ |
| 8850 | "test/f32-velu.cc", |
| 8851 | "test/vunary-microkernel-tester.h", |
| 8852 | ] + MICROKERNEL_TEST_HDRS, |
| 8853 | deps = MICROKERNEL_TEST_DEPS, |
| 8854 | ) |
| 8855 | |
| 8856 | xnnpack_unit_test( |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 8857 | name = "f32_vmax_test", |
| 8858 | srcs = [ |
| 8859 | "test/f32-vmax.cc", |
| 8860 | "test/vbinary-microkernel-tester.h", |
| 8861 | ] + MICROKERNEL_TEST_HDRS, |
| 8862 | deps = MICROKERNEL_TEST_DEPS, |
| 8863 | ) |
| 8864 | |
| 8865 | xnnpack_unit_test( |
| 8866 | name = "f32_vmaxc_test", |
| 8867 | srcs = [ |
| 8868 | "test/f32-vmaxc.cc", |
| 8869 | "test/vbinaryc-microkernel-tester.h", |
| 8870 | ] + MICROKERNEL_TEST_HDRS, |
| 8871 | deps = MICROKERNEL_TEST_DEPS, |
| 8872 | ) |
| 8873 | |
| 8874 | xnnpack_unit_test( |
| 8875 | name = "f32_vmin_test", |
| 8876 | srcs = [ |
| 8877 | "test/f32-vmin.cc", |
| 8878 | "test/vbinary-microkernel-tester.h", |
| 8879 | ] + MICROKERNEL_TEST_HDRS, |
| 8880 | deps = MICROKERNEL_TEST_DEPS, |
| 8881 | ) |
| 8882 | |
| 8883 | xnnpack_unit_test( |
| 8884 | name = "f32_vminc_test", |
| 8885 | srcs = [ |
| 8886 | "test/f32-vminc.cc", |
| 8887 | "test/vbinaryc-microkernel-tester.h", |
| 8888 | ] + MICROKERNEL_TEST_HDRS, |
| 8889 | deps = MICROKERNEL_TEST_DEPS, |
| 8890 | ) |
| 8891 | |
| 8892 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 8893 | name = "f32_vmul_test", |
| 8894 | srcs = [ |
| 8895 | "test/f32-vmul.cc", |
| 8896 | "test/vbinary-microkernel-tester.h", |
| 8897 | ] + MICROKERNEL_TEST_HDRS, |
| 8898 | deps = MICROKERNEL_TEST_DEPS, |
| 8899 | ) |
| 8900 | |
| 8901 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8902 | name = "f32_vmul_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8903 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8904 | "test/f32-vmul-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 8905 | "test/vbinary-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 8906 | ] + MICROKERNEL_TEST_HDRS, |
| 8907 | deps = MICROKERNEL_TEST_DEPS, |
| 8908 | ) |
| 8909 | |
| 8910 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 8911 | name = "f32_vmul_relu_test", |
| 8912 | srcs = [ |
| 8913 | "test/f32-vmul-relu.cc", |
| 8914 | "test/vbinary-microkernel-tester.h", |
| 8915 | ] + MICROKERNEL_TEST_HDRS, |
| 8916 | deps = MICROKERNEL_TEST_DEPS, |
| 8917 | ) |
| 8918 | |
| 8919 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 8920 | name = "f32_vmulc_test", |
| 8921 | srcs = [ |
| 8922 | "test/f32-vmulc.cc", |
| 8923 | "test/vbinaryc-microkernel-tester.h", |
| 8924 | ] + MICROKERNEL_TEST_HDRS, |
| 8925 | deps = MICROKERNEL_TEST_DEPS, |
| 8926 | ) |
| 8927 | |
| 8928 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8929 | name = "f32_vmulc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 8930 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 8931 | "test/f32-vmulc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 8932 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8933 | ] + MICROKERNEL_TEST_HDRS, |
| 8934 | deps = MICROKERNEL_TEST_DEPS, |
| 8935 | ) |
| 8936 | |
| 8937 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 8938 | name = "f32_vmulc_relu_test", |
| 8939 | srcs = [ |
| 8940 | "test/f32-vmulc-relu.cc", |
| 8941 | "test/vbinaryc-microkernel-tester.h", |
| 8942 | ] + MICROKERNEL_TEST_HDRS, |
| 8943 | deps = MICROKERNEL_TEST_DEPS, |
| 8944 | ) |
| 8945 | |
| 8946 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 8947 | name = "f32_vmulcaddc_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8948 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 8949 | "test/f32-vmulcaddc-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8950 | "test/vmulcaddc-microkernel-tester.h", |
| 8951 | "src/xnnpack/AlignedAllocator.h", |
| 8952 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8953 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8954 | ) |
| 8955 | |
| 8956 | xnnpack_unit_test( |
| Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 8957 | name = "f32_vlrelu_test", |
| 8958 | srcs = [ |
| 8959 | "test/f32-vlrelu.cc", |
| 8960 | "test/vunary-microkernel-tester.h", |
| 8961 | ] + MICROKERNEL_TEST_HDRS, |
| 8962 | deps = MICROKERNEL_TEST_DEPS, |
| 8963 | ) |
| 8964 | |
| 8965 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 8966 | name = "f32_vneg_test", |
| 8967 | srcs = [ |
| 8968 | "test/f32-vneg.cc", |
| 8969 | "test/vunary-microkernel-tester.h", |
| 8970 | ] + MICROKERNEL_TEST_HDRS, |
| 8971 | deps = MICROKERNEL_TEST_DEPS, |
| 8972 | ) |
| 8973 | |
| 8974 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 8975 | name = "f32_vrelu_test", |
| 8976 | srcs = [ |
| 8977 | "test/f32-vrelu.cc", |
| 8978 | "test/vunary-microkernel-tester.h", |
| 8979 | ] + MICROKERNEL_TEST_HDRS, |
| 8980 | deps = MICROKERNEL_TEST_DEPS, |
| 8981 | ) |
| 8982 | |
| 8983 | xnnpack_unit_test( |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 8984 | name = "f32_vrndne_test", |
| 8985 | srcs = [ |
| 8986 | "test/f32-vrndne.cc", |
| 8987 | "test/vunary-microkernel-tester.h", |
| 8988 | ] + MICROKERNEL_TEST_HDRS, |
| 8989 | deps = MICROKERNEL_TEST_DEPS, |
| 8990 | ) |
| 8991 | |
| 8992 | xnnpack_unit_test( |
| 8993 | name = "f32_vrndz_test", |
| 8994 | srcs = [ |
| 8995 | "test/f32-vrndz.cc", |
| 8996 | "test/vunary-microkernel-tester.h", |
| 8997 | ] + MICROKERNEL_TEST_HDRS, |
| 8998 | deps = MICROKERNEL_TEST_DEPS, |
| 8999 | ) |
| 9000 | |
| 9001 | xnnpack_unit_test( |
| 9002 | name = "f32_vrndu_test", |
| 9003 | srcs = [ |
| 9004 | "test/f32-vrndu.cc", |
| 9005 | "test/vunary-microkernel-tester.h", |
| 9006 | ] + MICROKERNEL_TEST_HDRS, |
| 9007 | deps = MICROKERNEL_TEST_DEPS, |
| 9008 | ) |
| 9009 | |
| 9010 | xnnpack_unit_test( |
| 9011 | name = "f32_vrndd_test", |
| 9012 | srcs = [ |
| 9013 | "test/f32-vrndd.cc", |
| 9014 | "test/vunary-microkernel-tester.h", |
| 9015 | ] + MICROKERNEL_TEST_HDRS, |
| 9016 | deps = MICROKERNEL_TEST_DEPS, |
| 9017 | ) |
| 9018 | |
| 9019 | xnnpack_unit_test( |
| Marat Dukhan | 05ac8e3 | 2019-10-21 15:39:33 -0700 | [diff] [blame] | 9020 | name = "f32_vscale_test", |
| 9021 | srcs = [ |
| 9022 | "test/f32-vscale.cc", |
| 9023 | "test/vscale-microkernel-tester.h", |
| 9024 | ] + MICROKERNEL_TEST_HDRS, |
| 9025 | deps = MICROKERNEL_TEST_DEPS, |
| 9026 | ) |
| 9027 | |
| 9028 | xnnpack_unit_test( |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 9029 | name = "f32_vscaleexpminusmax_test", |
| 9030 | srcs = [ |
| 9031 | "test/f32-vscaleexpminusmax.cc", |
| 9032 | "test/vscaleexpminusmax-microkernel-tester.h", |
| 9033 | ] + MICROKERNEL_TEST_HDRS, |
| 9034 | deps = MICROKERNEL_TEST_DEPS, |
| 9035 | ) |
| 9036 | |
| 9037 | xnnpack_unit_test( |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 9038 | name = "f32_vscaleextexp_test", |
| 9039 | srcs = [ |
| 9040 | "test/f32-vscaleextexp.cc", |
| 9041 | "test/vscaleextexp-microkernel-tester.h", |
| 9042 | ] + MICROKERNEL_TEST_HDRS, |
| 9043 | deps = MICROKERNEL_TEST_DEPS, |
| 9044 | ) |
| 9045 | |
| 9046 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 9047 | name = "f32_vsigmoid_test", |
| 9048 | srcs = [ |
| 9049 | "test/f32-vsigmoid.cc", |
| 9050 | "test/vunary-microkernel-tester.h", |
| 9051 | ] + MICROKERNEL_TEST_HDRS, |
| 9052 | deps = MICROKERNEL_TEST_DEPS, |
| 9053 | ) |
| 9054 | |
| 9055 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 9056 | name = "f32_vsqr_test", |
| 9057 | srcs = [ |
| 9058 | "test/f32-vsqr.cc", |
| 9059 | "test/vunary-microkernel-tester.h", |
| 9060 | ] + MICROKERNEL_TEST_HDRS, |
| 9061 | deps = MICROKERNEL_TEST_DEPS, |
| 9062 | ) |
| 9063 | |
| 9064 | xnnpack_unit_test( |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 9065 | name = "f32_vsqrdiff_test", |
| 9066 | srcs = [ |
| 9067 | "test/f32-vsqrdiff.cc", |
| 9068 | "test/vbinary-microkernel-tester.h", |
| 9069 | ] + MICROKERNEL_TEST_HDRS, |
| 9070 | deps = MICROKERNEL_TEST_DEPS, |
| 9071 | ) |
| 9072 | |
| 9073 | xnnpack_unit_test( |
| 9074 | name = "f32_vsqrdiffc_test", |
| 9075 | srcs = [ |
| 9076 | "test/f32-vsqrdiffc.cc", |
| 9077 | "test/vbinaryc-microkernel-tester.h", |
| 9078 | ] + MICROKERNEL_TEST_HDRS, |
| 9079 | deps = MICROKERNEL_TEST_DEPS, |
| 9080 | ) |
| 9081 | |
| 9082 | xnnpack_unit_test( |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 9083 | name = "f32_vsqrt_test", |
| 9084 | srcs = [ |
| 9085 | "test/f32-vsqrt.cc", |
| 9086 | "test/vunary-microkernel-tester.h", |
| 9087 | ] + MICROKERNEL_TEST_HDRS, |
| 9088 | deps = MICROKERNEL_TEST_DEPS, |
| 9089 | ) |
| 9090 | |
| 9091 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 9092 | name = "f32_vsub_test", |
| 9093 | srcs = [ |
| 9094 | "test/f32-vsub.cc", |
| 9095 | "test/vbinary-microkernel-tester.h", |
| 9096 | ] + MICROKERNEL_TEST_HDRS, |
| 9097 | deps = MICROKERNEL_TEST_DEPS, |
| 9098 | ) |
| 9099 | |
| 9100 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 9101 | name = "f32_vsub_minmax_test", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 9102 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 9103 | "test/f32-vsub-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 9104 | "test/vbinary-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 9105 | ] + MICROKERNEL_TEST_HDRS, |
| 9106 | deps = MICROKERNEL_TEST_DEPS, |
| 9107 | ) |
| 9108 | |
| 9109 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 9110 | name = "f32_vsub_relu_test", |
| 9111 | srcs = [ |
| 9112 | "test/f32-vsub-relu.cc", |
| 9113 | "test/vbinary-microkernel-tester.h", |
| 9114 | ] + MICROKERNEL_TEST_HDRS, |
| 9115 | deps = MICROKERNEL_TEST_DEPS, |
| 9116 | ) |
| 9117 | |
| 9118 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 9119 | name = "f32_vsubc_test", |
| 9120 | srcs = [ |
| 9121 | "test/f32-vsubc.cc", |
| 9122 | "test/vbinaryc-microkernel-tester.h", |
| 9123 | ] + MICROKERNEL_TEST_HDRS, |
| 9124 | deps = MICROKERNEL_TEST_DEPS, |
| 9125 | ) |
| 9126 | |
| 9127 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 9128 | name = "f32_vsubc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 9129 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 9130 | "test/f32-vsubc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 9131 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 9132 | ] + MICROKERNEL_TEST_HDRS, |
| 9133 | deps = MICROKERNEL_TEST_DEPS, |
| 9134 | ) |
| 9135 | |
| 9136 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 9137 | name = "f32_vsubc_relu_test", |
| 9138 | srcs = [ |
| 9139 | "test/f32-vsubc-relu.cc", |
| 9140 | "test/vbinaryc-microkernel-tester.h", |
| 9141 | ] + MICROKERNEL_TEST_HDRS, |
| 9142 | deps = MICROKERNEL_TEST_DEPS, |
| 9143 | ) |
| 9144 | |
| 9145 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 9146 | name = "f32_vrsubc_test", |
| 9147 | srcs = [ |
| 9148 | "test/f32-vrsubc.cc", |
| 9149 | "test/vbinaryc-microkernel-tester.h", |
| 9150 | ] + MICROKERNEL_TEST_HDRS, |
| 9151 | deps = MICROKERNEL_TEST_DEPS, |
| 9152 | ) |
| 9153 | |
| 9154 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 9155 | name = "f32_vrsubc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 9156 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 9157 | "test/f32-vrsubc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 9158 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 9159 | ] + MICROKERNEL_TEST_HDRS, |
| 9160 | deps = MICROKERNEL_TEST_DEPS, |
| 9161 | ) |
| 9162 | |
| 9163 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 9164 | name = "f32_vrsubc_relu_test", |
| 9165 | srcs = [ |
| 9166 | "test/f32-vrsubc-relu.cc", |
| 9167 | "test/vbinaryc-microkernel-tester.h", |
| 9168 | ] + MICROKERNEL_TEST_HDRS, |
| 9169 | deps = MICROKERNEL_TEST_DEPS, |
| 9170 | ) |
| 9171 | |
| 9172 | xnnpack_unit_test( |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 9173 | name = "qc8_dwconv_minmax_fp32_test", |
| 9174 | timeout = "moderate", |
| 9175 | srcs = [ |
| 9176 | "test/qc8-dwconv-minmax-fp32.cc", |
| 9177 | "test/dwconv-microkernel-tester.h", |
| 9178 | "src/xnnpack/AlignedAllocator.h", |
| 9179 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9180 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9181 | ) |
| 9182 | |
| 9183 | xnnpack_unit_test( |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 9184 | name = "qc8_gemm_minmax_fp32_test", |
| 9185 | timeout = "moderate", |
| 9186 | srcs = [ |
| 9187 | "test/qc8-gemm-minmax-fp32.cc", |
| 9188 | "test/gemm-microkernel-tester.h", |
| 9189 | "src/xnnpack/AlignedAllocator.h", |
| 9190 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9191 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9192 | ) |
| 9193 | |
| 9194 | xnnpack_unit_test( |
| Marat Dukhan | e06c813 | 2021-06-03 08:59:11 -0700 | [diff] [blame] | 9195 | name = "qc8_igemm_minmax_fp32_test", |
| 9196 | timeout = "moderate", |
| 9197 | srcs = [ |
| 9198 | "test/qc8-igemm-minmax-fp32.cc", |
| 9199 | "test/gemm-microkernel-tester.h", |
| 9200 | "src/xnnpack/AlignedAllocator.h", |
| 9201 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9202 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9203 | ) |
| 9204 | |
| 9205 | xnnpack_unit_test( |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 9206 | name = "qs8_dwconv_minmax_fp32_test", |
| 9207 | srcs = [ |
| 9208 | "test/qs8-dwconv-minmax-fp32.cc", |
| 9209 | "test/dwconv-microkernel-tester.h", |
| 9210 | "src/xnnpack/AlignedAllocator.h", |
| 9211 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9212 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9213 | ) |
| 9214 | |
| 9215 | xnnpack_unit_test( |
| Marat Dukhan | b07c26a | 2021-05-24 19:44:51 -0700 | [diff] [blame] | 9216 | name = "qs8_dwconv_minmax_gemmlowp_test", |
| Marat Dukhan | f62bbdc | 2020-08-04 13:59:04 -0700 | [diff] [blame] | 9217 | srcs = [ |
| Marat Dukhan | b07c26a | 2021-05-24 19:44:51 -0700 | [diff] [blame] | 9218 | "test/qs8-dwconv-minmax-gemmlowp.cc", |
| Marat Dukhan | f62bbdc | 2020-08-04 13:59:04 -0700 | [diff] [blame] | 9219 | "test/dwconv-microkernel-tester.h", |
| 9220 | "src/xnnpack/AlignedAllocator.h", |
| 9221 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9222 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9223 | ) |
| 9224 | |
| 9225 | xnnpack_unit_test( |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 9226 | name = "qs8_dwconv_minmax_rndnu_test", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 9227 | srcs = [ |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 9228 | "test/qs8-dwconv-minmax-rndnu.cc", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 9229 | "test/dwconv-microkernel-tester.h", |
| 9230 | "src/xnnpack/AlignedAllocator.h", |
| 9231 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9232 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9233 | ) |
| 9234 | |
| 9235 | xnnpack_unit_test( |
| Marat Dukhan | 4ed53f4 | 2020-08-06 01:12:55 -0700 | [diff] [blame] | 9236 | name = "qs8_gavgpool_minmax_test", |
| 9237 | srcs = [ |
| 9238 | "test/qs8-gavgpool-minmax.cc", |
| 9239 | "test/gavgpool-microkernel-tester.h", |
| 9240 | "src/xnnpack/AlignedAllocator.h", |
| 9241 | ] + MICROKERNEL_TEST_HDRS, |
| 9242 | deps = MICROKERNEL_TEST_DEPS, |
| 9243 | ) |
| 9244 | |
| 9245 | xnnpack_unit_test( |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 9246 | name = "qs8_gemm_minmax_fp32_test", |
| 9247 | timeout = "moderate", |
| 9248 | srcs = [ |
| 9249 | "test/qs8-gemm-minmax-fp32.cc", |
| 9250 | "test/gemm-microkernel-tester.h", |
| 9251 | "src/xnnpack/AlignedAllocator.h", |
| 9252 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9253 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9254 | ) |
| 9255 | |
| 9256 | xnnpack_unit_test( |
| Marat Dukhan | b07c26a | 2021-05-24 19:44:51 -0700 | [diff] [blame] | 9257 | name = "qs8_gemm_minmax_gemmlowp_test", |
| Marat Dukhan | 56fdb25 | 2021-05-24 13:44:00 -0700 | [diff] [blame] | 9258 | timeout = "moderate", |
| Marat Dukhan | 595e170 | 2020-07-31 10:12:52 -0700 | [diff] [blame] | 9259 | srcs = [ |
| Marat Dukhan | b07c26a | 2021-05-24 19:44:51 -0700 | [diff] [blame] | 9260 | "test/qs8-gemm-minmax-gemmlowp.cc", |
| Marat Dukhan | 595e170 | 2020-07-31 10:12:52 -0700 | [diff] [blame] | 9261 | "test/gemm-microkernel-tester.h", |
| 9262 | "src/xnnpack/AlignedAllocator.h", |
| 9263 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9264 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9265 | ) |
| 9266 | |
| 9267 | xnnpack_unit_test( |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 9268 | name = "qs8_gemm_minmax_rndnu_test", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 9269 | timeout = "moderate", |
| 9270 | srcs = [ |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 9271 | "test/qs8-gemm-minmax-rndnu.cc", |
| 9272 | "test/gemm-microkernel-tester.h", |
| 9273 | "src/xnnpack/AlignedAllocator.h", |
| 9274 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9275 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9276 | ) |
| 9277 | |
| 9278 | xnnpack_unit_test( |
| 9279 | name = "qs8_igemm_minmax_fp32_test", |
| 9280 | timeout = "moderate", |
| 9281 | srcs = [ |
| 9282 | "test/qs8-igemm-minmax-fp32.cc", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 9283 | "test/gemm-microkernel-tester.h", |
| 9284 | "src/xnnpack/AlignedAllocator.h", |
| 9285 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9286 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9287 | ) |
| 9288 | |
| 9289 | xnnpack_unit_test( |
| Marat Dukhan | b07c26a | 2021-05-24 19:44:51 -0700 | [diff] [blame] | 9290 | name = "qs8_igemm_minmax_gemmlowp_test", |
| Marat Dukhan | 56fdb25 | 2021-05-24 13:44:00 -0700 | [diff] [blame] | 9291 | timeout = "moderate", |
| Marat Dukhan | f948068 | 2020-07-31 14:50:24 -0700 | [diff] [blame] | 9292 | srcs = [ |
| Marat Dukhan | b07c26a | 2021-05-24 19:44:51 -0700 | [diff] [blame] | 9293 | "test/qs8-igemm-minmax-gemmlowp.cc", |
| Marat Dukhan | f948068 | 2020-07-31 14:50:24 -0700 | [diff] [blame] | 9294 | "test/gemm-microkernel-tester.h", |
| 9295 | "src/xnnpack/AlignedAllocator.h", |
| 9296 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9297 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9298 | ) |
| 9299 | |
| 9300 | xnnpack_unit_test( |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 9301 | name = "qs8_igemm_minmax_rndnu_test", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 9302 | timeout = "moderate", |
| 9303 | srcs = [ |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 9304 | "test/qs8-igemm-minmax-rndnu.cc", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 9305 | "test/gemm-microkernel-tester.h", |
| 9306 | "src/xnnpack/AlignedAllocator.h", |
| 9307 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9308 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9309 | ) |
| 9310 | |
| 9311 | xnnpack_unit_test( |
| Marat Dukhan | f948068 | 2020-07-31 14:50:24 -0700 | [diff] [blame] | 9312 | name = "qs8_requantization_test", |
| 9313 | srcs = [ |
| 9314 | "src/xnnpack/requantization-stubs.h", |
| 9315 | "test/qs8-requantization.cc", |
| 9316 | "test/requantization-tester.h", |
| 9317 | ] + MICROKERNEL_TEST_HDRS, |
| 9318 | deps = MICROKERNEL_TEST_DEPS, |
| 9319 | ) |
| 9320 | |
| 9321 | xnnpack_unit_test( |
| Marat Dukhan | d9f3ad4 | 2020-08-10 12:30:58 -0700 | [diff] [blame] | 9322 | name = "qs8_vadd_minmax_test", |
| 9323 | srcs = [ |
| 9324 | "test/qs8-vadd-minmax.cc", |
| 9325 | "test/vadd-microkernel-tester.h", |
| 9326 | ] + MICROKERNEL_TEST_HDRS, |
| 9327 | deps = MICROKERNEL_TEST_DEPS, |
| 9328 | ) |
| 9329 | |
| 9330 | xnnpack_unit_test( |
| Marat Dukhan | 0270d9f | 2020-08-11 00:56:46 -0700 | [diff] [blame] | 9331 | name = "qs8_vaddc_minmax_test", |
| 9332 | srcs = [ |
| 9333 | "test/qs8-vaddc-minmax.cc", |
| 9334 | "test/vaddc-microkernel-tester.h", |
| 9335 | ] + MICROKERNEL_TEST_HDRS, |
| 9336 | deps = MICROKERNEL_TEST_DEPS, |
| 9337 | ) |
| 9338 | |
| 9339 | xnnpack_unit_test( |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 9340 | name = "qs8_vmul_minmax_fp32_test", |
| 9341 | srcs = [ |
| 9342 | "test/qs8-vmul-minmax-fp32.cc", |
| 9343 | "test/vmul-microkernel-tester.h", |
| 9344 | ] + MICROKERNEL_TEST_HDRS, |
| 9345 | deps = MICROKERNEL_TEST_DEPS, |
| 9346 | ) |
| 9347 | |
| 9348 | xnnpack_unit_test( |
| 9349 | name = "qs8_vmulc_minmax_fp32_test", |
| 9350 | srcs = [ |
| 9351 | "test/qs8-vmulc-minmax-fp32.cc", |
| 9352 | "test/vmulc-microkernel-tester.h", |
| 9353 | ] + MICROKERNEL_TEST_HDRS, |
| 9354 | deps = MICROKERNEL_TEST_DEPS, |
| 9355 | ) |
| 9356 | |
| 9357 | xnnpack_unit_test( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9358 | name = "qu8_avgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9359 | srcs = [ |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9360 | "test/qu8-avgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9361 | "test/avgpool-microkernel-tester.h", |
| 9362 | "src/xnnpack/AlignedAllocator.h", |
| 9363 | ] + MICROKERNEL_TEST_HDRS, |
| 9364 | deps = MICROKERNEL_TEST_DEPS, |
| 9365 | ) |
| 9366 | |
| 9367 | xnnpack_unit_test( |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 9368 | name = "qu8_dwconv_minmax_fp32_test", |
| 9369 | srcs = [ |
| 9370 | "test/qu8-dwconv-minmax-fp32.cc", |
| 9371 | "test/dwconv-microkernel-tester.h", |
| 9372 | "src/xnnpack/AlignedAllocator.h", |
| 9373 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9374 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9375 | ) |
| 9376 | |
| 9377 | xnnpack_unit_test( |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 9378 | name = "qu8_dwconv_minmax_rndnu_test", |
| 9379 | srcs = [ |
| 9380 | "test/qu8-dwconv-minmax-rndnu.cc", |
| 9381 | "test/dwconv-microkernel-tester.h", |
| 9382 | "src/xnnpack/AlignedAllocator.h", |
| 9383 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9384 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9385 | ) |
| 9386 | |
| 9387 | xnnpack_unit_test( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9388 | name = "qu8_gavgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9389 | srcs = [ |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9390 | "test/qu8-gavgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9391 | "test/gavgpool-microkernel-tester.h", |
| 9392 | "src/xnnpack/AlignedAllocator.h", |
| 9393 | ] + MICROKERNEL_TEST_HDRS, |
| 9394 | deps = MICROKERNEL_TEST_DEPS, |
| 9395 | ) |
| 9396 | |
| 9397 | xnnpack_unit_test( |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 9398 | name = "qu8_gemm_minmax_fp32_test", |
| 9399 | srcs = [ |
| 9400 | "test/qu8-gemm-minmax-fp32.cc", |
| 9401 | "test/gemm-microkernel-tester.h", |
| 9402 | "src/xnnpack/AlignedAllocator.h", |
| 9403 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9404 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9405 | ) |
| 9406 | |
| 9407 | xnnpack_unit_test( |
| Marat Dukhan | c2e8f66 | 2021-07-01 17:06:34 -0700 | [diff] [blame] | 9408 | name = "qu8_gemm_minmax_gemmlowp_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9409 | srcs = [ |
| Marat Dukhan | c2e8f66 | 2021-07-01 17:06:34 -0700 | [diff] [blame] | 9410 | "test/qu8-gemm-minmax-gemmlowp.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9411 | "test/gemm-microkernel-tester.h", |
| 9412 | "src/xnnpack/AlignedAllocator.h", |
| 9413 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9414 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9415 | ) |
| 9416 | |
| 9417 | xnnpack_unit_test( |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 9418 | name = "qu8_gemm_minmax_rndnu_test", |
| 9419 | srcs = [ |
| 9420 | "test/qu8-gemm-minmax-rndnu.cc", |
| 9421 | "test/gemm-microkernel-tester.h", |
| 9422 | "src/xnnpack/AlignedAllocator.h", |
| 9423 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9424 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9425 | ) |
| 9426 | |
| 9427 | xnnpack_unit_test( |
| 9428 | name = "qu8_igemm_minmax_fp32_test", |
| 9429 | srcs = [ |
| 9430 | "test/qu8-igemm-minmax-fp32.cc", |
| 9431 | "test/gemm-microkernel-tester.h", |
| 9432 | "src/xnnpack/AlignedAllocator.h", |
| 9433 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9434 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9435 | ) |
| 9436 | |
| 9437 | xnnpack_unit_test( |
| 9438 | name = "qu8_igemm_minmax_gemmlowp_test", |
| 9439 | srcs = [ |
| 9440 | "test/qu8-igemm-minmax-gemmlowp.cc", |
| 9441 | "test/gemm-microkernel-tester.h", |
| 9442 | "src/xnnpack/AlignedAllocator.h", |
| 9443 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9444 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9445 | ) |
| 9446 | |
| 9447 | xnnpack_unit_test( |
| 9448 | name = "qu8_igemm_minmax_rndnu_test", |
| 9449 | srcs = [ |
| 9450 | "test/qu8-igemm-minmax-rndnu.cc", |
| 9451 | "test/gemm-microkernel-tester.h", |
| 9452 | "src/xnnpack/AlignedAllocator.h", |
| 9453 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 9454 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 9455 | ) |
| 9456 | |
| 9457 | xnnpack_unit_test( |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 9458 | name = "qu8_requantization_test", |
| 9459 | srcs = [ |
| 9460 | "src/xnnpack/requantization-stubs.h", |
| 9461 | "test/qu8-requantization.cc", |
| 9462 | "test/requantization-tester.h", |
| 9463 | ] + MICROKERNEL_TEST_HDRS, |
| 9464 | deps = MICROKERNEL_TEST_DEPS, |
| 9465 | ) |
| 9466 | |
| 9467 | xnnpack_unit_test( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9468 | name = "qu8_vadd_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9469 | srcs = [ |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9470 | "test/qu8-vadd-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9471 | "test/vadd-microkernel-tester.h", |
| 9472 | ] + MICROKERNEL_TEST_HDRS, |
| 9473 | deps = MICROKERNEL_TEST_DEPS, |
| 9474 | ) |
| 9475 | |
| 9476 | xnnpack_unit_test( |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 9477 | name = "qu8_vaddc_minmax_test", |
| 9478 | srcs = [ |
| 9479 | "test/qu8-vaddc-minmax.cc", |
| 9480 | "test/vaddc-microkernel-tester.h", |
| 9481 | ] + MICROKERNEL_TEST_HDRS, |
| 9482 | deps = MICROKERNEL_TEST_DEPS, |
| 9483 | ) |
| 9484 | |
| 9485 | xnnpack_unit_test( |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 9486 | name = "qu8_vmul_minmax_fp32_test", |
| 9487 | srcs = [ |
| 9488 | "test/qu8-vmul-minmax-fp32.cc", |
| 9489 | "test/vmul-microkernel-tester.h", |
| 9490 | ] + MICROKERNEL_TEST_HDRS, |
| 9491 | deps = MICROKERNEL_TEST_DEPS, |
| 9492 | ) |
| 9493 | |
| 9494 | xnnpack_unit_test( |
| 9495 | name = "qu8_vmulc_minmax_fp32_test", |
| 9496 | srcs = [ |
| 9497 | "test/qu8-vmulc-minmax-fp32.cc", |
| 9498 | "test/vmulc-microkernel-tester.h", |
| 9499 | ] + MICROKERNEL_TEST_HDRS, |
| 9500 | deps = MICROKERNEL_TEST_DEPS, |
| 9501 | ) |
| 9502 | |
| 9503 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9504 | name = "u8_lut32norm_test", |
| 9505 | srcs = [ |
| 9506 | "test/u8-lut32norm.cc", |
| 9507 | "test/lut-norm-microkernel-tester.h", |
| 9508 | ] + MICROKERNEL_TEST_HDRS, |
| 9509 | deps = MICROKERNEL_TEST_DEPS, |
| 9510 | ) |
| 9511 | |
| 9512 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 9513 | name = "u8_maxpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9514 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 9515 | "test/u8-maxpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9516 | "test/maxpool-microkernel-tester.h", |
| 9517 | ] + MICROKERNEL_TEST_HDRS, |
| 9518 | deps = MICROKERNEL_TEST_DEPS, |
| 9519 | ) |
| 9520 | |
| 9521 | xnnpack_unit_test( |
| 9522 | name = "u8_rmax_test", |
| 9523 | srcs = [ |
| 9524 | "test/u8-rmax.cc", |
| 9525 | "test/rmax-microkernel-tester.h", |
| 9526 | ] + MICROKERNEL_TEST_HDRS, |
| 9527 | deps = MICROKERNEL_TEST_DEPS, |
| 9528 | ) |
| 9529 | |
| 9530 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 9531 | name = "u8_vclamp_test", |
| 9532 | srcs = [ |
| 9533 | "test/u8-vclamp.cc", |
| Marat Dukhan | a6c0516 | 2021-05-13 16:52:02 -0700 | [diff] [blame] | 9534 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 9535 | ] + MICROKERNEL_TEST_HDRS, |
| 9536 | deps = MICROKERNEL_TEST_DEPS, |
| 9537 | ) |
| 9538 | |
| 9539 | xnnpack_unit_test( |
| Marat Dukhan | ad71b9a | 2020-11-20 00:01:51 -0800 | [diff] [blame] | 9540 | name = "x32_depthtospace2d_chw2hwc_test", |
| Yury Kartynnik | e784186 | 2020-11-04 18:22:18 -0800 | [diff] [blame] | 9541 | srcs = [ |
| Marat Dukhan | ad71b9a | 2020-11-20 00:01:51 -0800 | [diff] [blame] | 9542 | "test/x32-depthtospace2d-chw2hwc.cc", |
| 9543 | "test/depthtospace-microkernel-tester.h", |
| Yury Kartynnik | e784186 | 2020-11-04 18:22:18 -0800 | [diff] [blame] | 9544 | ] + MICROKERNEL_TEST_HDRS, |
| 9545 | deps = MICROKERNEL_TEST_DEPS, |
| 9546 | ) |
| 9547 | |
| 9548 | xnnpack_unit_test( |
| Marat Dukhan | 3bb3bfc | 2020-05-19 17:42:46 -0700 | [diff] [blame] | 9549 | name = "x32_fill_test", |
| 9550 | srcs = [ |
| 9551 | "test/x32-fill.cc", |
| 9552 | "test/fill-microkernel-tester.h", |
| 9553 | ] + MICROKERNEL_TEST_HDRS, |
| 9554 | deps = MICROKERNEL_TEST_DEPS, |
| 9555 | ) |
| 9556 | |
| 9557 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9558 | name = "x32_packx_test", |
| 9559 | srcs = [ |
| 9560 | "test/x32-packx.cc", |
| 9561 | "test/pack-microkernel-tester.h", |
| 9562 | "src/xnnpack/AlignedAllocator.h", |
| 9563 | ] + MICROKERNEL_TEST_HDRS, |
| 9564 | deps = MICROKERNEL_TEST_DEPS, |
| 9565 | ) |
| 9566 | |
| 9567 | xnnpack_unit_test( |
| 9568 | name = "x32_pad_test", |
| 9569 | srcs = [ |
| 9570 | "test/x32-pad.cc", |
| 9571 | "test/pad-microkernel-tester.h", |
| 9572 | ] + MICROKERNEL_TEST_HDRS, |
| 9573 | deps = MICROKERNEL_TEST_DEPS, |
| 9574 | ) |
| 9575 | |
| 9576 | xnnpack_unit_test( |
| 9577 | name = "x32_unpool_test", |
| 9578 | srcs = [ |
| 9579 | "test/x32-unpool.cc", |
| 9580 | "test/unpool-microkernel-tester.h", |
| 9581 | ] + MICROKERNEL_TEST_HDRS, |
| 9582 | deps = MICROKERNEL_TEST_DEPS, |
| 9583 | ) |
| 9584 | |
| 9585 | xnnpack_unit_test( |
| 9586 | name = "x32_zip_test", |
| 9587 | srcs = [ |
| 9588 | "test/x32-zip.cc", |
| 9589 | "test/zip-microkernel-tester.h", |
| 9590 | ] + MICROKERNEL_TEST_HDRS, |
| 9591 | deps = MICROKERNEL_TEST_DEPS, |
| 9592 | ) |
| 9593 | |
| 9594 | xnnpack_unit_test( |
| 9595 | name = "x8_lut_test", |
| 9596 | srcs = [ |
| 9597 | "test/x8-lut.cc", |
| 9598 | "test/lut-microkernel-tester.h", |
| 9599 | ] + MICROKERNEL_TEST_HDRS, |
| 9600 | deps = MICROKERNEL_TEST_DEPS, |
| 9601 | ) |
| 9602 | |
| 9603 | xnnpack_unit_test( |
| 9604 | name = "x8_zip_test", |
| 9605 | srcs = [ |
| 9606 | "test/x8-zip.cc", |
| 9607 | "test/zip-microkernel-tester.h", |
| 9608 | ] + MICROKERNEL_TEST_HDRS, |
| 9609 | deps = MICROKERNEL_TEST_DEPS, |
| 9610 | ) |
| 9611 | |
| Marat Dukhan | 20c3b92 | 2020-03-10 03:45:06 -0700 | [diff] [blame] | 9612 | ########################## Size tests for the library ######################### |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9613 | |
| 9614 | xnnpack_binary( |
| Marat Dukhan | 20c3b92 | 2020-03-10 03:45:06 -0700 | [diff] [blame] | 9615 | name = "operator_size_test", |
| 9616 | srcs = ["test/operator-size.c"], |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 9617 | deps = [":xnnpack_for_tfjs"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9618 | ) |
| 9619 | |
| Marat Dukhan | 20c3b92 | 2020-03-10 03:45:06 -0700 | [diff] [blame] | 9620 | xnnpack_binary( |
| 9621 | name = "subgraph_size_test", |
| 9622 | srcs = ["test/subgraph-size.c"], |
| 9623 | deps = [":XNNPACK"], |
| 9624 | ) |
| 9625 | |
| 9626 | ########################### Unit tests for operators ########################## |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9627 | |
| 9628 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 9629 | name = "abs_nc_test", |
| 9630 | srcs = [ |
| 9631 | "test/abs-nc.cc", |
| 9632 | "test/abs-operator-tester.h", |
| 9633 | ], |
| 9634 | deps = OPERATOR_TEST_DEPS, |
| 9635 | ) |
| 9636 | |
| 9637 | xnnpack_unit_test( |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 9638 | name = "add_nd_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 9639 | timeout = "moderate", |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 9640 | srcs = [ |
| 9641 | "test/add-nd.cc", |
| 9642 | "test/binary-elementwise-operator-tester.h", |
| 9643 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9644 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 9645 | ) |
| 9646 | |
| 9647 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9648 | name = "argmax_pooling_nhwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9649 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9650 | "test/argmax-pooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9651 | "test/argmax-pooling-operator-tester.h", |
| 9652 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9653 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9654 | ) |
| 9655 | |
| 9656 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9657 | name = "average_pooling_nhwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9658 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9659 | "test/average-pooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9660 | "test/average-pooling-operator-tester.h", |
| 9661 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9662 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9663 | ) |
| 9664 | |
| 9665 | xnnpack_unit_test( |
| Marat Dukhan | 64e5251 | 2020-06-09 13:41:16 -0700 | [diff] [blame] | 9666 | name = "bankers_rounding_nc_test", |
| 9667 | srcs = [ |
| 9668 | "test/bankers-rounding-nc.cc", |
| 9669 | "test/bankers-rounding-operator-tester.h", |
| 9670 | ], |
| 9671 | deps = OPERATOR_TEST_DEPS, |
| 9672 | ) |
| 9673 | |
| 9674 | xnnpack_unit_test( |
| 9675 | name = "ceiling_nc_test", |
| 9676 | srcs = [ |
| 9677 | "test/ceiling-nc.cc", |
| 9678 | "test/ceiling-operator-tester.h", |
| 9679 | ], |
| 9680 | deps = OPERATOR_TEST_DEPS, |
| 9681 | ) |
| 9682 | |
| 9683 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9684 | name = "channel_shuffle_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9685 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9686 | "test/channel-shuffle-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9687 | "test/channel-shuffle-operator-tester.h", |
| 9688 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9689 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9690 | ) |
| 9691 | |
| 9692 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9693 | name = "clamp_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9694 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9695 | "test/clamp-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9696 | "test/clamp-operator-tester.h", |
| 9697 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9698 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9699 | ) |
| 9700 | |
| 9701 | xnnpack_unit_test( |
| Marat Dukhan | 065b11e | 2020-05-22 09:49:41 -0700 | [diff] [blame] | 9702 | name = "constant_pad_nd_test", |
| 9703 | srcs = [ |
| 9704 | "test/constant-pad-nd.cc", |
| 9705 | "test/constant-pad-operator-tester.h", |
| 9706 | ], |
| 9707 | deps = OPERATOR_TEST_DEPS, |
| 9708 | ) |
| 9709 | |
| 9710 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9711 | name = "convolution_nhwc_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 9712 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9713 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9714 | "test/convolution-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9715 | "test/convolution-operator-tester.h", |
| 9716 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9717 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9718 | ) |
| 9719 | |
| 9720 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9721 | name = "convolution_nchw_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 9722 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9723 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9724 | "test/convolution-nchw.cc", |
| 9725 | "test/convolution-operator-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9726 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9727 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9728 | ) |
| 9729 | |
| 9730 | xnnpack_unit_test( |
| Marat Dukhan | 4e21b27 | 2020-06-04 18:45:01 -0700 | [diff] [blame] | 9731 | name = "copy_nc_test", |
| 9732 | srcs = [ |
| 9733 | "test/copy-nc.cc", |
| 9734 | "test/copy-operator-tester.h", |
| 9735 | ], |
| 9736 | deps = OPERATOR_TEST_DEPS, |
| 9737 | ) |
| 9738 | |
| 9739 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9740 | name = "deconvolution_nhwc_test", |
| Artsiom Ablavatski | c1aa297 | 2020-12-08 11:23:34 -0800 | [diff] [blame] | 9741 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9742 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9743 | "test/deconvolution-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9744 | "test/deconvolution-operator-tester.h", |
| 9745 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9746 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9747 | ) |
| 9748 | |
| 9749 | xnnpack_unit_test( |
| Marat Dukhan | 188d104 | 2020-11-24 23:39:40 -0800 | [diff] [blame] | 9750 | name = "depth_to_space_nchw2nhwc_test", |
| Artsiom Ablavatski | 0f1dc18 | 2020-11-05 19:21:50 -0800 | [diff] [blame] | 9751 | srcs = [ |
| Marat Dukhan | 188d104 | 2020-11-24 23:39:40 -0800 | [diff] [blame] | 9752 | "test/depth-to-space-nchw2nhwc.cc", |
| Artsiom Ablavatski | 0f1dc18 | 2020-11-05 19:21:50 -0800 | [diff] [blame] | 9753 | "test/depth-to-space-operator-tester.h", |
| 9754 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| 9755 | deps = OPERATOR_TEST_DEPS, |
| 9756 | ) |
| 9757 | |
| 9758 | xnnpack_unit_test( |
| Marat Dukhan | 0e52117 | 2020-11-25 13:10:04 -0800 | [diff] [blame] | 9759 | name = "depth_to_space_nhwc_test", |
| 9760 | srcs = [ |
| 9761 | "test/depth-to-space-nhwc.cc", |
| 9762 | "test/depth-to-space-operator-tester.h", |
| 9763 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| 9764 | deps = OPERATOR_TEST_DEPS, |
| 9765 | ) |
| 9766 | |
| 9767 | xnnpack_unit_test( |
| Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 9768 | name = "divide_nd_test", |
| 9769 | srcs = [ |
| 9770 | "test/binary-elementwise-operator-tester.h", |
| 9771 | "test/divide-nd.cc", |
| 9772 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9773 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 9774 | ) |
| 9775 | |
| 9776 | xnnpack_unit_test( |
| Marat Dukhan | b6bd4bc | 2020-12-01 17:01:40 -0800 | [diff] [blame] | 9777 | name = "elu_nc_test", |
| 9778 | srcs = [ |
| 9779 | "test/elu-nc.cc", |
| 9780 | "test/elu-operator-tester.h", |
| 9781 | ], |
| 9782 | deps = OPERATOR_TEST_DEPS, |
| 9783 | ) |
| 9784 | |
| 9785 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9786 | name = "fully_connected_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9787 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9788 | "test/fully-connected-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9789 | "test/fully-connected-operator-tester.h", |
| 9790 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9791 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9792 | ) |
| 9793 | |
| 9794 | xnnpack_unit_test( |
| Marat Dukhan | 64e5251 | 2020-06-09 13:41:16 -0700 | [diff] [blame] | 9795 | name = "floor_nc_test", |
| 9796 | srcs = [ |
| 9797 | "test/floor-nc.cc", |
| 9798 | "test/floor-operator-tester.h", |
| 9799 | ], |
| 9800 | deps = OPERATOR_TEST_DEPS, |
| 9801 | ) |
| 9802 | |
| 9803 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9804 | name = "global_average_pooling_nwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9805 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9806 | "test/global-average-pooling-nwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9807 | "test/global-average-pooling-operator-tester.h", |
| Marat Dukhan | ef61d02 | 2020-06-19 13:54:49 -0700 | [diff] [blame] | 9808 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9809 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9810 | ) |
| 9811 | |
| 9812 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9813 | name = "global_average_pooling_ncw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9814 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9815 | "test/global-average-pooling-ncw.cc", |
| 9816 | "test/global-average-pooling-operator-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9817 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9818 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9819 | ) |
| 9820 | |
| 9821 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9822 | name = "hardswish_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9823 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9824 | "test/hardswish-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9825 | "test/hardswish-operator-tester.h", |
| 9826 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9827 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9828 | ) |
| 9829 | |
| 9830 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9831 | name = "leaky_relu_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9832 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9833 | "test/leaky-relu-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9834 | "test/leaky-relu-operator-tester.h", |
| 9835 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9836 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9837 | ) |
| 9838 | |
| 9839 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9840 | name = "max_pooling_nhwc_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 9841 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9842 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9843 | "test/max-pooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9844 | "test/max-pooling-operator-tester.h", |
| 9845 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9846 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9847 | ) |
| 9848 | |
| 9849 | xnnpack_unit_test( |
| Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 9850 | name = "maximum_nd_test", |
| 9851 | srcs = [ |
| 9852 | "test/binary-elementwise-operator-tester.h", |
| 9853 | "test/maximum-nd.cc", |
| 9854 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9855 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 9856 | ) |
| 9857 | |
| 9858 | xnnpack_unit_test( |
| 9859 | name = "minimum_nd_test", |
| 9860 | srcs = [ |
| 9861 | "test/binary-elementwise-operator-tester.h", |
| 9862 | "test/minimum-nd.cc", |
| 9863 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9864 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 9865 | ) |
| 9866 | |
| 9867 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9868 | name = "multiply_nd_test", |
| Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 9869 | srcs = [ |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 9870 | "test/binary-elementwise-operator-tester.h", |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9871 | "test/multiply-nd.cc", |
| Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 9872 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9873 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 9874 | ) |
| 9875 | |
| 9876 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 9877 | name = "negate_nc_test", |
| 9878 | srcs = [ |
| 9879 | "test/negate-nc.cc", |
| 9880 | "test/negate-operator-tester.h", |
| 9881 | ], |
| 9882 | deps = OPERATOR_TEST_DEPS, |
| 9883 | ) |
| 9884 | |
| 9885 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9886 | name = "prelu_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9887 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9888 | "test/prelu-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9889 | "test/prelu-operator-tester.h", |
| 9890 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9891 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9892 | ) |
| 9893 | |
| 9894 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9895 | name = "resize_bilinear_nhwc_test", |
| Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 9896 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9897 | "test/resize-bilinear-nhwc.cc", |
| Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 9898 | "test/resize-bilinear-operator-tester.h", |
| 9899 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9900 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 9901 | ) |
| 9902 | |
| 9903 | xnnpack_unit_test( |
| Artsiom Ablavatski | 9791810 | 2020-10-27 15:52:59 -0700 | [diff] [blame] | 9904 | name = "resize_bilinear_nchw_test", |
| 9905 | srcs = [ |
| 9906 | "test/resize-bilinear-nchw.cc", |
| 9907 | "test/resize-bilinear-operator-tester.h", |
| 9908 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| 9909 | deps = OPERATOR_TEST_DEPS, |
| 9910 | ) |
| 9911 | |
| 9912 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9913 | name = "sigmoid_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9914 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9915 | "test/sigmoid-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9916 | "test/sigmoid-operator-tester.h", |
| 9917 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9918 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9919 | ) |
| 9920 | |
| 9921 | xnnpack_unit_test( |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 9922 | name = "softmax_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9923 | srcs = [ |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 9924 | "test/softmax-nc.cc", |
| 9925 | "test/softmax-operator-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9926 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9927 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9928 | ) |
| 9929 | |
| 9930 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 9931 | name = "square_nc_test", |
| 9932 | srcs = [ |
| 9933 | "test/square-nc.cc", |
| 9934 | "test/square-operator-tester.h", |
| 9935 | ], |
| 9936 | deps = OPERATOR_TEST_DEPS, |
| 9937 | ) |
| 9938 | |
| 9939 | xnnpack_unit_test( |
| Marat Dukhan | 6804bbd | 2020-06-30 19:26:11 -0700 | [diff] [blame] | 9940 | name = "square_root_nc_test", |
| 9941 | srcs = [ |
| 9942 | "test/square-root-nc.cc", |
| 9943 | "test/square-root-operator-tester.h", |
| 9944 | ], |
| 9945 | deps = OPERATOR_TEST_DEPS, |
| 9946 | ) |
| 9947 | |
| 9948 | xnnpack_unit_test( |
| Marat Dukhan | f739926 | 2020-06-05 10:58:44 -0700 | [diff] [blame] | 9949 | name = "squared_difference_nd_test", |
| 9950 | srcs = [ |
| 9951 | "test/binary-elementwise-operator-tester.h", |
| 9952 | "test/squared-difference-nd.cc", |
| 9953 | ], |
| 9954 | deps = OPERATOR_TEST_DEPS, |
| 9955 | ) |
| 9956 | |
| 9957 | xnnpack_unit_test( |
| Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 9958 | name = "subtract_nd_test", |
| 9959 | srcs = [ |
| 9960 | "test/binary-elementwise-operator-tester.h", |
| 9961 | "test/subtract-nd.cc", |
| 9962 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9963 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 9964 | ) |
| 9965 | |
| 9966 | xnnpack_unit_test( |
| Marat Dukhan | 64e5251 | 2020-06-09 13:41:16 -0700 | [diff] [blame] | 9967 | name = "truncation_nc_test", |
| 9968 | srcs = [ |
| 9969 | "test/truncation-nc.cc", |
| 9970 | "test/truncation-operator-tester.h", |
| 9971 | ], |
| 9972 | deps = OPERATOR_TEST_DEPS, |
| 9973 | ) |
| 9974 | |
| 9975 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9976 | name = "unpooling_nhwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9977 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9978 | "test/unpooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9979 | "test/unpooling-operator-tester.h", |
| 9980 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9981 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9982 | ) |
| 9983 | |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 9984 | ############################### Misc unit tests ############################### |
| 9985 | |
| 9986 | xnnpack_unit_test( |
| 9987 | name = "memory_planner_test", |
| 9988 | srcs = [ |
| 9989 | "test/memory-planner-test.cc", |
| 9990 | ], |
| 9991 | deps = [ |
| 9992 | ":XNNPACK", |
| 9993 | ":memory_planner", |
| 9994 | ], |
| 9995 | ) |
| 9996 | |
| XNNPACK Team | ab8c4c8 | 2020-10-09 08:05:51 -0700 | [diff] [blame] | 9997 | xnnpack_unit_test( |
| 9998 | name = "subgraph_nchw_test", |
| 9999 | srcs = [ |
| 10000 | "src/xnnpack/subgraph.h", |
| 10001 | "test/subgraph-nchw.cc", |
| 10002 | "test/subgraph-tester.h", |
| 10003 | ], |
| 10004 | deps = [ |
| 10005 | ":XNNPACK", |
| 10006 | ], |
| 10007 | ) |
| 10008 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10009 | ############################# Build configurations ############################# |
| 10010 | |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 10011 | # Enables usage of assembly kernels. |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10012 | config_setting( |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 10013 | name = "xnn_enable_assembly_explicit_true", |
| 10014 | define_values = {"xnn_enable_assembly": "true"}, |
| 10015 | ) |
| 10016 | |
| 10017 | # Disables usage of assembly kernels. |
| 10018 | config_setting( |
| 10019 | name = "xnn_enable_assembly_explicit_false", |
| 10020 | define_values = {"xnn_enable_assembly": "false"}, |
| 10021 | ) |
| 10022 | |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 10023 | # Enables usage of sparse inference. |
| 10024 | config_setting( |
| 10025 | name = "xnn_enable_sparse_explicit_true", |
| 10026 | define_values = {"xnn_enable_sparse": "true"}, |
| 10027 | ) |
| 10028 | |
| 10029 | # Disables usage of sparse inference. |
| 10030 | config_setting( |
| 10031 | name = "xnn_enable_sparse_explicit_false", |
| 10032 | define_values = {"xnn_enable_sparse": "false"}, |
| 10033 | ) |
| 10034 | |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 10035 | # Disables usage of HMP-aware optimizations. |
| 10036 | config_setting( |
| 10037 | name = "xnn_enable_hmp_explicit_false", |
| 10038 | define_values = {"xnn_enable_hmp": "false"}, |
| 10039 | ) |
| 10040 | |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 10041 | # Enable usage of optimized memory allocation |
| 10042 | config_setting( |
| 10043 | name = "xnn_enable_memopt_explicit_true", |
| Marat Dukhan | 03f4621 | 2021-03-30 21:29:49 -0700 | [diff] [blame] | 10044 | define_values = {"xnn_enable_memopt": "true"}, |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 10045 | ) |
| 10046 | |
| 10047 | # Disable usage of optimized memory allocation |
| 10048 | config_setting( |
| 10049 | name = "xnn_enable_memopt_explicit_false", |
| Marat Dukhan | 03f4621 | 2021-03-30 21:29:49 -0700 | [diff] [blame] | 10050 | define_values = {"xnn_enable_memopt": "false"}, |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 10051 | ) |
| 10052 | |
| Marat Dukhan | b939cdb | 2021-03-30 18:51:51 -0700 | [diff] [blame] | 10053 | # Enable QS8 inference in TFLite-specific version |
| 10054 | config_setting( |
| 10055 | name = "xnn_enable_qs8_explicit_true", |
| 10056 | define_values = {"xnn_enable_qs8": "true"}, |
| 10057 | ) |
| 10058 | |
| 10059 | # Disable QS8 inference in TFLite-specific version |
| 10060 | config_setting( |
| 10061 | name = "xnn_enable_qs8_explicit_false", |
| 10062 | define_values = {"xnn_enable_qs8": "false"}, |
| 10063 | ) |
| 10064 | |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 10065 | # Enable QU8 inference in TFLite-specific version |
| 10066 | config_setting( |
| 10067 | name = "xnn_enable_qu8_explicit_true", |
| 10068 | define_values = {"xnn_enable_qu8": "true"}, |
| 10069 | ) |
| 10070 | |
| 10071 | # Disable QU8 inference in TFLite-specific version |
| 10072 | config_setting( |
| 10073 | name = "xnn_enable_qu8_explicit_false", |
| 10074 | define_values = {"xnn_enable_qu8": "false"}, |
| 10075 | ) |
| 10076 | |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 10077 | # Builds with -c dbg |
| 10078 | config_setting( |
| 10079 | name = "debug_build", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10080 | values = { |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 10081 | "compilation_mode": "dbg", |
| 10082 | }, |
| 10083 | ) |
| 10084 | |
| 10085 | # Builds with -c opt |
| 10086 | config_setting( |
| 10087 | name = "optimized_build", |
| 10088 | values = { |
| 10089 | "compilation_mode": "opt", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10090 | }, |
| 10091 | ) |
| 10092 | |
| 10093 | config_setting( |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 10094 | name = "linux_k8", |
| 10095 | values = {"cpu": "k8"}, |
| 10096 | ) |
| 10097 | |
| 10098 | config_setting( |
| Marat Dukhan | 582094e | 2020-04-30 17:21:25 -0700 | [diff] [blame] | 10099 | name = "linux_arm", |
| 10100 | values = {"cpu": "arm"}, |
| Marat Dukhan | 4e45e66 | 2019-10-03 15:40:24 -0700 | [diff] [blame] | 10101 | ) |
| 10102 | |
| 10103 | config_setting( |
| Marat Dukhan | f0bd4de | 2020-06-15 15:53:19 -0700 | [diff] [blame] | 10104 | name = "linux_armeabi", |
| 10105 | values = {"cpu": "armeabi"}, |
| 10106 | ) |
| 10107 | |
| 10108 | config_setting( |
| Terry Heo | 68eef3f | 2020-04-13 22:53:52 -0700 | [diff] [blame] | 10109 | name = "linux_armhf", |
| 10110 | values = {"cpu": "armhf"}, |
| 10111 | ) |
| 10112 | |
| 10113 | config_setting( |
| Marat Dukhan | a720e93 | 2020-06-10 13:01:11 -0700 | [diff] [blame] | 10114 | name = "linux_armv7a", |
| 10115 | values = {"cpu": "armv7a"}, |
| 10116 | ) |
| 10117 | |
| 10118 | config_setting( |
| Marat Dukhan | 582094e | 2020-04-30 17:21:25 -0700 | [diff] [blame] | 10119 | name = "linux_aarch64", |
| 10120 | values = {"cpu": "aarch64"}, |
| 10121 | ) |
| 10122 | |
| 10123 | config_setting( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10124 | name = "android", |
| 10125 | values = {"crosstool_top": "//external:android/crosstool"}, |
| 10126 | ) |
| 10127 | |
| 10128 | config_setting( |
| 10129 | name = "android_armv7", |
| 10130 | values = { |
| 10131 | "crosstool_top": "//external:android/crosstool", |
| 10132 | "cpu": "armeabi-v7a", |
| 10133 | }, |
| 10134 | ) |
| 10135 | |
| 10136 | config_setting( |
| 10137 | name = "android_arm64", |
| 10138 | values = { |
| 10139 | "crosstool_top": "//external:android/crosstool", |
| 10140 | "cpu": "arm64-v8a", |
| 10141 | }, |
| 10142 | ) |
| 10143 | |
| 10144 | config_setting( |
| 10145 | name = "android_x86", |
| 10146 | values = { |
| 10147 | "crosstool_top": "//external:android/crosstool", |
| 10148 | "cpu": "x86", |
| 10149 | }, |
| 10150 | ) |
| 10151 | |
| 10152 | config_setting( |
| 10153 | name = "android_x86_64", |
| 10154 | values = { |
| 10155 | "crosstool_top": "//external:android/crosstool", |
| 10156 | "cpu": "x86_64", |
| 10157 | }, |
| 10158 | ) |
| 10159 | |
| 10160 | config_setting( |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 10161 | name = "windows_x86_64", |
| 10162 | values = {"cpu": "x64_windows"}, |
| Marat Dukhan | 9fe932e | 2020-04-11 17:14:15 -0700 | [diff] [blame] | 10163 | ) |
| 10164 | |
| 10165 | config_setting( |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 10166 | name = "windows_x86_64_clang", |
| 10167 | values = { |
| 10168 | "compiler": "clang-cl", |
| 10169 | "cpu": "x64_windows", |
| 10170 | }, |
| 10171 | ) |
| 10172 | |
| 10173 | config_setting( |
| 10174 | name = "windows_x86_64_mingw", |
| 10175 | values = { |
| 10176 | "compiler": "mingw-gcc", |
| 10177 | "cpu": "x64_windows", |
| 10178 | }, |
| 10179 | ) |
| 10180 | |
| 10181 | config_setting( |
| 10182 | name = "windows_x86_64_msys", |
| 10183 | values = { |
| 10184 | "compiler": "msys-gcc", |
| 10185 | "cpu": "x64_windows", |
| 10186 | }, |
| Marat Dukhan | 9fe932e | 2020-04-11 17:14:15 -0700 | [diff] [blame] | 10187 | ) |
| 10188 | |
| 10189 | config_setting( |
| Marat Dukhan | 885ca24 | 2019-10-07 09:17:32 -0700 | [diff] [blame] | 10190 | name = "macos_x86_64", |
| 10191 | values = { |
| 10192 | "apple_platform_type": "macos", |
| 10193 | "cpu": "darwin", |
| 10194 | }, |
| 10195 | ) |
| 10196 | |
| 10197 | config_setting( |
| Simon Maurer | ae33ab8 | 2021-03-03 23:38:22 +0100 | [diff] [blame] | 10198 | name = "macos_arm64", |
| 10199 | values = { |
| 10200 | "apple_platform_type": "macos", |
| 10201 | "cpu": "darwin_arm64", |
| 10202 | }, |
| 10203 | ) |
| 10204 | |
| 10205 | config_setting( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10206 | name = "emscripten", |
| XNNPACK Team | 3bfbdaf | 2021-03-29 15:26:23 -0700 | [diff] [blame] | 10207 | values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"}, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10208 | ) |
| 10209 | |
| 10210 | config_setting( |
| 10211 | name = "emscripten_wasm", |
| 10212 | values = { |
| XNNPACK Team | 3bfbdaf | 2021-03-29 15:26:23 -0700 | [diff] [blame] | 10213 | "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10214 | "cpu": "wasm", |
| 10215 | }, |
| 10216 | ) |
| 10217 | |
| 10218 | config_setting( |
| 10219 | name = "emscripten_wasmsimd", |
| 10220 | values = { |
| XNNPACK Team | 3bfbdaf | 2021-03-29 15:26:23 -0700 | [diff] [blame] | 10221 | "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10222 | "cpu": "wasm", |
| Marat Dukhan | 81c6260 | 2020-05-29 13:22:49 -0700 | [diff] [blame] | 10223 | "copt": "-msimd128", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10224 | }, |
| 10225 | ) |
| 10226 | |
| 10227 | config_setting( |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10228 | name = "ios_armv7", |
| 10229 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10230 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10231 | "cpu": "ios_armv7", |
| 10232 | }, |
| 10233 | ) |
| 10234 | |
| 10235 | config_setting( |
| 10236 | name = "ios_arm64", |
| 10237 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10238 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10239 | "cpu": "ios_arm64", |
| 10240 | }, |
| 10241 | ) |
| 10242 | |
| 10243 | config_setting( |
| 10244 | name = "ios_arm64e", |
| 10245 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10246 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10247 | "cpu": "ios_arm64e", |
| 10248 | }, |
| 10249 | ) |
| 10250 | |
| 10251 | config_setting( |
| 10252 | name = "ios_x86", |
| 10253 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10254 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10255 | "cpu": "ios_i386", |
| 10256 | }, |
| 10257 | ) |
| 10258 | |
| 10259 | config_setting( |
| 10260 | name = "ios_x86_64", |
| 10261 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10262 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10263 | "cpu": "ios_x86_64", |
| 10264 | }, |
| 10265 | ) |
| 10266 | |
| 10267 | config_setting( |
| 10268 | name = "watchos_armv7k", |
| 10269 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10270 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10271 | "cpu": "watchos_armv7k", |
| 10272 | }, |
| 10273 | ) |
| 10274 | |
| 10275 | config_setting( |
| 10276 | name = "watchos_arm64_32", |
| 10277 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10278 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10279 | "cpu": "watchos_arm64_32", |
| 10280 | }, |
| 10281 | ) |
| 10282 | |
| 10283 | config_setting( |
| 10284 | name = "watchos_x86", |
| 10285 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10286 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10287 | "cpu": "watchos_i386", |
| 10288 | }, |
| 10289 | ) |
| 10290 | |
| 10291 | config_setting( |
| 10292 | name = "watchos_x86_64", |
| 10293 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10294 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10295 | "cpu": "watchos_x86_64", |
| 10296 | }, |
| 10297 | ) |
| 10298 | |
| 10299 | config_setting( |
| 10300 | name = "tvos_arm64", |
| 10301 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10302 | "apple_platform_type": "tvos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10303 | "cpu": "tvos_arm64", |
| 10304 | }, |
| 10305 | ) |
| 10306 | |
| 10307 | config_setting( |
| 10308 | name = "tvos_x86_64", |
| 10309 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 10310 | "apple_platform_type": "tvos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 10311 | "cpu": "tvos_x86_64", |
| 10312 | }, |
| 10313 | ) |