| Frank Barchard | 1a95305 | 2020-11-16 18:44:58 -0800 | [diff] [blame] | 1 | # Copyright 2020 Google LLC |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2 | # |
| 3 | # This source code is licensed under the BSD-style license found in the |
| 4 | # LICENSE file in the root directory of this source tree. |
| 5 | # |
| 6 | # Description: |
| 7 | # XNNPACK - optimized floating-point neural network operators library |
| 8 | |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9 | load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility") |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 10 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11 | licenses(["notice"]) |
| 12 | |
| 13 | exports_files(["LICENSE"]) |
| 14 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 15 | OPERATOR_BENCHMARK_DEPS = [ |
| 16 | ":XNNPACK", |
| 17 | ":bench_utils", |
| 18 | "@cpuinfo", |
| Frank Barchard | 0c84973 | 2020-06-12 13:31:32 -0700 | [diff] [blame] | 19 | "@FP16", |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 20 | "@pthreadpool", |
| 21 | ] |
| 22 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 23 | MICROKERNEL_BENCHMARK_DEPS = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 24 | ":bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 25 | ":bench_utils", |
| Frank Barchard | 7e95597 | 2019-10-11 10:34:25 -0700 | [diff] [blame] | 26 | ":enable_assembly", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 27 | "@cpuinfo", |
| 28 | "@FP16", |
| 29 | "@pthreadpool", |
| 30 | ] |
| 31 | |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 32 | ACCURACY_EVAL_DEPS = [ |
| 33 | ":XNNPACK", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 34 | ":bench_microkernels", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 35 | "@FP16", |
| 36 | "@pthreadpool", |
| 37 | ] |
| 38 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 39 | MICROKERNEL_TEST_DEPS = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 40 | ":test_microkernels", |
| Frank Barchard | 7e95597 | 2019-10-11 10:34:25 -0700 | [diff] [blame] | 41 | ":enable_assembly", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 42 | "@cpuinfo", |
| 43 | "@FP16", |
| 44 | "@pthreadpool", |
| 45 | ] |
| 46 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 47 | OPERATOR_TEST_DEPS = [ |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 48 | ":XNNPACK_test_mode", |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 49 | "@pthreadpool", |
| 50 | "@FP16", |
| 51 | ] |
| 52 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 53 | OPERATOR_SRCS = [ |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 54 | "src/operators/argmax-pooling-nhwc.c", |
| 55 | "src/operators/average-pooling-nhwc.c", |
| 56 | "src/operators/binary-elementwise-nd.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 57 | "src/operators/channel-shuffle-nc.c", |
| Marat Dukhan | 065b11e | 2020-05-22 09:49:41 -0700 | [diff] [blame] | 58 | "src/operators/constant-pad-nd.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 59 | "src/operators/convolution-nchw.c", |
| 60 | "src/operators/convolution-nhwc.c", |
| 61 | "src/operators/deconvolution-nhwc.c", |
| Marat Dukhan | 13b68f2 | 2020-11-12 11:55:19 -0800 | [diff] [blame] | 62 | "src/operators/depth-to-space-nchw2nhwc.c", |
| Marat Dukhan | 0e52117 | 2020-11-25 13:10:04 -0800 | [diff] [blame] | 63 | "src/operators/depth-to-space-nhwc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 64 | "src/operators/fully-connected-nc.c", |
| 65 | "src/operators/global-average-pooling-ncw.c", |
| 66 | "src/operators/global-average-pooling-nwc.c", |
| Marat Dukhan | f6c991e | 2021-09-09 01:10:40 -0700 | [diff] [blame] | 67 | "src/operators/lut-elementwise-nc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 68 | "src/operators/max-pooling-nhwc.c", |
| 69 | "src/operators/prelu-nc.c", |
| Artsiom Ablavatski | 9791810 | 2020-10-27 15:52:59 -0700 | [diff] [blame] | 70 | "src/operators/resize-bilinear-nchw.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 71 | "src/operators/resize-bilinear-nhwc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 72 | "src/operators/softmax-nc.c", |
| Marat Dukhan | c3065f5 | 2020-06-04 13:33:32 -0700 | [diff] [blame] | 73 | "src/operators/unary-elementwise-nc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 74 | "src/operators/unpooling-nhwc.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 75 | ] |
| 76 | |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 77 | SUBGRAPH_SRCS = [ |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 78 | "src/subgraph/abs.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 79 | "src/subgraph/add2.c", |
| 80 | "src/subgraph/argmax-pooling-2d.c", |
| 81 | "src/subgraph/average-pooling-2d.c", |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 82 | "src/subgraph/bankers-rounding.c", |
| 83 | "src/subgraph/ceiling.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 84 | "src/subgraph/clamp.c", |
| Marat Dukhan | 20483c7 | 2021-12-05 09:56:40 -0800 | [diff] [blame] | 85 | "src/subgraph/convert.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 86 | "src/subgraph/convolution-2d.c", |
| 87 | "src/subgraph/deconvolution-2d.c", |
| Artsiom Ablavatski | bbe8506 | 2020-11-05 14:07:37 -0800 | [diff] [blame] | 88 | "src/subgraph/depth-to-space.c", |
| Frank Barchard | 9cef5ea | 2020-11-18 14:52:08 -0800 | [diff] [blame] | 89 | "src/subgraph/depthwise-convolution-2d.c", |
| Marat Dukhan | 9d3a459 | 2020-06-05 16:52:42 -0700 | [diff] [blame] | 90 | "src/subgraph/divide.c", |
| Marat Dukhan | a160020 | 2020-12-01 22:17:16 -0800 | [diff] [blame] | 91 | "src/subgraph/elu.c", |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 92 | "src/subgraph/floor.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 93 | "src/subgraph/fully-connected.c", |
| Marat Dukhan | a059b7d | 2020-06-11 11:41:27 -0700 | [diff] [blame] | 94 | "src/subgraph/global-average-pooling-2d.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 95 | "src/subgraph/hardswish.c", |
| Marat Dukhan | 5bbebac | 2020-06-10 19:42:15 -0700 | [diff] [blame] | 96 | "src/subgraph/leaky-relu.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 97 | "src/subgraph/max-pooling-2d.c", |
| Marat Dukhan | 9d3a459 | 2020-06-05 16:52:42 -0700 | [diff] [blame] | 98 | "src/subgraph/maximum2.c", |
| 99 | "src/subgraph/minimum2.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 100 | "src/subgraph/multiply2.c", |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 101 | "src/subgraph/negate.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 102 | "src/subgraph/prelu.c", |
| 103 | "src/subgraph/sigmoid.c", |
| 104 | "src/subgraph/softmax.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 105 | "src/subgraph/square-root.c", |
| 106 | "src/subgraph/square.c", |
| 107 | "src/subgraph/squared-difference.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 108 | "src/subgraph/static-constant-pad.c", |
| Marat Dukhan | d27202d | 2020-07-09 23:43:40 -0700 | [diff] [blame] | 109 | "src/subgraph/static-reshape.c", |
| Marat Dukhan | aff24e2 | 2020-07-23 01:43:58 -0700 | [diff] [blame] | 110 | "src/subgraph/static-resize-bilinear-2d.c", |
| Marat Dukhan | 9d3a459 | 2020-06-05 16:52:42 -0700 | [diff] [blame] | 111 | "src/subgraph/subtract.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 112 | "src/subgraph/unpooling-2d.c", |
| 113 | ] |
| 114 | |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 115 | TABLE_SRCS = [ |
| 116 | "src/tables/exp2-k-over-64.c", |
| 117 | "src/tables/exp2-k-over-2048.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 118 | "src/tables/exp2minus-k-over-4.c", |
| 119 | "src/tables/exp2minus-k-over-8.c", |
| Marat Dukhan | c60742b | 2020-11-23 12:33:27 -0800 | [diff] [blame] | 120 | "src/tables/exp2minus-k-over-16.c", |
| Marat Dukhan | 1f256fc | 2020-09-24 21:27:14 -0700 | [diff] [blame] | 121 | "src/tables/exp2minus-k-over-64.c", |
| 122 | "src/tables/exp2minus-k-over-2048.c", |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 123 | ] |
| 124 | |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 125 | PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS = [ |
| 126 | "src/params-init.c", |
| 127 | "src/u8-lut32norm/scalar.c", |
| 128 | "src/x8-lut/gen/lut-scalar-x4.c", |
| 129 | "src/x32-depthtospace2d-chw2hwc/scalar.c", |
| 130 | "src/xx-copy/memcpy.c", |
| 131 | ] |
| 132 | |
| 133 | PROD_SCALAR_AARCH32_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 134f984 | 2021-12-29 19:57:31 -0800 | [diff] [blame] | 134 | "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 135 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 136 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 137 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| 138 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 139 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| 140 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 141 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| 142 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 143 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 144 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| Frank Barchard | 66ae257 | 2021-11-02 17:36:21 -0700 | [diff] [blame] | 145 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 146 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 147 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 148 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 149 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 150 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 151 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 152 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 153 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 154 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 155 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 156 | "src/f32-gavgpool-cw/scalar-x1.c", |
| 157 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 158 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 159 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| 160 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 161 | "src/f32-gemm/gen/1x4-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 162 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 163 | "src/f32-gemm/gen/4x2-scalar.c", |
| 164 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| 165 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 166 | "src/f32-gemm/gen/4x4-scalar.c", |
| 167 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| 168 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 169 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| 170 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 171 | "src/f32-igemm/gen/1x4-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 172 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 173 | "src/f32-igemm/gen/4x2-scalar.c", |
| 174 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| 175 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 176 | "src/f32-igemm/gen/4x4-scalar.c", |
| 177 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 178 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 179 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 180 | "src/f32-prelu/gen/scalar-2x4.c", |
| Marat Dukhan | bdf1099 | 2022-01-04 09:20:14 -0800 | [diff] [blame] | 181 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| 182 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 183 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 184 | "src/f32-rmax/scalar.c", |
| 185 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 186 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 187 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 188 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 189 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 190 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 191 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 192 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| 193 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| 194 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| 195 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| 196 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 197 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| 198 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 199 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 200 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| 201 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| 202 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 203 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 204 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| 205 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 206 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| 207 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| 208 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 209 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| 210 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 211 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 212 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 213 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 214 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 215 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 216 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 217 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 218 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 219 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| 220 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| 221 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 222 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 223 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 224 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 225 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| 226 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 227 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 228 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c", |
| 229 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 230 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 231 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 232 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 233 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 234 | "src/qs8-vadd/gen/minmax-scalar-x1.c", |
| 235 | "src/qs8-vaddc/gen/minmax-scalar-x1.c", |
| 236 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 237 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 238 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 239 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 240 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| 241 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 242 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 243 | "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c", |
| 244 | "src/qu8-gavgpool/7x-minmax-scalar-c1.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 245 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 246 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 247 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 248 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 249 | "src/qu8-vadd/gen/minmax-scalar-x1.c", |
| 250 | "src/qu8-vaddc/gen/minmax-scalar-x1.c", |
| 251 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 252 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 253 | "src/s8-ibilinear/gen/scalar-c1.c", |
| 254 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| 255 | "src/s8-vclamp/scalar-x4.c", |
| 256 | "src/u8-ibilinear/gen/scalar-c1.c", |
| 257 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| 258 | "src/u8-rmax/scalar.c", |
| 259 | "src/u8-vclamp/scalar-x4.c", |
| 260 | "src/x8-zip/x2-scalar.c", |
| 261 | "src/x8-zip/x3-scalar.c", |
| 262 | "src/x8-zip/x4-scalar.c", |
| 263 | "src/x8-zip/xm-scalar.c", |
| 264 | "src/x32-packx/x2-scalar.c", |
| 265 | "src/x32-packx/x3-scalar.c", |
| 266 | "src/x32-packx/x4-scalar.c", |
| 267 | "src/x32-unpool/scalar.c", |
| 268 | "src/x32-zip/x2-scalar.c", |
| 269 | "src/x32-zip/x3-scalar.c", |
| 270 | "src/x32-zip/x4-scalar.c", |
| 271 | "src/x32-zip/xm-scalar.c", |
| 272 | "src/xx-fill/scalar-x16.c", |
| 273 | "src/xx-pad/scalar.c", |
| 274 | ] |
| 275 | |
| 276 | PROD_SCALAR_WASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 134f984 | 2021-12-29 19:57:31 -0800 | [diff] [blame] | 277 | "src/f16-f32-vcvt/gen/vcvt-scalar-x1.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 278 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 279 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 280 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| 281 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 282 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| 283 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 284 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| 285 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| 286 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| 287 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| 288 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| 289 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 290 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 291 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 292 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 293 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 294 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| 295 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 296 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| 297 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 298 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c", |
| 299 | "src/f32-gavgpool-cw/scalar-x1.c", |
| 300 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 301 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 302 | "src/f32-gemm/gen/2x4-minmax-scalar.c", |
| 303 | "src/f32-gemm/gen/2x4-relu-scalar.c", |
| 304 | "src/f32-gemm/gen/2x4-scalar.c", |
| 305 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| 306 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 307 | "src/f32-igemm/gen/2x4-minmax-scalar.c", |
| 308 | "src/f32-igemm/gen/2x4-relu-scalar.c", |
| 309 | "src/f32-igemm/gen/2x4-scalar.c", |
| 310 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 311 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 312 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 313 | "src/f32-prelu/gen/scalar-2x4.c", |
| Marat Dukhan | bdf1099 | 2022-01-04 09:20:14 -0800 | [diff] [blame] | 314 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| 315 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 316 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 317 | "src/f32-rmax/scalar.c", |
| 318 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 319 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 320 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 321 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 322 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 323 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c", |
| 324 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c", |
| 325 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| 326 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| 327 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| 328 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| 329 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 330 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 331 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c", |
| 332 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 333 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| 334 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| 335 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 336 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 337 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| 338 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 339 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| 340 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| 341 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 342 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 343 | "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 344 | "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 345 | "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 346 | "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 347 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 348 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 349 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 350 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 351 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 352 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 353 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 354 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 355 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 356 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 357 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 358 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 359 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 360 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 361 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 362 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 363 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 364 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 365 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 366 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 367 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| 368 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 369 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 370 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 371 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 372 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 373 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 374 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 375 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 376 | "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c", |
| 377 | "src/qu8-gavgpool/7x-minmax-scalar-c1.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 378 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 379 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 380 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 381 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 382 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 383 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 384 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 385 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 386 | "src/s8-ibilinear/gen/scalar-c1.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 387 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 388 | "src/s8-vclamp/scalar-x4.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 389 | "src/u8-ibilinear/gen/scalar-c1.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 390 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| 391 | "src/u8-rmax/scalar.c", |
| 392 | "src/u8-vclamp/scalar-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 393 | "src/x8-zip/x2-scalar.c", |
| 394 | "src/x8-zip/x3-scalar.c", |
| 395 | "src/x8-zip/x4-scalar.c", |
| 396 | "src/x8-zip/xm-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 397 | "src/x32-packx/x2-scalar.c", |
| 398 | "src/x32-packx/x3-scalar.c", |
| 399 | "src/x32-packx/x4-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 400 | "src/x32-unpool/scalar.c", |
| 401 | "src/x32-zip/x2-scalar.c", |
| 402 | "src/x32-zip/x3-scalar.c", |
| 403 | "src/x32-zip/x4-scalar.c", |
| 404 | "src/x32-zip/xm-scalar.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 405 | "src/xx-fill/scalar-x16.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 406 | "src/xx-pad/scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 407 | ] |
| 408 | |
| Marat Dukhan | a198f00 | 2022-01-04 18:45:11 -0800 | [diff] [blame] | 409 | PROD_SCALAR_RISCV_MICROKERNEL_SRCS = [ |
| 410 | "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 411 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 412 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 413 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| 414 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 415 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| 416 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 417 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| 418 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| 419 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| 420 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| 421 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| 422 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 423 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 424 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 425 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 426 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 427 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| 428 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 429 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| 430 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 431 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| 432 | "src/f32-gavgpool-cw/scalar-x1.c", |
| 433 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 434 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 435 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| 436 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 437 | "src/f32-gemm/gen/1x4-scalar.c", |
| 438 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| 439 | "src/f32-gemm/gen/4x2-scalar.c", |
| 440 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| 441 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 442 | "src/f32-gemm/gen/4x4-scalar.c", |
| 443 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| 444 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 445 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| 446 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 447 | "src/f32-igemm/gen/1x4-scalar.c", |
| 448 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| 449 | "src/f32-igemm/gen/4x2-scalar.c", |
| 450 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| 451 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 452 | "src/f32-igemm/gen/4x4-scalar.c", |
| 453 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 454 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 455 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 456 | "src/f32-prelu/gen/scalar-2x4.c", |
| 457 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| 458 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 459 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| Marat Dukhan | a198f00 | 2022-01-04 18:45:11 -0800 | [diff] [blame] | 460 | "src/f32-rmax/scalar.c", |
| 461 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 462 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 463 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 464 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 465 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 466 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| 467 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| 468 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| 469 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| 470 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| 471 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| 472 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 473 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| 474 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| 475 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 476 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| 477 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| 478 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 479 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 480 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| 481 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 482 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| 483 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| 484 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 485 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| 486 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 487 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 488 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 489 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| 490 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| 491 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 492 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 493 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 494 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| 495 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 496 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 497 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 498 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 499 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 500 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 501 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 502 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 503 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 504 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c", |
| 505 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c", |
| 506 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 507 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 508 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 509 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 510 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| 511 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| 512 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 513 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 514 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 515 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| 516 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 517 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 518 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 519 | "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c", |
| 520 | "src/qu8-gavgpool/7x-minmax-scalar-c1.c", |
| 521 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 522 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 523 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 524 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 525 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| 526 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| 527 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 528 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 529 | "src/s8-ibilinear/gen/scalar-c1.c", |
| 530 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| 531 | "src/s8-vclamp/scalar-x4.c", |
| 532 | "src/u8-ibilinear/gen/scalar-c1.c", |
| 533 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| 534 | "src/u8-rmax/scalar.c", |
| 535 | "src/u8-vclamp/scalar-x4.c", |
| 536 | "src/x8-zip/x2-scalar.c", |
| 537 | "src/x8-zip/x3-scalar.c", |
| 538 | "src/x8-zip/x4-scalar.c", |
| 539 | "src/x8-zip/xm-scalar.c", |
| 540 | "src/x32-packx/x2-scalar.c", |
| 541 | "src/x32-packx/x3-scalar.c", |
| 542 | "src/x32-packx/x4-scalar.c", |
| 543 | "src/x32-unpool/scalar.c", |
| 544 | "src/x32-zip/x2-scalar.c", |
| 545 | "src/x32-zip/x3-scalar.c", |
| 546 | "src/x32-zip/x4-scalar.c", |
| 547 | "src/x32-zip/xm-scalar.c", |
| 548 | "src/xx-fill/scalar-x16.c", |
| 549 | "src/xx-pad/scalar.c", |
| 550 | ] |
| 551 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 552 | ALL_SCALAR_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 134f984 | 2021-12-29 19:57:31 -0800 | [diff] [blame] | 553 | "src/f16-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 554 | "src/f16-f32-vcvt/gen/vcvt-scalar-x2.c", |
| 555 | "src/f16-f32-vcvt/gen/vcvt-scalar-x3.c", |
| 556 | "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 557 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 558 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 559 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 560 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 561 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 562 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 563 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 564 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 565 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| 566 | "src/f32-dwconv/gen/up1x3-minmax-scalar.c", |
| 567 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| 568 | "src/f32-dwconv/gen/up1x3-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 569 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 570 | "src/f32-dwconv/gen/up1x4-minmax-scalar.c", |
| 571 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 572 | "src/f32-dwconv/gen/up1x4-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 573 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 574 | "src/f32-dwconv/gen/up1x9-minmax-scalar.c", |
| 575 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 576 | "src/f32-dwconv/gen/up1x9-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 577 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 578 | "src/f32-dwconv/gen/up1x25-minmax-scalar.c", |
| 579 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 580 | "src/f32-dwconv/gen/up1x25-scalar.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 581 | "src/f32-dwconv/gen/up2x3-minmax-scalar-acc2.c", |
| 582 | "src/f32-dwconv/gen/up2x3-minmax-scalar.c", |
| 583 | "src/f32-dwconv/gen/up2x3-scalar-acc2.c", |
| 584 | "src/f32-dwconv/gen/up2x3-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 585 | "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 586 | "src/f32-dwconv/gen/up2x4-minmax-scalar.c", |
| 587 | "src/f32-dwconv/gen/up2x4-scalar-acc2.c", |
| 588 | "src/f32-dwconv/gen/up2x4-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 589 | "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 590 | "src/f32-dwconv/gen/up2x9-minmax-scalar.c", |
| 591 | "src/f32-dwconv/gen/up2x9-scalar-acc2.c", |
| 592 | "src/f32-dwconv/gen/up2x9-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 593 | "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 594 | "src/f32-dwconv/gen/up2x25-minmax-scalar.c", |
| 595 | "src/f32-dwconv/gen/up2x25-scalar-acc2.c", |
| 596 | "src/f32-dwconv/gen/up2x25-scalar.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 597 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c", |
| 598 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c", |
| 599 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c", |
| Marat Dukhan | 91249d2 | 2020-10-24 12:02:51 -0700 | [diff] [blame] | 600 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 601 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| Marat Dukhan | 91249d2 | 2020-10-24 12:02:51 -0700 | [diff] [blame] | 602 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c", |
| 603 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c", |
| 604 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c", |
| 605 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c", |
| 606 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c", |
| Marat Dukhan | cf5b3c3 | 2020-10-25 19:21:10 -0700 | [diff] [blame] | 607 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 608 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c", |
| 609 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 610 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c", |
| Marat Dukhan | cf5b3c3 | 2020-10-25 19:21:10 -0700 | [diff] [blame] | 611 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 612 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c", |
| 613 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c", |
| 614 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c", |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 615 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c", |
| 616 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c", |
| 617 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c", |
| 618 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 619 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c", |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 620 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c", |
| 621 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 622 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c", |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 623 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 624 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c", |
| Marat Dukhan | 29c0c33 | 2020-10-28 22:11:00 -0700 | [diff] [blame] | 625 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c", |
| 626 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c", |
| 627 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c", |
| 628 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 629 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c", |
| 630 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c", |
| 631 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c", |
| 632 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c", |
| 633 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c", |
| 634 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c", |
| Marat Dukhan | 1fe8995 | 2021-11-10 01:27:15 -0800 | [diff] [blame] | 635 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x1.c", |
| 636 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x2.c", |
| 637 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x3.c", |
| 638 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c", |
| 639 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x1.c", |
| 640 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| 641 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x3.c", |
| 642 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x4.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 643 | "src/f32-gavgpool-cw/scalar-x1.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 644 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 645 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 646 | "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c", |
| 647 | "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c", |
| 648 | "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 649 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| 650 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 651 | "src/f32-gemm/gen/1x4-scalar.c", |
| 652 | "src/f32-gemm/gen/2x4-minmax-scalar.c", |
| 653 | "src/f32-gemm/gen/2x4-relu-scalar.c", |
| 654 | "src/f32-gemm/gen/2x4-scalar.c", |
| 655 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| 656 | "src/f32-gemm/gen/4x2-relu-scalar.c", |
| 657 | "src/f32-gemm/gen/4x2-scalar.c", |
| 658 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| 659 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 660 | "src/f32-gemm/gen/4x4-scalar.c", |
| XNNPACK Team | 2143267 | 2020-10-19 19:58:48 -0700 | [diff] [blame] | 661 | "src/f32-ibilinear-chw/gen/scalar-p1.c", |
| 662 | "src/f32-ibilinear-chw/gen/scalar-p2.c", |
| 663 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 664 | "src/f32-ibilinear/gen/scalar-c1.c", |
| 665 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 666 | "src/f32-ibilinear/gen/scalar-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 667 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 668 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 669 | "src/f32-igemm/gen/1x4-scalar.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 670 | "src/f32-igemm/gen/2x4-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 671 | "src/f32-igemm/gen/2x4-relu-scalar.c", |
| 672 | "src/f32-igemm/gen/2x4-scalar.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 673 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 674 | "src/f32-igemm/gen/4x2-relu-scalar.c", |
| 675 | "src/f32-igemm/gen/4x2-scalar.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 676 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 677 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 678 | "src/f32-igemm/gen/4x4-scalar.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 679 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 680 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 681 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 682 | "src/f32-ppmm/gen/2x4-minmax-scalar.c", |
| 683 | "src/f32-ppmm/gen/3x3-minmax-scalar.c", |
| 684 | "src/f32-ppmm/gen/4x2-minmax-scalar.c", |
| 685 | "src/f32-ppmm/gen/4x4-minmax-scalar.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 686 | "src/f32-prelu/gen/scalar-2x1.c", |
| 687 | "src/f32-prelu/gen/scalar-2x4.c", |
| Marat Dukhan | bdf1099 | 2022-01-04 09:20:14 -0800 | [diff] [blame] | 688 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x1.c", |
| 689 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x2.c", |
| 690 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x3.c", |
| 691 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x4.c", |
| 692 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| 693 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x2.c", |
| 694 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x3.c", |
| 695 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| Marat Dukhan | f721e37 | 2022-01-04 10:41:12 -0800 | [diff] [blame] | 696 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x1.c", |
| 697 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x2.c", |
| 698 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x3.c", |
| 699 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| Marat Dukhan | bdf1099 | 2022-01-04 09:20:14 -0800 | [diff] [blame] | 700 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x1.c", |
| 701 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x2.c", |
| 702 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x3.c", |
| 703 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x4.c", |
| 704 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| 705 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x2.c", |
| 706 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x3.c", |
| 707 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| Marat Dukhan | f721e37 | 2022-01-04 10:41:12 -0800 | [diff] [blame] | 708 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x1.c", |
| 709 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x2.c", |
| 710 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x3.c", |
| 711 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 712 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x1.c", |
| 713 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x2-acc2.c", |
| 714 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x2.c", |
| 715 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4-acc2.c", |
| 716 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4-acc4.c", |
| 717 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4.c", |
| 718 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x1.c", |
| 719 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x2-acc2.c", |
| 720 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x2.c", |
| 721 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| 722 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc4.c", |
| 723 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 724 | "src/f32-rmax/scalar.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 725 | "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c", |
| 726 | "src/f32-spmm/gen/1x1-minmax-scalar.c", |
| 727 | "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c", |
| 728 | "src/f32-spmm/gen/2x1-minmax-scalar.c", |
| 729 | "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c", |
| 730 | "src/f32-spmm/gen/4x1-minmax-scalar.c", |
| 731 | "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c", |
| 732 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 733 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 734 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 735 | "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c", |
| 736 | "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c", |
| 737 | "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 738 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 739 | "src/f32-vbinary/gen/vadd-relu-scalar-x1.c", |
| 740 | "src/f32-vbinary/gen/vadd-relu-scalar-x2.c", |
| 741 | "src/f32-vbinary/gen/vadd-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 742 | "src/f32-vbinary/gen/vadd-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 743 | "src/f32-vbinary/gen/vadd-scalar-x1.c", |
| 744 | "src/f32-vbinary/gen/vadd-scalar-x2.c", |
| 745 | "src/f32-vbinary/gen/vadd-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 746 | "src/f32-vbinary/gen/vadd-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 747 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c", |
| 748 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c", |
| 749 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 750 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 751 | "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c", |
| 752 | "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c", |
| 753 | "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 754 | "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 755 | "src/f32-vbinary/gen/vaddc-scalar-x1.c", |
| 756 | "src/f32-vbinary/gen/vaddc-scalar-x2.c", |
| 757 | "src/f32-vbinary/gen/vaddc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 758 | "src/f32-vbinary/gen/vaddc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 759 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c", |
| 760 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| 761 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 762 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 763 | "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c", |
| 764 | "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c", |
| 765 | "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 766 | "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 767 | "src/f32-vbinary/gen/vdiv-scalar-x1.c", |
| 768 | "src/f32-vbinary/gen/vdiv-scalar-x2.c", |
| 769 | "src/f32-vbinary/gen/vdiv-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 770 | "src/f32-vbinary/gen/vdiv-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 771 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c", |
| 772 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| 773 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 774 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 775 | "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c", |
| 776 | "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c", |
| 777 | "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 778 | "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 779 | "src/f32-vbinary/gen/vdivc-scalar-x1.c", |
| 780 | "src/f32-vbinary/gen/vdivc-scalar-x2.c", |
| 781 | "src/f32-vbinary/gen/vdivc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 782 | "src/f32-vbinary/gen/vdivc-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 783 | "src/f32-vbinary/gen/vmax-scalar-x1.c", |
| 784 | "src/f32-vbinary/gen/vmax-scalar-x2.c", |
| 785 | "src/f32-vbinary/gen/vmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 786 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 787 | "src/f32-vbinary/gen/vmaxc-scalar-x1.c", |
| 788 | "src/f32-vbinary/gen/vmaxc-scalar-x2.c", |
| 789 | "src/f32-vbinary/gen/vmaxc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 790 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 791 | "src/f32-vbinary/gen/vmin-scalar-x1.c", |
| 792 | "src/f32-vbinary/gen/vmin-scalar-x2.c", |
| 793 | "src/f32-vbinary/gen/vmin-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 794 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 795 | "src/f32-vbinary/gen/vminc-scalar-x1.c", |
| 796 | "src/f32-vbinary/gen/vminc-scalar-x2.c", |
| 797 | "src/f32-vbinary/gen/vminc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 798 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 799 | "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c", |
| 800 | "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c", |
| 801 | "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 802 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 803 | "src/f32-vbinary/gen/vmul-relu-scalar-x1.c", |
| 804 | "src/f32-vbinary/gen/vmul-relu-scalar-x2.c", |
| 805 | "src/f32-vbinary/gen/vmul-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 806 | "src/f32-vbinary/gen/vmul-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 807 | "src/f32-vbinary/gen/vmul-scalar-x1.c", |
| 808 | "src/f32-vbinary/gen/vmul-scalar-x2.c", |
| 809 | "src/f32-vbinary/gen/vmul-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 810 | "src/f32-vbinary/gen/vmul-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 811 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c", |
| 812 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c", |
| 813 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 814 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 815 | "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c", |
| 816 | "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c", |
| 817 | "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 818 | "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 819 | "src/f32-vbinary/gen/vmulc-scalar-x1.c", |
| 820 | "src/f32-vbinary/gen/vmulc-scalar-x2.c", |
| 821 | "src/f32-vbinary/gen/vmulc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 822 | "src/f32-vbinary/gen/vmulc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 823 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c", |
| 824 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| 825 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 826 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 827 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c", |
| 828 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c", |
| 829 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 830 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 831 | "src/f32-vbinary/gen/vrdivc-scalar-x1.c", |
| 832 | "src/f32-vbinary/gen/vrdivc-scalar-x2.c", |
| 833 | "src/f32-vbinary/gen/vrdivc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 834 | "src/f32-vbinary/gen/vrdivc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 835 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c", |
| 836 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c", |
| 837 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 838 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 839 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c", |
| 840 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c", |
| 841 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 842 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 843 | "src/f32-vbinary/gen/vrsubc-scalar-x1.c", |
| 844 | "src/f32-vbinary/gen/vrsubc-scalar-x2.c", |
| 845 | "src/f32-vbinary/gen/vrsubc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 846 | "src/f32-vbinary/gen/vrsubc-scalar-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 847 | "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c", |
| 848 | "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c", |
| 849 | "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 850 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 851 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c", |
| 852 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c", |
| 853 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 854 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 855 | "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c", |
| 856 | "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c", |
| 857 | "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 858 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 859 | "src/f32-vbinary/gen/vsub-relu-scalar-x1.c", |
| 860 | "src/f32-vbinary/gen/vsub-relu-scalar-x2.c", |
| 861 | "src/f32-vbinary/gen/vsub-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 862 | "src/f32-vbinary/gen/vsub-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 863 | "src/f32-vbinary/gen/vsub-scalar-x1.c", |
| 864 | "src/f32-vbinary/gen/vsub-scalar-x2.c", |
| 865 | "src/f32-vbinary/gen/vsub-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 866 | "src/f32-vbinary/gen/vsub-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 867 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c", |
| 868 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c", |
| 869 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 870 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 871 | "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c", |
| 872 | "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c", |
| 873 | "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 874 | "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 875 | "src/f32-vbinary/gen/vsubc-scalar-x1.c", |
| 876 | "src/f32-vbinary/gen/vsubc-scalar-x2.c", |
| 877 | "src/f32-vbinary/gen/vsubc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 878 | "src/f32-vbinary/gen/vsubc-scalar-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 879 | "src/f32-vclamp/gen/vclamp-scalar-x1.c", |
| 880 | "src/f32-vclamp/gen/vclamp-scalar-x2.c", |
| 881 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 882 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c", |
| 883 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c", |
| 884 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c", |
| 885 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 886 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c", |
| 887 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c", |
| 888 | "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c", |
| 889 | "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c", |
| 890 | "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c", |
| 891 | "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c", |
| 892 | "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c", |
| 893 | "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 894 | "src/f32-vhswish/gen/vhswish-scalar-x1.c", |
| 895 | "src/f32-vhswish/gen/vhswish-scalar-x2.c", |
| 896 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 897 | "src/f32-vlrelu/gen/vlrelu-scalar-x1.c", |
| 898 | "src/f32-vlrelu/gen/vlrelu-scalar-x2.c", |
| 899 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 900 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 901 | "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c", |
| 902 | "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 903 | "src/f32-vrelu/gen/vrelu-scalar-x1.c", |
| 904 | "src/f32-vrelu/gen/vrelu-scalar-x2.c", |
| 905 | "src/f32-vrelu/gen/vrelu-scalar-x4.c", |
| 906 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 907 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 908 | "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c", |
| 909 | "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 910 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 911 | "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c", |
| 912 | "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c", |
| 913 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 914 | "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c", |
| 915 | "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c", |
| 916 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| 917 | "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c", |
| 918 | "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 919 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x1.c", |
| 920 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| 921 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x4.c", |
| 922 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x1.c", |
| 923 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x2.c", |
| 924 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x4.c", |
| 925 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x1.c", |
| 926 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x2.c", |
| 927 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x4.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 928 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 929 | "src/f32-vsqrt/gen/scalar-sqrt-x2.c", |
| 930 | "src/f32-vsqrt/gen/scalar-sqrt-x4.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 931 | "src/f32-vunary/gen/vabs-scalar-x1.c", |
| 932 | "src/f32-vunary/gen/vabs-scalar-x2.c", |
| 933 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 934 | "src/f32-vunary/gen/vneg-scalar-x1.c", |
| 935 | "src/f32-vunary/gen/vneg-scalar-x2.c", |
| 936 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 937 | "src/f32-vunary/gen/vsqr-scalar-x1.c", |
| 938 | "src/f32-vunary/gen/vsqr-scalar-x2.c", |
| 939 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| Marat Dukhan | 78f039d | 2021-11-09 16:42:27 -0800 | [diff] [blame] | 940 | "src/math/cvt-f32-f16-scalar-bitcast.c", |
| 941 | "src/math/cvt-f32-f16-scalar-fabsf.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 942 | "src/math/expm1minus-scalar-rr2-lut4-p4.c", |
| 943 | "src/math/expm1minus-scalar-rr2-lut8-p3.c", |
| 944 | "src/math/expm1minus-scalar-rr2-lut8-p4.c", |
| Marat Dukhan | c60742b | 2020-11-23 12:33:27 -0800 | [diff] [blame] | 945 | "src/math/expm1minus-scalar-rr2-lut16-p3.c", |
| 946 | "src/math/expm1minus-scalar-rr2-lut16-p4.c", |
| 947 | "src/math/expm1minus-scalar-rr2-p5.c", |
| 948 | "src/math/expm1minus-scalar-rr2-p6.c", |
| Frank Barchard | 2213606 | 2020-11-24 18:44:46 -0800 | [diff] [blame] | 949 | "src/math/expminus-scalar-rr2-lut64-p2.c", |
| 950 | "src/math/expminus-scalar-rr2-lut2048-p1.c", |
| 951 | "src/math/expminus-scalar-rr2-p5.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 952 | "src/math/roundd-scalar-addsub.c", |
| 953 | "src/math/roundd-scalar-cvt.c", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 954 | "src/math/roundd-scalar-floor.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 955 | "src/math/roundne-scalar-addsub.c", |
| 956 | "src/math/roundne-scalar-nearbyint.c", |
| 957 | "src/math/roundne-scalar-rint.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 958 | "src/math/roundu-scalar-addsub.c", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 959 | "src/math/roundu-scalar-ceil.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 960 | "src/math/roundu-scalar-cvt.c", |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 961 | "src/math/roundz-scalar-addsub.c", |
| 962 | "src/math/roundz-scalar-cvt.c", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 963 | "src/math/roundz-scalar-trunc.c", |
| Marat Dukhan | f8475d6 | 2020-09-17 15:01:43 -0700 | [diff] [blame] | 964 | "src/math/sigmoid-scalar-rr2-lut64-p2-div.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 965 | "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c", |
| Marat Dukhan | f8475d6 | 2020-09-17 15:01:43 -0700 | [diff] [blame] | 966 | "src/math/sigmoid-scalar-rr2-p5-div.c", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 967 | "src/params-init.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 968 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 969 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c", |
| 970 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 971 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 972 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 973 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 974 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 975 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 976 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 977 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 978 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c", |
| 979 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 980 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 981 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c", |
| 982 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 983 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 984 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c", |
| 985 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 986 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 987 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 988 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 989 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 990 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 991 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 992 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 993 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 994 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 995 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 996 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 997 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 998 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 999 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1000 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1001 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1002 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1003 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1004 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1005 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1006 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1007 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1008 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1009 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1010 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1011 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1012 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1013 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1014 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1015 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1016 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1017 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1018 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1019 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1020 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1021 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1022 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1023 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1024 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1025 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1026 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1027 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1028 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1029 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1030 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1031 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1032 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1033 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1034 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1035 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c", |
| 1036 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1037 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1038 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 1039 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1040 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1041 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 1042 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1043 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1044 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c", |
| 1045 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1046 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1047 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c", |
| 1048 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1049 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1050 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c", |
| 1051 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 86bd270 | 2021-12-10 02:19:56 -0800 | [diff] [blame] | 1052 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 1053 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x2.c", |
| 1054 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x3.c", |
| 1055 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | 047b620 | 2021-05-11 20:32:25 -0700 | [diff] [blame] | 1056 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c", |
| 1057 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c", |
| 1058 | "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c", |
| 1059 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c", |
| 1060 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c", |
| 1061 | "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1062 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1063 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1064 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1065 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1066 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1067 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1068 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1069 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1070 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1071 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1072 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1073 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1074 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1075 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1076 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1077 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1078 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1079 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1080 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1081 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1082 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1083 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1084 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1085 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1086 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1087 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1088 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1089 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1090 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1091 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1092 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1093 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1094 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1095 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1096 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1097 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1098 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1099 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1100 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1101 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1102 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1103 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1104 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1105 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1106 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1107 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1108 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1109 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1110 | "src/qs8-requantization/fp32-scalar-fmagic.c", |
| Frank Barchard | cccb012 | 2022-01-04 15:24:00 -0800 | [diff] [blame] | 1111 | "src/qs8-requantization/fp32-scalar-lrintf.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 1112 | "src/qs8-requantization/gemmlowp-scalar.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 1113 | "src/qs8-requantization/rndna-scalar-signed64.c", |
| 1114 | "src/qs8-requantization/rndna-scalar-unsigned32.c", |
| 1115 | "src/qs8-requantization/rndna-scalar-unsigned64.c", |
| Marat Dukhan | 062bee3 | 2021-05-27 20:31:07 -0700 | [diff] [blame] | 1116 | "src/qs8-requantization/rndnu-scalar.c", |
| Marat Dukhan | d481c28 | 2021-05-11 23:48:31 -0700 | [diff] [blame] | 1117 | "src/qs8-vadd/gen/minmax-scalar-x1.c", |
| 1118 | "src/qs8-vadd/gen/minmax-scalar-x2.c", |
| 1119 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| 1120 | "src/qs8-vaddc/gen/minmax-scalar-x1.c", |
| 1121 | "src/qs8-vaddc/gen/minmax-scalar-x2.c", |
| 1122 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 7999341 | 2021-08-02 15:02:57 -0700 | [diff] [blame] | 1123 | "src/qs8-vmul/gen/minmax-fp32-scalar-x1.c", |
| 1124 | "src/qs8-vmul/gen/minmax-fp32-scalar-x2.c", |
| 1125 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 1126 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x1.c", |
| 1127 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x2.c", |
| 1128 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 1129 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 1130 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1131 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1132 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c", |
| 1133 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1134 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1135 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 1136 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1137 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1138 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 1139 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1140 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1141 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c", |
| 1142 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1143 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1144 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c", |
| 1145 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1146 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1147 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c", |
| 1148 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 86bd270 | 2021-12-10 02:19:56 -0800 | [diff] [blame] | 1149 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 1150 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x2.c", |
| 1151 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x3.c", |
| 1152 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 1153 | "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c", |
| 1154 | "src/qu8-gavgpool/7x-minmax-scalar-c1.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1155 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1156 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1157 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1158 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1159 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1160 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1161 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1162 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1163 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1164 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1165 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1166 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1167 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1168 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1169 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1170 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1171 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1172 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1173 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1174 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1175 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1176 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1177 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1178 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1179 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1180 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1181 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1182 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1183 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1184 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1185 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1186 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1187 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1188 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1189 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1190 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1191 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1192 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1193 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1194 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1195 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1196 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1197 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1198 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1199 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1200 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1201 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1202 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1203 | "src/qu8-requantization/fp32-scalar-fmagic.c", |
| Frank Barchard | cccb012 | 2022-01-04 15:24:00 -0800 | [diff] [blame] | 1204 | "src/qu8-requantization/fp32-scalar-lrintf.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 1205 | "src/qu8-requantization/gemmlowp-scalar.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 1206 | "src/qu8-requantization/rndna-scalar-signed64.c", |
| 1207 | "src/qu8-requantization/rndna-scalar-unsigned32.c", |
| 1208 | "src/qu8-requantization/rndna-scalar-unsigned64.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 1209 | "src/qu8-vadd/gen/minmax-scalar-x1.c", |
| 1210 | "src/qu8-vadd/gen/minmax-scalar-x2.c", |
| 1211 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| 1212 | "src/qu8-vaddc/gen/minmax-scalar-x1.c", |
| 1213 | "src/qu8-vaddc/gen/minmax-scalar-x2.c", |
| 1214 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 7999341 | 2021-08-02 15:02:57 -0700 | [diff] [blame] | 1215 | "src/qu8-vmul/gen/minmax-fp32-scalar-x1.c", |
| 1216 | "src/qu8-vmul/gen/minmax-fp32-scalar-x2.c", |
| 1217 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 1218 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x1.c", |
| 1219 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x2.c", |
| 1220 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 6a69c8e | 2021-11-24 15:00:59 -0800 | [diff] [blame] | 1221 | "src/s8-ibilinear/gen/scalar-c1.c", |
| 1222 | "src/s8-ibilinear/gen/scalar-c2.c", |
| 1223 | "src/s8-ibilinear/gen/scalar-c4.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 1224 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 1225 | "src/s8-vclamp/scalar-x4.c", |
| Marat Dukhan | 6a69c8e | 2021-11-24 15:00:59 -0800 | [diff] [blame] | 1226 | "src/u8-ibilinear/gen/scalar-c1.c", |
| 1227 | "src/u8-ibilinear/gen/scalar-c2.c", |
| 1228 | "src/u8-ibilinear/gen/scalar-c4.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1229 | "src/u8-lut32norm/scalar.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1230 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1231 | "src/u8-rmax/scalar.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 1232 | "src/u8-vclamp/scalar-x4.c", |
| Marat Dukhan | d67539d | 2021-09-08 23:06:03 -0700 | [diff] [blame] | 1233 | "src/x8-lut/gen/lut-scalar-x1.c", |
| 1234 | "src/x8-lut/gen/lut-scalar-x2.c", |
| 1235 | "src/x8-lut/gen/lut-scalar-x4.c", |
| 1236 | "src/x8-lut/gen/lut-scalar-x8.c", |
| 1237 | "src/x8-lut/gen/lut-scalar-x16.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1238 | "src/x8-zip/x2-scalar.c", |
| 1239 | "src/x8-zip/x3-scalar.c", |
| 1240 | "src/x8-zip/x4-scalar.c", |
| 1241 | "src/x8-zip/xm-scalar.c", |
| Marat Dukhan | ad71b9a | 2020-11-20 00:01:51 -0800 | [diff] [blame] | 1242 | "src/x32-depthtospace2d-chw2hwc/scalar.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1243 | "src/x32-packx/x2-scalar.c", |
| 1244 | "src/x32-packx/x3-scalar.c", |
| 1245 | "src/x32-packx/x4-scalar.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1246 | "src/x32-unpool/scalar.c", |
| 1247 | "src/x32-zip/x2-scalar.c", |
| 1248 | "src/x32-zip/x3-scalar.c", |
| 1249 | "src/x32-zip/x4-scalar.c", |
| 1250 | "src/x32-zip/xm-scalar.c", |
| Marat Dukhan | 048931b | 2020-11-24 20:53:54 -0800 | [diff] [blame] | 1251 | "src/xx-copy/memcpy.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 1252 | "src/xx-fill/scalar-x16.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 1253 | "src/xx-pad/scalar.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1254 | ] |
| 1255 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 1256 | ALL_WASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1257 | "src/f32-avgpool/9p8x-minmax-wasm-c1.c", |
| 1258 | "src/f32-avgpool/9x-minmax-wasm-c1.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 1259 | "src/f32-dwconv/gen/up1x3-minmax-wasm-acc2.c", |
| 1260 | "src/f32-dwconv/gen/up1x3-minmax-wasm.c", |
| 1261 | "src/f32-dwconv/gen/up1x3-wasm-acc2.c", |
| 1262 | "src/f32-dwconv/gen/up1x3-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1263 | "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c", |
| 1264 | "src/f32-dwconv/gen/up1x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1265 | "src/f32-dwconv/gen/up1x4-wasm-acc2.c", |
| 1266 | "src/f32-dwconv/gen/up1x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1267 | "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c", |
| 1268 | "src/f32-dwconv/gen/up1x9-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1269 | "src/f32-dwconv/gen/up1x9-wasm-acc2.c", |
| 1270 | "src/f32-dwconv/gen/up1x9-wasm.c", |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 1271 | "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c", |
| 1272 | "src/f32-dwconv/gen/up1x25-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1273 | "src/f32-dwconv/gen/up1x25-wasm-acc2.c", |
| 1274 | "src/f32-dwconv/gen/up1x25-wasm.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 1275 | "src/f32-dwconv/gen/up2x3-minmax-wasm-acc2.c", |
| 1276 | "src/f32-dwconv/gen/up2x3-minmax-wasm.c", |
| 1277 | "src/f32-dwconv/gen/up2x3-wasm-acc2.c", |
| 1278 | "src/f32-dwconv/gen/up2x3-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1279 | "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c", |
| 1280 | "src/f32-dwconv/gen/up2x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1281 | "src/f32-dwconv/gen/up2x4-wasm-acc2.c", |
| 1282 | "src/f32-dwconv/gen/up2x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1283 | "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c", |
| 1284 | "src/f32-dwconv/gen/up2x9-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1285 | "src/f32-dwconv/gen/up2x9-wasm-acc2.c", |
| 1286 | "src/f32-dwconv/gen/up2x9-wasm.c", |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 1287 | "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c", |
| 1288 | "src/f32-dwconv/gen/up2x25-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1289 | "src/f32-dwconv/gen/up2x25-wasm-acc2.c", |
| 1290 | "src/f32-dwconv/gen/up2x25-wasm.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1291 | "src/f32-gavgpool/7p7x-minmax-wasm-c1.c", |
| 1292 | "src/f32-gavgpool/7x-minmax-wasm-c1.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1293 | "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c", |
| 1294 | "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c", |
| 1295 | "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c", |
| 1296 | "src/f32-gemm/gen/1x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1297 | "src/f32-gemm/gen/1x4-relu-wasm.c", |
| 1298 | "src/f32-gemm/gen/1x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1299 | "src/f32-gemm/gen/2x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1300 | "src/f32-gemm/gen/2x4-relu-wasm.c", |
| 1301 | "src/f32-gemm/gen/2x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1302 | "src/f32-gemm/gen/4x2-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1303 | "src/f32-gemm/gen/4x2-relu-wasm.c", |
| 1304 | "src/f32-gemm/gen/4x2-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1305 | "src/f32-gemm/gen/4x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1306 | "src/f32-gemm/gen/4x4-relu-wasm.c", |
| 1307 | "src/f32-gemm/gen/4x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1308 | "src/f32-igemm/gen/1x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1309 | "src/f32-igemm/gen/1x4-relu-wasm.c", |
| 1310 | "src/f32-igemm/gen/1x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1311 | "src/f32-igemm/gen/2x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1312 | "src/f32-igemm/gen/2x4-relu-wasm.c", |
| 1313 | "src/f32-igemm/gen/2x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1314 | "src/f32-igemm/gen/4x2-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1315 | "src/f32-igemm/gen/4x2-relu-wasm.c", |
| 1316 | "src/f32-igemm/gen/4x2-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1317 | "src/f32-igemm/gen/4x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1318 | "src/f32-igemm/gen/4x4-relu-wasm.c", |
| 1319 | "src/f32-igemm/gen/4x4-wasm.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1320 | "src/f32-maxpool/9p8x-minmax-wasm-c1.c", |
| Frank Barchard | cb052a3 | 2021-12-10 14:16:33 -0800 | [diff] [blame] | 1321 | "src/f32-pavgpool/9p8x-minmax-wasm-c1.c", |
| 1322 | "src/f32-pavgpool/9x-minmax-wasm-c1.c", |
| 1323 | "src/f32-prelu/gen/wasm-2x1.c", |
| 1324 | "src/f32-prelu/gen/wasm-2x4.c", |
| Marat Dukhan | bdf1099 | 2022-01-04 09:20:14 -0800 | [diff] [blame] | 1325 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x1.c", |
| 1326 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x2.c", |
| 1327 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x3.c", |
| 1328 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x4.c", |
| 1329 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x1.c", |
| 1330 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x2.c", |
| 1331 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x3.c", |
| 1332 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x4.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 1333 | "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c", |
| 1334 | "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c", |
| 1335 | "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1336 | "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1337 | "src/f32-vbinary/gen/vadd-relu-wasm-x1.c", |
| 1338 | "src/f32-vbinary/gen/vadd-relu-wasm-x2.c", |
| 1339 | "src/f32-vbinary/gen/vadd-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1340 | "src/f32-vbinary/gen/vadd-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1341 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c", |
| 1342 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c", |
| 1343 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c", |
| 1344 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1345 | "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c", |
| 1346 | "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c", |
| 1347 | "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1348 | "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1349 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c", |
| 1350 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c", |
| 1351 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c", |
| 1352 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1353 | "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c", |
| 1354 | "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c", |
| 1355 | "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1356 | "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1357 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c", |
| 1358 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c", |
| 1359 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c", |
| 1360 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1361 | "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c", |
| 1362 | "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c", |
| 1363 | "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1364 | "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1365 | "src/f32-vbinary/gen/vmax-wasm-x1.c", |
| 1366 | "src/f32-vbinary/gen/vmax-wasm-x2.c", |
| 1367 | "src/f32-vbinary/gen/vmax-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1368 | "src/f32-vbinary/gen/vmax-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1369 | "src/f32-vbinary/gen/vmaxc-wasm-x1.c", |
| 1370 | "src/f32-vbinary/gen/vmaxc-wasm-x2.c", |
| 1371 | "src/f32-vbinary/gen/vmaxc-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1372 | "src/f32-vbinary/gen/vmaxc-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1373 | "src/f32-vbinary/gen/vmin-wasm-x1.c", |
| 1374 | "src/f32-vbinary/gen/vmin-wasm-x2.c", |
| 1375 | "src/f32-vbinary/gen/vmin-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1376 | "src/f32-vbinary/gen/vmin-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1377 | "src/f32-vbinary/gen/vminc-wasm-x1.c", |
| 1378 | "src/f32-vbinary/gen/vminc-wasm-x2.c", |
| 1379 | "src/f32-vbinary/gen/vminc-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1380 | "src/f32-vbinary/gen/vminc-wasm-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 1381 | "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c", |
| 1382 | "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c", |
| 1383 | "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1384 | "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1385 | "src/f32-vbinary/gen/vmul-relu-wasm-x1.c", |
| 1386 | "src/f32-vbinary/gen/vmul-relu-wasm-x2.c", |
| 1387 | "src/f32-vbinary/gen/vmul-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1388 | "src/f32-vbinary/gen/vmul-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1389 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c", |
| 1390 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c", |
| 1391 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c", |
| 1392 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1393 | "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c", |
| 1394 | "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c", |
| 1395 | "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1396 | "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1397 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c", |
| 1398 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c", |
| 1399 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c", |
| 1400 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1401 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c", |
| 1402 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c", |
| 1403 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1404 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1405 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c", |
| 1406 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c", |
| 1407 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c", |
| 1408 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1409 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c", |
| 1410 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c", |
| 1411 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1412 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1413 | "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c", |
| 1414 | "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c", |
| 1415 | "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c", |
| 1416 | "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1417 | "src/f32-vbinary/gen/vsub-relu-wasm-x1.c", |
| 1418 | "src/f32-vbinary/gen/vsub-relu-wasm-x2.c", |
| 1419 | "src/f32-vbinary/gen/vsub-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1420 | "src/f32-vbinary/gen/vsub-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1421 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c", |
| 1422 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c", |
| 1423 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c", |
| 1424 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1425 | "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c", |
| 1426 | "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c", |
| 1427 | "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1428 | "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 1429 | "src/f32-vclamp/gen/vclamp-wasm-x1.c", |
| 1430 | "src/f32-vclamp/gen/vclamp-wasm-x2.c", |
| 1431 | "src/f32-vclamp/gen/vclamp-wasm-x4.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1432 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c", |
| 1433 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c", |
| 1434 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c", |
| 1435 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c", |
| 1436 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c", |
| 1437 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c", |
| 1438 | "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c", |
| 1439 | "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c", |
| 1440 | "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c", |
| 1441 | "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c", |
| 1442 | "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c", |
| 1443 | "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 1444 | "src/f32-vhswish/gen/vhswish-wasm-x1.c", |
| 1445 | "src/f32-vhswish/gen/vhswish-wasm-x2.c", |
| 1446 | "src/f32-vhswish/gen/vhswish-wasm-x4.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 1447 | "src/f32-vlrelu/gen/vlrelu-wasm-x1.c", |
| 1448 | "src/f32-vlrelu/gen/vlrelu-wasm-x2.c", |
| 1449 | "src/f32-vlrelu/gen/vlrelu-wasm-x4.c", |
| Frank Barchard | d4416d6 | 2021-05-17 15:51:37 -0700 | [diff] [blame] | 1450 | "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c", |
| 1451 | "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c", |
| 1452 | "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 1453 | "src/f32-vrelu/gen/vrelu-wasm-x1.c", |
| 1454 | "src/f32-vrelu/gen/vrelu-wasm-x2.c", |
| 1455 | "src/f32-vrelu/gen/vrelu-wasm-x4.c", |
| 1456 | "src/f32-vrelu/gen/vrelu-wasm-x8.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 1457 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-wasm-fmagic.c", |
| 1458 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-wasm-fmagic.c", |
| 1459 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-wasm-fmagic.c", |
| 1460 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-wasm-fmagic.c", |
| 1461 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-wasm-fmagic.c", |
| 1462 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-wasm-fmagic.c", |
| 1463 | "src/qc8-gemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1464 | "src/qc8-gemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1465 | "src/qc8-gemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1466 | "src/qc8-gemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1467 | "src/qc8-gemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1468 | "src/qc8-gemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1469 | "src/qc8-gemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1470 | "src/qc8-gemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1471 | "src/qc8-igemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1472 | "src/qc8-igemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1473 | "src/qc8-igemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1474 | "src/qc8-igemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1475 | "src/qc8-igemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1476 | "src/qc8-igemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1477 | "src/qc8-igemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1478 | "src/qc8-igemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1479 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-wasm-fmagic.c", |
| 1480 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-wasm-fmagic.c", |
| 1481 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-wasm-fmagic.c", |
| 1482 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-wasm-fmagic.c", |
| 1483 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-wasm-fmagic.c", |
| 1484 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-wasm-fmagic.c", |
| 1485 | "src/qs8-gemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1486 | "src/qs8-gemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1487 | "src/qs8-gemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1488 | "src/qs8-gemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1489 | "src/qs8-gemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1490 | "src/qs8-gemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1491 | "src/qs8-gemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1492 | "src/qs8-gemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1493 | "src/qs8-igemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1494 | "src/qs8-igemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1495 | "src/qs8-igemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1496 | "src/qs8-igemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1497 | "src/qs8-igemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1498 | "src/qs8-igemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1499 | "src/qs8-igemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1500 | "src/qs8-igemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1501 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-wasm-fmagic.c", |
| 1502 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-wasm-fmagic.c", |
| 1503 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-wasm-fmagic.c", |
| 1504 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-wasm-fmagic.c", |
| 1505 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-wasm-fmagic.c", |
| 1506 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-wasm-fmagic.c", |
| 1507 | "src/qu8-gemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1508 | "src/qu8-gemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1509 | "src/qu8-gemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1510 | "src/qu8-gemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1511 | "src/qu8-gemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1512 | "src/qu8-gemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1513 | "src/qu8-gemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1514 | "src/qu8-gemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1515 | "src/qu8-igemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1516 | "src/qu8-igemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1517 | "src/qu8-igemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1518 | "src/qu8-igemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1519 | "src/qu8-igemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1520 | "src/qu8-igemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1521 | "src/qu8-igemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1522 | "src/qu8-igemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1523 | ] |
| 1524 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 1525 | ALL_WASMSIMD_MICROKERNEL_SRCS = [ |
| Marat Dukhan | f6507f8 | 2021-10-16 18:13:04 -0700 | [diff] [blame] | 1526 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x8.c", |
| 1527 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x16.c", |
| 1528 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x24.c", |
| 1529 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x32.c", |
| 1530 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x8.c", |
| 1531 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x16.c", |
| 1532 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x24.c", |
| 1533 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x32.c", |
| Marat Dukhan | 40f0552 | 2020-07-16 22:33:12 -0700 | [diff] [blame] | 1534 | "src/f32-argmaxpool/4x-wasmsimd-c4.c", |
| 1535 | "src/f32-argmaxpool/9p8x-wasmsimd-c4.c", |
| 1536 | "src/f32-argmaxpool/9x-wasmsimd-c4.c", |
| Marat Dukhan | 3b7432d | 2020-07-16 17:46:32 -0700 | [diff] [blame] | 1537 | "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1538 | "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| 1539 | "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c", |
| 1540 | "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c", |
| Frank Barchard | 2213606 | 2020-11-24 18:44:46 -0800 | [diff] [blame] | 1541 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 1542 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-arm-acc2.c", |
| 1543 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-arm.c", |
| 1544 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-x86-acc2.c", |
| 1545 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-x86.c", |
| Frank Barchard | 66ae257 | 2021-11-02 17:36:21 -0700 | [diff] [blame] | 1546 | "src/f32-dwconv/gen/up4x3-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1547 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1548 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1549 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1550 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1551 | "src/f32-dwconv/gen/up4x4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1552 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1553 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1554 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1555 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1556 | "src/f32-dwconv/gen/up4x9-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1557 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1558 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1559 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1560 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c", |
| 1561 | "src/f32-dwconv/gen/up4x25-wasmsimd.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 1562 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-arm-acc2.c", |
| 1563 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-arm.c", |
| 1564 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-x86-acc2.c", |
| 1565 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-x86.c", |
| Frank Barchard | 66ae257 | 2021-11-02 17:36:21 -0700 | [diff] [blame] | 1566 | "src/f32-dwconv/gen/up8x3-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1567 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1568 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1569 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1570 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1571 | "src/f32-dwconv/gen/up8x4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1572 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1573 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1574 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1575 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1576 | "src/f32-dwconv/gen/up8x9-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1577 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1578 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1579 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1580 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c", |
| 1581 | "src/f32-dwconv/gen/up8x25-wasmsimd.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1582 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1583 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1584 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1585 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1586 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1587 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1588 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1589 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| 1590 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c", |
| 1591 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c", |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 1592 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1593 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1594 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1595 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c", |
| 1596 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1597 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c", |
| 1598 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c", |
| 1599 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c", |
| 1600 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c", |
| 1601 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1602 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1603 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1604 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1605 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1606 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1607 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1608 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1609 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| 1610 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c", |
| 1611 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c", |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 1612 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1613 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1614 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1615 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c", |
| 1616 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1617 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c", |
| 1618 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c", |
| 1619 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c", |
| 1620 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c", |
| 1621 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c", |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 1622 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1623 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1624 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1625 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1626 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1627 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1628 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1629 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1630 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1631 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1632 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1633 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c", |
| 1634 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1635 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c", |
| 1636 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c", |
| 1637 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c", |
| Frank Barchard | cadd422 | 2021-01-20 16:27:25 -0800 | [diff] [blame] | 1638 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1639 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1640 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1641 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1642 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1643 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1644 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1645 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1646 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1647 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1648 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1649 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c", |
| 1650 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1651 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c", |
| 1652 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c", |
| 1653 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c", |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 1654 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1655 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1656 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1657 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c", |
| 1658 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1659 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1660 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c", |
| 1661 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1662 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c", |
| 1663 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1664 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c", |
| 1665 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| 1666 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1667 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1668 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1669 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1670 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c", |
| 1671 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c", |
| 1672 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1673 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c", |
| 1674 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c", |
| 1675 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c", |
| 1676 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c", |
| 1677 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c", |
| 1678 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c", |
| 1679 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c", |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 1680 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1681 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1682 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1683 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c", |
| 1684 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1685 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1686 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c", |
| 1687 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1688 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c", |
| 1689 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1690 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c", |
| 1691 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| 1692 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1693 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1694 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1695 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1696 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c", |
| 1697 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c", |
| 1698 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1699 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c", |
| 1700 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c", |
| 1701 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c", |
| 1702 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c", |
| 1703 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c", |
| 1704 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c", |
| 1705 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c", |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 1706 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1707 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1708 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1709 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c", |
| 1710 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1711 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1712 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c", |
| 1713 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1714 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c", |
| 1715 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1716 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1717 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1718 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1719 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c", |
| 1720 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c", |
| 1721 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1722 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c", |
| 1723 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c", |
| 1724 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c", |
| 1725 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c", |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 1726 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1727 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1728 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1729 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c", |
| 1730 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1731 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1732 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c", |
| 1733 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1734 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c", |
| 1735 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1736 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1737 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1738 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1739 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c", |
| 1740 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c", |
| 1741 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1742 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c", |
| 1743 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c", |
| 1744 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c", |
| 1745 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c", |
| Marat Dukhan | 22e31c8 | 2021-11-09 00:00:28 -0800 | [diff] [blame] | 1746 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x8.c", |
| 1747 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x16.c", |
| 1748 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x24.c", |
| 1749 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x32.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1750 | "src/f32-gavgpool-cw/wasmsimd-arm-x4.c", |
| 1751 | "src/f32-gavgpool-cw/wasmsimd-x86-x4.c", |
| Marat Dukhan | c601680 | 2020-07-16 18:51:28 -0700 | [diff] [blame] | 1752 | "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c", |
| 1753 | "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c", |
| 1754 | "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c", |
| 1755 | "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1756 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1757 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c", |
| 1758 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1759 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1760 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c", |
| 1761 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1762 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1763 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c", |
| 1764 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1765 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1766 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c", |
| 1767 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1768 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1769 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c", |
| 1770 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1771 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1772 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c", |
| 1773 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1774 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1775 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c", |
| 1776 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1777 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1778 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c", |
| 1779 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1780 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1781 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c", |
| 1782 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1783 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1784 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c", |
| 1785 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1786 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1787 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c", |
| 1788 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1789 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1790 | "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c", |
| 1791 | "src/f32-gemm/gen/1x8-wasmsimd-splat.c", |
| 1792 | "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c", |
| 1793 | "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1794 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1795 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c", |
| 1796 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1797 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1798 | "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c", |
| 1799 | "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c", |
| 1800 | "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c", |
| 1801 | "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c", |
| 1802 | "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c", |
| 1803 | "src/f32-gemm/gen/4x2c4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1804 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1805 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1806 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1807 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1808 | "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c", |
| 1809 | "src/f32-gemm/gen/4x8-wasmsimd-splat.c", |
| 1810 | "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c", |
| 1811 | "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1812 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1813 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c", |
| 1814 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1815 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1816 | "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c", |
| 1817 | "src/f32-gemm/gen/5x8-wasmsimd-splat.c", |
| 1818 | "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c", |
| 1819 | "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1820 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1821 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c", |
| 1822 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1823 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1824 | "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c", |
| 1825 | "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c", |
| XNNPACK Team | 965272b | 2020-10-23 21:10:15 -0700 | [diff] [blame] | 1826 | "src/f32-ibilinear-chw/gen/wasmsimd-p4.c", |
| 1827 | "src/f32-ibilinear-chw/gen/wasmsimd-p8.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 1828 | "src/f32-ibilinear/gen/wasmsimd-c4.c", |
| 1829 | "src/f32-ibilinear/gen/wasmsimd-c8.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1830 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1831 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c", |
| 1832 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1833 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1834 | "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c", |
| 1835 | "src/f32-igemm/gen/1x8-wasmsimd-splat.c", |
| 1836 | "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c", |
| 1837 | "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1838 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1839 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c", |
| 1840 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1841 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1842 | "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c", |
| 1843 | "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c", |
| 1844 | "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c", |
| 1845 | "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c", |
| 1846 | "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c", |
| 1847 | "src/f32-igemm/gen/4x2c4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1848 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1849 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1850 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1851 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1852 | "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c", |
| 1853 | "src/f32-igemm/gen/4x8-wasmsimd-splat.c", |
| 1854 | "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c", |
| 1855 | "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1856 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1857 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c", |
| 1858 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1859 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1860 | "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c", |
| 1861 | "src/f32-igemm/gen/5x8-wasmsimd-splat.c", |
| 1862 | "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c", |
| 1863 | "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1864 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1865 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c", |
| 1866 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1867 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1868 | "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c", |
| 1869 | "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c", |
| Marat Dukhan | f6e2480 | 2020-07-08 22:20:40 -0700 | [diff] [blame] | 1870 | "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1871 | "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1872 | "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1873 | "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| 1874 | "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c", |
| 1875 | "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1876 | "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1877 | "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 1878 | "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c", |
| 1879 | "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c", |
| 1880 | "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c", |
| Marat Dukhan | 195f8eb | 2020-06-25 12:50:57 -0700 | [diff] [blame] | 1881 | "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c", |
| 1882 | "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 1883 | "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c", |
| 1884 | "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c", |
| 1885 | "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c", |
| 1886 | "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c", |
| 1887 | "src/f32-prelu/gen/wasmsimd-minmax-1x4.c", |
| 1888 | "src/f32-prelu/gen/wasmsimd-minmax-1x8.c", |
| 1889 | "src/f32-prelu/gen/wasmsimd-minmax-1x16.c", |
| Marat Dukhan | 195f8eb | 2020-06-25 12:50:57 -0700 | [diff] [blame] | 1890 | "src/f32-prelu/gen/wasmsimd-minmax-2x4.c", |
| 1891 | "src/f32-prelu/gen/wasmsimd-minmax-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 1892 | "src/f32-prelu/gen/wasmsimd-minmax-2x16.c", |
| 1893 | "src/f32-prelu/gen/wasmsimd-minmax-4x4.c", |
| 1894 | "src/f32-prelu/gen/wasmsimd-minmax-4x8.c", |
| 1895 | "src/f32-prelu/gen/wasmsimd-minmax-4x16.c", |
| Marat Dukhan | 4bd1de9 | 2021-12-02 14:00:33 -0800 | [diff] [blame] | 1896 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x8.c", |
| 1897 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x16.c", |
| 1898 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x24.c", |
| 1899 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x32.c", |
| Marat Dukhan | 98d5552 | 2021-12-02 11:03:53 -0800 | [diff] [blame] | 1900 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x8.c", |
| 1901 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x16.c", |
| 1902 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x24.c", |
| 1903 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x32.c", |
| Marat Dukhan | 4bd1de9 | 2021-12-02 14:00:33 -0800 | [diff] [blame] | 1904 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x8.c", |
| 1905 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x16.c", |
| 1906 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x24.c", |
| 1907 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x32.c", |
| Marat Dukhan | 98d5552 | 2021-12-02 11:03:53 -0800 | [diff] [blame] | 1908 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x8.c", |
| 1909 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x16.c", |
| 1910 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x24.c", |
| 1911 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x32.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 1912 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x4.c", |
| 1913 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x8-acc2.c", |
| 1914 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x8.c", |
| 1915 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x12-acc2.c", |
| 1916 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x12-acc3.c", |
| 1917 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x12.c", |
| 1918 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x16-acc2.c", |
| 1919 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x16-acc4.c", |
| 1920 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x16.c", |
| 1921 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x20-acc2.c", |
| 1922 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x20-acc5.c", |
| 1923 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x20.c", |
| Marat Dukhan | 8c41796 | 2020-07-08 12:27:50 -0700 | [diff] [blame] | 1924 | "src/f32-rmax/wasmsimd-arm.c", |
| 1925 | "src/f32-rmax/wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1926 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1927 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1928 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c", |
| 1929 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1930 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1931 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 1932 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1933 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c", |
| 1934 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1935 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1936 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1937 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1938 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c", |
| 1939 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1940 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1941 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 1942 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1943 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c", |
| 1944 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1945 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1946 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1947 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1948 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c", |
| 1949 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1950 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1951 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 1952 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1953 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c", |
| 1954 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1955 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1956 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1957 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1958 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c", |
| 1959 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 1960 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1961 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 1962 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1963 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c", |
| 1964 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 1965 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1966 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c", |
| 1967 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1968 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1969 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c", |
| 1970 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1971 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1972 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c", |
| 1973 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1974 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1975 | "src/f32-vbinary/gen/vadd-wasmsimd-x4.c", |
| 1976 | "src/f32-vbinary/gen/vadd-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1977 | "src/f32-vbinary/gen/vadd-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1978 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c", |
| 1979 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1980 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 1981 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c", |
| 1982 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1983 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1984 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c", |
| 1985 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1986 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1987 | "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c", |
| 1988 | "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1989 | "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1990 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c", |
| 1991 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1992 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 1993 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c", |
| 1994 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1995 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1996 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c", |
| 1997 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1998 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 1999 | "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c", |
| 2000 | "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2001 | "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2002 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c", |
| 2003 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2004 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2005 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c", |
| 2006 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2007 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2008 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c", |
| 2009 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2010 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2011 | "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c", |
| 2012 | "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2013 | "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2014 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c", |
| 2015 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2016 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2017 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c", |
| 2018 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2019 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2020 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c", |
| 2021 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2022 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2023 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c", |
| 2024 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2025 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2026 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c", |
| 2027 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2028 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2029 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c", |
| 2030 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2031 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2032 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c", |
| 2033 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2034 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2035 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c", |
| 2036 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2037 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2038 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c", |
| 2039 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2040 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2041 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c", |
| 2042 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2043 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2044 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c", |
| 2045 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2046 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2047 | "src/f32-vbinary/gen/vmul-wasmsimd-x4.c", |
| 2048 | "src/f32-vbinary/gen/vmul-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2049 | "src/f32-vbinary/gen/vmul-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2050 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c", |
| 2051 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2052 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2053 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c", |
| 2054 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2055 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2056 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c", |
| 2057 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2058 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2059 | "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c", |
| 2060 | "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2061 | "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2062 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c", |
| 2063 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2064 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2065 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c", |
| 2066 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2067 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2068 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c", |
| 2069 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2070 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2071 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c", |
| 2072 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2073 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2074 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c", |
| 2075 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2076 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2077 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c", |
| 2078 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2079 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2080 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c", |
| 2081 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2082 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2083 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c", |
| 2084 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2085 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2086 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c", |
| 2087 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2088 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2089 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c", |
| 2090 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2091 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2092 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c", |
| 2093 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2094 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2095 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c", |
| 2096 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2097 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2098 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c", |
| 2099 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2100 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2101 | "src/f32-vbinary/gen/vsub-wasmsimd-x4.c", |
| 2102 | "src/f32-vbinary/gen/vsub-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2103 | "src/f32-vbinary/gen/vsub-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2104 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c", |
| 2105 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2106 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2107 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c", |
| 2108 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2109 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2110 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c", |
| 2111 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2112 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2113 | "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c", |
| 2114 | "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2115 | "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2116 | "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c", |
| 2117 | "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c", |
| 2118 | "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c", |
| 2119 | "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2120 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c", |
| 2121 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c", |
| 2122 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c", |
| 2123 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c", |
| 2124 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c", |
| 2125 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2126 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c", |
| 2127 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c", |
| 2128 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c", |
| 2129 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c", |
| 2130 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c", |
| 2131 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c", |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 2132 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c", |
| 2133 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c", |
| 2134 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c", |
| 2135 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c", |
| 2136 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c", |
| 2137 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2138 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c", |
| 2139 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c", |
| 2140 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c", |
| 2141 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c", |
| 2142 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c", |
| 2143 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 2144 | "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c", |
| 2145 | "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c", |
| 2146 | "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 2147 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c", |
| 2148 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c", |
| 2149 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c", |
| 2150 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c", |
| Marat Dukhan | d816f62 | 2020-07-15 10:14:39 -0700 | [diff] [blame] | 2151 | "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c", |
| Marat Dukhan | d816f62 | 2020-07-15 10:14:39 -0700 | [diff] [blame] | 2152 | "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2153 | "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c", |
| Marat Dukhan | d816f62 | 2020-07-15 10:14:39 -0700 | [diff] [blame] | 2154 | "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2155 | "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c", |
| 2156 | "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c", |
| 2157 | "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c", |
| Marat Dukhan | feee77f | 2021-08-31 13:39:50 -0700 | [diff] [blame] | 2158 | "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c", |
| 2159 | "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c", |
| 2160 | "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c", |
| 2161 | "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2162 | "src/f32-vrnd/gen/vrndd-wasmsimd-native-x4.c", |
| 2163 | "src/f32-vrnd/gen/vrndd-wasmsimd-native-x8.c", |
| Marat Dukhan | feee77f | 2021-08-31 13:39:50 -0700 | [diff] [blame] | 2164 | "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c", |
| 2165 | "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2166 | "src/f32-vrnd/gen/vrndne-wasmsimd-native-x4.c", |
| 2167 | "src/f32-vrnd/gen/vrndne-wasmsimd-native-x8.c", |
| Marat Dukhan | feee77f | 2021-08-31 13:39:50 -0700 | [diff] [blame] | 2168 | "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c", |
| 2169 | "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c", |
| 2170 | "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c", |
| 2171 | "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2172 | "src/f32-vrnd/gen/vrndu-wasmsimd-native-x4.c", |
| 2173 | "src/f32-vrnd/gen/vrndu-wasmsimd-native-x8.c", |
| Marat Dukhan | feee77f | 2021-08-31 13:39:50 -0700 | [diff] [blame] | 2174 | "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c", |
| 2175 | "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c", |
| 2176 | "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c", |
| 2177 | "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2178 | "src/f32-vrnd/gen/vrndz-wasmsimd-native-x4.c", |
| 2179 | "src/f32-vrnd/gen/vrndz-wasmsimd-native-x8.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 2180 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x4.c", |
| 2181 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x8.c", |
| 2182 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x12.c", |
| 2183 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x16.c", |
| 2184 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x20.c", |
| 2185 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x24.c", |
| 2186 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x4.c", |
| 2187 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x8.c", |
| 2188 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x12.c", |
| 2189 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x16.c", |
| 2190 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x20.c", |
| 2191 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x24.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 2192 | "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c", |
| 2193 | "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c", |
| Marat Dukhan | 37c8351 | 2020-06-29 13:25:53 -0700 | [diff] [blame] | 2194 | "src/f32-vunary/gen/vabs-wasmsimd-x4.c", |
| 2195 | "src/f32-vunary/gen/vabs-wasmsimd-x8.c", |
| 2196 | "src/f32-vunary/gen/vneg-wasmsimd-x4.c", |
| 2197 | "src/f32-vunary/gen/vneg-wasmsimd-x8.c", |
| 2198 | "src/f32-vunary/gen/vsqr-wasmsimd-x4.c", |
| 2199 | "src/f32-vunary/gen/vsqr-wasmsimd-x8.c", |
| Marat Dukhan | a18926a | 2021-09-29 15:02:44 -0700 | [diff] [blame] | 2200 | "src/math/cvt-f16-f32-wasmsimd-int16.c", |
| 2201 | "src/math/cvt-f16-f32-wasmsimd-int32.c", |
| Marat Dukhan | 79c78b2 | 2021-11-08 20:44:27 -0800 | [diff] [blame] | 2202 | "src/math/cvt-f32-f16-wasmsimd.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 2203 | "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c", |
| 2204 | "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c", |
| 2205 | "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c", |
| 2206 | "src/math/expm1minus-wasmsimd-rr2-p6-max.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2207 | "src/math/roundd-wasmsimd-addsub.c", |
| 2208 | "src/math/roundd-wasmsimd-cvt.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2209 | "src/math/roundd-wasmsimd-native.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2210 | "src/math/roundne-wasmsimd-addsub.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2211 | "src/math/roundne-wasmsimd-native.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2212 | "src/math/roundu-wasmsimd-addsub.c", |
| 2213 | "src/math/roundu-wasmsimd-cvt.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2214 | "src/math/roundu-wasmsimd-native.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2215 | "src/math/roundz-wasmsimd-addsub.c", |
| 2216 | "src/math/roundz-wasmsimd-cvt.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2217 | "src/math/roundz-wasmsimd-native.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2218 | "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c", |
| 2219 | "src/math/sigmoid-wasmsimd-rr2-p5-div.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2220 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2221 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2222 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2223 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2224 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2225 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2226 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2227 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2228 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2229 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2230 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2231 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2232 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2233 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2234 | "src/qc8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2235 | "src/qc8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2236 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2237 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2238 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2239 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2240 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2241 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2242 | "src/qc8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2243 | "src/qc8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2244 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2245 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2246 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2247 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2248 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2249 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2250 | "src/qc8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2251 | "src/qc8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2252 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2253 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2254 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2255 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2256 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2257 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2258 | "src/qc8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2259 | "src/qc8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2260 | "src/qc8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2261 | "src/qc8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2262 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2263 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2264 | "src/qc8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2265 | "src/qc8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2266 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2267 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2268 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2269 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2270 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2271 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2272 | "src/qc8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2273 | "src/qc8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2274 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2275 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2276 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2277 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2278 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2279 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2280 | "src/qc8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2281 | "src/qc8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2282 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2283 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2284 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2285 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2286 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2287 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2288 | "src/qc8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2289 | "src/qc8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2290 | "src/qc8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2291 | "src/qc8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2292 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2293 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2294 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2295 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2296 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2297 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2298 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2299 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2300 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2301 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2302 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2303 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | fbf12b0 | 2021-12-09 22:39:15 -0800 | [diff] [blame] | 2304 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x8.c", |
| 2305 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x16.c", |
| 2306 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x24.c", |
| 2307 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x32.c", |
| Marat Dukhan | b5e3d17 | 2020-08-06 13:29:53 -0700 | [diff] [blame] | 2308 | "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c", |
| 2309 | "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c", |
| 2310 | "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2311 | "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c", |
| 2312 | "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c", |
| 2313 | "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2314 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2315 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 2316 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2317 | "src/qs8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2318 | "src/qs8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2319 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2320 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2321 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2322 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2323 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2324 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2325 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2326 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 2327 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2328 | "src/qs8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2329 | "src/qs8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2330 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2331 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2332 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2333 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2334 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2335 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2336 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2337 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 2338 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2339 | "src/qs8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2340 | "src/qs8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2341 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2342 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2343 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2344 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2345 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2346 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2347 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2348 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 2349 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2350 | "src/qs8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2351 | "src/qs8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2352 | "src/qs8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2353 | "src/qs8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2354 | "src/qs8-gemm/gen/4x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| 2355 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2356 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2357 | "src/qs8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2358 | "src/qs8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2359 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2360 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2361 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2362 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2363 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2364 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2365 | "src/qs8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2366 | "src/qs8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2367 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2368 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2369 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2370 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2371 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2372 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2373 | "src/qs8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2374 | "src/qs8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2375 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2376 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2377 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2378 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2379 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2380 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2381 | "src/qs8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2382 | "src/qs8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2383 | "src/qs8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2384 | "src/qs8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 2e23d2b | 2020-07-29 16:01:37 -0700 | [diff] [blame] | 2385 | "src/qs8-requantization/fp32-wasmsimd.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 2386 | "src/qs8-requantization/gemmlowp-wasmsimd.c", |
| Marat Dukhan | 5df27f8 | 2020-09-02 23:59:21 -0700 | [diff] [blame] | 2387 | "src/qs8-vadd/gen/minmax-wasmsimd-x8.c", |
| 2388 | "src/qs8-vadd/gen/minmax-wasmsimd-x16.c", |
| 2389 | "src/qs8-vadd/gen/minmax-wasmsimd-x24.c", |
| 2390 | "src/qs8-vadd/gen/minmax-wasmsimd-x32.c", |
| 2391 | "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c", |
| 2392 | "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c", |
| 2393 | "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c", |
| 2394 | "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c", |
| Marat Dukhan | 661ea6d | 2021-08-02 11:25:41 -0700 | [diff] [blame] | 2395 | "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2396 | "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| 2397 | "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2398 | "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| Marat Dukhan | f601135 | 2021-07-15 15:11:14 -0700 | [diff] [blame] | 2399 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| 2400 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| 2401 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| 2402 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| 2403 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| 2404 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | fbf12b0 | 2021-12-09 22:39:15 -0800 | [diff] [blame] | 2405 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x8.c", |
| 2406 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x16.c", |
| 2407 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x24.c", |
| 2408 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x32.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2409 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2410 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2411 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2412 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2413 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2414 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2415 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2416 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2417 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2418 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2419 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2420 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2421 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2422 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2423 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2424 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2425 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2426 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2427 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2428 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2429 | "src/qu8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2430 | "src/qu8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2431 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2432 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2433 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2434 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2435 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2436 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2437 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2438 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2439 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2440 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2441 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2442 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2443 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2444 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2445 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2446 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2447 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2448 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2449 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2450 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2451 | "src/qu8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2452 | "src/qu8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 2453 | "src/qu8-requantization/fp32-wasmsimd.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 2454 | "src/qu8-requantization/gemmlowp-wasmsimd.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 2455 | "src/qu8-vadd/gen/minmax-wasmsimd-x8.c", |
| 2456 | "src/qu8-vadd/gen/minmax-wasmsimd-x16.c", |
| Marat Dukhan | e20a873 | 2021-12-07 17:11:37 -0800 | [diff] [blame] | 2457 | "src/qu8-vadd/gen/minmax-wasmsimd-x32.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 2458 | "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c", |
| 2459 | "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c", |
| Marat Dukhan | e20a873 | 2021-12-07 17:11:37 -0800 | [diff] [blame] | 2460 | "src/qu8-vaddc/gen/minmax-wasmsimd-x32.c", |
| Marat Dukhan | 661ea6d | 2021-08-02 11:25:41 -0700 | [diff] [blame] | 2461 | "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2462 | "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| 2463 | "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2464 | "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| Marat Dukhan | 266a47b | 2021-11-24 13:58:12 -0800 | [diff] [blame] | 2465 | "src/s8-ibilinear/gen/wasmsimd-dot16x2-c8.c", |
| 2466 | "src/s8-ibilinear/gen/wasmsimd-dot16x2-c16.c", |
| 2467 | "src/s8-ibilinear/gen/wasmsimd-mul32-c8.c", |
| 2468 | "src/s8-ibilinear/gen/wasmsimd-mul32-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 2469 | "src/s8-maxpool/9p8x-minmax-wasmsimd-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 2470 | "src/s8-vclamp/wasmsimd-x64.c", |
| Marat Dukhan | 266a47b | 2021-11-24 13:58:12 -0800 | [diff] [blame] | 2471 | "src/u8-ibilinear/gen/wasmsimd-dot16x2-c8.c", |
| 2472 | "src/u8-ibilinear/gen/wasmsimd-dot16x2-c16.c", |
| 2473 | "src/u8-ibilinear/gen/wasmsimd-mul32-c8.c", |
| 2474 | "src/u8-ibilinear/gen/wasmsimd-mul32-c16.c", |
| Marat Dukhan | f158942 | 2021-08-15 20:37:06 -0700 | [diff] [blame] | 2475 | "src/u8-maxpool/9p8x-minmax-wasmsimd-c16.c", |
| Marat Dukhan | 1f5b108 | 2021-08-16 17:01:44 -0700 | [diff] [blame] | 2476 | "src/u8-vclamp/wasmsimd-x64.c", |
| Marat Dukhan | a4ad988 | 2021-09-18 08:06:04 -0700 | [diff] [blame] | 2477 | "src/x8-lut/gen/lut-wasmsimd-x16.c", |
| 2478 | "src/x8-lut/gen/lut-wasmsimd-x32.c", |
| 2479 | "src/x8-lut/gen/lut-wasmsimd-x48.c", |
| 2480 | "src/x8-lut/gen/lut-wasmsimd-x64.c", |
| Marat Dukhan | 66d99e9 | 2020-07-16 12:56:21 -0700 | [diff] [blame] | 2481 | "src/x32-packx/x4-wasmsimd.c", |
| Alan Kelly | 2493de9 | 2021-12-23 07:17:09 -0800 | [diff] [blame] | 2482 | "src/x32-transpose/4x4-wasmsimd.c", |
| Marat Dukhan | 9d4bfa2 | 2020-07-16 19:07:04 -0700 | [diff] [blame] | 2483 | "src/x32-unpool/wasmsimd.c", |
| Marat Dukhan | e3b7876 | 2020-07-16 20:02:58 -0700 | [diff] [blame] | 2484 | "src/x32-zip/x2-wasmsimd.c", |
| 2485 | "src/x32-zip/x3-wasmsimd.c", |
| 2486 | "src/x32-zip/x4-wasmsimd.c", |
| 2487 | "src/x32-zip/xm-wasmsimd.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 2488 | "src/xx-fill/wasmsimd-x64.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 2489 | "src/xx-pad/wasmsimd.c", |
| Marat Dukhan | 290055c | 2020-06-09 12:24:29 -0700 | [diff] [blame] | 2490 | ] |
| 2491 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2492 | # ISA-specific micro-kernels |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2493 | PROD_NEON_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 2494 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2495 | "src/f32-argmaxpool/4x-neon-c4.c", |
| 2496 | "src/f32-argmaxpool/9p8x-neon-c4.c", |
| 2497 | "src/f32-argmaxpool/9x-neon-c4.c", |
| 2498 | "src/f32-avgpool/9p8x-minmax-neon-c4.c", |
| 2499 | "src/f32-avgpool/9x-minmax-neon-c4.c", |
| 2500 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 2501 | "src/f32-dwconv/gen/up8x3-minmax-neon.c", |
| Frank Barchard | dbe781b | 2021-10-18 10:29:52 -0700 | [diff] [blame] | 2502 | "src/f32-dwconv/gen/up8x4-minmax-neon.c", |
| 2503 | "src/f32-dwconv/gen/up8x9-minmax-neon.c", |
| 2504 | "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2505 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c", |
| 2506 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c", |
| 2507 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c", |
| 2508 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 2509 | "src/f32-f16-vcvt/gen/vcvt-neon-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2510 | "src/f32-gavgpool-cw/neon-x4.c", |
| 2511 | "src/f32-gavgpool/7p7x-minmax-neon-c4.c", |
| 2512 | "src/f32-gavgpool/7x-minmax-neon-c4.c", |
| 2513 | "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 2514 | "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2515 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2516 | "src/f32-ibilinear-chw/gen/neon-p8.c", |
| 2517 | "src/f32-ibilinear/gen/neon-c8.c", |
| 2518 | "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 2519 | "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2520 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2521 | "src/f32-maxpool/9p8x-minmax-neon-c4.c", |
| 2522 | "src/f32-pavgpool/9p8x-minmax-neon-c4.c", |
| 2523 | "src/f32-pavgpool/9x-minmax-neon-c4.c", |
| 2524 | "src/f32-prelu/gen/neon-2x8.c", |
| Marat Dukhan | ed2d776 | 2021-12-03 23:51:19 -0800 | [diff] [blame] | 2525 | "src/f32-qs8-vcvt/gen/vcvt-neon-x32.c", |
| 2526 | "src/f32-qu8-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 2527 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2528 | "src/f32-rmax/neon.c", |
| 2529 | "src/f32-spmm/gen/32x1-minmax-neon.c", |
| 2530 | "src/f32-vbinary/gen/vadd-minmax-neon-x8.c", |
| 2531 | "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c", |
| 2532 | "src/f32-vbinary/gen/vmax-neon-x8.c", |
| 2533 | "src/f32-vbinary/gen/vmaxc-neon-x8.c", |
| 2534 | "src/f32-vbinary/gen/vmin-neon-x8.c", |
| 2535 | "src/f32-vbinary/gen/vminc-neon-x8.c", |
| 2536 | "src/f32-vbinary/gen/vmul-minmax-neon-x8.c", |
| 2537 | "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c", |
| 2538 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c", |
| 2539 | "src/f32-vbinary/gen/vsqrdiff-neon-x8.c", |
| 2540 | "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c", |
| 2541 | "src/f32-vbinary/gen/vsub-minmax-neon-x8.c", |
| 2542 | "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c", |
| 2543 | "src/f32-vclamp/gen/vclamp-neon-x8.c", |
| 2544 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c", |
| 2545 | "src/f32-vhswish/gen/vhswish-neon-x16.c", |
| 2546 | "src/f32-vlrelu/gen/vlrelu-neon-x8.c", |
| 2547 | "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c", |
| 2548 | "src/f32-vrnd/gen/vrndd-neon-x8.c", |
| 2549 | "src/f32-vrnd/gen/vrndne-neon-x8.c", |
| 2550 | "src/f32-vrnd/gen/vrndu-neon-x8.c", |
| 2551 | "src/f32-vrnd/gen/vrndz-neon-x8.c", |
| 2552 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c", |
| 2553 | "src/f32-vunary/gen/vabs-neon-x8.c", |
| 2554 | "src/f32-vunary/gen/vneg-neon-x8.c", |
| 2555 | "src/f32-vunary/gen/vsqr-neon-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2556 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c", |
| Frank Barchard | 7da8b02 | 2021-08-31 09:49:10 -0700 | [diff] [blame] | 2557 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c", |
| 2558 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2559 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 2560 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 2561 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 2562 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2563 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c", |
| Frank Barchard | 7da8b02 | 2021-08-31 09:49:10 -0700 | [diff] [blame] | 2564 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c", |
| 2565 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 2566 | "src/qs8-f32-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2567 | "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c", |
| 2568 | "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c", |
| Frank Barchard | 9519816 | 2021-12-21 17:29:10 -0800 | [diff] [blame] | 2569 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2570 | "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2571 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2572 | "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 9519816 | 2021-12-21 17:29:10 -0800 | [diff] [blame] | 2573 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2574 | "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2575 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2576 | "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 01debd9 | 2021-07-29 18:14:21 -0700 | [diff] [blame] | 2577 | "src/qs8-vadd/gen/minmax-neon-ld64-x16.c", |
| 2578 | "src/qs8-vadd/gen/minmax-neon-ld64-x32.c", |
| 2579 | "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 2580 | "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 2581 | "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 2582 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2583 | "src/qu8-avgpool/9p8x-minmax-neon-c8.c", |
| 2584 | "src/qu8-avgpool/9x-minmax-neon-c8.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 2585 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c", |
| 2586 | "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 2587 | "src/qu8-f32-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2588 | "src/qu8-gavgpool/7p7x-minmax-neon-c8.c", |
| 2589 | "src/qu8-gavgpool/7x-minmax-neon-c8.c", |
| 2590 | "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 2591 | "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 2592 | "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| 2593 | "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| 2594 | "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 2595 | "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 2596 | "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| 2597 | "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 0a3093c | 2021-08-31 09:58:11 -0700 | [diff] [blame] | 2598 | "src/qu8-vadd/gen/minmax-neon-ld64-x16.c", |
| 2599 | "src/qu8-vadd/gen/minmax-neon-ld64-x32.c", |
| 2600 | "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 2601 | "src/qu8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 2602 | "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 2603 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 2604 | "src/s8-ibilinear/gen/neon-c8.c", |
| 2605 | "src/s8-ibilinear/gen/neon-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 2606 | "src/s8-maxpool/9p8x-minmax-neon-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 2607 | "src/s8-vclamp/neon-x64.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 2608 | "src/u8-ibilinear/gen/neon-c8.c", |
| 2609 | "src/u8-ibilinear/gen/neon-c16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2610 | "src/u8-maxpool/9p8x-minmax-neon-c16.c", |
| 2611 | "src/u8-rmax/neon.c", |
| 2612 | "src/u8-vclamp/neon-x64.c", |
| 2613 | "src/x8-zip/x2-neon.c", |
| 2614 | "src/x8-zip/x3-neon.c", |
| 2615 | "src/x8-zip/x4-neon.c", |
| 2616 | "src/x8-zip/xm-neon.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2617 | "src/x32-packx/x4-neon-st4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2618 | "src/x32-unpool/neon.c", |
| 2619 | "src/x32-zip/x2-neon.c", |
| 2620 | "src/x32-zip/x3-neon.c", |
| 2621 | "src/x32-zip/x4-neon.c", |
| 2622 | "src/x32-zip/xm-neon.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 2623 | "src/xx-fill/neon-x64.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 2624 | "src/xx-pad/neon.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2625 | ] |
| 2626 | |
| 2627 | ALL_NEON_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 322ed6f | 2021-10-16 17:44:16 -0700 | [diff] [blame] | 2628 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x8.c", |
| 2629 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c", |
| 2630 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x24.c", |
| 2631 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x32.c", |
| 2632 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x8.c", |
| 2633 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x16.c", |
| 2634 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x24.c", |
| 2635 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x32.c", |
| Marat Dukhan | ef25c6d | 2020-07-24 00:59:40 -0700 | [diff] [blame] | 2636 | "src/f32-argmaxpool/4x-neon-c4.c", |
| 2637 | "src/f32-argmaxpool/9p8x-neon-c4.c", |
| 2638 | "src/f32-argmaxpool/9x-neon-c4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2639 | "src/f32-avgpool/9p8x-minmax-neon-c4.c", |
| 2640 | "src/f32-avgpool/9x-minmax-neon-c4.c", |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 2641 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2642 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2643 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2644 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c", |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 2645 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2646 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2647 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2648 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c", |
| Marat Dukhan | c763488 | 2020-12-07 15:11:12 -0800 | [diff] [blame] | 2649 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 2650 | "src/f32-dwconv/gen/up4x3-minmax-neon-acc2.c", |
| 2651 | "src/f32-dwconv/gen/up4x3-minmax-neon.c", |
| Marat Dukhan | f5425ea | 2020-04-24 01:46:00 -0700 | [diff] [blame] | 2652 | "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2653 | "src/f32-dwconv/gen/up4x4-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2654 | "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2655 | "src/f32-dwconv/gen/up4x9-minmax-neon.c", |
| Marat Dukhan | f5425ea | 2020-04-24 01:46:00 -0700 | [diff] [blame] | 2656 | "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2657 | "src/f32-dwconv/gen/up4x25-minmax-neon.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 2658 | "src/f32-dwconv/gen/up8x3-minmax-neon-acc2.c", |
| 2659 | "src/f32-dwconv/gen/up8x3-minmax-neon.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2660 | "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c", |
| 2661 | "src/f32-dwconv/gen/up8x4-minmax-neon.c", |
| 2662 | "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c", |
| 2663 | "src/f32-dwconv/gen/up8x9-minmax-neon.c", |
| Marat Dukhan | f5425ea | 2020-04-24 01:46:00 -0700 | [diff] [blame] | 2664 | "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2665 | "src/f32-dwconv/gen/up8x25-minmax-neon.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2666 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c", |
| 2667 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c", |
| 2668 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c", |
| Marat Dukhan | c581e48 | 2020-10-24 01:28:11 -0700 | [diff] [blame] | 2669 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2670 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c", |
| Marat Dukhan | c581e48 | 2020-10-24 01:28:11 -0700 | [diff] [blame] | 2671 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c", |
| 2672 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c", |
| 2673 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c", |
| 2674 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c", |
| 2675 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 2676 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c", |
| 2677 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c", |
| 2678 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2679 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 2680 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2681 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c", |
| 2682 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c", |
| 2683 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2684 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c", |
| 2685 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c", |
| 2686 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c", |
| 2687 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2688 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2689 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c", |
| 2690 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2691 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2692 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2693 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2694 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2695 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c", |
| 2696 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 2697 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c", |
| 2698 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c", |
| 2699 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c", |
| 2700 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c", |
| 2701 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c", |
| 2702 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c", |
| 2703 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c", |
| 2704 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 2705 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2706 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c", |
| Marat Dukhan | 4edfdbf | 2021-11-09 13:47:11 -0800 | [diff] [blame] | 2707 | "src/f32-f16-vcvt/gen/vcvt-neon-x8.c", |
| 2708 | "src/f32-f16-vcvt/gen/vcvt-neon-x16.c", |
| 2709 | "src/f32-f16-vcvt/gen/vcvt-neon-x24.c", |
| 2710 | "src/f32-f16-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 2711 | "src/f32-gavgpool-cw/neon-x4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2712 | "src/f32-gavgpool/7p7x-minmax-neon-c4.c", |
| 2713 | "src/f32-gavgpool/7x-minmax-neon-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2714 | "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2715 | "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c", |
| 2716 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2717 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2718 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c", |
| 2719 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c", |
| 2720 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c", |
| 2721 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c", |
| 2722 | "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2723 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c", |
| 2724 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2725 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c", |
| 2726 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2727 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c", |
| 2728 | "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2729 | "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c", |
| 2730 | "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 2731 | "src/f32-gemm/gen/1x8s4-minmax-neon.c", |
| 2732 | "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2733 | "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c", |
| 2734 | "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c", |
| 2735 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2736 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c", |
| 2737 | "src/f32-gemm/gen/4x8s4-minmax-neon.c", |
| 2738 | "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c", |
| 2739 | "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c", |
| 2740 | "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c", |
| 2741 | "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c", |
| 2742 | "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c", |
| 2743 | "src/f32-gemm/gen/6x8s4-minmax-neon.c", |
| 2744 | "src/f32-gemm/gen/8x8s4-minmax-neon.c", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 2745 | "src/f32-ibilinear-chw/gen/neon-p4.c", |
| 2746 | "src/f32-ibilinear-chw/gen/neon-p8.c", |
| Frank Barchard | 8247e21 | 2021-02-03 18:12:33 -0800 | [diff] [blame] | 2747 | "src/f32-ibilinear/gen/neon-c4.c", |
| 2748 | "src/f32-ibilinear/gen/neon-c8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2749 | "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2750 | "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2751 | "src/f32-igemm/gen/1x8s4-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2752 | "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2753 | "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2754 | "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2755 | "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c", |
| 2756 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2757 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c", |
| 2758 | "src/f32-igemm/gen/4x8s4-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2759 | "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c", |
| 2760 | "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2761 | "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c", |
| 2762 | "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2763 | "src/f32-igemm/gen/6x8s4-minmax-neon.c", |
| 2764 | "src/f32-igemm/gen/8x8s4-minmax-neon.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2765 | "src/f32-maxpool/9p8x-minmax-neon-c4.c", |
| 2766 | "src/f32-pavgpool/9p8x-minmax-neon-c4.c", |
| 2767 | "src/f32-pavgpool/9x-minmax-neon-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2768 | "src/f32-ppmm/gen/4x8-minmax-neon.c", |
| 2769 | "src/f32-ppmm/gen/8x8-minmax-neon.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 2770 | "src/f32-prelu/gen/neon-1x4.c", |
| 2771 | "src/f32-prelu/gen/neon-1x8.c", |
| 2772 | "src/f32-prelu/gen/neon-1x16.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 2773 | "src/f32-prelu/gen/neon-2x4.c", |
| 2774 | "src/f32-prelu/gen/neon-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 2775 | "src/f32-prelu/gen/neon-2x16.c", |
| 2776 | "src/f32-prelu/gen/neon-4x4.c", |
| 2777 | "src/f32-prelu/gen/neon-4x8.c", |
| 2778 | "src/f32-prelu/gen/neon-4x16.c", |
| Marat Dukhan | b2d0a2a | 2021-12-02 09:04:57 -0800 | [diff] [blame] | 2779 | "src/f32-qs8-vcvt/gen/vcvt-neon-x8.c", |
| 2780 | "src/f32-qs8-vcvt/gen/vcvt-neon-x16.c", |
| 2781 | "src/f32-qs8-vcvt/gen/vcvt-neon-x24.c", |
| 2782 | "src/f32-qs8-vcvt/gen/vcvt-neon-x32.c", |
| 2783 | "src/f32-qu8-vcvt/gen/vcvt-neon-x8.c", |
| 2784 | "src/f32-qu8-vcvt/gen/vcvt-neon-x16.c", |
| 2785 | "src/f32-qu8-vcvt/gen/vcvt-neon-x24.c", |
| 2786 | "src/f32-qu8-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 2787 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x4.c", |
| 2788 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8-acc2.c", |
| 2789 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8.c", |
| 2790 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12-acc2.c", |
| 2791 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12-acc3.c", |
| 2792 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12.c", |
| 2793 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16-acc2.c", |
| 2794 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16-acc4.c", |
| 2795 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16.c", |
| 2796 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20-acc2.c", |
| 2797 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20-acc5.c", |
| 2798 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20.c", |
| 2799 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x4.c", |
| 2800 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x8-acc2.c", |
| 2801 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x8.c", |
| 2802 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12-acc2.c", |
| 2803 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12-acc3.c", |
| 2804 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12.c", |
| 2805 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16-acc2.c", |
| 2806 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16-acc4.c", |
| 2807 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16.c", |
| 2808 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20-acc2.c", |
| 2809 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20-acc5.c", |
| 2810 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2811 | "src/f32-rmax/neon.c", |
| Marat Dukhan | 5b86c43 | 2020-12-06 19:15:03 -0800 | [diff] [blame] | 2812 | "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c", |
| 2813 | "src/f32-spmm/gen/4x1-minmax-neon-x2.c", |
| 2814 | "src/f32-spmm/gen/4x1-minmax-neon.c", |
| 2815 | "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c", |
| 2816 | "src/f32-spmm/gen/8x1-minmax-neon-x2.c", |
| 2817 | "src/f32-spmm/gen/8x1-minmax-neon.c", |
| 2818 | "src/f32-spmm/gen/12x1-minmax-neon.c", |
| 2819 | "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c", |
| 2820 | "src/f32-spmm/gen/16x1-minmax-neon-x2.c", |
| 2821 | "src/f32-spmm/gen/16x1-minmax-neon.c", |
| 2822 | "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c", |
| 2823 | "src/f32-spmm/gen/32x1-minmax-neon-x2.c", |
| 2824 | "src/f32-spmm/gen/32x1-minmax-neon.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 2825 | "src/f32-vbinary/gen/vadd-minmax-neon-x4.c", |
| 2826 | "src/f32-vbinary/gen/vadd-minmax-neon-x8.c", |
| 2827 | "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c", |
| 2828 | "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 2829 | "src/f32-vbinary/gen/vmax-neon-x4.c", |
| 2830 | "src/f32-vbinary/gen/vmax-neon-x8.c", |
| 2831 | "src/f32-vbinary/gen/vmaxc-neon-x4.c", |
| 2832 | "src/f32-vbinary/gen/vmaxc-neon-x8.c", |
| 2833 | "src/f32-vbinary/gen/vmin-neon-x4.c", |
| 2834 | "src/f32-vbinary/gen/vmin-neon-x8.c", |
| 2835 | "src/f32-vbinary/gen/vminc-neon-x4.c", |
| 2836 | "src/f32-vbinary/gen/vminc-neon-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 2837 | "src/f32-vbinary/gen/vmul-minmax-neon-x4.c", |
| 2838 | "src/f32-vbinary/gen/vmul-minmax-neon-x8.c", |
| 2839 | "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c", |
| 2840 | "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c", |
| 2841 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c", |
| 2842 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 2843 | "src/f32-vbinary/gen/vsqrdiff-neon-x4.c", |
| 2844 | "src/f32-vbinary/gen/vsqrdiff-neon-x8.c", |
| 2845 | "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c", |
| 2846 | "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 2847 | "src/f32-vbinary/gen/vsub-minmax-neon-x4.c", |
| 2848 | "src/f32-vbinary/gen/vsub-minmax-neon-x8.c", |
| 2849 | "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c", |
| 2850 | "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2851 | "src/f32-vclamp/gen/vclamp-neon-x4.c", |
| 2852 | "src/f32-vclamp/gen/vclamp-neon-x8.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2853 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c", |
| 2854 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c", |
| 2855 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c", |
| 2856 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c", |
| 2857 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c", |
| 2858 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c", |
| 2859 | "src/f32-velu/gen/velu-neon-rr2-p6-x4.c", |
| 2860 | "src/f32-velu/gen/velu-neon-rr2-p6-x8.c", |
| 2861 | "src/f32-velu/gen/velu-neon-rr2-p6-x12.c", |
| 2862 | "src/f32-velu/gen/velu-neon-rr2-p6-x16.c", |
| 2863 | "src/f32-velu/gen/velu-neon-rr2-p6-x20.c", |
| 2864 | "src/f32-velu/gen/velu-neon-rr2-p6-x24.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 2865 | "src/f32-vhswish/gen/vhswish-neon-x4.c", |
| 2866 | "src/f32-vhswish/gen/vhswish-neon-x8.c", |
| 2867 | "src/f32-vhswish/gen/vhswish-neon-x16.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 2868 | "src/f32-vlrelu/gen/vlrelu-neon-x4.c", |
| 2869 | "src/f32-vlrelu/gen/vlrelu-neon-x8.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2870 | "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c", |
| 2871 | "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2872 | "src/f32-vrelu/gen/vrelu-neon-x4.c", |
| 2873 | "src/f32-vrelu/gen/vrelu-neon-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 2874 | "src/f32-vrnd/gen/vrndd-neon-x4.c", |
| 2875 | "src/f32-vrnd/gen/vrndd-neon-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2876 | "src/f32-vrnd/gen/vrndne-neon-x4.c", |
| 2877 | "src/f32-vrnd/gen/vrndne-neon-x8.c", |
| 2878 | "src/f32-vrnd/gen/vrndu-neon-x4.c", |
| 2879 | "src/f32-vrnd/gen/vrndu-neon-x8.c", |
| 2880 | "src/f32-vrnd/gen/vrndz-neon-x4.c", |
| 2881 | "src/f32-vrnd/gen/vrndz-neon-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2882 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c", |
| 2883 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c", |
| 2884 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c", |
| 2885 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c", |
| 2886 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c", |
| 2887 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c", |
| 2888 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c", |
| 2889 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c", |
| 2890 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c", |
| 2891 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c", |
| 2892 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c", |
| 2893 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c", |
| 2894 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c", |
| 2895 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c", |
| 2896 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c", |
| 2897 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c", |
| 2898 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c", |
| 2899 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 2900 | "src/f32-vunary/gen/vabs-neon-x4.c", |
| 2901 | "src/f32-vunary/gen/vabs-neon-x8.c", |
| 2902 | "src/f32-vunary/gen/vneg-neon-x4.c", |
| 2903 | "src/f32-vunary/gen/vneg-neon-x8.c", |
| 2904 | "src/f32-vunary/gen/vsqr-neon-x4.c", |
| 2905 | "src/f32-vunary/gen/vsqr-neon-x8.c", |
| Marat Dukhan | 60f903b | 2021-09-30 09:43:13 -0700 | [diff] [blame] | 2906 | "src/math/cvt-f16-f32-neon-int16.c", |
| 2907 | "src/math/cvt-f16-f32-neon-int32.c", |
| Marat Dukhan | a6eb1e5 | 2021-11-06 18:29:36 -0700 | [diff] [blame] | 2908 | "src/math/cvt-f32-f16-neon.c", |
| Marat Dukhan | d24301d | 2021-12-02 00:13:45 -0800 | [diff] [blame] | 2909 | "src/math/cvt-f32-qs8-neon.c", |
| 2910 | "src/math/cvt-f32-qu8-neon.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 2911 | "src/math/expm1minus-neon-rr2-lut16-p3.c", |
| 2912 | "src/math/expm1minus-neon-rr2-p6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2913 | "src/math/roundd-neon-addsub.c", |
| 2914 | "src/math/roundd-neon-cvt.c", |
| 2915 | "src/math/roundne-neon-addsub.c", |
| 2916 | "src/math/roundu-neon-addsub.c", |
| 2917 | "src/math/roundu-neon-cvt.c", |
| 2918 | "src/math/roundz-neon-addsub.c", |
| 2919 | "src/math/roundz-neon-cvt.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2920 | "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c", |
| 2921 | "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c", |
| 2922 | "src/math/sigmoid-neon-rr2-p5-nr2recps.c", |
| 2923 | "src/math/sqrt-neon-nr1rsqrts.c", |
| 2924 | "src/math/sqrt-neon-nr2rsqrts.c", |
| 2925 | "src/math/sqrt-neon-nr3rsqrts.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2926 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c", |
| 2927 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2928 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2929 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c", |
| 2930 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2931 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2932 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c", |
| 2933 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c", |
| 2934 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c", |
| 2935 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2936 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 2937 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c", |
| 2938 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c", |
| 2939 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c", |
| 2940 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 2941 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| 2942 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| 2943 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| 2944 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| 2945 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 2946 | "src/qc8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 2947 | "src/qc8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2948 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 2949 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 2950 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 2951 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2952 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 2953 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 2954 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 2955 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2956 | "src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 2957 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 2958 | "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2959 | "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 2960 | "src/qc8-gemm/gen/2x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 2961 | "src/qc8-gemm/gen/2x8-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2962 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 2963 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 2964 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 2965 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2966 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 2967 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 2968 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 2969 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2970 | "src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 2971 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 2972 | "src/qc8-gemm/gen/2x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 2973 | "src/qc8-gemm/gen/2x16-minmax-fp32-neon-mlal-lane.c", |
| 2974 | "src/qc8-gemm/gen/3x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 2975 | "src/qc8-gemm/gen/3x8-minmax-fp32-neon-mlal-lane.c", |
| 2976 | "src/qc8-gemm/gen/3x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 2977 | "src/qc8-gemm/gen/3x16-minmax-fp32-neon-mlal-lane.c", |
| 2978 | "src/qc8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 2979 | "src/qc8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| 2980 | "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2981 | "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 2982 | "src/qc8-gemm/gen/6x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 2983 | "src/qc8-gemm/gen/6x8-minmax-fp32-neon-mlal-lane.c", |
| 2984 | "src/qc8-gemm/gen/6x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 2985 | "src/qc8-gemm/gen/6x16-minmax-fp32-neon-mlal-lane.c", |
| 2986 | "src/qc8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 2987 | "src/qc8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2988 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 2989 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 2990 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 2991 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2992 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 2993 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 2994 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 2995 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2996 | "src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 2997 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 2998 | "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 2999 | "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3000 | "src/qc8-igemm/gen/2x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3001 | "src/qc8-igemm/gen/2x8-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3002 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3003 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3004 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3005 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3006 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3007 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3008 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3009 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3010 | "src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3011 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3012 | "src/qc8-igemm/gen/2x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3013 | "src/qc8-igemm/gen/2x16-minmax-fp32-neon-mlal-lane.c", |
| 3014 | "src/qc8-igemm/gen/3x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3015 | "src/qc8-igemm/gen/3x8-minmax-fp32-neon-mlal-lane.c", |
| 3016 | "src/qc8-igemm/gen/3x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3017 | "src/qc8-igemm/gen/3x16-minmax-fp32-neon-mlal-lane.c", |
| 3018 | "src/qc8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3019 | "src/qc8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| 3020 | "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 3021 | "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3022 | "src/qc8-igemm/gen/6x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3023 | "src/qc8-igemm/gen/6x8-minmax-fp32-neon-mlal-lane.c", |
| 3024 | "src/qc8-igemm/gen/6x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3025 | "src/qc8-igemm/gen/6x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3026 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3027 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c", |
| 3028 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 3029 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3030 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3031 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c", |
| 3032 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 3033 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3034 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3035 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c", |
| 3036 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c", |
| 3037 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c", |
| 3038 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 3039 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3040 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3041 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c", |
| 3042 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c", |
| 3043 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c", |
| 3044 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 3045 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3046 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3047 | "src/qs8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3048 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3049 | "src/qs8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3050 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3051 | "src/qs8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3052 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 2aa2e2a | 2021-09-16 14:59:13 -0700 | [diff] [blame] | 3053 | "src/qs8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | fee66be | 2021-12-09 17:51:15 -0800 | [diff] [blame] | 3054 | "src/qs8-f32-vcvt/gen/vcvt-neon-x8.c", |
| 3055 | "src/qs8-f32-vcvt/gen/vcvt-neon-x16.c", |
| 3056 | "src/qs8-f32-vcvt/gen/vcvt-neon-x24.c", |
| 3057 | "src/qs8-f32-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 281262d | 2020-08-10 13:23:21 -0700 | [diff] [blame] | 3058 | "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c", |
| 3059 | "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c", |
| 3060 | "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c", |
| 3061 | "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3062 | "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c", |
| 3063 | "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c", |
| 3064 | "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c", |
| 3065 | "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3066 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3067 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3068 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3069 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3070 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3071 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3072 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3073 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3074 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3075 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3076 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3077 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3078 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3079 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3080 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3081 | "src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 3082 | "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3083 | "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c", |
| 3084 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3085 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3086 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3087 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3088 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3089 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3090 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3091 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3092 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3093 | "src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 3094 | "src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3095 | "src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c", |
| 3096 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3097 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3098 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mull.c", |
| 3099 | "src/qs8-gemm/gen/1x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 3100 | "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 3101 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3102 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3103 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3104 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3105 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3106 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3107 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3108 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3109 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3110 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3111 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3112 | "src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3113 | "src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c", |
| 3114 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3115 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3116 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3117 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3118 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3119 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3120 | "src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3121 | "src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3122 | "src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mlal.c", |
| 3123 | "src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mull.c", |
| 3124 | "src/qs8-gemm/gen/1x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3125 | "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3126 | "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3127 | "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3128 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3129 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3130 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3131 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3132 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3133 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3134 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3135 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3136 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3137 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3138 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3139 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3140 | "src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3141 | "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3142 | "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c", |
| 3143 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3144 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3145 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3146 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3147 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3148 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3149 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3150 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3151 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3152 | "src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3153 | "src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3154 | "src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c", |
| 3155 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3156 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3157 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mull.c", |
| 3158 | "src/qs8-gemm/gen/2x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3159 | "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3160 | "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3161 | "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3162 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3163 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3164 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3165 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3166 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3167 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3168 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3169 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3170 | "src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3171 | "src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c", |
| 3172 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3173 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3174 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3175 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3176 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3177 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3178 | "src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3179 | "src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3180 | "src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mlal.c", |
| 3181 | "src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mull.c", |
| 3182 | "src/qs8-gemm/gen/2x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3183 | "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3184 | "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3185 | "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3186 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3187 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3188 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3189 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3190 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3191 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3192 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3193 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3194 | "src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3195 | "src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c", |
| 3196 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3197 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3198 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3199 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3200 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3201 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3202 | "src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3203 | "src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3204 | "src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mlal.c", |
| 3205 | "src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mull.c", |
| 3206 | "src/qs8-gemm/gen/3x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3207 | "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3208 | "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3209 | "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3210 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3211 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3212 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3213 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3214 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3215 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3216 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3217 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3218 | "src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3219 | "src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c", |
| 3220 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3221 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3222 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3223 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3224 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3225 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3226 | "src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3227 | "src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3228 | "src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mlal.c", |
| 3229 | "src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mull.c", |
| 3230 | "src/qs8-gemm/gen/3x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3231 | "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3232 | "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3233 | "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3234 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3235 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3236 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3237 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3238 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3239 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3240 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3241 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3242 | "src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3243 | "src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c", |
| 3244 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3245 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3246 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3247 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3248 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3249 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3250 | "src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3251 | "src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3252 | "src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mlal.c", |
| 3253 | "src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mull.c", |
| 3254 | "src/qs8-gemm/gen/4x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 3255 | "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 3256 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3257 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3258 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3259 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3260 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3261 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3262 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3263 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3264 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3265 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3266 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3267 | "src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3268 | "src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c", |
| 3269 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3270 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3271 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3272 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3273 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3274 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3275 | "src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3276 | "src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3277 | "src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mlal.c", |
| 3278 | "src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mull.c", |
| 3279 | "src/qs8-gemm/gen/4x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3280 | "src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3281 | "src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3282 | "src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3283 | "src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3284 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3285 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3286 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3287 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3288 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3289 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3290 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3291 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3292 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3293 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3294 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3295 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3296 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3297 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3298 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3299 | "src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 3300 | "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3301 | "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c", |
| 3302 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3303 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3304 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3305 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3306 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3307 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3308 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3309 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3310 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3311 | "src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 3312 | "src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3313 | "src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c", |
| 3314 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3315 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3316 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mull.c", |
| 3317 | "src/qs8-igemm/gen/1x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 3318 | "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 3319 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3320 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3321 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3322 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3323 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3324 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3325 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3326 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3327 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3328 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3329 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3330 | "src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3331 | "src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c", |
| 3332 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3333 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3334 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3335 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3336 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3337 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3338 | "src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3339 | "src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3340 | "src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mlal.c", |
| 3341 | "src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mull.c", |
| 3342 | "src/qs8-igemm/gen/1x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3343 | "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3344 | "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3345 | "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3346 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3347 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3348 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3349 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3350 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3351 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3352 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3353 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3354 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3355 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3356 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3357 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3358 | "src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3359 | "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3360 | "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c", |
| 3361 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3362 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3363 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3364 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3365 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3366 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3367 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3368 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3369 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3370 | "src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3371 | "src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3372 | "src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c", |
| 3373 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3374 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3375 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mull.c", |
| 3376 | "src/qs8-igemm/gen/2x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3377 | "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3378 | "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3379 | "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3380 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3381 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3382 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3383 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3384 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3385 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3386 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3387 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3388 | "src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3389 | "src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c", |
| 3390 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3391 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3392 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3393 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3394 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3395 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3396 | "src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3397 | "src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3398 | "src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mlal.c", |
| 3399 | "src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mull.c", |
| 3400 | "src/qs8-igemm/gen/2x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3401 | "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3402 | "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3403 | "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3404 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3405 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3406 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3407 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3408 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3409 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3410 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3411 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3412 | "src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3413 | "src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c", |
| 3414 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3415 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3416 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3417 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3418 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3419 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3420 | "src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3421 | "src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3422 | "src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mlal.c", |
| 3423 | "src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mull.c", |
| 3424 | "src/qs8-igemm/gen/3x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3425 | "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3426 | "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3427 | "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3428 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3429 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3430 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3431 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3432 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3433 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3434 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3435 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3436 | "src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3437 | "src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c", |
| 3438 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3439 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3440 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3441 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3442 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3443 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3444 | "src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3445 | "src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3446 | "src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mlal.c", |
| 3447 | "src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mull.c", |
| 3448 | "src/qs8-igemm/gen/3x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3449 | "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3450 | "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3451 | "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3452 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3453 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3454 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3455 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3456 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3457 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3458 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3459 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3460 | "src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3461 | "src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c", |
| 3462 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3463 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3464 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3465 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3466 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3467 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3468 | "src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3469 | "src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3470 | "src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mlal.c", |
| 3471 | "src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mull.c", |
| 3472 | "src/qs8-igemm/gen/4x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 3473 | "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 3474 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3475 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3476 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3477 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3478 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3479 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3480 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3481 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3482 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3483 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3484 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3485 | "src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3486 | "src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c", |
| 3487 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3488 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3489 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3490 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3491 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3492 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3493 | "src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3494 | "src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3495 | "src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mlal.c", |
| 3496 | "src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mull.c", |
| 3497 | "src/qs8-igemm/gen/4x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3498 | "src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3499 | "src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3500 | "src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3501 | "src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 2e23d2b | 2020-07-29 16:01:37 -0700 | [diff] [blame] | 3502 | "src/qs8-requantization/fp32-neon.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 3503 | "src/qs8-requantization/gemmlowp-neon.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 3504 | "src/qs8-requantization/rndna-neon.c", |
| Marat Dukhan | d3d818c | 2021-07-16 17:56:54 -0700 | [diff] [blame] | 3505 | "src/qs8-requantization/rndnu-neon-mull.c", |
| 3506 | "src/qs8-requantization/rndnu-neon-qdmulh.c", |
| Marat Dukhan | ba7b279 | 2020-09-02 14:26:45 -0700 | [diff] [blame] | 3507 | "src/qs8-vadd/gen/minmax-neon-ld64-x8.c", |
| 3508 | "src/qs8-vadd/gen/minmax-neon-ld64-x16.c", |
| 3509 | "src/qs8-vadd/gen/minmax-neon-ld64-x24.c", |
| 3510 | "src/qs8-vadd/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 3511 | "src/qs8-vadd/gen/minmax-neon-ld128-x16.c", |
| 3512 | "src/qs8-vadd/gen/minmax-neon-ld128-x32.c", |
| Marat Dukhan | ba7b279 | 2020-09-02 14:26:45 -0700 | [diff] [blame] | 3513 | "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c", |
| 3514 | "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 3515 | "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c", |
| 3516 | "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 3517 | "src/qs8-vaddc/gen/minmax-neon-ld128-x16.c", |
| 3518 | "src/qs8-vaddc/gen/minmax-neon-ld128-x32.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 3519 | "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x8.c", |
| 3520 | "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 3521 | "src/qs8-vmul/gen/minmax-fp32-neon-ld128-x16.c", |
| 3522 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x8.c", |
| 3523 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| 3524 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld128-x16.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 3525 | "src/qu8-avgpool/9p8x-minmax-neon-c8.c", |
| 3526 | "src/qu8-avgpool/9x-minmax-neon-c8.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3527 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3528 | "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 3529 | "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3530 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3531 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 3532 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3533 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3534 | "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 3535 | "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3536 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3537 | "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 3538 | "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3539 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3540 | "src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul8.c", |
| 3541 | "src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3542 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3543 | "src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul8.c", |
| 3544 | "src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3545 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3546 | "src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul8.c", |
| 3547 | "src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3548 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3549 | "src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul8.c", |
| 3550 | "src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | fee66be | 2021-12-09 17:51:15 -0800 | [diff] [blame] | 3551 | "src/qu8-f32-vcvt/gen/vcvt-neon-x8.c", |
| 3552 | "src/qu8-f32-vcvt/gen/vcvt-neon-x16.c", |
| 3553 | "src/qu8-f32-vcvt/gen/vcvt-neon-x24.c", |
| 3554 | "src/qu8-f32-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 3555 | "src/qu8-gavgpool/7p7x-minmax-neon-c8.c", |
| 3556 | "src/qu8-gavgpool/7x-minmax-neon-c8.c", |
| Digant Desai | 59d6515 | 2021-11-29 10:44:04 -0800 | [diff] [blame] | 3557 | "src/qu8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3558 | "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 3559 | "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3560 | "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Digant Desai | 59d6515 | 2021-11-29 10:44:04 -0800 | [diff] [blame] | 3561 | "src/qu8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3562 | "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 3563 | "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3564 | "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Digant Desai | 59d6515 | 2021-11-29 10:44:04 -0800 | [diff] [blame] | 3565 | "src/qu8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3566 | "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 3567 | "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3568 | "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Digant Desai | 59d6515 | 2021-11-29 10:44:04 -0800 | [diff] [blame] | 3569 | "src/qu8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3570 | "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 3571 | "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3572 | "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 3573 | "src/qu8-requantization/fp32-neon.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 3574 | "src/qu8-requantization/gemmlowp-neon.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 3575 | "src/qu8-requantization/rndna-neon.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 3576 | "src/qu8-vadd/gen/minmax-neon-ld64-x8.c", |
| 3577 | "src/qu8-vadd/gen/minmax-neon-ld64-x16.c", |
| Frank Barchard | 0a3093c | 2021-08-31 09:58:11 -0700 | [diff] [blame] | 3578 | "src/qu8-vadd/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 3579 | "src/qu8-vadd/gen/minmax-neon-ld128-x16.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 3580 | "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c", |
| 3581 | "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c", |
| Frank Barchard | 0a3093c | 2021-08-31 09:58:11 -0700 | [diff] [blame] | 3582 | "src/qu8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 3583 | "src/qu8-vaddc/gen/minmax-neon-ld128-x16.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 3584 | "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x8.c", |
| 3585 | "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 3586 | "src/qu8-vmul/gen/minmax-fp32-neon-ld128-x16.c", |
| 3587 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x8.c", |
| 3588 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| 3589 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld128-x16.c", |
| Marat Dukhan | cdb42a5 | 2021-11-22 20:09:32 -0800 | [diff] [blame] | 3590 | "src/s8-ibilinear/gen/neon-c8.c", |
| 3591 | "src/s8-ibilinear/gen/neon-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 3592 | "src/s8-maxpool/9p8x-minmax-neon-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 3593 | "src/s8-vclamp/neon-x64.c", |
| Marat Dukhan | cdb42a5 | 2021-11-22 20:09:32 -0800 | [diff] [blame] | 3594 | "src/u8-ibilinear/gen/neon-c8.c", |
| 3595 | "src/u8-ibilinear/gen/neon-c16.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3596 | "src/u8-maxpool/9p8x-minmax-neon-c16.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3597 | "src/u8-rmax/neon.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 3598 | "src/u8-vclamp/neon-x64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3599 | "src/x8-zip/x2-neon.c", |
| 3600 | "src/x8-zip/x3-neon.c", |
| 3601 | "src/x8-zip/x4-neon.c", |
| 3602 | "src/x8-zip/xm-neon.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3603 | "src/x32-packx/x4-neon-st4.c", |
| Marat Dukhan | 57dccd8 | 2020-04-14 00:53:10 -0700 | [diff] [blame] | 3604 | "src/x32-unpool/neon.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3605 | "src/x32-zip/x2-neon.c", |
| 3606 | "src/x32-zip/x3-neon.c", |
| 3607 | "src/x32-zip/x4-neon.c", |
| 3608 | "src/x32-zip/xm-neon.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 3609 | "src/xx-fill/neon-x64.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 3610 | "src/xx-pad/neon.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3611 | ] |
| 3612 | |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 3613 | PROD_NEONFP16_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 3614 | "src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 3615 | "src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 3616 | ] |
| 3617 | |
| 3618 | ALL_NEONFP16_MICROKERNEL_SRCS = [ |
| 3619 | "src/f16-f32-vcvt/gen/vcvt-neonfp16-x8.c", |
| 3620 | "src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c", |
| Marat Dukhan | d77f77d | 2021-10-24 15:39:59 -0700 | [diff] [blame] | 3621 | "src/f32-f16-vcvt/gen/vcvt-neonfp16-x8.c", |
| 3622 | "src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c", |
| Marat Dukhan | 3ed866b | 2021-09-29 08:23:33 -0700 | [diff] [blame] | 3623 | "src/math/cvt-f16-f32-neonfp16.c", |
| Marat Dukhan | 582e184 | 2021-10-25 17:18:36 -0700 | [diff] [blame] | 3624 | "src/math/cvt-f32-f16-neonfp16.c", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 3625 | ] |
| 3626 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3627 | PROD_NEONFMA_MICROKERNEL_SRCS = [ |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 3628 | "src/f32-dwconv/gen/up8x3-minmax-neonfma.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3629 | "src/f32-dwconv/gen/up8x4-minmax-neonfma.c", |
| 3630 | "src/f32-dwconv/gen/up8x9-minmax-neonfma.c", |
| Frank Barchard | dbe781b | 2021-10-18 10:29:52 -0700 | [diff] [blame] | 3631 | "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3632 | "src/f32-gemm/gen/1x8s4-minmax-neonfma.c", |
| 3633 | "src/f32-gemm/gen/6x8s4-minmax-neonfma.c", |
| 3634 | "src/f32-ibilinear-chw/gen/neonfma-p8.c", |
| 3635 | "src/f32-ibilinear/gen/neonfma-c8.c", |
| 3636 | "src/f32-igemm/gen/1x8s4-minmax-neonfma.c", |
| 3637 | "src/f32-igemm/gen/6x8s4-minmax-neonfma.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 3638 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3639 | "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c", |
| 3640 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c", |
| 3641 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c", |
| 3642 | "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c", |
| 3643 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c", |
| 3644 | ] |
| 3645 | |
| 3646 | ALL_NEONFMA_MICROKERNEL_SRCS = [ |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 3647 | "src/f32-dwconv/gen/up4x3-minmax-neonfma-acc2.c", |
| 3648 | "src/f32-dwconv/gen/up4x3-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3649 | "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c", |
| 3650 | "src/f32-dwconv/gen/up4x4-minmax-neonfma.c", |
| 3651 | "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c", |
| 3652 | "src/f32-dwconv/gen/up4x9-minmax-neonfma.c", |
| 3653 | "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c", |
| 3654 | "src/f32-dwconv/gen/up4x25-minmax-neonfma.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 3655 | "src/f32-dwconv/gen/up8x3-minmax-neonfma-acc2.c", |
| 3656 | "src/f32-dwconv/gen/up8x3-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3657 | "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c", |
| 3658 | "src/f32-dwconv/gen/up8x4-minmax-neonfma.c", |
| 3659 | "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c", |
| 3660 | "src/f32-dwconv/gen/up8x9-minmax-neonfma.c", |
| 3661 | "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c", |
| 3662 | "src/f32-dwconv/gen/up8x25-minmax-neonfma.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 3663 | "src/f32-dwconv/gen/up16x3-minmax-neon-acc2.c", |
| 3664 | "src/f32-dwconv/gen/up16x3-minmax-neon.c", |
| 3665 | "src/f32-dwconv/gen/up16x3-minmax-neonfma-acc2.c", |
| 3666 | "src/f32-dwconv/gen/up16x3-minmax-neonfma.c", |
| Frank Barchard | c9f9d67 | 2021-10-18 12:51:59 -0700 | [diff] [blame] | 3667 | "src/f32-dwconv/gen/up16x4-minmax-neon-acc2.c", |
| 3668 | "src/f32-dwconv/gen/up16x4-minmax-neon.c", |
| 3669 | "src/f32-dwconv/gen/up16x4-minmax-neonfma-acc2.c", |
| 3670 | "src/f32-dwconv/gen/up16x4-minmax-neonfma.c", |
| 3671 | "src/f32-dwconv/gen/up16x9-minmax-neon-acc2.c", |
| 3672 | "src/f32-dwconv/gen/up16x9-minmax-neon.c", |
| 3673 | "src/f32-dwconv/gen/up16x9-minmax-neonfma-acc2.c", |
| 3674 | "src/f32-dwconv/gen/up16x9-minmax-neonfma.c", |
| 3675 | "src/f32-dwconv/gen/up16x25-minmax-neon-acc2.c", |
| 3676 | "src/f32-dwconv/gen/up16x25-minmax-neon.c", |
| 3677 | "src/f32-dwconv/gen/up16x25-minmax-neonfma-acc2.c", |
| 3678 | "src/f32-dwconv/gen/up16x25-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3679 | "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c", |
| 3680 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c", |
| 3681 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c", |
| 3682 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c", |
| 3683 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c", |
| 3684 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c", |
| 3685 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c", |
| 3686 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c", |
| 3687 | "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c", |
| 3688 | "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c", |
| 3689 | "src/f32-gemm/gen/1x8s4-minmax-neonfma.c", |
| 3690 | "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c", |
| 3691 | "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c", |
| 3692 | "src/f32-gemm/gen/4x8s4-minmax-neonfma.c", |
| 3693 | "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c", |
| 3694 | "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c", |
| 3695 | "src/f32-gemm/gen/6x8s4-minmax-neonfma.c", |
| 3696 | "src/f32-gemm/gen/8x8s4-minmax-neonfma.c", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 3697 | "src/f32-ibilinear-chw/gen/neonfma-p4.c", |
| 3698 | "src/f32-ibilinear-chw/gen/neonfma-p8.c", |
| Frank Barchard | 8247e21 | 2021-02-03 18:12:33 -0800 | [diff] [blame] | 3699 | "src/f32-ibilinear/gen/neonfma-c4.c", |
| 3700 | "src/f32-ibilinear/gen/neonfma-c8.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3701 | "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3702 | "src/f32-igemm/gen/1x8s4-minmax-neonfma.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3703 | "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3704 | "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c", |
| 3705 | "src/f32-igemm/gen/4x8s4-minmax-neonfma.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3706 | "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c", |
| 3707 | "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3708 | "src/f32-igemm/gen/6x8s4-minmax-neonfma.c", |
| 3709 | "src/f32-igemm/gen/8x8s4-minmax-neonfma.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3710 | "src/f32-ppmm/gen/4x8-minmax-neonfma.c", |
| 3711 | "src/f32-ppmm/gen/8x8-minmax-neonfma.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 3712 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x4.c", |
| 3713 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x8-acc2.c", |
| 3714 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x8.c", |
| 3715 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12-acc2.c", |
| 3716 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12-acc3.c", |
| 3717 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12.c", |
| 3718 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16-acc2.c", |
| 3719 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16-acc4.c", |
| 3720 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16.c", |
| 3721 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20-acc2.c", |
| 3722 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20-acc5.c", |
| 3723 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20.c", |
| 3724 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x4.c", |
| 3725 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x8-acc2.c", |
| 3726 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x8.c", |
| 3727 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12-acc2.c", |
| 3728 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12-acc3.c", |
| 3729 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12.c", |
| 3730 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16-acc2.c", |
| 3731 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16-acc4.c", |
| 3732 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16.c", |
| 3733 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20-acc2.c", |
| 3734 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20-acc5.c", |
| 3735 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20.c", |
| Marat Dukhan | 2fa7a0c | 2020-12-06 19:09:02 -0800 | [diff] [blame] | 3736 | "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c", |
| 3737 | "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c", |
| 3738 | "src/f32-spmm/gen/4x1-minmax-neonfma.c", |
| 3739 | "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c", |
| 3740 | "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c", |
| 3741 | "src/f32-spmm/gen/8x1-minmax-neonfma.c", |
| 3742 | "src/f32-spmm/gen/12x1-minmax-neonfma.c", |
| 3743 | "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c", |
| 3744 | "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c", |
| 3745 | "src/f32-spmm/gen/16x1-minmax-neonfma.c", |
| 3746 | "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c", |
| 3747 | "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c", |
| 3748 | "src/f32-spmm/gen/32x1-minmax-neonfma.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3749 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c", |
| 3750 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c", |
| 3751 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c", |
| 3752 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c", |
| 3753 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c", |
| 3754 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c", |
| 3755 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c", |
| 3756 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c", |
| 3757 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c", |
| 3758 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c", |
| 3759 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c", |
| 3760 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3761 | "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c", |
| 3762 | "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 3763 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c", |
| 3764 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c", |
| 3765 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c", |
| 3766 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c", |
| 3767 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c", |
| 3768 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c", |
| 3769 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c", |
| 3770 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c", |
| 3771 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c", |
| 3772 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c", |
| 3773 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c", |
| 3774 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c", |
| 3775 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c", |
| 3776 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c", |
| 3777 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c", |
| 3778 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c", |
| 3779 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c", |
| 3780 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c", |
| 3781 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c", |
| 3782 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c", |
| 3783 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c", |
| 3784 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c", |
| 3785 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c", |
| 3786 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c", |
| 3787 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c", |
| 3788 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c", |
| 3789 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c", |
| 3790 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c", |
| 3791 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c", |
| 3792 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c", |
| 3793 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c", |
| 3794 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c", |
| 3795 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c", |
| 3796 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c", |
| 3797 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c", |
| 3798 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c", |
| 3799 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c", |
| 3800 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c", |
| 3801 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c", |
| 3802 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c", |
| 3803 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c", |
| 3804 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c", |
| 3805 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c", |
| 3806 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c", |
| 3807 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c", |
| 3808 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c", |
| 3809 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c", |
| 3810 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c", |
| 3811 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c", |
| 3812 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c", |
| 3813 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c", |
| 3814 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c", |
| 3815 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c", |
| 3816 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 3817 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c", |
| 3818 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c", |
| 3819 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c", |
| 3820 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c", |
| 3821 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c", |
| 3822 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c", |
| 3823 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c", |
| 3824 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c", |
| 3825 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c", |
| 3826 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c", |
| 3827 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c", |
| 3828 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c", |
| 3829 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c", |
| 3830 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c", |
| 3831 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c", |
| 3832 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c", |
| 3833 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c", |
| 3834 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c", |
| 3835 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c", |
| 3836 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 3837 | "src/math/exp-neonfma-rr2-lut64-p2.c", |
| 3838 | "src/math/exp-neonfma-rr2-p5.c", |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 3839 | "src/math/expm1minus-neonfma-rr1-lut16-p3.c", |
| 3840 | "src/math/expm1minus-neonfma-rr1-p6.c", |
| Marat Dukhan | 9dd119a | 2020-11-20 18:20:04 -0800 | [diff] [blame] | 3841 | "src/math/expminus-neonfma-rr2-lut64-p2.c", |
| 3842 | "src/math/expminus-neonfma-rr2-lut2048-p1.c", |
| 3843 | "src/math/expminus-neonfma-rr2-p5.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 3844 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c", |
| 3845 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c", |
| 3846 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3847 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c", |
| 3848 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c", |
| 3849 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 3850 | "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c", |
| 3851 | "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c", |
| 3852 | "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 3853 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c", |
| 3854 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c", |
| 3855 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3856 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c", |
| 3857 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c", |
| 3858 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 3859 | "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c", |
| 3860 | "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c", |
| 3861 | "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 3862 | "src/math/sqrt-neonfma-nr1fma.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 3863 | "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3864 | "src/math/sqrt-neonfma-nr2fma.c", |
| 3865 | "src/math/sqrt-neonfma-nr2fma1adj.c", |
| 3866 | "src/math/sqrt-neonfma-nr3fma.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3867 | ] |
| 3868 | |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 3869 | PROD_AARCH64_NEON_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3870 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c", |
| 3871 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c", |
| 3872 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c", |
| 3873 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c", |
| 3874 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c", |
| 3875 | "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 3876 | "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 3877 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 3878 | "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 3879 | "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 3880 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 3881 | "src/f32-spmm/gen/32x2-minmax-neonfma.c", |
| 3882 | "src/f32-spmm/gen/32x4-minmax-neonfma.c", |
| 3883 | "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c", |
| 3884 | "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c", |
| 3885 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c", |
| 3886 | "src/f32-vsqrt/gen/neon-sqrt-x4.c", |
| Marat Dukhan | 98e054b | 2021-09-13 09:43:50 -0700 | [diff] [blame] | 3887 | "src/x8-lut/gen/lut-neon-tbx128x4-x64.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3888 | ] |
| 3889 | |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 3890 | ALL_AARCH64_NEON_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 3891 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 3892 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3893 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 3894 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c", |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 3895 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 3896 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3897 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 3898 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 3899 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3900 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c", |
| 3901 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c", |
| 3902 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c", |
| Marat Dukhan | 1268a24 | 2020-10-24 00:36:32 -0700 | [diff] [blame] | 3903 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3904 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c", |
| Marat Dukhan | 1268a24 | 2020-10-24 00:36:32 -0700 | [diff] [blame] | 3905 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c", |
| 3906 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c", |
| 3907 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c", |
| 3908 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c", |
| 3909 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 3910 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c", |
| 3911 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c", |
| 3912 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3913 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 3914 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3915 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c", |
| 3916 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c", |
| 3917 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 3918 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c", |
| 3919 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c", |
| 3920 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c", |
| 3921 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3922 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 3923 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c", |
| 3924 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3925 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 3926 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3927 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 3928 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 3929 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c", |
| 3930 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 3931 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c", |
| 3932 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c", |
| 3933 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c", |
| 3934 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c", |
| 3935 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c", |
| 3936 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c", |
| 3937 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c", |
| 3938 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 3939 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 3940 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3941 | "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c", |
| 3942 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c", |
| 3943 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c", |
| 3944 | "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c", |
| 3945 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c", |
| 3946 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c", |
| 3947 | "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 3948 | "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 3949 | "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c", |
| 3950 | "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c", |
| 3951 | "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c", |
| 3952 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 3953 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c", |
| 3954 | "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 3955 | "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 3956 | "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c", |
| 3957 | "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c", |
| 3958 | "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c", |
| 3959 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 3960 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 3961 | "src/f32-spmm/gen/4x2-minmax-neonfma.c", |
| 3962 | "src/f32-spmm/gen/4x4-minmax-neonfma.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 3963 | "src/f32-spmm/gen/8x2-minmax-neonfma.c", |
| 3964 | "src/f32-spmm/gen/8x4-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3965 | "src/f32-spmm/gen/12x2-minmax-neonfma.c", |
| 3966 | "src/f32-spmm/gen/12x4-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3967 | "src/f32-spmm/gen/16x2-minmax-neonfma.c", |
| 3968 | "src/f32-spmm/gen/16x4-minmax-neonfma.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 3969 | "src/f32-spmm/gen/32x2-minmax-neonfma.c", |
| 3970 | "src/f32-spmm/gen/32x4-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3971 | "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c", |
| 3972 | "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c", |
| 3973 | "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c", |
| 3974 | "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c", |
| 3975 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c", |
| 3976 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 3977 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c", |
| 3978 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c", |
| 3979 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c", |
| 3980 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c", |
| 3981 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c", |
| 3982 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c", |
| 3983 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c", |
| 3984 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c", |
| 3985 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c", |
| 3986 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c", |
| 3987 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c", |
| 3988 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c", |
| 3989 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c", |
| 3990 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c", |
| 3991 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c", |
| 3992 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c", |
| 3993 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c", |
| 3994 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 3995 | "src/f32-vsqrt/gen/neon-sqrt-x4.c", |
| 3996 | "src/f32-vsqrt/gen/neon-sqrt-x8.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 3997 | "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3998 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 3999 | "src/math/sigmoid-neonfma-rr1-p5-div.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 4000 | "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4001 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 4002 | "src/math/sigmoid-neonfma-rr2-p5-div.c", |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 4003 | "src/x8-lut/gen/lut-neon-tbx128x4-x16.c", |
| 4004 | "src/x8-lut/gen/lut-neon-tbx128x4-x32.c", |
| 4005 | "src/x8-lut/gen/lut-neon-tbx128x4-x48.c", |
| 4006 | "src/x8-lut/gen/lut-neon-tbx128x4-x64.c", |
| Alan Kelly | ed90216 | 2022-01-05 01:51:30 -0800 | [diff] [blame] | 4007 | "src/x32-transpose/4x4-aarch64-tbl.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 4008 | ] |
| 4009 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4010 | PROD_NEONV8_MICROKERNEL_SRCS = [ |
| Frank Barchard | cb052a3 | 2021-12-10 14:16:33 -0800 | [diff] [blame] | 4011 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c", |
| 4012 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4013 | "src/f32-vrnd/gen/vrndd-neonv8-x8.c", |
| 4014 | "src/f32-vrnd/gen/vrndne-neonv8-x8.c", |
| 4015 | "src/f32-vrnd/gen/vrndu-neonv8-x8.c", |
| 4016 | "src/f32-vrnd/gen/vrndz-neonv8-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4017 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c", |
| Frank Barchard | 7da8b02 | 2021-08-31 09:49:10 -0700 | [diff] [blame] | 4018 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 4019 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c", |
| Frank Barchard | f290a14 | 2022-01-05 01:08:37 -0800 | [diff] [blame] | 4020 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4021 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4022 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4023 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4024 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4025 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4026 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4027 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | f290a14 | 2022-01-05 01:08:37 -0800 | [diff] [blame] | 4028 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4029 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4030 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4031 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4032 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4033 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4034 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4035 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 4036 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4037 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4038 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4039 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4040 | ] |
| 4041 | |
| 4042 | ALL_NEONV8_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 3df14d3 | 2021-12-01 13:05:51 -0800 | [diff] [blame] | 4043 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x8.c", |
| 4044 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x16.c", |
| 4045 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x24.c", |
| 4046 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c", |
| 4047 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x8.c", |
| 4048 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x16.c", |
| 4049 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x24.c", |
| 4050 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c", |
| Frank Barchard | cb052a3 | 2021-12-10 14:16:33 -0800 | [diff] [blame] | 4051 | "src/f32-vrnd/gen/vrndd-neonv8-x4.c", |
| 4052 | "src/f32-vrnd/gen/vrndd-neonv8-x8.c", |
| 4053 | "src/f32-vrnd/gen/vrndne-neonv8-x4.c", |
| 4054 | "src/f32-vrnd/gen/vrndne-neonv8-x8.c", |
| 4055 | "src/f32-vrnd/gen/vrndu-neonv8-x4.c", |
| 4056 | "src/f32-vrnd/gen/vrndu-neonv8-x8.c", |
| 4057 | "src/f32-vrnd/gen/vrndz-neonv8-x4.c", |
| 4058 | "src/f32-vrnd/gen/vrndz-neonv8-x8.c", |
| Marat Dukhan | d24301d | 2021-12-02 00:13:45 -0800 | [diff] [blame] | 4059 | "src/math/cvt-f32-qs8-neonv8.c", |
| 4060 | "src/math/cvt-f32-qu8-neonv8.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 4061 | "src/math/roundd-neonv8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4062 | "src/math/roundne-neonv8.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 4063 | "src/math/roundu-neonv8.c", |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 4064 | "src/math/roundz-neonv8.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 4065 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 4066 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 4067 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 4068 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 4069 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 4070 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 4071 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 4072 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c", |
| 4073 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c", |
| 4074 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 4075 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 4076 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 4077 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c", |
| 4078 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c", |
| 4079 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 4080 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 4081 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 4082 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 4083 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 4084 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4085 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4086 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4087 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4088 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4089 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4090 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4091 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4092 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4093 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4094 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4095 | "src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4096 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4097 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 4098 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4099 | "src/qc8-gemm/gen/2x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4100 | "src/qc8-gemm/gen/2x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4101 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4102 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4103 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4104 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4105 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4106 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4107 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4108 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4109 | "src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4110 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4111 | "src/qc8-gemm/gen/2x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4112 | "src/qc8-gemm/gen/2x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4113 | "src/qc8-gemm/gen/3x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4114 | "src/qc8-gemm/gen/3x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4115 | "src/qc8-gemm/gen/3x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4116 | "src/qc8-gemm/gen/3x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4117 | "src/qc8-gemm/gen/4x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4118 | "src/qc8-gemm/gen/4x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4119 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 4120 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4121 | "src/qc8-gemm/gen/6x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4122 | "src/qc8-gemm/gen/6x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4123 | "src/qc8-gemm/gen/6x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4124 | "src/qc8-gemm/gen/6x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4125 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4126 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4127 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4128 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4129 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4130 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4131 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4132 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4133 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4134 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4135 | "src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4136 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4137 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 4138 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4139 | "src/qc8-igemm/gen/2x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4140 | "src/qc8-igemm/gen/2x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4141 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4142 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4143 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4144 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4145 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4146 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4147 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4148 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4149 | "src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4150 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4151 | "src/qc8-igemm/gen/2x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4152 | "src/qc8-igemm/gen/2x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4153 | "src/qc8-igemm/gen/3x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4154 | "src/qc8-igemm/gen/3x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4155 | "src/qc8-igemm/gen/3x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4156 | "src/qc8-igemm/gen/3x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4157 | "src/qc8-igemm/gen/4x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4158 | "src/qc8-igemm/gen/4x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4159 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 4160 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4161 | "src/qc8-igemm/gen/6x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4162 | "src/qc8-igemm/gen/6x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4163 | "src/qc8-igemm/gen/6x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4164 | "src/qc8-igemm/gen/6x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 4165 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| 4166 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| 4167 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| 4168 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 4169 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 4170 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 4171 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 4172 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4173 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4174 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4175 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4176 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4177 | "src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4178 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4179 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4180 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4181 | "src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4182 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 4183 | "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4184 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4185 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4186 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4187 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4188 | "src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4189 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4190 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4191 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4192 | "src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4193 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 4194 | "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4195 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4196 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4197 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4198 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4199 | "src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4200 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4201 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4202 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4203 | "src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4204 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 4205 | "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4206 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4207 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4208 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4209 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4210 | "src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4211 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4212 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4213 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4214 | "src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4215 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 4216 | "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 4217 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4218 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4219 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c", |
| 4220 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4221 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4222 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 4223 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| 4224 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| 4225 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| 4226 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 4227 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 4228 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 4229 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 4230 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 4231 | "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4232 | "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4233 | "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4234 | "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 4235 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4236 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4237 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c", |
| 4238 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4239 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4240 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 4241 | ] |
| 4242 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4243 | PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [ |
| 4244 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c", |
| 4245 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c", |
| 4246 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c", |
| 4247 | "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c", |
| 4248 | "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c", |
| 4249 | "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4250 | "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4251 | "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4252 | "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4253 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c", |
| 4254 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c", |
| 4255 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c", |
| 4256 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c", |
| 4257 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c", |
| 4258 | "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c", |
| 4259 | ] |
| 4260 | |
| 4261 | ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [ |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 4262 | "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c", |
| 4263 | "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c", |
| 4264 | "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c", |
| 4265 | "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4266 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c", |
| 4267 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c", |
| 4268 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c", |
| 4269 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c", |
| 4270 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c", |
| 4271 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c", |
| 4272 | "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c", |
| 4273 | "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c", |
| Frank Barchard | c9f9d67 | 2021-10-18 12:51:59 -0700 | [diff] [blame] | 4274 | "src/f16-dwconv/gen/up32x4-minmax-neonfp16arith-acc2.c", |
| 4275 | "src/f16-dwconv/gen/up32x4-minmax-neonfp16arith.c", |
| 4276 | "src/f16-dwconv/gen/up32x9-minmax-neonfp16arith-acc2.c", |
| 4277 | "src/f16-dwconv/gen/up32x9-minmax-neonfp16arith.c", |
| 4278 | "src/f16-dwconv/gen/up32x25-minmax-neonfp16arith-acc2.c", |
| 4279 | "src/f16-dwconv/gen/up32x25-minmax-neonfp16arith.c", |
| Frank Barchard | 0bb49a7 | 2020-06-04 11:35:11 -0700 | [diff] [blame] | 4280 | "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c", |
| 4281 | "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4282 | "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c", |
| 4283 | "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c", |
| 4284 | "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c", |
| 4285 | "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c", |
| 4286 | "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c", |
| 4287 | "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c", |
| 4288 | "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c", |
| 4289 | "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c", |
| 4290 | "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c", |
| 4291 | "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4292 | "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c", |
| 4293 | "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c", |
| 4294 | "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c", |
| 4295 | "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4296 | "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c", |
| 4297 | "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4298 | "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c", |
| 4299 | "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4300 | "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c", |
| 4301 | "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c", |
| 4302 | "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c", |
| 4303 | "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4304 | "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c", |
| 4305 | "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c", |
| Frank Barchard | b196659 | 2020-05-12 13:47:06 -0700 | [diff] [blame] | 4306 | "src/f16-prelu/gen/neonfp16arith-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 4307 | "src/f16-prelu/gen/neonfp16arith-2x16.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 4308 | "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4309 | "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 4310 | "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4311 | "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 4312 | "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4313 | "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 4314 | "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4315 | "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c", |
| 4316 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c", |
| 4317 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c", |
| 4318 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c", |
| 4319 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c", |
| 4320 | "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c", |
| 4321 | "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c", |
| 4322 | "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c", |
| 4323 | "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c", |
| 4324 | "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c", |
| 4325 | "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c", |
| 4326 | "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c", |
| 4327 | "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c", |
| 4328 | "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c", |
| 4329 | "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c", |
| 4330 | "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c", |
| 4331 | "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c", |
| 4332 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c", |
| 4333 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c", |
| 4334 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c", |
| 4335 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c", |
| 4336 | "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c", |
| 4337 | "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c", |
| 4338 | "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c", |
| 4339 | "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c", |
| 4340 | "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c", |
| 4341 | "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c", |
| 4342 | "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c", |
| 4343 | "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4344 | "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c", |
| 4345 | "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 4346 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c", |
| 4347 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4348 | "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c", |
| 4349 | "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c", |
| Frank Barchard | d4416d6 | 2021-05-17 15:51:37 -0700 | [diff] [blame] | 4350 | "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c", |
| 4351 | "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 4352 | ] |
| 4353 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4354 | PROD_NEONDOT_MICROKERNEL_SRCS = [ |
| 4355 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4356 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4357 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4358 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4359 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4360 | "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4361 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4362 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4363 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4364 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4365 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4366 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 4367 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4368 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4369 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4370 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 8b69802 | 2021-08-26 11:17:32 -0700 | [diff] [blame] | 4371 | "src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Frank Barchard | de9c64a | 2021-08-17 18:32:50 -0700 | [diff] [blame] | 4372 | "src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4373 | "src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| 4374 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 8b69802 | 2021-08-26 11:17:32 -0700 | [diff] [blame] | 4375 | "src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Frank Barchard | de9c64a | 2021-08-17 18:32:50 -0700 | [diff] [blame] | 4376 | "src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4377 | "src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| 4378 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4379 | ] |
| 4380 | |
| 4381 | ALL_NEONDOT_MICROKERNEL_SRCS = [ |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 4382 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4383 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4384 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4385 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4386 | "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c", |
| 4387 | "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c", |
| 4388 | "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c", |
| 4389 | "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c", |
| 4390 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4391 | "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4392 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4393 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4394 | "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c", |
| 4395 | "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c", |
| 4396 | "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c", |
| 4397 | "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c", |
| Marat Dukhan | 18630de | 2021-06-02 22:20:01 -0700 | [diff] [blame] | 4398 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4399 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4400 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4401 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4402 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 4486f87 | 2021-08-07 15:22:50 -0700 | [diff] [blame] | 4403 | "src/qs8-gemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4404 | "src/qs8-gemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4405 | "src/qs8-gemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4406 | "src/qs8-gemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 18630de | 2021-06-02 22:20:01 -0700 | [diff] [blame] | 4407 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4408 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4409 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4410 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4411 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 4486f87 | 2021-08-07 15:22:50 -0700 | [diff] [blame] | 4412 | "src/qs8-igemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4413 | "src/qs8-igemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4414 | "src/qs8-igemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4415 | "src/qs8-igemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4416 | "src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Digant Desai | 9982ed3 | 2021-11-24 13:03:54 -0800 | [diff] [blame] | 4417 | "src/qu8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4418 | "src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4419 | "src/qu8-gemm/gen/1x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4420 | "src/qu8-gemm/gen/2x8c4-minmax-rndnu-neondot.c", |
| Digant Desai | 9982ed3 | 2021-11-24 13:03:54 -0800 | [diff] [blame] | 4421 | "src/qu8-gemm/gen/2x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4422 | "src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4423 | "src/qu8-gemm/gen/2x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4424 | "src/qu8-gemm/gen/3x8c4-minmax-rndnu-neondot.c", |
| 4425 | "src/qu8-gemm/gen/3x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4426 | "src/qu8-gemm/gen/3x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4427 | "src/qu8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| Digant Desai | 9982ed3 | 2021-11-24 13:03:54 -0800 | [diff] [blame] | 4428 | "src/qu8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4429 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4430 | "src/qu8-gemm/gen/5x8c4-minmax-rndnu-neondot.c", |
| 4431 | "src/qu8-gemm/gen/5x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4432 | "src/qu8-gemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4433 | "src/qu8-gemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4434 | "src/qu8-gemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4435 | "src/qu8-gemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| 4436 | "src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Digant Desai | 9982ed3 | 2021-11-24 13:03:54 -0800 | [diff] [blame] | 4437 | "src/qu8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4438 | "src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4439 | "src/qu8-igemm/gen/1x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4440 | "src/qu8-igemm/gen/2x8c4-minmax-rndnu-neondot.c", |
| Digant Desai | 9982ed3 | 2021-11-24 13:03:54 -0800 | [diff] [blame] | 4441 | "src/qu8-igemm/gen/2x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4442 | "src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4443 | "src/qu8-igemm/gen/2x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4444 | "src/qu8-igemm/gen/3x8c4-minmax-rndnu-neondot.c", |
| 4445 | "src/qu8-igemm/gen/3x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4446 | "src/qu8-igemm/gen/3x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4447 | "src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cb052a3 | 2021-12-10 14:16:33 -0800 | [diff] [blame] | 4448 | "src/qu8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4449 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4450 | "src/qu8-igemm/gen/5x8c4-minmax-rndnu-neondot.c", |
| 4451 | "src/qu8-igemm/gen/5x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4452 | "src/qu8-igemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4453 | "src/qu8-igemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4454 | "src/qu8-igemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4455 | "src/qu8-igemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 4456 | ] |
| 4457 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4458 | PROD_SSE_MICROKERNEL_SRCS = [ |
| 4459 | "src/f32-avgpool/9p8x-minmax-sse-c4.c", |
| 4460 | "src/f32-avgpool/9x-minmax-sse-c4.c", |
| 4461 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 4462 | "src/f32-dwconv/gen/up8x3-minmax-sse.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4463 | "src/f32-dwconv/gen/up8x4-minmax-sse.c", |
| 4464 | "src/f32-dwconv/gen/up8x9-minmax-sse.c", |
| 4465 | "src/f32-dwconv/gen/up8x25-minmax-sse.c", |
| 4466 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c", |
| 4467 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c", |
| 4468 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c", |
| 4469 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c", |
| 4470 | "src/f32-gavgpool-cw/sse-x4.c", |
| 4471 | "src/f32-gavgpool/7p7x-minmax-sse-c4.c", |
| 4472 | "src/f32-gavgpool/7x-minmax-sse-c4.c", |
| 4473 | "src/f32-gemm/gen/1x8-minmax-sse-load1.c", |
| 4474 | "src/f32-gemm/gen/4x2c4-minmax-sse.c", |
| 4475 | "src/f32-gemm/gen/4x8-minmax-sse-load1.c", |
| 4476 | "src/f32-ibilinear-chw/gen/sse-p8.c", |
| 4477 | "src/f32-ibilinear/gen/sse-c8.c", |
| 4478 | "src/f32-igemm/gen/1x8-minmax-sse-load1.c", |
| 4479 | "src/f32-igemm/gen/4x2c4-minmax-sse.c", |
| 4480 | "src/f32-igemm/gen/4x8-minmax-sse-load1.c", |
| 4481 | "src/f32-maxpool/9p8x-minmax-sse-c4.c", |
| 4482 | "src/f32-pavgpool/9p8x-minmax-sse-c4.c", |
| 4483 | "src/f32-pavgpool/9x-minmax-sse-c4.c", |
| 4484 | "src/f32-rmax/sse.c", |
| 4485 | "src/f32-spmm/gen/32x1-minmax-sse.c", |
| 4486 | "src/f32-vbinary/gen/vadd-minmax-sse-x8.c", |
| 4487 | "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c", |
| 4488 | "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c", |
| 4489 | "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c", |
| 4490 | "src/f32-vbinary/gen/vmax-sse-x8.c", |
| 4491 | "src/f32-vbinary/gen/vmaxc-sse-x8.c", |
| 4492 | "src/f32-vbinary/gen/vmin-sse-x8.c", |
| 4493 | "src/f32-vbinary/gen/vminc-sse-x8.c", |
| 4494 | "src/f32-vbinary/gen/vmul-minmax-sse-x8.c", |
| 4495 | "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c", |
| 4496 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c", |
| 4497 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c", |
| 4498 | "src/f32-vbinary/gen/vsqrdiff-sse-x8.c", |
| 4499 | "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c", |
| 4500 | "src/f32-vbinary/gen/vsub-minmax-sse-x8.c", |
| 4501 | "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c", |
| 4502 | "src/f32-vclamp/gen/vclamp-sse-x8.c", |
| 4503 | "src/f32-vhswish/gen/vhswish-sse-x8.c", |
| 4504 | "src/f32-vlrelu/gen/vlrelu-sse-x8.c", |
| 4505 | "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c", |
| 4506 | "src/f32-vsqrt/gen/sse-sqrt-x4.c", |
| 4507 | "src/f32-vunary/gen/vabs-sse-x8.c", |
| 4508 | "src/f32-vunary/gen/vneg-sse-x8.c", |
| 4509 | "src/f32-vunary/gen/vsqr-sse-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4510 | "src/x32-packx/x4-sse.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4511 | ] |
| 4512 | |
| 4513 | ALL_SSE_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4514 | "src/f32-avgpool/9p8x-minmax-sse-c4.c", |
| 4515 | "src/f32-avgpool/9x-minmax-sse-c4.c", |
| Erich Elsen | b123340 | 2020-06-08 15:53:15 -0700 | [diff] [blame] | 4516 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c", |
| 4517 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 4518 | "src/f32-dwconv/gen/up4x3-minmax-sse-acc2.c", |
| 4519 | "src/f32-dwconv/gen/up4x3-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4520 | "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c", |
| 4521 | "src/f32-dwconv/gen/up4x4-minmax-sse.c", |
| 4522 | "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c", |
| 4523 | "src/f32-dwconv/gen/up4x9-minmax-sse.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4524 | "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c", |
| 4525 | "src/f32-dwconv/gen/up4x25-minmax-sse.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 4526 | "src/f32-dwconv/gen/up8x3-minmax-sse-acc2.c", |
| 4527 | "src/f32-dwconv/gen/up8x3-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4528 | "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c", |
| 4529 | "src/f32-dwconv/gen/up8x4-minmax-sse.c", |
| 4530 | "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c", |
| 4531 | "src/f32-dwconv/gen/up8x9-minmax-sse.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4532 | "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c", |
| 4533 | "src/f32-dwconv/gen/up8x25-minmax-sse.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4534 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c", |
| 4535 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c", |
| 4536 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c", |
| Marat Dukhan | 470078a | 2020-10-23 22:36:52 -0700 | [diff] [blame] | 4537 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4538 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c", |
| Marat Dukhan | 470078a | 2020-10-23 22:36:52 -0700 | [diff] [blame] | 4539 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c", |
| 4540 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c", |
| 4541 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c", |
| 4542 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c", |
| 4543 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c", |
| Marat Dukhan | 0ff9718 | 2020-10-25 19:14:03 -0700 | [diff] [blame] | 4544 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c", |
| 4545 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c", |
| 4546 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4547 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c", |
| Marat Dukhan | 0ff9718 | 2020-10-25 19:14:03 -0700 | [diff] [blame] | 4548 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4549 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c", |
| 4550 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c", |
| 4551 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c", |
| Marat Dukhan | d050389 | 2020-10-30 08:22:04 -0700 | [diff] [blame] | 4552 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c", |
| 4553 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c", |
| 4554 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c", |
| 4555 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c", |
| 4556 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c", |
| 4557 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c", |
| 4558 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c", |
| 4559 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c", |
| 4560 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c", |
| 4561 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c", |
| 4562 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c", |
| 4563 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c", |
| 4564 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c", |
| Marat Dukhan | ccca214 | 2020-10-30 17:32:45 -0700 | [diff] [blame] | 4565 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c", |
| 4566 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c", |
| 4567 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c", |
| 4568 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c", |
| 4569 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c", |
| 4570 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c", |
| 4571 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c", |
| 4572 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c", |
| Marat Dukhan | ccca214 | 2020-10-30 17:32:45 -0700 | [diff] [blame] | 4573 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 4574 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 4575 | "src/f32-gavgpool-cw/sse-x4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4576 | "src/f32-gavgpool/7p7x-minmax-sse-c4.c", |
| 4577 | "src/f32-gavgpool/7x-minmax-sse-c4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4578 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c", |
| 4579 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c", |
| 4580 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4581 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c", |
| 4582 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c", |
| 4583 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4584 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c", |
| 4585 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c", |
| 4586 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4587 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c", |
| 4588 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c", |
| 4589 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4590 | "src/f32-gemm/gen/1x8-minmax-sse-dup.c", |
| 4591 | "src/f32-gemm/gen/1x8-minmax-sse-load1.c", |
| 4592 | "src/f32-gemm/gen/1x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4593 | "src/f32-gemm/gen/3x8-minmax-sse-dup.c", |
| 4594 | "src/f32-gemm/gen/3x8-minmax-sse-load1.c", |
| 4595 | "src/f32-gemm/gen/3x8s4-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4596 | "src/f32-gemm/gen/4x2c4-minmax-sse.c", |
| 4597 | "src/f32-gemm/gen/4x8-minmax-sse-dup.c", |
| 4598 | "src/f32-gemm/gen/4x8-minmax-sse-load1.c", |
| 4599 | "src/f32-gemm/gen/4x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4600 | "src/f32-gemm/gen/5x8-minmax-sse-dup.c", |
| 4601 | "src/f32-gemm/gen/5x8-minmax-sse-load1.c", |
| 4602 | "src/f32-gemm/gen/5x8s4-minmax-sse.c", |
| Artsiom Ablavatski | b3ffd58 | 2021-03-31 13:00:08 -0700 | [diff] [blame] | 4603 | "src/f32-ibilinear-chw/gen/sse-p4.c", |
| 4604 | "src/f32-ibilinear-chw/gen/sse-p8.c", |
| Frank Barchard | 4a35204 | 2021-04-13 15:52:08 -0700 | [diff] [blame] | 4605 | "src/f32-ibilinear/gen/sse-c4.c", |
| 4606 | "src/f32-ibilinear/gen/sse-c8.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4607 | "src/f32-igemm/gen/1x8-minmax-sse-dup.c", |
| 4608 | "src/f32-igemm/gen/1x8-minmax-sse-load1.c", |
| 4609 | "src/f32-igemm/gen/1x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4610 | "src/f32-igemm/gen/3x8-minmax-sse-dup.c", |
| 4611 | "src/f32-igemm/gen/3x8-minmax-sse-load1.c", |
| 4612 | "src/f32-igemm/gen/3x8s4-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4613 | "src/f32-igemm/gen/4x2c4-minmax-sse.c", |
| 4614 | "src/f32-igemm/gen/4x8-minmax-sse-dup.c", |
| 4615 | "src/f32-igemm/gen/4x8-minmax-sse-load1.c", |
| 4616 | "src/f32-igemm/gen/4x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4617 | "src/f32-igemm/gen/5x8-minmax-sse-dup.c", |
| 4618 | "src/f32-igemm/gen/5x8-minmax-sse-load1.c", |
| 4619 | "src/f32-igemm/gen/5x8s4-minmax-sse.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4620 | "src/f32-maxpool/9p8x-minmax-sse-c4.c", |
| 4621 | "src/f32-pavgpool/9p8x-minmax-sse-c4.c", |
| 4622 | "src/f32-pavgpool/9x-minmax-sse-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4623 | "src/f32-ppmm/gen/4x8-minmax-sse.c", |
| Marat Dukhan | 39b5e94 | 2020-06-24 15:03:48 -0700 | [diff] [blame] | 4624 | "src/f32-prelu/gen/sse-2x4.c", |
| 4625 | "src/f32-prelu/gen/sse-2x8.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 4626 | "src/f32-rmax/sse.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 4627 | "src/f32-spmm/gen/4x1-minmax-sse.c", |
| 4628 | "src/f32-spmm/gen/8x1-minmax-sse.c", |
| Erich Elsen | 6e80fdc | 2020-06-09 15:35:37 -0700 | [diff] [blame] | 4629 | "src/f32-spmm/gen/16x1-minmax-sse.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 4630 | "src/f32-spmm/gen/32x1-minmax-sse.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 4631 | "src/f32-vbinary/gen/vadd-minmax-sse-x4.c", |
| 4632 | "src/f32-vbinary/gen/vadd-minmax-sse-x8.c", |
| 4633 | "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c", |
| 4634 | "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c", |
| 4635 | "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c", |
| 4636 | "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c", |
| 4637 | "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c", |
| 4638 | "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 4639 | "src/f32-vbinary/gen/vmax-sse-x4.c", |
| 4640 | "src/f32-vbinary/gen/vmax-sse-x8.c", |
| 4641 | "src/f32-vbinary/gen/vmaxc-sse-x4.c", |
| 4642 | "src/f32-vbinary/gen/vmaxc-sse-x8.c", |
| 4643 | "src/f32-vbinary/gen/vmin-sse-x4.c", |
| 4644 | "src/f32-vbinary/gen/vmin-sse-x8.c", |
| 4645 | "src/f32-vbinary/gen/vminc-sse-x4.c", |
| 4646 | "src/f32-vbinary/gen/vminc-sse-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 4647 | "src/f32-vbinary/gen/vmul-minmax-sse-x4.c", |
| 4648 | "src/f32-vbinary/gen/vmul-minmax-sse-x8.c", |
| 4649 | "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c", |
| 4650 | "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c", |
| 4651 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c", |
| 4652 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c", |
| 4653 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c", |
| 4654 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 4655 | "src/f32-vbinary/gen/vsqrdiff-sse-x4.c", |
| 4656 | "src/f32-vbinary/gen/vsqrdiff-sse-x8.c", |
| 4657 | "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c", |
| 4658 | "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 4659 | "src/f32-vbinary/gen/vsub-minmax-sse-x4.c", |
| 4660 | "src/f32-vbinary/gen/vsub-minmax-sse-x8.c", |
| 4661 | "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c", |
| 4662 | "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4663 | "src/f32-vclamp/gen/vclamp-sse-x4.c", |
| 4664 | "src/f32-vclamp/gen/vclamp-sse-x8.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 4665 | "src/f32-vhswish/gen/vhswish-sse-x4.c", |
| 4666 | "src/f32-vhswish/gen/vhswish-sse-x8.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 4667 | "src/f32-vlrelu/gen/vlrelu-sse-x4.c", |
| 4668 | "src/f32-vlrelu/gen/vlrelu-sse-x8.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4669 | "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c", |
| 4670 | "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4671 | "src/f32-vrelu/gen/vrelu-sse-x4.c", |
| 4672 | "src/f32-vrelu/gen/vrelu-sse-x8.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 4673 | "src/f32-vsqrt/gen/sse-sqrt-x4.c", |
| 4674 | "src/f32-vsqrt/gen/sse-sqrt-x8.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 4675 | "src/f32-vunary/gen/vabs-sse-x4.c", |
| 4676 | "src/f32-vunary/gen/vabs-sse-x8.c", |
| 4677 | "src/f32-vunary/gen/vneg-sse-x4.c", |
| 4678 | "src/f32-vunary/gen/vneg-sse-x8.c", |
| 4679 | "src/f32-vunary/gen/vsqr-sse-x4.c", |
| 4680 | "src/f32-vunary/gen/vsqr-sse-x8.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 4681 | "src/math/roundd-sse-addsub.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4682 | "src/math/roundne-sse-addsub.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 4683 | "src/math/roundu-sse-addsub.c", |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 4684 | "src/math/roundz-sse-addsub.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 4685 | "src/math/sqrt-sse-hh1mac.c", |
| 4686 | "src/math/sqrt-sse-nr1mac.c", |
| 4687 | "src/math/sqrt-sse-nr2mac.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4688 | "src/x32-packx/x4-sse.c", |
| Frank Barchard | 70e8c99 | 2021-12-16 18:35:18 -0800 | [diff] [blame] | 4689 | "src/x32-transpose/4x4-sse.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 4690 | ] |
| 4691 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4692 | PROD_SSE2_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 4693 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4694 | "src/f32-argmaxpool/4x-sse2-c4.c", |
| 4695 | "src/f32-argmaxpool/9p8x-sse2-c4.c", |
| 4696 | "src/f32-argmaxpool/9x-sse2-c4.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 4697 | "src/f32-f16-vcvt/gen/vcvt-sse2-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4698 | "src/f32-prelu/gen/sse2-2x8.c", |
| Marat Dukhan | ed2d776 | 2021-12-03 23:51:19 -0800 | [diff] [blame] | 4699 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c", |
| 4700 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 4701 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4702 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c", |
| 4703 | "src/f32-vlrelu/gen/vlrelu-sse2-x8.c", |
| 4704 | "src/f32-vrnd/gen/vrndd-sse2-x8.c", |
| 4705 | "src/f32-vrnd/gen/vrndne-sse2-x8.c", |
| 4706 | "src/f32-vrnd/gen/vrndu-sse2-x8.c", |
| 4707 | "src/f32-vrnd/gen/vrndz-sse2-x8.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 4708 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4709 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 4710 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 4711 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4712 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4713 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4714 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4715 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| 4716 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 914f57b | 2021-12-13 12:31:42 -0800 | [diff] [blame] | 4717 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4718 | "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c", |
| 4719 | "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c", |
| 4720 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4721 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4722 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4723 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4724 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 4725 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 4726 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 4727 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4728 | "src/qu8-avgpool/9p8x-minmax-sse2-c8.c", |
| 4729 | "src/qu8-avgpool/9x-minmax-sse2-c8.c", |
| 4730 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 4731 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 4732 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4733 | "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c", |
| 4734 | "src/qu8-gavgpool/7x-minmax-sse2-c8.c", |
| 4735 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4736 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4737 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4738 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4739 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 4740 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 4741 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 4742 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 4743 | "src/s8-ibilinear/gen/sse2-c8.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 4744 | "src/s8-maxpool/9p8x-minmax-sse2-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 4745 | "src/s8-vclamp/sse2-x64.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 4746 | "src/u8-ibilinear/gen/sse2-c8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4747 | "src/u8-maxpool/9p8x-minmax-sse2-c16.c", |
| 4748 | "src/u8-rmax/sse2.c", |
| 4749 | "src/u8-vclamp/sse2-x64.c", |
| 4750 | "src/x8-zip/x2-sse2.c", |
| 4751 | "src/x8-zip/x3-sse2.c", |
| 4752 | "src/x8-zip/x4-sse2.c", |
| 4753 | "src/x8-zip/xm-sse2.c", |
| 4754 | "src/x32-unpool/sse2.c", |
| 4755 | "src/x32-zip/x2-sse2.c", |
| 4756 | "src/x32-zip/x3-sse2.c", |
| 4757 | "src/x32-zip/x4-sse2.c", |
| 4758 | "src/x32-zip/xm-sse2.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 4759 | "src/xx-fill/sse2-x64.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 4760 | "src/xx-pad/sse2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4761 | ] |
| 4762 | |
| 4763 | ALL_SSE2_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 1227adb | 2021-10-16 17:33:51 -0700 | [diff] [blame] | 4764 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x8.c", |
| 4765 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x16.c", |
| 4766 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x24.c", |
| 4767 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c", |
| 4768 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x8.c", |
| 4769 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x16.c", |
| 4770 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x24.c", |
| 4771 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x32.c", |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4772 | "src/f32-argmaxpool/4x-sse2-c4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4773 | "src/f32-argmaxpool/9p8x-sse2-c4.c", |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4774 | "src/f32-argmaxpool/9x-sse2-c4.c", |
| Marat Dukhan | eb84423 | 2021-11-08 23:07:53 -0800 | [diff] [blame] | 4775 | "src/f32-f16-vcvt/gen/vcvt-sse2-x8.c", |
| 4776 | "src/f32-f16-vcvt/gen/vcvt-sse2-x16.c", |
| 4777 | "src/f32-f16-vcvt/gen/vcvt-sse2-x24.c", |
| 4778 | "src/f32-f16-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4779 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c", |
| 4780 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c", |
| 4781 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c", |
| 4782 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c", |
| 4783 | "src/f32-gemm/gen/1x8-minmax-sse2-dup.c", |
| 4784 | "src/f32-gemm/gen/3x8-minmax-sse2-dup.c", |
| 4785 | "src/f32-gemm/gen/4x8-minmax-sse2-dup.c", |
| 4786 | "src/f32-gemm/gen/5x8-minmax-sse2-dup.c", |
| 4787 | "src/f32-igemm/gen/1x8-minmax-sse2-dup.c", |
| 4788 | "src/f32-igemm/gen/3x8-minmax-sse2-dup.c", |
| 4789 | "src/f32-igemm/gen/4x8-minmax-sse2-dup.c", |
| 4790 | "src/f32-igemm/gen/5x8-minmax-sse2-dup.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 4791 | "src/f32-prelu/gen/sse2-2x4.c", |
| 4792 | "src/f32-prelu/gen/sse2-2x8.c", |
| Marat Dukhan | c5aa242 | 2021-12-01 00:15:19 -0800 | [diff] [blame] | 4793 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x8.c", |
| 4794 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x16.c", |
| 4795 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x24.c", |
| 4796 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c", |
| 4797 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x8.c", |
| 4798 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x16.c", |
| 4799 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x24.c", |
| 4800 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 4801 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x4.c", |
| 4802 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x8-acc2.c", |
| 4803 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x8.c", |
| 4804 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12-acc2.c", |
| 4805 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12-acc3.c", |
| 4806 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12.c", |
| 4807 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16-acc2.c", |
| 4808 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16-acc4.c", |
| 4809 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16.c", |
| 4810 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc2.c", |
| 4811 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc5.c", |
| 4812 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4813 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c", |
| 4814 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c", |
| 4815 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c", |
| 4816 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c", |
| 4817 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c", |
| 4818 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c", |
| 4819 | "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c", |
| 4820 | "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c", |
| 4821 | "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c", |
| 4822 | "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c", |
| 4823 | "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c", |
| 4824 | "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 4825 | "src/f32-vlrelu/gen/vlrelu-sse2-x4.c", |
| 4826 | "src/f32-vlrelu/gen/vlrelu-sse2-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 4827 | "src/f32-vrnd/gen/vrndd-sse2-x4.c", |
| 4828 | "src/f32-vrnd/gen/vrndd-sse2-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4829 | "src/f32-vrnd/gen/vrndne-sse2-x4.c", |
| 4830 | "src/f32-vrnd/gen/vrndne-sse2-x8.c", |
| 4831 | "src/f32-vrnd/gen/vrndu-sse2-x4.c", |
| 4832 | "src/f32-vrnd/gen/vrndu-sse2-x8.c", |
| 4833 | "src/f32-vrnd/gen/vrndz-sse2-x4.c", |
| 4834 | "src/f32-vrnd/gen/vrndz-sse2-x8.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 4835 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x4.c", |
| 4836 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x8.c", |
| 4837 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x12.c", |
| 4838 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x16.c", |
| 4839 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x20.c", |
| 4840 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x24.c", |
| 4841 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x4.c", |
| 4842 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x8.c", |
| 4843 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x12.c", |
| 4844 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x16.c", |
| 4845 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x20.c", |
| 4846 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x24.c", |
| Marat Dukhan | 3ed866b | 2021-09-29 08:23:33 -0700 | [diff] [blame] | 4847 | "src/math/cvt-f16-f32-sse2-int16.c", |
| 4848 | "src/math/cvt-f16-f32-sse2-int32.c", |
| Marat Dukhan | 056f49d | 2021-11-08 17:44:42 -0800 | [diff] [blame] | 4849 | "src/math/cvt-f32-f16-sse2.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 4850 | "src/math/exp-sse2-rr2-lut64-p2.c", |
| 4851 | "src/math/exp-sse2-rr2-p5.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 4852 | "src/math/expm1minus-sse2-rr2-lut16-p3.c", |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 4853 | "src/math/expm1minus-sse2-rr2-p6.c", |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 4854 | "src/math/expminus-sse2-rr2-p5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4855 | "src/math/roundd-sse2-cvt.c", |
| 4856 | "src/math/roundne-sse2-cvt.c", |
| 4857 | "src/math/roundu-sse2-cvt.c", |
| 4858 | "src/math/roundz-sse2-cvt.c", |
| 4859 | "src/math/sigmoid-sse2-rr2-lut64-p2-div.c", |
| 4860 | "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c", |
| 4861 | "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c", |
| 4862 | "src/math/sigmoid-sse2-rr2-p5-div.c", |
| 4863 | "src/math/sigmoid-sse2-rr2-p5-nr1.c", |
| 4864 | "src/math/sigmoid-sse2-rr2-p5-nr2.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4865 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4866 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4867 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4868 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4869 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4870 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4871 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4872 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 4873 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c", |
| 4874 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4875 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4876 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4877 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4878 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4879 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4880 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4881 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4882 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4883 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4884 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4885 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4886 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4887 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4888 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4889 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4890 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4891 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4892 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4893 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4894 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4895 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4896 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4897 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4898 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4899 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4900 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 4901 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4902 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4903 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4904 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4905 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4906 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4907 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4908 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 4909 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 4910 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4911 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4912 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | d873fa2 | 2021-12-10 01:55:10 -0800 | [diff] [blame] | 4913 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x8.c", |
| 4914 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x16.c", |
| 4915 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x24.c", |
| 4916 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 159688f | 2020-08-06 10:34:29 -0700 | [diff] [blame] | 4917 | "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c", |
| 4918 | "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c", |
| 4919 | "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4920 | "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c", |
| 4921 | "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c", |
| 4922 | "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4923 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4924 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4925 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4926 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4927 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4928 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4929 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4930 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4931 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4932 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4933 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4934 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4935 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4936 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4937 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4938 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4939 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4940 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4941 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4942 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 4943 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4944 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4945 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4946 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4947 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4948 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4949 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4950 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4951 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4952 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4953 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4954 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4955 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 4956 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 4957 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | f62bbdc | 2020-08-04 13:59:04 -0700 | [diff] [blame] | 4958 | "src/qs8-requantization/fp32-sse2.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 4959 | "src/qs8-requantization/gemmlowp-sse2.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 4960 | "src/qs8-requantization/rndna-sse2.c", |
| Marat Dukhan | d9f3ad4 | 2020-08-10 12:30:58 -0700 | [diff] [blame] | 4961 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 4962 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c", |
| 4963 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c", |
| 4964 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c", |
| Marat Dukhan | 0270d9f | 2020-08-11 00:56:46 -0700 | [diff] [blame] | 4965 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| 4966 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c", |
| 4967 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c", |
| 4968 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 4969 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 4970 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| 4971 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 4972 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 4973 | "src/qu8-avgpool/9p8x-minmax-sse2-c8.c", |
| 4974 | "src/qu8-avgpool/9x-minmax-sse2-c8.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 4975 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 4976 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 4977 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| 4978 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | d873fa2 | 2021-12-10 01:55:10 -0800 | [diff] [blame] | 4979 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x8.c", |
| 4980 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x16.c", |
| 4981 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x24.c", |
| 4982 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 4983 | "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c", |
| 4984 | "src/qu8-gavgpool/7x-minmax-sse2-c8.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 4985 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 4986 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 4987 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4988 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 4989 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 4990 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 4991 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 4992 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 4993 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 4994 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 4995 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4996 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 4997 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 4998 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 4999 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 5000 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 5001 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 5002 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 5003 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 5004 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 5005 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 5006 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5007 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 5008 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 5009 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 5010 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 5011 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 5012 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 5013 | "src/qu8-requantization/fp32-sse2.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5014 | "src/qu8-requantization/gemmlowp-sse2.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5015 | "src/qu8-requantization/rndna-sse2.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 5016 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 5017 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c", |
| 5018 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| 5019 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5020 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 5021 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| 5022 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 5023 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| Marat Dukhan | 7519eb1 | 2021-11-23 19:08:29 -0800 | [diff] [blame] | 5024 | "src/s8-ibilinear/gen/sse2-c8.c", |
| 5025 | "src/s8-ibilinear/gen/sse2-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 5026 | "src/s8-maxpool/9p8x-minmax-sse2-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 5027 | "src/s8-vclamp/sse2-x64.c", |
| Marat Dukhan | 7519eb1 | 2021-11-23 19:08:29 -0800 | [diff] [blame] | 5028 | "src/u8-ibilinear/gen/sse2-c8.c", |
| 5029 | "src/u8-ibilinear/gen/sse2-c16.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5030 | "src/u8-maxpool/9p8x-minmax-sse2-c16.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5031 | "src/u8-rmax/sse2.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 5032 | "src/u8-vclamp/sse2-x64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5033 | "src/x8-zip/x2-sse2.c", |
| 5034 | "src/x8-zip/x3-sse2.c", |
| 5035 | "src/x8-zip/x4-sse2.c", |
| 5036 | "src/x8-zip/xm-sse2.c", |
| Alan Kelly | 1945f0b | 2021-12-24 01:26:45 -0800 | [diff] [blame] | 5037 | "src/x16-transpose/4x8-sse2.c", |
| Marat Dukhan | 57dccd8 | 2020-04-14 00:53:10 -0700 | [diff] [blame] | 5038 | "src/x32-unpool/sse2.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5039 | "src/x32-zip/x2-sse2.c", |
| 5040 | "src/x32-zip/x3-sse2.c", |
| 5041 | "src/x32-zip/x4-sse2.c", |
| 5042 | "src/x32-zip/xm-sse2.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 5043 | "src/xx-fill/sse2-x64.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 5044 | "src/xx-pad/sse2.c", |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 5045 | ] |
| 5046 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5047 | PROD_SSSE3_MICROKERNEL_SRCS = [ |
| 5048 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c", |
| 5049 | "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c", |
| 5050 | "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c", |
| 5051 | ] |
| 5052 | |
| 5053 | ALL_SSSE3_MICROKERNEL_SRCS = [ |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 5054 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c", |
| 5055 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c", |
| 5056 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c", |
| Marat Dukhan | 98f2eeb | 2020-10-23 23:13:41 -0700 | [diff] [blame] | 5057 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 5058 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c", |
| Marat Dukhan | 98f2eeb | 2020-10-23 23:13:41 -0700 | [diff] [blame] | 5059 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c", |
| 5060 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c", |
| 5061 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c", |
| 5062 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c", |
| 5063 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c", |
| Marat Dukhan | 159688f | 2020-08-06 10:34:29 -0700 | [diff] [blame] | 5064 | "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c", |
| 5065 | "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c", |
| 5066 | "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5067 | "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c", |
| 5068 | "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c", |
| 5069 | "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5070 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5071 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5072 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-ssse3.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5073 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5074 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5075 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-ssse3.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5076 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5077 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5078 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-ssse3.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5079 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5080 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5081 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5082 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5083 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5084 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5085 | "src/qs8-requantization/gemmlowp-ssse3.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5086 | "src/qs8-requantization/rndna-ssse3.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5087 | "src/qu8-requantization/gemmlowp-ssse3.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5088 | "src/qu8-requantization/rndna-ssse3.c", |
| Marat Dukhan | 7c478e3 | 2021-09-10 09:48:13 -0700 | [diff] [blame] | 5089 | "src/x8-lut/gen/lut-ssse3-x16.c", |
| 5090 | "src/x8-lut/gen/lut-ssse3-x32.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5091 | ] |
| 5092 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5093 | PROD_SSE41_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 5094 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 5095 | "src/f32-f16-vcvt/gen/vcvt-sse41-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5096 | "src/f32-prelu/gen/sse41-2x8.c", |
| Marat Dukhan | ed2d776 | 2021-12-03 23:51:19 -0800 | [diff] [blame] | 5097 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5098 | "src/f32-vlrelu/gen/vlrelu-sse41-x8.c", |
| 5099 | "src/f32-vrnd/gen/vrndd-sse41-x8.c", |
| 5100 | "src/f32-vrnd/gen/vrndne-sse41-x8.c", |
| 5101 | "src/f32-vrnd/gen/vrndu-sse41-x8.c", |
| 5102 | "src/f32-vrnd/gen/vrndz-sse41-x8.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 5103 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5104 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 5105 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| 5106 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5107 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5108 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5109 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5110 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| 5111 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 5112 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5113 | "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c", |
| 5114 | "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c", |
| 5115 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5116 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5117 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5118 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5119 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5120 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 5121 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5122 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5123 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 5124 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 5125 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5126 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5127 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5128 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5129 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5130 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5131 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 5132 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5133 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 5134 | "src/s8-ibilinear/gen/sse41-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 5135 | "src/s8-maxpool/9p8x-minmax-sse41-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 5136 | "src/s8-vclamp/sse41-x64.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 5137 | "src/u8-ibilinear/gen/sse41-c16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5138 | ] |
| 5139 | |
| 5140 | ALL_SSE41_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 1227adb | 2021-10-16 17:33:51 -0700 | [diff] [blame] | 5141 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x8.c", |
| 5142 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c", |
| 5143 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x24.c", |
| 5144 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x32.c", |
| 5145 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x8.c", |
| 5146 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x16.c", |
| 5147 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x24.c", |
| 5148 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x32.c", |
| Marat Dukhan | eb84423 | 2021-11-08 23:07:53 -0800 | [diff] [blame] | 5149 | "src/f32-f16-vcvt/gen/vcvt-sse41-x8.c", |
| 5150 | "src/f32-f16-vcvt/gen/vcvt-sse41-x16.c", |
| 5151 | "src/f32-f16-vcvt/gen/vcvt-sse41-x24.c", |
| 5152 | "src/f32-f16-vcvt/gen/vcvt-sse41-x32.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 5153 | "src/f32-prelu/gen/sse41-2x4.c", |
| 5154 | "src/f32-prelu/gen/sse41-2x8.c", |
| Marat Dukhan | c5aa242 | 2021-12-01 00:15:19 -0800 | [diff] [blame] | 5155 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x8.c", |
| 5156 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x16.c", |
| 5157 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x24.c", |
| 5158 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5159 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c", |
| 5160 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c", |
| 5161 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c", |
| 5162 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c", |
| 5163 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c", |
| 5164 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c", |
| 5165 | "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c", |
| 5166 | "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c", |
| 5167 | "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c", |
| 5168 | "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c", |
| 5169 | "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c", |
| 5170 | "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 5171 | "src/f32-vlrelu/gen/vlrelu-sse41-x4.c", |
| 5172 | "src/f32-vlrelu/gen/vlrelu-sse41-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 5173 | "src/f32-vrnd/gen/vrndd-sse41-x4.c", |
| 5174 | "src/f32-vrnd/gen/vrndd-sse41-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5175 | "src/f32-vrnd/gen/vrndne-sse41-x4.c", |
| 5176 | "src/f32-vrnd/gen/vrndne-sse41-x8.c", |
| 5177 | "src/f32-vrnd/gen/vrndu-sse41-x4.c", |
| 5178 | "src/f32-vrnd/gen/vrndu-sse41-x8.c", |
| 5179 | "src/f32-vrnd/gen/vrndz-sse41-x4.c", |
| 5180 | "src/f32-vrnd/gen/vrndz-sse41-x8.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 5181 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x4.c", |
| 5182 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x8.c", |
| 5183 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x12.c", |
| 5184 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x16.c", |
| 5185 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x20.c", |
| 5186 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x24.c", |
| 5187 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x4.c", |
| 5188 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x8.c", |
| 5189 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x12.c", |
| 5190 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x16.c", |
| 5191 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x20.c", |
| 5192 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x24.c", |
| Marat Dukhan | 3ed866b | 2021-09-29 08:23:33 -0700 | [diff] [blame] | 5193 | "src/math/cvt-f16-f32-sse41-int16.c", |
| 5194 | "src/math/cvt-f16-f32-sse41-int32.c", |
| Marat Dukhan | 056f49d | 2021-11-08 17:44:42 -0800 | [diff] [blame] | 5195 | "src/math/cvt-f32-f16-sse41.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5196 | "src/math/roundd-sse41.c", |
| 5197 | "src/math/roundne-sse41.c", |
| 5198 | "src/math/roundu-sse41.c", |
| 5199 | "src/math/roundz-sse41.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5200 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5201 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5202 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5203 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5204 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5205 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5206 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5207 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5208 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5209 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5210 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5211 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| 5212 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c", |
| 5213 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c", |
| 5214 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c", |
| 5215 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5216 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5217 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5218 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5219 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5220 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5221 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5222 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5223 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5224 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5225 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5226 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5227 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5228 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5229 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5230 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5231 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5232 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5233 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5234 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5235 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5236 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5237 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5238 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5239 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5240 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5241 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5242 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5243 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5244 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5245 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 5246 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5247 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5248 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5249 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5250 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5251 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5252 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5253 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5254 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5255 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5256 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c", |
| 5257 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5258 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c", |
| 5259 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f9cf55d | 2021-12-09 18:54:00 -0800 | [diff] [blame] | 5260 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x8.c", |
| 5261 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| 5262 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x24.c", |
| 5263 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x32.c", |
| Marat Dukhan | 159688f | 2020-08-06 10:34:29 -0700 | [diff] [blame] | 5264 | "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c", |
| 5265 | "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c", |
| 5266 | "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5267 | "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c", |
| 5268 | "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c", |
| 5269 | "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5270 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5271 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5272 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5273 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5274 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5275 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5276 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5277 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5278 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5279 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5280 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5281 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5282 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5283 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5284 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5285 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5286 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5287 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5288 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5289 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5290 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5291 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5292 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5293 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5294 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5295 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5296 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5297 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5298 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5299 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5300 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5301 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5302 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5303 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5304 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 2e23d2b | 2020-07-29 16:01:37 -0700 | [diff] [blame] | 5305 | "src/qs8-requantization/fp32-sse4.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5306 | "src/qs8-requantization/gemmlowp-sse4.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5307 | "src/qs8-requantization/rndna-sse4.c", |
| Marat Dukhan | 0d979d5 | 2021-06-09 13:21:18 -0700 | [diff] [blame] | 5308 | "src/qs8-requantization/rndnu-sse4-sra.c", |
| 5309 | "src/qs8-requantization/rndnu-sse4-srl.c", |
| Marat Dukhan | d9f3ad4 | 2020-08-10 12:30:58 -0700 | [diff] [blame] | 5310 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5311 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5312 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c", |
| 5313 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c", |
| Marat Dukhan | bb9225e | 2020-09-06 22:40:56 -0700 | [diff] [blame] | 5314 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5315 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c", |
| 5316 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c", |
| 5317 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c", |
| Marat Dukhan | 0270d9f | 2020-08-11 00:56:46 -0700 | [diff] [blame] | 5318 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5319 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5320 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c", |
| 5321 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c", |
| Marat Dukhan | bb9225e | 2020-09-06 22:40:56 -0700 | [diff] [blame] | 5322 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5323 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c", |
| 5324 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c", |
| 5325 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5326 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5327 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5328 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5329 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5330 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5331 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5332 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5333 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5334 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5335 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5336 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5337 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f9cf55d | 2021-12-09 18:54:00 -0800 | [diff] [blame] | 5338 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x8.c", |
| 5339 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| 5340 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x24.c", |
| 5341 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x32.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5342 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 5343 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 5344 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5345 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 5346 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 5347 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 5348 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 5349 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5350 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 5351 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 5352 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5353 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 5354 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 5355 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5356 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 5357 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 5358 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5359 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 5360 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 5361 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 5362 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 5363 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5364 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 5365 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 5366 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5367 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 5368 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 5369 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5370 | "src/qu8-requantization/gemmlowp-sse4.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5371 | "src/qu8-requantization/rndna-sse4.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 5372 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5373 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5374 | "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5375 | "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c", |
| 5376 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5377 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5378 | "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5379 | "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5380 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5381 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5382 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5383 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | 7519eb1 | 2021-11-23 19:08:29 -0800 | [diff] [blame] | 5384 | "src/s8-ibilinear/gen/sse41-c8.c", |
| 5385 | "src/s8-ibilinear/gen/sse41-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 5386 | "src/s8-maxpool/9p8x-minmax-sse41-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 5387 | "src/s8-vclamp/sse41-x64.c", |
| Marat Dukhan | 7519eb1 | 2021-11-23 19:08:29 -0800 | [diff] [blame] | 5388 | "src/u8-ibilinear/gen/sse41-c8.c", |
| 5389 | "src/u8-ibilinear/gen/sse41-c16.c", |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 5390 | ] |
| 5391 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5392 | PROD_AVX_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 5393 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5394 | "src/f32-dwconv/gen/up8x25-minmax-avx.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 5395 | "src/f32-dwconv/gen/up16x3-minmax-avx.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5396 | "src/f32-dwconv/gen/up16x4-minmax-avx.c", |
| 5397 | "src/f32-dwconv/gen/up16x9-minmax-avx.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 5398 | "src/f32-f16-vcvt/gen/vcvt-avx-x24.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5399 | "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c", |
| 5400 | "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c", |
| 5401 | "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c", |
| 5402 | "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c", |
| 5403 | "src/f32-prelu/gen/avx-2x16.c", |
| Marat Dukhan | b91432c | 2021-12-14 16:52:09 -0800 | [diff] [blame] | 5404 | "src/f32-qs8-vcvt/gen/vcvt-avx-x32.c", |
| 5405 | "src/f32-qu8-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5406 | "src/f32-vbinary/gen/vadd-minmax-avx-x16.c", |
| 5407 | "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c", |
| 5408 | "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c", |
| 5409 | "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c", |
| 5410 | "src/f32-vbinary/gen/vmax-avx-x16.c", |
| 5411 | "src/f32-vbinary/gen/vmaxc-avx-x16.c", |
| 5412 | "src/f32-vbinary/gen/vmin-avx-x16.c", |
| 5413 | "src/f32-vbinary/gen/vminc-avx-x16.c", |
| 5414 | "src/f32-vbinary/gen/vmul-minmax-avx-x16.c", |
| 5415 | "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c", |
| 5416 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c", |
| 5417 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c", |
| 5418 | "src/f32-vbinary/gen/vsqrdiff-avx-x16.c", |
| 5419 | "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c", |
| 5420 | "src/f32-vbinary/gen/vsub-minmax-avx-x16.c", |
| 5421 | "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c", |
| 5422 | "src/f32-vclamp/gen/vclamp-avx-x16.c", |
| 5423 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c", |
| 5424 | "src/f32-vhswish/gen/vhswish-avx-x16.c", |
| 5425 | "src/f32-vlrelu/gen/vlrelu-avx-x16.c", |
| 5426 | "src/f32-vrnd/gen/vrndd-avx-x16.c", |
| 5427 | "src/f32-vrnd/gen/vrndne-avx-x16.c", |
| 5428 | "src/f32-vrnd/gen/vrndu-avx-x16.c", |
| 5429 | "src/f32-vrnd/gen/vrndz-avx-x16.c", |
| 5430 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c", |
| 5431 | "src/f32-vsqrt/gen/avx-sqrt-x8.c", |
| 5432 | "src/f32-vunary/gen/vabs-avx-x16.c", |
| 5433 | "src/f32-vunary/gen/vneg-avx-x16.c", |
| 5434 | "src/f32-vunary/gen/vsqr-avx-x16.c", |
| Marat Dukhan | 2848059 | 2021-07-27 23:52:27 -0700 | [diff] [blame] | 5435 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| 5436 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5437 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5438 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5439 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5440 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5441 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| 5442 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Marat Dukhan | cd4089f | 2021-12-14 23:53:33 -0800 | [diff] [blame] | 5443 | "src/qs8-f32-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5444 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5445 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5446 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5447 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5448 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5449 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 5450 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5451 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5452 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| 5453 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | cd4089f | 2021-12-14 23:53:33 -0800 | [diff] [blame] | 5454 | "src/qu8-f32-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5455 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5456 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5457 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5458 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5459 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5460 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 5461 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5462 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | 98e054b | 2021-09-13 09:43:50 -0700 | [diff] [blame] | 5463 | "src/x8-lut/gen/lut-avx-x64.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5464 | ] |
| 5465 | |
| 5466 | ALL_AVX_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 1227adb | 2021-10-16 17:33:51 -0700 | [diff] [blame] | 5467 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x8.c", |
| 5468 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c", |
| 5469 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x24.c", |
| 5470 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x32.c", |
| 5471 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x8.c", |
| 5472 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x16.c", |
| 5473 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x24.c", |
| 5474 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x32.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 5475 | "src/f32-dwconv/gen/up8x3-minmax-avx-acc2.c", |
| 5476 | "src/f32-dwconv/gen/up8x3-minmax-avx.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5477 | "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c", |
| 5478 | "src/f32-dwconv/gen/up8x4-minmax-avx.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5479 | "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c", |
| 5480 | "src/f32-dwconv/gen/up8x9-minmax-avx.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5481 | "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c", |
| 5482 | "src/f32-dwconv/gen/up8x25-minmax-avx.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 5483 | "src/f32-dwconv/gen/up16x3-minmax-avx-acc2.c", |
| 5484 | "src/f32-dwconv/gen/up16x3-minmax-avx.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5485 | "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c", |
| 5486 | "src/f32-dwconv/gen/up16x4-minmax-avx.c", |
| 5487 | "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c", |
| 5488 | "src/f32-dwconv/gen/up16x9-minmax-avx.c", |
| 5489 | "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c", |
| 5490 | "src/f32-dwconv/gen/up16x25-minmax-avx.c", |
| Marat Dukhan | eb84423 | 2021-11-08 23:07:53 -0800 | [diff] [blame] | 5491 | "src/f32-f16-vcvt/gen/vcvt-avx-x8.c", |
| 5492 | "src/f32-f16-vcvt/gen/vcvt-avx-x16.c", |
| 5493 | "src/f32-f16-vcvt/gen/vcvt-avx-x24.c", |
| 5494 | "src/f32-f16-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5495 | "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5496 | "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c", |
| 5497 | "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5498 | "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5499 | "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5500 | "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5501 | "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5502 | "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c", |
| 5503 | "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c", |
| 5504 | "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c", |
| 5505 | "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c", |
| 5506 | "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c", |
| 5507 | "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c", |
| 5508 | "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c", |
| 5509 | "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c", |
| 5510 | "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c", |
| 5511 | "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c", |
| 5512 | "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5513 | "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5514 | "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c", |
| 5515 | "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5516 | "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5517 | "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5518 | "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5519 | "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5520 | "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c", |
| 5521 | "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 90eca0a | 2020-03-11 00:52:23 -0700 | [diff] [blame] | 5522 | "src/f32-prelu/gen/avx-2x8.c", |
| 5523 | "src/f32-prelu/gen/avx-2x16.c", |
| Marat Dukhan | b91432c | 2021-12-14 16:52:09 -0800 | [diff] [blame] | 5524 | "src/f32-qs8-vcvt/gen/vcvt-avx-x8.c", |
| 5525 | "src/f32-qs8-vcvt/gen/vcvt-avx-x16.c", |
| 5526 | "src/f32-qs8-vcvt/gen/vcvt-avx-x24.c", |
| 5527 | "src/f32-qs8-vcvt/gen/vcvt-avx-x32.c", |
| 5528 | "src/f32-qu8-vcvt/gen/vcvt-avx-x8.c", |
| 5529 | "src/f32-qu8-vcvt/gen/vcvt-avx-x16.c", |
| 5530 | "src/f32-qu8-vcvt/gen/vcvt-avx-x24.c", |
| 5531 | "src/f32-qu8-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5532 | "src/f32-rmax/avx.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 5533 | "src/f32-vbinary/gen/vadd-minmax-avx-x8.c", |
| 5534 | "src/f32-vbinary/gen/vadd-minmax-avx-x16.c", |
| 5535 | "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c", |
| 5536 | "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c", |
| 5537 | "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c", |
| 5538 | "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c", |
| 5539 | "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c", |
| 5540 | "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c", |
| Marat Dukhan | 9a88efe | 2019-12-10 15:54:24 -0800 | [diff] [blame] | 5541 | "src/f32-vbinary/gen/vmax-avx-x8.c", |
| 5542 | "src/f32-vbinary/gen/vmax-avx-x16.c", |
| 5543 | "src/f32-vbinary/gen/vmaxc-avx-x8.c", |
| 5544 | "src/f32-vbinary/gen/vmaxc-avx-x16.c", |
| 5545 | "src/f32-vbinary/gen/vmin-avx-x8.c", |
| 5546 | "src/f32-vbinary/gen/vmin-avx-x16.c", |
| 5547 | "src/f32-vbinary/gen/vminc-avx-x8.c", |
| 5548 | "src/f32-vbinary/gen/vminc-avx-x16.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 5549 | "src/f32-vbinary/gen/vmul-minmax-avx-x8.c", |
| 5550 | "src/f32-vbinary/gen/vmul-minmax-avx-x16.c", |
| 5551 | "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c", |
| 5552 | "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c", |
| 5553 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c", |
| 5554 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c", |
| 5555 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c", |
| 5556 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 5557 | "src/f32-vbinary/gen/vsqrdiff-avx-x8.c", |
| 5558 | "src/f32-vbinary/gen/vsqrdiff-avx-x16.c", |
| 5559 | "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c", |
| 5560 | "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 5561 | "src/f32-vbinary/gen/vsub-minmax-avx-x8.c", |
| 5562 | "src/f32-vbinary/gen/vsub-minmax-avx-x16.c", |
| 5563 | "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c", |
| 5564 | "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 5565 | "src/f32-vclamp/gen/vclamp-avx-x8.c", |
| 5566 | "src/f32-vclamp/gen/vclamp-avx-x16.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5567 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c", |
| 5568 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c", |
| 5569 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c", |
| 5570 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c", |
| 5571 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c", |
| 5572 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c", |
| 5573 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c", |
| 5574 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c", |
| 5575 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c", |
| 5576 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c", |
| 5577 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c", |
| 5578 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c", |
| 5579 | "src/f32-velu/gen/velu-avx-rr2-p6-x8.c", |
| 5580 | "src/f32-velu/gen/velu-avx-rr2-p6-x16.c", |
| 5581 | "src/f32-velu/gen/velu-avx-rr2-p6-x24.c", |
| 5582 | "src/f32-velu/gen/velu-avx-rr2-p6-x32.c", |
| 5583 | "src/f32-velu/gen/velu-avx-rr2-p6-x40.c", |
| 5584 | "src/f32-velu/gen/velu-avx-rr2-p6-x48.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 5585 | "src/f32-vhswish/gen/vhswish-avx-x8.c", |
| 5586 | "src/f32-vhswish/gen/vhswish-avx-x16.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 5587 | "src/f32-vlrelu/gen/vlrelu-avx-x8.c", |
| 5588 | "src/f32-vlrelu/gen/vlrelu-avx-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 5589 | "src/f32-vrelu/gen/vrelu-avx-x8.c", |
| 5590 | "src/f32-vrelu/gen/vrelu-avx-x16.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 5591 | "src/f32-vrnd/gen/vrndd-avx-x8.c", |
| 5592 | "src/f32-vrnd/gen/vrndd-avx-x16.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5593 | "src/f32-vrnd/gen/vrndne-avx-x8.c", |
| 5594 | "src/f32-vrnd/gen/vrndne-avx-x16.c", |
| 5595 | "src/f32-vrnd/gen/vrndu-avx-x8.c", |
| 5596 | "src/f32-vrnd/gen/vrndu-avx-x16.c", |
| 5597 | "src/f32-vrnd/gen/vrndz-avx-x8.c", |
| 5598 | "src/f32-vrnd/gen/vrndz-avx-x16.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 5599 | "src/f32-vscale/avx-x32.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 5600 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c", |
| 5601 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c", |
| 5602 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c", |
| 5603 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c", |
| 5604 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c", |
| 5605 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c", |
| 5606 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c", |
| 5607 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c", |
| 5608 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c", |
| 5609 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c", |
| 5610 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c", |
| 5611 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c", |
| 5612 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c", |
| 5613 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c", |
| 5614 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c", |
| 5615 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c", |
| 5616 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c", |
| 5617 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c", |
| 5618 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c", |
| 5619 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 5620 | "src/f32-vsqrt/gen/avx-sqrt-x8.c", |
| 5621 | "src/f32-vsqrt/gen/avx-sqrt-x16.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 5622 | "src/f32-vunary/gen/vabs-avx-x8.c", |
| 5623 | "src/f32-vunary/gen/vabs-avx-x16.c", |
| 5624 | "src/f32-vunary/gen/vneg-avx-x8.c", |
| 5625 | "src/f32-vunary/gen/vneg-avx-x16.c", |
| 5626 | "src/f32-vunary/gen/vsqr-avx-x8.c", |
| 5627 | "src/f32-vunary/gen/vsqr-avx-x16.c", |
| Frank Barchard | 4a35204 | 2021-04-13 15:52:08 -0700 | [diff] [blame] | 5628 | "src/math/exp-avx-rr2-p5.c", |
| 5629 | "src/math/expm1minus-avx-rr2-lut4-p4-perm.c", |
| 5630 | "src/math/expm1minus-avx-rr2-lut16-p3.c", |
| 5631 | "src/math/expm1minus-avx-rr2-p6.c", |
| 5632 | "src/math/sigmoid-avx-rr2-lut64-p2-div.c", |
| 5633 | "src/math/sigmoid-avx-rr2-p5-div.c", |
| 5634 | "src/math/sigmoid-avx-rr2-p5-nr1.c", |
| 5635 | "src/math/sigmoid-avx-rr2-p5-nr2.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5636 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5637 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5638 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5639 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5640 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5641 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5642 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5643 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5644 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5645 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5646 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5647 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| 5648 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c", |
| 5649 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c", |
| 5650 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c", |
| 5651 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5652 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5653 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5654 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5655 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5656 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5657 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5658 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5659 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5660 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5661 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5662 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5663 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5664 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5665 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5666 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5667 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5668 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5669 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5670 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5671 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5672 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5673 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5674 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5675 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5676 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5677 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5678 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5679 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5680 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5681 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 5682 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5683 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5684 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5685 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5686 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5687 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5688 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5689 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5690 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5691 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5692 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c", |
| 5693 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5694 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c", |
| 5695 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | cd4089f | 2021-12-14 23:53:33 -0800 | [diff] [blame] | 5696 | "src/qs8-f32-vcvt/gen/vcvt-avx-x8.c", |
| 5697 | "src/qs8-f32-vcvt/gen/vcvt-avx-x16.c", |
| 5698 | "src/qs8-f32-vcvt/gen/vcvt-avx-x24.c", |
| 5699 | "src/qs8-f32-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5700 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5701 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5702 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5703 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5704 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5705 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5706 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5707 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5708 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5709 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5710 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5711 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5712 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5713 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5714 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5715 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5716 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5717 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5718 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5719 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5720 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5721 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5722 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5723 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5724 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5725 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5726 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5727 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5728 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5729 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5730 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5731 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5732 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5733 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5734 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | e9c4b96 | 2021-04-02 16:56:55 -0700 | [diff] [blame] | 5735 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c", |
| 5736 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c", |
| 5737 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c", |
| 5738 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c", |
| 5739 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5740 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c", |
| 5741 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c", |
| 5742 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c", |
| 5743 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c", |
| 5744 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c", |
| 5745 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c", |
| 5746 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c", |
| 5747 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| 5748 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c", |
| 5749 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c", |
| 5750 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5751 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5752 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5753 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5754 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5755 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5756 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5757 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5758 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5759 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5760 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5761 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5762 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | cd4089f | 2021-12-14 23:53:33 -0800 | [diff] [blame] | 5763 | "src/qu8-f32-vcvt/gen/vcvt-avx-x8.c", |
| 5764 | "src/qu8-f32-vcvt/gen/vcvt-avx-x16.c", |
| 5765 | "src/qu8-f32-vcvt/gen/vcvt-avx-x24.c", |
| 5766 | "src/qu8-f32-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5767 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 5768 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 5769 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 5770 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5771 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 5772 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 5773 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 5774 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5775 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 5776 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 5777 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 5778 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 5779 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 5780 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| 5781 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 5782 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 5783 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 5784 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5785 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 5786 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 5787 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 5788 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5789 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 5790 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 5791 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 5792 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 5793 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 5794 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 5795 | "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c", |
| 5796 | "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c", |
| 5797 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5798 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c", |
| 5799 | "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c", |
| 5800 | "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c", |
| 5801 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| 5802 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5803 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5804 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5805 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5806 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | 7c478e3 | 2021-09-10 09:48:13 -0700 | [diff] [blame] | 5807 | "src/x8-lut/gen/lut-avx-x16.c", |
| 5808 | "src/x8-lut/gen/lut-avx-x32.c", |
| 5809 | "src/x8-lut/gen/lut-avx-x48.c", |
| 5810 | "src/x8-lut/gen/lut-avx-x64.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5811 | ] |
| 5812 | |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 5813 | PROD_F16C_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 5814 | "src/f16-f32-vcvt/gen/vcvt-f16c-x16.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 5815 | "src/f32-f16-vcvt/gen/vcvt-f16c-x16.c", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 5816 | ] |
| 5817 | |
| 5818 | ALL_F16C_MICROKERNEL_SRCS = [ |
| 5819 | "src/f16-f32-vcvt/gen/vcvt-f16c-x8.c", |
| 5820 | "src/f16-f32-vcvt/gen/vcvt-f16c-x16.c", |
| Marat Dukhan | d77f77d | 2021-10-24 15:39:59 -0700 | [diff] [blame] | 5821 | "src/f32-f16-vcvt/gen/vcvt-f16c-x8.c", |
| 5822 | "src/f32-f16-vcvt/gen/vcvt-f16c-x16.c", |
| Marat Dukhan | 3ed866b | 2021-09-29 08:23:33 -0700 | [diff] [blame] | 5823 | "src/math/cvt-f16-f32-f16c.c", |
| Marat Dukhan | 582e184 | 2021-10-25 17:18:36 -0700 | [diff] [blame] | 5824 | "src/math/cvt-f32-f16-f16c.c", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 5825 | ] |
| 5826 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5827 | PROD_XOP_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 2848059 | 2021-07-27 23:52:27 -0700 | [diff] [blame] | 5828 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| 5829 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5830 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 5831 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 5832 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 5833 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 5834 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| 5835 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| 5836 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 5837 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 5838 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 5839 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 5840 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 5841 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 5842 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 5843 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 5844 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 5845 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 5846 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 5847 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 5848 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 5849 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 5850 | ] |
| 5851 | |
| 5852 | ALL_XOP_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5853 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5854 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5855 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5856 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5857 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5858 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5859 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5860 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 5861 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c", |
| 5862 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5863 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5864 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5865 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5866 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5867 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5868 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5869 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5870 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5871 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5872 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5873 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5874 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5875 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5876 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5877 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5878 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5879 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5880 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5881 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5882 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5883 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5884 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5885 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5886 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5887 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5888 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5889 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5890 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5891 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 5892 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5893 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5894 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5895 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5896 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5897 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5898 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5899 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5900 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5901 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5902 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5903 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5904 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5905 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5906 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5907 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5908 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5909 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5910 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5911 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5912 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5913 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5914 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5915 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5916 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5917 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5918 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5919 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5920 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5921 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5922 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5923 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5924 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5925 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5926 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5927 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5928 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5929 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5930 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5931 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5932 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5933 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5934 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5935 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | bb9225e | 2020-09-06 22:40:56 -0700 | [diff] [blame] | 5936 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 5937 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c", |
| 5938 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c", |
| 5939 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c", |
| 5940 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 5941 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c", |
| 5942 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c", |
| 5943 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5944 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| 5945 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| 5946 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 5947 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5948 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 5949 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 5950 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 5951 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 5952 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 5953 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 5954 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 5955 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 5956 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 5957 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 5958 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 5959 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 5960 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 5961 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| 5962 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 5963 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 5964 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 5965 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 5966 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 5967 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 5968 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 5969 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 5970 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 5971 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 5972 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 5973 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 5974 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 5975 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 5976 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 5977 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c", |
| 5978 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 5979 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c", |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 5980 | ] |
| 5981 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5982 | PROD_FMA3_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5983 | "src/f32-dwconv/gen/up8x25-minmax-fma3.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 5984 | "src/f32-dwconv/gen/up16x3-minmax-fma3.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5985 | "src/f32-dwconv/gen/up16x4-minmax-fma3.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5986 | "src/f32-dwconv/gen/up16x9-minmax-fma3.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5987 | "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c", |
| 5988 | "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 5989 | "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 5990 | "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c", |
| 5991 | "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c", |
| 5992 | "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 5993 | "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 5994 | "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c", |
| 5995 | "src/f32-vhswish/gen/vhswish-fma3-x16.c", |
| 5996 | ] |
| 5997 | |
| 5998 | ALL_FMA3_MICROKERNEL_SRCS = [ |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 5999 | "src/f32-dwconv/gen/up8x3-minmax-fma3-acc2.c", |
| 6000 | "src/f32-dwconv/gen/up8x3-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6001 | "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c", |
| 6002 | "src/f32-dwconv/gen/up8x4-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6003 | "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c", |
| 6004 | "src/f32-dwconv/gen/up8x9-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6005 | "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c", |
| 6006 | "src/f32-dwconv/gen/up8x25-minmax-fma3.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 6007 | "src/f32-dwconv/gen/up16x3-minmax-fma3-acc2.c", |
| 6008 | "src/f32-dwconv/gen/up16x3-minmax-fma3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6009 | "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c", |
| 6010 | "src/f32-dwconv/gen/up16x4-minmax-fma3.c", |
| 6011 | "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c", |
| 6012 | "src/f32-dwconv/gen/up16x9-minmax-fma3.c", |
| 6013 | "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c", |
| 6014 | "src/f32-dwconv/gen/up16x25-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6015 | "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6016 | "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c", |
| 6017 | "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c", |
| 6018 | "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c", |
| 6019 | "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6020 | "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6021 | "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c", |
| 6022 | "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6023 | "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6024 | "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c", |
| 6025 | "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6026 | "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c", |
| 6027 | "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c", |
| 6028 | "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6029 | "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c", |
| 6030 | "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c", |
| 6031 | "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 6032 | "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c", |
| 6033 | "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c", |
| 6034 | "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c", |
| 6035 | "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c", |
| 6036 | "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 6037 | "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c", |
| 6038 | "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c", |
| 6039 | "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c", |
| 6040 | "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c", |
| 6041 | "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c", |
| 6042 | "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6043 | "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6044 | "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c", |
| 6045 | "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 6046 | "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c", |
| 6047 | "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6048 | "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6049 | "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c", |
| 6050 | "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6051 | "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6052 | "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c", |
| 6053 | "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6054 | "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c", |
| 6055 | "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c", |
| 6056 | "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 6057 | "src/f32-vhswish/gen/vhswish-fma3-x8.c", |
| 6058 | "src/f32-vhswish/gen/vhswish-fma3-x16.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 6059 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c", |
| 6060 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c", |
| 6061 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c", |
| 6062 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c", |
| 6063 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c", |
| 6064 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c", |
| 6065 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c", |
| 6066 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 6067 | "src/math/sqrt-fma3-nr1fma.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 6068 | "src/math/sqrt-fma3-nr1fma1adj.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6069 | "src/math/sqrt-fma3-nr2fma.c", |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 6070 | ] |
| 6071 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6072 | PROD_AVX2_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 0d399ca | 2021-12-14 19:25:50 -0800 | [diff] [blame] | 6073 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c", |
| 6074 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6075 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c", |
| 6076 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c", |
| 6077 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6078 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6079 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6080 | "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6081 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6082 | "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6083 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6084 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 7b5f779 | 2021-12-15 00:29:39 -0800 | [diff] [blame] | 6085 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6086 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6087 | "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6088 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6089 | "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6090 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6091 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6092 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6093 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 7b5f779 | 2021-12-15 00:29:39 -0800 | [diff] [blame] | 6094 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6095 | "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6096 | "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6097 | "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6098 | "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6099 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6100 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| Marat Dukhan | 98e054b | 2021-09-13 09:43:50 -0700 | [diff] [blame] | 6101 | "src/x8-lut/gen/lut-avx2-x128.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6102 | ] |
| 6103 | |
| 6104 | ALL_AVX2_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 0d399ca | 2021-12-14 19:25:50 -0800 | [diff] [blame] | 6105 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x16.c", |
| 6106 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x32.c", |
| 6107 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x48.c", |
| 6108 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c", |
| 6109 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x16.c", |
| 6110 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x32.c", |
| 6111 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x48.c", |
| 6112 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6113 | "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c", |
| 6114 | "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6115 | "src/f32-raddexpminusmax/gen/avx2-p5-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6116 | "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6117 | "src/f32-raddexpminusmax/gen/avx2-p5-x72.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6118 | "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c", |
| 6119 | "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6120 | "src/f32-raddexpminusmax/gen/avx2-p5-x80.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6121 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c", |
| 6122 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c", |
| 6123 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6124 | "src/f32-raddexpminusmax/gen/avx2-p5-x96.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6125 | "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c", |
| 6126 | "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6127 | "src/f32-raddextexp/gen/avx2-p5-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6128 | "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6129 | "src/f32-raddextexp/gen/avx2-p5-x72.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6130 | "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c", |
| 6131 | "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6132 | "src/f32-raddextexp/gen/avx2-p5-x80.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6133 | "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c", |
| 6134 | "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c", |
| 6135 | "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6136 | "src/f32-raddextexp/gen/avx2-p5-x96.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 6137 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64-acc2.c", |
| 6138 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64-acc4.c", |
| 6139 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64.c", |
| 6140 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x72-acc3.c", |
| 6141 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x72.c", |
| 6142 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80-acc2.c", |
| 6143 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80-acc5.c", |
| 6144 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80.c", |
| 6145 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc2.c", |
| 6146 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc3.c", |
| 6147 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc6.c", |
| 6148 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6149 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c", |
| 6150 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c", |
| 6151 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c", |
| 6152 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c", |
| 6153 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c", |
| 6154 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c", |
| 6155 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c", |
| 6156 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c", |
| 6157 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c", |
| 6158 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c", |
| 6159 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c", |
| 6160 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c", |
| 6161 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c", |
| 6162 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c", |
| 6163 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c", |
| 6164 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c", |
| 6165 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c", |
| 6166 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c", |
| 6167 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c", |
| 6168 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c", |
| 6169 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c", |
| 6170 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c", |
| 6171 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c", |
| 6172 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c", |
| 6173 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c", |
| 6174 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c", |
| 6175 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c", |
| 6176 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c", |
| 6177 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c", |
| 6178 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c", |
| 6179 | "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c", |
| 6180 | "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c", |
| 6181 | "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c", |
| 6182 | "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c", |
| 6183 | "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c", |
| 6184 | "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c", |
| 6185 | "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c", |
| 6186 | "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c", |
| 6187 | "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c", |
| 6188 | "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6189 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c", |
| 6190 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c", |
| 6191 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c", |
| 6192 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c", |
| 6193 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c", |
| 6194 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c", |
| 6195 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c", |
| 6196 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c", |
| 6197 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c", |
| 6198 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c", |
| 6199 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c", |
| 6200 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c", |
| 6201 | "src/f32-vscaleextexp/gen/avx2-p5-x8.c", |
| 6202 | "src/f32-vscaleextexp/gen/avx2-p5-x16.c", |
| 6203 | "src/f32-vscaleextexp/gen/avx2-p5-x24.c", |
| 6204 | "src/f32-vscaleextexp/gen/avx2-p5-x32.c", |
| 6205 | "src/f32-vscaleextexp/gen/avx2-p5-x40.c", |
| 6206 | "src/f32-vscaleextexp/gen/avx2-p5-x48.c", |
| 6207 | "src/f32-vscaleextexp/gen/avx2-p5-x56.c", |
| 6208 | "src/f32-vscaleextexp/gen/avx2-p5-x64.c", |
| 6209 | "src/f32-vscaleextexp/gen/avx2-p5-x72.c", |
| 6210 | "src/f32-vscaleextexp/gen/avx2-p5-x80.c", |
| 6211 | "src/f32-vscaleextexp/gen/avx2-p5-x88.c", |
| 6212 | "src/f32-vscaleextexp/gen/avx2-p5-x96.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 6213 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c", |
| 6214 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c", |
| 6215 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c", |
| 6216 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c", |
| 6217 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c", |
| 6218 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c", |
| 6219 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c", |
| 6220 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c", |
| 6221 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c", |
| 6222 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c", |
| 6223 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c", |
| 6224 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c", |
| 6225 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c", |
| 6226 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c", |
| 6227 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c", |
| 6228 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c", |
| 6229 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c", |
| 6230 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c", |
| 6231 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c", |
| 6232 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c", |
| 6233 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c", |
| 6234 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c", |
| 6235 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c", |
| 6236 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c", |
| 6237 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c", |
| 6238 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c", |
| 6239 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c", |
| 6240 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c", |
| 6241 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c", |
| 6242 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 6243 | "src/math/exp-avx2-rr2-lut8-p3-perm.c", |
| 6244 | "src/math/exp-avx2-rr2-lut8-p4-perm.c", |
| 6245 | "src/math/exp-avx2-rr2-p5.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 6246 | "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c", |
| 6247 | "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c", |
| 6248 | "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c", |
| 6249 | "src/math/expm1minus-avx2-rr1-p6.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 6250 | "src/math/expminus-avx2-rr1-p5.c", |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 6251 | "src/math/expminus-avx2-rr2-p5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6252 | "src/math/extexp-avx2-p5.c", |
| 6253 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c", |
| 6254 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c", |
| 6255 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c", |
| 6256 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c", |
| 6257 | "src/math/sigmoid-avx2-rr1-p5-div.c", |
| 6258 | "src/math/sigmoid-avx2-rr1-p5-nr1fma.c", |
| 6259 | "src/math/sigmoid-avx2-rr1-p5-nr2fma.c", |
| 6260 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c", |
| 6261 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c", |
| 6262 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c", |
| 6263 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c", |
| 6264 | "src/math/sigmoid-avx2-rr2-p5-div.c", |
| 6265 | "src/math/sigmoid-avx2-rr2-p5-nr1fma.c", |
| 6266 | "src/math/sigmoid-avx2-rr2-p5-nr2fma.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 6267 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| 6268 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6269 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6270 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6271 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 6272 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6273 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6274 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6275 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 6276 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6277 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c", |
| 6278 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6279 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6280 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6281 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 6282 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6283 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6284 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6285 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 6286 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 6287 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6288 | "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c", |
| 6289 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6290 | "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c", |
| 6291 | "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6292 | "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | e06c813 | 2021-06-03 08:59:11 -0700 | [diff] [blame] | 6293 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6294 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6295 | "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6296 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6297 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6298 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6299 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6300 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6301 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6302 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6303 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6304 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6305 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6306 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6307 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6308 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6309 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6310 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6311 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6312 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6313 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6314 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6315 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 7b5f779 | 2021-12-15 00:29:39 -0800 | [diff] [blame] | 6316 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x8.c", |
| 6317 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| 6318 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x24.c", |
| 6319 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6320 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 6321 | "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6322 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 6323 | "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6324 | "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 6325 | "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6326 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6327 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6328 | "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | e6dc0b6 | 2020-09-08 23:57:14 -0700 | [diff] [blame] | 6329 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6330 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6331 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c", |
| 6332 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c", |
| 6333 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6334 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6335 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c", |
| 6336 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c", |
| Marat Dukhan | 09c312b | 2021-07-09 00:45:04 -0700 | [diff] [blame] | 6337 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| 6338 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| 6339 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6340 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6341 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| 6342 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 7b5f779 | 2021-12-15 00:29:39 -0800 | [diff] [blame] | 6343 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x8.c", |
| 6344 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| 6345 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x24.c", |
| 6346 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x32.c", |
| Marat Dukhan | 902ef7f | 2021-07-02 16:11:06 -0700 | [diff] [blame] | 6347 | "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6348 | "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6349 | "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6350 | "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6351 | "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6352 | "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 6353 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6354 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6355 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6356 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| Marat Dukhan | 7c478e3 | 2021-09-10 09:48:13 -0700 | [diff] [blame] | 6357 | "src/x8-lut/gen/lut-avx2-x32.c", |
| 6358 | "src/x8-lut/gen/lut-avx2-x64.c", |
| 6359 | "src/x8-lut/gen/lut-avx2-x96.c", |
| 6360 | "src/x8-lut/gen/lut-avx2-x128.c", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 6361 | ] |
| 6362 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6363 | PROD_AVX512F_MICROKERNEL_SRCS = [ |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 6364 | "src/f32-dwconv/gen/up16x3-minmax-avx512f.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6365 | "src/f32-dwconv/gen/up16x4-minmax-avx512f.c", |
| 6366 | "src/f32-dwconv/gen/up16x9-minmax-avx512f.c", |
| 6367 | "src/f32-dwconv/gen/up16x25-minmax-avx512f.c", |
| 6368 | "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6369 | "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6370 | "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6371 | "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6372 | "src/f32-prelu/gen/avx512f-2x16.c", |
| 6373 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c", |
| 6374 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c", |
| 6375 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c", |
| 6376 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c", |
| 6377 | "src/f32-vbinary/gen/vmax-avx512f-x32.c", |
| 6378 | "src/f32-vbinary/gen/vmaxc-avx512f-x32.c", |
| 6379 | "src/f32-vbinary/gen/vmin-avx512f-x32.c", |
| 6380 | "src/f32-vbinary/gen/vminc-avx512f-x32.c", |
| 6381 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c", |
| 6382 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c", |
| 6383 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c", |
| 6384 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c", |
| 6385 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c", |
| 6386 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c", |
| 6387 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c", |
| 6388 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c", |
| 6389 | "src/f32-vclamp/gen/vclamp-avx512f-x16.c", |
| 6390 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c", |
| 6391 | "src/f32-vhswish/gen/vhswish-avx512f-x16.c", |
| 6392 | "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c", |
| 6393 | "src/f32-vrnd/gen/vrndd-avx512f-x16.c", |
| 6394 | "src/f32-vrnd/gen/vrndne-avx512f-x16.c", |
| 6395 | "src/f32-vrnd/gen/vrndu-avx512f-x16.c", |
| 6396 | "src/f32-vrnd/gen/vrndz-avx512f-x16.c", |
| 6397 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c", |
| 6398 | "src/f32-vunary/gen/vabs-avx512f-x16.c", |
| 6399 | "src/f32-vunary/gen/vneg-avx512f-x16.c", |
| 6400 | "src/f32-vunary/gen/vsqr-avx512f-x16.c", |
| 6401 | ] |
| 6402 | |
| 6403 | ALL_AVX512F_MICROKERNEL_SRCS = [ |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 6404 | "src/f32-dwconv/gen/up16x3-minmax-avx512f-acc2.c", |
| 6405 | "src/f32-dwconv/gen/up16x3-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6406 | "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c", |
| 6407 | "src/f32-dwconv/gen/up16x4-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6408 | "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c", |
| 6409 | "src/f32-dwconv/gen/up16x9-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6410 | "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c", |
| 6411 | "src/f32-dwconv/gen/up16x25-minmax-avx512f.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 6412 | "src/f32-dwconv/gen/up32x3-minmax-avx512f-acc2.c", |
| 6413 | "src/f32-dwconv/gen/up32x3-minmax-avx512f.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6414 | "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c", |
| 6415 | "src/f32-dwconv/gen/up32x4-minmax-avx512f.c", |
| 6416 | "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c", |
| 6417 | "src/f32-dwconv/gen/up32x9-minmax-avx512f.c", |
| 6418 | "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c", |
| 6419 | "src/f32-dwconv/gen/up32x25-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6420 | "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c", |
| 6421 | "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c", |
| 6422 | "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c", |
| 6423 | "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c", |
| 6424 | "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c", |
| 6425 | "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6426 | "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6427 | "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c", |
| 6428 | "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c", |
| 6429 | "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c", |
| 6430 | "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6431 | "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6432 | "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6433 | "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c", |
| 6434 | "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c", |
| 6435 | "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c", |
| 6436 | "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6437 | "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c", |
| Marat Dukhan | 90eca0a | 2020-03-11 00:52:23 -0700 | [diff] [blame] | 6438 | "src/f32-prelu/gen/avx512f-2x16.c", |
| 6439 | "src/f32-prelu/gen/avx512f-2x32.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6440 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c", |
| 6441 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6442 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6443 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6444 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6445 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c", |
| 6446 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6447 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6448 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c", |
| 6449 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c", |
| 6450 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6451 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6452 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c", |
| 6453 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6454 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6455 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6456 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6457 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c", |
| 6458 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6459 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6460 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c", |
| 6461 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c", |
| 6462 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6463 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame^] | 6464 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128-acc2.c", |
| 6465 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128-acc4.c", |
| 6466 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128.c", |
| 6467 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x144-acc3.c", |
| 6468 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x144.c", |
| 6469 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160-acc2.c", |
| 6470 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160-acc5.c", |
| 6471 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160.c", |
| 6472 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc2.c", |
| 6473 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc3.c", |
| 6474 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc6.c", |
| 6475 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6476 | "src/f32-rmax/avx512f.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 6477 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c", |
| 6478 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c", |
| 6479 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c", |
| 6480 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c", |
| 6481 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c", |
| 6482 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c", |
| 6483 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c", |
| 6484 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c", |
| Marat Dukhan | 9a88efe | 2019-12-10 15:54:24 -0800 | [diff] [blame] | 6485 | "src/f32-vbinary/gen/vmax-avx512f-x16.c", |
| 6486 | "src/f32-vbinary/gen/vmax-avx512f-x32.c", |
| 6487 | "src/f32-vbinary/gen/vmaxc-avx512f-x16.c", |
| 6488 | "src/f32-vbinary/gen/vmaxc-avx512f-x32.c", |
| 6489 | "src/f32-vbinary/gen/vmin-avx512f-x16.c", |
| 6490 | "src/f32-vbinary/gen/vmin-avx512f-x32.c", |
| 6491 | "src/f32-vbinary/gen/vminc-avx512f-x16.c", |
| 6492 | "src/f32-vbinary/gen/vminc-avx512f-x32.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 6493 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c", |
| 6494 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c", |
| 6495 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c", |
| 6496 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c", |
| 6497 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c", |
| 6498 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c", |
| 6499 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c", |
| 6500 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 6501 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c", |
| 6502 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c", |
| 6503 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c", |
| 6504 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 6505 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c", |
| 6506 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c", |
| 6507 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c", |
| 6508 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 6509 | "src/f32-vclamp/gen/vclamp-avx512f-x16.c", |
| 6510 | "src/f32-vclamp/gen/vclamp-avx512f-x32.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6511 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c", |
| 6512 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c", |
| 6513 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c", |
| 6514 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c", |
| 6515 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c", |
| 6516 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c", |
| 6517 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c", |
| 6518 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c", |
| 6519 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c", |
| 6520 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c", |
| 6521 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c", |
| 6522 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c", |
| 6523 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c", |
| 6524 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c", |
| 6525 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c", |
| 6526 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 6527 | "src/f32-vhswish/gen/vhswish-avx512f-x16.c", |
| 6528 | "src/f32-vhswish/gen/vhswish-avx512f-x32.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 6529 | "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c", |
| 6530 | "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 6531 | "src/f32-vrelu/gen/vrelu-avx512f-x16.c", |
| 6532 | "src/f32-vrelu/gen/vrelu-avx512f-x32.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6533 | "src/f32-vrnd/gen/vrndd-avx512f-x16.c", |
| 6534 | "src/f32-vrnd/gen/vrndd-avx512f-x32.c", |
| 6535 | "src/f32-vrnd/gen/vrndne-avx512f-x16.c", |
| 6536 | "src/f32-vrnd/gen/vrndne-avx512f-x32.c", |
| 6537 | "src/f32-vrnd/gen/vrndu-avx512f-x16.c", |
| 6538 | "src/f32-vrnd/gen/vrndu-avx512f-x32.c", |
| 6539 | "src/f32-vrnd/gen/vrndz-avx512f-x16.c", |
| 6540 | "src/f32-vrnd/gen/vrndz-avx512f-x32.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 6541 | "src/f32-vscale/avx512f-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6542 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c", |
| 6543 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c", |
| 6544 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c", |
| 6545 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c", |
| 6546 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c", |
| 6547 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c", |
| 6548 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c", |
| 6549 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| 6550 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| 6551 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| 6552 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c", |
| 6553 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| 6554 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c", |
| 6555 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c", |
| 6556 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c", |
| 6557 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c", |
| 6558 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c", |
| 6559 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c", |
| 6560 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c", |
| 6561 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c", |
| 6562 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c", |
| 6563 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c", |
| 6564 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c", |
| 6565 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 6566 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c", |
| 6567 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c", |
| 6568 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c", |
| 6569 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c", |
| 6570 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c", |
| 6571 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c", |
| 6572 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c", |
| 6573 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c", |
| 6574 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c", |
| 6575 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c", |
| 6576 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c", |
| 6577 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c", |
| 6578 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c", |
| 6579 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c", |
| 6580 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c", |
| 6581 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c", |
| 6582 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c", |
| 6583 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c", |
| 6584 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c", |
| 6585 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c", |
| 6586 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c", |
| 6587 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c", |
| 6588 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c", |
| 6589 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c", |
| 6590 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c", |
| 6591 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c", |
| 6592 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c", |
| 6593 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c", |
| 6594 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c", |
| 6595 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c", |
| 6596 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c", |
| 6597 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c", |
| 6598 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c", |
| 6599 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c", |
| 6600 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c", |
| 6601 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c", |
| 6602 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c", |
| 6603 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c", |
| 6604 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c", |
| 6605 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c", |
| 6606 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c", |
| 6607 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c", |
| 6608 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c", |
| 6609 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c", |
| 6610 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c", |
| 6611 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c", |
| 6612 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c", |
| 6613 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 6614 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c", |
| 6615 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c", |
| 6616 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c", |
| 6617 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c", |
| 6618 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c", |
| 6619 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c", |
| 6620 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c", |
| 6621 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 6622 | "src/f32-vunary/gen/vabs-avx512f-x16.c", |
| 6623 | "src/f32-vunary/gen/vabs-avx512f-x32.c", |
| 6624 | "src/f32-vunary/gen/vneg-avx512f-x16.c", |
| 6625 | "src/f32-vunary/gen/vneg-avx512f-x32.c", |
| 6626 | "src/f32-vunary/gen/vsqr-avx512f-x16.c", |
| 6627 | "src/f32-vunary/gen/vsqr-avx512f-x32.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 6628 | "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c", |
| 6629 | "src/math/exp-avx512f-rr2-lut16-p3-perm.c", |
| 6630 | "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c", |
| 6631 | "src/math/exp-avx512f-rr2-lut32-p2-perm2.c", |
| 6632 | "src/math/exp-avx512f-rr2-p5-scalef.c", |
| 6633 | "src/math/exp-avx512f-rr2-p5.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 6634 | "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c", |
| 6635 | "src/math/expm1minus-avx512f-rr1-p6.c", |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 6636 | "src/math/extexp-avx512f-p5.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 6637 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 6638 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6639 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 6640 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 6641 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6642 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 6643 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 6644 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6645 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c", |
| 6646 | "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c", |
| 6647 | "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c", |
| 6648 | "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c", |
| 6649 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c", |
| 6650 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c", |
| 6651 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c", |
| 6652 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c", |
| 6653 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c", |
| 6654 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 6655 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 6656 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6657 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c", |
| 6658 | "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c", |
| 6659 | "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c", |
| 6660 | "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 6661 | "src/math/sqrt-avx512f-nr1fma.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 6662 | "src/math/sqrt-avx512f-nr1fma1adj.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6663 | "src/math/sqrt-avx512f-nr2fma.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6664 | ] |
| 6665 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6666 | PROD_AVX512SKX_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 6667 | "src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 6668 | "src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c", |
| Marat Dukhan | 2edf863 | 2021-12-14 23:17:14 -0800 | [diff] [blame] | 6669 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c", |
| 6670 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6671 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6672 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 6673 | "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6674 | "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6675 | "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6676 | "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6677 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6678 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 98393ad | 2021-12-15 11:07:40 -0800 | [diff] [blame] | 6679 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6680 | "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6681 | "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6682 | "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6683 | "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6684 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6685 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6686 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6687 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 98393ad | 2021-12-15 11:07:40 -0800 | [diff] [blame] | 6688 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6689 | "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6690 | "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6691 | "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6692 | "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6693 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6694 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| Marat Dukhan | 98e054b | 2021-09-13 09:43:50 -0700 | [diff] [blame] | 6695 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6696 | ] |
| 6697 | |
| 6698 | ALL_AVX512SKX_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 79c76ab | 2021-09-26 20:26:39 -0700 | [diff] [blame] | 6699 | "src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6700 | "src/f16-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| Marat Dukhan | d77f77d | 2021-10-24 15:39:59 -0700 | [diff] [blame] | 6701 | "src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6702 | "src/f32-f16-vcvt/gen/vcvt-avx512skx-x32.c", |
| Marat Dukhan | 2edf863 | 2021-12-14 23:17:14 -0800 | [diff] [blame] | 6703 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6704 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x64.c", |
| 6705 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x96.c", |
| 6706 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c", |
| 6707 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6708 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x64.c", |
| 6709 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x96.c", |
| 6710 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 6711 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| 6712 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| 6713 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6714 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | c3e3f1c | 2021-06-03 09:56:16 -0700 | [diff] [blame] | 6715 | "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6716 | "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 6717 | "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 6718 | "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6719 | "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6720 | "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 6721 | "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 6722 | "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6723 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6724 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6725 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6726 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 98393ad | 2021-12-15 11:07:40 -0800 | [diff] [blame] | 6727 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6728 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6729 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x48.c", |
| 6730 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x64.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6731 | "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6732 | "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6733 | "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6734 | "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6735 | "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6736 | "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6737 | "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6738 | "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | e76049a | 2021-07-22 14:48:59 -0700 | [diff] [blame] | 6739 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6740 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| 6741 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6742 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| Marat Dukhan | cfd606b | 2021-07-09 01:18:45 -0700 | [diff] [blame] | 6743 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| 6744 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| 6745 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6746 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 98393ad | 2021-12-15 11:07:40 -0800 | [diff] [blame] | 6747 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6748 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6749 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x48.c", |
| 6750 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x64.c", |
| Marat Dukhan | 3cf2e22 | 2021-07-08 11:38:45 -0700 | [diff] [blame] | 6751 | "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6752 | "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 6753 | "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 6754 | "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6755 | "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6756 | "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 6757 | "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 6758 | "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | e76049a | 2021-07-22 14:48:59 -0700 | [diff] [blame] | 6759 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6760 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| 6761 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6762 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| Marat Dukhan | 2b3c410 | 2021-09-10 19:05:37 -0700 | [diff] [blame] | 6763 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c", |
| 6764 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x128.c", |
| 6765 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x192.c", |
| 6766 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x256.c", |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 6767 | ] |
| 6768 | |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 6769 | WASM32_ASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 6770 | "src/f32-vrelu/wasm_shr_x1.S", |
| 6771 | "src/f32-vrelu/wasm_shr_x2.S", |
| 6772 | "src/f32-vrelu/wasm_shr_x4.S", |
| Frank Barchard | bcedc08 | 2020-08-17 18:00:51 -0700 | [diff] [blame] | 6773 | ] |
| 6774 | |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 6775 | AARCH32_ASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 32f9381 | 2020-05-17 20:31:21 -0700 | [diff] [blame] | 6776 | "src/f32-gemm/4x4-aarch32-vfp-ld64.S", |
| Marat Dukhan | 3b98f6b | 2020-05-17 10:09:22 -0700 | [diff] [blame] | 6777 | "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6778 | "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S", |
| 6779 | "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S", |
| Frank Barchard | 490febe | 2020-07-16 18:42:17 -0700 | [diff] [blame] | 6780 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6781 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S", |
| Frank Barchard | 569561d | 2020-06-17 13:11:12 -0700 | [diff] [blame] | 6782 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S", |
| Frank Barchard | 7873586 | 2022-01-04 16:47:44 -0800 | [diff] [blame] | 6783 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6784 | "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S", |
| 6785 | "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S", |
| Frank Barchard | 490febe | 2020-07-16 18:42:17 -0700 | [diff] [blame] | 6786 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S", |
| 6787 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S", |
| 6788 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S", |
| Frank Barchard | 7873586 | 2022-01-04 16:47:44 -0800 | [diff] [blame] | 6789 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-prfm-cortex-a75.S", |
| Frank Barchard | 87fe410 | 2021-12-28 14:42:23 -0800 | [diff] [blame] | 6790 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-ld64.S", |
| 6791 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-ld64.S", |
| 6792 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-aarch32-neondot-ld64.S", |
| 6793 | "src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-ld64.S", |
| 6794 | "src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-ld64.S", |
| 6795 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-aarch32-neondot-ld64.S", |
| Frank Barchard | cccb012 | 2022-01-04 15:24:00 -0800 | [diff] [blame] | 6796 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S", |
| 6797 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S", |
| 6798 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S", |
| 6799 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S", |
| 6800 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S", |
| 6801 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6802 | ] |
| 6803 | |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 6804 | AARCH64_ASM_MICROKERNEL_SRCS = [ |
| Frank Barchard | bddfbcd | 2020-04-15 12:32:41 -0700 | [diff] [blame] | 6805 | "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6806 | "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| Frank Barchard | bddfbcd | 2020-04-15 12:32:41 -0700 | [diff] [blame] | 6807 | "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6808 | "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| Frank Barchard | bddfbcd | 2020-04-15 12:32:41 -0700 | [diff] [blame] | 6809 | "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 80fc5f4 | 2021-06-07 10:43:16 -0700 | [diff] [blame] | 6810 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S", |
| Frank Barchard | 9737461 | 2021-06-07 11:51:07 -0700 | [diff] [blame] | 6811 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6812 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| 6813 | "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6814 | "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S", |
| 6815 | "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 6816 | "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S", |
| 6817 | "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 6818 | "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 80fc5f4 | 2021-06-07 10:43:16 -0700 | [diff] [blame] | 6819 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S", |
| Frank Barchard | 9737461 | 2021-06-07 11:51:07 -0700 | [diff] [blame] | 6820 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6821 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 6822 | "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6823 | "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S", |
| 6824 | "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6825 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6826 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6827 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6828 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6829 | "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6830 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| 6831 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6832 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6833 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6834 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6835 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6836 | "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6837 | "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6838 | "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6839 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| 6840 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6841 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6842 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6843 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6844 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6845 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6846 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6847 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 6848 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6849 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6850 | "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S", |
| 6851 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 6852 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6853 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 6854 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S", |
| 6855 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6856 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6857 | "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6858 | "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6859 | "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6860 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 6861 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6862 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S", |
| 6863 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 6864 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S", |
| 6865 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6866 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6867 | "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6868 | "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6869 | "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 6870 | "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6871 | "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S", |
| 6872 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 6873 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S", |
| 6874 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6875 | "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6876 | "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6877 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | e349124 | 2021-06-11 14:04:57 -0700 | [diff] [blame] | 6878 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 79cd5f9 | 2021-06-21 17:34:59 -0700 | [diff] [blame] | 6879 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6880 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| 6881 | "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 6882 | "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| 6883 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | e349124 | 2021-06-11 14:04:57 -0700 | [diff] [blame] | 6884 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 79cd5f9 | 2021-06-21 17:34:59 -0700 | [diff] [blame] | 6885 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 6886 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6887 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 6888 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6889 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 6890 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 6891 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 6892 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6893 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 6894 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6895 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 6896 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 6897 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S", |
| 6898 | "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 6899 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6900 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 6901 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6902 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 6903 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 6904 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 6905 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 6906 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6907 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 6908 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6909 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 6910 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 6911 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 6912 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6913 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 6914 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 6915 | "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 6916 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6917 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 6918 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6919 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 6920 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 6921 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 6922 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6923 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 6924 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6925 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 6926 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6927 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 6928 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6929 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 6930 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| Frank Barchard | 1a0b276 | 2021-06-29 18:37:59 -0700 | [diff] [blame] | 6931 | "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 6932 | "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 6933 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S", |
| 6934 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6935 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 6936 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6937 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 6938 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 6939 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6940 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 6941 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6942 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 6943 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| 6944 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull.S", |
| 6945 | "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6946 | "src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S", |
| Frank Barchard | 914f57b | 2021-12-13 12:31:42 -0800 | [diff] [blame] | 6947 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| 6948 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 98af05c | 2021-06-30 12:15:04 -0700 | [diff] [blame] | 6949 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6950 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 98af05c | 2021-06-30 12:15:04 -0700 | [diff] [blame] | 6951 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6952 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 6953 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6954 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 6955 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6956 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 1a0b276 | 2021-06-29 18:37:59 -0700 | [diff] [blame] | 6957 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 6958 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 6959 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 6960 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 6961 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 6962 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S", |
| 6963 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| Frank Barchard | 60729d0 | 2021-07-20 12:25:09 -0700 | [diff] [blame] | 6964 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6965 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 6966 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6967 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 6968 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6969 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 6970 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6971 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 6972 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| 6973 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 6974 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6975 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 6976 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6977 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 6978 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 6979 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 6980 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| 6981 | "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 6982 | "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S", |
| Frank Barchard | 914f57b | 2021-12-13 12:31:42 -0800 | [diff] [blame] | 6983 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| 6984 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 98af05c | 2021-06-30 12:15:04 -0700 | [diff] [blame] | 6985 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6986 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 98af05c | 2021-06-30 12:15:04 -0700 | [diff] [blame] | 6987 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6988 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 6989 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6990 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 6991 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 6992 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 1a0b276 | 2021-06-29 18:37:59 -0700 | [diff] [blame] | 6993 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 6994 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 6995 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 6996 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 6997 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| Frank Barchard | 60729d0 | 2021-07-20 12:25:09 -0700 | [diff] [blame] | 6998 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | ca4c68e | 2021-08-25 19:06:40 -0700 | [diff] [blame] | 6999 | "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| Frank Barchard | df8e604 | 2021-09-03 13:56:29 -0700 | [diff] [blame] | 7000 | "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 7001 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 7002 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S", |
| Frank Barchard | 9cdc10d | 2021-11-22 19:03:54 -0800 | [diff] [blame] | 7003 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 7004 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 7005 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S", |
| Frank Barchard | 9cdc10d | 2021-11-22 19:03:54 -0800 | [diff] [blame] | 7006 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Digant Desai | 10f9f62 | 2021-11-23 13:33:52 -0800 | [diff] [blame] | 7007 | "src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| Digant Desai | 2e2d179 | 2021-11-24 11:06:37 -0800 | [diff] [blame] | 7008 | "src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 7009 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| Frank Barchard | 0c76422 | 2021-08-24 16:13:06 -0700 | [diff] [blame] | 7010 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | ca4c68e | 2021-08-25 19:06:40 -0700 | [diff] [blame] | 7011 | "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| Frank Barchard | df8e604 | 2021-09-03 13:56:29 -0700 | [diff] [blame] | 7012 | "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 7013 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 7014 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S", |
| Frank Barchard | 9cdc10d | 2021-11-22 19:03:54 -0800 | [diff] [blame] | 7015 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 7016 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 7017 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S", |
| Frank Barchard | 9cdc10d | 2021-11-22 19:03:54 -0800 | [diff] [blame] | 7018 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Digant Desai | 10f9f62 | 2021-11-23 13:33:52 -0800 | [diff] [blame] | 7019 | "src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| Digant Desai | 2e2d179 | 2021-11-24 11:06:37 -0800 | [diff] [blame] | 7020 | "src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 7021 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| Frank Barchard | 0c76422 | 2021-08-24 16:13:06 -0700 | [diff] [blame] | 7022 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7023 | ] |
| 7024 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7025 | INTERNAL_MICROKERNEL_HDRS = [ |
| Zhi An Ng | b43b47a | 2021-12-23 16:27:22 -0800 | [diff] [blame] | 7026 | "src/xnnpack/allocator.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7027 | "src/xnnpack/argmaxpool.h", |
| 7028 | "src/xnnpack/avgpool.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7029 | "src/xnnpack/common.h", |
| 7030 | "src/xnnpack/conv.h", |
| Yury Kartynnik | e784186 | 2020-11-04 18:22:18 -0800 | [diff] [blame] | 7031 | "src/xnnpack/depthtospace.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7032 | "src/xnnpack/dwconv.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7033 | "src/xnnpack/fill.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7034 | "src/xnnpack/gavgpool.h", |
| 7035 | "src/xnnpack/gemm.h", |
| Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 7036 | "src/xnnpack/ibilinear.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7037 | "src/xnnpack/igemm.h", |
| Marat Dukhan | cfb3134 | 2019-12-05 10:42:57 -0800 | [diff] [blame] | 7038 | "src/xnnpack/intrinsics-polyfill.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7039 | "src/xnnpack/lut.h", |
| 7040 | "src/xnnpack/math.h", |
| 7041 | "src/xnnpack/maxpool.h", |
| 7042 | "src/xnnpack/packx.h", |
| 7043 | "src/xnnpack/pad.h", |
| 7044 | "src/xnnpack/params.h", |
| 7045 | "src/xnnpack/pavgpool.h", |
| 7046 | "src/xnnpack/ppmm.h", |
| 7047 | "src/xnnpack/prelu.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 7048 | "src/xnnpack/raddexpminusmax.h", |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 7049 | "src/xnnpack/raddextexp.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 7050 | "src/xnnpack/raddstoreexpminusmax.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7051 | "src/xnnpack/rmax.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7052 | "src/xnnpack/spmm.h", |
| Frank Barchard | 70e8c99 | 2021-12-16 18:35:18 -0800 | [diff] [blame] | 7053 | "src/xnnpack/transpose.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7054 | "src/xnnpack/unpool.h", |
| Marat Dukhan | 6428725 | 2021-09-07 16:20:03 -0700 | [diff] [blame] | 7055 | "src/xnnpack/vaddsub.h", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 7056 | "src/xnnpack/vbinary.h", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 7057 | "src/xnnpack/vcvt.h", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 7058 | "src/xnnpack/vmul.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7059 | "src/xnnpack/vmulcaddc.h", |
| Marat Dukhan | 05ac8e3 | 2019-10-21 15:39:33 -0700 | [diff] [blame] | 7060 | "src/xnnpack/vscale.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 7061 | "src/xnnpack/vscaleexpminusmax.h", |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 7062 | "src/xnnpack/vscaleextexp.h", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 7063 | "src/xnnpack/vunary.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7064 | "src/xnnpack/zip.h", |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7065 | ] |
| 7066 | |
| 7067 | INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7068 | "include/xnnpack.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7069 | "src/xnnpack/compute.h", |
| 7070 | "src/xnnpack/im2col.h", |
| 7071 | "src/xnnpack/indirection.h", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 7072 | "src/xnnpack/math-stubs.h", |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 7073 | "src/xnnpack/memory-planner.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7074 | "src/xnnpack/operator.h", |
| 7075 | "src/xnnpack/pack.h", |
| Marat Dukhan | eeaa7bd | 2019-10-25 17:31:25 -0700 | [diff] [blame] | 7076 | "src/xnnpack/params-init.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7077 | "src/xnnpack/requantization-stubs.h", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 7078 | "src/xnnpack/requantization.h", |
| Marat Dukhan | 1d75a54 | 2020-02-03 12:23:01 -0800 | [diff] [blame] | 7079 | "src/xnnpack/subgraph.h", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 7080 | ] |
| 7081 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7082 | ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 7083 | "src/xnnpack/math-stubs.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7084 | ] |
| 7085 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7086 | MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7087 | "include/xnnpack.h", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 7088 | "src/xnnpack/params-init.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7089 | ] |
| 7090 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7091 | MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 7092 | "include/xnnpack.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7093 | "src/xnnpack/isa-checks.h", |
| Marat Dukhan | eeaa7bd | 2019-10-25 17:31:25 -0700 | [diff] [blame] | 7094 | "src/xnnpack/params-init.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7095 | "src/xnnpack/requantization.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7096 | ] |
| 7097 | |
| 7098 | OPERATOR_TEST_PARAMS_HDRS = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7099 | "src/xnnpack/common.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7100 | "src/xnnpack/params.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7101 | ] |
| 7102 | |
| 7103 | WEIGHTS_PACK_HDRS = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7104 | "src/xnnpack/compute.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7105 | "src/xnnpack/operator.h", |
| 7106 | "src/xnnpack/pack.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7107 | ] |
| 7108 | |
| Marat Dukhan | c8e00eb | 2019-10-04 14:55:26 -0700 | [diff] [blame] | 7109 | LOGGING_COPTS = select({ |
| 7110 | # No logging in optimized mode |
| 7111 | ":optimized_build": ["-DXNN_LOG_LEVEL=0"], |
| 7112 | # Full logging in debug mode |
| 7113 | ":debug_build": ["-DXNN_LOG_LEVEL=5"], |
| 7114 | # Error-only logging in default (fastbuild) mode |
| 7115 | "//conditions:default": ["-DXNN_LOG_LEVEL=2"], |
| 7116 | }) |
| 7117 | |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 7118 | LOGGING_SRCS = select({ |
| 7119 | # No logging in optimized mode |
| 7120 | ":optimized_build": [], |
| 7121 | "//conditions:default": [ |
| Marat Dukhan | ccd3a1d | 2021-03-29 16:03:12 -0700 | [diff] [blame] | 7122 | "src/datatype-strings.c", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 7123 | "src/operator-strings.c", |
| 7124 | "src/subgraph-strings.c", |
| 7125 | ], |
| 7126 | }) |
| 7127 | |
| Marat Dukhan | c8e00eb | 2019-10-04 14:55:26 -0700 | [diff] [blame] | 7128 | LOGGING_HDRS = [ |
| 7129 | "src/xnnpack/log.h", |
| 7130 | ] |
| 7131 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7132 | xnnpack_cc_library( |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7133 | name = "tables", |
| 7134 | srcs = TABLE_SRCS, |
| 7135 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7136 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7137 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7138 | ) |
| 7139 | |
| 7140 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7141 | name = "scalar_bench_microkernels", |
| 7142 | srcs = ALL_SCALAR_MICROKERNEL_SRCS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7143 | hdrs = INTERNAL_HDRS, |
| 7144 | aarch32_copts = ["-marm"], |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7145 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7146 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7147 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7148 | ":tables", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7149 | "@FP16", |
| 7150 | "@FXdiv", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7151 | "@pthreadpool", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7152 | ], |
| 7153 | ) |
| 7154 | |
| 7155 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7156 | name = "scalar_prod_microkernels", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 7157 | srcs = PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7158 | hdrs = INTERNAL_HDRS, |
| 7159 | aarch32_copts = ["-marm"], |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 7160 | aarch32_srcs = PROD_SCALAR_AARCH32_MICROKERNEL_SRCS, |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7161 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7162 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | a198f00 | 2022-01-04 18:45:11 -0800 | [diff] [blame] | 7163 | riscv_srcs = PROD_SCALAR_RISCV_MICROKERNEL_SRCS, |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 7164 | wasm_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS, |
| 7165 | wasmrelaxedsimd_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS, |
| 7166 | wasmsimd_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7167 | deps = [ |
| 7168 | ":tables", |
| 7169 | "@FP16", |
| 7170 | "@FXdiv", |
| 7171 | "@pthreadpool", |
| 7172 | ], |
| 7173 | ) |
| 7174 | |
| 7175 | xnnpack_cc_library( |
| 7176 | name = "scalar_test_microkernels", |
| 7177 | srcs = ALL_SCALAR_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7178 | hdrs = INTERNAL_HDRS, |
| 7179 | aarch32_copts = ["-marm"], |
| 7180 | copts = [ |
| 7181 | "-UNDEBUG", |
| 7182 | "-DXNN_TEST_MODE=1", |
| 7183 | ], |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7184 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7185 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7186 | deps = [ |
| 7187 | ":tables", |
| 7188 | "@FP16", |
| 7189 | "@FXdiv", |
| 7190 | "@pthreadpool", |
| 7191 | ], |
| 7192 | ) |
| 7193 | |
| 7194 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7195 | name = "wasm_bench_microkernels", |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 7196 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7197 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7198 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7199 | wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 7200 | wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7201 | wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 7202 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7203 | ":tables", |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 7204 | "@FP16", |
| 7205 | "@FXdiv", |
| 7206 | "@pthreadpool", |
| 7207 | ], |
| 7208 | ) |
| 7209 | |
| 7210 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7211 | name = "wasm_prod_microkernels", |
| 7212 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7213 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7214 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7215 | wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 7216 | wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7217 | wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| 7218 | deps = [ |
| 7219 | ":tables", |
| 7220 | "@FP16", |
| 7221 | "@FXdiv", |
| 7222 | "@pthreadpool", |
| 7223 | ], |
| 7224 | ) |
| 7225 | |
| 7226 | xnnpack_cc_library( |
| 7227 | name = "wasm_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7228 | hdrs = INTERNAL_HDRS, |
| 7229 | copts = [ |
| 7230 | "-UNDEBUG", |
| 7231 | "-DXNN_TEST_MODE=1", |
| 7232 | ], |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7233 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7234 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7235 | wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 7236 | wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7237 | wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7238 | deps = [ |
| 7239 | ":tables", |
| 7240 | "@FP16", |
| 7241 | "@FXdiv", |
| 7242 | "@pthreadpool", |
| 7243 | ], |
| 7244 | ) |
| 7245 | |
| 7246 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7247 | name = "neon_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7248 | hdrs = INTERNAL_HDRS, |
| 7249 | aarch32_copts = [ |
| 7250 | "-marm", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 7251 | "-march=armv7-a", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7252 | "-mfpu=neon", |
| 7253 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7254 | aarch32_srcs = ALL_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7255 | aarch64_srcs = ALL_NEON_MICROKERNEL_SRCS + ALL_AARCH64_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7256 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7257 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7258 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7259 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7260 | "@FP16", |
| 7261 | "@pthreadpool", |
| 7262 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7263 | ) |
| 7264 | |
| 7265 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7266 | name = "neon_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7267 | hdrs = INTERNAL_HDRS, |
| 7268 | aarch32_copts = [ |
| 7269 | "-marm", |
| 7270 | "-march=armv7-a", |
| 7271 | "-mfpu=neon", |
| 7272 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7273 | aarch32_srcs = PROD_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7274 | aarch64_srcs = PROD_NEON_MICROKERNEL_SRCS + PROD_AARCH64_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7275 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7276 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7277 | deps = [ |
| 7278 | ":tables", |
| 7279 | "@FP16", |
| 7280 | "@pthreadpool", |
| 7281 | ], |
| 7282 | ) |
| 7283 | |
| 7284 | xnnpack_cc_library( |
| 7285 | name = "neon_test_microkernels", |
| 7286 | hdrs = INTERNAL_HDRS, |
| 7287 | aarch32_copts = [ |
| 7288 | "-marm", |
| 7289 | "-march=armv7-a", |
| 7290 | "-mfpu=neon", |
| 7291 | ], |
| 7292 | aarch32_srcs = ALL_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7293 | aarch64_srcs = ALL_NEON_MICROKERNEL_SRCS + ALL_AARCH64_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7294 | copts = [ |
| 7295 | "-UNDEBUG", |
| 7296 | "-DXNN_TEST_MODE=1", |
| 7297 | ], |
| 7298 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7299 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7300 | deps = [ |
| 7301 | ":tables", |
| 7302 | "@FP16", |
| 7303 | "@pthreadpool", |
| 7304 | ], |
| 7305 | ) |
| 7306 | |
| 7307 | xnnpack_cc_library( |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 7308 | name = "neonfp16_bench_microkernels", |
| 7309 | hdrs = INTERNAL_HDRS, |
| 7310 | aarch32_copts = [ |
| 7311 | "-marm", |
| 7312 | "-march=armv7-a", |
| 7313 | "-mfpu=neon-fp16", |
| 7314 | ], |
| 7315 | aarch32_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| 7316 | aarch64_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| 7317 | apple_aarch32_copts = [ |
| 7318 | "-mcpu=cortex-a9", |
| 7319 | "-mtune=generic", |
| 7320 | ], |
| 7321 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7322 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7323 | deps = [ |
| 7324 | ":tables", |
| 7325 | "@FP16", |
| 7326 | "@pthreadpool", |
| 7327 | ], |
| 7328 | ) |
| 7329 | |
| 7330 | xnnpack_cc_library( |
| 7331 | name = "neonfp16_prod_microkernels", |
| 7332 | hdrs = INTERNAL_HDRS, |
| 7333 | aarch32_copts = [ |
| 7334 | "-marm", |
| 7335 | "-march=armv7-a", |
| 7336 | "-mfpu=neon-fp16", |
| 7337 | ], |
| 7338 | aarch32_srcs = PROD_NEONFP16_MICROKERNEL_SRCS, |
| 7339 | aarch64_srcs = PROD_NEONFP16_MICROKERNEL_SRCS, |
| 7340 | apple_aarch32_copts = [ |
| 7341 | "-mcpu=cortex-a9", |
| 7342 | "-mtune=generic", |
| 7343 | ], |
| 7344 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7345 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7346 | deps = [ |
| 7347 | ":tables", |
| 7348 | "@FP16", |
| 7349 | "@pthreadpool", |
| 7350 | ], |
| 7351 | ) |
| 7352 | |
| 7353 | xnnpack_cc_library( |
| 7354 | name = "neonfp16_test_microkernels", |
| 7355 | hdrs = INTERNAL_HDRS, |
| 7356 | aarch32_copts = [ |
| 7357 | "-marm", |
| 7358 | "-march=armv7-a", |
| 7359 | "-mfpu=neon-fp16", |
| 7360 | ], |
| 7361 | aarch32_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| 7362 | aarch64_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| 7363 | apple_aarch32_copts = [ |
| 7364 | "-mcpu=cortex-a9", |
| 7365 | "-mtune=generic", |
| 7366 | ], |
| 7367 | copts = [ |
| 7368 | "-UNDEBUG", |
| 7369 | "-DXNN_TEST_MODE=1", |
| 7370 | ], |
| 7371 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7372 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7373 | deps = [ |
| 7374 | ":tables", |
| 7375 | "@FP16", |
| 7376 | "@pthreadpool", |
| 7377 | ], |
| 7378 | ) |
| 7379 | |
| 7380 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7381 | name = "neonfma_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7382 | hdrs = INTERNAL_HDRS, |
| 7383 | aarch32_copts = [ |
| 7384 | "-marm", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 7385 | "-march=armv7-a", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7386 | "-mfpu=neon-vfpv4", |
| 7387 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7388 | aarch32_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7389 | aarch64_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 7390 | apple_aarch32_copts = [ |
| 7391 | "-mcpu=swift", |
| 7392 | "-mtune=generic", |
| 7393 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7394 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7395 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7396 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7397 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7398 | "@FP16", |
| 7399 | "@pthreadpool", |
| 7400 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7401 | ) |
| 7402 | |
| 7403 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7404 | name = "neonfma_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7405 | hdrs = INTERNAL_HDRS, |
| 7406 | aarch32_copts = [ |
| 7407 | "-marm", |
| 7408 | "-march=armv7-a", |
| 7409 | "-mfpu=neon-vfpv4", |
| 7410 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7411 | aarch32_srcs = PROD_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7412 | aarch64_srcs = PROD_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7413 | apple_aarch32_copts = [ |
| 7414 | "-mcpu=swift", |
| 7415 | "-mtune=generic", |
| 7416 | ], |
| 7417 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7418 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7419 | deps = [ |
| 7420 | ":tables", |
| 7421 | "@FP16", |
| 7422 | "@pthreadpool", |
| 7423 | ], |
| 7424 | ) |
| 7425 | |
| 7426 | xnnpack_cc_library( |
| 7427 | name = "neonfma_test_microkernels", |
| 7428 | hdrs = INTERNAL_HDRS, |
| 7429 | aarch32_copts = [ |
| 7430 | "-marm", |
| 7431 | "-march=armv7-a", |
| 7432 | "-mfpu=neon-vfpv4", |
| 7433 | ], |
| 7434 | aarch32_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7435 | aarch64_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 7436 | apple_aarch32_copts = [ |
| 7437 | "-mcpu=swift", |
| 7438 | "-mtune=generic", |
| 7439 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7440 | copts = [ |
| 7441 | "-UNDEBUG", |
| 7442 | "-DXNN_TEST_MODE=1", |
| 7443 | ], |
| 7444 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7445 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7446 | deps = [ |
| 7447 | ":tables", |
| 7448 | "@FP16", |
| 7449 | "@pthreadpool", |
| 7450 | ], |
| 7451 | ) |
| 7452 | |
| 7453 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7454 | name = "neonv8_bench_microkernels", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 7455 | hdrs = INTERNAL_HDRS, |
| 7456 | aarch32_copts = [ |
| 7457 | "-marm", |
| 7458 | "-march=armv8-a", |
| 7459 | "-mfpu=neon-fp-armv8", |
| 7460 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7461 | aarch32_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| 7462 | aarch64_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 7463 | apple_aarch32_copts = [ |
| 7464 | "-mcpu=cyclone", |
| 7465 | "-mtune=generic", |
| 7466 | ], |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 7467 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7468 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7469 | deps = [ |
| 7470 | ":tables", |
| 7471 | "@FP16", |
| 7472 | "@pthreadpool", |
| 7473 | ], |
| 7474 | ) |
| 7475 | |
| 7476 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7477 | name = "neonv8_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7478 | hdrs = INTERNAL_HDRS, |
| 7479 | aarch32_copts = [ |
| 7480 | "-marm", |
| 7481 | "-march=armv8-a", |
| 7482 | "-mfpu=neon-fp-armv8", |
| 7483 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7484 | aarch32_srcs = PROD_NEONV8_MICROKERNEL_SRCS, |
| 7485 | aarch64_srcs = PROD_NEONV8_MICROKERNEL_SRCS, |
| 7486 | apple_aarch32_copts = [ |
| 7487 | "-mcpu=cyclone", |
| 7488 | "-mtune=generic", |
| 7489 | ], |
| 7490 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7491 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7492 | deps = [ |
| 7493 | ":tables", |
| 7494 | "@FP16", |
| 7495 | "@pthreadpool", |
| 7496 | ], |
| 7497 | ) |
| 7498 | |
| 7499 | xnnpack_cc_library( |
| 7500 | name = "neonv8_test_microkernels", |
| 7501 | hdrs = INTERNAL_HDRS, |
| 7502 | aarch32_copts = [ |
| 7503 | "-marm", |
| 7504 | "-march=armv8-a", |
| 7505 | "-mfpu=neon-fp-armv8", |
| 7506 | ], |
| 7507 | aarch32_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| 7508 | aarch64_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 7509 | apple_aarch32_copts = [ |
| 7510 | "-mcpu=cyclone", |
| 7511 | "-mtune=generic", |
| 7512 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7513 | copts = [ |
| 7514 | "-UNDEBUG", |
| 7515 | "-DXNN_TEST_MODE=1", |
| 7516 | ], |
| 7517 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7518 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7519 | deps = [ |
| 7520 | ":tables", |
| 7521 | "@FP16", |
| 7522 | "@pthreadpool", |
| 7523 | ], |
| 7524 | ) |
| 7525 | |
| 7526 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7527 | name = "neonfp16arith_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7528 | hdrs = INTERNAL_HDRS, |
| 7529 | aarch64_copts = ["-march=armv8.2-a+fp16"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7530 | aarch64_srcs = ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7531 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7532 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7533 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7534 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7535 | "@FP16", |
| 7536 | "@pthreadpool", |
| 7537 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7538 | ) |
| 7539 | |
| 7540 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7541 | name = "neonfp16arith_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7542 | hdrs = INTERNAL_HDRS, |
| 7543 | aarch64_copts = ["-march=armv8.2-a+fp16"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7544 | aarch64_srcs = PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| 7545 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7546 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7547 | deps = [ |
| 7548 | ":tables", |
| 7549 | "@FP16", |
| 7550 | "@pthreadpool", |
| 7551 | ], |
| 7552 | ) |
| 7553 | |
| 7554 | xnnpack_cc_library( |
| 7555 | name = "neonfp16arith_test_microkernels", |
| 7556 | hdrs = INTERNAL_HDRS, |
| 7557 | aarch64_copts = ["-march=armv8.2-a+fp16"], |
| 7558 | aarch64_srcs = ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7559 | copts = [ |
| 7560 | "-UNDEBUG", |
| 7561 | "-DXNN_TEST_MODE=1", |
| 7562 | ], |
| 7563 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7564 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7565 | deps = [ |
| 7566 | ":tables", |
| 7567 | "@FP16", |
| 7568 | "@pthreadpool", |
| 7569 | ], |
| 7570 | ) |
| 7571 | |
| 7572 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7573 | name = "neondot_bench_microkernels", |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7574 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 799ac75 | 2020-08-13 16:08:03 -0700 | [diff] [blame] | 7575 | aarch32_copts = [ |
| 7576 | "-marm", |
| 7577 | "-march=armv8.2-a+dotprod", |
| 7578 | "-mfpu=neon-fp-armv8", |
| 7579 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7580 | aarch32_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7581 | aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7582 | aarch64_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7583 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7584 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7585 | deps = [ |
| 7586 | ":tables", |
| 7587 | "@FP16", |
| 7588 | "@pthreadpool", |
| 7589 | ], |
| 7590 | ) |
| 7591 | |
| 7592 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7593 | name = "neondot_prod_microkernels", |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7594 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 799ac75 | 2020-08-13 16:08:03 -0700 | [diff] [blame] | 7595 | aarch32_copts = [ |
| 7596 | "-marm", |
| 7597 | "-march=armv8.2-a+dotprod", |
| 7598 | "-mfpu=neon-fp-armv8", |
| 7599 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7600 | aarch32_srcs = PROD_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7601 | aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7602 | aarch64_srcs = PROD_NEONDOT_MICROKERNEL_SRCS, |
| 7603 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7604 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7605 | deps = [ |
| 7606 | ":tables", |
| 7607 | "@FP16", |
| 7608 | "@pthreadpool", |
| 7609 | ], |
| 7610 | ) |
| 7611 | |
| 7612 | xnnpack_cc_library( |
| 7613 | name = "neondot_test_microkernels", |
| 7614 | hdrs = INTERNAL_HDRS, |
| 7615 | aarch32_copts = [ |
| 7616 | "-marm", |
| 7617 | "-march=armv8.2-a+dotprod", |
| 7618 | "-mfpu=neon-fp-armv8", |
| 7619 | ], |
| 7620 | aarch32_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| 7621 | aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| 7622 | aarch64_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7623 | copts = [ |
| 7624 | "-UNDEBUG", |
| 7625 | "-DXNN_TEST_MODE=1", |
| 7626 | ], |
| 7627 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7628 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7629 | deps = [ |
| 7630 | ":tables", |
| 7631 | "@FP16", |
| 7632 | "@pthreadpool", |
| 7633 | ], |
| 7634 | ) |
| 7635 | |
| 7636 | xnnpack_cc_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 7637 | name = "sse2_amalgam_microkernels", |
| 7638 | hdrs = INTERNAL_HDRS, |
| 7639 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7640 | gcc_x86_copts = ["-msse2"], |
| 7641 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7642 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7643 | x86_srcs = [ |
| 7644 | "src/amalgam/sse.c", |
| 7645 | "src/amalgam/sse2.c", |
| 7646 | ], |
| 7647 | deps = [ |
| 7648 | ":tables", |
| 7649 | "@FP16", |
| 7650 | "@pthreadpool", |
| 7651 | ], |
| 7652 | ) |
| 7653 | |
| 7654 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7655 | name = "sse2_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7656 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7657 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7658 | gcc_x86_copts = ["-msse2"], |
| 7659 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7660 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7661 | x86_srcs = ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7662 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7663 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7664 | "@FP16", |
| 7665 | "@pthreadpool", |
| 7666 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7667 | ) |
| 7668 | |
| 7669 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7670 | name = "sse2_prod_microkernels", |
| 7671 | hdrs = INTERNAL_HDRS, |
| 7672 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7673 | gcc_x86_copts = ["-msse2"], |
| 7674 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7675 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7676 | x86_srcs = PROD_SSE_MICROKERNEL_SRCS + PROD_SSE2_MICROKERNEL_SRCS, |
| 7677 | deps = [ |
| 7678 | ":tables", |
| 7679 | "@FP16", |
| 7680 | "@pthreadpool", |
| 7681 | ], |
| 7682 | ) |
| 7683 | |
| 7684 | xnnpack_cc_library( |
| 7685 | name = "sse2_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7686 | hdrs = INTERNAL_HDRS, |
| 7687 | copts = [ |
| 7688 | "-UNDEBUG", |
| 7689 | "-DXNN_TEST_MODE=1", |
| 7690 | ], |
| 7691 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7692 | gcc_x86_copts = ["-msse2"], |
| 7693 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7694 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7695 | x86_srcs = ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7696 | deps = [ |
| 7697 | ":tables", |
| 7698 | "@FP16", |
| 7699 | "@pthreadpool", |
| 7700 | ], |
| 7701 | ) |
| 7702 | |
| 7703 | xnnpack_cc_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 7704 | name = "ssse3_amalgam_microkernels", |
| 7705 | hdrs = INTERNAL_HDRS, |
| 7706 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7707 | gcc_x86_copts = ["-mssse3"], |
| 7708 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7709 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7710 | x86_srcs = ["src/amalgam/ssse3.c"], |
| 7711 | deps = [ |
| 7712 | ":tables", |
| 7713 | "@FP16", |
| 7714 | "@pthreadpool", |
| 7715 | ], |
| 7716 | ) |
| 7717 | |
| 7718 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7719 | name = "ssse3_bench_microkernels", |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 7720 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7721 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7722 | gcc_x86_copts = ["-mssse3"], |
| 7723 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7724 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7725 | x86_srcs = ALL_SSSE3_MICROKERNEL_SRCS, |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 7726 | deps = [ |
| 7727 | ":tables", |
| 7728 | "@FP16", |
| 7729 | "@pthreadpool", |
| 7730 | ], |
| 7731 | ) |
| 7732 | |
| 7733 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7734 | name = "ssse3_prod_microkernels", |
| 7735 | hdrs = INTERNAL_HDRS, |
| 7736 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7737 | gcc_x86_copts = ["-mssse3"], |
| 7738 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7739 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7740 | x86_srcs = PROD_SSSE3_MICROKERNEL_SRCS, |
| 7741 | deps = [ |
| 7742 | ":tables", |
| 7743 | "@FP16", |
| 7744 | "@pthreadpool", |
| 7745 | ], |
| 7746 | ) |
| 7747 | |
| 7748 | xnnpack_cc_library( |
| 7749 | name = "ssse3_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7750 | hdrs = INTERNAL_HDRS, |
| 7751 | copts = [ |
| 7752 | "-UNDEBUG", |
| 7753 | "-DXNN_TEST_MODE=1", |
| 7754 | ], |
| 7755 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7756 | gcc_x86_copts = ["-mssse3"], |
| 7757 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7758 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7759 | x86_srcs = ALL_SSSE3_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7760 | deps = [ |
| 7761 | ":tables", |
| 7762 | "@FP16", |
| 7763 | "@pthreadpool", |
| 7764 | ], |
| 7765 | ) |
| 7766 | |
| 7767 | xnnpack_cc_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 7768 | name = "sse41_amalgam_microkernels", |
| 7769 | hdrs = INTERNAL_HDRS, |
| 7770 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7771 | gcc_x86_copts = ["-msse4.1"], |
| 7772 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7773 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7774 | x86_srcs = ["src/amalgam/sse41.c"], |
| 7775 | deps = [ |
| 7776 | ":tables", |
| 7777 | "@FP16", |
| 7778 | "@pthreadpool", |
| 7779 | ], |
| 7780 | ) |
| 7781 | |
| 7782 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7783 | name = "sse41_bench_microkernels", |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 7784 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7785 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7786 | gcc_x86_copts = ["-msse4.1"], |
| 7787 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7788 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7789 | x86_srcs = ALL_SSE41_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7790 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7791 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7792 | "@FP16", |
| 7793 | "@pthreadpool", |
| 7794 | ], |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 7795 | ) |
| 7796 | |
| 7797 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7798 | name = "sse41_prod_microkernels", |
| 7799 | hdrs = INTERNAL_HDRS, |
| 7800 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7801 | gcc_x86_copts = ["-msse4.1"], |
| 7802 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7803 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7804 | x86_srcs = PROD_SSE41_MICROKERNEL_SRCS, |
| 7805 | deps = [ |
| 7806 | ":tables", |
| 7807 | "@FP16", |
| 7808 | "@pthreadpool", |
| 7809 | ], |
| 7810 | ) |
| 7811 | |
| 7812 | xnnpack_cc_library( |
| 7813 | name = "sse41_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7814 | hdrs = INTERNAL_HDRS, |
| 7815 | copts = [ |
| 7816 | "-UNDEBUG", |
| 7817 | "-DXNN_TEST_MODE=1", |
| 7818 | ], |
| 7819 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7820 | gcc_x86_copts = ["-msse4.1"], |
| 7821 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7822 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7823 | x86_srcs = ALL_SSE41_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7824 | deps = [ |
| 7825 | ":tables", |
| 7826 | "@FP16", |
| 7827 | "@pthreadpool", |
| 7828 | ], |
| 7829 | ) |
| 7830 | |
| 7831 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7832 | name = "avx_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7833 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7834 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7835 | gcc_x86_copts = ["-mavx"], |
| 7836 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7837 | msvc_x86_32_copts = ["/arch:AVX"], |
| 7838 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7839 | x86_srcs = ALL_AVX_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7840 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7841 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7842 | "@FP16", |
| 7843 | "@pthreadpool", |
| 7844 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7845 | ) |
| 7846 | |
| 7847 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7848 | name = "avx_prod_microkernels", |
| 7849 | hdrs = INTERNAL_HDRS, |
| 7850 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7851 | gcc_x86_copts = ["-mavx"], |
| 7852 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7853 | msvc_x86_32_copts = ["/arch:AVX"], |
| 7854 | msvc_x86_64_copts = ["/arch:AVX"], |
| 7855 | x86_srcs = PROD_AVX_MICROKERNEL_SRCS, |
| 7856 | deps = [ |
| 7857 | ":tables", |
| 7858 | "@FP16", |
| 7859 | "@pthreadpool", |
| 7860 | ], |
| 7861 | ) |
| 7862 | |
| 7863 | xnnpack_cc_library( |
| 7864 | name = "avx_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7865 | hdrs = INTERNAL_HDRS, |
| 7866 | copts = [ |
| 7867 | "-UNDEBUG", |
| 7868 | "-DXNN_TEST_MODE=1", |
| 7869 | ], |
| 7870 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7871 | gcc_x86_copts = ["-mavx"], |
| 7872 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7873 | msvc_x86_32_copts = ["/arch:AVX"], |
| 7874 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7875 | x86_srcs = ALL_AVX_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7876 | deps = [ |
| 7877 | ":tables", |
| 7878 | "@FP16", |
| 7879 | "@pthreadpool", |
| 7880 | ], |
| 7881 | ) |
| 7882 | |
| 7883 | xnnpack_cc_library( |
| Marat Dukhan | 68db12e | 2022-01-05 15:11:49 -0800 | [diff] [blame] | 7884 | name = "f16c_amalgam_microkernels", |
| 7885 | hdrs = INTERNAL_HDRS, |
| 7886 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7887 | gcc_x86_copts = ["-mf16c"], |
| 7888 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7889 | msvc_x86_32_copts = ["/arch:AVX"], |
| 7890 | msvc_x86_64_copts = ["/arch:AVX"], |
| 7891 | x86_srcs = ["src/amalgam/f16c.c"], |
| 7892 | deps = [ |
| 7893 | "@FP16", |
| 7894 | "@pthreadpool", |
| 7895 | ], |
| 7896 | ) |
| 7897 | |
| 7898 | xnnpack_cc_library( |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 7899 | name = "f16c_bench_microkernels", |
| 7900 | hdrs = INTERNAL_HDRS, |
| 7901 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7902 | gcc_x86_copts = ["-mf16c"], |
| 7903 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7904 | msvc_x86_32_copts = ["/arch:AVX"], |
| 7905 | msvc_x86_64_copts = ["/arch:AVX"], |
| 7906 | x86_srcs = ALL_F16C_MICROKERNEL_SRCS, |
| 7907 | deps = [ |
| 7908 | "@FP16", |
| 7909 | "@pthreadpool", |
| 7910 | ], |
| 7911 | ) |
| 7912 | |
| 7913 | xnnpack_cc_library( |
| 7914 | name = "f16c_prod_microkernels", |
| 7915 | hdrs = INTERNAL_HDRS, |
| 7916 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7917 | gcc_x86_copts = ["-mf16c"], |
| 7918 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7919 | msvc_x86_32_copts = ["/arch:AVX"], |
| 7920 | msvc_x86_64_copts = ["/arch:AVX"], |
| 7921 | x86_srcs = PROD_F16C_MICROKERNEL_SRCS, |
| 7922 | deps = [ |
| 7923 | "@FP16", |
| 7924 | "@pthreadpool", |
| 7925 | ], |
| 7926 | ) |
| 7927 | |
| 7928 | xnnpack_cc_library( |
| 7929 | name = "f16c_test_microkernels", |
| 7930 | hdrs = INTERNAL_HDRS, |
| 7931 | copts = [ |
| 7932 | "-UNDEBUG", |
| 7933 | "-DXNN_TEST_MODE=1", |
| 7934 | ], |
| 7935 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7936 | gcc_x86_copts = ["-mf16c"], |
| 7937 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7938 | msvc_x86_32_copts = ["/arch:AVX"], |
| 7939 | msvc_x86_64_copts = ["/arch:AVX"], |
| 7940 | x86_srcs = ALL_F16C_MICROKERNEL_SRCS, |
| 7941 | deps = [ |
| 7942 | "@FP16", |
| 7943 | "@pthreadpool", |
| 7944 | ], |
| 7945 | ) |
| 7946 | |
| 7947 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7948 | name = "xop_bench_microkernels", |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 7949 | hdrs = INTERNAL_HDRS, |
| 7950 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7951 | gcc_x86_copts = ["-mxop"], |
| 7952 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7953 | msvc_x86_32_copts = ["/arch:AVX"], |
| 7954 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7955 | x86_srcs = ALL_XOP_MICROKERNEL_SRCS, |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 7956 | deps = [ |
| 7957 | ":tables", |
| 7958 | "@FP16", |
| 7959 | "@pthreadpool", |
| 7960 | ], |
| 7961 | ) |
| 7962 | |
| 7963 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7964 | name = "xop_prod_microkernels", |
| 7965 | hdrs = INTERNAL_HDRS, |
| 7966 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7967 | gcc_x86_copts = ["-mxop"], |
| 7968 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7969 | msvc_x86_32_copts = ["/arch:AVX"], |
| 7970 | msvc_x86_64_copts = ["/arch:AVX"], |
| 7971 | x86_srcs = PROD_XOP_MICROKERNEL_SRCS, |
| 7972 | deps = [ |
| 7973 | ":tables", |
| 7974 | "@FP16", |
| 7975 | "@pthreadpool", |
| 7976 | ], |
| 7977 | ) |
| 7978 | |
| 7979 | xnnpack_cc_library( |
| 7980 | name = "xop_test_microkernels", |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 7981 | hdrs = INTERNAL_HDRS, |
| 7982 | copts = [ |
| 7983 | "-UNDEBUG", |
| 7984 | "-DXNN_TEST_MODE=1", |
| 7985 | ], |
| 7986 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7987 | gcc_x86_copts = ["-mxop"], |
| 7988 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7989 | msvc_x86_32_copts = ["/arch:AVX"], |
| 7990 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7991 | x86_srcs = ALL_XOP_MICROKERNEL_SRCS, |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 7992 | deps = [ |
| 7993 | ":tables", |
| 7994 | "@FP16", |
| 7995 | "@pthreadpool", |
| 7996 | ], |
| 7997 | ) |
| 7998 | |
| 7999 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8000 | name = "fma3_bench_microkernels", |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 8001 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8002 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8003 | gcc_x86_copts = ["-mfma"], |
| 8004 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8005 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8006 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8007 | x86_srcs = ALL_FMA3_MICROKERNEL_SRCS, |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 8008 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 8009 | ":tables", |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 8010 | "@FP16", |
| 8011 | "@pthreadpool", |
| 8012 | ], |
| 8013 | ) |
| 8014 | |
| 8015 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8016 | name = "fma3_prod_microkernels", |
| 8017 | hdrs = INTERNAL_HDRS, |
| 8018 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8019 | gcc_x86_copts = ["-mfma"], |
| 8020 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8021 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8022 | msvc_x86_64_copts = ["/arch:AVX"], |
| 8023 | x86_srcs = PROD_FMA3_MICROKERNEL_SRCS, |
| 8024 | deps = [ |
| 8025 | ":tables", |
| 8026 | "@FP16", |
| 8027 | "@pthreadpool", |
| 8028 | ], |
| 8029 | ) |
| 8030 | |
| 8031 | xnnpack_cc_library( |
| 8032 | name = "fma3_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8033 | hdrs = INTERNAL_HDRS, |
| 8034 | copts = [ |
| 8035 | "-UNDEBUG", |
| 8036 | "-DXNN_TEST_MODE=1", |
| 8037 | ], |
| 8038 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8039 | gcc_x86_copts = ["-mfma"], |
| 8040 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8041 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8042 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8043 | x86_srcs = ALL_FMA3_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8044 | deps = [ |
| 8045 | ":tables", |
| 8046 | "@FP16", |
| 8047 | "@pthreadpool", |
| 8048 | ], |
| 8049 | ) |
| 8050 | |
| 8051 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8052 | name = "avx2_bench_microkernels", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 8053 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8054 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8055 | gcc_x86_copts = [ |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 8056 | "-mfma", |
| 8057 | "-mavx2", |
| 8058 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8059 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8060 | msvc_x86_32_copts = ["/arch:AVX2"], |
| 8061 | msvc_x86_64_copts = ["/arch:AVX2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8062 | x86_srcs = ALL_AVX2_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8063 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 8064 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8065 | "@FP16", |
| 8066 | "@pthreadpool", |
| 8067 | ], |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 8068 | ) |
| 8069 | |
| 8070 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8071 | name = "avx2_prod_microkernels", |
| 8072 | hdrs = INTERNAL_HDRS, |
| 8073 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8074 | gcc_x86_copts = [ |
| 8075 | "-mfma", |
| 8076 | "-mavx2", |
| 8077 | ], |
| 8078 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8079 | msvc_x86_32_copts = ["/arch:AVX2"], |
| 8080 | msvc_x86_64_copts = ["/arch:AVX2"], |
| 8081 | x86_srcs = PROD_AVX2_MICROKERNEL_SRCS, |
| 8082 | deps = [ |
| 8083 | ":tables", |
| 8084 | "@FP16", |
| 8085 | "@pthreadpool", |
| 8086 | ], |
| 8087 | ) |
| 8088 | |
| 8089 | xnnpack_cc_library( |
| 8090 | name = "avx2_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8091 | hdrs = INTERNAL_HDRS, |
| 8092 | copts = [ |
| 8093 | "-UNDEBUG", |
| 8094 | "-DXNN_TEST_MODE=1", |
| 8095 | ], |
| 8096 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8097 | gcc_x86_copts = [ |
| 8098 | "-mfma", |
| 8099 | "-mavx2", |
| 8100 | ], |
| 8101 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8102 | msvc_x86_32_copts = ["/arch:AVX2"], |
| 8103 | msvc_x86_64_copts = ["/arch:AVX2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8104 | x86_srcs = ALL_AVX2_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8105 | deps = [ |
| 8106 | ":tables", |
| 8107 | "@FP16", |
| 8108 | "@pthreadpool", |
| 8109 | ], |
| 8110 | ) |
| 8111 | |
| 8112 | xnnpack_cc_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 8113 | name = "avx512f_amalgam_microkernels", |
| 8114 | hdrs = INTERNAL_HDRS, |
| 8115 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8116 | gcc_x86_copts = ["-mavx512f"], |
| 8117 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8118 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8119 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8120 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8121 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| 8122 | x86_srcs = ["src/amalgam/avx512f.c"], |
| 8123 | deps = [ |
| 8124 | ":tables", |
| 8125 | "@FP16", |
| 8126 | "@pthreadpool", |
| 8127 | ], |
| 8128 | ) |
| 8129 | |
| 8130 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8131 | name = "avx512f_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8132 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8133 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8134 | gcc_x86_copts = ["-mavx512f"], |
| 8135 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8136 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8137 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8138 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8139 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8140 | x86_srcs = ALL_AVX512F_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8141 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 8142 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8143 | "@FP16", |
| 8144 | "@pthreadpool", |
| 8145 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8146 | ) |
| 8147 | |
| 8148 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8149 | name = "avx512f_prod_microkernels", |
| 8150 | hdrs = INTERNAL_HDRS, |
| 8151 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8152 | gcc_x86_copts = ["-mavx512f"], |
| 8153 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8154 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8155 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8156 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8157 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| 8158 | x86_srcs = PROD_AVX512F_MICROKERNEL_SRCS, |
| 8159 | deps = [ |
| 8160 | ":tables", |
| 8161 | "@FP16", |
| 8162 | "@pthreadpool", |
| 8163 | ], |
| 8164 | ) |
| 8165 | |
| 8166 | xnnpack_cc_library( |
| 8167 | name = "avx512f_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8168 | hdrs = INTERNAL_HDRS, |
| 8169 | copts = [ |
| 8170 | "-UNDEBUG", |
| 8171 | "-DXNN_TEST_MODE=1", |
| 8172 | ], |
| 8173 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8174 | gcc_x86_copts = ["-mavx512f"], |
| 8175 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8176 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8177 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8178 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8179 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8180 | x86_srcs = ALL_AVX512F_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8181 | deps = [ |
| 8182 | ":tables", |
| 8183 | "@FP16", |
| 8184 | "@pthreadpool", |
| 8185 | ], |
| 8186 | ) |
| 8187 | |
| 8188 | xnnpack_cc_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 8189 | name = "avx512skx_amalgam_microkernels", |
| 8190 | hdrs = INTERNAL_HDRS, |
| 8191 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8192 | gcc_x86_copts = [ |
| 8193 | "-mavx512f", |
| 8194 | "-mavx512cd", |
| 8195 | "-mavx512bw", |
| 8196 | "-mavx512dq", |
| 8197 | "-mavx512vl", |
| 8198 | ], |
| 8199 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8200 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8201 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8202 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8203 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| 8204 | x86_srcs = ["src/amalgam/avx512skx.c"], |
| 8205 | deps = [ |
| 8206 | ":tables", |
| 8207 | "@FP16", |
| 8208 | "@pthreadpool", |
| 8209 | ], |
| 8210 | ) |
| 8211 | |
| 8212 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8213 | name = "avx512skx_bench_microkernels", |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 8214 | hdrs = INTERNAL_HDRS, |
| 8215 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8216 | gcc_x86_copts = [ |
| 8217 | "-mavx512f", |
| 8218 | "-mavx512cd", |
| 8219 | "-mavx512bw", |
| 8220 | "-mavx512dq", |
| 8221 | "-mavx512vl", |
| 8222 | ], |
| 8223 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8224 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8225 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8226 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8227 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8228 | x86_srcs = ALL_AVX512SKX_MICROKERNEL_SRCS, |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 8229 | deps = [ |
| 8230 | ":tables", |
| 8231 | "@FP16", |
| 8232 | "@pthreadpool", |
| 8233 | ], |
| 8234 | ) |
| 8235 | |
| 8236 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8237 | name = "avx512skx_prod_microkernels", |
| 8238 | hdrs = INTERNAL_HDRS, |
| 8239 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8240 | gcc_x86_copts = [ |
| 8241 | "-mavx512f", |
| 8242 | "-mavx512cd", |
| 8243 | "-mavx512bw", |
| 8244 | "-mavx512dq", |
| 8245 | "-mavx512vl", |
| 8246 | ], |
| 8247 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8248 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8249 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8250 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8251 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| 8252 | x86_srcs = PROD_AVX512SKX_MICROKERNEL_SRCS, |
| 8253 | deps = [ |
| 8254 | ":tables", |
| 8255 | "@FP16", |
| 8256 | "@pthreadpool", |
| 8257 | ], |
| 8258 | ) |
| 8259 | |
| 8260 | xnnpack_cc_library( |
| 8261 | name = "avx512skx_test_microkernels", |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 8262 | hdrs = INTERNAL_HDRS, |
| 8263 | copts = [ |
| 8264 | "-UNDEBUG", |
| 8265 | "-DXNN_TEST_MODE=1", |
| 8266 | ], |
| 8267 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8268 | gcc_x86_copts = [ |
| 8269 | "-mavx512f", |
| 8270 | "-mavx512cd", |
| 8271 | "-mavx512bw", |
| 8272 | "-mavx512dq", |
| 8273 | "-mavx512vl", |
| 8274 | ], |
| 8275 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8276 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8277 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8278 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8279 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8280 | x86_srcs = ALL_AVX512SKX_MICROKERNEL_SRCS, |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 8281 | deps = [ |
| 8282 | ":tables", |
| 8283 | "@FP16", |
| 8284 | "@pthreadpool", |
| 8285 | ], |
| 8286 | ) |
| 8287 | |
| 8288 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8289 | name = "asm_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8290 | hdrs = ["src/xnnpack/assembly.h"], |
| Frank Barchard | 9f3f420 | 2021-12-16 18:13:51 -0800 | [diff] [blame] | 8291 | aarch32_copts = [ |
| 8292 | "-marm", |
| 8293 | "-march=armv8.2-a+dotprod", |
| 8294 | "-mfpu=neon-fp-armv8", |
| 8295 | ], |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 8296 | aarch32_srcs = AARCH32_ASM_MICROKERNEL_SRCS, |
| Frank Barchard | 31bb45b | 2020-10-06 00:26:33 -0700 | [diff] [blame] | 8297 | aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"], |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 8298 | aarch64_srcs = AARCH64_ASM_MICROKERNEL_SRCS, |
| 8299 | wasm_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 8300 | wasmrelaxedsimd_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 8301 | wasmsimd_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8302 | ) |
| 8303 | |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8304 | xnnpack_cc_library( |
| 8305 | name = "logging_utils", |
| 8306 | srcs = LOGGING_SRCS, |
| 8307 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| 8308 | copts = LOGGING_COPTS + [ |
| 8309 | "-Isrc", |
| 8310 | "-Iinclude", |
| 8311 | ] + select({ |
| 8312 | ":debug_build": [], |
| 8313 | "//conditions:default": xnnpack_min_size_copts(), |
| 8314 | }), |
| 8315 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8316 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8317 | visibility = xnnpack_visibility(), |
| 8318 | deps = [ |
| 8319 | "@FP16", |
| 8320 | "@clog", |
| 8321 | "@pthreadpool", |
| 8322 | ], |
| 8323 | ) |
| 8324 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8325 | xnnpack_aggregate_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 8326 | name = "amalgam_microkernels", |
| 8327 | aarch32_ios_deps = [ |
| 8328 | ":neon_prod_microkernels", |
| 8329 | ":neonfp16_prod_microkernels", |
| 8330 | ":neonfma_prod_microkernels", |
| 8331 | ":neonv8_prod_microkernels", |
| 8332 | ":asm_microkernels", |
| 8333 | ], |
| 8334 | aarch32_nonios_deps = [ |
| 8335 | ":neon_prod_microkernels", |
| 8336 | ":neonfp16_prod_microkernels", |
| 8337 | ":neonfma_prod_microkernels", |
| 8338 | ":neonv8_prod_microkernels", |
| 8339 | ":neondot_prod_microkernels", |
| 8340 | ":asm_microkernels", |
| 8341 | ], |
| 8342 | aarch64_deps = [ |
| 8343 | ":neon_prod_microkernels", |
| 8344 | ":neonfp16_prod_microkernels", |
| 8345 | ":neonfma_prod_microkernels", |
| 8346 | ":neonv8_prod_microkernels", |
| 8347 | ":neonfp16arith_prod_microkernels", |
| 8348 | ":neondot_prod_microkernels", |
| 8349 | ":asm_microkernels", |
| 8350 | ], |
| 8351 | generic_deps = [ |
| 8352 | ":scalar_prod_microkernels", |
| 8353 | ], |
| 8354 | wasm_deps = [ |
| 8355 | ":wasm_prod_microkernels", |
| 8356 | ":asm_microkernels", |
| 8357 | ], |
| 8358 | wasmrelaxedsimd_deps = [ |
| 8359 | ":wasm_prod_microkernels", |
| 8360 | ":asm_microkernels", |
| 8361 | ], |
| 8362 | wasmsimd_deps = [ |
| 8363 | ":wasm_prod_microkernels", |
| 8364 | ":asm_microkernels", |
| 8365 | ], |
| 8366 | x86_deps = [ |
| 8367 | ":sse2_amalgam_microkernels", |
| 8368 | ":ssse3_amalgam_microkernels", |
| 8369 | ":sse41_amalgam_microkernels", |
| 8370 | ":avx_prod_microkernels", |
| Marat Dukhan | 68db12e | 2022-01-05 15:11:49 -0800 | [diff] [blame] | 8371 | ":f16c_amalgam_microkernels", |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 8372 | ":xop_prod_microkernels", |
| 8373 | ":fma3_prod_microkernels", |
| 8374 | ":avx2_prod_microkernels", |
| 8375 | ":avx512f_amalgam_microkernels", |
| 8376 | ":avx512skx_amalgam_microkernels", |
| 8377 | ], |
| 8378 | ) |
| 8379 | |
| 8380 | xnnpack_aggregate_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8381 | name = "bench_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 8382 | aarch32_ios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8383 | ":neon_bench_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8384 | ":neonfp16_bench_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8385 | ":neonfma_bench_microkernels", |
| 8386 | ":neonv8_bench_microkernels", |
| 8387 | ":asm_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 8388 | ], |
| 8389 | aarch32_nonios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8390 | ":neon_bench_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8391 | ":neonfp16_bench_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8392 | ":neonfma_bench_microkernels", |
| 8393 | ":neonv8_bench_microkernels", |
| 8394 | ":neondot_bench_microkernels", |
| 8395 | ":asm_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8396 | ], |
| 8397 | aarch64_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8398 | ":neon_bench_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8399 | ":neonfp16_bench_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8400 | ":neonfma_bench_microkernels", |
| 8401 | ":neonv8_bench_microkernels", |
| 8402 | ":neonfp16arith_bench_microkernels", |
| 8403 | ":neondot_bench_microkernels", |
| 8404 | ":asm_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8405 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8406 | generic_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8407 | ":scalar_bench_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8408 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8409 | wasm_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8410 | ":wasm_bench_microkernels", |
| 8411 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8412 | ], |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 8413 | wasmrelaxedsimd_deps = [ |
| 8414 | ":wasm_bench_microkernels", |
| 8415 | ":asm_microkernels", |
| 8416 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8417 | wasmsimd_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8418 | ":wasm_bench_microkernels", |
| 8419 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8420 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8421 | x86_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8422 | ":sse2_bench_microkernels", |
| 8423 | ":ssse3_bench_microkernels", |
| 8424 | ":sse41_bench_microkernels", |
| 8425 | ":avx_bench_microkernels", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 8426 | ":f16c_bench_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8427 | ":xop_bench_microkernels", |
| 8428 | ":fma3_bench_microkernels", |
| 8429 | ":avx2_bench_microkernels", |
| 8430 | ":avx512f_bench_microkernels", |
| 8431 | ":avx512skx_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8432 | ], |
| 8433 | ) |
| 8434 | |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8435 | xnnpack_aggregate_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8436 | name = "prod_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 8437 | aarch32_ios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8438 | ":neon_prod_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8439 | ":neonfp16_prod_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8440 | ":neonfma_prod_microkernels", |
| 8441 | ":neonv8_prod_microkernels", |
| 8442 | ":asm_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 8443 | ], |
| 8444 | aarch32_nonios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8445 | ":neon_prod_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8446 | ":neonfp16_prod_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8447 | ":neonfma_prod_microkernels", |
| 8448 | ":neonv8_prod_microkernels", |
| 8449 | ":neondot_prod_microkernels", |
| 8450 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8451 | ], |
| 8452 | aarch64_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8453 | ":neon_prod_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8454 | ":neonfp16_prod_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8455 | ":neonfma_prod_microkernels", |
| 8456 | ":neonv8_prod_microkernels", |
| 8457 | ":neonfp16arith_prod_microkernels", |
| 8458 | ":neondot_prod_microkernels", |
| 8459 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8460 | ], |
| 8461 | generic_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8462 | ":scalar_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8463 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8464 | wasm_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8465 | ":wasm_prod_microkernels", |
| 8466 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8467 | ], |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 8468 | wasmrelaxedsimd_deps = [ |
| 8469 | ":wasm_prod_microkernels", |
| 8470 | ":asm_microkernels", |
| 8471 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8472 | wasmsimd_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8473 | ":wasm_prod_microkernels", |
| 8474 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8475 | ], |
| 8476 | x86_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8477 | ":sse2_prod_microkernels", |
| 8478 | ":ssse3_prod_microkernels", |
| 8479 | ":sse41_prod_microkernels", |
| 8480 | ":avx_prod_microkernels", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 8481 | ":f16c_prod_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8482 | ":xop_prod_microkernels", |
| 8483 | ":fma3_prod_microkernels", |
| 8484 | ":avx2_prod_microkernels", |
| 8485 | ":avx512f_prod_microkernels", |
| 8486 | ":avx512skx_prod_microkernels", |
| 8487 | ], |
| 8488 | ) |
| 8489 | |
| 8490 | xnnpack_aggregate_library( |
| 8491 | name = "test_microkernels", |
| 8492 | aarch32_ios_deps = [ |
| 8493 | ":neon_test_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8494 | ":neonfp16_test_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8495 | ":neonfma_test_microkernels", |
| 8496 | ":neonv8_test_microkernels", |
| 8497 | ":asm_microkernels", |
| 8498 | ], |
| 8499 | aarch32_nonios_deps = [ |
| 8500 | ":neon_test_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8501 | ":neonfp16_test_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8502 | ":neonfma_test_microkernels", |
| 8503 | ":neonv8_test_microkernels", |
| 8504 | ":neondot_test_microkernels", |
| 8505 | ":asm_microkernels", |
| 8506 | ], |
| 8507 | aarch64_deps = [ |
| 8508 | ":neon_test_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8509 | ":neonfp16_test_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8510 | ":neonfma_test_microkernels", |
| 8511 | ":neonv8_test_microkernels", |
| 8512 | ":neonfp16arith_test_microkernels", |
| 8513 | ":neondot_test_microkernels", |
| 8514 | ":asm_microkernels", |
| 8515 | ], |
| 8516 | generic_deps = [ |
| 8517 | ":scalar_test_microkernels", |
| 8518 | ], |
| 8519 | wasm_deps = [ |
| 8520 | ":wasm_test_microkernels", |
| 8521 | ":asm_microkernels", |
| 8522 | ], |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 8523 | wasmrelaxedsimd_deps = [ |
| 8524 | ":wasm_test_microkernels", |
| 8525 | ":asm_microkernels", |
| 8526 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8527 | wasmsimd_deps = [ |
| 8528 | ":wasm_test_microkernels", |
| 8529 | ":asm_microkernels", |
| 8530 | ], |
| 8531 | x86_deps = [ |
| 8532 | ":sse2_test_microkernels", |
| 8533 | ":ssse3_test_microkernels", |
| 8534 | ":sse41_test_microkernels", |
| 8535 | ":avx_test_microkernels", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 8536 | ":f16c_test_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8537 | ":xop_test_microkernels", |
| 8538 | ":fma3_test_microkernels", |
| 8539 | ":avx2_test_microkernels", |
| 8540 | ":avx512f_test_microkernels", |
| 8541 | ":avx512skx_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8542 | ], |
| 8543 | ) |
| 8544 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8545 | xnnpack_cc_library( |
| 8546 | name = "im2col", |
| 8547 | srcs = ["src/im2col.c"], |
| 8548 | hdrs = [ |
| 8549 | "src/xnnpack/common.h", |
| 8550 | "src/xnnpack/im2col.h", |
| 8551 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8552 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8553 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8554 | ) |
| 8555 | |
| 8556 | xnnpack_cc_library( |
| 8557 | name = "indirection", |
| 8558 | srcs = ["src/indirection.c"], |
| 8559 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8560 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8561 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8562 | deps = [ |
| 8563 | "@FP16", |
| 8564 | "@FXdiv", |
| 8565 | "@pthreadpool", |
| 8566 | ], |
| 8567 | ) |
| 8568 | |
| 8569 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8570 | name = "indirection_test_mode", |
| 8571 | srcs = ["src/indirection.c"], |
| 8572 | hdrs = INTERNAL_HDRS, |
| 8573 | copts = [ |
| 8574 | "-UNDEBUG", |
| 8575 | "-DXNN_TEST_MODE=1", |
| 8576 | ], |
| 8577 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8578 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8579 | deps = [ |
| 8580 | "@FP16", |
| 8581 | "@FXdiv", |
| 8582 | "@pthreadpool", |
| 8583 | ], |
| 8584 | ) |
| 8585 | |
| 8586 | xnnpack_cc_library( |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8587 | name = "packing", |
| 8588 | srcs = ["src/packing.c"], |
| 8589 | hdrs = INTERNAL_HDRS, |
| 8590 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8591 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8592 | deps = [ |
| 8593 | "@FP16", |
| 8594 | "@FXdiv", |
| 8595 | "@pthreadpool", |
| 8596 | ], |
| 8597 | ) |
| 8598 | |
| 8599 | xnnpack_cc_library( |
| 8600 | name = "packing_test_mode", |
| 8601 | srcs = ["src/packing.c"], |
| 8602 | hdrs = INTERNAL_HDRS, |
| 8603 | copts = [ |
| 8604 | "-UNDEBUG", |
| 8605 | "-DXNN_TEST_MODE=1", |
| 8606 | ], |
| 8607 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8608 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8609 | deps = [ |
| 8610 | "@FP16", |
| 8611 | "@FXdiv", |
| 8612 | "@pthreadpool", |
| 8613 | ], |
| 8614 | ) |
| 8615 | |
| 8616 | xnnpack_cc_library( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8617 | name = "operator_run", |
| 8618 | srcs = ["src/operator-run.c"], |
| Marat Dukhan | c8e00eb | 2019-10-04 14:55:26 -0700 | [diff] [blame] | 8619 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8620 | copts = LOGGING_COPTS + select({ |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 8621 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 8622 | "//conditions:default": [], |
| 8623 | }), |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8624 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8625 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8626 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8627 | ":logging_utils", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8628 | "@FP16", |
| 8629 | "@FXdiv", |
| 8630 | "@clog", |
| 8631 | "@pthreadpool", |
| 8632 | ], |
| 8633 | ) |
| 8634 | |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 8635 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8636 | name = "operator_run_test_mode", |
| 8637 | srcs = ["src/operator-run.c"], |
| 8638 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| 8639 | copts = LOGGING_COPTS + [ |
| 8640 | "-UNDEBUG", |
| 8641 | "-DXNN_TEST_MODE=1", |
| 8642 | ] + select({ |
| 8643 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 8644 | "//conditions:default": [], |
| 8645 | }), |
| 8646 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8647 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8648 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8649 | ":logging_utils", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8650 | "@FP16", |
| 8651 | "@FXdiv", |
| 8652 | "@clog", |
| 8653 | "@pthreadpool", |
| 8654 | ], |
| 8655 | ) |
| 8656 | |
| 8657 | xnnpack_cc_library( |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 8658 | name = "memory_planner", |
| 8659 | srcs = ["src/memory-planner.c"], |
| 8660 | hdrs = INTERNAL_HDRS, |
| 8661 | defines = select({ |
| 8662 | ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"], |
| 8663 | ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"], |
| 8664 | "//conditions:default": ["XNN_ENABLE_MEMOPT=1"], |
| 8665 | }), |
| 8666 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8667 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8668 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8669 | ":logging_utils", |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 8670 | "@pthreadpool", |
| 8671 | ], |
| 8672 | ) |
| 8673 | |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8674 | xnnpack_cc_library( |
| 8675 | name = "memory_planner_test_mode", |
| 8676 | srcs = ["src/memory-planner.c"], |
| 8677 | hdrs = INTERNAL_HDRS, |
| 8678 | copts = [ |
| 8679 | "-UNDEBUG", |
| 8680 | "-DXNN_TEST_MODE=1", |
| 8681 | ], |
| 8682 | defines = select({ |
| 8683 | ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"], |
| 8684 | ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"], |
| 8685 | "//conditions:default": ["XNN_ENABLE_MEMOPT=1"], |
| 8686 | }), |
| 8687 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8688 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8689 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8690 | ":logging_utils", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8691 | "@pthreadpool", |
| 8692 | ], |
| 8693 | ) |
| 8694 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8695 | cc_library( |
| 8696 | name = "enable_assembly", |
| 8697 | defines = select({ |
| 8698 | ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"], |
| 8699 | ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"], |
| Frank Barchard | 810171d | 2019-10-10 10:34:51 -0700 | [diff] [blame] | 8700 | "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8701 | }), |
| 8702 | ) |
| 8703 | |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 8704 | cc_library( |
| 8705 | name = "enable_sparse", |
| 8706 | defines = select({ |
| 8707 | ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"], |
| 8708 | ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"], |
| Marat Dukhan | b36582b | 2020-12-08 11:16:28 -0800 | [diff] [blame] | 8709 | "//conditions:default": ["XNN_ENABLE_SPARSE=1"], |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 8710 | }), |
| 8711 | ) |
| 8712 | |
| Marat Dukhan | cf056b2 | 2019-10-07 10:26:29 -0700 | [diff] [blame] | 8713 | xnnpack_cc_library( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8714 | name = "operators", |
| 8715 | srcs = OPERATOR_SRCS + [ |
| Marat Dukhan | 496389f | 2021-04-07 15:47:12 -0700 | [diff] [blame] | 8716 | "src/allocator.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8717 | "src/operator-delete.c", |
| Marat Dukhan | cf056b2 | 2019-10-07 10:26:29 -0700 | [diff] [blame] | 8718 | ], |
| 8719 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8720 | copts = LOGGING_COPTS + [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8721 | "-Isrc", |
| 8722 | "-Iinclude", |
| 8723 | ] + select({ |
| 8724 | ":debug_build": [], |
| 8725 | "//conditions:default": xnnpack_min_size_copts(), |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 8726 | }) + select({ |
| 8727 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 8728 | "//conditions:default": [], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8729 | }), |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8730 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8731 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8732 | deps = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8733 | ":indirection", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8734 | ":logging_utils", |
| Marat Dukhan | 1b1b032 | 2021-09-27 14:23:23 -0700 | [diff] [blame] | 8735 | ":operator_run", |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8736 | ":packing", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8737 | "@FP16", |
| 8738 | "@FXdiv", |
| 8739 | "@clog", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8740 | "@pthreadpool", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8741 | ], |
| 8742 | ) |
| 8743 | |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8744 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8745 | name = "operators_test_mode", |
| 8746 | srcs = OPERATOR_SRCS + [ |
| Marat Dukhan | 496389f | 2021-04-07 15:47:12 -0700 | [diff] [blame] | 8747 | "src/allocator.c", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8748 | "src/operator-delete.c", |
| 8749 | ], |
| 8750 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| 8751 | copts = LOGGING_COPTS + [ |
| 8752 | "-Isrc", |
| 8753 | "-Iinclude", |
| 8754 | "-UNDEBUG", |
| 8755 | "-DXNN_TEST_MODE=1", |
| 8756 | ] + select({ |
| 8757 | ":debug_build": [], |
| 8758 | "//conditions:default": xnnpack_min_size_copts(), |
| 8759 | }) + select({ |
| 8760 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 8761 | "//conditions:default": [], |
| 8762 | }), |
| 8763 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8764 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8765 | deps = [ |
| 8766 | ":indirection_test_mode", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8767 | ":logging_utils", |
| Marat Dukhan | 1b1b032 | 2021-09-27 14:23:23 -0700 | [diff] [blame] | 8768 | ":operator_run_test_mode", |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8769 | ":packing_test_mode", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8770 | "@FP16", |
| 8771 | "@FXdiv", |
| 8772 | "@clog", |
| 8773 | "@pthreadpool", |
| 8774 | ], |
| 8775 | ) |
| 8776 | |
| 8777 | xnnpack_cc_library( |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 8778 | name = "jit", |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 8779 | srcs = [ |
| 8780 | "src/jit/aarch32-assembler.cc", |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 8781 | "src/jit/memory.c", |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 8782 | ], |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 8783 | hdrs = INTERNAL_HDRS + [ |
| 8784 | "src/xnnpack/aarch32-assembler.h", |
| 8785 | ], |
| Zhi An Ng | b43b47a | 2021-12-23 16:27:22 -0800 | [diff] [blame] | 8786 | aarch32_srcs = [ |
| 8787 | "src/f32-gemm/4x8-aarch32-neon-cortex-a55.cc", |
| 8788 | ], |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 8789 | copts = LOGGING_COPTS, |
| 8790 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8791 | deps = [ |
| 8792 | ":logging_utils", |
| 8793 | ], |
| 8794 | ) |
| 8795 | |
| 8796 | xnnpack_cc_library( |
| 8797 | name = "jit_test_mode", |
| 8798 | srcs = [ |
| 8799 | "src/jit/aarch32-assembler.cc", |
| 8800 | "src/jit/memory.c", |
| 8801 | ], |
| 8802 | hdrs = INTERNAL_HDRS + [ |
| 8803 | "src/xnnpack/aarch32-assembler.h", |
| 8804 | ], |
| 8805 | copts = LOGGING_COPTS + [ |
| 8806 | "-UNDEBUG", |
| 8807 | "-DXNN_TEST_MODE=1", |
| 8808 | ], |
| 8809 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8810 | deps = [ |
| 8811 | ":logging_utils", |
| 8812 | ], |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 8813 | ) |
| 8814 | |
| 8815 | xnnpack_cc_library( |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8816 | name = "XNNPACK", |
| 8817 | srcs = [ |
| 8818 | "src/init.c", |
| Marat Dukhan | ccfdbd1 | 2020-02-03 14:27:45 -0800 | [diff] [blame] | 8819 | "src/runtime.c", |
| 8820 | "src/subgraph.c", |
| 8821 | "src/tensor.c", |
| Marat Dukhan | f03da0d | 2020-06-10 16:00:20 -0700 | [diff] [blame] | 8822 | ] + SUBGRAPH_SRCS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8823 | hdrs = ["include/xnnpack.h"], |
| 8824 | copts = LOGGING_COPTS + [ |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8825 | "-Isrc", |
| 8826 | "-Iinclude", |
| 8827 | ] + select({ |
| 8828 | ":debug_build": [], |
| 8829 | "//conditions:default": xnnpack_min_size_copts(), |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 8830 | }) + select({ |
| 8831 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 8832 | "//conditions:default": [], |
| Marat Dukhan | 1ce78ab | 2021-09-03 17:37:51 -0700 | [diff] [blame] | 8833 | }) + select({ |
| 8834 | ":xnn_wasmsimd_version_m87": [ |
| 8835 | "-DXNN_WASMSIMD_VERSION=87", |
| 8836 | ], |
| 8837 | ":xnn_wasmsimd_version_m88": [ |
| 8838 | "-DXNN_WASMSIMD_VERSION=88", |
| 8839 | ], |
| 8840 | ":xnn_wasmsimd_version_m91": [ |
| 8841 | "-DXNN_WASMSIMD_VERSION=91", |
| 8842 | ], |
| 8843 | "//conditions:default": [ |
| 8844 | "-DXNN_WASMSIMD_VERSION=87", |
| 8845 | ], |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8846 | }), |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8847 | gcc_copts = xnnpack_gcc_std_copts(), |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8848 | includes = ["include"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8849 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8850 | visibility = xnnpack_visibility(), |
| 8851 | deps = [ |
| 8852 | ":enable_assembly", |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 8853 | ":enable_sparse", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8854 | ":logging_utils", |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 8855 | ":memory_planner", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8856 | ":operators", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8857 | ":prod_microkernels", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8858 | "@clog", |
| Marat Dukhan | ab2946c | 2020-05-21 20:04:13 -0700 | [diff] [blame] | 8859 | "@FP16", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8860 | "@pthreadpool", |
| Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 8861 | ] + select({ |
| 8862 | ":emscripten": [], |
| 8863 | "//conditions:default": ["@cpuinfo"], |
| 8864 | }), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8865 | ) |
| 8866 | |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8867 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8868 | name = "XNNPACK_test_mode", |
| 8869 | srcs = [ |
| 8870 | "src/init.c", |
| 8871 | "src/runtime.c", |
| 8872 | "src/subgraph.c", |
| 8873 | "src/tensor.c", |
| Marat Dukhan | f03da0d | 2020-06-10 16:00:20 -0700 | [diff] [blame] | 8874 | ] + SUBGRAPH_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8875 | hdrs = ["include/xnnpack.h"], |
| 8876 | copts = LOGGING_COPTS + [ |
| 8877 | "-Isrc", |
| 8878 | "-Iinclude", |
| 8879 | "-UNDEBUG", |
| 8880 | "-DXNN_TEST_MODE=1", |
| 8881 | ] + select({ |
| 8882 | ":debug_build": [], |
| 8883 | "//conditions:default": xnnpack_min_size_copts(), |
| 8884 | }) + select({ |
| 8885 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 8886 | "//conditions:default": [], |
| Marat Dukhan | 1ce78ab | 2021-09-03 17:37:51 -0700 | [diff] [blame] | 8887 | }) + select({ |
| 8888 | ":xnn_wasmsimd_version_m87": [ |
| 8889 | "-DXNN_WASMSIMD_VERSION=87", |
| 8890 | ], |
| 8891 | ":xnn_wasmsimd_version_m88": [ |
| 8892 | "-DXNN_WASMSIMD_VERSION=88", |
| 8893 | ], |
| 8894 | ":xnn_wasmsimd_version_m91": [ |
| 8895 | "-DXNN_WASMSIMD_VERSION=91", |
| 8896 | ], |
| 8897 | "//conditions:default": [ |
| 8898 | "-DXNN_WASMSIMD_VERSION=87", |
| 8899 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8900 | }), |
| 8901 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8902 | includes = ["include"], |
| 8903 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8904 | visibility = xnnpack_visibility(), |
| 8905 | deps = [ |
| 8906 | ":enable_assembly", |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 8907 | ":enable_sparse", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8908 | ":logging_utils", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8909 | ":memory_planner_test_mode", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8910 | ":operators_test_mode", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8911 | ":test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8912 | "@clog", |
| 8913 | "@FP16", |
| 8914 | "@pthreadpool", |
| 8915 | ] + select({ |
| 8916 | ":emscripten": [], |
| 8917 | "//conditions:default": ["@cpuinfo"], |
| 8918 | }), |
| 8919 | ) |
| 8920 | |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 8921 | # Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently |
| 8922 | # not used by the TensorFlow Lite XNNPACK delegate to minimize code size. |
| Marat Dukhan | ae046f5 | 2020-06-15 13:16:14 -0700 | [diff] [blame] | 8923 | xnnpack_cc_library( |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 8924 | name = "xnnpack_for_tflite", |
| 8925 | srcs = [ |
| 8926 | "src/init.c", |
| 8927 | "src/runtime.c", |
| 8928 | "src/subgraph.c", |
| 8929 | "src/tensor.c", |
| 8930 | ] + SUBGRAPH_SRCS, |
| 8931 | hdrs = ["include/xnnpack.h"], |
| 8932 | copts = LOGGING_COPTS + [ |
| 8933 | "-Isrc", |
| 8934 | "-Iinclude", |
| 8935 | ] + select({ |
| 8936 | ":debug_build": [], |
| 8937 | "//conditions:default": xnnpack_min_size_copts(), |
| 8938 | }) + select({ |
| 8939 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 8940 | "//conditions:default": [], |
| 8941 | }), |
| Marat Dukhan | 9e92451 | 2021-12-08 00:13:45 -0800 | [diff] [blame] | 8942 | defines = select({ |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 8943 | ":xnn_enable_qu8_explicit_true": [], |
| 8944 | ":xnn_enable_qu8_explicit_false": [ |
| 8945 | "XNN_NO_QU8_OPERATORS", |
| Marat Dukhan | 0d00baa | 2021-08-16 23:59:07 -0700 | [diff] [blame] | 8946 | "XNN_NO_U8_OPERATORS", |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 8947 | ], |
| Marat Dukhan | 6507b17 | 2021-08-19 03:23:40 -0700 | [diff] [blame] | 8948 | ":emscripten": [], |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 8949 | "//conditions:default": [ |
| 8950 | "XNN_NO_QU8_OPERATORS", |
| Marat Dukhan | 0d00baa | 2021-08-16 23:59:07 -0700 | [diff] [blame] | 8951 | "XNN_NO_U8_OPERATORS", |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 8952 | ], |
| Marat Dukhan | 189c1d0 | 2021-09-03 15:39:54 -0700 | [diff] [blame] | 8953 | }) + select({ |
| 8954 | ":xnn_wasmsimd_version_m87": [ |
| 8955 | "XNN_WASMSIMD_VERSION=87", |
| 8956 | ], |
| 8957 | ":xnn_wasmsimd_version_m88": [ |
| 8958 | "XNN_WASMSIMD_VERSION=88", |
| 8959 | ], |
| 8960 | ":xnn_wasmsimd_version_m91": [ |
| 8961 | "XNN_WASMSIMD_VERSION=91", |
| 8962 | ], |
| 8963 | "//conditions:default": [ |
| 8964 | "XNN_WASMSIMD_VERSION=87", |
| 8965 | ], |
| Marat Dukhan | b939cdb | 2021-03-30 18:51:51 -0700 | [diff] [blame] | 8966 | }), |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 8967 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8968 | includes = ["include"], |
| 8969 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8970 | visibility = xnnpack_visibility(), |
| 8971 | deps = [ |
| 8972 | ":enable_assembly", |
| 8973 | ":enable_sparse", |
| 8974 | ":logging_utils", |
| 8975 | ":memory_planner", |
| 8976 | ":operator_run", |
| 8977 | ":operators", |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 8978 | ":amalgam_microkernels", |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 8979 | "@clog", |
| 8980 | "@FP16", |
| 8981 | "@pthreadpool", |
| 8982 | ] + select({ |
| 8983 | ":emscripten": [], |
| 8984 | "//conditions:default": ["@cpuinfo"], |
| 8985 | }), |
| 8986 | ) |
| 8987 | |
| 8988 | # Specialized XNNPACK version for TensorFlow.js. Excludes operators currently |
| 8989 | # not used by the TensorFlow.js WebAssembly backend to minimize code size. |
| 8990 | xnnpack_cc_library( |
| 8991 | name = "xnnpack_for_tfjs", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8992 | srcs = [ |
| 8993 | "src/init.c", |
| 8994 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8995 | hdrs = ["include/xnnpack.h"], |
| 8996 | copts = LOGGING_COPTS + [ |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 8997 | "-Isrc", |
| 8998 | "-Iinclude", |
| 8999 | ] + select({ |
| 9000 | ":debug_build": [], |
| 9001 | "//conditions:default": xnnpack_min_size_copts(), |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 9002 | }) + select({ |
| 9003 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 9004 | "//conditions:default": [], |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9005 | }), |
| 9006 | defines = [ |
| Marat Dukhan | 16f1e1a | 2020-08-04 16:38:22 -0700 | [diff] [blame] | 9007 | "XNN_NO_QS8_OPERATORS", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9008 | "XNN_NO_QU8_OPERATORS", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 9009 | "XNN_NO_S8_OPERATORS", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9010 | "XNN_NO_U8_OPERATORS", |
| 9011 | "XNN_NO_X8_OPERATORS", |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9012 | "XNN_NO_NCHW_OPERATORS", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9013 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9014 | gcc_copts = xnnpack_gcc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9015 | includes = ["include"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9016 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9017 | visibility = xnnpack_visibility(), |
| 9018 | deps = [ |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9019 | ":enable_assembly", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 9020 | ":logging_utils", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9021 | ":operator_run", |
| 9022 | ":operators", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 9023 | ":prod_microkernels", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9024 | "@clog", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9025 | "@pthreadpool", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9026 | ] + select({ |
| 9027 | ":emscripten": [], |
| 9028 | "//conditions:default": ["@cpuinfo"], |
| 9029 | }), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9030 | ) |
| 9031 | |
| Marat Dukhan | cf056b2 | 2019-10-07 10:26:29 -0700 | [diff] [blame] | 9032 | xnnpack_cc_library( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9033 | name = "bench_utils", |
| 9034 | srcs = ["bench/utils.cc"], |
| 9035 | hdrs = ["bench/utils.h"], |
| Marat Dukhan | bad48fe | 2019-11-04 10:35:22 -0800 | [diff] [blame] | 9036 | deps = [ |
| 9037 | "@com_google_benchmark//:benchmark", |
| 9038 | "@cpuinfo", |
| 9039 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9040 | ) |
| 9041 | |
| Frank Barchard | 7e95597 | 2019-10-11 10:34:25 -0700 | [diff] [blame] | 9042 | ######################### Benchmarks for micro-kernels ######################### |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9043 | |
| 9044 | xnnpack_benchmark( |
| Marat Dukhan | 0744fa0 | 2021-07-26 22:56:27 -0700 | [diff] [blame] | 9045 | name = "qs8_dwconv_bench", |
| 9046 | srcs = [ |
| 9047 | "bench/dwconv.h", |
| 9048 | "bench/qs8-dwconv.cc", |
| 9049 | "src/xnnpack/AlignedAllocator.h", |
| 9050 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9051 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9052 | ":indirection", |
| 9053 | ":packing", |
| 9054 | ], |
| 9055 | ) |
| 9056 | |
| 9057 | xnnpack_benchmark( |
| Marat Dukhan | ad6f2dc | 2021-12-10 14:38:41 -0800 | [diff] [blame] | 9058 | name = "qs8_f32_vcvt_bench", |
| 9059 | srcs = [ |
| 9060 | "bench/qs8-f32-vcvt.cc", |
| 9061 | "src/xnnpack/AlignedAllocator.h", |
| 9062 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9063 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9064 | ) |
| 9065 | |
| 9066 | xnnpack_benchmark( |
| Marat Dukhan | 595e170 | 2020-07-31 10:12:52 -0700 | [diff] [blame] | 9067 | name = "qs8_gemm_bench", |
| 9068 | srcs = [ |
| 9069 | "bench/gemm.h", |
| 9070 | "bench/qs8-gemm.cc", |
| 9071 | "src/xnnpack/AlignedAllocator.h", |
| 9072 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Frank Barchard | 31328cb | 2020-10-12 11:55:18 -0700 | [diff] [blame] | 9073 | copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(), |
| 9074 | deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(), |
| Marat Dukhan | 595e170 | 2020-07-31 10:12:52 -0700 | [diff] [blame] | 9075 | ) |
| 9076 | |
| 9077 | xnnpack_benchmark( |
| Marat Dukhan | 56bdd4a | 2020-08-03 19:47:04 -0700 | [diff] [blame] | 9078 | name = "qs8_requantization_bench", |
| 9079 | srcs = [ |
| 9080 | "bench/qs8-requantization.cc", |
| Marat Dukhan | 56bdd4a | 2020-08-03 19:47:04 -0700 | [diff] [blame] | 9081 | "src/xnnpack/AlignedAllocator.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 9082 | "src/xnnpack/requantization-stubs.h", |
| Marat Dukhan | 56bdd4a | 2020-08-03 19:47:04 -0700 | [diff] [blame] | 9083 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9084 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9085 | ) |
| 9086 | |
| 9087 | xnnpack_benchmark( |
| Marat Dukhan | 83a8d2f | 2021-07-29 16:41:19 -0700 | [diff] [blame] | 9088 | name = "qs8_vadd_bench", |
| 9089 | srcs = [ |
| 9090 | "bench/qs8-vadd.cc", |
| 9091 | "src/xnnpack/AlignedAllocator.h", |
| 9092 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9093 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9094 | ) |
| 9095 | |
| 9096 | xnnpack_benchmark( |
| 9097 | name = "qs8_vaddc_bench", |
| 9098 | srcs = [ |
| 9099 | "bench/qs8-vaddc.cc", |
| 9100 | "src/xnnpack/AlignedAllocator.h", |
| 9101 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9102 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9103 | ) |
| 9104 | |
| 9105 | xnnpack_benchmark( |
| Marat Dukhan | 795e5ab | 2021-08-02 19:07:52 -0700 | [diff] [blame] | 9106 | name = "qs8_vmul_bench", |
| 9107 | srcs = [ |
| 9108 | "bench/qs8-vmul.cc", |
| 9109 | "src/xnnpack/AlignedAllocator.h", |
| 9110 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9111 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9112 | ) |
| 9113 | |
| 9114 | xnnpack_benchmark( |
| Marat Dukhan | 8b024c9 | 2021-08-03 00:05:14 -0700 | [diff] [blame] | 9115 | name = "qs8_vmulc_bench", |
| 9116 | srcs = [ |
| 9117 | "bench/qs8-vmulc.cc", |
| 9118 | "src/xnnpack/AlignedAllocator.h", |
| 9119 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9120 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9121 | ) |
| 9122 | |
| 9123 | xnnpack_benchmark( |
| Marat Dukhan | ad6f2dc | 2021-12-10 14:38:41 -0800 | [diff] [blame] | 9124 | name = "qu8_f32_vcvt_bench", |
| 9125 | srcs = [ |
| 9126 | "bench/qu8-f32-vcvt.cc", |
| 9127 | "src/xnnpack/AlignedAllocator.h", |
| 9128 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9129 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9130 | ) |
| 9131 | |
| 9132 | xnnpack_benchmark( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9133 | name = "qu8_gemm_bench", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9134 | srcs = [ |
| 9135 | "bench/gemm.h", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9136 | "bench/qu8-gemm.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9137 | "src/xnnpack/AlignedAllocator.h", |
| 9138 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9139 | copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(), |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9140 | deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9141 | ) |
| 9142 | |
| 9143 | xnnpack_benchmark( |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 9144 | name = "qu8_requantization_bench", |
| 9145 | srcs = [ |
| 9146 | "bench/qu8-requantization.cc", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 9147 | "src/xnnpack/AlignedAllocator.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 9148 | "src/xnnpack/requantization-stubs.h", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 9149 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9150 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9151 | ) |
| 9152 | |
| 9153 | xnnpack_benchmark( |
| Marat Dukhan | 1ef9de8 | 2021-07-29 17:15:33 -0700 | [diff] [blame] | 9154 | name = "qu8_vadd_bench", |
| 9155 | srcs = [ |
| 9156 | "bench/qu8-vadd.cc", |
| 9157 | "src/xnnpack/AlignedAllocator.h", |
| 9158 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9159 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9160 | ) |
| 9161 | |
| 9162 | xnnpack_benchmark( |
| 9163 | name = "qu8_vaddc_bench", |
| 9164 | srcs = [ |
| 9165 | "bench/qu8-vaddc.cc", |
| 9166 | "src/xnnpack/AlignedAllocator.h", |
| 9167 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9168 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9169 | ) |
| 9170 | |
| 9171 | xnnpack_benchmark( |
| Marat Dukhan | 795e5ab | 2021-08-02 19:07:52 -0700 | [diff] [blame] | 9172 | name = "qu8_vmul_bench", |
| 9173 | srcs = [ |
| 9174 | "bench/qu8-vmul.cc", |
| 9175 | "src/xnnpack/AlignedAllocator.h", |
| 9176 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9177 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9178 | ) |
| 9179 | |
| 9180 | xnnpack_benchmark( |
| Marat Dukhan | 8b024c9 | 2021-08-03 00:05:14 -0700 | [diff] [blame] | 9181 | name = "qu8_vmulc_bench", |
| 9182 | srcs = [ |
| 9183 | "bench/qu8-vmulc.cc", |
| 9184 | "src/xnnpack/AlignedAllocator.h", |
| 9185 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9186 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9187 | ) |
| 9188 | |
| 9189 | xnnpack_benchmark( |
| Frank Barchard | 40d20fe | 2020-05-05 00:37:45 -0700 | [diff] [blame] | 9190 | name = "f16_igemm_bench", |
| 9191 | srcs = [ |
| 9192 | "bench/f16-igemm.cc", |
| 9193 | "bench/conv.h", |
| Frank Barchard | 40d20fe | 2020-05-05 00:37:45 -0700 | [diff] [blame] | 9194 | "src/xnnpack/AlignedAllocator.h", |
| 9195 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9196 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9197 | ":indirection", |
| 9198 | ":packing", |
| 9199 | ], |
| Frank Barchard | 40d20fe | 2020-05-05 00:37:45 -0700 | [diff] [blame] | 9200 | ) |
| 9201 | |
| 9202 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9203 | name = "f16_gemm_bench", |
| 9204 | srcs = [ |
| 9205 | "bench/f16-gemm.cc", |
| 9206 | "bench/gemm.h", |
| 9207 | "src/xnnpack/AlignedAllocator.h", |
| 9208 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9209 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9210 | ":packing", |
| 9211 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9212 | ) |
| 9213 | |
| 9214 | xnnpack_benchmark( |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 9215 | name = "f16_spmm_bench", |
| 9216 | srcs = [ |
| 9217 | "bench/f16-spmm.cc", |
| Marat Dukhan | 1631e3e | 2020-12-06 19:29:31 -0800 | [diff] [blame] | 9218 | "bench/spmm.h", |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 9219 | "src/xnnpack/AlignedAllocator.h", |
| 9220 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 9221 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9222 | ) |
| 9223 | |
| 9224 | xnnpack_benchmark( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 9225 | name = "f16_vrelu_bench", |
| 9226 | srcs = [ |
| 9227 | "bench/f16-vrelu.cc", |
| 9228 | "src/xnnpack/AlignedAllocator.h", |
| 9229 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9230 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9231 | ) |
| 9232 | |
| 9233 | xnnpack_benchmark( |
| Marat Dukhan | 434352f | 2021-10-16 18:28:55 -0700 | [diff] [blame] | 9234 | name = "f16_f32_vcvt_bench", |
| 9235 | srcs = [ |
| 9236 | "bench/f16-f32-vcvt.cc", |
| 9237 | "src/xnnpack/AlignedAllocator.h", |
| 9238 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9239 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9240 | ) |
| 9241 | |
| 9242 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9243 | name = "f32_igemm_bench", |
| 9244 | srcs = [ |
| 9245 | "bench/f32-igemm.cc", |
| 9246 | "bench/conv.h", |
| 9247 | "src/xnnpack/AlignedAllocator.h", |
| 9248 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9249 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9250 | ":indirection", |
| 9251 | ":packing", |
| 9252 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9253 | ) |
| 9254 | |
| 9255 | xnnpack_benchmark( |
| 9256 | name = "f32_conv_hwc_bench", |
| 9257 | srcs = [ |
| 9258 | "bench/f32-conv-hwc.cc", |
| 9259 | "bench/dconv.h", |
| 9260 | "src/xnnpack/AlignedAllocator.h", |
| 9261 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9262 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9263 | ":packing", |
| 9264 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9265 | ) |
| 9266 | |
| 9267 | xnnpack_benchmark( |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 9268 | name = "f32_conv_hwc2chw_bench", |
| Erich Elsen | 563df5f | 2019-10-23 08:02:21 -0700 | [diff] [blame] | 9269 | srcs = [ |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 9270 | "bench/f32-conv-hwc2chw.cc", |
| Erich Elsen | 563df5f | 2019-10-23 08:02:21 -0700 | [diff] [blame] | 9271 | "bench/dconv.h", |
| 9272 | "src/xnnpack/AlignedAllocator.h", |
| 9273 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9274 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9275 | ":packing", |
| 9276 | ], |
| Erich Elsen | 563df5f | 2019-10-23 08:02:21 -0700 | [diff] [blame] | 9277 | ) |
| 9278 | |
| 9279 | xnnpack_benchmark( |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 9280 | name = "f16_dwconv_bench", |
| 9281 | srcs = [ |
| 9282 | "bench/f16-dwconv.cc", |
| 9283 | "bench/dwconv.h", |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 9284 | "src/xnnpack/AlignedAllocator.h", |
| 9285 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9286 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9287 | ":indirection", |
| 9288 | ":packing", |
| 9289 | ], |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 9290 | ) |
| 9291 | |
| 9292 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9293 | name = "f32_dwconv_bench", |
| 9294 | srcs = [ |
| 9295 | "bench/f32-dwconv.cc", |
| 9296 | "bench/dwconv.h", |
| 9297 | "src/xnnpack/AlignedAllocator.h", |
| 9298 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9299 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9300 | ":indirection", |
| 9301 | ":packing", |
| 9302 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9303 | ) |
| 9304 | |
| 9305 | xnnpack_benchmark( |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9306 | name = "f32_dwconv2d_chw_bench", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9307 | srcs = [ |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9308 | "bench/f32-dwconv2d-chw.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9309 | "bench/dwconv.h", |
| 9310 | "src/xnnpack/AlignedAllocator.h", |
| 9311 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9312 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9313 | ":indirection", |
| 9314 | ":packing", |
| 9315 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9316 | ) |
| 9317 | |
| 9318 | xnnpack_benchmark( |
| Marat Dukhan | d77f77d | 2021-10-24 15:39:59 -0700 | [diff] [blame] | 9319 | name = "f32_f16_vcvt_bench", |
| 9320 | srcs = [ |
| 9321 | "bench/f32-f16-vcvt.cc", |
| 9322 | "src/xnnpack/AlignedAllocator.h", |
| 9323 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9324 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9325 | ) |
| 9326 | |
| 9327 | xnnpack_benchmark( |
| Alan Kelly | 1945f0b | 2021-12-24 01:26:45 -0800 | [diff] [blame] | 9328 | name = "x16_transpose_bench", |
| 9329 | srcs = [ |
| 9330 | "bench/x16-transpose.cc", |
| 9331 | "src/xnnpack/AlignedAllocator.h", |
| 9332 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9333 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9334 | ) |
| 9335 | |
| 9336 | xnnpack_benchmark( |
| Alan Kelly | fda06cb | 2021-12-15 03:30:32 -0800 | [diff] [blame] | 9337 | name = "x32_transpose_bench", |
| 9338 | srcs = [ |
| 9339 | "bench/x32-transpose.cc", |
| 9340 | "src/xnnpack/AlignedAllocator.h", |
| 9341 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9342 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9343 | ) |
| 9344 | |
| 9345 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9346 | name = "f32_gemm_bench", |
| 9347 | srcs = [ |
| 9348 | "bench/f32-gemm.cc", |
| 9349 | "bench/gemm.h", |
| 9350 | "src/xnnpack/AlignedAllocator.h", |
| 9351 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9352 | copts = xnnpack_optional_ruy_copts(), |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9353 | deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9354 | ) |
| 9355 | |
| 9356 | xnnpack_benchmark( |
| Marat Dukhan | 563eee1 | 2021-12-02 14:44:25 -0800 | [diff] [blame] | 9357 | name = "f32_qs8_vcvt_bench", |
| 9358 | srcs = [ |
| 9359 | "bench/f32-qs8-vcvt.cc", |
| 9360 | "src/xnnpack/AlignedAllocator.h", |
| 9361 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9362 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9363 | ) |
| 9364 | |
| 9365 | xnnpack_benchmark( |
| 9366 | name = "f32_qu8_vcvt_bench", |
| 9367 | srcs = [ |
| 9368 | "bench/f32-qu8-vcvt.cc", |
| 9369 | "src/xnnpack/AlignedAllocator.h", |
| 9370 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9371 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9372 | ) |
| 9373 | |
| 9374 | xnnpack_benchmark( |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 9375 | name = "f32_raddexpminusmax_bench", |
| 9376 | srcs = [ |
| 9377 | "bench/f32-raddexpminusmax.cc", |
| 9378 | "src/xnnpack/AlignedAllocator.h", |
| 9379 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9380 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9381 | ) |
| 9382 | |
| 9383 | xnnpack_benchmark( |
| 9384 | name = "f32_raddextexp_bench", |
| 9385 | srcs = [ |
| 9386 | "bench/f32-raddextexp.cc", |
| 9387 | "src/xnnpack/AlignedAllocator.h", |
| 9388 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9389 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9390 | ) |
| 9391 | |
| 9392 | xnnpack_benchmark( |
| 9393 | name = "f32_raddstoreexpminusmax_bench", |
| 9394 | srcs = [ |
| 9395 | "bench/f32-raddstoreexpminusmax.cc", |
| 9396 | "src/xnnpack/AlignedAllocator.h", |
| 9397 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9398 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9399 | ) |
| 9400 | |
| 9401 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9402 | name = "f32_rmax_bench", |
| 9403 | srcs = [ |
| 9404 | "bench/f32-rmax.cc", |
| 9405 | "src/xnnpack/AlignedAllocator.h", |
| 9406 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9407 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9408 | ) |
| 9409 | |
| 9410 | xnnpack_benchmark( |
| 9411 | name = "f32_spmm_bench", |
| 9412 | srcs = [ |
| 9413 | "bench/f32-spmm.cc", |
| Marat Dukhan | 1631e3e | 2020-12-06 19:29:31 -0800 | [diff] [blame] | 9414 | "bench/spmm.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9415 | "src/xnnpack/AlignedAllocator.h", |
| 9416 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9417 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9418 | ) |
| 9419 | |
| 9420 | xnnpack_benchmark( |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 9421 | name = "f32_softmax_bench", |
| Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 9422 | srcs = [ |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 9423 | "bench/f32-softmax.cc", |
| Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 9424 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9425 | copts = xnnpack_optional_dnnl_copts(), |
| Marat Dukhan | 8d3c693 | 2020-03-06 20:27:27 -0800 | [diff] [blame] | 9426 | deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(), |
| Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 9427 | ) |
| 9428 | |
| 9429 | xnnpack_benchmark( |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9430 | name = "f32_velu_bench", |
| 9431 | srcs = [ |
| 9432 | "bench/f32-velu.cc", |
| 9433 | "src/xnnpack/AlignedAllocator.h", |
| 9434 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9435 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9436 | ) |
| 9437 | |
| 9438 | xnnpack_benchmark( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 9439 | name = "f32_vhswish_bench", |
| 9440 | srcs = [ |
| 9441 | "bench/f32-vhswish.cc", |
| 9442 | "src/xnnpack/AlignedAllocator.h", |
| 9443 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9444 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9445 | ) |
| 9446 | |
| 9447 | xnnpack_benchmark( |
| Marat Dukhan | 7c74aff | 2021-08-07 15:44:27 -0700 | [diff] [blame] | 9448 | name = "f32_vlrelu_bench", |
| 9449 | srcs = [ |
| 9450 | "bench/f32-vlrelu.cc", |
| 9451 | "src/xnnpack/AlignedAllocator.h", |
| 9452 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9453 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9454 | ) |
| 9455 | |
| 9456 | xnnpack_benchmark( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 9457 | name = "f32_vrelu_bench", |
| 9458 | srcs = [ |
| 9459 | "bench/f32-vrelu.cc", |
| 9460 | "src/xnnpack/AlignedAllocator.h", |
| 9461 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9462 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9463 | ) |
| 9464 | |
| 9465 | xnnpack_benchmark( |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 9466 | name = "f32_vscaleexpminusmax_bench", |
| 9467 | srcs = [ |
| 9468 | "bench/f32-vscaleexpminusmax.cc", |
| 9469 | "src/xnnpack/AlignedAllocator.h", |
| 9470 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9471 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9472 | ) |
| 9473 | |
| 9474 | xnnpack_benchmark( |
| 9475 | name = "f32_vscaleextexp_bench", |
| 9476 | srcs = [ |
| 9477 | "bench/f32-vscaleextexp.cc", |
| 9478 | "src/xnnpack/AlignedAllocator.h", |
| 9479 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9480 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9481 | ) |
| 9482 | |
| 9483 | xnnpack_benchmark( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 9484 | name = "f32_vsigmoid_bench", |
| 9485 | srcs = [ |
| 9486 | "bench/f32-vsigmoid.cc", |
| 9487 | "src/xnnpack/AlignedAllocator.h", |
| 9488 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9489 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9490 | ) |
| 9491 | |
| 9492 | xnnpack_benchmark( |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 9493 | name = "f32_vsqrt_bench", |
| 9494 | srcs = [ |
| 9495 | "bench/f32-vsqrt.cc", |
| 9496 | "src/xnnpack/AlignedAllocator.h", |
| 9497 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9498 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9499 | ) |
| 9500 | |
| 9501 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9502 | name = "f32_im2col_gemm_bench", |
| 9503 | srcs = [ |
| 9504 | "bench/f32-im2col-gemm.cc", |
| 9505 | "bench/conv.h", |
| 9506 | "src/xnnpack/AlignedAllocator.h", |
| 9507 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9508 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9509 | ":im2col", |
| 9510 | ":packing", |
| 9511 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9512 | ) |
| 9513 | |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 9514 | xnnpack_benchmark( |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 9515 | name = "rounding_bench", |
| 9516 | srcs = [ |
| 9517 | "bench/rounding.cc", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 9518 | "src/xnnpack/AlignedAllocator.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 9519 | "src/xnnpack/math-stubs.h", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 9520 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9521 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9522 | ) |
| 9523 | |
| Marat Dukhan | 5407437 | 2021-09-08 23:28:46 -0700 | [diff] [blame] | 9524 | xnnpack_benchmark( |
| 9525 | name = "x8_lut_bench", |
| 9526 | srcs = [ |
| 9527 | "bench/x8-lut.cc", |
| 9528 | "src/xnnpack/AlignedAllocator.h", |
| 9529 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9530 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9531 | ) |
| 9532 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9533 | ########################### Benchmarks for operators ########################### |
| 9534 | |
| 9535 | xnnpack_benchmark( |
| Marat Dukhan | 3ddc20c | 2021-12-31 10:15:28 -0800 | [diff] [blame] | 9536 | name = "abs_bench", |
| 9537 | srcs = ["bench/abs.cc"], |
| 9538 | copts = xnnpack_optional_tflite_copts(), |
| 9539 | tags = ["nowin32"], |
| 9540 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9541 | ) |
| 9542 | |
| 9543 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9544 | name = "average_pooling_bench", |
| 9545 | srcs = ["bench/average-pooling.cc"], |
| Marat Dukhan | 7a16d8b | 2020-03-11 04:22:44 -0700 | [diff] [blame] | 9546 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 9547 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9548 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9549 | ) |
| 9550 | |
| 9551 | xnnpack_benchmark( |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 9552 | name = "bankers_rounding_bench", |
| 9553 | srcs = ["bench/bankers-rounding.cc"], |
| 9554 | copts = xnnpack_optional_tflite_copts(), |
| 9555 | tags = ["nowin32"], |
| 9556 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9557 | ) |
| 9558 | |
| 9559 | xnnpack_benchmark( |
| 9560 | name = "ceiling_bench", |
| 9561 | srcs = ["bench/ceiling.cc"], |
| 9562 | copts = xnnpack_optional_tflite_copts(), |
| 9563 | tags = ["nowin32"], |
| 9564 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9565 | ) |
| 9566 | |
| 9567 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9568 | name = "channel_shuffle_bench", |
| 9569 | srcs = ["bench/channel-shuffle.cc"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9570 | deps = OPERATOR_BENCHMARK_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9571 | ) |
| 9572 | |
| 9573 | xnnpack_benchmark( |
| Marat Dukhan | 710fb42 | 2021-12-13 16:32:26 -0800 | [diff] [blame] | 9574 | name = "convert_bench", |
| 9575 | srcs = [ |
| 9576 | "bench/convert.cc", |
| 9577 | ], |
| 9578 | copts = xnnpack_optional_tflite_copts(), |
| 9579 | tags = ["nowin32"], |
| 9580 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9581 | ) |
| 9582 | |
| 9583 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9584 | name = "convolution_bench", |
| 9585 | srcs = ["bench/convolution.cc"], |
| 9586 | copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 9587 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9588 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9589 | ) |
| 9590 | |
| 9591 | xnnpack_benchmark( |
| 9592 | name = "deconvolution_bench", |
| 9593 | srcs = ["bench/deconvolution.cc"], |
| 9594 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 9595 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9596 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9597 | ) |
| 9598 | |
| 9599 | xnnpack_benchmark( |
| Marat Dukhan | b6bd4bc | 2020-12-01 17:01:40 -0800 | [diff] [blame] | 9600 | name = "elu_bench", |
| 9601 | srcs = ["bench/elu.cc"], |
| 9602 | copts = xnnpack_optional_tflite_copts(), |
| 9603 | tags = ["nowin32"], |
| 9604 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9605 | ) |
| 9606 | |
| 9607 | xnnpack_benchmark( |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 9608 | name = "floor_bench", |
| 9609 | srcs = ["bench/floor.cc"], |
| 9610 | copts = xnnpack_optional_tflite_copts(), |
| 9611 | tags = ["nowin32"], |
| 9612 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9613 | ) |
| 9614 | |
| 9615 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9616 | name = "global_average_pooling_bench", |
| 9617 | srcs = ["bench/global-average-pooling.cc"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9618 | deps = OPERATOR_BENCHMARK_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9619 | ) |
| 9620 | |
| 9621 | xnnpack_benchmark( |
| Marat Dukhan | ad35260 | 2020-06-25 21:50:54 -0700 | [diff] [blame] | 9622 | name = "hardswish_bench", |
| 9623 | srcs = ["bench/hardswish.cc"], |
| 9624 | copts = xnnpack_optional_tflite_copts(), |
| 9625 | tags = ["nowin32"], |
| 9626 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9627 | ) |
| 9628 | |
| 9629 | xnnpack_benchmark( |
| Marat Dukhan | 5c7fd89 | 2021-12-30 16:04:23 -0800 | [diff] [blame] | 9630 | name = "leaky_relu_bench", |
| 9631 | srcs = ["bench/leaky-relu.cc"], |
| 9632 | copts = xnnpack_optional_tflite_copts(), |
| 9633 | tags = ["nowin32"], |
| 9634 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9635 | ) |
| 9636 | |
| 9637 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9638 | name = "max_pooling_bench", |
| 9639 | srcs = ["bench/max-pooling.cc"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9640 | deps = OPERATOR_BENCHMARK_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9641 | ) |
| 9642 | |
| 9643 | xnnpack_benchmark( |
| Marat Dukhan | 3ddc20c | 2021-12-31 10:15:28 -0800 | [diff] [blame] | 9644 | name = "negate_bench", |
| 9645 | srcs = ["bench/negate.cc"], |
| 9646 | copts = xnnpack_optional_tflite_copts(), |
| 9647 | tags = ["nowin32"], |
| 9648 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9649 | ) |
| 9650 | |
| 9651 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9652 | name = "sigmoid_bench", |
| 9653 | srcs = ["bench/sigmoid.cc"], |
| Marat Dukhan | c3b9e86 | 2019-11-17 13:18:54 -0800 | [diff] [blame] | 9654 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | ca2ba70 | 2020-04-24 01:31:47 -0700 | [diff] [blame] | 9655 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9656 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9657 | ) |
| 9658 | |
| 9659 | xnnpack_benchmark( |
| Marat Dukhan | 95b2243 | 2019-10-30 16:30:14 -0700 | [diff] [blame] | 9660 | name = "prelu_bench", |
| 9661 | srcs = ["bench/prelu.cc"], |
| 9662 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 9663 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9664 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 95b2243 | 2019-10-30 16:30:14 -0700 | [diff] [blame] | 9665 | ) |
| 9666 | |
| 9667 | xnnpack_benchmark( |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 9668 | name = "softmax_bench", |
| 9669 | srcs = ["bench/softmax.cc"], |
| Marat Dukhan | 9c0db96 | 2020-01-28 12:30:14 -0800 | [diff] [blame] | 9670 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | ca2ba70 | 2020-04-24 01:31:47 -0700 | [diff] [blame] | 9671 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9672 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9673 | ) |
| 9674 | |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 9675 | xnnpack_benchmark( |
| Marat Dukhan | 3ddc20c | 2021-12-31 10:15:28 -0800 | [diff] [blame] | 9676 | name = "square_bench", |
| 9677 | srcs = ["bench/square.cc"], |
| 9678 | copts = xnnpack_optional_tflite_copts(), |
| 9679 | tags = ["nowin32"], |
| 9680 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9681 | ) |
| 9682 | |
| 9683 | xnnpack_benchmark( |
| Marat Dukhan | 6804bbd | 2020-06-30 19:26:11 -0700 | [diff] [blame] | 9684 | name = "square_root_bench", |
| 9685 | srcs = ["bench/square-root.cc"], |
| 9686 | copts = xnnpack_optional_tflite_copts(), |
| 9687 | tags = ["nowin32"], |
| 9688 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9689 | ) |
| 9690 | |
| 9691 | xnnpack_benchmark( |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 9692 | name = "truncation_bench", |
| 9693 | srcs = ["bench/truncation.cc"], |
| 9694 | deps = OPERATOR_BENCHMARK_DEPS, |
| 9695 | ) |
| 9696 | |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 9697 | ############################# End-to-end benchmarks ############################ |
| 9698 | |
| 9699 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 9700 | name = "fp32_mobilenet_v1", |
| 9701 | srcs = ["models/fp32-mobilenet-v1.cc"], |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 9702 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 9703 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 9704 | linkstatic = True, |
| 9705 | deps = [ |
| 9706 | ":XNNPACK", |
| 9707 | "@pthreadpool", |
| 9708 | ], |
| 9709 | ) |
| 9710 | |
| 9711 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 9712 | name = "fp32_sparse_mobilenet_v1", |
| 9713 | srcs = ["models/fp32-sparse-mobilenet-v1.cc"], |
| 9714 | hdrs = ["models/models.h"], |
| 9715 | copts = xnnpack_std_cxxopts(), |
| 9716 | linkstatic = True, |
| 9717 | deps = [ |
| 9718 | ":XNNPACK", |
| 9719 | "@pthreadpool", |
| 9720 | ], |
| 9721 | ) |
| 9722 | |
| 9723 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 9724 | name = "fp16_mobilenet_v1", |
| 9725 | srcs = ["models/fp16-mobilenet-v1.cc"], |
| 9726 | hdrs = ["models/models.h"], |
| 9727 | copts = xnnpack_std_cxxopts(), |
| 9728 | linkstatic = True, |
| 9729 | deps = [ |
| 9730 | ":XNNPACK", |
| 9731 | "@FP16", |
| 9732 | "@pthreadpool", |
| 9733 | ], |
| 9734 | ) |
| 9735 | |
| 9736 | cc_library( |
| Marat Dukhan | e252f92 | 2021-08-31 08:57:41 -0700 | [diff] [blame] | 9737 | name = "qc8_mobilenet_v1", |
| 9738 | srcs = ["models/qc8-mobilenet-v1.cc"], |
| 9739 | hdrs = ["models/models.h"], |
| 9740 | copts = xnnpack_std_cxxopts(), |
| 9741 | linkstatic = True, |
| 9742 | deps = [ |
| 9743 | ":XNNPACK", |
| 9744 | "@pthreadpool", |
| 9745 | ], |
| 9746 | ) |
| 9747 | |
| 9748 | cc_library( |
| 9749 | name = "qc8_mobilenet_v2", |
| 9750 | srcs = ["models/qc8-mobilenet-v2.cc"], |
| 9751 | hdrs = ["models/models.h"], |
| 9752 | copts = xnnpack_std_cxxopts(), |
| 9753 | linkstatic = True, |
| 9754 | deps = [ |
| 9755 | ":XNNPACK", |
| 9756 | "@pthreadpool", |
| 9757 | ], |
| 9758 | ) |
| 9759 | |
| 9760 | cc_library( |
| Marat Dukhan | 0743cdf | 2020-08-04 18:52:07 -0700 | [diff] [blame] | 9761 | name = "qs8_mobilenet_v1", |
| 9762 | srcs = ["models/qs8-mobilenet-v1.cc"], |
| 9763 | hdrs = ["models/models.h"], |
| 9764 | copts = xnnpack_std_cxxopts(), |
| 9765 | linkstatic = True, |
| 9766 | deps = [ |
| 9767 | ":XNNPACK", |
| 9768 | "@pthreadpool", |
| 9769 | ], |
| 9770 | ) |
| 9771 | |
| 9772 | cc_library( |
| Marat Dukhan | 70a9618 | 2020-09-03 17:13:58 -0700 | [diff] [blame] | 9773 | name = "qs8_mobilenet_v2", |
| 9774 | srcs = ["models/qs8-mobilenet-v2.cc"], |
| 9775 | hdrs = ["models/models.h"], |
| 9776 | copts = xnnpack_std_cxxopts(), |
| 9777 | linkstatic = True, |
| 9778 | deps = [ |
| 9779 | ":XNNPACK", |
| 9780 | "@pthreadpool", |
| 9781 | ], |
| 9782 | ) |
| 9783 | |
| 9784 | cc_library( |
| Marat Dukhan | 12a23bb | 2021-03-08 08:13:21 -0800 | [diff] [blame] | 9785 | name = "qu8_mobilenet_v1", |
| 9786 | srcs = ["models/qu8-mobilenet-v1.cc"], |
| 9787 | hdrs = ["models/models.h"], |
| 9788 | copts = xnnpack_std_cxxopts(), |
| 9789 | linkstatic = True, |
| 9790 | deps = [ |
| 9791 | ":XNNPACK", |
| 9792 | "@pthreadpool", |
| 9793 | ], |
| 9794 | ) |
| 9795 | |
| 9796 | cc_library( |
| Marat Dukhan | 036b2b1 | 2021-07-21 01:12:58 -0700 | [diff] [blame] | 9797 | name = "qu8_mobilenet_v2", |
| 9798 | srcs = ["models/qu8-mobilenet-v2.cc"], |
| 9799 | hdrs = ["models/models.h"], |
| 9800 | copts = xnnpack_std_cxxopts(), |
| 9801 | linkstatic = True, |
| 9802 | deps = [ |
| 9803 | ":XNNPACK", |
| 9804 | "@pthreadpool", |
| 9805 | ], |
| 9806 | ) |
| 9807 | |
| 9808 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 9809 | name = "fp32_mobilenet_v2", |
| 9810 | srcs = ["models/fp32-mobilenet-v2.cc"], |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 9811 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 9812 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 9813 | linkstatic = True, |
| 9814 | deps = [ |
| 9815 | ":XNNPACK", |
| 9816 | "@pthreadpool", |
| 9817 | ], |
| 9818 | ) |
| 9819 | |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 9820 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 9821 | name = "fp32_sparse_mobilenet_v2", |
| 9822 | srcs = ["models/fp32-sparse-mobilenet-v2.cc"], |
| 9823 | hdrs = ["models/models.h"], |
| 9824 | copts = xnnpack_std_cxxopts(), |
| 9825 | linkstatic = True, |
| 9826 | deps = [ |
| 9827 | ":XNNPACK", |
| 9828 | "@pthreadpool", |
| 9829 | ], |
| 9830 | ) |
| 9831 | |
| 9832 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 9833 | name = "fp16_mobilenet_v2", |
| 9834 | srcs = ["models/fp16-mobilenet-v2.cc"], |
| 9835 | hdrs = ["models/models.h"], |
| 9836 | copts = xnnpack_std_cxxopts(), |
| 9837 | linkstatic = True, |
| 9838 | deps = [ |
| 9839 | ":XNNPACK", |
| 9840 | "@FP16", |
| 9841 | "@pthreadpool", |
| 9842 | ], |
| 9843 | ) |
| 9844 | |
| 9845 | cc_library( |
| 9846 | name = "fp32_mobilenet_v3_large", |
| 9847 | srcs = ["models/fp32-mobilenet-v3-large.cc"], |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 9848 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 9849 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 9850 | linkstatic = True, |
| 9851 | deps = [ |
| 9852 | ":XNNPACK", |
| 9853 | "@pthreadpool", |
| 9854 | ], |
| 9855 | ) |
| 9856 | |
| 9857 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 9858 | name = "fp32_sparse_mobilenet_v3_large", |
| 9859 | srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"], |
| 9860 | hdrs = ["models/models.h"], |
| 9861 | copts = xnnpack_std_cxxopts(), |
| 9862 | linkstatic = True, |
| 9863 | deps = [ |
| 9864 | ":XNNPACK", |
| 9865 | "@pthreadpool", |
| 9866 | ], |
| 9867 | ) |
| 9868 | |
| 9869 | cc_library( |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 9870 | name = "fp16_mobilenet_v3_large", |
| 9871 | srcs = ["models/fp16-mobilenet-v3-large.cc"], |
| 9872 | hdrs = ["models/models.h"], |
| 9873 | copts = xnnpack_std_cxxopts(), |
| 9874 | linkstatic = True, |
| 9875 | deps = [ |
| 9876 | ":XNNPACK", |
| 9877 | "@FP16", |
| 9878 | "@pthreadpool", |
| 9879 | ], |
| 9880 | ) |
| 9881 | |
| 9882 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 9883 | name = "fp32_mobilenet_v3_small", |
| 9884 | srcs = ["models/fp32-mobilenet-v3-small.cc"], |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 9885 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 9886 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 9887 | linkstatic = True, |
| 9888 | deps = [ |
| 9889 | ":XNNPACK", |
| 9890 | "@pthreadpool", |
| 9891 | ], |
| 9892 | ) |
| 9893 | |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 9894 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 9895 | name = "fp32_sparse_mobilenet_v3_small", |
| 9896 | srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"], |
| 9897 | hdrs = ["models/models.h"], |
| 9898 | copts = xnnpack_std_cxxopts(), |
| 9899 | linkstatic = True, |
| 9900 | deps = [ |
| 9901 | ":XNNPACK", |
| 9902 | "@pthreadpool", |
| 9903 | ], |
| 9904 | ) |
| 9905 | |
| 9906 | cc_library( |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 9907 | name = "fp16_mobilenet_v3_small", |
| 9908 | srcs = ["models/fp16-mobilenet-v3-small.cc"], |
| 9909 | hdrs = ["models/models.h"], |
| 9910 | copts = xnnpack_std_cxxopts(), |
| 9911 | linkstatic = True, |
| 9912 | deps = [ |
| 9913 | ":XNNPACK", |
| 9914 | "@FP16", |
| 9915 | "@pthreadpool", |
| 9916 | ], |
| 9917 | ) |
| 9918 | |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 9919 | xnnpack_benchmark( |
| Marat Dukhan | ef4416e | 2019-10-31 13:44:40 -0700 | [diff] [blame] | 9920 | name = "f32_dwconv_e2e_bench", |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 9921 | srcs = [ |
| 9922 | "bench/f32-dwconv-e2e.cc", |
| 9923 | "bench/end2end.h", |
| 9924 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ef4416e | 2019-10-31 13:44:40 -0700 | [diff] [blame] | 9925 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9926 | ":XNNPACK", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 9927 | ":fp32_mobilenet_v1", |
| 9928 | ":fp32_mobilenet_v2", |
| 9929 | ":fp32_mobilenet_v3_large", |
| 9930 | ":fp32_mobilenet_v3_small", |
| Marat Dukhan | ef4416e | 2019-10-31 13:44:40 -0700 | [diff] [blame] | 9931 | ], |
| 9932 | ) |
| 9933 | |
| 9934 | xnnpack_benchmark( |
| Marat Dukhan | 5f18d26 | 2019-10-31 10:24:14 -0700 | [diff] [blame] | 9935 | name = "f32_gemm_e2e_bench", |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 9936 | srcs = [ |
| 9937 | "bench/f32-gemm-e2e.cc", |
| 9938 | "bench/end2end.h", |
| 9939 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 5f18d26 | 2019-10-31 10:24:14 -0700 | [diff] [blame] | 9940 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9941 | ":XNNPACK", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 9942 | ":fp32_mobilenet_v1", |
| 9943 | ":fp32_mobilenet_v2", |
| 9944 | ":fp32_mobilenet_v3_large", |
| 9945 | ":fp32_mobilenet_v3_small", |
| Marat Dukhan | 5f18d26 | 2019-10-31 10:24:14 -0700 | [diff] [blame] | 9946 | ], |
| 9947 | ) |
| 9948 | |
| 9949 | xnnpack_benchmark( |
| Marat Dukhan | bbfc6d3 | 2021-07-26 18:31:02 -0700 | [diff] [blame] | 9950 | name = "qs8_dwconv_e2e_bench", |
| 9951 | srcs = [ |
| 9952 | "bench/qs8-dwconv-e2e.cc", |
| 9953 | "bench/end2end.h", |
| 9954 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9955 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9956 | ":XNNPACK", |
| 9957 | ":qs8_mobilenet_v1", |
| 9958 | ":qs8_mobilenet_v2", |
| 9959 | ], |
| 9960 | ) |
| 9961 | |
| 9962 | xnnpack_benchmark( |
| Frank Barchard | dc909cb | 2021-02-08 13:59:31 -0800 | [diff] [blame] | 9963 | name = "qs8_gemm_e2e_bench", |
| 9964 | srcs = [ |
| 9965 | "bench/qs8-gemm-e2e.cc", |
| 9966 | "bench/end2end.h", |
| 9967 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9968 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9969 | ":XNNPACK", |
| 9970 | ":qs8_mobilenet_v1", |
| 9971 | ":qs8_mobilenet_v2", |
| 9972 | ], |
| 9973 | ) |
| 9974 | |
| 9975 | xnnpack_benchmark( |
| Frank Barchard | 9098aba | 2021-08-12 12:20:03 -0700 | [diff] [blame] | 9976 | name = "qu8_gemm_e2e_bench", |
| 9977 | srcs = [ |
| 9978 | "bench/qu8-gemm-e2e.cc", |
| 9979 | "bench/end2end.h", |
| 9980 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9981 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9982 | ":XNNPACK", |
| 9983 | ":qu8_mobilenet_v1", |
| 9984 | ":qu8_mobilenet_v2", |
| 9985 | ], |
| 9986 | ) |
| 9987 | |
| 9988 | xnnpack_benchmark( |
| Marat Dukhan | 6084fb8 | 2021-07-27 07:45:02 -0700 | [diff] [blame] | 9989 | name = "qu8_dwconv_e2e_bench", |
| 9990 | srcs = [ |
| 9991 | "bench/qu8-dwconv-e2e.cc", |
| 9992 | "bench/end2end.h", |
| 9993 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9994 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9995 | ":XNNPACK", |
| 9996 | ":qu8_mobilenet_v1", |
| 9997 | ":qu8_mobilenet_v2", |
| 9998 | ], |
| 9999 | ) |
| 10000 | |
| 10001 | xnnpack_benchmark( |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 10002 | name = "end2end_bench", |
| 10003 | srcs = ["bench/end2end.cc"], |
| 10004 | deps = [ |
| 10005 | ":XNNPACK", |
| Frank Barchard | c712fa4 | 2019-10-31 14:00:21 -0700 | [diff] [blame] | 10006 | ":bench_utils", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10007 | ":fp16_mobilenet_v1", |
| 10008 | ":fp16_mobilenet_v2", |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 10009 | ":fp16_mobilenet_v3_large", |
| 10010 | ":fp16_mobilenet_v3_small", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10011 | ":fp32_mobilenet_v1", |
| 10012 | ":fp32_mobilenet_v2", |
| 10013 | ":fp32_mobilenet_v3_large", |
| 10014 | ":fp32_mobilenet_v3_small", |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 10015 | ":fp32_sparse_mobilenet_v1", |
| 10016 | ":fp32_sparse_mobilenet_v2", |
| 10017 | ":fp32_sparse_mobilenet_v3_large", |
| 10018 | ":fp32_sparse_mobilenet_v3_small", |
| Marat Dukhan | e252f92 | 2021-08-31 08:57:41 -0700 | [diff] [blame] | 10019 | ":qc8_mobilenet_v1", |
| 10020 | ":qc8_mobilenet_v2", |
| Marat Dukhan | 0743cdf | 2020-08-04 18:52:07 -0700 | [diff] [blame] | 10021 | ":qs8_mobilenet_v1", |
| Marat Dukhan | 70a9618 | 2020-09-03 17:13:58 -0700 | [diff] [blame] | 10022 | ":qs8_mobilenet_v2", |
| Marat Dukhan | 12a23bb | 2021-03-08 08:13:21 -0800 | [diff] [blame] | 10023 | ":qu8_mobilenet_v1", |
| Marat Dukhan | 036b2b1 | 2021-07-21 01:12:58 -0700 | [diff] [blame] | 10024 | ":qu8_mobilenet_v2", |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 10025 | "@pthreadpool", |
| 10026 | ], |
| 10027 | ) |
| 10028 | |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 10029 | #################### Accuracy evaluation for math functions #################### |
| 10030 | |
| 10031 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10032 | name = "f32_exp_ulp_eval", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 10033 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10034 | "eval/f32-exp-ulp.cc", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 10035 | "src/xnnpack/AlignedAllocator.h", |
| 10036 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 10037 | deps = ACCURACY_EVAL_DEPS + [ |
| 10038 | ":bench_utils", |
| 10039 | "@cpuinfo", |
| 10040 | ], |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 10041 | ) |
| 10042 | |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 10043 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10044 | name = "f32_expminus_ulp_eval", |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 10045 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10046 | "eval/f32-expminus-ulp.cc", |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 10047 | "src/xnnpack/AlignedAllocator.h", |
| 10048 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 10049 | deps = ACCURACY_EVAL_DEPS + [ |
| 10050 | ":bench_utils", |
| 10051 | "@cpuinfo", |
| 10052 | ], |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 10053 | ) |
| 10054 | |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 10055 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10056 | name = "f32_expm1minus_ulp_eval", |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 10057 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10058 | "eval/f32-expm1minus-ulp.cc", |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 10059 | "src/xnnpack/AlignedAllocator.h", |
| 10060 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 10061 | deps = ACCURACY_EVAL_DEPS + [ |
| 10062 | ":bench_utils", |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 10063 | "@cpuinfo", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 10064 | ], |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 10065 | ) |
| 10066 | |
| 10067 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10068 | name = "f32_extexp_ulp_eval", |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 10069 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10070 | "eval/f32-extexp-ulp.cc", |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 10071 | "src/xnnpack/AlignedAllocator.h", |
| 10072 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 10073 | deps = ACCURACY_EVAL_DEPS + [ |
| 10074 | ":bench_utils", |
| 10075 | "@cpuinfo", |
| 10076 | ], |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 10077 | ) |
| 10078 | |
| Marat Dukhan | f44f022 | 2020-12-14 11:53:27 -0800 | [diff] [blame] | 10079 | xnnpack_benchmark( |
| 10080 | name = "f32_sigmoid_ulp_eval", |
| 10081 | srcs = [ |
| 10082 | "eval/f32-sigmoid-ulp.cc", |
| 10083 | "src/xnnpack/AlignedAllocator.h", |
| 10084 | ] + ACCURACY_EVAL_HDRS, |
| 10085 | deps = ACCURACY_EVAL_DEPS + [ |
| 10086 | ":bench_utils", |
| 10087 | "@cpuinfo", |
| 10088 | ], |
| 10089 | ) |
| 10090 | |
| 10091 | xnnpack_benchmark( |
| 10092 | name = "f32_sqrt_ulp_eval", |
| 10093 | srcs = [ |
| 10094 | "eval/f32-sqrt-ulp.cc", |
| 10095 | "src/xnnpack/AlignedAllocator.h", |
| 10096 | ] + ACCURACY_EVAL_HDRS, |
| 10097 | deps = ACCURACY_EVAL_DEPS + [ |
| 10098 | ":bench_utils", |
| 10099 | "@cpuinfo", |
| 10100 | ], |
| 10101 | ) |
| 10102 | |
| 10103 | ################### Accuracy verification for math functions ################## |
| 10104 | |
| 10105 | xnnpack_unit_test( |
| Marat Dukhan | 3ed866b | 2021-09-29 08:23:33 -0700 | [diff] [blame] | 10106 | name = "f16_f32_cvt_eval", |
| 10107 | srcs = [ |
| 10108 | "eval/f16-f32-cvt.cc", |
| 10109 | "src/xnnpack/AlignedAllocator.h", |
| 10110 | "src/xnnpack/math-stubs.h", |
| 10111 | ] + MICROKERNEL_TEST_HDRS, |
| 10112 | automatic = False, |
| 10113 | deps = MICROKERNEL_TEST_DEPS, |
| 10114 | ) |
| 10115 | |
| 10116 | xnnpack_unit_test( |
| Marat Dukhan | 582e184 | 2021-10-25 17:18:36 -0700 | [diff] [blame] | 10117 | name = "f32_f16_cvt_eval", |
| 10118 | srcs = [ |
| 10119 | "eval/f32-f16-cvt.cc", |
| 10120 | "src/xnnpack/AlignedAllocator.h", |
| 10121 | "src/xnnpack/math-stubs.h", |
| 10122 | ] + MICROKERNEL_TEST_HDRS, |
| 10123 | automatic = False, |
| 10124 | deps = MICROKERNEL_TEST_DEPS, |
| 10125 | ) |
| 10126 | |
| 10127 | xnnpack_unit_test( |
| Marat Dukhan | d24301d | 2021-12-02 00:13:45 -0800 | [diff] [blame] | 10128 | name = "f32_qs8_cvt_eval", |
| 10129 | srcs = [ |
| 10130 | "eval/f32-qs8-cvt.cc", |
| 10131 | "src/xnnpack/AlignedAllocator.h", |
| 10132 | "src/xnnpack/math-stubs.h", |
| 10133 | ] + MICROKERNEL_TEST_HDRS, |
| 10134 | automatic = False, |
| 10135 | deps = MICROKERNEL_TEST_DEPS, |
| 10136 | ) |
| 10137 | |
| 10138 | xnnpack_unit_test( |
| 10139 | name = "f32_qu8_cvt_eval", |
| 10140 | srcs = [ |
| 10141 | "eval/f32-qu8-cvt.cc", |
| 10142 | "src/xnnpack/AlignedAllocator.h", |
| 10143 | "src/xnnpack/math-stubs.h", |
| 10144 | ] + MICROKERNEL_TEST_HDRS, |
| 10145 | automatic = False, |
| 10146 | deps = MICROKERNEL_TEST_DEPS, |
| 10147 | ) |
| 10148 | |
| 10149 | xnnpack_unit_test( |
| Marat Dukhan | f7291fc | 2020-12-15 11:02:50 -0800 | [diff] [blame] | 10150 | name = "f32_exp_eval", |
| 10151 | srcs = [ |
| 10152 | "eval/f32-exp.cc", |
| 10153 | "src/xnnpack/AlignedAllocator.h", |
| 10154 | "src/xnnpack/math-stubs.h", |
| 10155 | ] + MICROKERNEL_TEST_HDRS, |
| 10156 | automatic = False, |
| 10157 | deps = MICROKERNEL_TEST_DEPS, |
| 10158 | ) |
| 10159 | |
| 10160 | xnnpack_unit_test( |
| Marat Dukhan | f44f022 | 2020-12-14 11:53:27 -0800 | [diff] [blame] | 10161 | name = "f32_expm1minus_eval", |
| 10162 | srcs = [ |
| 10163 | "eval/f32-expm1minus.cc", |
| 10164 | "src/xnnpack/AlignedAllocator.h", |
| 10165 | "src/xnnpack/math-stubs.h", |
| 10166 | ] + MICROKERNEL_TEST_HDRS, |
| 10167 | automatic = False, |
| 10168 | deps = MICROKERNEL_TEST_DEPS, |
| 10169 | ) |
| 10170 | |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 10171 | xnnpack_unit_test( |
| Marat Dukhan | d28a5a2 | 2020-12-14 15:27:22 -0800 | [diff] [blame] | 10172 | name = "f32_expminus_eval", |
| 10173 | srcs = [ |
| 10174 | "eval/f32-expminus.cc", |
| 10175 | "src/xnnpack/AlignedAllocator.h", |
| 10176 | "src/xnnpack/math-stubs.h", |
| 10177 | ] + MICROKERNEL_TEST_HDRS, |
| 10178 | automatic = False, |
| 10179 | deps = MICROKERNEL_TEST_DEPS, |
| 10180 | ) |
| 10181 | |
| 10182 | xnnpack_unit_test( |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 10183 | name = "f32_roundne_eval", |
| 10184 | srcs = [ |
| 10185 | "eval/f32-roundne.cc", |
| 10186 | "src/xnnpack/AlignedAllocator.h", |
| 10187 | "src/xnnpack/math-stubs.h", |
| 10188 | ] + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | 22eed3d | 2020-05-11 20:13:37 -0700 | [diff] [blame] | 10189 | automatic = False, |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 10190 | deps = MICROKERNEL_TEST_DEPS, |
| 10191 | ) |
| 10192 | |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 10193 | xnnpack_unit_test( |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 10194 | name = "f32_roundd_eval", |
| 10195 | srcs = [ |
| 10196 | "eval/f32-roundd.cc", |
| 10197 | "src/xnnpack/AlignedAllocator.h", |
| 10198 | "src/xnnpack/math-stubs.h", |
| 10199 | ] + MICROKERNEL_TEST_HDRS, |
| 10200 | automatic = False, |
| 10201 | deps = MICROKERNEL_TEST_DEPS, |
| 10202 | ) |
| 10203 | |
| 10204 | xnnpack_unit_test( |
| 10205 | name = "f32_roundu_eval", |
| 10206 | srcs = [ |
| 10207 | "eval/f32-roundu.cc", |
| 10208 | "src/xnnpack/AlignedAllocator.h", |
| 10209 | "src/xnnpack/math-stubs.h", |
| 10210 | ] + MICROKERNEL_TEST_HDRS, |
| 10211 | automatic = False, |
| 10212 | deps = MICROKERNEL_TEST_DEPS, |
| 10213 | ) |
| 10214 | |
| 10215 | xnnpack_unit_test( |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 10216 | name = "f32_roundz_eval", |
| 10217 | srcs = [ |
| 10218 | "eval/f32-roundz.cc", |
| 10219 | "src/xnnpack/AlignedAllocator.h", |
| 10220 | "src/xnnpack/math-stubs.h", |
| 10221 | ] + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 10222 | automatic = False, |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 10223 | deps = MICROKERNEL_TEST_DEPS, |
| 10224 | ) |
| 10225 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10226 | ######################### Unit tests for micro-kernels ######################### |
| 10227 | |
| 10228 | xnnpack_unit_test( |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 10229 | name = "f16_f32_vcvt_test", |
| 10230 | srcs = [ |
| 10231 | "test/f16-f32-vcvt.cc", |
| 10232 | "test/vcvt-microkernel-tester.h", |
| 10233 | ] + MICROKERNEL_TEST_HDRS, |
| 10234 | deps = MICROKERNEL_TEST_DEPS, |
| 10235 | ) |
| 10236 | |
| 10237 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10238 | name = "f16_dwconv_minmax_test", |
| 10239 | srcs = [ |
| 10240 | "test/f16-dwconv-minmax.cc", |
| 10241 | "test/dwconv-microkernel-tester.h", |
| 10242 | "src/xnnpack/AlignedAllocator.h", |
| 10243 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 10244 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 10245 | ) |
| 10246 | |
| 10247 | xnnpack_unit_test( |
| 10248 | name = "f16_gavgpool_minmax_test", |
| 10249 | srcs = [ |
| 10250 | "test/f16-gavgpool-minmax.cc", |
| 10251 | "test/gavgpool-microkernel-tester.h", |
| 10252 | "src/xnnpack/AlignedAllocator.h", |
| 10253 | ] + MICROKERNEL_TEST_HDRS, |
| 10254 | deps = MICROKERNEL_TEST_DEPS, |
| 10255 | ) |
| 10256 | |
| 10257 | xnnpack_unit_test( |
| Marat Dukhan | de06f49 | 2020-04-09 00:19:31 -0700 | [diff] [blame] | 10258 | name = "f16_gemm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10259 | srcs = [ |
| Marat Dukhan | de06f49 | 2020-04-09 00:19:31 -0700 | [diff] [blame] | 10260 | "test/f16-gemm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10261 | "test/gemm-microkernel-tester.h", |
| 10262 | "src/xnnpack/AlignedAllocator.h", |
| 10263 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10264 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10265 | ) |
| 10266 | |
| 10267 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10268 | name = "f16_igemm_minmax_test", |
| 10269 | srcs = [ |
| 10270 | "test/f16-igemm-minmax.cc", |
| 10271 | "test/gemm-microkernel-tester.h", |
| 10272 | "src/xnnpack/AlignedAllocator.h", |
| 10273 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 10274 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 10275 | ) |
| 10276 | |
| 10277 | xnnpack_unit_test( |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 10278 | name = "f16_spmm_minmax_test", |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 10279 | srcs = [ |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 10280 | "test/f16-spmm-minmax.cc", |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 10281 | "test/spmm-microkernel-tester.h", |
| 10282 | "src/xnnpack/AlignedAllocator.h", |
| 10283 | ] + MICROKERNEL_TEST_HDRS, |
| 10284 | deps = MICROKERNEL_TEST_DEPS, |
| 10285 | ) |
| 10286 | |
| 10287 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10288 | name = "f16_vadd_minmax_test", |
| 10289 | srcs = [ |
| 10290 | "test/f16-vadd-minmax.cc", |
| 10291 | "test/vbinary-microkernel-tester.h", |
| 10292 | ] + MICROKERNEL_TEST_HDRS, |
| 10293 | deps = MICROKERNEL_TEST_DEPS, |
| 10294 | ) |
| 10295 | |
| 10296 | xnnpack_unit_test( |
| 10297 | name = "f16_vaddc_minmax_test", |
| 10298 | srcs = [ |
| 10299 | "test/f16-vaddc-minmax.cc", |
| 10300 | "test/vbinaryc-microkernel-tester.h", |
| 10301 | ] + MICROKERNEL_TEST_HDRS, |
| 10302 | deps = MICROKERNEL_TEST_DEPS, |
| 10303 | ) |
| 10304 | |
| 10305 | xnnpack_unit_test( |
| 10306 | name = "f16_vclamp_test", |
| 10307 | srcs = [ |
| 10308 | "test/f16-vclamp.cc", |
| Marat Dukhan | a6c0516 | 2021-05-13 16:52:02 -0700 | [diff] [blame] | 10309 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10310 | ] + MICROKERNEL_TEST_HDRS, |
| 10311 | deps = MICROKERNEL_TEST_DEPS, |
| 10312 | ) |
| 10313 | |
| 10314 | xnnpack_unit_test( |
| 10315 | name = "f16_vdiv_minmax_test", |
| 10316 | srcs = [ |
| 10317 | "test/f16-vdiv-minmax.cc", |
| 10318 | "test/vbinary-microkernel-tester.h", |
| 10319 | ] + MICROKERNEL_TEST_HDRS, |
| 10320 | deps = MICROKERNEL_TEST_DEPS, |
| 10321 | ) |
| 10322 | |
| 10323 | xnnpack_unit_test( |
| 10324 | name = "f16_vdivc_minmax_test", |
| 10325 | srcs = [ |
| 10326 | "test/f16-vdivc-minmax.cc", |
| 10327 | "test/vbinaryc-microkernel-tester.h", |
| 10328 | ] + MICROKERNEL_TEST_HDRS, |
| 10329 | deps = MICROKERNEL_TEST_DEPS, |
| 10330 | ) |
| 10331 | |
| 10332 | xnnpack_unit_test( |
| 10333 | name = "f16_vrdivc_minmax_test", |
| 10334 | srcs = [ |
| 10335 | "test/f16-vrdivc-minmax.cc", |
| 10336 | "test/vbinaryc-microkernel-tester.h", |
| 10337 | ] + MICROKERNEL_TEST_HDRS, |
| 10338 | deps = MICROKERNEL_TEST_DEPS, |
| 10339 | ) |
| 10340 | |
| 10341 | xnnpack_unit_test( |
| 10342 | name = "f16_vhswish_test", |
| 10343 | srcs = [ |
| 10344 | "test/f16-vhswish.cc", |
| Marat Dukhan | a6c0516 | 2021-05-13 16:52:02 -0700 | [diff] [blame] | 10345 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10346 | ] + MICROKERNEL_TEST_HDRS, |
| 10347 | deps = MICROKERNEL_TEST_DEPS, |
| 10348 | ) |
| 10349 | |
| 10350 | xnnpack_unit_test( |
| 10351 | name = "f16_vmax_test", |
| 10352 | srcs = [ |
| 10353 | "test/f16-vmax.cc", |
| 10354 | "test/vbinary-microkernel-tester.h", |
| 10355 | ] + MICROKERNEL_TEST_HDRS, |
| 10356 | deps = MICROKERNEL_TEST_DEPS, |
| 10357 | ) |
| 10358 | |
| 10359 | xnnpack_unit_test( |
| 10360 | name = "f16_vmaxc_test", |
| 10361 | srcs = [ |
| 10362 | "test/f16-vmaxc.cc", |
| 10363 | "test/vbinaryc-microkernel-tester.h", |
| 10364 | ] + MICROKERNEL_TEST_HDRS, |
| 10365 | deps = MICROKERNEL_TEST_DEPS, |
| 10366 | ) |
| 10367 | |
| 10368 | xnnpack_unit_test( |
| 10369 | name = "f16_vmin_test", |
| 10370 | srcs = [ |
| 10371 | "test/f16-vmin.cc", |
| 10372 | "test/vbinary-microkernel-tester.h", |
| 10373 | ] + MICROKERNEL_TEST_HDRS, |
| 10374 | deps = MICROKERNEL_TEST_DEPS, |
| 10375 | ) |
| 10376 | |
| 10377 | xnnpack_unit_test( |
| 10378 | name = "f16_vminc_test", |
| 10379 | srcs = [ |
| 10380 | "test/f16-vminc.cc", |
| 10381 | "test/vbinaryc-microkernel-tester.h", |
| 10382 | ] + MICROKERNEL_TEST_HDRS, |
| 10383 | deps = MICROKERNEL_TEST_DEPS, |
| 10384 | ) |
| 10385 | |
| 10386 | xnnpack_unit_test( |
| 10387 | name = "f16_vmul_minmax_test", |
| 10388 | srcs = [ |
| 10389 | "test/f16-vmul-minmax.cc", |
| 10390 | "test/vbinary-microkernel-tester.h", |
| 10391 | ] + MICROKERNEL_TEST_HDRS, |
| 10392 | deps = MICROKERNEL_TEST_DEPS, |
| 10393 | ) |
| 10394 | |
| 10395 | xnnpack_unit_test( |
| 10396 | name = "f16_vmulc_minmax_test", |
| 10397 | srcs = [ |
| 10398 | "test/f16-vmulc-minmax.cc", |
| 10399 | "test/vbinaryc-microkernel-tester.h", |
| 10400 | ] + MICROKERNEL_TEST_HDRS, |
| 10401 | deps = MICROKERNEL_TEST_DEPS, |
| 10402 | ) |
| 10403 | |
| 10404 | xnnpack_unit_test( |
| 10405 | name = "f16_vmulcaddc_minmax_test", |
| 10406 | srcs = [ |
| 10407 | "test/f16-vmulcaddc-minmax.cc", |
| 10408 | "test/vmulcaddc-microkernel-tester.h", |
| 10409 | "src/xnnpack/AlignedAllocator.h", |
| 10410 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 10411 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 10412 | ) |
| 10413 | |
| 10414 | xnnpack_unit_test( |
| 10415 | name = "f16_vsub_minmax_test", |
| 10416 | srcs = [ |
| 10417 | "test/f16-vsub-minmax.cc", |
| 10418 | "test/vbinary-microkernel-tester.h", |
| 10419 | ] + MICROKERNEL_TEST_HDRS, |
| 10420 | deps = MICROKERNEL_TEST_DEPS, |
| 10421 | ) |
| 10422 | |
| 10423 | xnnpack_unit_test( |
| 10424 | name = "f16_vsubc_minmax_test", |
| 10425 | srcs = [ |
| 10426 | "test/f16-vsubc-minmax.cc", |
| 10427 | "test/vbinaryc-microkernel-tester.h", |
| 10428 | ] + MICROKERNEL_TEST_HDRS, |
| 10429 | deps = MICROKERNEL_TEST_DEPS, |
| 10430 | ) |
| 10431 | |
| 10432 | xnnpack_unit_test( |
| 10433 | name = "f16_vrsubc_minmax_test", |
| 10434 | srcs = [ |
| 10435 | "test/f16-vrsubc-minmax.cc", |
| 10436 | "test/vbinaryc-microkernel-tester.h", |
| 10437 | ] + MICROKERNEL_TEST_HDRS, |
| 10438 | deps = MICROKERNEL_TEST_DEPS, |
| 10439 | ) |
| 10440 | |
| 10441 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10442 | name = "f32_argmaxpool_test", |
| 10443 | srcs = [ |
| 10444 | "test/f32-argmaxpool.cc", |
| 10445 | "test/argmaxpool-microkernel-tester.h", |
| 10446 | "src/xnnpack/AlignedAllocator.h", |
| 10447 | ] + MICROKERNEL_TEST_HDRS, |
| 10448 | deps = MICROKERNEL_TEST_DEPS, |
| 10449 | ) |
| 10450 | |
| 10451 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10452 | name = "f32_avgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10453 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10454 | "test/f32-avgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10455 | "test/avgpool-microkernel-tester.h", |
| 10456 | "src/xnnpack/AlignedAllocator.h", |
| 10457 | ] + MICROKERNEL_TEST_HDRS, |
| 10458 | deps = MICROKERNEL_TEST_DEPS, |
| 10459 | ) |
| 10460 | |
| 10461 | xnnpack_unit_test( |
| Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 10462 | name = "f32_ibilinear_test", |
| Marat Dukhan | 35dacfb | 2019-11-07 19:18:16 -0800 | [diff] [blame] | 10463 | srcs = [ |
| Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 10464 | "test/f32-ibilinear.cc", |
| 10465 | "test/ibilinear-microkernel-tester.h", |
| Marat Dukhan | 35dacfb | 2019-11-07 19:18:16 -0800 | [diff] [blame] | 10466 | "src/xnnpack/AlignedAllocator.h", |
| 10467 | ] + MICROKERNEL_TEST_HDRS, |
| 10468 | deps = MICROKERNEL_TEST_DEPS, |
| 10469 | ) |
| 10470 | |
| 10471 | xnnpack_unit_test( |
| XNNPACK Team | 2143267 | 2020-10-19 19:58:48 -0700 | [diff] [blame] | 10472 | name = "f32_ibilinear_chw_test", |
| 10473 | srcs = [ |
| 10474 | "test/f32-ibilinear-chw.cc", |
| XNNPACK Team | 6be46b2 | 2020-10-22 23:34:54 -0700 | [diff] [blame] | 10475 | "test/ibilinear-microkernel-tester.h", |
| XNNPACK Team | 2143267 | 2020-10-19 19:58:48 -0700 | [diff] [blame] | 10476 | "src/xnnpack/AlignedAllocator.h", |
| 10477 | ] + MICROKERNEL_TEST_HDRS, |
| 10478 | deps = MICROKERNEL_TEST_DEPS, |
| 10479 | ) |
| 10480 | |
| 10481 | xnnpack_unit_test( |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10482 | name = "f32_igemm_test", |
| 10483 | srcs = [ |
| 10484 | "test/f32-igemm.cc", |
| 10485 | "test/gemm-microkernel-tester.h", |
| 10486 | "src/xnnpack/AlignedAllocator.h", |
| 10487 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10488 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10489 | ) |
| 10490 | |
| 10491 | xnnpack_unit_test( |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 10492 | name = "f32_igemm_relu_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10493 | srcs = [ |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 10494 | "test/f32-igemm-relu.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10495 | "test/gemm-microkernel-tester.h", |
| 10496 | "src/xnnpack/AlignedAllocator.h", |
| 10497 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10498 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10499 | ) |
| 10500 | |
| 10501 | xnnpack_unit_test( |
| Marat Dukhan | e207b7b | 2020-05-28 16:27:42 -0700 | [diff] [blame] | 10502 | name = "f32_igemm_minmax_test", |
| 10503 | srcs = [ |
| 10504 | "test/f32-igemm-minmax.cc", |
| 10505 | "test/gemm-microkernel-tester.h", |
| 10506 | "src/xnnpack/AlignedAllocator.h", |
| 10507 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10508 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | e207b7b | 2020-05-28 16:27:42 -0700 | [diff] [blame] | 10509 | ) |
| 10510 | |
| 10511 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10512 | name = "f32_conv_hwc_test", |
| 10513 | srcs = [ |
| 10514 | "test/f32-conv-hwc.cc", |
| 10515 | "test/conv-hwc-microkernel-tester.h", |
| 10516 | "src/xnnpack/AlignedAllocator.h", |
| 10517 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10518 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10519 | ) |
| 10520 | |
| 10521 | xnnpack_unit_test( |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 10522 | name = "f32_conv_hwc2chw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10523 | srcs = [ |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 10524 | "test/f32-conv-hwc2chw.cc", |
| 10525 | "test/conv-hwc2chw-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10526 | "src/xnnpack/AlignedAllocator.h", |
| 10527 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10528 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10529 | ) |
| 10530 | |
| 10531 | xnnpack_unit_test( |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10532 | name = "f32_dwconv_test", |
| 10533 | srcs = [ |
| 10534 | "test/f32-dwconv.cc", |
| 10535 | "test/dwconv-microkernel-tester.h", |
| 10536 | "src/xnnpack/AlignedAllocator.h", |
| 10537 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10538 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10539 | ) |
| 10540 | |
| 10541 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10542 | name = "f32_dwconv_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10543 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10544 | "test/f32-dwconv-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10545 | "test/dwconv-microkernel-tester.h", |
| 10546 | "src/xnnpack/AlignedAllocator.h", |
| 10547 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10548 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10549 | ) |
| 10550 | |
| 10551 | xnnpack_unit_test( |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 10552 | name = "f32_dwconv2d_chw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10553 | srcs = [ |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 10554 | "test/f32-dwconv2d-chw.cc", |
| 10555 | "test/dwconv2d-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10556 | "src/xnnpack/AlignedAllocator.h", |
| 10557 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10558 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10559 | ) |
| 10560 | |
| 10561 | xnnpack_unit_test( |
| Marat Dukhan | d77f77d | 2021-10-24 15:39:59 -0700 | [diff] [blame] | 10562 | name = "f32_f16_vcvt_test", |
| 10563 | srcs = [ |
| 10564 | "test/f32-f16-vcvt.cc", |
| 10565 | "test/vcvt-microkernel-tester.h", |
| 10566 | ] + MICROKERNEL_TEST_HDRS, |
| 10567 | deps = MICROKERNEL_TEST_DEPS, |
| 10568 | ) |
| 10569 | |
| 10570 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10571 | name = "f32_gavgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10572 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10573 | "test/f32-gavgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10574 | "test/gavgpool-microkernel-tester.h", |
| 10575 | "src/xnnpack/AlignedAllocator.h", |
| 10576 | ] + MICROKERNEL_TEST_HDRS, |
| 10577 | deps = MICROKERNEL_TEST_DEPS, |
| 10578 | ) |
| 10579 | |
| 10580 | xnnpack_unit_test( |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 10581 | name = "f32_gavgpool_cw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10582 | srcs = [ |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 10583 | "test/f32-gavgpool-cw.cc", |
| 10584 | "test/gavgpool-cw-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10585 | "src/xnnpack/AlignedAllocator.h", |
| 10586 | ] + MICROKERNEL_TEST_HDRS, |
| 10587 | deps = MICROKERNEL_TEST_DEPS, |
| 10588 | ) |
| 10589 | |
| 10590 | xnnpack_unit_test( |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10591 | name = "f32_gemm_test", |
| 10592 | srcs = [ |
| 10593 | "test/f32-gemm.cc", |
| 10594 | "test/gemm-microkernel-tester.h", |
| 10595 | "src/xnnpack/AlignedAllocator.h", |
| 10596 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10597 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10598 | ) |
| 10599 | |
| 10600 | xnnpack_unit_test( |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 10601 | name = "f32_gemm_relu_test", |
| 10602 | srcs = [ |
| 10603 | "test/f32-gemm-relu.cc", |
| 10604 | "test/gemm-microkernel-tester.h", |
| 10605 | "src/xnnpack/AlignedAllocator.h", |
| 10606 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10607 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 10608 | ) |
| 10609 | |
| 10610 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10611 | name = "f32_gemm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10612 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10613 | "test/f32-gemm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10614 | "test/gemm-microkernel-tester.h", |
| 10615 | "src/xnnpack/AlignedAllocator.h", |
| 10616 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | b43b47a | 2021-12-23 16:27:22 -0800 | [diff] [blame] | 10617 | deps = MICROKERNEL_TEST_DEPS + [ |
| 10618 | ":packing", |
| 10619 | ":jit", |
| 10620 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10621 | ) |
| 10622 | |
| 10623 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10624 | name = "f32_gemminc_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10625 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10626 | "test/f32-gemminc-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10627 | "test/gemm-microkernel-tester.h", |
| 10628 | "src/xnnpack/AlignedAllocator.h", |
| 10629 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10630 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10631 | ) |
| 10632 | |
| 10633 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10634 | name = "f32_vhswish_test", |
| Frank Barchard | b196659 | 2020-05-12 13:47:06 -0700 | [diff] [blame] | 10635 | srcs = [ |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10636 | "test/f32-vhswish.cc", |
| Marat Dukhan | 949b6e7 | 2021-05-13 11:21:06 -0700 | [diff] [blame] | 10637 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10638 | ] + MICROKERNEL_TEST_HDRS, |
| 10639 | deps = MICROKERNEL_TEST_DEPS, |
| 10640 | ) |
| 10641 | |
| 10642 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10643 | name = "f32_maxpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10644 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10645 | "test/f32-maxpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10646 | "test/maxpool-microkernel-tester.h", |
| 10647 | ] + MICROKERNEL_TEST_HDRS, |
| 10648 | deps = MICROKERNEL_TEST_DEPS, |
| 10649 | ) |
| 10650 | |
| 10651 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10652 | name = "f32_pavgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10653 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10654 | "test/f32-pavgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10655 | "test/avgpool-microkernel-tester.h", |
| 10656 | "src/xnnpack/AlignedAllocator.h", |
| 10657 | ] + MICROKERNEL_TEST_HDRS, |
| 10658 | deps = MICROKERNEL_TEST_DEPS, |
| 10659 | ) |
| 10660 | |
| 10661 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10662 | name = "f32_ppmm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10663 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10664 | "test/f32-ppmm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10665 | "test/gemm-microkernel-tester.h", |
| 10666 | "src/xnnpack/AlignedAllocator.h", |
| 10667 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10668 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10669 | ) |
| 10670 | |
| 10671 | xnnpack_unit_test( |
| Frank Barchard | b196659 | 2020-05-12 13:47:06 -0700 | [diff] [blame] | 10672 | name = "f16_prelu_test", |
| 10673 | srcs = [ |
| 10674 | "test/f16-prelu.cc", |
| 10675 | "test/prelu-microkernel-tester.h", |
| 10676 | "src/xnnpack/AlignedAllocator.h", |
| 10677 | ] + MICROKERNEL_TEST_HDRS, |
| 10678 | deps = MICROKERNEL_TEST_DEPS, |
| 10679 | ) |
| 10680 | |
| 10681 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10682 | name = "f32_prelu_test", |
| 10683 | srcs = [ |
| 10684 | "test/f32-prelu.cc", |
| 10685 | "test/prelu-microkernel-tester.h", |
| 10686 | "src/xnnpack/AlignedAllocator.h", |
| 10687 | ] + MICROKERNEL_TEST_HDRS, |
| 10688 | deps = MICROKERNEL_TEST_DEPS, |
| 10689 | ) |
| 10690 | |
| 10691 | xnnpack_unit_test( |
| Marat Dukhan | fee66be | 2021-12-09 17:51:15 -0800 | [diff] [blame] | 10692 | name = "f32_qs8_vcvt_test", |
| 10693 | srcs = [ |
| 10694 | "test/f32-qs8-vcvt.cc", |
| 10695 | "test/vcvt-microkernel-tester.h", |
| 10696 | ] + MICROKERNEL_TEST_HDRS, |
| 10697 | deps = MICROKERNEL_TEST_DEPS, |
| 10698 | ) |
| 10699 | |
| 10700 | xnnpack_unit_test( |
| 10701 | name = "f32_qu8_vcvt_test", |
| 10702 | srcs = [ |
| 10703 | "test/f32-qu8-vcvt.cc", |
| 10704 | "test/vcvt-microkernel-tester.h", |
| 10705 | ] + MICROKERNEL_TEST_HDRS, |
| 10706 | deps = MICROKERNEL_TEST_DEPS, |
| 10707 | ) |
| 10708 | |
| 10709 | xnnpack_unit_test( |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 10710 | name = "f32_raddexpminusmax_test", |
| 10711 | srcs = [ |
| 10712 | "test/f32-raddexpminusmax.cc", |
| 10713 | "test/raddexpminusmax-microkernel-tester.h", |
| 10714 | ] + MICROKERNEL_TEST_HDRS, |
| 10715 | deps = MICROKERNEL_TEST_DEPS, |
| 10716 | ) |
| 10717 | |
| 10718 | xnnpack_unit_test( |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 10719 | name = "f32_raddextexp_test", |
| 10720 | srcs = [ |
| 10721 | "test/f32-raddextexp.cc", |
| 10722 | "test/raddextexp-microkernel-tester.h", |
| 10723 | ] + MICROKERNEL_TEST_HDRS, |
| 10724 | deps = MICROKERNEL_TEST_DEPS, |
| 10725 | ) |
| 10726 | |
| 10727 | xnnpack_unit_test( |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 10728 | name = "f32_raddstoreexpminusmax_test", |
| 10729 | srcs = [ |
| 10730 | "test/f32-raddstoreexpminusmax.cc", |
| 10731 | "test/raddstoreexpminusmax-microkernel-tester.h", |
| 10732 | ] + MICROKERNEL_TEST_HDRS, |
| 10733 | deps = MICROKERNEL_TEST_DEPS, |
| 10734 | ) |
| 10735 | |
| 10736 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10737 | name = "f32_rmax_test", |
| 10738 | srcs = [ |
| 10739 | "test/f32-rmax.cc", |
| 10740 | "test/rmax-microkernel-tester.h", |
| 10741 | ] + MICROKERNEL_TEST_HDRS, |
| 10742 | deps = MICROKERNEL_TEST_DEPS, |
| 10743 | ) |
| 10744 | |
| 10745 | xnnpack_unit_test( |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 10746 | name = "f32_spmm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10747 | srcs = [ |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 10748 | "test/f32-spmm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10749 | "test/spmm-microkernel-tester.h", |
| 10750 | "src/xnnpack/AlignedAllocator.h", |
| 10751 | ] + MICROKERNEL_TEST_HDRS, |
| 10752 | deps = MICROKERNEL_TEST_DEPS, |
| 10753 | ) |
| 10754 | |
| 10755 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 10756 | name = "f32_vabs_test", |
| 10757 | srcs = [ |
| 10758 | "test/f32-vabs.cc", |
| 10759 | "test/vunary-microkernel-tester.h", |
| 10760 | ] + MICROKERNEL_TEST_HDRS, |
| 10761 | deps = MICROKERNEL_TEST_DEPS, |
| 10762 | ) |
| 10763 | |
| 10764 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 10765 | name = "f32_vadd_test", |
| 10766 | srcs = [ |
| 10767 | "test/f32-vadd.cc", |
| 10768 | "test/vbinary-microkernel-tester.h", |
| 10769 | ] + MICROKERNEL_TEST_HDRS, |
| 10770 | deps = MICROKERNEL_TEST_DEPS, |
| 10771 | ) |
| 10772 | |
| 10773 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10774 | name = "f32_vadd_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10775 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10776 | "test/f32-vadd-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 10777 | "test/vbinary-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 10778 | ] + MICROKERNEL_TEST_HDRS, |
| 10779 | deps = MICROKERNEL_TEST_DEPS, |
| 10780 | ) |
| 10781 | |
| 10782 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 10783 | name = "f32_vadd_relu_test", |
| 10784 | srcs = [ |
| 10785 | "test/f32-vadd-relu.cc", |
| 10786 | "test/vbinary-microkernel-tester.h", |
| 10787 | ] + MICROKERNEL_TEST_HDRS, |
| 10788 | deps = MICROKERNEL_TEST_DEPS, |
| 10789 | ) |
| 10790 | |
| 10791 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 10792 | name = "f32_vaddc_test", |
| 10793 | srcs = [ |
| 10794 | "test/f32-vaddc.cc", |
| 10795 | "test/vbinaryc-microkernel-tester.h", |
| 10796 | ] + MICROKERNEL_TEST_HDRS, |
| 10797 | deps = MICROKERNEL_TEST_DEPS, |
| 10798 | ) |
| 10799 | |
| 10800 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10801 | name = "f32_vaddc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 10802 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10803 | "test/f32-vaddc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 10804 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10805 | ] + MICROKERNEL_TEST_HDRS, |
| 10806 | deps = MICROKERNEL_TEST_DEPS, |
| 10807 | ) |
| 10808 | |
| 10809 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 10810 | name = "f32_vaddc_relu_test", |
| 10811 | srcs = [ |
| 10812 | "test/f32-vaddc-relu.cc", |
| 10813 | "test/vbinaryc-microkernel-tester.h", |
| 10814 | ] + MICROKERNEL_TEST_HDRS, |
| 10815 | deps = MICROKERNEL_TEST_DEPS, |
| 10816 | ) |
| 10817 | |
| 10818 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10819 | name = "f32_vclamp_test", |
| 10820 | srcs = [ |
| 10821 | "test/f32-vclamp.cc", |
| Marat Dukhan | 60d3f24 | 2021-05-13 11:59:02 -0700 | [diff] [blame] | 10822 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10823 | ] + MICROKERNEL_TEST_HDRS, |
| 10824 | deps = MICROKERNEL_TEST_DEPS, |
| 10825 | ) |
| 10826 | |
| 10827 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 10828 | name = "f32_vdiv_test", |
| 10829 | srcs = [ |
| 10830 | "test/f32-vdiv.cc", |
| 10831 | "test/vbinary-microkernel-tester.h", |
| 10832 | ] + MICROKERNEL_TEST_HDRS, |
| 10833 | deps = MICROKERNEL_TEST_DEPS, |
| 10834 | ) |
| 10835 | |
| 10836 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10837 | name = "f32_vdiv_minmax_test", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 10838 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10839 | "test/f32-vdiv-minmax.cc", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 10840 | "test/vbinary-microkernel-tester.h", |
| 10841 | ] + MICROKERNEL_TEST_HDRS, |
| 10842 | deps = MICROKERNEL_TEST_DEPS, |
| 10843 | ) |
| 10844 | |
| 10845 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 10846 | name = "f32_vdiv_relu_test", |
| 10847 | srcs = [ |
| 10848 | "test/f32-vdiv-relu.cc", |
| 10849 | "test/vbinary-microkernel-tester.h", |
| 10850 | ] + MICROKERNEL_TEST_HDRS, |
| 10851 | deps = MICROKERNEL_TEST_DEPS, |
| 10852 | ) |
| 10853 | |
| 10854 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 10855 | name = "f32_vdivc_test", |
| 10856 | srcs = [ |
| 10857 | "test/f32-vdivc.cc", |
| 10858 | "test/vbinaryc-microkernel-tester.h", |
| 10859 | ] + MICROKERNEL_TEST_HDRS, |
| 10860 | deps = MICROKERNEL_TEST_DEPS, |
| 10861 | ) |
| 10862 | |
| 10863 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10864 | name = "f32_vdivc_minmax_test", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 10865 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10866 | "test/f32-vdivc-minmax.cc", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 10867 | "test/vbinaryc-microkernel-tester.h", |
| 10868 | ] + MICROKERNEL_TEST_HDRS, |
| 10869 | deps = MICROKERNEL_TEST_DEPS, |
| 10870 | ) |
| 10871 | |
| 10872 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 10873 | name = "f32_vdivc_relu_test", |
| 10874 | srcs = [ |
| 10875 | "test/f32-vdivc-relu.cc", |
| 10876 | "test/vbinaryc-microkernel-tester.h", |
| 10877 | ] + MICROKERNEL_TEST_HDRS, |
| 10878 | deps = MICROKERNEL_TEST_DEPS, |
| 10879 | ) |
| 10880 | |
| 10881 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 10882 | name = "f32_vrdivc_test", |
| 10883 | srcs = [ |
| 10884 | "test/f32-vrdivc.cc", |
| 10885 | "test/vbinaryc-microkernel-tester.h", |
| 10886 | ] + MICROKERNEL_TEST_HDRS, |
| 10887 | deps = MICROKERNEL_TEST_DEPS, |
| 10888 | ) |
| 10889 | |
| 10890 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10891 | name = "f32_vrdivc_minmax_test", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 10892 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10893 | "test/f32-vrdivc-minmax.cc", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 10894 | "test/vbinaryc-microkernel-tester.h", |
| 10895 | ] + MICROKERNEL_TEST_HDRS, |
| 10896 | deps = MICROKERNEL_TEST_DEPS, |
| 10897 | ) |
| 10898 | |
| 10899 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 10900 | name = "f32_vrdivc_relu_test", |
| 10901 | srcs = [ |
| 10902 | "test/f32-vrdivc-relu.cc", |
| 10903 | "test/vbinaryc-microkernel-tester.h", |
| 10904 | ] + MICROKERNEL_TEST_HDRS, |
| 10905 | deps = MICROKERNEL_TEST_DEPS, |
| 10906 | ) |
| 10907 | |
| 10908 | xnnpack_unit_test( |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10909 | name = "f32_velu_test", |
| 10910 | srcs = [ |
| 10911 | "test/f32-velu.cc", |
| 10912 | "test/vunary-microkernel-tester.h", |
| 10913 | ] + MICROKERNEL_TEST_HDRS, |
| 10914 | deps = MICROKERNEL_TEST_DEPS, |
| 10915 | ) |
| 10916 | |
| 10917 | xnnpack_unit_test( |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 10918 | name = "f32_vmax_test", |
| 10919 | srcs = [ |
| 10920 | "test/f32-vmax.cc", |
| 10921 | "test/vbinary-microkernel-tester.h", |
| 10922 | ] + MICROKERNEL_TEST_HDRS, |
| 10923 | deps = MICROKERNEL_TEST_DEPS, |
| 10924 | ) |
| 10925 | |
| 10926 | xnnpack_unit_test( |
| 10927 | name = "f32_vmaxc_test", |
| 10928 | srcs = [ |
| 10929 | "test/f32-vmaxc.cc", |
| 10930 | "test/vbinaryc-microkernel-tester.h", |
| 10931 | ] + MICROKERNEL_TEST_HDRS, |
| 10932 | deps = MICROKERNEL_TEST_DEPS, |
| 10933 | ) |
| 10934 | |
| 10935 | xnnpack_unit_test( |
| 10936 | name = "f32_vmin_test", |
| 10937 | srcs = [ |
| 10938 | "test/f32-vmin.cc", |
| 10939 | "test/vbinary-microkernel-tester.h", |
| 10940 | ] + MICROKERNEL_TEST_HDRS, |
| 10941 | deps = MICROKERNEL_TEST_DEPS, |
| 10942 | ) |
| 10943 | |
| 10944 | xnnpack_unit_test( |
| 10945 | name = "f32_vminc_test", |
| 10946 | srcs = [ |
| 10947 | "test/f32-vminc.cc", |
| 10948 | "test/vbinaryc-microkernel-tester.h", |
| 10949 | ] + MICROKERNEL_TEST_HDRS, |
| 10950 | deps = MICROKERNEL_TEST_DEPS, |
| 10951 | ) |
| 10952 | |
| 10953 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 10954 | name = "f32_vmul_test", |
| 10955 | srcs = [ |
| 10956 | "test/f32-vmul.cc", |
| 10957 | "test/vbinary-microkernel-tester.h", |
| 10958 | ] + MICROKERNEL_TEST_HDRS, |
| 10959 | deps = MICROKERNEL_TEST_DEPS, |
| 10960 | ) |
| 10961 | |
| 10962 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10963 | name = "f32_vmul_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10964 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10965 | "test/f32-vmul-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 10966 | "test/vbinary-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 10967 | ] + MICROKERNEL_TEST_HDRS, |
| 10968 | deps = MICROKERNEL_TEST_DEPS, |
| 10969 | ) |
| 10970 | |
| 10971 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 10972 | name = "f32_vmul_relu_test", |
| 10973 | srcs = [ |
| 10974 | "test/f32-vmul-relu.cc", |
| 10975 | "test/vbinary-microkernel-tester.h", |
| 10976 | ] + MICROKERNEL_TEST_HDRS, |
| 10977 | deps = MICROKERNEL_TEST_DEPS, |
| 10978 | ) |
| 10979 | |
| 10980 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 10981 | name = "f32_vmulc_test", |
| 10982 | srcs = [ |
| 10983 | "test/f32-vmulc.cc", |
| 10984 | "test/vbinaryc-microkernel-tester.h", |
| 10985 | ] + MICROKERNEL_TEST_HDRS, |
| 10986 | deps = MICROKERNEL_TEST_DEPS, |
| 10987 | ) |
| 10988 | |
| 10989 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10990 | name = "f32_vmulc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 10991 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 10992 | "test/f32-vmulc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 10993 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10994 | ] + MICROKERNEL_TEST_HDRS, |
| 10995 | deps = MICROKERNEL_TEST_DEPS, |
| 10996 | ) |
| 10997 | |
| 10998 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 10999 | name = "f32_vmulc_relu_test", |
| 11000 | srcs = [ |
| 11001 | "test/f32-vmulc-relu.cc", |
| 11002 | "test/vbinaryc-microkernel-tester.h", |
| 11003 | ] + MICROKERNEL_TEST_HDRS, |
| 11004 | deps = MICROKERNEL_TEST_DEPS, |
| 11005 | ) |
| 11006 | |
| 11007 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 11008 | name = "f32_vmulcaddc_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11009 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 11010 | "test/f32-vmulcaddc-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11011 | "test/vmulcaddc-microkernel-tester.h", |
| 11012 | "src/xnnpack/AlignedAllocator.h", |
| 11013 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 11014 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11015 | ) |
| 11016 | |
| 11017 | xnnpack_unit_test( |
| Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 11018 | name = "f32_vlrelu_test", |
| 11019 | srcs = [ |
| 11020 | "test/f32-vlrelu.cc", |
| 11021 | "test/vunary-microkernel-tester.h", |
| 11022 | ] + MICROKERNEL_TEST_HDRS, |
| 11023 | deps = MICROKERNEL_TEST_DEPS, |
| 11024 | ) |
| 11025 | |
| 11026 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 11027 | name = "f32_vneg_test", |
| 11028 | srcs = [ |
| 11029 | "test/f32-vneg.cc", |
| 11030 | "test/vunary-microkernel-tester.h", |
| 11031 | ] + MICROKERNEL_TEST_HDRS, |
| 11032 | deps = MICROKERNEL_TEST_DEPS, |
| 11033 | ) |
| 11034 | |
| 11035 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 11036 | name = "f32_vrelu_test", |
| 11037 | srcs = [ |
| 11038 | "test/f32-vrelu.cc", |
| 11039 | "test/vunary-microkernel-tester.h", |
| 11040 | ] + MICROKERNEL_TEST_HDRS, |
| 11041 | deps = MICROKERNEL_TEST_DEPS, |
| 11042 | ) |
| 11043 | |
| 11044 | xnnpack_unit_test( |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 11045 | name = "f32_vrndne_test", |
| 11046 | srcs = [ |
| 11047 | "test/f32-vrndne.cc", |
| 11048 | "test/vunary-microkernel-tester.h", |
| 11049 | ] + MICROKERNEL_TEST_HDRS, |
| 11050 | deps = MICROKERNEL_TEST_DEPS, |
| 11051 | ) |
| 11052 | |
| 11053 | xnnpack_unit_test( |
| 11054 | name = "f32_vrndz_test", |
| 11055 | srcs = [ |
| 11056 | "test/f32-vrndz.cc", |
| 11057 | "test/vunary-microkernel-tester.h", |
| 11058 | ] + MICROKERNEL_TEST_HDRS, |
| 11059 | deps = MICROKERNEL_TEST_DEPS, |
| 11060 | ) |
| 11061 | |
| 11062 | xnnpack_unit_test( |
| 11063 | name = "f32_vrndu_test", |
| 11064 | srcs = [ |
| 11065 | "test/f32-vrndu.cc", |
| 11066 | "test/vunary-microkernel-tester.h", |
| 11067 | ] + MICROKERNEL_TEST_HDRS, |
| 11068 | deps = MICROKERNEL_TEST_DEPS, |
| 11069 | ) |
| 11070 | |
| 11071 | xnnpack_unit_test( |
| 11072 | name = "f32_vrndd_test", |
| 11073 | srcs = [ |
| 11074 | "test/f32-vrndd.cc", |
| 11075 | "test/vunary-microkernel-tester.h", |
| 11076 | ] + MICROKERNEL_TEST_HDRS, |
| 11077 | deps = MICROKERNEL_TEST_DEPS, |
| 11078 | ) |
| 11079 | |
| 11080 | xnnpack_unit_test( |
| Marat Dukhan | 05ac8e3 | 2019-10-21 15:39:33 -0700 | [diff] [blame] | 11081 | name = "f32_vscale_test", |
| 11082 | srcs = [ |
| 11083 | "test/f32-vscale.cc", |
| 11084 | "test/vscale-microkernel-tester.h", |
| 11085 | ] + MICROKERNEL_TEST_HDRS, |
| 11086 | deps = MICROKERNEL_TEST_DEPS, |
| 11087 | ) |
| 11088 | |
| 11089 | xnnpack_unit_test( |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 11090 | name = "f32_vscaleexpminusmax_test", |
| 11091 | srcs = [ |
| 11092 | "test/f32-vscaleexpminusmax.cc", |
| 11093 | "test/vscaleexpminusmax-microkernel-tester.h", |
| 11094 | ] + MICROKERNEL_TEST_HDRS, |
| 11095 | deps = MICROKERNEL_TEST_DEPS, |
| 11096 | ) |
| 11097 | |
| 11098 | xnnpack_unit_test( |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 11099 | name = "f32_vscaleextexp_test", |
| 11100 | srcs = [ |
| 11101 | "test/f32-vscaleextexp.cc", |
| 11102 | "test/vscaleextexp-microkernel-tester.h", |
| 11103 | ] + MICROKERNEL_TEST_HDRS, |
| 11104 | deps = MICROKERNEL_TEST_DEPS, |
| 11105 | ) |
| 11106 | |
| 11107 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 11108 | name = "f32_vsigmoid_test", |
| 11109 | srcs = [ |
| 11110 | "test/f32-vsigmoid.cc", |
| 11111 | "test/vunary-microkernel-tester.h", |
| 11112 | ] + MICROKERNEL_TEST_HDRS, |
| 11113 | deps = MICROKERNEL_TEST_DEPS, |
| 11114 | ) |
| 11115 | |
| 11116 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 11117 | name = "f32_vsqr_test", |
| 11118 | srcs = [ |
| 11119 | "test/f32-vsqr.cc", |
| 11120 | "test/vunary-microkernel-tester.h", |
| 11121 | ] + MICROKERNEL_TEST_HDRS, |
| 11122 | deps = MICROKERNEL_TEST_DEPS, |
| 11123 | ) |
| 11124 | |
| 11125 | xnnpack_unit_test( |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 11126 | name = "f32_vsqrdiff_test", |
| 11127 | srcs = [ |
| 11128 | "test/f32-vsqrdiff.cc", |
| 11129 | "test/vbinary-microkernel-tester.h", |
| 11130 | ] + MICROKERNEL_TEST_HDRS, |
| 11131 | deps = MICROKERNEL_TEST_DEPS, |
| 11132 | ) |
| 11133 | |
| 11134 | xnnpack_unit_test( |
| 11135 | name = "f32_vsqrdiffc_test", |
| 11136 | srcs = [ |
| 11137 | "test/f32-vsqrdiffc.cc", |
| 11138 | "test/vbinaryc-microkernel-tester.h", |
| 11139 | ] + MICROKERNEL_TEST_HDRS, |
| 11140 | deps = MICROKERNEL_TEST_DEPS, |
| 11141 | ) |
| 11142 | |
| 11143 | xnnpack_unit_test( |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 11144 | name = "f32_vsqrt_test", |
| 11145 | srcs = [ |
| 11146 | "test/f32-vsqrt.cc", |
| 11147 | "test/vunary-microkernel-tester.h", |
| 11148 | ] + MICROKERNEL_TEST_HDRS, |
| 11149 | deps = MICROKERNEL_TEST_DEPS, |
| 11150 | ) |
| 11151 | |
| 11152 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11153 | name = "f32_vsub_test", |
| 11154 | srcs = [ |
| 11155 | "test/f32-vsub.cc", |
| 11156 | "test/vbinary-microkernel-tester.h", |
| 11157 | ] + MICROKERNEL_TEST_HDRS, |
| 11158 | deps = MICROKERNEL_TEST_DEPS, |
| 11159 | ) |
| 11160 | |
| 11161 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11162 | name = "f32_vsub_minmax_test", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 11163 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11164 | "test/f32-vsub-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 11165 | "test/vbinary-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11166 | ] + MICROKERNEL_TEST_HDRS, |
| 11167 | deps = MICROKERNEL_TEST_DEPS, |
| 11168 | ) |
| 11169 | |
| 11170 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11171 | name = "f32_vsub_relu_test", |
| 11172 | srcs = [ |
| 11173 | "test/f32-vsub-relu.cc", |
| 11174 | "test/vbinary-microkernel-tester.h", |
| 11175 | ] + MICROKERNEL_TEST_HDRS, |
| 11176 | deps = MICROKERNEL_TEST_DEPS, |
| 11177 | ) |
| 11178 | |
| 11179 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11180 | name = "f32_vsubc_test", |
| 11181 | srcs = [ |
| 11182 | "test/f32-vsubc.cc", |
| 11183 | "test/vbinaryc-microkernel-tester.h", |
| 11184 | ] + MICROKERNEL_TEST_HDRS, |
| 11185 | deps = MICROKERNEL_TEST_DEPS, |
| 11186 | ) |
| 11187 | |
| 11188 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11189 | name = "f32_vsubc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11190 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11191 | "test/f32-vsubc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 11192 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11193 | ] + MICROKERNEL_TEST_HDRS, |
| 11194 | deps = MICROKERNEL_TEST_DEPS, |
| 11195 | ) |
| 11196 | |
| 11197 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11198 | name = "f32_vsubc_relu_test", |
| 11199 | srcs = [ |
| 11200 | "test/f32-vsubc-relu.cc", |
| 11201 | "test/vbinaryc-microkernel-tester.h", |
| 11202 | ] + MICROKERNEL_TEST_HDRS, |
| 11203 | deps = MICROKERNEL_TEST_DEPS, |
| 11204 | ) |
| 11205 | |
| 11206 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11207 | name = "f32_vrsubc_test", |
| 11208 | srcs = [ |
| 11209 | "test/f32-vrsubc.cc", |
| 11210 | "test/vbinaryc-microkernel-tester.h", |
| 11211 | ] + MICROKERNEL_TEST_HDRS, |
| 11212 | deps = MICROKERNEL_TEST_DEPS, |
| 11213 | ) |
| 11214 | |
| 11215 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11216 | name = "f32_vrsubc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11217 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11218 | "test/f32-vrsubc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 11219 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 11220 | ] + MICROKERNEL_TEST_HDRS, |
| 11221 | deps = MICROKERNEL_TEST_DEPS, |
| 11222 | ) |
| 11223 | |
| 11224 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11225 | name = "f32_vrsubc_relu_test", |
| 11226 | srcs = [ |
| 11227 | "test/f32-vrsubc-relu.cc", |
| 11228 | "test/vbinaryc-microkernel-tester.h", |
| 11229 | ] + MICROKERNEL_TEST_HDRS, |
| 11230 | deps = MICROKERNEL_TEST_DEPS, |
| 11231 | ) |
| 11232 | |
| 11233 | xnnpack_unit_test( |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 11234 | name = "qc8_dwconv_minmax_fp32_test", |
| 11235 | timeout = "moderate", |
| 11236 | srcs = [ |
| 11237 | "test/qc8-dwconv-minmax-fp32.cc", |
| 11238 | "test/dwconv-microkernel-tester.h", |
| 11239 | "src/xnnpack/AlignedAllocator.h", |
| 11240 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11241 | shard_count = 10, |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 11242 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11243 | ) |
| 11244 | |
| 11245 | xnnpack_unit_test( |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 11246 | name = "qc8_gemm_minmax_fp32_test", |
| 11247 | timeout = "moderate", |
| 11248 | srcs = [ |
| 11249 | "test/qc8-gemm-minmax-fp32.cc", |
| 11250 | "test/gemm-microkernel-tester.h", |
| 11251 | "src/xnnpack/AlignedAllocator.h", |
| 11252 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11253 | shard_count = 10, |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 11254 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11255 | ) |
| 11256 | |
| 11257 | xnnpack_unit_test( |
| Marat Dukhan | e06c813 | 2021-06-03 08:59:11 -0700 | [diff] [blame] | 11258 | name = "qc8_igemm_minmax_fp32_test", |
| 11259 | timeout = "moderate", |
| 11260 | srcs = [ |
| 11261 | "test/qc8-igemm-minmax-fp32.cc", |
| 11262 | "test/gemm-microkernel-tester.h", |
| 11263 | "src/xnnpack/AlignedAllocator.h", |
| 11264 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11265 | shard_count = 10, |
| Marat Dukhan | e06c813 | 2021-06-03 08:59:11 -0700 | [diff] [blame] | 11266 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11267 | ) |
| 11268 | |
| 11269 | xnnpack_unit_test( |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 11270 | name = "qs8_dwconv_minmax_fp32_test", |
| 11271 | srcs = [ |
| 11272 | "test/qs8-dwconv-minmax-fp32.cc", |
| 11273 | "test/dwconv-microkernel-tester.h", |
| 11274 | "src/xnnpack/AlignedAllocator.h", |
| 11275 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11276 | shard_count = 10, |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 11277 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11278 | ) |
| 11279 | |
| 11280 | xnnpack_unit_test( |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 11281 | name = "qs8_dwconv_minmax_rndnu_test", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11282 | srcs = [ |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 11283 | "test/qs8-dwconv-minmax-rndnu.cc", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11284 | "test/dwconv-microkernel-tester.h", |
| 11285 | "src/xnnpack/AlignedAllocator.h", |
| 11286 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 11287 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11288 | ) |
| 11289 | |
| 11290 | xnnpack_unit_test( |
| Marat Dukhan | fee66be | 2021-12-09 17:51:15 -0800 | [diff] [blame] | 11291 | name = "qs8_f32_vcvt_test", |
| 11292 | srcs = [ |
| 11293 | "test/qs8-f32-vcvt.cc", |
| 11294 | "test/vcvt-microkernel-tester.h", |
| 11295 | ] + MICROKERNEL_TEST_HDRS, |
| 11296 | deps = MICROKERNEL_TEST_DEPS, |
| 11297 | ) |
| 11298 | |
| 11299 | xnnpack_unit_test( |
| Marat Dukhan | 4ed53f4 | 2020-08-06 01:12:55 -0700 | [diff] [blame] | 11300 | name = "qs8_gavgpool_minmax_test", |
| 11301 | srcs = [ |
| 11302 | "test/qs8-gavgpool-minmax.cc", |
| 11303 | "test/gavgpool-microkernel-tester.h", |
| 11304 | "src/xnnpack/AlignedAllocator.h", |
| 11305 | ] + MICROKERNEL_TEST_HDRS, |
| 11306 | deps = MICROKERNEL_TEST_DEPS, |
| 11307 | ) |
| 11308 | |
| 11309 | xnnpack_unit_test( |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11310 | name = "qs8_gemm_minmax_fp32_test", |
| 11311 | timeout = "moderate", |
| 11312 | srcs = [ |
| 11313 | "test/qs8-gemm-minmax-fp32.cc", |
| 11314 | "test/gemm-microkernel-tester.h", |
| 11315 | "src/xnnpack/AlignedAllocator.h", |
| 11316 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11317 | shard_count = 10, |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11318 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11319 | ) |
| 11320 | |
| 11321 | xnnpack_unit_test( |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11322 | name = "qs8_gemm_minmax_rndnu_test", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11323 | timeout = "moderate", |
| 11324 | srcs = [ |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11325 | "test/qs8-gemm-minmax-rndnu.cc", |
| 11326 | "test/gemm-microkernel-tester.h", |
| 11327 | "src/xnnpack/AlignedAllocator.h", |
| 11328 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 11329 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11330 | ) |
| 11331 | |
| 11332 | xnnpack_unit_test( |
| 11333 | name = "qs8_igemm_minmax_fp32_test", |
| 11334 | timeout = "moderate", |
| 11335 | srcs = [ |
| 11336 | "test/qs8-igemm-minmax-fp32.cc", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11337 | "test/gemm-microkernel-tester.h", |
| 11338 | "src/xnnpack/AlignedAllocator.h", |
| 11339 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11340 | shard_count = 10, |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11341 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11342 | ) |
| 11343 | |
| 11344 | xnnpack_unit_test( |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11345 | name = "qs8_igemm_minmax_rndnu_test", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11346 | timeout = "moderate", |
| 11347 | srcs = [ |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11348 | "test/qs8-igemm-minmax-rndnu.cc", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11349 | "test/gemm-microkernel-tester.h", |
| 11350 | "src/xnnpack/AlignedAllocator.h", |
| 11351 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 11352 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11353 | ) |
| 11354 | |
| 11355 | xnnpack_unit_test( |
| Marat Dukhan | f948068 | 2020-07-31 14:50:24 -0700 | [diff] [blame] | 11356 | name = "qs8_requantization_test", |
| 11357 | srcs = [ |
| 11358 | "src/xnnpack/requantization-stubs.h", |
| 11359 | "test/qs8-requantization.cc", |
| 11360 | "test/requantization-tester.h", |
| 11361 | ] + MICROKERNEL_TEST_HDRS, |
| 11362 | deps = MICROKERNEL_TEST_DEPS, |
| 11363 | ) |
| 11364 | |
| 11365 | xnnpack_unit_test( |
| Marat Dukhan | d9f3ad4 | 2020-08-10 12:30:58 -0700 | [diff] [blame] | 11366 | name = "qs8_vadd_minmax_test", |
| 11367 | srcs = [ |
| 11368 | "test/qs8-vadd-minmax.cc", |
| 11369 | "test/vadd-microkernel-tester.h", |
| 11370 | ] + MICROKERNEL_TEST_HDRS, |
| 11371 | deps = MICROKERNEL_TEST_DEPS, |
| 11372 | ) |
| 11373 | |
| 11374 | xnnpack_unit_test( |
| Marat Dukhan | 0270d9f | 2020-08-11 00:56:46 -0700 | [diff] [blame] | 11375 | name = "qs8_vaddc_minmax_test", |
| 11376 | srcs = [ |
| 11377 | "test/qs8-vaddc-minmax.cc", |
| 11378 | "test/vaddc-microkernel-tester.h", |
| 11379 | ] + MICROKERNEL_TEST_HDRS, |
| 11380 | deps = MICROKERNEL_TEST_DEPS, |
| 11381 | ) |
| 11382 | |
| 11383 | xnnpack_unit_test( |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 11384 | name = "qs8_vmul_minmax_fp32_test", |
| 11385 | srcs = [ |
| 11386 | "test/qs8-vmul-minmax-fp32.cc", |
| 11387 | "test/vmul-microkernel-tester.h", |
| 11388 | ] + MICROKERNEL_TEST_HDRS, |
| 11389 | deps = MICROKERNEL_TEST_DEPS, |
| 11390 | ) |
| 11391 | |
| 11392 | xnnpack_unit_test( |
| 11393 | name = "qs8_vmulc_minmax_fp32_test", |
| 11394 | srcs = [ |
| 11395 | "test/qs8-vmulc-minmax-fp32.cc", |
| 11396 | "test/vmulc-microkernel-tester.h", |
| 11397 | ] + MICROKERNEL_TEST_HDRS, |
| 11398 | deps = MICROKERNEL_TEST_DEPS, |
| 11399 | ) |
| 11400 | |
| 11401 | xnnpack_unit_test( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 11402 | name = "qu8_avgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11403 | srcs = [ |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 11404 | "test/qu8-avgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11405 | "test/avgpool-microkernel-tester.h", |
| 11406 | "src/xnnpack/AlignedAllocator.h", |
| 11407 | ] + MICROKERNEL_TEST_HDRS, |
| 11408 | deps = MICROKERNEL_TEST_DEPS, |
| 11409 | ) |
| 11410 | |
| 11411 | xnnpack_unit_test( |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 11412 | name = "qu8_dwconv_minmax_fp32_test", |
| 11413 | srcs = [ |
| 11414 | "test/qu8-dwconv-minmax-fp32.cc", |
| 11415 | "test/dwconv-microkernel-tester.h", |
| 11416 | "src/xnnpack/AlignedAllocator.h", |
| 11417 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 11418 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11419 | ) |
| 11420 | |
| 11421 | xnnpack_unit_test( |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 11422 | name = "qu8_dwconv_minmax_rndnu_test", |
| 11423 | srcs = [ |
| 11424 | "test/qu8-dwconv-minmax-rndnu.cc", |
| 11425 | "test/dwconv-microkernel-tester.h", |
| 11426 | "src/xnnpack/AlignedAllocator.h", |
| 11427 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 11428 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11429 | ) |
| 11430 | |
| 11431 | xnnpack_unit_test( |
| Marat Dukhan | fee66be | 2021-12-09 17:51:15 -0800 | [diff] [blame] | 11432 | name = "qu8_f32_vcvt_test", |
| 11433 | srcs = [ |
| 11434 | "test/qu8-f32-vcvt.cc", |
| 11435 | "test/vcvt-microkernel-tester.h", |
| 11436 | ] + MICROKERNEL_TEST_HDRS, |
| 11437 | deps = MICROKERNEL_TEST_DEPS, |
| 11438 | ) |
| 11439 | |
| 11440 | xnnpack_unit_test( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 11441 | name = "qu8_gavgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11442 | srcs = [ |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 11443 | "test/qu8-gavgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11444 | "test/gavgpool-microkernel-tester.h", |
| 11445 | "src/xnnpack/AlignedAllocator.h", |
| 11446 | ] + MICROKERNEL_TEST_HDRS, |
| 11447 | deps = MICROKERNEL_TEST_DEPS, |
| 11448 | ) |
| 11449 | |
| 11450 | xnnpack_unit_test( |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 11451 | name = "qu8_gemm_minmax_fp32_test", |
| 11452 | srcs = [ |
| 11453 | "test/qu8-gemm-minmax-fp32.cc", |
| 11454 | "test/gemm-microkernel-tester.h", |
| 11455 | "src/xnnpack/AlignedAllocator.h", |
| 11456 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11457 | shard_count = 10, |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 11458 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11459 | ) |
| 11460 | |
| 11461 | xnnpack_unit_test( |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11462 | name = "qu8_gemm_minmax_rndnu_test", |
| 11463 | srcs = [ |
| 11464 | "test/qu8-gemm-minmax-rndnu.cc", |
| 11465 | "test/gemm-microkernel-tester.h", |
| 11466 | "src/xnnpack/AlignedAllocator.h", |
| 11467 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 11468 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11469 | ) |
| 11470 | |
| 11471 | xnnpack_unit_test( |
| 11472 | name = "qu8_igemm_minmax_fp32_test", |
| 11473 | srcs = [ |
| 11474 | "test/qu8-igemm-minmax-fp32.cc", |
| 11475 | "test/gemm-microkernel-tester.h", |
| 11476 | "src/xnnpack/AlignedAllocator.h", |
| 11477 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11478 | shard_count = 10, |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11479 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11480 | ) |
| 11481 | |
| 11482 | xnnpack_unit_test( |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11483 | name = "qu8_igemm_minmax_rndnu_test", |
| 11484 | srcs = [ |
| 11485 | "test/qu8-igemm-minmax-rndnu.cc", |
| 11486 | "test/gemm-microkernel-tester.h", |
| 11487 | "src/xnnpack/AlignedAllocator.h", |
| 11488 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 11489 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11490 | ) |
| 11491 | |
| 11492 | xnnpack_unit_test( |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 11493 | name = "qu8_requantization_test", |
| 11494 | srcs = [ |
| 11495 | "src/xnnpack/requantization-stubs.h", |
| 11496 | "test/qu8-requantization.cc", |
| 11497 | "test/requantization-tester.h", |
| 11498 | ] + MICROKERNEL_TEST_HDRS, |
| 11499 | deps = MICROKERNEL_TEST_DEPS, |
| 11500 | ) |
| 11501 | |
| 11502 | xnnpack_unit_test( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 11503 | name = "qu8_vadd_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11504 | srcs = [ |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 11505 | "test/qu8-vadd-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11506 | "test/vadd-microkernel-tester.h", |
| 11507 | ] + MICROKERNEL_TEST_HDRS, |
| 11508 | deps = MICROKERNEL_TEST_DEPS, |
| 11509 | ) |
| 11510 | |
| 11511 | xnnpack_unit_test( |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 11512 | name = "qu8_vaddc_minmax_test", |
| 11513 | srcs = [ |
| 11514 | "test/qu8-vaddc-minmax.cc", |
| 11515 | "test/vaddc-microkernel-tester.h", |
| 11516 | ] + MICROKERNEL_TEST_HDRS, |
| 11517 | deps = MICROKERNEL_TEST_DEPS, |
| 11518 | ) |
| 11519 | |
| 11520 | xnnpack_unit_test( |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 11521 | name = "qu8_vmul_minmax_fp32_test", |
| 11522 | srcs = [ |
| 11523 | "test/qu8-vmul-minmax-fp32.cc", |
| 11524 | "test/vmul-microkernel-tester.h", |
| 11525 | ] + MICROKERNEL_TEST_HDRS, |
| 11526 | deps = MICROKERNEL_TEST_DEPS, |
| 11527 | ) |
| 11528 | |
| 11529 | xnnpack_unit_test( |
| 11530 | name = "qu8_vmulc_minmax_fp32_test", |
| 11531 | srcs = [ |
| 11532 | "test/qu8-vmulc-minmax-fp32.cc", |
| 11533 | "test/vmulc-microkernel-tester.h", |
| 11534 | ] + MICROKERNEL_TEST_HDRS, |
| 11535 | deps = MICROKERNEL_TEST_DEPS, |
| 11536 | ) |
| 11537 | |
| 11538 | xnnpack_unit_test( |
| Marat Dukhan | cdb42a5 | 2021-11-22 20:09:32 -0800 | [diff] [blame] | 11539 | name = "s8_ibilinear_test", |
| 11540 | srcs = [ |
| 11541 | "test/s8-ibilinear.cc", |
| 11542 | "test/ibilinear-microkernel-tester.h", |
| 11543 | "src/xnnpack/AlignedAllocator.h", |
| 11544 | ] + MICROKERNEL_TEST_HDRS, |
| 11545 | deps = MICROKERNEL_TEST_DEPS, |
| 11546 | ) |
| 11547 | |
| 11548 | xnnpack_unit_test( |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 11549 | name = "s8_maxpool_minmax_test", |
| 11550 | srcs = [ |
| 11551 | "test/s8-maxpool-minmax.cc", |
| 11552 | "test/maxpool-microkernel-tester.h", |
| 11553 | ] + MICROKERNEL_TEST_HDRS, |
| 11554 | deps = MICROKERNEL_TEST_DEPS, |
| 11555 | ) |
| 11556 | |
| 11557 | xnnpack_unit_test( |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 11558 | name = "s8_vclamp_test", |
| 11559 | srcs = [ |
| 11560 | "test/s8-vclamp.cc", |
| 11561 | "test/vunary-microkernel-tester.h", |
| 11562 | ] + MICROKERNEL_TEST_HDRS, |
| 11563 | deps = MICROKERNEL_TEST_DEPS, |
| 11564 | ) |
| 11565 | |
| 11566 | xnnpack_unit_test( |
| Marat Dukhan | cdb42a5 | 2021-11-22 20:09:32 -0800 | [diff] [blame] | 11567 | name = "u8_ibilinear_test", |
| 11568 | srcs = [ |
| 11569 | "test/u8-ibilinear.cc", |
| 11570 | "test/ibilinear-microkernel-tester.h", |
| 11571 | "src/xnnpack/AlignedAllocator.h", |
| 11572 | ] + MICROKERNEL_TEST_HDRS, |
| 11573 | deps = MICROKERNEL_TEST_DEPS, |
| 11574 | ) |
| 11575 | |
| 11576 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11577 | name = "u8_lut32norm_test", |
| 11578 | srcs = [ |
| 11579 | "test/u8-lut32norm.cc", |
| 11580 | "test/lut-norm-microkernel-tester.h", |
| 11581 | ] + MICROKERNEL_TEST_HDRS, |
| 11582 | deps = MICROKERNEL_TEST_DEPS, |
| 11583 | ) |
| 11584 | |
| 11585 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 11586 | name = "u8_maxpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11587 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 11588 | "test/u8-maxpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11589 | "test/maxpool-microkernel-tester.h", |
| 11590 | ] + MICROKERNEL_TEST_HDRS, |
| 11591 | deps = MICROKERNEL_TEST_DEPS, |
| 11592 | ) |
| 11593 | |
| 11594 | xnnpack_unit_test( |
| 11595 | name = "u8_rmax_test", |
| 11596 | srcs = [ |
| 11597 | "test/u8-rmax.cc", |
| 11598 | "test/rmax-microkernel-tester.h", |
| 11599 | ] + MICROKERNEL_TEST_HDRS, |
| 11600 | deps = MICROKERNEL_TEST_DEPS, |
| 11601 | ) |
| 11602 | |
| 11603 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 11604 | name = "u8_vclamp_test", |
| 11605 | srcs = [ |
| 11606 | "test/u8-vclamp.cc", |
| Marat Dukhan | a6c0516 | 2021-05-13 16:52:02 -0700 | [diff] [blame] | 11607 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 11608 | ] + MICROKERNEL_TEST_HDRS, |
| 11609 | deps = MICROKERNEL_TEST_DEPS, |
| 11610 | ) |
| 11611 | |
| 11612 | xnnpack_unit_test( |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 11613 | name = "x8_lut_test", |
| Yury Kartynnik | e784186 | 2020-11-04 18:22:18 -0800 | [diff] [blame] | 11614 | srcs = [ |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 11615 | "test/x8-lut.cc", |
| 11616 | "test/lut-microkernel-tester.h", |
| Yury Kartynnik | e784186 | 2020-11-04 18:22:18 -0800 | [diff] [blame] | 11617 | ] + MICROKERNEL_TEST_HDRS, |
| 11618 | deps = MICROKERNEL_TEST_DEPS, |
| 11619 | ) |
| 11620 | |
| 11621 | xnnpack_unit_test( |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 11622 | name = "x8_zip_test", |
| Marat Dukhan | 3bb3bfc | 2020-05-19 17:42:46 -0700 | [diff] [blame] | 11623 | srcs = [ |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 11624 | "test/x8-zip.cc", |
| 11625 | "test/zip-microkernel-tester.h", |
| 11626 | ] + MICROKERNEL_TEST_HDRS, |
| 11627 | deps = MICROKERNEL_TEST_DEPS, |
| 11628 | ) |
| 11629 | |
| 11630 | xnnpack_unit_test( |
| 11631 | name = "x32_depthtospace2d_chw2hwc_test", |
| 11632 | srcs = [ |
| 11633 | "test/x32-depthtospace2d-chw2hwc.cc", |
| 11634 | "test/depthtospace-microkernel-tester.h", |
| Marat Dukhan | 3bb3bfc | 2020-05-19 17:42:46 -0700 | [diff] [blame] | 11635 | ] + MICROKERNEL_TEST_HDRS, |
| 11636 | deps = MICROKERNEL_TEST_DEPS, |
| 11637 | ) |
| 11638 | |
| 11639 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11640 | name = "x32_packx_test", |
| 11641 | srcs = [ |
| 11642 | "test/x32-packx.cc", |
| 11643 | "test/pack-microkernel-tester.h", |
| 11644 | "src/xnnpack/AlignedAllocator.h", |
| 11645 | ] + MICROKERNEL_TEST_HDRS, |
| 11646 | deps = MICROKERNEL_TEST_DEPS, |
| 11647 | ) |
| 11648 | |
| 11649 | xnnpack_unit_test( |
| Alan Kelly | 1945f0b | 2021-12-24 01:26:45 -0800 | [diff] [blame] | 11650 | name = "x16_transpose_test", |
| 11651 | srcs = [ |
| 11652 | "test/x16-transpose.cc", |
| 11653 | "test/transpose-microkernel-tester.h", |
| 11654 | ] + MICROKERNEL_TEST_HDRS, |
| 11655 | deps = MICROKERNEL_TEST_DEPS, |
| 11656 | ) |
| 11657 | |
| 11658 | xnnpack_unit_test( |
| Alan Kelly | fda06cb | 2021-12-15 03:30:32 -0800 | [diff] [blame] | 11659 | name = "x32_transpose_test", |
| 11660 | srcs = [ |
| 11661 | "test/x32-transpose.cc", |
| 11662 | "test/transpose-microkernel-tester.h", |
| 11663 | ] + MICROKERNEL_TEST_HDRS, |
| 11664 | deps = MICROKERNEL_TEST_DEPS, |
| 11665 | ) |
| 11666 | |
| 11667 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11668 | name = "x32_unpool_test", |
| 11669 | srcs = [ |
| 11670 | "test/x32-unpool.cc", |
| 11671 | "test/unpool-microkernel-tester.h", |
| 11672 | ] + MICROKERNEL_TEST_HDRS, |
| 11673 | deps = MICROKERNEL_TEST_DEPS, |
| 11674 | ) |
| 11675 | |
| 11676 | xnnpack_unit_test( |
| 11677 | name = "x32_zip_test", |
| 11678 | srcs = [ |
| 11679 | "test/x32-zip.cc", |
| 11680 | "test/zip-microkernel-tester.h", |
| 11681 | ] + MICROKERNEL_TEST_HDRS, |
| 11682 | deps = MICROKERNEL_TEST_DEPS, |
| 11683 | ) |
| 11684 | |
| 11685 | xnnpack_unit_test( |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 11686 | name = "xx_fill_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11687 | srcs = [ |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 11688 | "test/xx-fill.cc", |
| 11689 | "test/fill-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11690 | ] + MICROKERNEL_TEST_HDRS, |
| 11691 | deps = MICROKERNEL_TEST_DEPS, |
| 11692 | ) |
| 11693 | |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 11694 | xnnpack_unit_test( |
| 11695 | name = "xx_pad_test", |
| 11696 | srcs = [ |
| 11697 | "test/xx-pad.cc", |
| 11698 | "test/pad-microkernel-tester.h", |
| 11699 | ] + MICROKERNEL_TEST_HDRS, |
| 11700 | deps = MICROKERNEL_TEST_DEPS, |
| 11701 | ) |
| 11702 | |
| Marat Dukhan | 20c3b92 | 2020-03-10 03:45:06 -0700 | [diff] [blame] | 11703 | ########################## Size tests for the library ######################### |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11704 | |
| 11705 | xnnpack_binary( |
| Marat Dukhan | 20c3b92 | 2020-03-10 03:45:06 -0700 | [diff] [blame] | 11706 | name = "operator_size_test", |
| 11707 | srcs = ["test/operator-size.c"], |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 11708 | deps = [":xnnpack_for_tfjs"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11709 | ) |
| 11710 | |
| Marat Dukhan | 20c3b92 | 2020-03-10 03:45:06 -0700 | [diff] [blame] | 11711 | xnnpack_binary( |
| 11712 | name = "subgraph_size_test", |
| 11713 | srcs = ["test/subgraph-size.c"], |
| 11714 | deps = [":XNNPACK"], |
| 11715 | ) |
| 11716 | |
| 11717 | ########################### Unit tests for operators ########################## |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11718 | |
| 11719 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 11720 | name = "abs_nc_test", |
| 11721 | srcs = [ |
| 11722 | "test/abs-nc.cc", |
| 11723 | "test/abs-operator-tester.h", |
| 11724 | ], |
| 11725 | deps = OPERATOR_TEST_DEPS, |
| 11726 | ) |
| 11727 | |
| 11728 | xnnpack_unit_test( |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 11729 | name = "add_nd_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 11730 | timeout = "moderate", |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 11731 | srcs = [ |
| 11732 | "test/add-nd.cc", |
| 11733 | "test/binary-elementwise-operator-tester.h", |
| 11734 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11735 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 11736 | ) |
| 11737 | |
| 11738 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11739 | name = "argmax_pooling_nhwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11740 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11741 | "test/argmax-pooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11742 | "test/argmax-pooling-operator-tester.h", |
| 11743 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11744 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11745 | ) |
| 11746 | |
| 11747 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11748 | name = "average_pooling_nhwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11749 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11750 | "test/average-pooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11751 | "test/average-pooling-operator-tester.h", |
| 11752 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11753 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11754 | ) |
| 11755 | |
| 11756 | xnnpack_unit_test( |
| Marat Dukhan | 64e5251 | 2020-06-09 13:41:16 -0700 | [diff] [blame] | 11757 | name = "bankers_rounding_nc_test", |
| 11758 | srcs = [ |
| 11759 | "test/bankers-rounding-nc.cc", |
| 11760 | "test/bankers-rounding-operator-tester.h", |
| 11761 | ], |
| 11762 | deps = OPERATOR_TEST_DEPS, |
| 11763 | ) |
| 11764 | |
| 11765 | xnnpack_unit_test( |
| 11766 | name = "ceiling_nc_test", |
| 11767 | srcs = [ |
| 11768 | "test/ceiling-nc.cc", |
| 11769 | "test/ceiling-operator-tester.h", |
| 11770 | ], |
| 11771 | deps = OPERATOR_TEST_DEPS, |
| 11772 | ) |
| 11773 | |
| 11774 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11775 | name = "channel_shuffle_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11776 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11777 | "test/channel-shuffle-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11778 | "test/channel-shuffle-operator-tester.h", |
| 11779 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11780 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11781 | ) |
| 11782 | |
| 11783 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11784 | name = "clamp_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11785 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11786 | "test/clamp-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11787 | "test/clamp-operator-tester.h", |
| 11788 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11789 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11790 | ) |
| 11791 | |
| 11792 | xnnpack_unit_test( |
| Marat Dukhan | 065b11e | 2020-05-22 09:49:41 -0700 | [diff] [blame] | 11793 | name = "constant_pad_nd_test", |
| 11794 | srcs = [ |
| 11795 | "test/constant-pad-nd.cc", |
| 11796 | "test/constant-pad-operator-tester.h", |
| 11797 | ], |
| 11798 | deps = OPERATOR_TEST_DEPS, |
| 11799 | ) |
| 11800 | |
| 11801 | xnnpack_unit_test( |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 11802 | name = "convert_nc_test", |
| 11803 | srcs = [ |
| 11804 | "test/convert-nc.cc", |
| 11805 | "test/convert-operator-tester.h", |
| 11806 | ], |
| 11807 | deps = OPERATOR_TEST_DEPS, |
| 11808 | ) |
| 11809 | |
| 11810 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11811 | name = "convolution_nhwc_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 11812 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11813 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11814 | "test/convolution-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11815 | "test/convolution-operator-tester.h", |
| 11816 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11817 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11818 | ) |
| 11819 | |
| 11820 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11821 | name = "convolution_nchw_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 11822 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11823 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11824 | "test/convolution-nchw.cc", |
| 11825 | "test/convolution-operator-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11826 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11827 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11828 | ) |
| 11829 | |
| 11830 | xnnpack_unit_test( |
| Marat Dukhan | 4e21b27 | 2020-06-04 18:45:01 -0700 | [diff] [blame] | 11831 | name = "copy_nc_test", |
| 11832 | srcs = [ |
| 11833 | "test/copy-nc.cc", |
| 11834 | "test/copy-operator-tester.h", |
| 11835 | ], |
| 11836 | deps = OPERATOR_TEST_DEPS, |
| 11837 | ) |
| 11838 | |
| 11839 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11840 | name = "deconvolution_nhwc_test", |
| Artsiom Ablavatski | c1aa297 | 2020-12-08 11:23:34 -0800 | [diff] [blame] | 11841 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11842 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11843 | "test/deconvolution-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11844 | "test/deconvolution-operator-tester.h", |
| 11845 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11846 | shard_count = 10, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11847 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11848 | ) |
| 11849 | |
| 11850 | xnnpack_unit_test( |
| Marat Dukhan | 188d104 | 2020-11-24 23:39:40 -0800 | [diff] [blame] | 11851 | name = "depth_to_space_nchw2nhwc_test", |
| Artsiom Ablavatski | 0f1dc18 | 2020-11-05 19:21:50 -0800 | [diff] [blame] | 11852 | srcs = [ |
| Marat Dukhan | 188d104 | 2020-11-24 23:39:40 -0800 | [diff] [blame] | 11853 | "test/depth-to-space-nchw2nhwc.cc", |
| Artsiom Ablavatski | 0f1dc18 | 2020-11-05 19:21:50 -0800 | [diff] [blame] | 11854 | "test/depth-to-space-operator-tester.h", |
| 11855 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| 11856 | deps = OPERATOR_TEST_DEPS, |
| 11857 | ) |
| 11858 | |
| 11859 | xnnpack_unit_test( |
| Marat Dukhan | 0e52117 | 2020-11-25 13:10:04 -0800 | [diff] [blame] | 11860 | name = "depth_to_space_nhwc_test", |
| 11861 | srcs = [ |
| 11862 | "test/depth-to-space-nhwc.cc", |
| 11863 | "test/depth-to-space-operator-tester.h", |
| 11864 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| 11865 | deps = OPERATOR_TEST_DEPS, |
| 11866 | ) |
| 11867 | |
| 11868 | xnnpack_unit_test( |
| Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 11869 | name = "divide_nd_test", |
| 11870 | srcs = [ |
| 11871 | "test/binary-elementwise-operator-tester.h", |
| 11872 | "test/divide-nd.cc", |
| 11873 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11874 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 11875 | ) |
| 11876 | |
| 11877 | xnnpack_unit_test( |
| Marat Dukhan | b6bd4bc | 2020-12-01 17:01:40 -0800 | [diff] [blame] | 11878 | name = "elu_nc_test", |
| 11879 | srcs = [ |
| 11880 | "test/elu-nc.cc", |
| 11881 | "test/elu-operator-tester.h", |
| 11882 | ], |
| 11883 | deps = OPERATOR_TEST_DEPS, |
| 11884 | ) |
| 11885 | |
| 11886 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11887 | name = "fully_connected_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11888 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11889 | "test/fully-connected-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11890 | "test/fully-connected-operator-tester.h", |
| 11891 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11892 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11893 | ) |
| 11894 | |
| 11895 | xnnpack_unit_test( |
| Marat Dukhan | 64e5251 | 2020-06-09 13:41:16 -0700 | [diff] [blame] | 11896 | name = "floor_nc_test", |
| 11897 | srcs = [ |
| 11898 | "test/floor-nc.cc", |
| 11899 | "test/floor-operator-tester.h", |
| 11900 | ], |
| 11901 | deps = OPERATOR_TEST_DEPS, |
| 11902 | ) |
| 11903 | |
| 11904 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11905 | name = "global_average_pooling_nwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11906 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11907 | "test/global-average-pooling-nwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11908 | "test/global-average-pooling-operator-tester.h", |
| Marat Dukhan | ef61d02 | 2020-06-19 13:54:49 -0700 | [diff] [blame] | 11909 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11910 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11911 | ) |
| 11912 | |
| 11913 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11914 | name = "global_average_pooling_ncw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11915 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11916 | "test/global-average-pooling-ncw.cc", |
| 11917 | "test/global-average-pooling-operator-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11918 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11919 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11920 | ) |
| 11921 | |
| 11922 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11923 | name = "hardswish_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11924 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11925 | "test/hardswish-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11926 | "test/hardswish-operator-tester.h", |
| 11927 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11928 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11929 | ) |
| 11930 | |
| 11931 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11932 | name = "leaky_relu_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11933 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11934 | "test/leaky-relu-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11935 | "test/leaky-relu-operator-tester.h", |
| 11936 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11937 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11938 | ) |
| 11939 | |
| 11940 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11941 | name = "max_pooling_nhwc_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 11942 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11943 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11944 | "test/max-pooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11945 | "test/max-pooling-operator-tester.h", |
| 11946 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11947 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11948 | ) |
| 11949 | |
| 11950 | xnnpack_unit_test( |
| Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 11951 | name = "maximum_nd_test", |
| 11952 | srcs = [ |
| 11953 | "test/binary-elementwise-operator-tester.h", |
| 11954 | "test/maximum-nd.cc", |
| 11955 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11956 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 11957 | ) |
| 11958 | |
| 11959 | xnnpack_unit_test( |
| 11960 | name = "minimum_nd_test", |
| 11961 | srcs = [ |
| 11962 | "test/binary-elementwise-operator-tester.h", |
| 11963 | "test/minimum-nd.cc", |
| 11964 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11965 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 11966 | ) |
| 11967 | |
| 11968 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11969 | name = "multiply_nd_test", |
| Marat Dukhan | cf557d4 | 2021-08-10 23:28:38 -0700 | [diff] [blame] | 11970 | timeout = "moderate", |
| Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 11971 | srcs = [ |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 11972 | "test/binary-elementwise-operator-tester.h", |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11973 | "test/multiply-nd.cc", |
| Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 11974 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11975 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 11976 | ) |
| 11977 | |
| 11978 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 11979 | name = "negate_nc_test", |
| 11980 | srcs = [ |
| 11981 | "test/negate-nc.cc", |
| 11982 | "test/negate-operator-tester.h", |
| 11983 | ], |
| 11984 | deps = OPERATOR_TEST_DEPS, |
| 11985 | ) |
| 11986 | |
| 11987 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11988 | name = "prelu_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11989 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11990 | "test/prelu-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11991 | "test/prelu-operator-tester.h", |
| 11992 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 11993 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11994 | ) |
| 11995 | |
| 11996 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11997 | name = "resize_bilinear_nhwc_test", |
| Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 11998 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 11999 | "test/resize-bilinear-nhwc.cc", |
| Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 12000 | "test/resize-bilinear-operator-tester.h", |
| 12001 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12002 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 12003 | ) |
| 12004 | |
| 12005 | xnnpack_unit_test( |
| Artsiom Ablavatski | 9791810 | 2020-10-27 15:52:59 -0700 | [diff] [blame] | 12006 | name = "resize_bilinear_nchw_test", |
| 12007 | srcs = [ |
| 12008 | "test/resize-bilinear-nchw.cc", |
| 12009 | "test/resize-bilinear-operator-tester.h", |
| 12010 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| 12011 | deps = OPERATOR_TEST_DEPS, |
| 12012 | ) |
| 12013 | |
| 12014 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12015 | name = "sigmoid_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12016 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12017 | "test/sigmoid-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12018 | "test/sigmoid-operator-tester.h", |
| 12019 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12020 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12021 | ) |
| 12022 | |
| 12023 | xnnpack_unit_test( |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 12024 | name = "softmax_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12025 | srcs = [ |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 12026 | "test/softmax-nc.cc", |
| 12027 | "test/softmax-operator-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12028 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12029 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12030 | ) |
| 12031 | |
| 12032 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 12033 | name = "square_nc_test", |
| 12034 | srcs = [ |
| 12035 | "test/square-nc.cc", |
| 12036 | "test/square-operator-tester.h", |
| 12037 | ], |
| 12038 | deps = OPERATOR_TEST_DEPS, |
| 12039 | ) |
| 12040 | |
| 12041 | xnnpack_unit_test( |
| Marat Dukhan | 6804bbd | 2020-06-30 19:26:11 -0700 | [diff] [blame] | 12042 | name = "square_root_nc_test", |
| 12043 | srcs = [ |
| 12044 | "test/square-root-nc.cc", |
| 12045 | "test/square-root-operator-tester.h", |
| 12046 | ], |
| 12047 | deps = OPERATOR_TEST_DEPS, |
| 12048 | ) |
| 12049 | |
| 12050 | xnnpack_unit_test( |
| Marat Dukhan | f739926 | 2020-06-05 10:58:44 -0700 | [diff] [blame] | 12051 | name = "squared_difference_nd_test", |
| 12052 | srcs = [ |
| 12053 | "test/binary-elementwise-operator-tester.h", |
| 12054 | "test/squared-difference-nd.cc", |
| 12055 | ], |
| 12056 | deps = OPERATOR_TEST_DEPS, |
| 12057 | ) |
| 12058 | |
| 12059 | xnnpack_unit_test( |
| Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 12060 | name = "subtract_nd_test", |
| 12061 | srcs = [ |
| 12062 | "test/binary-elementwise-operator-tester.h", |
| 12063 | "test/subtract-nd.cc", |
| 12064 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12065 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 12066 | ) |
| 12067 | |
| 12068 | xnnpack_unit_test( |
| Marat Dukhan | 5de7bc0 | 2021-09-09 19:04:01 -0700 | [diff] [blame] | 12069 | name = "tanh_nc_test", |
| 12070 | srcs = [ |
| 12071 | "test/tanh-nc.cc", |
| 12072 | "test/tanh-operator-tester.h", |
| 12073 | ], |
| 12074 | deps = OPERATOR_TEST_DEPS, |
| 12075 | ) |
| 12076 | |
| 12077 | xnnpack_unit_test( |
| Marat Dukhan | 64e5251 | 2020-06-09 13:41:16 -0700 | [diff] [blame] | 12078 | name = "truncation_nc_test", |
| 12079 | srcs = [ |
| 12080 | "test/truncation-nc.cc", |
| 12081 | "test/truncation-operator-tester.h", |
| 12082 | ], |
| 12083 | deps = OPERATOR_TEST_DEPS, |
| 12084 | ) |
| 12085 | |
| 12086 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12087 | name = "unpooling_nhwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12088 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12089 | "test/unpooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12090 | "test/unpooling-operator-tester.h", |
| 12091 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12092 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12093 | ) |
| 12094 | |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 12095 | ############################### Misc unit tests ############################### |
| 12096 | |
| 12097 | xnnpack_unit_test( |
| 12098 | name = "memory_planner_test", |
| 12099 | srcs = [ |
| 12100 | "test/memory-planner-test.cc", |
| 12101 | ], |
| 12102 | deps = [ |
| 12103 | ":XNNPACK", |
| 12104 | ":memory_planner", |
| 12105 | ], |
| 12106 | ) |
| 12107 | |
| XNNPACK Team | ab8c4c8 | 2020-10-09 08:05:51 -0700 | [diff] [blame] | 12108 | xnnpack_unit_test( |
| 12109 | name = "subgraph_nchw_test", |
| 12110 | srcs = [ |
| 12111 | "src/xnnpack/subgraph.h", |
| 12112 | "test/subgraph-nchw.cc", |
| 12113 | "test/subgraph-tester.h", |
| 12114 | ], |
| 12115 | deps = [ |
| 12116 | ":XNNPACK", |
| 12117 | ], |
| 12118 | ) |
| 12119 | |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 12120 | xnnpack_unit_test( |
| 12121 | name = "aarch32_assembler_test", |
| 12122 | srcs = [ |
| 12123 | "test/aarch32-assembler.cc", |
| 12124 | ], |
| 12125 | deps = [ |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 12126 | ":XNNPACK", |
| 12127 | ":jit_test_mode", |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 12128 | ], |
| 12129 | ) |
| 12130 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12131 | ############################# Build configurations ############################# |
| 12132 | |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 12133 | # Enables usage of assembly kernels. |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12134 | config_setting( |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 12135 | name = "xnn_enable_assembly_explicit_true", |
| 12136 | define_values = {"xnn_enable_assembly": "true"}, |
| 12137 | ) |
| 12138 | |
| 12139 | # Disables usage of assembly kernels. |
| 12140 | config_setting( |
| 12141 | name = "xnn_enable_assembly_explicit_false", |
| 12142 | define_values = {"xnn_enable_assembly": "false"}, |
| 12143 | ) |
| 12144 | |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 12145 | # Enables usage of sparse inference. |
| 12146 | config_setting( |
| 12147 | name = "xnn_enable_sparse_explicit_true", |
| 12148 | define_values = {"xnn_enable_sparse": "true"}, |
| 12149 | ) |
| 12150 | |
| 12151 | # Disables usage of sparse inference. |
| 12152 | config_setting( |
| 12153 | name = "xnn_enable_sparse_explicit_false", |
| 12154 | define_values = {"xnn_enable_sparse": "false"}, |
| 12155 | ) |
| 12156 | |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 12157 | # Disables usage of HMP-aware optimizations. |
| 12158 | config_setting( |
| 12159 | name = "xnn_enable_hmp_explicit_false", |
| 12160 | define_values = {"xnn_enable_hmp": "false"}, |
| 12161 | ) |
| 12162 | |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 12163 | # Enable usage of optimized memory allocation |
| 12164 | config_setting( |
| 12165 | name = "xnn_enable_memopt_explicit_true", |
| Marat Dukhan | 03f4621 | 2021-03-30 21:29:49 -0700 | [diff] [blame] | 12166 | define_values = {"xnn_enable_memopt": "true"}, |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 12167 | ) |
| 12168 | |
| 12169 | # Disable usage of optimized memory allocation |
| 12170 | config_setting( |
| 12171 | name = "xnn_enable_memopt_explicit_false", |
| Marat Dukhan | 03f4621 | 2021-03-30 21:29:49 -0700 | [diff] [blame] | 12172 | define_values = {"xnn_enable_memopt": "false"}, |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 12173 | ) |
| 12174 | |
| Marat Dukhan | b939cdb | 2021-03-30 18:51:51 -0700 | [diff] [blame] | 12175 | # Enable QS8 inference in TFLite-specific version |
| 12176 | config_setting( |
| 12177 | name = "xnn_enable_qs8_explicit_true", |
| 12178 | define_values = {"xnn_enable_qs8": "true"}, |
| 12179 | ) |
| 12180 | |
| 12181 | # Disable QS8 inference in TFLite-specific version |
| 12182 | config_setting( |
| 12183 | name = "xnn_enable_qs8_explicit_false", |
| 12184 | define_values = {"xnn_enable_qs8": "false"}, |
| 12185 | ) |
| 12186 | |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 12187 | # Enable QU8 inference in TFLite-specific version |
| 12188 | config_setting( |
| 12189 | name = "xnn_enable_qu8_explicit_true", |
| 12190 | define_values = {"xnn_enable_qu8": "true"}, |
| 12191 | ) |
| 12192 | |
| 12193 | # Disable QU8 inference in TFLite-specific version |
| 12194 | config_setting( |
| 12195 | name = "xnn_enable_qu8_explicit_false", |
| 12196 | define_values = {"xnn_enable_qu8": "false"}, |
| 12197 | ) |
| 12198 | |
| Marat Dukhan | 189c1d0 | 2021-09-03 15:39:54 -0700 | [diff] [blame] | 12199 | # Target Chrome M87 instructions in WAsm SIMD build |
| 12200 | config_setting( |
| 12201 | name = "xnn_wasmsimd_version_m87", |
| 12202 | define_values = {"xnn_wasmsimd_version": "m87"}, |
| 12203 | ) |
| 12204 | |
| 12205 | # Target Chrome M88 instructions in WAsm SIMD build |
| 12206 | config_setting( |
| 12207 | name = "xnn_wasmsimd_version_m88", |
| 12208 | define_values = {"xnn_wasmsimd_version": "m88"}, |
| 12209 | ) |
| 12210 | |
| 12211 | # Target Chrome M91 instructions in WAsm SIMD build |
| 12212 | config_setting( |
| 12213 | name = "xnn_wasmsimd_version_m91", |
| 12214 | define_values = {"xnn_wasmsimd_version": "m91"}, |
| 12215 | ) |
| 12216 | |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 12217 | # Builds with -c dbg |
| 12218 | config_setting( |
| 12219 | name = "debug_build", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12220 | values = { |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 12221 | "compilation_mode": "dbg", |
| 12222 | }, |
| 12223 | ) |
| 12224 | |
| 12225 | # Builds with -c opt |
| 12226 | config_setting( |
| 12227 | name = "optimized_build", |
| 12228 | values = { |
| 12229 | "compilation_mode": "opt", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12230 | }, |
| 12231 | ) |
| 12232 | |
| 12233 | config_setting( |
| Marat Dukhan | 52e4443 | 2021-08-20 11:58:11 -0700 | [diff] [blame] | 12234 | name = "linux_arm64", |
| 12235 | values = {"cpu": "aarch64"}, |
| 12236 | ) |
| 12237 | |
| 12238 | config_setting( |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 12239 | name = "linux_k8", |
| 12240 | values = {"cpu": "k8"}, |
| 12241 | ) |
| 12242 | |
| 12243 | config_setting( |
| Marat Dukhan | 582094e | 2020-04-30 17:21:25 -0700 | [diff] [blame] | 12244 | name = "linux_arm", |
| 12245 | values = {"cpu": "arm"}, |
| Marat Dukhan | 4e45e66 | 2019-10-03 15:40:24 -0700 | [diff] [blame] | 12246 | ) |
| 12247 | |
| 12248 | config_setting( |
| Marat Dukhan | f0bd4de | 2020-06-15 15:53:19 -0700 | [diff] [blame] | 12249 | name = "linux_armeabi", |
| 12250 | values = {"cpu": "armeabi"}, |
| 12251 | ) |
| 12252 | |
| 12253 | config_setting( |
| Terry Heo | 68eef3f | 2020-04-13 22:53:52 -0700 | [diff] [blame] | 12254 | name = "linux_armhf", |
| 12255 | values = {"cpu": "armhf"}, |
| 12256 | ) |
| 12257 | |
| 12258 | config_setting( |
| Marat Dukhan | a720e93 | 2020-06-10 13:01:11 -0700 | [diff] [blame] | 12259 | name = "linux_armv7a", |
| 12260 | values = {"cpu": "armv7a"}, |
| 12261 | ) |
| 12262 | |
| 12263 | config_setting( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12264 | name = "android", |
| 12265 | values = {"crosstool_top": "//external:android/crosstool"}, |
| 12266 | ) |
| 12267 | |
| 12268 | config_setting( |
| 12269 | name = "android_armv7", |
| 12270 | values = { |
| 12271 | "crosstool_top": "//external:android/crosstool", |
| 12272 | "cpu": "armeabi-v7a", |
| 12273 | }, |
| 12274 | ) |
| 12275 | |
| 12276 | config_setting( |
| 12277 | name = "android_arm64", |
| 12278 | values = { |
| 12279 | "crosstool_top": "//external:android/crosstool", |
| 12280 | "cpu": "arm64-v8a", |
| 12281 | }, |
| 12282 | ) |
| 12283 | |
| 12284 | config_setting( |
| 12285 | name = "android_x86", |
| 12286 | values = { |
| 12287 | "crosstool_top": "//external:android/crosstool", |
| 12288 | "cpu": "x86", |
| 12289 | }, |
| 12290 | ) |
| 12291 | |
| 12292 | config_setting( |
| 12293 | name = "android_x86_64", |
| 12294 | values = { |
| 12295 | "crosstool_top": "//external:android/crosstool", |
| 12296 | "cpu": "x86_64", |
| 12297 | }, |
| 12298 | ) |
| 12299 | |
| 12300 | config_setting( |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 12301 | name = "windows_x86_64", |
| 12302 | values = {"cpu": "x64_windows"}, |
| Marat Dukhan | 9fe932e | 2020-04-11 17:14:15 -0700 | [diff] [blame] | 12303 | ) |
| 12304 | |
| 12305 | config_setting( |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 12306 | name = "windows_x86_64_clang", |
| 12307 | values = { |
| 12308 | "compiler": "clang-cl", |
| 12309 | "cpu": "x64_windows", |
| 12310 | }, |
| 12311 | ) |
| 12312 | |
| 12313 | config_setting( |
| 12314 | name = "windows_x86_64_mingw", |
| 12315 | values = { |
| 12316 | "compiler": "mingw-gcc", |
| 12317 | "cpu": "x64_windows", |
| 12318 | }, |
| 12319 | ) |
| 12320 | |
| 12321 | config_setting( |
| 12322 | name = "windows_x86_64_msys", |
| 12323 | values = { |
| 12324 | "compiler": "msys-gcc", |
| 12325 | "cpu": "x64_windows", |
| 12326 | }, |
| Marat Dukhan | 9fe932e | 2020-04-11 17:14:15 -0700 | [diff] [blame] | 12327 | ) |
| 12328 | |
| 12329 | config_setting( |
| Marat Dukhan | 885ca24 | 2019-10-07 09:17:32 -0700 | [diff] [blame] | 12330 | name = "macos_x86_64", |
| 12331 | values = { |
| 12332 | "apple_platform_type": "macos", |
| 12333 | "cpu": "darwin", |
| 12334 | }, |
| 12335 | ) |
| 12336 | |
| 12337 | config_setting( |
| Simon Maurer | ae33ab8 | 2021-03-03 23:38:22 +0100 | [diff] [blame] | 12338 | name = "macos_arm64", |
| 12339 | values = { |
| 12340 | "apple_platform_type": "macos", |
| 12341 | "cpu": "darwin_arm64", |
| 12342 | }, |
| 12343 | ) |
| 12344 | |
| 12345 | config_setting( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12346 | name = "emscripten", |
| XNNPACK Team | 3bfbdaf | 2021-03-29 15:26:23 -0700 | [diff] [blame] | 12347 | values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"}, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12348 | ) |
| 12349 | |
| 12350 | config_setting( |
| 12351 | name = "emscripten_wasm", |
| 12352 | values = { |
| XNNPACK Team | 3bfbdaf | 2021-03-29 15:26:23 -0700 | [diff] [blame] | 12353 | "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12354 | "cpu": "wasm", |
| 12355 | }, |
| 12356 | ) |
| 12357 | |
| 12358 | config_setting( |
| 12359 | name = "emscripten_wasmsimd", |
| 12360 | values = { |
| XNNPACK Team | 3bfbdaf | 2021-03-29 15:26:23 -0700 | [diff] [blame] | 12361 | "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12362 | "cpu": "wasm", |
| Marat Dukhan | 3220551 | 2021-12-29 14:26:50 -0800 | [diff] [blame] | 12363 | "features": "wasm_simd", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12364 | }, |
| 12365 | ) |
| 12366 | |
| 12367 | config_setting( |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 12368 | name = "emscripten_wasmrelaxedsimd", |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12369 | values = { |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 12370 | "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12371 | "cpu": "wasm", |
| Marat Dukhan | 3220551 | 2021-12-29 14:26:50 -0800 | [diff] [blame] | 12372 | "features": "wasm_simd", |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12373 | "copt": "-mrelaxed-simd", |
| Marat Dukhan | 3220551 | 2021-12-29 14:26:50 -0800 | [diff] [blame] | 12374 | "linkopt": "-mrelaxed-simd", |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12375 | }, |
| 12376 | ) |
| 12377 | |
| 12378 | config_setting( |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12379 | name = "ios_armv7", |
| 12380 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12381 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12382 | "cpu": "ios_armv7", |
| 12383 | }, |
| 12384 | ) |
| 12385 | |
| 12386 | config_setting( |
| 12387 | name = "ios_arm64", |
| 12388 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12389 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12390 | "cpu": "ios_arm64", |
| 12391 | }, |
| 12392 | ) |
| 12393 | |
| 12394 | config_setting( |
| 12395 | name = "ios_arm64e", |
| 12396 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12397 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12398 | "cpu": "ios_arm64e", |
| 12399 | }, |
| 12400 | ) |
| 12401 | |
| 12402 | config_setting( |
| 12403 | name = "ios_x86", |
| 12404 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12405 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12406 | "cpu": "ios_i386", |
| 12407 | }, |
| 12408 | ) |
| 12409 | |
| 12410 | config_setting( |
| 12411 | name = "ios_x86_64", |
| 12412 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12413 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12414 | "cpu": "ios_x86_64", |
| 12415 | }, |
| 12416 | ) |
| 12417 | |
| 12418 | config_setting( |
| 12419 | name = "watchos_armv7k", |
| 12420 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12421 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12422 | "cpu": "watchos_armv7k", |
| 12423 | }, |
| 12424 | ) |
| 12425 | |
| 12426 | config_setting( |
| 12427 | name = "watchos_arm64_32", |
| 12428 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12429 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12430 | "cpu": "watchos_arm64_32", |
| 12431 | }, |
| 12432 | ) |
| 12433 | |
| 12434 | config_setting( |
| 12435 | name = "watchos_x86", |
| 12436 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12437 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12438 | "cpu": "watchos_i386", |
| 12439 | }, |
| 12440 | ) |
| 12441 | |
| 12442 | config_setting( |
| 12443 | name = "watchos_x86_64", |
| 12444 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12445 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12446 | "cpu": "watchos_x86_64", |
| 12447 | }, |
| 12448 | ) |
| 12449 | |
| 12450 | config_setting( |
| 12451 | name = "tvos_arm64", |
| 12452 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12453 | "apple_platform_type": "tvos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12454 | "cpu": "tvos_arm64", |
| 12455 | }, |
| 12456 | ) |
| 12457 | |
| 12458 | config_setting( |
| 12459 | name = "tvos_x86_64", |
| 12460 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12461 | "apple_platform_type": "tvos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12462 | "cpu": "tvos_x86_64", |
| 12463 | }, |
| 12464 | ) |