blob: 6e072a25c2bc9b08fc50f9ca5f635c26f9da7c2d [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
Marat Dukhan2c724952021-07-27 18:46:30 -070024 ":bench_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -070025 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
Marat Dukhan2c724952021-07-27 18:46:30 -070034 ":bench_microkernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -070035 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan2c724952021-07-27 18:46:30 -070040 ":test_microkernels",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhanf6c991e2021-09-09 01:10:40 -070067 "src/operators/lut-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070068 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070072 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070073 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070074 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070075]
76
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070077SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070078 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070079 "src/subgraph/add2.c",
80 "src/subgraph/argmax-pooling-2d.c",
81 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070082 "src/subgraph/bankers-rounding.c",
83 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070084 "src/subgraph/clamp.c",
Marat Dukhan20483c72021-12-05 09:56:40 -080085 "src/subgraph/convert.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070086 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhane0f15ad2021-12-22 15:15:25 -0800125PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS = [
126 "src/params-init.c",
127 "src/u8-lut32norm/scalar.c",
128 "src/x8-lut/gen/lut-scalar-x4.c",
129 "src/x32-depthtospace2d-chw2hwc/scalar.c",
130 "src/xx-copy/memcpy.c",
131]
132
133PROD_SCALAR_AARCH32_MICROKERNEL_SRCS = [
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700134 "src/f16-f32-vcvt/gen/vcvt-scalar-float-x4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700135 "src/f32-argmaxpool/4x-scalar-c1.c",
136 "src/f32-argmaxpool/9p8x-scalar-c1.c",
137 "src/f32-argmaxpool/9x-scalar-c1.c",
138 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
139 "src/f32-avgpool/9x-minmax-scalar-c1.c",
140 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
141 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
142 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700143 "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700144 "src/f32-dwconv/gen/up1x3-scalar-acc2.c",
Frank Barchard66ae2572021-11-02 17:36:21 -0700145 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700146 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
147 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
148 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
149 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
150 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700151 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700152 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700154 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
Marat Dukhana0c61682021-11-10 19:23:41 -0800155 "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700156 "src/f32-gavgpool-cw/scalar-x1.c",
157 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
158 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
159 "src/f32-gemm/gen/1x4-minmax-scalar.c",
160 "src/f32-gemm/gen/1x4-relu-scalar.c",
161 "src/f32-gemm/gen/1x4-scalar.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700162 "src/f32-gemm/gen/4x2-minmax-scalar.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700163 "src/f32-gemm/gen/4x2-scalar.c",
164 "src/f32-gemm/gen/4x4-minmax-scalar.c",
165 "src/f32-gemm/gen/4x4-relu-scalar.c",
166 "src/f32-gemm/gen/4x4-scalar.c",
167 "src/f32-ibilinear-chw/gen/scalar-p4.c",
168 "src/f32-ibilinear/gen/scalar-c2.c",
169 "src/f32-igemm/gen/1x4-minmax-scalar.c",
170 "src/f32-igemm/gen/1x4-relu-scalar.c",
171 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700172 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700173 "src/f32-igemm/gen/4x2-scalar.c",
174 "src/f32-igemm/gen/4x4-minmax-scalar.c",
175 "src/f32-igemm/gen/4x4-relu-scalar.c",
176 "src/f32-igemm/gen/4x4-scalar.c",
177 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
178 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
179 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
180 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhan430b1732021-12-04 02:53:12 -0800181 "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c",
Marat Dukhan430b1732021-12-04 02:53:12 -0800182 "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700183 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
184 "src/f32-rmax/scalar.c",
185 "src/f32-spmm/gen/8x1-minmax-scalar.c",
186 "src/f32-spmm/gen/8x2-minmax-scalar.c",
187 "src/f32-spmm/gen/8x4-minmax-scalar.c",
188 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
189 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
190 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700191 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700192 "src/f32-vbinary/gen/vmax-scalar-x8.c",
193 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
194 "src/f32-vbinary/gen/vmin-scalar-x8.c",
195 "src/f32-vbinary/gen/vminc-scalar-x8.c",
196 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
197 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
198 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
Marat Dukhane0f15ad2021-12-22 15:15:25 -0800199 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
200 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
201 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
202 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
203 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
204 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
205 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
206 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
207 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
208 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
209 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
210 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
211 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
212 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
213 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
214 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
215 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
216 "src/f32-vunary/gen/vabs-scalar-x4.c",
217 "src/f32-vunary/gen/vneg-scalar-x4.c",
218 "src/f32-vunary/gen/vsqr-scalar-x4.c",
219 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
220 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
221 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
222 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
223 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
224 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
225 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
226 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
227 "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c",
228 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
229 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
230 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
231 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
232 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
233 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
234 "src/qs8-vadd/gen/minmax-scalar-x1.c",
235 "src/qs8-vaddc/gen/minmax-scalar-x1.c",
236 "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c",
237 "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c",
238 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
239 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
240 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
241 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
242 "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c",
243 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
244 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
245 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
246 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
247 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
248 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
249 "src/qu8-vadd/gen/minmax-scalar-x1.c",
250 "src/qu8-vaddc/gen/minmax-scalar-x1.c",
251 "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c",
252 "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c",
253 "src/s8-ibilinear/gen/scalar-c1.c",
254 "src/s8-maxpool/9p8x-minmax-scalar-c1.c",
255 "src/s8-vclamp/scalar-x4.c",
256 "src/u8-ibilinear/gen/scalar-c1.c",
257 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
258 "src/u8-rmax/scalar.c",
259 "src/u8-vclamp/scalar-x4.c",
260 "src/x8-zip/x2-scalar.c",
261 "src/x8-zip/x3-scalar.c",
262 "src/x8-zip/x4-scalar.c",
263 "src/x8-zip/xm-scalar.c",
264 "src/x32-packx/x2-scalar.c",
265 "src/x32-packx/x3-scalar.c",
266 "src/x32-packx/x4-scalar.c",
267 "src/x32-unpool/scalar.c",
268 "src/x32-zip/x2-scalar.c",
269 "src/x32-zip/x3-scalar.c",
270 "src/x32-zip/x4-scalar.c",
271 "src/x32-zip/xm-scalar.c",
272 "src/xx-fill/scalar-x16.c",
273 "src/xx-pad/scalar.c",
274]
275
276PROD_SCALAR_WASM_MICROKERNEL_SRCS = [
277 "src/f16-f32-vcvt/gen/vcvt-scalar-float-x1.c",
278 "src/f32-argmaxpool/4x-scalar-c1.c",
279 "src/f32-argmaxpool/9p8x-scalar-c1.c",
280 "src/f32-argmaxpool/9x-scalar-c1.c",
281 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
282 "src/f32-avgpool/9x-minmax-scalar-c1.c",
283 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
284 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
285 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
286 "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c",
287 "src/f32-dwconv/gen/up1x3-scalar-acc2.c",
288 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
289 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
290 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
291 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
292 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
293 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
294 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
295 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
296 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
297 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
298 "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c",
299 "src/f32-gavgpool-cw/scalar-x1.c",
300 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
301 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
302 "src/f32-gemm/gen/2x4-minmax-scalar.c",
303 "src/f32-gemm/gen/2x4-relu-scalar.c",
304 "src/f32-gemm/gen/2x4-scalar.c",
305 "src/f32-ibilinear-chw/gen/scalar-p4.c",
306 "src/f32-ibilinear/gen/scalar-c2.c",
307 "src/f32-igemm/gen/2x4-minmax-scalar.c",
308 "src/f32-igemm/gen/2x4-relu-scalar.c",
309 "src/f32-igemm/gen/2x4-scalar.c",
310 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
311 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
312 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
313 "src/f32-prelu/gen/scalar-2x4.c",
314 "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c",
315 "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c",
316 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
317 "src/f32-rmax/scalar.c",
318 "src/f32-spmm/gen/8x1-minmax-scalar.c",
319 "src/f32-spmm/gen/8x2-minmax-scalar.c",
320 "src/f32-spmm/gen/8x4-minmax-scalar.c",
321 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
322 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
323 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
324 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
325 "src/f32-vbinary/gen/vmax-scalar-x8.c",
326 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
327 "src/f32-vbinary/gen/vmin-scalar-x8.c",
328 "src/f32-vbinary/gen/vminc-scalar-x8.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
330 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700331 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
332 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
333 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
334 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
335 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
336 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
337 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
338 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700339 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
340 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
341 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
342 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700343 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700344 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700345 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700346 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
347 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
348 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
349 "src/f32-vunary/gen/vabs-scalar-x4.c",
350 "src/f32-vunary/gen/vneg-scalar-x4.c",
351 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700352 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
353 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
354 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
355 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
356 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
357 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
358 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
359 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
360 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
361 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
362 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
363 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
Marat Dukhanf92206b2021-12-10 17:02:07 -0800364 "src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700365 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700366 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
367 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
368 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700369 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700370 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
371 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
372 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700373 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700374 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
375 "src/qs8-vadd/gen/minmax-scalar-x4.c",
376 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700377 "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c",
378 "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700379 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
380 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700381 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700382 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
Marat Dukhanf92206b2021-12-10 17:02:07 -0800383 "src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700384 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
385 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
386 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
387 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
388 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
389 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
390 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
391 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
392 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
393 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700394 "src/qu8-vadd/gen/minmax-scalar-x4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700395 "src/qu8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700396 "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c",
397 "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c",
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800398 "src/s8-ibilinear/gen/scalar-c1.c",
Marat Dukhan23147532021-08-16 07:26:56 -0700399 "src/s8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhane79acb72021-08-16 19:03:53 -0700400 "src/s8-vclamp/scalar-x4.c",
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800401 "src/u8-ibilinear/gen/scalar-c1.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700402 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
403 "src/u8-rmax/scalar.c",
404 "src/u8-vclamp/scalar-x4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700405 "src/x8-zip/x2-scalar.c",
406 "src/x8-zip/x3-scalar.c",
407 "src/x8-zip/x4-scalar.c",
408 "src/x8-zip/xm-scalar.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700409 "src/x32-packx/x2-scalar.c",
410 "src/x32-packx/x3-scalar.c",
411 "src/x32-packx/x4-scalar.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700412 "src/x32-unpool/scalar.c",
413 "src/x32-zip/x2-scalar.c",
414 "src/x32-zip/x3-scalar.c",
415 "src/x32-zip/x4-scalar.c",
416 "src/x32-zip/xm-scalar.c",
Marat Dukhan933051b2021-08-07 16:26:15 -0700417 "src/xx-fill/scalar-x16.c",
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700418 "src/xx-pad/scalar.c",
Marat Dukhan2c724952021-07-27 18:46:30 -0700419]
420
421ALL_SCALAR_MICROKERNEL_SRCS = [
Marat Dukhane2c00012021-10-17 22:02:35 -0700422 "src/f16-f32-vcvt/gen/vcvt-scalar-float-x1.c",
423 "src/f16-f32-vcvt/gen/vcvt-scalar-float-x2.c",
424 "src/f16-f32-vcvt/gen/vcvt-scalar-float-x3.c",
425 "src/f16-f32-vcvt/gen/vcvt-scalar-float-x4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800426 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800427 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800428 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
430 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700431 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700432 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700433 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700434 "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c",
435 "src/f32-dwconv/gen/up1x3-minmax-scalar.c",
436 "src/f32-dwconv/gen/up1x3-scalar-acc2.c",
437 "src/f32-dwconv/gen/up1x3-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700438 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700439 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
440 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
441 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700442 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700443 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
444 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
445 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700446 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700447 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
448 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
449 "src/f32-dwconv/gen/up1x25-scalar.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700450 "src/f32-dwconv/gen/up2x3-minmax-scalar-acc2.c",
451 "src/f32-dwconv/gen/up2x3-minmax-scalar.c",
452 "src/f32-dwconv/gen/up2x3-scalar-acc2.c",
453 "src/f32-dwconv/gen/up2x3-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700454 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700455 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
456 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
457 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700458 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700459 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
460 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
461 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700462 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700463 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
464 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
465 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700466 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
467 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
468 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700469 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700470 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700471 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
472 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
473 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
474 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
475 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700476 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
477 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
478 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700479 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700480 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700481 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
482 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
483 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700484 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
485 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
486 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
487 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700488 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700489 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
490 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700491 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700492 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700493 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700494 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
495 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
496 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
497 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
498 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
499 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
500 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
501 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
502 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
503 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1fe89952021-11-10 01:27:15 -0800504 "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x1.c",
505 "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x2.c",
506 "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x3.c",
507 "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c",
508 "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x1.c",
509 "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c",
510 "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x3.c",
511 "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700512 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700513 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
514 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700515 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
516 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
517 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700518 "src/f32-gemm/gen/1x4-minmax-scalar.c",
519 "src/f32-gemm/gen/1x4-relu-scalar.c",
520 "src/f32-gemm/gen/1x4-scalar.c",
521 "src/f32-gemm/gen/2x4-minmax-scalar.c",
522 "src/f32-gemm/gen/2x4-relu-scalar.c",
523 "src/f32-gemm/gen/2x4-scalar.c",
524 "src/f32-gemm/gen/4x2-minmax-scalar.c",
525 "src/f32-gemm/gen/4x2-relu-scalar.c",
526 "src/f32-gemm/gen/4x2-scalar.c",
527 "src/f32-gemm/gen/4x4-minmax-scalar.c",
528 "src/f32-gemm/gen/4x4-relu-scalar.c",
529 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700530 "src/f32-ibilinear-chw/gen/scalar-p1.c",
531 "src/f32-ibilinear-chw/gen/scalar-p2.c",
532 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700533 "src/f32-ibilinear/gen/scalar-c1.c",
534 "src/f32-ibilinear/gen/scalar-c2.c",
535 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700536 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700537 "src/f32-igemm/gen/1x4-relu-scalar.c",
538 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700539 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/f32-igemm/gen/2x4-relu-scalar.c",
541 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700542 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700543 "src/f32-igemm/gen/4x2-relu-scalar.c",
544 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700545 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700546 "src/f32-igemm/gen/4x4-relu-scalar.c",
547 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700548 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
549 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
550 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700551 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
552 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
553 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
554 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800555 "src/f32-prelu/gen/scalar-2x1.c",
556 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhan430b1732021-12-04 02:53:12 -0800557 "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x1.c",
558 "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x2.c",
559 "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x3.c",
560 "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x4.c",
561 "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c",
562 "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x2.c",
563 "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x3.c",
564 "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c",
565 "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x1.c",
566 "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x2.c",
567 "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x3.c",
568 "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x4.c",
569 "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c",
570 "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x2.c",
571 "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x3.c",
572 "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800573 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800574 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700575 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800576 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
577 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700578 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800579 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800580 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700581 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800582 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
583 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700584 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700585 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700586 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
587 "src/f32-spmm/gen/1x1-minmax-scalar.c",
588 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
589 "src/f32-spmm/gen/2x1-minmax-scalar.c",
590 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
591 "src/f32-spmm/gen/4x1-minmax-scalar.c",
592 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
593 "src/f32-spmm/gen/8x1-minmax-scalar.c",
594 "src/f32-spmm/gen/8x2-minmax-scalar.c",
595 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700596 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
597 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
598 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700599 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700600 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
601 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
602 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700603 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700604 "src/f32-vbinary/gen/vadd-scalar-x1.c",
605 "src/f32-vbinary/gen/vadd-scalar-x2.c",
606 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700607 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700608 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
609 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
610 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700611 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700612 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
613 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
614 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700615 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700616 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
617 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
618 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700619 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700620 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
621 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
622 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700623 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700624 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
625 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
626 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700627 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700628 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
629 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
630 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700631 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700632 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
633 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
634 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700635 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700636 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
637 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
638 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700639 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700640 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
641 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
642 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700643 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800644 "src/f32-vbinary/gen/vmax-scalar-x1.c",
645 "src/f32-vbinary/gen/vmax-scalar-x2.c",
646 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700647 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800648 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
649 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
650 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700651 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800652 "src/f32-vbinary/gen/vmin-scalar-x1.c",
653 "src/f32-vbinary/gen/vmin-scalar-x2.c",
654 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700655 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800656 "src/f32-vbinary/gen/vminc-scalar-x1.c",
657 "src/f32-vbinary/gen/vminc-scalar-x2.c",
658 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700659 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700660 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
661 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
662 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700663 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700664 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
665 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
666 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700667 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700668 "src/f32-vbinary/gen/vmul-scalar-x1.c",
669 "src/f32-vbinary/gen/vmul-scalar-x2.c",
670 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700671 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700672 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
673 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
674 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700675 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700676 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
677 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
678 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700679 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700680 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
681 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
682 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700683 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700684 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
685 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
686 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700687 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700688 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
689 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
690 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700691 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700692 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
693 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
694 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700695 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700696 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
697 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
698 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700699 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700700 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
701 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
702 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700703 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700704 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
705 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
706 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700707 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700708 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
709 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
710 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700711 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700712 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
713 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
714 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700715 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700716 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
717 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
718 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700719 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700720 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
721 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
722 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700723 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700724 "src/f32-vbinary/gen/vsub-scalar-x1.c",
725 "src/f32-vbinary/gen/vsub-scalar-x2.c",
726 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700727 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700728 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
729 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
730 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700731 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700732 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
733 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
734 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700735 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700736 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
737 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
738 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700739 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700740 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
741 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
742 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800743 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
744 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
745 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
746 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
747 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
748 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
749 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
750 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
751 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
752 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
753 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
754 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700755 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
756 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
757 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700758 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
759 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
760 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700761 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
762 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
763 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700764 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
765 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
766 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
767 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700768 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
769 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
770 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700771 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
772 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
773 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
774 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
775 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
776 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
777 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
778 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
779 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700780 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
781 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
782 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
783 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
784 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
785 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
786 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
787 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
788 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700789 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
790 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
791 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700792 "src/f32-vunary/gen/vabs-scalar-x1.c",
793 "src/f32-vunary/gen/vabs-scalar-x2.c",
794 "src/f32-vunary/gen/vabs-scalar-x4.c",
795 "src/f32-vunary/gen/vneg-scalar-x1.c",
796 "src/f32-vunary/gen/vneg-scalar-x2.c",
797 "src/f32-vunary/gen/vneg-scalar-x4.c",
798 "src/f32-vunary/gen/vsqr-scalar-x1.c",
799 "src/f32-vunary/gen/vsqr-scalar-x2.c",
800 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan78f039d2021-11-09 16:42:27 -0800801 "src/math/cvt-f32-f16-scalar-bitcast.c",
802 "src/math/cvt-f32-f16-scalar-fabsf.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800803 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
804 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
805 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800806 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
807 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
808 "src/math/expm1minus-scalar-rr2-p5.c",
809 "src/math/expm1minus-scalar-rr2-p6.c",
Frank Barchard22136062020-11-24 18:44:46 -0800810 "src/math/expminus-scalar-rr2-lut64-p2.c",
811 "src/math/expminus-scalar-rr2-lut2048-p1.c",
812 "src/math/expminus-scalar-rr2-p5.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700813 "src/math/roundd-scalar-addsub.c",
814 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700815 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700816 "src/math/roundne-scalar-addsub.c",
817 "src/math/roundne-scalar-nearbyint.c",
818 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700819 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700820 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700821 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700822 "src/math/roundz-scalar-addsub.c",
823 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700824 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700825 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700826 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700827 "src/math/sigmoid-scalar-rr2-p5-div.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700828 "src/params-init.c",
Marat Dukhan57547062021-06-30 16:53:29 -0700829 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
830 "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
831 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
832 "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
833 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
834 "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
835 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
836 "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
837 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
838 "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
839 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
840 "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhand6021542021-06-30 09:04:20 -0700841 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
842 "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
843 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
844 "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
845 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
846 "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
847 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
848 "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
849 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
850 "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
851 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
852 "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
853 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
854 "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
855 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
856 "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
857 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
858 "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
859 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
860 "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
861 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
862 "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
863 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
864 "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
865 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
866 "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
867 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
868 "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
869 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
870 "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
871 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
872 "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700873 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
874 "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700875 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
876 "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700877 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
878 "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700879 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
880 "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
Marat Dukhan85d772b2021-06-30 11:02:42 -0700881 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
882 "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
Frank Barchardf10af6c2021-06-30 12:42:29 -0700883 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
884 "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhan86bd2702021-12-10 02:19:56 -0800885 "src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c",
886 "src/qs8-f32-vcvt/gen/vcvt-scalar-x2.c",
887 "src/qs8-f32-vcvt/gen/vcvt-scalar-x3.c",
888 "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700889 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
890 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
891 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
892 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
893 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
894 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700895 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
896 "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700897 "src/qs8-gemm/gen/1x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700898 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
899 "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700900 "src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700901 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
902 "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700903 "src/qs8-gemm/gen/2x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700904 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
905 "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700906 "src/qs8-gemm/gen/2x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700907 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
908 "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700909 "src/qs8-gemm/gen/3x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700910 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
911 "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700912 "src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700913 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
914 "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700915 "src/qs8-gemm/gen/4x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700916 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
917 "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700918 "src/qs8-gemm/gen/4x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700919 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
920 "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700921 "src/qs8-igemm/gen/1x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700922 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
923 "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700924 "src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700925 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
926 "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700927 "src/qs8-igemm/gen/2x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700928 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
929 "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700930 "src/qs8-igemm/gen/2x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700931 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
932 "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700933 "src/qs8-igemm/gen/3x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700934 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
935 "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700936 "src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700937 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
938 "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700939 "src/qs8-igemm/gen/4x2-minmax-rndnu-scalar.c",
Marat Dukhan779b2532021-06-29 14:14:13 -0700940 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
941 "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700942 "src/qs8-igemm/gen/4x4-minmax-rndnu-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700943 "src/qs8-requantization/fp32-scalar-lrintf.c",
944 "src/qs8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700945 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700946 "src/qs8-requantization/rndna-scalar-signed64.c",
947 "src/qs8-requantization/rndna-scalar-unsigned32.c",
948 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan062bee32021-05-27 20:31:07 -0700949 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700950 "src/qs8-vadd/gen/minmax-scalar-x1.c",
951 "src/qs8-vadd/gen/minmax-scalar-x2.c",
952 "src/qs8-vadd/gen/minmax-scalar-x4.c",
953 "src/qs8-vaddc/gen/minmax-scalar-x1.c",
954 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
955 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan79993412021-08-02 15:02:57 -0700956 "src/qs8-vmul/gen/minmax-fp32-scalar-x1.c",
957 "src/qs8-vmul/gen/minmax-fp32-scalar-x2.c",
958 "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c",
959 "src/qs8-vmulc/gen/minmax-fp32-scalar-x1.c",
960 "src/qs8-vmulc/gen/minmax-fp32-scalar-x2.c",
961 "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700962 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
963 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1f714282021-07-15 15:41:32 -0700964 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c",
965 "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c",
966 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c",
967 "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c",
968 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c",
969 "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c",
970 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c",
971 "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c",
972 "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c",
973 "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c",
974 "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c",
975 "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c",
Marat Dukhan86bd2702021-12-10 02:19:56 -0800976 "src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c",
977 "src/qu8-f32-vcvt/gen/vcvt-scalar-x2.c",
978 "src/qu8-f32-vcvt/gen/vcvt-scalar-x3.c",
979 "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700980 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
981 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan927d4742021-07-15 13:42:49 -0700982 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c",
983 "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c",
984 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c",
985 "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c",
986 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c",
987 "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c",
988 "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c",
989 "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-magic.c",
990 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c",
991 "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c",
992 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c",
993 "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c",
994 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c",
995 "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-magic.c",
996 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c",
997 "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan927d4742021-07-15 13:42:49 -0700998 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c",
999 "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c",
1000 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c",
1001 "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c",
1002 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c",
1003 "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c",
1004 "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c",
1005 "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-magic.c",
1006 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c",
1007 "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-magic.c",
1008 "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c",
1009 "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-magic.c",
1010 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c",
1011 "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c",
1012 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c",
1013 "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001014 "src/qu8-requantization/fp32-scalar-lrintf.c",
1015 "src/qu8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001016 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001017 "src/qu8-requantization/rndna-scalar-signed64.c",
1018 "src/qu8-requantization/rndna-scalar-unsigned32.c",
1019 "src/qu8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07001020 "src/qu8-vadd/gen/minmax-scalar-x1.c",
1021 "src/qu8-vadd/gen/minmax-scalar-x2.c",
1022 "src/qu8-vadd/gen/minmax-scalar-x4.c",
1023 "src/qu8-vaddc/gen/minmax-scalar-x1.c",
1024 "src/qu8-vaddc/gen/minmax-scalar-x2.c",
1025 "src/qu8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan79993412021-08-02 15:02:57 -07001026 "src/qu8-vmul/gen/minmax-fp32-scalar-x1.c",
1027 "src/qu8-vmul/gen/minmax-fp32-scalar-x2.c",
1028 "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c",
1029 "src/qu8-vmulc/gen/minmax-fp32-scalar-x1.c",
1030 "src/qu8-vmulc/gen/minmax-fp32-scalar-x2.c",
1031 "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c",
Marat Dukhan6a69c8e2021-11-24 15:00:59 -08001032 "src/s8-ibilinear/gen/scalar-c1.c",
1033 "src/s8-ibilinear/gen/scalar-c2.c",
1034 "src/s8-ibilinear/gen/scalar-c4.c",
Marat Dukhan23147532021-08-16 07:26:56 -07001035 "src/s8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhane79acb72021-08-16 19:03:53 -07001036 "src/s8-vclamp/scalar-x4.c",
Marat Dukhan6a69c8e2021-11-24 15:00:59 -08001037 "src/u8-ibilinear/gen/scalar-c1.c",
1038 "src/u8-ibilinear/gen/scalar-c2.c",
1039 "src/u8-ibilinear/gen/scalar-c4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001040 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001041 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001042 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001043 "src/u8-vclamp/scalar-x4.c",
Marat Dukhand67539d2021-09-08 23:06:03 -07001044 "src/x8-lut/gen/lut-scalar-x1.c",
1045 "src/x8-lut/gen/lut-scalar-x2.c",
1046 "src/x8-lut/gen/lut-scalar-x4.c",
1047 "src/x8-lut/gen/lut-scalar-x8.c",
1048 "src/x8-lut/gen/lut-scalar-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001049 "src/x8-zip/x2-scalar.c",
1050 "src/x8-zip/x3-scalar.c",
1051 "src/x8-zip/x4-scalar.c",
1052 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -08001053 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001054 "src/x32-packx/x2-scalar.c",
1055 "src/x32-packx/x3-scalar.c",
1056 "src/x32-packx/x4-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001057 "src/x32-unpool/scalar.c",
1058 "src/x32-zip/x2-scalar.c",
1059 "src/x32-zip/x3-scalar.c",
1060 "src/x32-zip/x4-scalar.c",
1061 "src/x32-zip/xm-scalar.c",
Marat Dukhan048931b2020-11-24 20:53:54 -08001062 "src/xx-copy/memcpy.c",
Marat Dukhan933051b2021-08-07 16:26:15 -07001063 "src/xx-fill/scalar-x16.c",
Marat Dukhan0461f2d2021-08-08 12:36:29 -07001064 "src/xx-pad/scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001065]
1066
Marat Dukhan2c724952021-07-27 18:46:30 -07001067ALL_WASM_MICROKERNEL_SRCS = [
Marat Dukhan99936602020-04-11 16:47:01 -07001068 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
1069 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07001070 "src/f32-dwconv/gen/up1x3-minmax-wasm-acc2.c",
1071 "src/f32-dwconv/gen/up1x3-minmax-wasm.c",
1072 "src/f32-dwconv/gen/up1x3-wasm-acc2.c",
1073 "src/f32-dwconv/gen/up1x3-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001074 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
1075 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001076 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
1077 "src/f32-dwconv/gen/up1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001078 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
1079 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001080 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
1081 "src/f32-dwconv/gen/up1x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -07001082 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
1083 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001084 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
1085 "src/f32-dwconv/gen/up1x25-wasm.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07001086 "src/f32-dwconv/gen/up2x3-minmax-wasm-acc2.c",
1087 "src/f32-dwconv/gen/up2x3-minmax-wasm.c",
1088 "src/f32-dwconv/gen/up2x3-wasm-acc2.c",
1089 "src/f32-dwconv/gen/up2x3-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001090 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
1091 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001092 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
1093 "src/f32-dwconv/gen/up2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001094 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
1095 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001096 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
1097 "src/f32-dwconv/gen/up2x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -07001098 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
1099 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001100 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
1101 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001102 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
1103 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001104 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
1105 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
1106 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
1107 "src/f32-gemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001108 "src/f32-gemm/gen/1x4-relu-wasm.c",
1109 "src/f32-gemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001110 "src/f32-gemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001111 "src/f32-gemm/gen/2x4-relu-wasm.c",
1112 "src/f32-gemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001113 "src/f32-gemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001114 "src/f32-gemm/gen/4x2-relu-wasm.c",
1115 "src/f32-gemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001116 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001117 "src/f32-gemm/gen/4x4-relu-wasm.c",
1118 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001119 "src/f32-igemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001120 "src/f32-igemm/gen/1x4-relu-wasm.c",
1121 "src/f32-igemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001122 "src/f32-igemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001123 "src/f32-igemm/gen/2x4-relu-wasm.c",
1124 "src/f32-igemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001125 "src/f32-igemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001126 "src/f32-igemm/gen/4x2-relu-wasm.c",
1127 "src/f32-igemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001128 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001129 "src/f32-igemm/gen/4x4-relu-wasm.c",
1130 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001131 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
Frank Barchardcb052a32021-12-10 14:16:33 -08001132 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
1133 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
1134 "src/f32-prelu/gen/wasm-2x1.c",
1135 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan430b1732021-12-04 02:53:12 -08001136 "src/f32-qs8-vcvt/gen/vcvt-wasm-magic-fminmax-x1.c",
1137 "src/f32-qs8-vcvt/gen/vcvt-wasm-magic-fminmax-x2.c",
1138 "src/f32-qs8-vcvt/gen/vcvt-wasm-magic-fminmax-x3.c",
1139 "src/f32-qs8-vcvt/gen/vcvt-wasm-magic-fminmax-x4.c",
1140 "src/f32-qu8-vcvt/gen/vcvt-wasm-magic-fminmax-x1.c",
1141 "src/f32-qu8-vcvt/gen/vcvt-wasm-magic-fminmax-x2.c",
1142 "src/f32-qu8-vcvt/gen/vcvt-wasm-magic-fminmax-x3.c",
1143 "src/f32-qu8-vcvt/gen/vcvt-wasm-magic-fminmax-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001144 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
1145 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
1146 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001147 "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001148 "src/f32-vbinary/gen/vadd-relu-wasm-x1.c",
1149 "src/f32-vbinary/gen/vadd-relu-wasm-x2.c",
1150 "src/f32-vbinary/gen/vadd-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001151 "src/f32-vbinary/gen/vadd-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001152 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
1153 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
1154 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
1155 "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001156 "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c",
1157 "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c",
1158 "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001159 "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001160 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
1161 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
1162 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
1163 "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001164 "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c",
1165 "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c",
1166 "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001167 "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001168 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
1169 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
1170 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
1171 "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001172 "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c",
1173 "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c",
1174 "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001175 "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001176 "src/f32-vbinary/gen/vmax-wasm-x1.c",
1177 "src/f32-vbinary/gen/vmax-wasm-x2.c",
1178 "src/f32-vbinary/gen/vmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001179 "src/f32-vbinary/gen/vmax-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001180 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
1181 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
1182 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001183 "src/f32-vbinary/gen/vmaxc-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001184 "src/f32-vbinary/gen/vmin-wasm-x1.c",
1185 "src/f32-vbinary/gen/vmin-wasm-x2.c",
1186 "src/f32-vbinary/gen/vmin-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001187 "src/f32-vbinary/gen/vmin-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001188 "src/f32-vbinary/gen/vminc-wasm-x1.c",
1189 "src/f32-vbinary/gen/vminc-wasm-x2.c",
1190 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001191 "src/f32-vbinary/gen/vminc-wasm-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001192 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
1193 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
1194 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001195 "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001196 "src/f32-vbinary/gen/vmul-relu-wasm-x1.c",
1197 "src/f32-vbinary/gen/vmul-relu-wasm-x2.c",
1198 "src/f32-vbinary/gen/vmul-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001199 "src/f32-vbinary/gen/vmul-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001200 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
1201 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
1202 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
1203 "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001204 "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c",
1205 "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c",
1206 "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001207 "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001208 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
1209 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
1210 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
1211 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001212 "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c",
1213 "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c",
1214 "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001215 "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001216 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
1217 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
1218 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
1219 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001220 "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c",
1221 "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c",
1222 "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001223 "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001224 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
1225 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
1226 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
1227 "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001228 "src/f32-vbinary/gen/vsub-relu-wasm-x1.c",
1229 "src/f32-vbinary/gen/vsub-relu-wasm-x2.c",
1230 "src/f32-vbinary/gen/vsub-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001231 "src/f32-vbinary/gen/vsub-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001232 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
1233 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
1234 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
1235 "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001236 "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c",
1237 "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c",
1238 "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001239 "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001240 "src/f32-vclamp/gen/vclamp-wasm-x1.c",
1241 "src/f32-vclamp/gen/vclamp-wasm-x2.c",
1242 "src/f32-vclamp/gen/vclamp-wasm-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001243 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c",
1244 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c",
1245 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c",
1246 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c",
1247 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c",
1248 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c",
1249 "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c",
1250 "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c",
1251 "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c",
1252 "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c",
1253 "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c",
1254 "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001255 "src/f32-vhswish/gen/vhswish-wasm-x1.c",
1256 "src/f32-vhswish/gen/vhswish-wasm-x2.c",
1257 "src/f32-vhswish/gen/vhswish-wasm-x4.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001258 "src/f32-vlrelu/gen/vlrelu-wasm-x1.c",
1259 "src/f32-vlrelu/gen/vlrelu-wasm-x2.c",
1260 "src/f32-vlrelu/gen/vlrelu-wasm-x4.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07001261 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
1262 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
1263 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001264 "src/f32-vrelu/gen/vrelu-wasm-x1.c",
1265 "src/f32-vrelu/gen/vrelu-wasm-x2.c",
1266 "src/f32-vrelu/gen/vrelu-wasm-x4.c",
1267 "src/f32-vrelu/gen/vrelu-wasm-x8.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -08001268]
1269
Marat Dukhan2c724952021-07-27 18:46:30 -07001270ALL_WASMSIMD_MICROKERNEL_SRCS = [
Marat Dukhanf6507f82021-10-16 18:13:04 -07001271 "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x8.c",
1272 "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x16.c",
1273 "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x24.c",
1274 "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x32.c",
1275 "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x8.c",
1276 "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x16.c",
1277 "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x24.c",
1278 "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x32.c",
Marat Dukhan40f05522020-07-16 22:33:12 -07001279 "src/f32-argmaxpool/4x-wasmsimd-c4.c",
1280 "src/f32-argmaxpool/9p8x-wasmsimd-c4.c",
1281 "src/f32-argmaxpool/9x-wasmsimd-c4.c",
Marat Dukhan3b7432d2020-07-16 17:46:32 -07001282 "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c",
1283 "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c",
1284 "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c",
1285 "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard22136062020-11-24 18:44:46 -08001286 "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07001287 "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-arm-acc2.c",
1288 "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-arm.c",
1289 "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-x86-acc2.c",
1290 "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-x86.c",
Frank Barchard66ae2572021-11-02 17:36:21 -07001291 "src/f32-dwconv/gen/up4x3-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001292 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001293 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001294 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -07001295 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001296 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001297 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001298 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001299 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -07001300 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001301 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001302 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001303 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001304 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001305 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
1306 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07001307 "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-arm-acc2.c",
1308 "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-arm.c",
1309 "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-x86-acc2.c",
1310 "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-x86.c",
Frank Barchard66ae2572021-11-02 17:36:21 -07001311 "src/f32-dwconv/gen/up8x3-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001312 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001313 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001314 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -07001315 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001316 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001317 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001318 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001319 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -07001320 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001321 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001322 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001323 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001324 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001325 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
1326 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001327 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1328 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1329 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1330 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
1331 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1332 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
1333 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
1334 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
1335 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c",
1336 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -08001337 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1338 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1339 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1340 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c",
1341 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1342 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c",
1343 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c",
1344 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c",
1345 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c",
1346 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001347 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1348 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1349 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1350 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
1351 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1352 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
1353 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
1354 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
1355 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c",
1356 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -08001357 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1358 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1359 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1360 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c",
1361 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1362 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c",
1363 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c",
1364 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c",
1365 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c",
1366 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c",
Frank Barchardc5704bf2020-12-21 23:09:00 -08001367 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1368 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1369 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1370 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
1371 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1372 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
1373 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
1374 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001375 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1376 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1377 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1378 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c",
1379 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1380 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c",
1381 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c",
1382 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c",
Frank Barchardcadd4222021-01-20 16:27:25 -08001383 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1384 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1385 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1386 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
1387 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1388 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
1389 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
1390 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001391 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1392 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1393 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1394 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c",
1395 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1396 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c",
1397 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c",
1398 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -08001399 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1400 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1401 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1402 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1403 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1404 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1405 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1406 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1407 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1408 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
1409 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c",
1410 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c",
1411 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001412 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1413 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1414 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1415 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1416 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c",
1417 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1418 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1419 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c",
1420 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1421 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c",
1422 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c",
1423 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c",
1424 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -08001425 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1426 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1427 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1428 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1429 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1430 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1431 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1432 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1433 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1434 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
1435 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c",
1436 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c",
1437 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001438 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1439 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1440 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1441 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1442 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c",
1443 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1444 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1445 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c",
1446 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1447 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c",
1448 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c",
1449 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c",
1450 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001451 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
1452 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
1453 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
1454 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
1455 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
1456 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
1457 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
1458 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
1459 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
1460 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001461 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
1462 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
1463 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
1464 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
1465 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c",
1466 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
1467 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
1468 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c",
1469 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
1470 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -08001471 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
1472 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
1473 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
1474 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
1475 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
1476 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
1477 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
1478 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
1479 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
1480 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -08001481 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
1482 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
1483 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
1484 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
1485 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c",
1486 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
1487 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
1488 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c",
1489 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
1490 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c",
Marat Dukhan22e31c82021-11-09 00:00:28 -08001491 "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x8.c",
1492 "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x16.c",
1493 "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x24.c",
1494 "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001495 "src/f32-gavgpool-cw/wasmsimd-arm-x4.c",
1496 "src/f32-gavgpool-cw/wasmsimd-x86-x4.c",
Marat Dukhanc6016802020-07-16 18:51:28 -07001497 "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c",
1498 "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c",
1499 "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c",
1500 "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001501 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c",
1502 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c",
1503 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c",
1504 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001505 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
1506 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001507 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c",
1508 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c",
1509 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c",
1510 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001511 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
1512 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001513 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c",
1514 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c",
1515 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c",
1516 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001517 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
1518 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001519 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c",
1520 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c",
1521 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c",
1522 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001523 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
1524 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001525 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c",
1526 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c",
1527 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c",
1528 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001529 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
1530 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001531 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1532 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1533 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1534 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c",
1536 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
1537 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1538 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001539 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1540 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1541 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1542 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001543 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1544 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1545 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1546 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1547 "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c",
1548 "src/f32-gemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001549 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1550 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1551 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1552 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001553 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c",
1554 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
1555 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1556 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001557 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1558 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1559 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1560 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c",
1562 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
1563 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1564 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001565 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1566 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1567 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1568 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001569 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1570 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
XNNPACK Team965272b2020-10-23 21:10:15 -07001571 "src/f32-ibilinear-chw/gen/wasmsimd-p4.c",
1572 "src/f32-ibilinear-chw/gen/wasmsimd-p8.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001573 "src/f32-ibilinear/gen/wasmsimd-c4.c",
1574 "src/f32-ibilinear/gen/wasmsimd-c8.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001575 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1576 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1577 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1578 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001579 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c",
1580 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
1581 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1582 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001583 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1584 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1585 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1586 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001587 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1588 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1589 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1590 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1591 "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c",
1592 "src/f32-igemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001593 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1594 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1595 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1596 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c",
1598 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
1599 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1600 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001601 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1602 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1603 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1604 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001605 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c",
1606 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
1607 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1608 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001609 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1610 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1611 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1612 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001613 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1614 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhanf6e24802020-07-08 22:20:40 -07001615 "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c",
1616 "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c",
Marat Dukhan1483c532020-07-16 18:08:19 -07001617 "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c",
1618 "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c",
1619 "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c",
1620 "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001621 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1622 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001623 "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c",
1624 "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c",
1625 "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001626 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
1627 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001628 "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c",
1629 "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c",
1630 "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c",
1631 "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c",
1632 "src/f32-prelu/gen/wasmsimd-minmax-1x4.c",
1633 "src/f32-prelu/gen/wasmsimd-minmax-1x8.c",
1634 "src/f32-prelu/gen/wasmsimd-minmax-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001635 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
1636 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001637 "src/f32-prelu/gen/wasmsimd-minmax-2x16.c",
1638 "src/f32-prelu/gen/wasmsimd-minmax-4x4.c",
1639 "src/f32-prelu/gen/wasmsimd-minmax-4x8.c",
1640 "src/f32-prelu/gen/wasmsimd-minmax-4x16.c",
Marat Dukhan4bd1de92021-12-02 14:00:33 -08001641 "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x8.c",
1642 "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x16.c",
1643 "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x24.c",
1644 "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x32.c",
Marat Dukhan98d55522021-12-02 11:03:53 -08001645 "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x8.c",
1646 "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x16.c",
1647 "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x24.c",
1648 "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x32.c",
Marat Dukhan4bd1de92021-12-02 14:00:33 -08001649 "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x8.c",
1650 "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x16.c",
1651 "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x24.c",
1652 "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x32.c",
Marat Dukhan98d55522021-12-02 11:03:53 -08001653 "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x8.c",
1654 "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x16.c",
1655 "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x24.c",
1656 "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x32.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001657 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001658 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001659 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001660 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c",
1661 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001662 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001663 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c",
1664 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001665 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001666 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c",
1667 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001668 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c",
Marat Dukhan8c417962020-07-08 12:27:50 -07001669 "src/f32-rmax/wasmsimd-arm.c",
1670 "src/f32-rmax/wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001671 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c",
1672 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001673 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c",
1674 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001675 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001676 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c",
1677 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001678 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c",
1679 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001680 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001681 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c",
1682 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001683 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c",
1684 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001685 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001686 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c",
1687 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001688 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c",
1689 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001690 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001691 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c",
1692 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001693 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c",
1694 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001695 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001696 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c",
1697 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001698 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c",
1699 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001700 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001701 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c",
1702 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001703 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c",
1704 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001705 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001706 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c",
1707 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001708 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c",
1709 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001710 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001711 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
1712 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001713 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001714 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
1715 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001716 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001717 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c",
1718 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001719 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001720 "src/f32-vbinary/gen/vadd-wasmsimd-x4.c",
1721 "src/f32-vbinary/gen/vadd-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001722 "src/f32-vbinary/gen/vadd-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001723 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
1724 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001725 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001726 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
1727 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001728 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001729 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c",
1730 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001731 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001732 "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c",
1733 "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001734 "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001735 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
1736 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001737 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001738 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
1739 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001740 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001741 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c",
1742 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001743 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001744 "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c",
1745 "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001746 "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001747 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
1748 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001749 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001750 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
1751 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001752 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001753 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c",
1754 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001755 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001756 "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c",
1757 "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001758 "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001759 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
1760 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001761 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001762 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
1763 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001764 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001765 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
1766 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001767 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001768 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
1769 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001770 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001771 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
1772 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001773 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001774 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
1775 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001776 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001777 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
1778 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001779 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001780 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
1781 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001782 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001783 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
1784 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001785 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001786 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
1787 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001788 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001789 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c",
1790 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001791 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001792 "src/f32-vbinary/gen/vmul-wasmsimd-x4.c",
1793 "src/f32-vbinary/gen/vmul-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001794 "src/f32-vbinary/gen/vmul-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001795 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
1796 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001797 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001798 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
1799 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001800 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001801 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c",
1802 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001803 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001804 "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c",
1805 "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001806 "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001807 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
1808 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001809 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001810 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
1811 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001812 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001813 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c",
1814 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001815 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001816 "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c",
1817 "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001818 "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001819 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
1820 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001821 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001822 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
1823 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001824 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001825 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c",
1826 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001827 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001828 "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c",
1829 "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001830 "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001831 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
1832 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001833 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001834 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
1835 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001836 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001837 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
1838 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001839 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001840 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
1841 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001842 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001843 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c",
1844 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001845 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001846 "src/f32-vbinary/gen/vsub-wasmsimd-x4.c",
1847 "src/f32-vbinary/gen/vsub-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001848 "src/f32-vbinary/gen/vsub-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001849 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
1850 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001851 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001852 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
1853 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001854 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001855 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c",
1856 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001857 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001858 "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c",
1859 "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001860 "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001861 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
1862 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c",
1863 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c",
1864 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001865 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
1866 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c",
1867 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c",
1868 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c",
1869 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c",
1870 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001871 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c",
1872 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c",
1873 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c",
1874 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c",
1875 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c",
1876 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08001877 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c",
1878 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c",
1879 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c",
1880 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c",
1881 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c",
1882 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001883 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c",
1884 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c",
1885 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c",
1886 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c",
1887 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c",
1888 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001889 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1890 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1891 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001892 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1893 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1894 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1895 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001896 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001897 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001898 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001899 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001900 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1901 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1902 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanfeee77f2021-08-31 13:39:50 -07001903 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1904 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1905 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1906 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Marat Dukhan33b4f752021-09-03 10:53:53 -07001907 "src/f32-vrnd/gen/vrndd-wasmsimd-native-x4.c",
1908 "src/f32-vrnd/gen/vrndd-wasmsimd-native-x8.c",
Marat Dukhanfeee77f2021-08-31 13:39:50 -07001909 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1910 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
Marat Dukhan33b4f752021-09-03 10:53:53 -07001911 "src/f32-vrnd/gen/vrndne-wasmsimd-native-x4.c",
1912 "src/f32-vrnd/gen/vrndne-wasmsimd-native-x8.c",
Marat Dukhanfeee77f2021-08-31 13:39:50 -07001913 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1914 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1915 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1916 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
Marat Dukhan33b4f752021-09-03 10:53:53 -07001917 "src/f32-vrnd/gen/vrndu-wasmsimd-native-x4.c",
1918 "src/f32-vrnd/gen/vrndu-wasmsimd-native-x8.c",
Marat Dukhanfeee77f2021-08-31 13:39:50 -07001919 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1920 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1921 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1922 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhan33b4f752021-09-03 10:53:53 -07001923 "src/f32-vrnd/gen/vrndz-wasmsimd-native-x4.c",
1924 "src/f32-vrnd/gen/vrndz-wasmsimd-native-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001925 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1926 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1927 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1928 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1929 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1930 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1931 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1932 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1933 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1934 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1935 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1936 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001937 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1938 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001939 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1940 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1941 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1942 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1943 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1944 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhana18926a2021-09-29 15:02:44 -07001945 "src/math/cvt-f16-f32-wasmsimd-int16.c",
1946 "src/math/cvt-f16-f32-wasmsimd-int32.c",
Marat Dukhan79c78b22021-11-08 20:44:27 -08001947 "src/math/cvt-f32-f16-wasmsimd.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001948 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1949 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1950 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1951 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001952 "src/math/roundd-wasmsimd-addsub.c",
1953 "src/math/roundd-wasmsimd-cvt.c",
Marat Dukhan33b4f752021-09-03 10:53:53 -07001954 "src/math/roundd-wasmsimd-native.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001955 "src/math/roundne-wasmsimd-addsub.c",
Marat Dukhan33b4f752021-09-03 10:53:53 -07001956 "src/math/roundne-wasmsimd-native.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001957 "src/math/roundu-wasmsimd-addsub.c",
1958 "src/math/roundu-wasmsimd-cvt.c",
Marat Dukhan33b4f752021-09-03 10:53:53 -07001959 "src/math/roundu-wasmsimd-native.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001960 "src/math/roundz-wasmsimd-addsub.c",
1961 "src/math/roundz-wasmsimd-cvt.c",
Marat Dukhan33b4f752021-09-03 10:53:53 -07001962 "src/math/roundz-wasmsimd-native.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001963 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1964 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07001965 "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07001966 "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07001967 "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07001968 "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07001969 "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07001970 "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07001971 "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07001972 "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07001973 "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07001974 "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07001975 "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07001976 "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07001977 "src/qc8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
1978 "src/qc8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08001979 "src/qc8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
1980 "src/qc8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07001981 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
1982 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07001983 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
1984 "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07001985 "src/qc8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
1986 "src/qc8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08001987 "src/qc8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
1988 "src/qc8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07001989 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
1990 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07001991 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
1992 "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07001993 "src/qc8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
1994 "src/qc8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08001995 "src/qc8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
1996 "src/qc8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07001997 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
1998 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07001999 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
2000 "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002001 "src/qc8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2002 "src/qc8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002003 "src/qc8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2004 "src/qc8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002005 "src/qc8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2006 "src/qc8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
2007 "src/qc8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2008 "src/qc8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002009 "src/qc8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2010 "src/qc8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002011 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2012 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002013 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
2014 "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002015 "src/qc8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2016 "src/qc8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002017 "src/qc8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2018 "src/qc8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002019 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2020 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002021 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
2022 "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002023 "src/qc8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2024 "src/qc8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002025 "src/qc8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2026 "src/qc8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002027 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2028 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002029 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
2030 "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002031 "src/qc8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2032 "src/qc8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002033 "src/qc8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2034 "src/qc8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002035 "src/qc8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2036 "src/qc8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07002037 "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07002038 "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07002039 "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07002040 "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07002041 "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07002042 "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07002043 "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07002044 "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07002045 "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07002046 "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan9cedb592021-08-17 17:25:24 -07002047 "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16-add16.c",
Frank Barchard0049e892021-08-22 09:37:21 -07002048 "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhanfbf12b02021-12-09 22:39:15 -08002049 "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x8.c",
2050 "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x16.c",
2051 "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x24.c",
2052 "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x32.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07002053 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
2054 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
2055 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002056 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
2057 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
2058 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002059 "src/qs8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2060 "src/qs8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Frank Barcharda49e41f2021-08-31 20:30:24 -07002061 "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002062 "src/qs8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2063 "src/qs8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002064 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2065 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002066 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
2067 "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002068 "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002069 "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002070 "src/qs8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2071 "src/qs8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Frank Barcharda49e41f2021-08-31 20:30:24 -07002072 "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002073 "src/qs8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2074 "src/qs8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002075 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2076 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002077 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
2078 "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002079 "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002080 "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002081 "src/qs8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2082 "src/qs8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Frank Barcharda49e41f2021-08-31 20:30:24 -07002083 "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002084 "src/qs8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2085 "src/qs8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002086 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2087 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002088 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
2089 "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002090 "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002091 "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002092 "src/qs8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2093 "src/qs8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Frank Barcharda49e41f2021-08-31 20:30:24 -07002094 "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002095 "src/qs8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2096 "src/qs8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002097 "src/qs8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2098 "src/qs8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002099 "src/qs8-gemm/gen/4x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c",
2100 "src/qs8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2101 "src/qs8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002102 "src/qs8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2103 "src/qs8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002104 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2105 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002106 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
2107 "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002108 "src/qs8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2109 "src/qs8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002110 "src/qs8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2111 "src/qs8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002112 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2113 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002114 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
2115 "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002116 "src/qs8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2117 "src/qs8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002118 "src/qs8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2119 "src/qs8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002120 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2121 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002122 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c",
2123 "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002124 "src/qs8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2125 "src/qs8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan0f1ed942021-12-08 23:25:50 -08002126 "src/qs8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2127 "src/qs8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002128 "src/qs8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2129 "src/qs8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002130 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002131 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07002132 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
2133 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
2134 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
2135 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
2136 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
2137 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
2138 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
2139 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhan661ea6d2021-08-02 11:25:41 -07002140 "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c",
2141 "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c",
2142 "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c",
2143 "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c",
Marat Dukhanf6011352021-07-15 15:11:14 -07002144 "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c",
2145 "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c",
2146 "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c",
2147 "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c",
2148 "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c",
2149 "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c",
Marat Dukhanfbf12b02021-12-09 22:39:15 -08002150 "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x8.c",
2151 "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x16.c",
2152 "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x24.c",
2153 "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x32.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002154 "src/qu8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2155 "src/qu8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
2156 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2157 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002158 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld64.c",
2159 "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002160 "src/qu8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2161 "src/qu8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
2162 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2163 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002164 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld64.c",
2165 "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002166 "src/qu8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2167 "src/qu8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
2168 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2169 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002170 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld64.c",
2171 "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002172 "src/qu8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2173 "src/qu8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
2174 "src/qu8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2175 "src/qu8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
2176 "src/qu8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2177 "src/qu8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
2178 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2179 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002180 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld64.c",
2181 "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002182 "src/qu8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2183 "src/qu8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
2184 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2185 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002186 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld64.c",
2187 "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002188 "src/qu8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2189 "src/qu8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
2190 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2191 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhandfc2db02021-08-08 21:19:07 -07002192 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld64.c",
2193 "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld128.c",
Marat Dukhan8dc106e2021-08-31 15:23:02 -07002194 "src/qu8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2195 "src/qu8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c",
2196 "src/qu8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c",
2197 "src/qu8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002198 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002199 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07002200 "src/qu8-vadd/gen/minmax-wasmsimd-x8.c",
2201 "src/qu8-vadd/gen/minmax-wasmsimd-x16.c",
Marat Dukhane20a8732021-12-07 17:11:37 -08002202 "src/qu8-vadd/gen/minmax-wasmsimd-x32.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07002203 "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c",
2204 "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c",
Marat Dukhane20a8732021-12-07 17:11:37 -08002205 "src/qu8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhan661ea6d2021-08-02 11:25:41 -07002206 "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c",
2207 "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c",
2208 "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c",
2209 "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c",
Marat Dukhan266a47b2021-11-24 13:58:12 -08002210 "src/s8-ibilinear/gen/wasmsimd-dot16x2-c8.c",
2211 "src/s8-ibilinear/gen/wasmsimd-dot16x2-c16.c",
2212 "src/s8-ibilinear/gen/wasmsimd-mul32-c8.c",
2213 "src/s8-ibilinear/gen/wasmsimd-mul32-c16.c",
Marat Dukhan23147532021-08-16 07:26:56 -07002214 "src/s8-maxpool/9p8x-minmax-wasmsimd-c16.c",
Marat Dukhane79acb72021-08-16 19:03:53 -07002215 "src/s8-vclamp/wasmsimd-x64.c",
Marat Dukhan266a47b2021-11-24 13:58:12 -08002216 "src/u8-ibilinear/gen/wasmsimd-dot16x2-c8.c",
2217 "src/u8-ibilinear/gen/wasmsimd-dot16x2-c16.c",
2218 "src/u8-ibilinear/gen/wasmsimd-mul32-c8.c",
2219 "src/u8-ibilinear/gen/wasmsimd-mul32-c16.c",
Marat Dukhanf1589422021-08-15 20:37:06 -07002220 "src/u8-maxpool/9p8x-minmax-wasmsimd-c16.c",
Marat Dukhan1f5b1082021-08-16 17:01:44 -07002221 "src/u8-vclamp/wasmsimd-x64.c",
Marat Dukhana4ad9882021-09-18 08:06:04 -07002222 "src/x8-lut/gen/lut-wasmsimd-x16.c",
2223 "src/x8-lut/gen/lut-wasmsimd-x32.c",
2224 "src/x8-lut/gen/lut-wasmsimd-x48.c",
2225 "src/x8-lut/gen/lut-wasmsimd-x64.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07002226 "src/x32-packx/x4-wasmsimd.c",
Alan Kelly2493de92021-12-23 07:17:09 -08002227 "src/x32-transpose/4x4-wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07002228 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07002229 "src/x32-zip/x2-wasmsimd.c",
2230 "src/x32-zip/x3-wasmsimd.c",
2231 "src/x32-zip/x4-wasmsimd.c",
2232 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan933051b2021-08-07 16:26:15 -07002233 "src/xx-fill/wasmsimd-x64.c",
Marat Dukhan0461f2d2021-08-08 12:36:29 -07002234 "src/xx-pad/wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07002235]
2236
Marat Dukhan08c4a432019-10-03 09:29:21 -07002237# ISA-specific micro-kernels
Marat Dukhan2c724952021-07-27 18:46:30 -07002238PROD_NEON_MICROKERNEL_SRCS = [
Marat Dukhanaf2ba002021-10-24 14:21:41 -07002239 "src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002240 "src/f32-argmaxpool/4x-neon-c4.c",
2241 "src/f32-argmaxpool/9p8x-neon-c4.c",
2242 "src/f32-argmaxpool/9x-neon-c4.c",
2243 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
2244 "src/f32-avgpool/9x-minmax-neon-c4.c",
2245 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07002246 "src/f32-dwconv/gen/up8x3-minmax-neon.c",
Frank Barcharddbe781b2021-10-18 10:29:52 -07002247 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
2248 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
2249 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002250 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
2251 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
2252 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
2253 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
Marat Dukhana0c61682021-11-10 19:23:41 -08002254 "src/f32-f16-vcvt/gen/vcvt-neon-x8.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002255 "src/f32-gavgpool-cw/neon-x4.c",
2256 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
2257 "src/f32-gavgpool/7x-minmax-neon-c4.c",
2258 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
2259 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
2260 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
2261 "src/f32-ibilinear-chw/gen/neon-p8.c",
2262 "src/f32-ibilinear/gen/neon-c8.c",
2263 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
2264 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
2265 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
2266 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
2267 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
2268 "src/f32-pavgpool/9x-minmax-neon-c4.c",
2269 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhaned2d7762021-12-03 23:51:19 -08002270 "src/f32-qs8-vcvt/gen/vcvt-neon-x32.c",
2271 "src/f32-qu8-vcvt/gen/vcvt-neon-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002272 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
2273 "src/f32-rmax/neon.c",
2274 "src/f32-spmm/gen/32x1-minmax-neon.c",
2275 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
2276 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
2277 "src/f32-vbinary/gen/vmax-neon-x8.c",
2278 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
2279 "src/f32-vbinary/gen/vmin-neon-x8.c",
2280 "src/f32-vbinary/gen/vminc-neon-x8.c",
2281 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
2282 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
2283 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
2284 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
2285 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
2286 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
2287 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
2288 "src/f32-vclamp/gen/vclamp-neon-x8.c",
2289 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
2290 "src/f32-vhswish/gen/vhswish-neon-x16.c",
2291 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
2292 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
2293 "src/f32-vrnd/gen/vrndd-neon-x8.c",
2294 "src/f32-vrnd/gen/vrndne-neon-x8.c",
2295 "src/f32-vrnd/gen/vrndu-neon-x8.c",
2296 "src/f32-vrnd/gen/vrndz-neon-x8.c",
2297 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
2298 "src/f32-vunary/gen/vabs-neon-x8.c",
2299 "src/f32-vunary/gen/vneg-neon-x8.c",
2300 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002301 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c",
Frank Barchard7da8b022021-08-31 09:49:10 -07002302 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c",
2303 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002304 "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c",
2305 "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c",
2306 "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c",
2307 "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002308 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c",
Frank Barchard7da8b022021-08-31 09:49:10 -07002309 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c",
2310 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c",
Marat Dukhanf92206b2021-12-10 17:02:07 -08002311 "src/qs8-f32-vcvt/gen/vcvt-neon-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002312 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
2313 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
Frank Barchard95198162021-12-21 17:29:10 -08002314 "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002315 "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002316 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002317 "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c",
Frank Barchard95198162021-12-21 17:29:10 -08002318 "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002319 "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002320 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002321 "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c",
Marat Dukhan01debd92021-07-29 18:14:21 -07002322 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
2323 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
2324 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
2325 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -07002326 "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c",
2327 "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002328 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
2329 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07002330 "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c",
2331 "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c",
Marat Dukhanf92206b2021-12-10 17:02:07 -08002332 "src/qu8-f32-vcvt/gen/vcvt-neon-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002333 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
2334 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
2335 "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
2336 "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
2337 "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c",
2338 "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
2339 "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
2340 "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
2341 "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c",
2342 "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard0a3093c2021-08-31 09:58:11 -07002343 "src/qu8-vadd/gen/minmax-neon-ld64-x16.c",
2344 "src/qu8-vadd/gen/minmax-neon-ld64-x32.c",
2345 "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c",
2346 "src/qu8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -07002347 "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c",
2348 "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c",
Marat Dukhan24abe6b2021-11-24 15:28:57 -08002349 "src/s8-ibilinear/gen/neon-c8.c",
2350 "src/s8-ibilinear/gen/neon-c16.c",
Marat Dukhan23147532021-08-16 07:26:56 -07002351 "src/s8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhane79acb72021-08-16 19:03:53 -07002352 "src/s8-vclamp/neon-x64.c",
Marat Dukhan24abe6b2021-11-24 15:28:57 -08002353 "src/u8-ibilinear/gen/neon-c8.c",
2354 "src/u8-ibilinear/gen/neon-c16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002355 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
2356 "src/u8-rmax/neon.c",
2357 "src/u8-vclamp/neon-x64.c",
2358 "src/x8-zip/x2-neon.c",
2359 "src/x8-zip/x3-neon.c",
2360 "src/x8-zip/x4-neon.c",
2361 "src/x8-zip/xm-neon.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002362 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002363 "src/x32-unpool/neon.c",
2364 "src/x32-zip/x2-neon.c",
2365 "src/x32-zip/x3-neon.c",
2366 "src/x32-zip/x4-neon.c",
2367 "src/x32-zip/xm-neon.c",
Marat Dukhan933051b2021-08-07 16:26:15 -07002368 "src/xx-fill/neon-x64.c",
Marat Dukhan0461f2d2021-08-08 12:36:29 -07002369 "src/xx-pad/neon.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07002370]
2371
2372ALL_NEON_MICROKERNEL_SRCS = [
Marat Dukhan322ed6f2021-10-16 17:44:16 -07002373 "src/f16-f32-vcvt/gen/vcvt-neon-int16-x8.c",
2374 "src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c",
2375 "src/f16-f32-vcvt/gen/vcvt-neon-int16-x24.c",
2376 "src/f16-f32-vcvt/gen/vcvt-neon-int16-x32.c",
2377 "src/f16-f32-vcvt/gen/vcvt-neon-int32-x8.c",
2378 "src/f16-f32-vcvt/gen/vcvt-neon-int32-x16.c",
2379 "src/f16-f32-vcvt/gen/vcvt-neon-int32-x24.c",
2380 "src/f16-f32-vcvt/gen/vcvt-neon-int32-x32.c",
Marat Dukhanef25c6d2020-07-24 00:59:40 -07002381 "src/f32-argmaxpool/4x-neon-c4.c",
2382 "src/f32-argmaxpool/9p8x-neon-c4.c",
2383 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002384 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
2385 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002386 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002387 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002388 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002389 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002390 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002391 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002392 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002393 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08002394 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07002395 "src/f32-dwconv/gen/up4x3-minmax-neon-acc2.c",
2396 "src/f32-dwconv/gen/up4x3-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07002397 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002398 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002399 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002400 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07002401 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002402 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07002403 "src/f32-dwconv/gen/up8x3-minmax-neon-acc2.c",
2404 "src/f32-dwconv/gen/up8x3-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002405 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
2406 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
2407 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
2408 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07002409 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002410 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002411 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
2412 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
2413 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07002414 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002415 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07002416 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
2417 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
2418 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
2419 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
2420 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002421 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
2422 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
2423 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002424 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002425 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002426 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
2427 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
2428 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002429 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
2430 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
2431 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
2432 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002433 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002434 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
2435 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002436 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002437 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002438 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002439 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002440 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
2441 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002442 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
2443 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
2444 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
2445 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
2446 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
2447 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
2448 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
2449 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002450 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002451 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan4edfdbf2021-11-09 13:47:11 -08002452 "src/f32-f16-vcvt/gen/vcvt-neon-x8.c",
2453 "src/f32-f16-vcvt/gen/vcvt-neon-x16.c",
2454 "src/f32-f16-vcvt/gen/vcvt-neon-x24.c",
2455 "src/f32-f16-vcvt/gen/vcvt-neon-x32.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002456 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002457 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
2458 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002459 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002460 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
2461 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002462 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002463 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
2464 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
2465 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
2466 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
2467 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002468 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
2469 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002470 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
2471 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002472 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
2473 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002474 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
2475 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
2476 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
2477 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
2478 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
2479 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
2480 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
2481 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
2482 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
2483 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
2484 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
2485 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
2486 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
2487 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
2488 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
2489 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08002490 "src/f32-ibilinear-chw/gen/neon-p4.c",
2491 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08002492 "src/f32-ibilinear/gen/neon-c4.c",
2493 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002494 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002495 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002496 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002497 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
2498 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002499 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002500 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
2501 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
2502 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
2503 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002504 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
2505 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002506 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
2507 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002508 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
2509 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002510 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
2511 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
2512 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002513 "src/f32-ppmm/gen/4x8-minmax-neon.c",
2514 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002515 "src/f32-prelu/gen/neon-1x4.c",
2516 "src/f32-prelu/gen/neon-1x8.c",
2517 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002518 "src/f32-prelu/gen/neon-2x4.c",
2519 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002520 "src/f32-prelu/gen/neon-2x16.c",
2521 "src/f32-prelu/gen/neon-4x4.c",
2522 "src/f32-prelu/gen/neon-4x8.c",
2523 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhanb2d0a2a2021-12-02 09:04:57 -08002524 "src/f32-qs8-vcvt/gen/vcvt-neon-x8.c",
2525 "src/f32-qs8-vcvt/gen/vcvt-neon-x16.c",
2526 "src/f32-qs8-vcvt/gen/vcvt-neon-x24.c",
2527 "src/f32-qs8-vcvt/gen/vcvt-neon-x32.c",
2528 "src/f32-qu8-vcvt/gen/vcvt-neon-x8.c",
2529 "src/f32-qu8-vcvt/gen/vcvt-neon-x16.c",
2530 "src/f32-qu8-vcvt/gen/vcvt-neon-x24.c",
2531 "src/f32-qu8-vcvt/gen/vcvt-neon-x32.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002532 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002533 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002534 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002535 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
2536 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002537 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002538 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
2539 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002540 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08002541 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
2542 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002543 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
2544 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
2545 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
2546 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
2547 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
2548 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
2549 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
2550 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
2551 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
2552 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
2553 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
2554 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
2555 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002556 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08002557 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
2558 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
2559 "src/f32-spmm/gen/4x1-minmax-neon.c",
2560 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
2561 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
2562 "src/f32-spmm/gen/8x1-minmax-neon.c",
2563 "src/f32-spmm/gen/12x1-minmax-neon.c",
2564 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
2565 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
2566 "src/f32-spmm/gen/16x1-minmax-neon.c",
2567 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
2568 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
2569 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002570 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
2571 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
2572 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
2573 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002574 "src/f32-vbinary/gen/vmax-neon-x4.c",
2575 "src/f32-vbinary/gen/vmax-neon-x8.c",
2576 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
2577 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
2578 "src/f32-vbinary/gen/vmin-neon-x4.c",
2579 "src/f32-vbinary/gen/vmin-neon-x8.c",
2580 "src/f32-vbinary/gen/vminc-neon-x4.c",
2581 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002582 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
2583 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
2584 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
2585 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
2586 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
2587 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002588 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
2589 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
2590 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
2591 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002592 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
2593 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
2594 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
2595 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002596 "src/f32-vclamp/gen/vclamp-neon-x4.c",
2597 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002598 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
2599 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
2600 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
2601 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
2602 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
2603 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
2604 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
2605 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
2606 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
2607 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
2608 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
2609 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002610 "src/f32-vhswish/gen/vhswish-neon-x4.c",
2611 "src/f32-vhswish/gen/vhswish-neon-x8.c",
2612 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002613 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
2614 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002615 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
2616 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002617 "src/f32-vrelu/gen/vrelu-neon-x4.c",
2618 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002619 "src/f32-vrnd/gen/vrndd-neon-x4.c",
2620 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002621 "src/f32-vrnd/gen/vrndne-neon-x4.c",
2622 "src/f32-vrnd/gen/vrndne-neon-x8.c",
2623 "src/f32-vrnd/gen/vrndu-neon-x4.c",
2624 "src/f32-vrnd/gen/vrndu-neon-x8.c",
2625 "src/f32-vrnd/gen/vrndz-neon-x4.c",
2626 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002627 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
2628 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
2629 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
2630 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
2631 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
2632 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
2633 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
2634 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
2635 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
2636 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
2637 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
2638 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
2639 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
2640 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
2641 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
2642 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
2643 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
2644 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002645 "src/f32-vunary/gen/vabs-neon-x4.c",
2646 "src/f32-vunary/gen/vabs-neon-x8.c",
2647 "src/f32-vunary/gen/vneg-neon-x4.c",
2648 "src/f32-vunary/gen/vneg-neon-x8.c",
2649 "src/f32-vunary/gen/vsqr-neon-x4.c",
2650 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan60f903b2021-09-30 09:43:13 -07002651 "src/math/cvt-f16-f32-neon-int16.c",
2652 "src/math/cvt-f16-f32-neon-int32.c",
Marat Dukhana6eb1e52021-11-06 18:29:36 -07002653 "src/math/cvt-f32-f16-neon.c",
Marat Dukhand24301d2021-12-02 00:13:45 -08002654 "src/math/cvt-f32-qs8-neon.c",
2655 "src/math/cvt-f32-qu8-neon.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002656 "src/math/expm1minus-neon-rr2-lut16-p3.c",
2657 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002658 "src/math/roundd-neon-addsub.c",
2659 "src/math/roundd-neon-cvt.c",
2660 "src/math/roundne-neon-addsub.c",
2661 "src/math/roundu-neon-addsub.c",
2662 "src/math/roundu-neon-cvt.c",
2663 "src/math/roundz-neon-addsub.c",
2664 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002665 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
2666 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
2667 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
2668 "src/math/sqrt-neon-nr1rsqrts.c",
2669 "src/math/sqrt-neon-nr2rsqrts.c",
2670 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002671 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c",
2672 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002673 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002674 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c",
2675 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002676 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002677 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c",
2678 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c",
2679 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c",
2680 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002681 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002682 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c",
2683 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c",
2684 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c",
2685 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07002686 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
2687 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
2688 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
2689 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
2690 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002691 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002692 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c",
2693 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002694 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002695 "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c",
2696 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002697 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c",
2698 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002699 "src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c",
2700 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002701 "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002702 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002703 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c",
2704 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002705 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002706 "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c",
2707 "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002708 "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c",
2709 "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002710 "src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c",
2711 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002712 "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002713 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002714 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c",
2715 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002716 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002717 "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c",
2718 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002719 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c",
2720 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002721 "src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c",
2722 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002723 "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002724 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002725 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c",
2726 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002727 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002728 "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c",
2729 "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002730 "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c",
2731 "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002732 "src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c",
2733 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07002734 "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07002735 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002736 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c",
2737 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07002738 "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07002739 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002740 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c",
2741 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07002742 "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07002743 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002744 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c",
2745 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c",
2746 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c",
2747 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07002748 "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07002749 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07002750 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c",
2751 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c",
2752 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c",
2753 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c",
Marat Dukhanbe18f5c2021-07-16 18:46:39 -07002754 "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07002755 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07002756 "src/qs8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07002757 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07002758 "src/qs8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07002759 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07002760 "src/qs8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan6f905292021-06-25 11:12:05 -07002761 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barchard2aa2e2a2021-09-16 14:59:13 -07002762 "src/qs8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c",
Marat Dukhanfee66be2021-12-09 17:51:15 -08002763 "src/qs8-f32-vcvt/gen/vcvt-neon-x8.c",
2764 "src/qs8-f32-vcvt/gen/vcvt-neon-x16.c",
2765 "src/qs8-f32-vcvt/gen/vcvt-neon-x24.c",
2766 "src/qs8-f32-vcvt/gen/vcvt-neon-x32.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07002767 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
2768 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
2769 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
2770 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002771 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
2772 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
2773 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
2774 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08002775 "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c",
2776 "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002777 "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002778 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002779 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c",
2780 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002781 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002782 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002783 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c",
2784 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002785 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002786 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002787 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c",
2788 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002789 "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002790 "src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c",
2791 "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c",
2792 "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c",
2793 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002794 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c",
2795 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002796 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002797 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c",
2798 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002799 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002800 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c",
2801 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002802 "src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c",
2803 "src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c",
2804 "src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c",
2805 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002806 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal.c",
Marat Dukhan89991902021-12-06 00:54:36 -08002807 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mull.c",
2808 "src/qs8-gemm/gen/1x8c16-minmax-rndnu-neon-mlal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002809 "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002810 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2811 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07002812 "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002813 "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002814 "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c",
2815 "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002816 "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002817 "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002818 "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c",
2819 "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002820 "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002821 "src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c",
2822 "src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c",
2823 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002824 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c",
2825 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002826 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002827 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c",
2828 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002829 "src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c",
2830 "src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08002831 "src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mlal.c",
2832 "src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mull.c",
2833 "src/qs8-gemm/gen/1x16c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08002834 "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c",
2835 "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002836 "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002837 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002838 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c",
2839 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002840 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002841 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002842 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c",
2843 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002844 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002845 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002846 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c",
2847 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002848 "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002849 "src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c",
2850 "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c",
2851 "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c",
2852 "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002853 "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c",
2854 "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002855 "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002856 "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c",
2857 "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002858 "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002859 "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c",
2860 "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002861 "src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c",
2862 "src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c",
2863 "src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c",
2864 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002865 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal.c",
Marat Dukhan89991902021-12-06 00:54:36 -08002866 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mull.c",
2867 "src/qs8-gemm/gen/2x8c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08002868 "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2869 "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002870 "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002871 "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002872 "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c",
2873 "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002874 "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002875 "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002876 "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c",
2877 "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002878 "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002879 "src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c",
2880 "src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c",
2881 "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002882 "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c",
2883 "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002884 "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002885 "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c",
2886 "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002887 "src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c",
2888 "src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08002889 "src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mlal.c",
2890 "src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mull.c",
2891 "src/qs8-gemm/gen/2x16c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08002892 "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c",
2893 "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002894 "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002895 "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002896 "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c",
2897 "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002898 "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002899 "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002900 "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c",
2901 "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002902 "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002903 "src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c",
2904 "src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c",
2905 "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002906 "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c",
2907 "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002908 "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002909 "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c",
2910 "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002911 "src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c",
2912 "src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08002913 "src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mlal.c",
2914 "src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mull.c",
2915 "src/qs8-gemm/gen/3x8c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08002916 "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2917 "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002918 "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002919 "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002920 "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c",
2921 "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002922 "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002923 "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002924 "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c",
2925 "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002926 "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002927 "src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c",
2928 "src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c",
2929 "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002930 "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c",
2931 "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002932 "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002933 "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c",
2934 "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002935 "src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c",
2936 "src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08002937 "src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mlal.c",
2938 "src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mull.c",
2939 "src/qs8-gemm/gen/3x16c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08002940 "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c",
2941 "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002942 "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002943 "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002944 "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c",
2945 "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002946 "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002947 "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002948 "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c",
2949 "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002950 "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002951 "src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c",
2952 "src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c",
2953 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002954 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c",
2955 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002956 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002957 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c",
2958 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002959 "src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c",
2960 "src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08002961 "src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mlal.c",
2962 "src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mull.c",
2963 "src/qs8-gemm/gen/4x8c16-minmax-rndnu-neon-mlal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07002964 "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07002965 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2966 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07002967 "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002968 "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002969 "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c",
2970 "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002971 "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002972 "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002973 "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c",
2974 "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002975 "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002976 "src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c",
2977 "src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c",
2978 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002979 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c",
2980 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002981 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08002982 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c",
2983 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002984 "src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c",
2985 "src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08002986 "src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mlal.c",
2987 "src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mull.c",
2988 "src/qs8-gemm/gen/4x16c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08002989 "src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c",
2990 "src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08002991 "src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c",
2992 "src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08002993 "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c",
2994 "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07002995 "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08002996 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08002997 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c",
2998 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08002999 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003000 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003001 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c",
3002 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003003 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003004 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003005 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c",
3006 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003007 "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003008 "src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c",
3009 "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c",
3010 "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c",
3011 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003012 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c",
3013 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003014 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003015 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c",
3016 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003017 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003018 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c",
3019 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003020 "src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c",
3021 "src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c",
3022 "src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c",
3023 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003024 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal.c",
Marat Dukhan89991902021-12-06 00:54:36 -08003025 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mull.c",
3026 "src/qs8-igemm/gen/1x8c16-minmax-rndnu-neon-mlal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07003027 "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07003028 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c",
3029 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07003030 "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003031 "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003032 "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c",
3033 "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003034 "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003035 "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003036 "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c",
3037 "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003038 "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003039 "src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c",
3040 "src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c",
3041 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003042 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c",
3043 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003044 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003045 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c",
3046 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003047 "src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c",
3048 "src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08003049 "src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mlal.c",
3050 "src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mull.c",
3051 "src/qs8-igemm/gen/1x16c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08003052 "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c",
3053 "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07003054 "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003055 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003056 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c",
3057 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003058 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003059 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003060 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c",
3061 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003062 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003063 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003064 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c",
3065 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003066 "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003067 "src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c",
3068 "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c",
3069 "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c",
3070 "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003071 "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c",
3072 "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003073 "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003074 "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c",
3075 "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003076 "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003077 "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c",
3078 "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003079 "src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c",
3080 "src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c",
3081 "src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c",
3082 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003083 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal.c",
Marat Dukhan89991902021-12-06 00:54:36 -08003084 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mull.c",
3085 "src/qs8-igemm/gen/2x8c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08003086 "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c",
3087 "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07003088 "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003089 "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003090 "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c",
3091 "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003092 "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003093 "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003094 "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c",
3095 "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003096 "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003097 "src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c",
3098 "src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c",
3099 "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003100 "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c",
3101 "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003102 "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003103 "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c",
3104 "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003105 "src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c",
3106 "src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08003107 "src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mlal.c",
3108 "src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mull.c",
3109 "src/qs8-igemm/gen/2x16c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08003110 "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c",
3111 "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07003112 "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003113 "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003114 "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c",
3115 "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003116 "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003117 "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003118 "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c",
3119 "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003120 "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003121 "src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c",
3122 "src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c",
3123 "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003124 "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c",
3125 "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003126 "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003127 "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c",
3128 "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003129 "src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c",
3130 "src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08003131 "src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mlal.c",
3132 "src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mull.c",
3133 "src/qs8-igemm/gen/3x8c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08003134 "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c",
3135 "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07003136 "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003137 "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003138 "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c",
3139 "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003140 "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003141 "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003142 "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c",
3143 "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003144 "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003145 "src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c",
3146 "src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c",
3147 "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003148 "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c",
3149 "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003150 "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003151 "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c",
3152 "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003153 "src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c",
3154 "src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08003155 "src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mlal.c",
3156 "src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mull.c",
3157 "src/qs8-igemm/gen/3x16c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08003158 "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c",
3159 "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard510b8e02021-07-26 17:25:18 -07003160 "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003161 "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003162 "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c",
3163 "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003164 "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003165 "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003166 "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c",
3167 "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003168 "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003169 "src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c",
3170 "src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c",
3171 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003172 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c",
3173 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003174 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003175 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c",
3176 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003177 "src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c",
3178 "src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08003179 "src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mlal.c",
3180 "src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mull.c",
3181 "src/qs8-igemm/gen/4x8c16-minmax-rndnu-neon-mlal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07003182 "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Frank Barchard22fbe772021-07-20 15:56:32 -07003183 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c",
3184 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07003185 "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003186 "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003187 "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c",
3188 "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003189 "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003190 "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003191 "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c",
3192 "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003193 "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003194 "src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c",
3195 "src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c",
3196 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003197 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c",
3198 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003199 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003200 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c",
3201 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003202 "src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c",
3203 "src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c",
Marat Dukhan89991902021-12-06 00:54:36 -08003204 "src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mlal.c",
3205 "src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mull.c",
3206 "src/qs8-igemm/gen/4x16c16-minmax-rndnu-neon-mlal.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08003207 "src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c",
3208 "src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c",
Frank Barchard27bf92c2021-11-24 15:47:52 -08003209 "src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c",
3210 "src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003211 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003212 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003213 "src/qs8-requantization/rndna-neon.c",
Marat Dukhand3d818c2021-07-16 17:56:54 -07003214 "src/qs8-requantization/rndnu-neon-mull.c",
3215 "src/qs8-requantization/rndnu-neon-qdmulh.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07003216 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
3217 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
3218 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
3219 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
Marat Dukhaneb3cff32021-07-30 11:35:27 -07003220 "src/qs8-vadd/gen/minmax-neon-ld128-x16.c",
3221 "src/qs8-vadd/gen/minmax-neon-ld128-x32.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07003222 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
3223 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
3224 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
3225 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhaneb3cff32021-07-30 11:35:27 -07003226 "src/qs8-vaddc/gen/minmax-neon-ld128-x16.c",
3227 "src/qs8-vaddc/gen/minmax-neon-ld128-x32.c",
Marat Dukhan4a7b70f2021-08-02 18:18:10 -07003228 "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x8.c",
3229 "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c",
3230 "src/qs8-vmul/gen/minmax-fp32-neon-ld128-x16.c",
3231 "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x8.c",
3232 "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c",
3233 "src/qs8-vmulc/gen/minmax-fp32-neon-ld128-x16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003234 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
3235 "src/qu8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07003236 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07003237 "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c",
Marat Dukhan73a899a2021-07-27 00:10:38 -07003238 "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07003239 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07003240 "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c",
Marat Dukhan73a899a2021-07-27 00:10:38 -07003241 "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07003242 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07003243 "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c",
Marat Dukhan73a899a2021-07-27 00:10:38 -07003244 "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07003245 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07003246 "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c",
Marat Dukhan73a899a2021-07-27 00:10:38 -07003247 "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07003248 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07003249 "src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul8.c",
3250 "src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07003251 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07003252 "src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul8.c",
3253 "src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07003254 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07003255 "src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul8.c",
3256 "src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07003257 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c",
Frank Barchard354cbc62021-09-27 21:42:41 -07003258 "src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul8.c",
3259 "src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c",
Marat Dukhanfee66be2021-12-09 17:51:15 -08003260 "src/qu8-f32-vcvt/gen/vcvt-neon-x8.c",
3261 "src/qu8-f32-vcvt/gen/vcvt-neon-x16.c",
3262 "src/qu8-f32-vcvt/gen/vcvt-neon-x24.c",
3263 "src/qu8-f32-vcvt/gen/vcvt-neon-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07003264 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
3265 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
Digant Desai59d65152021-11-29 10:44:04 -08003266 "src/qu8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07003267 "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07003268 "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07003269 "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Digant Desai59d65152021-11-29 10:44:04 -08003270 "src/qu8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07003271 "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07003272 "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07003273 "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Digant Desai59d65152021-11-29 10:44:04 -08003274 "src/qu8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07003275 "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07003276 "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07003277 "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c",
Digant Desai59d65152021-11-29 10:44:04 -08003278 "src/qu8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07003279 "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07003280 "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c",
Marat Dukhan173661d2021-07-26 23:47:08 -07003281 "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07003282 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003283 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003284 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07003285 "src/qu8-vadd/gen/minmax-neon-ld64-x8.c",
3286 "src/qu8-vadd/gen/minmax-neon-ld64-x16.c",
Frank Barchard0a3093c2021-08-31 09:58:11 -07003287 "src/qu8-vadd/gen/minmax-neon-ld64-x32.c",
Marat Dukhaneb3cff32021-07-30 11:35:27 -07003288 "src/qu8-vadd/gen/minmax-neon-ld128-x16.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07003289 "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c",
3290 "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c",
Frank Barchard0a3093c2021-08-31 09:58:11 -07003291 "src/qu8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhaneb3cff32021-07-30 11:35:27 -07003292 "src/qu8-vaddc/gen/minmax-neon-ld128-x16.c",
Marat Dukhan4a7b70f2021-08-02 18:18:10 -07003293 "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x8.c",
3294 "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c",
3295 "src/qu8-vmul/gen/minmax-fp32-neon-ld128-x16.c",
3296 "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x8.c",
3297 "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c",
3298 "src/qu8-vmulc/gen/minmax-fp32-neon-ld128-x16.c",
Marat Dukhancdb42a52021-11-22 20:09:32 -08003299 "src/s8-ibilinear/gen/neon-c8.c",
3300 "src/s8-ibilinear/gen/neon-c16.c",
Marat Dukhan23147532021-08-16 07:26:56 -07003301 "src/s8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhane79acb72021-08-16 19:03:53 -07003302 "src/s8-vclamp/neon-x64.c",
Marat Dukhancdb42a52021-11-22 20:09:32 -08003303 "src/u8-ibilinear/gen/neon-c8.c",
3304 "src/u8-ibilinear/gen/neon-c16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07003305 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003306 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003307 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003308 "src/x8-zip/x2-neon.c",
3309 "src/x8-zip/x3-neon.c",
3310 "src/x8-zip/x4-neon.c",
3311 "src/x8-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003312 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07003313 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003314 "src/x32-zip/x2-neon.c",
3315 "src/x32-zip/x3-neon.c",
3316 "src/x32-zip/x4-neon.c",
3317 "src/x32-zip/xm-neon.c",
Marat Dukhan933051b2021-08-07 16:26:15 -07003318 "src/xx-fill/neon-x64.c",
Marat Dukhan0461f2d2021-08-08 12:36:29 -07003319 "src/xx-pad/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003320]
3321
Marat Dukhan8ff372c2021-09-28 14:43:17 -07003322PROD_NEONFP16_MICROKERNEL_SRCS = [
Marat Dukhanaf2ba002021-10-24 14:21:41 -07003323 "src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c",
Marat Dukhana0c61682021-11-10 19:23:41 -08003324 "src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07003325]
3326
3327ALL_NEONFP16_MICROKERNEL_SRCS = [
3328 "src/f16-f32-vcvt/gen/vcvt-neonfp16-x8.c",
3329 "src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c",
Marat Dukhand77f77d2021-10-24 15:39:59 -07003330 "src/f32-f16-vcvt/gen/vcvt-neonfp16-x8.c",
3331 "src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c",
Marat Dukhan3ed866b2021-09-29 08:23:33 -07003332 "src/math/cvt-f16-f32-neonfp16.c",
Marat Dukhan582e1842021-10-25 17:18:36 -07003333 "src/math/cvt-f32-f16-neonfp16.c",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07003334]
3335
Marat Dukhan2c724952021-07-27 18:46:30 -07003336PROD_NEONFMA_MICROKERNEL_SRCS = [
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07003337 "src/f32-dwconv/gen/up8x3-minmax-neonfma.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07003338 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
3339 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
Frank Barcharddbe781b2021-10-18 10:29:52 -07003340 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07003341 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
3342 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
3343 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
3344 "src/f32-ibilinear/gen/neonfma-c8.c",
3345 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
3346 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
3347 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
3348 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
3349 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
3350 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
3351 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
3352 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
3353]
3354
3355ALL_NEONFMA_MICROKERNEL_SRCS = [
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07003356 "src/f32-dwconv/gen/up4x3-minmax-neonfma-acc2.c",
3357 "src/f32-dwconv/gen/up4x3-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003358 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
3359 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
3360 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
3361 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
3362 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
3363 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07003364 "src/f32-dwconv/gen/up8x3-minmax-neonfma-acc2.c",
3365 "src/f32-dwconv/gen/up8x3-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003366 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
3367 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
3368 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
3369 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
3370 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
3371 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07003372 "src/f32-dwconv/gen/up16x3-minmax-neon-acc2.c",
3373 "src/f32-dwconv/gen/up16x3-minmax-neon.c",
3374 "src/f32-dwconv/gen/up16x3-minmax-neonfma-acc2.c",
3375 "src/f32-dwconv/gen/up16x3-minmax-neonfma.c",
Frank Barchardc9f9d672021-10-18 12:51:59 -07003376 "src/f32-dwconv/gen/up16x4-minmax-neon-acc2.c",
3377 "src/f32-dwconv/gen/up16x4-minmax-neon.c",
3378 "src/f32-dwconv/gen/up16x4-minmax-neonfma-acc2.c",
3379 "src/f32-dwconv/gen/up16x4-minmax-neonfma.c",
3380 "src/f32-dwconv/gen/up16x9-minmax-neon-acc2.c",
3381 "src/f32-dwconv/gen/up16x9-minmax-neon.c",
3382 "src/f32-dwconv/gen/up16x9-minmax-neonfma-acc2.c",
3383 "src/f32-dwconv/gen/up16x9-minmax-neonfma.c",
3384 "src/f32-dwconv/gen/up16x25-minmax-neon-acc2.c",
3385 "src/f32-dwconv/gen/up16x25-minmax-neon.c",
3386 "src/f32-dwconv/gen/up16x25-minmax-neonfma-acc2.c",
3387 "src/f32-dwconv/gen/up16x25-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003388 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
3389 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
3390 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
3391 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
3392 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
3393 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
3394 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
3395 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
3396 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
3397 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
3398 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
3399 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
3400 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
3401 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
3402 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
3403 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
3404 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
3405 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08003406 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
3407 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08003408 "src/f32-ibilinear/gen/neonfma-c4.c",
3409 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003410 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003411 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003412 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003413 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
3414 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003415 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
3416 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003417 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
3418 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003419 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
3420 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08003421 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08003422 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003423 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08003424 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
3425 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003426 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08003427 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
3428 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003429 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08003430 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
3431 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003432 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
3433 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
3434 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
3435 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
3436 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
3437 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
3438 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
3439 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
3440 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
3441 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
3442 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
3443 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
3444 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08003445 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
3446 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
3447 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
3448 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
3449 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
3450 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
3451 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
3452 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
3453 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
3454 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
3455 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
3456 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
3457 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003458 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
3459 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
3460 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
3461 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
3462 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
3463 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
3464 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
3465 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
3466 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
3467 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
3468 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
3469 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07003470 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
3471 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003472 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
3473 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
3474 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
3475 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
3476 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
3477 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
3478 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
3479 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
3480 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
3481 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
3482 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
3483 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
3484 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
3485 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
3486 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
3487 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
3488 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
3489 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
3490 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
3491 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
3492 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
3493 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
3494 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
3495 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
3496 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
3497 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
3498 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
3499 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
3500 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
3501 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
3502 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
3503 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
3504 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
3505 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
3506 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
3507 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
3508 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
3509 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
3510 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
3511 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
3512 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
3513 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
3514 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
3515 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
3516 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
3517 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
3518 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
3519 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
3520 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
3521 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
3522 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
3523 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
3524 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
3525 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003526 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
3527 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
3528 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
3529 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
3530 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
3531 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
3532 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
3533 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
3534 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
3535 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
3536 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
3537 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
3538 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
3539 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
3540 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
3541 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
3542 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
3543 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
3544 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
3545 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003546 "src/math/exp-neonfma-rr2-lut64-p2.c",
3547 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003548 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
3549 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08003550 "src/math/expminus-neonfma-rr2-lut64-p2.c",
3551 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
3552 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08003553 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
3554 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
3555 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003556 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
3557 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
3558 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08003559 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
3560 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
3561 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08003562 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
3563 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
3564 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003565 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
3566 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
3567 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08003568 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
3569 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
3570 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003571 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003572 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003573 "src/math/sqrt-neonfma-nr2fma.c",
3574 "src/math/sqrt-neonfma-nr2fma1adj.c",
3575 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003576]
3577
Marat Dukhanf7182322021-09-09 18:53:46 -07003578PROD_AARCH64_NEON_MICROKERNEL_SRCS = [
Marat Dukhan2c724952021-07-27 18:46:30 -07003579 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
3580 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
3581 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
3582 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
3583 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
3584 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
3585 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
3586 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
3587 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
3588 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
3589 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
3590 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
3591 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
3592 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
3593 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
3594 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
3595 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
Marat Dukhan98e054b2021-09-13 09:43:50 -07003596 "src/x8-lut/gen/lut-neon-tbx128x4-x64.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07003597]
3598
Marat Dukhanf7182322021-09-09 18:53:46 -07003599ALL_AARCH64_NEON_MICROKERNEL_SRCS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07003600 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07003601 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003602 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07003603 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07003604 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07003605 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003606 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07003607 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07003608 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003609 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
3610 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
3611 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07003612 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003613 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07003614 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
3615 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
3616 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
3617 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
3618 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07003619 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
3620 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
3621 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003622 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07003623 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003624 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
3625 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
3626 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07003627 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
3628 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
3629 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
3630 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003631 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07003632 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
3633 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003634 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07003635 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003636 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07003637 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07003638 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
3639 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07003640 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
3641 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
3642 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
3643 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
3644 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
3645 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
3646 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
3647 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07003648 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003649 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003650 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
3651 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
3652 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
3653 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
3654 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
3655 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
3656 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
3657 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
3658 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
3659 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
3660 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
3661 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
3662 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
3663 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
3664 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
3665 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
3666 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
3667 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
3668 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
3669 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07003670 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
3671 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07003672 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
3673 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003674 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
3675 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003676 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
3677 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07003678 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
3679 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003680 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
3681 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
3682 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
3683 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
3684 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
3685 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003686 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
3687 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
3688 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
3689 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
3690 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
3691 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
3692 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
3693 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
3694 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
3695 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
3696 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
3697 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
3698 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
3699 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
3700 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
3701 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
3702 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
3703 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003704 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
3705 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08003706 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003707 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08003708 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08003709 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003710 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08003711 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhanf7182322021-09-09 18:53:46 -07003712 "src/x8-lut/gen/lut-neon-tbx128x4-x16.c",
3713 "src/x8-lut/gen/lut-neon-tbx128x4-x32.c",
3714 "src/x8-lut/gen/lut-neon-tbx128x4-x48.c",
3715 "src/x8-lut/gen/lut-neon-tbx128x4-x64.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003716]
3717
Marat Dukhan2c724952021-07-27 18:46:30 -07003718PROD_NEONV8_MICROKERNEL_SRCS = [
Frank Barchardcb052a32021-12-10 14:16:33 -08003719 "src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c",
3720 "src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07003721 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
3722 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
3723 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
3724 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07003725 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c",
Frank Barchard7da8b022021-08-31 09:49:10 -07003726 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c",
3727 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003728 "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c",
3729 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07003730 "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003731 "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c",
3732 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07003733 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003734 "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c",
3735 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07003736 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003737 "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c",
3738 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07003739 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -07003740 "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c",
3741 "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c",
3742 "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c",
3743 "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07003744]
3745
3746ALL_NEONV8_MICROKERNEL_SRCS = [
Marat Dukhan3df14d32021-12-01 13:05:51 -08003747 "src/f32-qs8-vcvt/gen/vcvt-neonv8-x8.c",
3748 "src/f32-qs8-vcvt/gen/vcvt-neonv8-x16.c",
3749 "src/f32-qs8-vcvt/gen/vcvt-neonv8-x24.c",
3750 "src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c",
3751 "src/f32-qu8-vcvt/gen/vcvt-neonv8-x8.c",
3752 "src/f32-qu8-vcvt/gen/vcvt-neonv8-x16.c",
3753 "src/f32-qu8-vcvt/gen/vcvt-neonv8-x24.c",
3754 "src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c",
Frank Barchardcb052a32021-12-10 14:16:33 -08003755 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
3756 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
3757 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
3758 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
3759 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
3760 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
3761 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
3762 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhand24301d2021-12-02 00:13:45 -08003763 "src/math/cvt-f32-qs8-neonv8.c",
3764 "src/math/cvt-f32-qu8-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07003765 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003766 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07003767 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07003768 "src/math/roundz-neonv8.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07003769 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c",
3770 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07003771 "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07003772 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c",
3773 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07003774 "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07003775 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c",
3776 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c",
3777 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c",
3778 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07003779 "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
Marat Dukhan5f2939f2021-07-23 13:38:32 -07003780 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c",
3781 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c",
3782 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c",
3783 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c",
Marat Dukhan59af5812021-06-29 18:09:57 -07003784 "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
3785 "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
3786 "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
3787 "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
3788 "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003789 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003790 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c",
3791 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003792 "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003793 "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c",
3794 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003795 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c",
3796 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003797 "src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c",
3798 "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07003799 "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003800 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003801 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c",
3802 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003803 "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003804 "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c",
3805 "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003806 "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c",
3807 "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003808 "src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c",
3809 "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07003810 "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003811 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003812 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c",
3813 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003814 "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003815 "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c",
3816 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003817 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c",
3818 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003819 "src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c",
3820 "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07003821 "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003822 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003823 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c",
3824 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003825 "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003826 "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c",
3827 "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003828 "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c",
3829 "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003830 "src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c",
3831 "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c",
Marat Dukhane76478b2021-06-28 16:35:40 -07003832 "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07003833 "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
3834 "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
3835 "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
3836 "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
3837 "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
3838 "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
3839 "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
3840 "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003841 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003842 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c",
3843 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003844 "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003845 "src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c",
3846 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003847 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c",
3848 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003849 "src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c",
3850 "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07003851 "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003852 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003853 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c",
3854 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003855 "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003856 "src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c",
3857 "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003858 "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c",
3859 "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003860 "src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c",
3861 "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07003862 "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003863 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003864 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c",
3865 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003866 "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003867 "src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c",
3868 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003869 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c",
3870 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003871 "src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c",
3872 "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07003873 "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003874 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard15eec022021-11-17 13:26:20 -08003875 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c",
3876 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barchard42f5c502021-11-16 10:04:21 -08003877 "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003878 "src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c",
3879 "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c",
Frank Barchard64ab1b72021-11-22 10:57:40 -08003880 "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c",
3881 "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c",
Frank Barcharde22685a2021-11-12 11:36:58 -08003882 "src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c",
3883 "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c",
Frank Barcharda03020a2021-06-28 15:44:06 -07003884 "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan4a7b70f2021-08-02 18:18:10 -07003885 "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c",
3886 "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c",
3887 "src/qs8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c",
3888 "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c",
3889 "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c",
3890 "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c",
Marat Dukhan605696a2021-07-15 18:01:30 -07003891 "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c",
3892 "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c",
3893 "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c",
3894 "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c",
3895 "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c",
3896 "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c",
3897 "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c",
3898 "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c",
Marat Dukhan69c8a292021-07-14 19:34:56 -07003899 "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
3900 "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
3901 "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c",
3902 "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c",
Marat Dukhan4a7b70f2021-08-02 18:18:10 -07003903 "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c",
3904 "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c",
3905 "src/qu8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c",
3906 "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c",
3907 "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c",
3908 "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07003909]
3910
Marat Dukhan2c724952021-07-27 18:46:30 -07003911PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [
3912 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
3913 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
3914 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
3915 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
3916 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
3917 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
3918 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
3919 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
3920 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
3921 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
3922 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
3923 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
3924 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
3925 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
3926 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
3927]
3928
3929ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [
Frank Barchard5a599a62020-06-04 20:12:44 -07003930 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
3931 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
3932 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
3933 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003934 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
3935 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
3936 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
3937 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
3938 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
3939 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
3940 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
3941 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchardc9f9d672021-10-18 12:51:59 -07003942 "src/f16-dwconv/gen/up32x4-minmax-neonfp16arith-acc2.c",
3943 "src/f16-dwconv/gen/up32x4-minmax-neonfp16arith.c",
3944 "src/f16-dwconv/gen/up32x9-minmax-neonfp16arith-acc2.c",
3945 "src/f16-dwconv/gen/up32x9-minmax-neonfp16arith.c",
3946 "src/f16-dwconv/gen/up32x25-minmax-neonfp16arith-acc2.c",
3947 "src/f16-dwconv/gen/up32x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07003948 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
3949 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003950 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
3951 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
3952 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
3953 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
3954 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
3955 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
3956 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
3957 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
3958 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
3959 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
3960 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
3961 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
3962 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
3963 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
3964 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
3965 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003966 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
3967 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
3968 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
3969 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
3970 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
3971 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
3972 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
3973 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07003974 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07003975 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003976 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003977 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003978 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003979 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003980 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003981 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003982 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003983 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
3984 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
3985 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
3986 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
3987 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
3988 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
3989 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
3990 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
3991 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
3992 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
3993 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
3994 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
3995 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
3996 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
3997 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
3998 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
3999 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
4000 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
4001 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
4002 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
4003 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
4004 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
4005 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
4006 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
4007 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
4008 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
4009 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
4010 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
4011 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004012 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
4013 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004014 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
4015 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004016 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
4017 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07004018 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
4019 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004020]
4021
Marat Dukhan2c724952021-07-27 18:46:30 -07004022PROD_NEONDOT_MICROKERNEL_SRCS = [
4023 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
4024 "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
4025 "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
4026 "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
4027 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
4028 "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
4029 "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
4030 "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
4031 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c",
4032 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c",
4033 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c",
4034 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c",
4035 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c",
4036 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c",
4037 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c",
4038 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c",
Frank Barchard8b698022021-08-26 11:17:32 -07004039 "src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c",
Frank Barchardde9c64a2021-08-17 18:32:50 -07004040 "src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c",
4041 "src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c",
4042 "src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c",
Frank Barchard8b698022021-08-26 11:17:32 -07004043 "src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c",
Frank Barchardde9c64a2021-08-17 18:32:50 -07004044 "src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c",
4045 "src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c",
4046 "src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004047]
4048
4049ALL_NEONDOT_MICROKERNEL_SRCS = [
Marat Dukhane76478b2021-06-28 16:35:40 -07004050 "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
4051 "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
4052 "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
4053 "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
4054 "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
4055 "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
4056 "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
4057 "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
4058 "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
4059 "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
4060 "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
4061 "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
4062 "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
4063 "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
4064 "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
4065 "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07004066 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07004067 "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07004068 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07004069 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07004070 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c",
Marat Dukhan4486f872021-08-07 15:22:50 -07004071 "src/qs8-gemm/gen/6x8c4-minmax-rndnu-neondot.c",
4072 "src/qs8-gemm/gen/6x16c4-minmax-rndnu-neondot.c",
4073 "src/qs8-gemm/gen/8x8c4-minmax-rndnu-neondot.c",
4074 "src/qs8-gemm/gen/8x16c4-minmax-rndnu-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07004075 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07004076 "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07004077 "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07004078 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c",
Marat Dukhane903dff2021-07-16 19:43:41 -07004079 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c",
Marat Dukhan4486f872021-08-07 15:22:50 -07004080 "src/qs8-igemm/gen/6x8c4-minmax-rndnu-neondot.c",
4081 "src/qs8-igemm/gen/6x16c4-minmax-rndnu-neondot.c",
4082 "src/qs8-igemm/gen/8x8c4-minmax-rndnu-neondot.c",
4083 "src/qs8-igemm/gen/8x16c4-minmax-rndnu-neondot.c",
Frank Barchard88e839c2021-08-11 00:12:31 -07004084 "src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c",
Digant Desai9982ed32021-11-24 13:03:54 -08004085 "src/qu8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
Frank Barchard88e839c2021-08-11 00:12:31 -07004086 "src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c",
Frank Barchardcdf59a52021-09-08 13:55:24 -07004087 "src/qu8-gemm/gen/1x32c4-minmax-rndnu-neondot.c",
Frank Barcharde0331262021-08-11 23:18:59 -07004088 "src/qu8-gemm/gen/2x8c4-minmax-rndnu-neondot.c",
Digant Desai9982ed32021-11-24 13:03:54 -08004089 "src/qu8-gemm/gen/2x16c4-minmax-fp32-neondot.c",
Frank Barcharde0331262021-08-11 23:18:59 -07004090 "src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c",
Frank Barchardcdf59a52021-09-08 13:55:24 -07004091 "src/qu8-gemm/gen/2x32c4-minmax-rndnu-neondot.c",
Frank Barcharde0331262021-08-11 23:18:59 -07004092 "src/qu8-gemm/gen/3x8c4-minmax-rndnu-neondot.c",
4093 "src/qu8-gemm/gen/3x16c4-minmax-rndnu-neondot.c",
Frank Barchardcdf59a52021-09-08 13:55:24 -07004094 "src/qu8-gemm/gen/3x32c4-minmax-rndnu-neondot.c",
Frank Barchard88e839c2021-08-11 00:12:31 -07004095 "src/qu8-gemm/gen/4x8c4-minmax-rndnu-neondot.c",
Digant Desai9982ed32021-11-24 13:03:54 -08004096 "src/qu8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
Frank Barchard88e839c2021-08-11 00:12:31 -07004097 "src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c",
Frank Barcharde0331262021-08-11 23:18:59 -07004098 "src/qu8-gemm/gen/5x8c4-minmax-rndnu-neondot.c",
4099 "src/qu8-gemm/gen/5x16c4-minmax-rndnu-neondot.c",
Frank Barchard88e839c2021-08-11 00:12:31 -07004100 "src/qu8-gemm/gen/6x8c4-minmax-rndnu-neondot.c",
4101 "src/qu8-gemm/gen/6x16c4-minmax-rndnu-neondot.c",
4102 "src/qu8-gemm/gen/8x8c4-minmax-rndnu-neondot.c",
4103 "src/qu8-gemm/gen/8x16c4-minmax-rndnu-neondot.c",
4104 "src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c",
Digant Desai9982ed32021-11-24 13:03:54 -08004105 "src/qu8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
Frank Barchard88e839c2021-08-11 00:12:31 -07004106 "src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c",
Frank Barchardcdf59a52021-09-08 13:55:24 -07004107 "src/qu8-igemm/gen/1x32c4-minmax-rndnu-neondot.c",
Frank Barcharde0331262021-08-11 23:18:59 -07004108 "src/qu8-igemm/gen/2x8c4-minmax-rndnu-neondot.c",
Digant Desai9982ed32021-11-24 13:03:54 -08004109 "src/qu8-igemm/gen/2x16c4-minmax-fp32-neondot.c",
Frank Barcharde0331262021-08-11 23:18:59 -07004110 "src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c",
Frank Barchardcdf59a52021-09-08 13:55:24 -07004111 "src/qu8-igemm/gen/2x32c4-minmax-rndnu-neondot.c",
Frank Barcharde0331262021-08-11 23:18:59 -07004112 "src/qu8-igemm/gen/3x8c4-minmax-rndnu-neondot.c",
4113 "src/qu8-igemm/gen/3x16c4-minmax-rndnu-neondot.c",
Frank Barchardcdf59a52021-09-08 13:55:24 -07004114 "src/qu8-igemm/gen/3x32c4-minmax-rndnu-neondot.c",
Frank Barchard88e839c2021-08-11 00:12:31 -07004115 "src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c",
Frank Barchardcb052a32021-12-10 14:16:33 -08004116 "src/qu8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
Frank Barchard88e839c2021-08-11 00:12:31 -07004117 "src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c",
Frank Barcharde0331262021-08-11 23:18:59 -07004118 "src/qu8-igemm/gen/5x8c4-minmax-rndnu-neondot.c",
4119 "src/qu8-igemm/gen/5x16c4-minmax-rndnu-neondot.c",
Frank Barchard88e839c2021-08-11 00:12:31 -07004120 "src/qu8-igemm/gen/6x8c4-minmax-rndnu-neondot.c",
4121 "src/qu8-igemm/gen/6x16c4-minmax-rndnu-neondot.c",
4122 "src/qu8-igemm/gen/8x8c4-minmax-rndnu-neondot.c",
4123 "src/qu8-igemm/gen/8x16c4-minmax-rndnu-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07004124]
4125
Marat Dukhan2c724952021-07-27 18:46:30 -07004126PROD_SSE_MICROKERNEL_SRCS = [
4127 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
4128 "src/f32-avgpool/9x-minmax-sse-c4.c",
4129 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07004130 "src/f32-dwconv/gen/up8x3-minmax-sse.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004131 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
4132 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
4133 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
4134 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
4135 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
4136 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
4137 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
4138 "src/f32-gavgpool-cw/sse-x4.c",
4139 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
4140 "src/f32-gavgpool/7x-minmax-sse-c4.c",
4141 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
4142 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
4143 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
4144 "src/f32-ibilinear-chw/gen/sse-p8.c",
4145 "src/f32-ibilinear/gen/sse-c8.c",
4146 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
4147 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
4148 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
4149 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
4150 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
4151 "src/f32-pavgpool/9x-minmax-sse-c4.c",
4152 "src/f32-rmax/sse.c",
4153 "src/f32-spmm/gen/32x1-minmax-sse.c",
4154 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
4155 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
4156 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
4157 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
4158 "src/f32-vbinary/gen/vmax-sse-x8.c",
4159 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
4160 "src/f32-vbinary/gen/vmin-sse-x8.c",
4161 "src/f32-vbinary/gen/vminc-sse-x8.c",
4162 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
4163 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
4164 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
4165 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
4166 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
4167 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
4168 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
4169 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
4170 "src/f32-vclamp/gen/vclamp-sse-x8.c",
4171 "src/f32-vhswish/gen/vhswish-sse-x8.c",
4172 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
4173 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
4174 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
4175 "src/f32-vunary/gen/vabs-sse-x8.c",
4176 "src/f32-vunary/gen/vneg-sse-x8.c",
4177 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004178 "src/x32-packx/x4-sse.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004179]
4180
4181ALL_SSE_MICROKERNEL_SRCS = [
Marat Dukhan99936602020-04-11 16:47:01 -07004182 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
4183 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07004184 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
4185 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07004186 "src/f32-dwconv/gen/up4x3-minmax-sse-acc2.c",
4187 "src/f32-dwconv/gen/up4x3-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004188 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
4189 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
4190 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
4191 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004192 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
4193 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07004194 "src/f32-dwconv/gen/up8x3-minmax-sse-acc2.c",
4195 "src/f32-dwconv/gen/up8x3-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004196 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
4197 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
4198 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
4199 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004200 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
4201 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07004202 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
4203 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
4204 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07004205 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07004206 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07004207 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
4208 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
4209 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
4210 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
4211 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07004212 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
4213 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
4214 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07004215 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07004216 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07004217 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
4218 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
4219 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07004220 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
4221 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
4222 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
4223 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
4224 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
4225 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
4226 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
4227 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
4228 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
4229 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
4230 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
4231 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
4232 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07004233 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
4234 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
4235 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
4236 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
4237 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
4238 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
4239 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
4240 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07004241 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08004242 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07004243 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07004244 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
4245 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004246 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
4247 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
4248 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08004249 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
4250 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
4251 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004252 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
4253 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
4254 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08004255 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
4256 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
4257 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004258 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
4259 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
4260 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08004261 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
4262 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
4263 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004264 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
4265 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
4266 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
4267 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08004268 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
4269 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
4270 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07004271 "src/f32-ibilinear-chw/gen/sse-p4.c",
4272 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07004273 "src/f32-ibilinear/gen/sse-c4.c",
4274 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004275 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
4276 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
4277 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08004278 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
4279 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
4280 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004281 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
4282 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
4283 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
4284 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08004285 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
4286 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
4287 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07004288 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
4289 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
4290 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07004291 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07004292 "src/f32-prelu/gen/sse-2x4.c",
4293 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004294 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07004295 "src/f32-spmm/gen/4x1-minmax-sse.c",
4296 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07004297 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07004298 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004299 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
4300 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
4301 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
4302 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
4303 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
4304 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
4305 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
4306 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08004307 "src/f32-vbinary/gen/vmax-sse-x4.c",
4308 "src/f32-vbinary/gen/vmax-sse-x8.c",
4309 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
4310 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
4311 "src/f32-vbinary/gen/vmin-sse-x4.c",
4312 "src/f32-vbinary/gen/vmin-sse-x8.c",
4313 "src/f32-vbinary/gen/vminc-sse-x4.c",
4314 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004315 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
4316 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
4317 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
4318 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
4319 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
4320 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
4321 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
4322 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07004323 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
4324 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
4325 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
4326 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07004327 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
4328 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
4329 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
4330 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004331 "src/f32-vclamp/gen/vclamp-sse-x4.c",
4332 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004333 "src/f32-vhswish/gen/vhswish-sse-x4.c",
4334 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004335 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
4336 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07004337 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
4338 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004339 "src/f32-vrelu/gen/vrelu-sse-x4.c",
4340 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07004341 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
4342 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07004343 "src/f32-vunary/gen/vabs-sse-x4.c",
4344 "src/f32-vunary/gen/vabs-sse-x8.c",
4345 "src/f32-vunary/gen/vneg-sse-x4.c",
4346 "src/f32-vunary/gen/vneg-sse-x8.c",
4347 "src/f32-vunary/gen/vsqr-sse-x4.c",
4348 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07004349 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004350 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07004351 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07004352 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07004353 "src/math/sqrt-sse-hh1mac.c",
4354 "src/math/sqrt-sse-nr1mac.c",
4355 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004356 "src/x32-packx/x4-sse.c",
Frank Barchard70e8c992021-12-16 18:35:18 -08004357 "src/x32-transpose/4x4-sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004358]
4359
Marat Dukhan2c724952021-07-27 18:46:30 -07004360PROD_SSE2_MICROKERNEL_SRCS = [
Marat Dukhanaf2ba002021-10-24 14:21:41 -07004361 "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004362 "src/f32-argmaxpool/4x-sse2-c4.c",
4363 "src/f32-argmaxpool/9p8x-sse2-c4.c",
4364 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhana0c61682021-11-10 19:23:41 -08004365 "src/f32-f16-vcvt/gen/vcvt-sse2-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004366 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhaned2d7762021-12-03 23:51:19 -08004367 "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c",
4368 "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004369 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
4370 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
4371 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
4372 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
4373 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
4374 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
4375 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
4376 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
4377 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
4378 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
4379 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
4380 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
4381 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
4382 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
4383 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c",
4384 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard914f57b2021-12-13 12:31:42 -08004385 "src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004386 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
4387 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
4388 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
4389 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
4390 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
4391 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
4392 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
4393 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -07004394 "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c",
4395 "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004396 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
4397 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
4398 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
4399 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanf92206b2021-12-10 17:02:07 -08004400 "src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004401 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
4402 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
4403 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
4404 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
4405 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
4406 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
4407 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
4408 "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -07004409 "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c",
4410 "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c",
Marat Dukhan24abe6b2021-11-24 15:28:57 -08004411 "src/s8-ibilinear/gen/sse2-c8.c",
Marat Dukhan23147532021-08-16 07:26:56 -07004412 "src/s8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhane79acb72021-08-16 19:03:53 -07004413 "src/s8-vclamp/sse2-x64.c",
Marat Dukhan24abe6b2021-11-24 15:28:57 -08004414 "src/u8-ibilinear/gen/sse2-c8.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004415 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
4416 "src/u8-rmax/sse2.c",
4417 "src/u8-vclamp/sse2-x64.c",
4418 "src/x8-zip/x2-sse2.c",
4419 "src/x8-zip/x3-sse2.c",
4420 "src/x8-zip/x4-sse2.c",
4421 "src/x8-zip/xm-sse2.c",
4422 "src/x32-unpool/sse2.c",
4423 "src/x32-zip/x2-sse2.c",
4424 "src/x32-zip/x3-sse2.c",
4425 "src/x32-zip/x4-sse2.c",
4426 "src/x32-zip/xm-sse2.c",
Marat Dukhan933051b2021-08-07 16:26:15 -07004427 "src/xx-fill/sse2-x64.c",
Marat Dukhan0461f2d2021-08-08 12:36:29 -07004428 "src/xx-pad/sse2.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004429]
4430
4431ALL_SSE2_MICROKERNEL_SRCS = [
Marat Dukhan1227adb2021-10-16 17:33:51 -07004432 "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x8.c",
4433 "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x16.c",
4434 "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x24.c",
4435 "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c",
4436 "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x8.c",
4437 "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x16.c",
4438 "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x24.c",
4439 "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x32.c",
Marat Dukhan329da642019-11-19 21:44:39 -08004440 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004441 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08004442 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhaneb844232021-11-08 23:07:53 -08004443 "src/f32-f16-vcvt/gen/vcvt-sse2-x8.c",
4444 "src/f32-f16-vcvt/gen/vcvt-sse2-x16.c",
4445 "src/f32-f16-vcvt/gen/vcvt-sse2-x24.c",
4446 "src/f32-f16-vcvt/gen/vcvt-sse2-x32.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08004447 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
4448 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
4449 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
4450 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
4451 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
4452 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
4453 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
4454 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
4455 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
4456 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
4457 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
4458 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08004459 "src/f32-prelu/gen/sse2-2x4.c",
4460 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanc5aa2422021-12-01 00:15:19 -08004461 "src/f32-qs8-vcvt/gen/vcvt-sse2-x8.c",
4462 "src/f32-qs8-vcvt/gen/vcvt-sse2-x16.c",
4463 "src/f32-qs8-vcvt/gen/vcvt-sse2-x24.c",
4464 "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c",
4465 "src/f32-qu8-vcvt/gen/vcvt-sse2-x8.c",
4466 "src/f32-qu8-vcvt/gen/vcvt-sse2-x16.c",
4467 "src/f32-qu8-vcvt/gen/vcvt-sse2-x24.c",
4468 "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08004469 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08004470 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004471 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08004472 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
4473 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004474 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08004475 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
4476 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004477 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08004478 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
4479 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004480 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004481 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
4482 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
4483 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
4484 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
4485 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
4486 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
4487 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
4488 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
4489 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
4490 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
4491 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
4492 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004493 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
4494 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07004495 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
4496 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004497 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
4498 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
4499 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
4500 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
4501 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
4502 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004503 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
4504 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
4505 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
4506 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
4507 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
4508 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
4509 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
4510 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
4511 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
4512 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
4513 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
4514 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhan3ed866b2021-09-29 08:23:33 -07004515 "src/math/cvt-f16-f32-sse2-int16.c",
4516 "src/math/cvt-f16-f32-sse2-int32.c",
Marat Dukhan056f49d2021-11-08 17:44:42 -08004517 "src/math/cvt-f32-f16-sse2.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08004518 "src/math/exp-sse2-rr2-lut64-p2.c",
4519 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08004520 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08004521 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08004522 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004523 "src/math/roundd-sse2-cvt.c",
4524 "src/math/roundne-sse2-cvt.c",
4525 "src/math/roundu-sse2-cvt.c",
4526 "src/math/roundz-sse2-cvt.c",
4527 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
4528 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
4529 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
4530 "src/math/sigmoid-sse2-rr2-p5-div.c",
4531 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
4532 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004533 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004534 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004535 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004536 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004537 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004538 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004539 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004540 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07004541 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
4542 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004543 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004544 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004545 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004546 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004547 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004548 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004549 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004550 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004551 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004552 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004553 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004554 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004555 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004556 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004557 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004558 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004559 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004560 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004561 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004562 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004563 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004564 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004565 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004566 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004567 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004568 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004569 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004570 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004571 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004572 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004573 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004574 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004575 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004576 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004577 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004578 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004579 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004580 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhand873fa22021-12-10 01:55:10 -08004581 "src/qs8-f32-vcvt/gen/vcvt-sse2-x8.c",
4582 "src/qs8-f32-vcvt/gen/vcvt-sse2-x16.c",
4583 "src/qs8-f32-vcvt/gen/vcvt-sse2-x24.c",
4584 "src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07004585 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
4586 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
4587 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004588 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
4589 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
4590 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004591 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004592 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004593 "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004594 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004595 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004596 "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004597 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004598 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004599 "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004600 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004601 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004602 "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004603 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004604 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004605 "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004606 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004607 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004608 "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004609 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004610 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004611 "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004612 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004613 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004614 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004615 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004616 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004617 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004618 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004619 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004620 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004621 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004622 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004623 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004624 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004625 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07004626 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07004627 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07004628 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07004629 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
4630 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
4631 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
4632 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07004633 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
4634 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
4635 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
4636 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhana212eac2021-08-02 09:58:04 -07004637 "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c",
4638 "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c",
4639 "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c",
4640 "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07004641 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
4642 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07004643 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
4644 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
4645 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
4646 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhand873fa22021-12-10 01:55:10 -08004647 "src/qu8-f32-vcvt/gen/vcvt-sse2-x8.c",
4648 "src/qu8-f32-vcvt/gen/vcvt-sse2-x16.c",
4649 "src/qu8-f32-vcvt/gen/vcvt-sse2-x24.c",
4650 "src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07004651 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
4652 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07004653 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
4654 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
4655 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
4656 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
4657 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
4658 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
4659 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
4660 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07004661 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
4662 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
4663 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
4664 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
4665 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
4666 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07004667 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
4668 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
4669 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
4670 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
4671 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
4672 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
4673 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
4674 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07004675 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
4676 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
4677 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
4678 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
4679 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
4680 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07004681 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07004682 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07004683 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan76e78c82021-07-20 21:11:23 -07004684 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
4685 "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
4686 "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
4687 "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
Marat Dukhana212eac2021-08-02 09:58:04 -07004688 "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c",
4689 "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c",
4690 "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c",
4691 "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c",
Marat Dukhan7519eb12021-11-23 19:08:29 -08004692 "src/s8-ibilinear/gen/sse2-c8.c",
4693 "src/s8-ibilinear/gen/sse2-c16.c",
Marat Dukhan23147532021-08-16 07:26:56 -07004694 "src/s8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhane79acb72021-08-16 19:03:53 -07004695 "src/s8-vclamp/sse2-x64.c",
Marat Dukhan7519eb12021-11-23 19:08:29 -08004696 "src/u8-ibilinear/gen/sse2-c8.c",
4697 "src/u8-ibilinear/gen/sse2-c16.c",
Marat Dukhan99936602020-04-11 16:47:01 -07004698 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004699 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07004700 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004701 "src/x8-zip/x2-sse2.c",
4702 "src/x8-zip/x3-sse2.c",
4703 "src/x8-zip/x4-sse2.c",
4704 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07004705 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004706 "src/x32-zip/x2-sse2.c",
4707 "src/x32-zip/x3-sse2.c",
4708 "src/x32-zip/x4-sse2.c",
4709 "src/x32-zip/xm-sse2.c",
Marat Dukhan933051b2021-08-07 16:26:15 -07004710 "src/xx-fill/sse2-x64.c",
Marat Dukhan0461f2d2021-08-08 12:36:29 -07004711 "src/xx-pad/sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004712]
4713
Marat Dukhan2c724952021-07-27 18:46:30 -07004714PROD_SSSE3_MICROKERNEL_SRCS = [
4715 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
4716 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
4717 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
4718]
4719
4720ALL_SSSE3_MICROKERNEL_SRCS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07004721 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
4722 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c",
4723 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07004724 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07004725 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07004726 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
4727 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c",
4728 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c",
4729 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
4730 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07004731 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
4732 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
4733 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004734 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
4735 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c",
4736 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004737 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004738 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004739 "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004740 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004741 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004742 "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004743 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004744 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004745 "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004746 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004747 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004748 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004749 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004750 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004751 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07004752 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07004753 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07004754 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07004755 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan7c478e32021-09-10 09:48:13 -07004756 "src/x8-lut/gen/lut-ssse3-x16.c",
4757 "src/x8-lut/gen/lut-ssse3-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004758]
4759
Marat Dukhan2c724952021-07-27 18:46:30 -07004760PROD_SSE41_MICROKERNEL_SRCS = [
Marat Dukhanaf2ba002021-10-24 14:21:41 -07004761 "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c",
Marat Dukhana0c61682021-11-10 19:23:41 -08004762 "src/f32-f16-vcvt/gen/vcvt-sse41-x8.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004763 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned2d7762021-12-03 23:51:19 -08004764 "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004765 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
4766 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
4767 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
4768 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
4769 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
4770 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
4771 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
4772 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
4773 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
4774 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
4775 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
4776 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
4777 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c",
4778 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c",
Marat Dukhanf92206b2021-12-10 17:02:07 -08004779 "src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004780 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
4781 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
4782 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
4783 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
4784 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
4785 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
4786 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
4787 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -07004788 "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c",
4789 "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004790 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
4791 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhanf92206b2021-12-10 17:02:07 -08004792 "src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004793 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
4794 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
4795 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
4796 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
4797 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
4798 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -07004799 "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c",
4800 "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c",
Marat Dukhan24abe6b2021-11-24 15:28:57 -08004801 "src/s8-ibilinear/gen/sse41-c16.c",
Marat Dukhan23147532021-08-16 07:26:56 -07004802 "src/s8-maxpool/9p8x-minmax-sse41-c16.c",
Marat Dukhane79acb72021-08-16 19:03:53 -07004803 "src/s8-vclamp/sse41-x64.c",
Marat Dukhan24abe6b2021-11-24 15:28:57 -08004804 "src/u8-ibilinear/gen/sse41-c16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07004805]
4806
4807ALL_SSE41_MICROKERNEL_SRCS = [
Marat Dukhan1227adb2021-10-16 17:33:51 -07004808 "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x8.c",
4809 "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c",
4810 "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x24.c",
4811 "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x32.c",
4812 "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x8.c",
4813 "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x16.c",
4814 "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x24.c",
4815 "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x32.c",
Marat Dukhaneb844232021-11-08 23:07:53 -08004816 "src/f32-f16-vcvt/gen/vcvt-sse41-x8.c",
4817 "src/f32-f16-vcvt/gen/vcvt-sse41-x16.c",
4818 "src/f32-f16-vcvt/gen/vcvt-sse41-x24.c",
4819 "src/f32-f16-vcvt/gen/vcvt-sse41-x32.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08004820 "src/f32-prelu/gen/sse41-2x4.c",
4821 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhanc5aa2422021-12-01 00:15:19 -08004822 "src/f32-qs8-vcvt/gen/vcvt-sse41-x8.c",
4823 "src/f32-qs8-vcvt/gen/vcvt-sse41-x16.c",
4824 "src/f32-qs8-vcvt/gen/vcvt-sse41-x24.c",
4825 "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08004826 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
4827 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
4828 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
4829 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
4830 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
4831 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
4832 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
4833 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
4834 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
4835 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
4836 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
4837 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07004838 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
4839 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07004840 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
4841 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004842 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
4843 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
4844 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
4845 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
4846 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
4847 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07004848 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
4849 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
4850 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
4851 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
4852 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
4853 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
4854 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
4855 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
4856 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
4857 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
4858 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
4859 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Marat Dukhan3ed866b2021-09-29 08:23:33 -07004860 "src/math/cvt-f16-f32-sse41-int16.c",
4861 "src/math/cvt-f16-f32-sse41-int32.c",
Marat Dukhan056f49d2021-11-08 17:44:42 -08004862 "src/math/cvt-f32-f16-sse41.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004863 "src/math/roundd-sse41.c",
4864 "src/math/roundne-sse41.c",
4865 "src/math/roundu-sse41.c",
4866 "src/math/roundz-sse41.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004867 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004868 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07004869 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004870 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004871 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07004872 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004873 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004874 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07004875 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004876 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004877 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07004878 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
4879 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
4880 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
4881 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
4882 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004883 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004884 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004885 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004886 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004887 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004888 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004889 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004890 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004891 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004892 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004893 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004894 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004895 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004896 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004897 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004898 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004899 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004900 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004901 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004902 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004903 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004904 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004905 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004906 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004907 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004908 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07004909 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004910 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004911 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004912 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07004913 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004914 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004915 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004916 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004917 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004918 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004919 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07004920 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07004921 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004922 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004923 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
4924 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004925 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
4926 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf9cf55d2021-12-09 18:54:00 -08004927 "src/qs8-f32-vcvt/gen/vcvt-sse41-x8.c",
4928 "src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c",
4929 "src/qs8-f32-vcvt/gen/vcvt-sse41-x24.c",
4930 "src/qs8-f32-vcvt/gen/vcvt-sse41-x32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07004931 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
4932 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
4933 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004934 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
4935 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
4936 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004937 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004938 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004939 "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004940 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004941 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004942 "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004943 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004944 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004945 "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004946 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004947 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004948 "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004949 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004950 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004951 "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004952 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004953 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004954 "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004955 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004956 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07004957 "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004958 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004959 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004960 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004961 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004962 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004963 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004964 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004965 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004966 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004967 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004968 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004969 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07004970 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07004971 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07004972 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07004973 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07004974 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07004975 "src/qs8-requantization/rndnu-sse4-sra.c",
4976 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07004977 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
4978 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
4979 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
4980 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07004981 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
4982 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
4983 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
4984 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07004985 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
4986 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
4987 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
4988 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07004989 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
4990 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
4991 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
4992 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhana212eac2021-08-02 09:58:04 -07004993 "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c",
4994 "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c",
4995 "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c",
4996 "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07004997 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07004998 "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07004999 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07005000 "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07005001 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07005002 "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07005003 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07005004 "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanf9cf55d2021-12-09 18:54:00 -08005005 "src/qu8-f32-vcvt/gen/vcvt-sse41-x8.c",
5006 "src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c",
5007 "src/qu8-f32-vcvt/gen/vcvt-sse41-x24.c",
5008 "src/qu8-f32-vcvt/gen/vcvt-sse41-x32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07005009 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
5010 "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
5011 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
5012 "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
5013 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
5014 "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
5015 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
5016 "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07005017 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
5018 "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
5019 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
5020 "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
5021 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
5022 "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07005023 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
5024 "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
5025 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
5026 "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
5027 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
5028 "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
5029 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
5030 "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07005031 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
5032 "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
5033 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
5034 "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
5035 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
5036 "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07005037 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07005038 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07005039 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
5040 "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
5041 "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
5042 "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
5043 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
5044 "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
5045 "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
5046 "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
Marat Dukhana212eac2021-08-02 09:58:04 -07005047 "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c",
5048 "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c",
5049 "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c",
5050 "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c",
Marat Dukhan7519eb12021-11-23 19:08:29 -08005051 "src/s8-ibilinear/gen/sse41-c8.c",
5052 "src/s8-ibilinear/gen/sse41-c16.c",
Marat Dukhan23147532021-08-16 07:26:56 -07005053 "src/s8-maxpool/9p8x-minmax-sse41-c16.c",
Marat Dukhane79acb72021-08-16 19:03:53 -07005054 "src/s8-vclamp/sse41-x64.c",
Marat Dukhan7519eb12021-11-23 19:08:29 -08005055 "src/u8-ibilinear/gen/sse41-c8.c",
5056 "src/u8-ibilinear/gen/sse41-c16.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005057]
5058
Marat Dukhan2c724952021-07-27 18:46:30 -07005059PROD_AVX_MICROKERNEL_SRCS = [
Marat Dukhanaf2ba002021-10-24 14:21:41 -07005060 "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005061 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07005062 "src/f32-dwconv/gen/up16x3-minmax-avx.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005063 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
5064 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
Marat Dukhana0c61682021-11-10 19:23:41 -08005065 "src/f32-f16-vcvt/gen/vcvt-avx-x24.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005066 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
5067 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
5068 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
5069 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
5070 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhanb91432c2021-12-14 16:52:09 -08005071 "src/f32-qs8-vcvt/gen/vcvt-avx-x32.c",
5072 "src/f32-qu8-vcvt/gen/vcvt-avx-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005073 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
5074 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
5075 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
5076 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
5077 "src/f32-vbinary/gen/vmax-avx-x16.c",
5078 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
5079 "src/f32-vbinary/gen/vmin-avx-x16.c",
5080 "src/f32-vbinary/gen/vminc-avx-x16.c",
5081 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
5082 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
5083 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
5084 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
5085 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
5086 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
5087 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
5088 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
5089 "src/f32-vclamp/gen/vclamp-avx-x16.c",
5090 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
5091 "src/f32-vhswish/gen/vhswish-avx-x16.c",
5092 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
5093 "src/f32-vrnd/gen/vrndd-avx-x16.c",
5094 "src/f32-vrnd/gen/vrndne-avx-x16.c",
5095 "src/f32-vrnd/gen/vrndu-avx-x16.c",
5096 "src/f32-vrnd/gen/vrndz-avx-x16.c",
5097 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
5098 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
5099 "src/f32-vunary/gen/vabs-avx-x16.c",
5100 "src/f32-vunary/gen/vneg-avx-x16.c",
5101 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan28480592021-07-27 23:52:27 -07005102 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
5103 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005104 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
5105 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
5106 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
5107 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
5108 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
5109 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Marat Dukhancd4089f2021-12-14 23:53:33 -08005110 "src/qs8-f32-vcvt/gen/vcvt-avx-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005111 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
5112 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
5113 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
5114 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
5115 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
5116 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -07005117 "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c",
5118 "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005119 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
5120 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhancd4089f2021-12-14 23:53:33 -08005121 "src/qu8-f32-vcvt/gen/vcvt-avx-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005122 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
5123 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
5124 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
5125 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
5126 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
5127 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
Marat Dukhan0853b8a2021-08-03 01:01:53 -07005128 "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c",
5129 "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c",
Marat Dukhan98e054b2021-09-13 09:43:50 -07005130 "src/x8-lut/gen/lut-avx-x64.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005131]
5132
5133ALL_AVX_MICROKERNEL_SRCS = [
Marat Dukhan1227adb2021-10-16 17:33:51 -07005134 "src/f16-f32-vcvt/gen/vcvt-avx-int16-x8.c",
5135 "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c",
5136 "src/f16-f32-vcvt/gen/vcvt-avx-int16-x24.c",
5137 "src/f16-f32-vcvt/gen/vcvt-avx-int16-x32.c",
5138 "src/f16-f32-vcvt/gen/vcvt-avx-int32-x8.c",
5139 "src/f16-f32-vcvt/gen/vcvt-avx-int32-x16.c",
5140 "src/f16-f32-vcvt/gen/vcvt-avx-int32-x24.c",
5141 "src/f16-f32-vcvt/gen/vcvt-avx-int32-x32.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07005142 "src/f32-dwconv/gen/up8x3-minmax-avx-acc2.c",
5143 "src/f32-dwconv/gen/up8x3-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005144 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
5145 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005146 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
5147 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005148 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
5149 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07005150 "src/f32-dwconv/gen/up16x3-minmax-avx-acc2.c",
5151 "src/f32-dwconv/gen/up16x3-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005152 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
5153 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
5154 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
5155 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
5156 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
5157 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhaneb844232021-11-08 23:07:53 -08005158 "src/f32-f16-vcvt/gen/vcvt-avx-x8.c",
5159 "src/f32-f16-vcvt/gen/vcvt-avx-x16.c",
5160 "src/f32-f16-vcvt/gen/vcvt-avx-x24.c",
5161 "src/f32-f16-vcvt/gen/vcvt-avx-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005162 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005163 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
5164 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005165 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005166 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005167 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005168 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005169 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
5170 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
5171 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
5172 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
5173 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
5174 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
5175 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
5176 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
5177 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
5178 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
5179 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005180 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005181 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
5182 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005183 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005184 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005185 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005186 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005187 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
5188 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07005189 "src/f32-prelu/gen/avx-2x8.c",
5190 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhanb91432c2021-12-14 16:52:09 -08005191 "src/f32-qs8-vcvt/gen/vcvt-avx-x8.c",
5192 "src/f32-qs8-vcvt/gen/vcvt-avx-x16.c",
5193 "src/f32-qs8-vcvt/gen/vcvt-avx-x24.c",
5194 "src/f32-qs8-vcvt/gen/vcvt-avx-x32.c",
5195 "src/f32-qu8-vcvt/gen/vcvt-avx-x8.c",
5196 "src/f32-qu8-vcvt/gen/vcvt-avx-x16.c",
5197 "src/f32-qu8-vcvt/gen/vcvt-avx-x24.c",
5198 "src/f32-qu8-vcvt/gen/vcvt-avx-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005199 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07005200 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
5201 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
5202 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
5203 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
5204 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
5205 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
5206 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
5207 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08005208 "src/f32-vbinary/gen/vmax-avx-x8.c",
5209 "src/f32-vbinary/gen/vmax-avx-x16.c",
5210 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
5211 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
5212 "src/f32-vbinary/gen/vmin-avx-x8.c",
5213 "src/f32-vbinary/gen/vmin-avx-x16.c",
5214 "src/f32-vbinary/gen/vminc-avx-x8.c",
5215 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07005216 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
5217 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
5218 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
5219 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
5220 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
5221 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
5222 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
5223 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07005224 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
5225 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
5226 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
5227 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07005228 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
5229 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
5230 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
5231 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07005232 "src/f32-vclamp/gen/vclamp-avx-x8.c",
5233 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005234 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
5235 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
5236 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
5237 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
5238 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
5239 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
5240 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
5241 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
5242 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
5243 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
5244 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
5245 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
5246 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
5247 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
5248 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
5249 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
5250 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
5251 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07005252 "src/f32-vhswish/gen/vhswish-avx-x8.c",
5253 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07005254 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
5255 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07005256 "src/f32-vrelu/gen/vrelu-avx-x8.c",
5257 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07005258 "src/f32-vrnd/gen/vrndd-avx-x8.c",
5259 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005260 "src/f32-vrnd/gen/vrndne-avx-x8.c",
5261 "src/f32-vrnd/gen/vrndne-avx-x16.c",
5262 "src/f32-vrnd/gen/vrndu-avx-x8.c",
5263 "src/f32-vrnd/gen/vrndu-avx-x16.c",
5264 "src/f32-vrnd/gen/vrndz-avx-x8.c",
5265 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07005266 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07005267 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
5268 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
5269 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
5270 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
5271 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
5272 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
5273 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
5274 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
5275 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
5276 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
5277 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
5278 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
5279 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
5280 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
5281 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
5282 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
5283 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
5284 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
5285 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
5286 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005287 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
5288 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07005289 "src/f32-vunary/gen/vabs-avx-x8.c",
5290 "src/f32-vunary/gen/vabs-avx-x16.c",
5291 "src/f32-vunary/gen/vneg-avx-x8.c",
5292 "src/f32-vunary/gen/vneg-avx-x16.c",
5293 "src/f32-vunary/gen/vsqr-avx-x8.c",
5294 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07005295 "src/math/exp-avx-rr2-p5.c",
5296 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
5297 "src/math/expm1minus-avx-rr2-lut16-p3.c",
5298 "src/math/expm1minus-avx-rr2-p6.c",
5299 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
5300 "src/math/sigmoid-avx-rr2-p5-div.c",
5301 "src/math/sigmoid-avx-rr2-p5-nr1.c",
5302 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005303 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005304 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07005305 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005306 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005307 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07005308 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005309 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005310 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07005311 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005312 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005313 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07005314 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
5315 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
5316 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
5317 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
5318 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005319 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005320 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005321 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005322 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005323 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005324 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005325 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005326 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005327 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005328 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005329 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005330 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005331 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005332 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005333 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005334 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005335 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005336 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005337 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005338 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005339 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005340 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005341 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005342 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005343 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005344 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005345 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005346 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005347 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005348 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07005349 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005350 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005351 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005352 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005353 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005354 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005355 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005356 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005357 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005358 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005359 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
5360 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005361 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
5362 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhancd4089f2021-12-14 23:53:33 -08005363 "src/qs8-f32-vcvt/gen/vcvt-avx-x8.c",
5364 "src/qs8-f32-vcvt/gen/vcvt-avx-x16.c",
5365 "src/qs8-f32-vcvt/gen/vcvt-avx-x24.c",
5366 "src/qs8-f32-vcvt/gen/vcvt-avx-x32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005367 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005368 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005369 "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005370 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005371 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005372 "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005373 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005374 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005375 "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005376 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005377 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005378 "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005379 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005380 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005381 "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005382 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005383 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005384 "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005385 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005386 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005387 "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005388 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005389 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005390 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005391 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005392 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005393 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005394 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005395 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005396 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005397 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005398 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005399 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005400 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005401 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07005402 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
5403 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
5404 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
5405 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
5406 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
5407 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
5408 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
5409 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
5410 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
5411 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
5412 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
5413 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
5414 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
5415 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
5416 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
5417 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhana212eac2021-08-02 09:58:04 -07005418 "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c",
5419 "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c",
5420 "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c",
5421 "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07005422 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07005423 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07005424 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07005425 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07005426 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07005427 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
Marat Dukhanf0f28812021-07-08 22:34:20 -07005428 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07005429 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhancd4089f2021-12-14 23:53:33 -08005430 "src/qu8-f32-vcvt/gen/vcvt-avx-x8.c",
5431 "src/qu8-f32-vcvt/gen/vcvt-avx-x16.c",
5432 "src/qu8-f32-vcvt/gen/vcvt-avx-x24.c",
5433 "src/qu8-f32-vcvt/gen/vcvt-avx-x32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07005434 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
5435 "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
5436 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
5437 "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
5438 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
5439 "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
5440 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
5441 "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
5442 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
5443 "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
5444 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
5445 "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
5446 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
5447 "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
5448 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
5449 "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
5450 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
5451 "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
5452 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
5453 "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
5454 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
5455 "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
5456 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
5457 "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
5458 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
5459 "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
5460 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
5461 "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07005462 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
5463 "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
5464 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
5465 "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
5466 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
5467 "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
5468 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
5469 "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
Marat Dukhana212eac2021-08-02 09:58:04 -07005470 "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c",
5471 "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c",
5472 "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c",
5473 "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c",
Marat Dukhan7c478e32021-09-10 09:48:13 -07005474 "src/x8-lut/gen/lut-avx-x16.c",
5475 "src/x8-lut/gen/lut-avx-x32.c",
5476 "src/x8-lut/gen/lut-avx-x48.c",
5477 "src/x8-lut/gen/lut-avx-x64.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005478]
5479
Marat Dukhanf1a6ed32021-09-26 13:40:19 -07005480PROD_F16C_MICROKERNEL_SRCS = [
Marat Dukhanaf2ba002021-10-24 14:21:41 -07005481 "src/f16-f32-vcvt/gen/vcvt-f16c-x16.c",
Marat Dukhana0c61682021-11-10 19:23:41 -08005482 "src/f32-f16-vcvt/gen/vcvt-f16c-x16.c",
Marat Dukhanf1a6ed32021-09-26 13:40:19 -07005483]
5484
5485ALL_F16C_MICROKERNEL_SRCS = [
5486 "src/f16-f32-vcvt/gen/vcvt-f16c-x8.c",
5487 "src/f16-f32-vcvt/gen/vcvt-f16c-x16.c",
Marat Dukhand77f77d2021-10-24 15:39:59 -07005488 "src/f32-f16-vcvt/gen/vcvt-f16c-x8.c",
5489 "src/f32-f16-vcvt/gen/vcvt-f16c-x16.c",
Marat Dukhan3ed866b2021-09-29 08:23:33 -07005490 "src/math/cvt-f16-f32-f16c.c",
Marat Dukhan582e1842021-10-25 17:18:36 -07005491 "src/math/cvt-f32-f16-f16c.c",
Marat Dukhanf1a6ed32021-09-26 13:40:19 -07005492]
5493
Marat Dukhan2c724952021-07-27 18:46:30 -07005494PROD_XOP_MICROKERNEL_SRCS = [
Marat Dukhan28480592021-07-27 23:52:27 -07005495 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
5496 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005497 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
5498 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
5499 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
5500 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
5501 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
5502 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
5503 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
5504 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
5505 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
5506 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
5507 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
5508 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
5509 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
5510 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
5511 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
5512 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
5513 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
5514 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
5515 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
5516 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
5517]
5518
5519ALL_XOP_MICROKERNEL_SRCS = [
Marat Dukhan09668562021-07-26 16:52:20 -07005520 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07005521 "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005522 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07005523 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005524 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07005525 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005526 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07005527 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
5528 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
5529 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005530 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005531 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005532 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005533 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005534 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005535 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005536 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005537 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005538 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005539 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005540 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005541 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005542 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005543 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005544 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005545 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005546 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005547 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005548 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005549 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005550 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005551 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005552 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005553 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005554 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005555 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07005556 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005557 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005558 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07005559 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005560 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005561 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005562 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005563 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
Marat Dukhan09668562021-07-26 16:52:20 -07005564 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005565 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005566 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005567 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005568 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005569 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005570 "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005571 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005572 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005573 "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005574 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005575 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005576 "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005577 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005578 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005579 "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005580 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005581 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005582 "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005583 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005584 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005585 "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005586 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005587 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan0ff79892021-08-06 16:05:06 -07005588 "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005589 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005590 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005591 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005592 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005593 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005594 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005595 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005596 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005597 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005598 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005599 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005600 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07005601 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07005602 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07005603 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
5604 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
5605 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
5606 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
5607 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
5608 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
5609 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
5610 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan3c35f7a2021-07-08 18:55:42 -07005611 "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
5612 "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
5613 "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
5614 "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhanef47f8d2021-07-02 15:08:32 -07005615 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
5616 "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
5617 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
5618 "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
5619 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
5620 "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
5621 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
5622 "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
5623 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
5624 "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
5625 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
5626 "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
5627 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
5628 "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
5629 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
5630 "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
5631 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
5632 "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
5633 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
5634 "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
5635 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
5636 "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
5637 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
5638 "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
5639 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
5640 "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
5641 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
5642 "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07005643 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
5644 "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
5645 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
5646 "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005647]
5648
Marat Dukhan2c724952021-07-27 18:46:30 -07005649PROD_FMA3_MICROKERNEL_SRCS = [
Marat Dukhan2c724952021-07-27 18:46:30 -07005650 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07005651 "src/f32-dwconv/gen/up16x3-minmax-fma3.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005652 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005653 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005654 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
5655 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
5656 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
5657 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
5658 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
5659 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
5660 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
5661 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
5662 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
5663]
5664
5665ALL_FMA3_MICROKERNEL_SRCS = [
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07005666 "src/f32-dwconv/gen/up8x3-minmax-fma3-acc2.c",
5667 "src/f32-dwconv/gen/up8x3-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005668 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
5669 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005670 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
5671 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005672 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
5673 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07005674 "src/f32-dwconv/gen/up16x3-minmax-fma3-acc2.c",
5675 "src/f32-dwconv/gen/up16x3-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005676 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
5677 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
5678 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
5679 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
5680 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
5681 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005682 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005683 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
5684 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
5685 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
5686 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005687 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005688 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
5689 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005690 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005691 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
5692 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005693 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
5694 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
5695 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005696 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
5697 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
5698 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
5699 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
5700 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
5701 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
5702 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
5703 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
5704 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
5705 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
5706 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
5707 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
5708 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
5709 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005710 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005711 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
5712 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
5713 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
5714 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005715 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005716 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
5717 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005718 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005719 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
5720 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07005721 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
5722 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
5723 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07005724 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
5725 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005726 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
5727 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
5728 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
5729 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
5730 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
5731 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
5732 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
5733 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07005734 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07005735 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005736 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005737]
5738
Marat Dukhan2c724952021-07-27 18:46:30 -07005739PROD_AVX2_MICROKERNEL_SRCS = [
Marat Dukhan0d399ca2021-12-14 19:25:50 -08005740 "src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c",
5741 "src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005742 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
5743 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
5744 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
5745 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
5746 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
5747 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
5748 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
5749 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
5750 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
5751 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan7b5f7792021-12-15 00:29:39 -08005752 "src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005753 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
5754 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
5755 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
5756 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
5757 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
5758 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
5759 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
5760 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan7b5f7792021-12-15 00:29:39 -08005761 "src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005762 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
5763 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
5764 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
5765 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
5766 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
5767 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
Marat Dukhan98e054b2021-09-13 09:43:50 -07005768 "src/x8-lut/gen/lut-avx2-x128.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07005769]
5770
5771ALL_AVX2_MICROKERNEL_SRCS = [
Marat Dukhan0d399ca2021-12-14 19:25:50 -08005772 "src/f32-qs8-vcvt/gen/vcvt-avx2-x16.c",
5773 "src/f32-qs8-vcvt/gen/vcvt-avx2-x32.c",
5774 "src/f32-qs8-vcvt/gen/vcvt-avx2-x48.c",
5775 "src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c",
5776 "src/f32-qu8-vcvt/gen/vcvt-avx2-x16.c",
5777 "src/f32-qu8-vcvt/gen/vcvt-avx2-x32.c",
5778 "src/f32-qu8-vcvt/gen/vcvt-avx2-x48.c",
5779 "src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005780 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
5781 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005782 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005783 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005784 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005785 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
5786 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005787 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005788 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
5789 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
5790 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005791 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005792 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
5793 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005794 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005795 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005796 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005797 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
5798 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005799 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005800 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
5801 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
5802 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005803 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005804 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
5805 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005806 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005807 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005808 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005809 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
5810 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005811 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005812 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
5813 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
5814 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005815 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005816 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
5817 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
5818 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
5819 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
5820 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
5821 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
5822 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
5823 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
5824 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
5825 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
5826 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
5827 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
5828 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
5829 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
5830 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
5831 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
5832 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
5833 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
5834 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
5835 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
5836 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
5837 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
5838 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
5839 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
5840 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
5841 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
5842 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
5843 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
5844 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
5845 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
5846 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
5847 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
5848 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
5849 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
5850 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
5851 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
5852 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
5853 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
5854 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
5855 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005856 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
5857 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
5858 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
5859 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
5860 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
5861 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
5862 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
5863 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
5864 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
5865 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
5866 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
5867 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
5868 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
5869 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
5870 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
5871 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
5872 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
5873 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
5874 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
5875 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
5876 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
5877 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
5878 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
5879 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07005880 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
5881 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
5882 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
5883 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
5884 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
5885 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
5886 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
5887 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
5888 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
5889 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
5890 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
5891 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
5892 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
5893 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
5894 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
5895 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
5896 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
5897 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
5898 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
5899 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
5900 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
5901 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
5902 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
5903 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
5904 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
5905 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
5906 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
5907 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
5908 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
5909 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08005910 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
5911 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
5912 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08005913 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
5914 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
5915 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
5916 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08005917 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07005918 "src/math/extexp-avx2-p5.c",
5919 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
5920 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
5921 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
5922 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
5923 "src/math/sigmoid-avx2-rr1-p5-div.c",
5924 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
5925 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
5926 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
5927 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
5928 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
5929 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
5930 "src/math/sigmoid-avx2-rr2-p5-div.c",
5931 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
5932 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07005933 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
5934 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005935 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c",
Marat Dukhan881ab022021-07-28 13:49:26 -07005936 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c",
5937 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c",
Marat Dukhan82286892021-06-04 17:27:27 -07005938 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005939 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c",
Marat Dukhan881ab022021-07-28 13:49:26 -07005940 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c",
5941 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c",
Marat Dukhan82286892021-06-04 17:27:27 -07005942 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
5943 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
5944 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005945 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c",
Marat Dukhan881ab022021-07-28 13:49:26 -07005946 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c",
5947 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c",
Marat Dukhan82286892021-06-04 17:27:27 -07005948 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005949 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c",
Marat Dukhan881ab022021-07-28 13:49:26 -07005950 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c",
5951 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c",
Marat Dukhan82286892021-06-04 17:27:27 -07005952 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07005953 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
5954 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
5955 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
5956 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
5957 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
5958 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07005959 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
5960 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
5961 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005962 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005963 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005964 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c",
Marat Dukhan881ab022021-07-28 13:49:26 -07005965 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c",
5966 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005967 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005968 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c",
Marat Dukhan881ab022021-07-28 13:49:26 -07005969 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c",
5970 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005971 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005972 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005973 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005974 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c",
Marat Dukhan881ab022021-07-28 13:49:26 -07005975 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c",
5976 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005977 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchard59ed1da2021-08-02 11:34:59 -07005978 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c",
Marat Dukhan881ab022021-07-28 13:49:26 -07005979 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c",
5980 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005981 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan7b5f7792021-12-15 00:29:39 -08005982 "src/qs8-f32-vcvt/gen/vcvt-avx2-x8.c",
5983 "src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c",
5984 "src/qs8-f32-vcvt/gen/vcvt-avx2-x24.c",
5985 "src/qs8-f32-vcvt/gen/vcvt-avx2-x32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005986 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07005987 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005988 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07005989 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005990 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07005991 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005992 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005993 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07005994 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07005995 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
5996 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
5997 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
5998 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
5999 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
6000 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
6001 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
6002 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan09c312b2021-07-09 00:45:04 -07006003 "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
6004 "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
6005 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
6006 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
6007 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
6008 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan7b5f7792021-12-15 00:29:39 -08006009 "src/qu8-f32-vcvt/gen/vcvt-avx2-x8.c",
6010 "src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c",
6011 "src/qu8-f32-vcvt/gen/vcvt-avx2-x24.c",
6012 "src/qu8-f32-vcvt/gen/vcvt-avx2-x32.c",
Marat Dukhan902ef7f2021-07-02 16:11:06 -07006013 "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
6014 "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
6015 "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
6016 "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
6017 "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
6018 "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan3eac69c2021-07-21 01:42:29 -07006019 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
6020 "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
6021 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
6022 "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
Marat Dukhan7c478e32021-09-10 09:48:13 -07006023 "src/x8-lut/gen/lut-avx2-x32.c",
6024 "src/x8-lut/gen/lut-avx2-x64.c",
6025 "src/x8-lut/gen/lut-avx2-x96.c",
6026 "src/x8-lut/gen/lut-avx2-x128.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006027]
6028
Marat Dukhan2c724952021-07-27 18:46:30 -07006029PROD_AVX512F_MICROKERNEL_SRCS = [
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07006030 "src/f32-dwconv/gen/up16x3-minmax-avx512f.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07006031 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
6032 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
6033 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
6034 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
6035 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
6036 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
6037 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
6038 "src/f32-prelu/gen/avx512f-2x16.c",
6039 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
6040 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
6041 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
6042 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
6043 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
6044 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
6045 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
6046 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
6047 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
6048 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
6049 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
6050 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
6051 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
6052 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
6053 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
6054 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
6055 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
6056 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
6057 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
6058 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
6059 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
6060 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
6061 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
6062 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
6063 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
6064 "src/f32-vunary/gen/vabs-avx512f-x16.c",
6065 "src/f32-vunary/gen/vneg-avx512f-x16.c",
6066 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
6067]
6068
6069ALL_AVX512F_MICROKERNEL_SRCS = [
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07006070 "src/f32-dwconv/gen/up16x3-minmax-avx512f-acc2.c",
6071 "src/f32-dwconv/gen/up16x3-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07006072 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
6073 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07006074 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
6075 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07006076 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
6077 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -07006078 "src/f32-dwconv/gen/up32x3-minmax-avx512f-acc2.c",
6079 "src/f32-dwconv/gen/up32x3-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006080 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
6081 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
6082 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
6083 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
6084 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
6085 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07006086 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
6087 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
6088 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
6089 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
6090 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
6091 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006092 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
6093 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
6094 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
6095 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
6096 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
6097 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07006098 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
6099 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
6100 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
6101 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
6102 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
6103 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07006104 "src/f32-prelu/gen/avx512f-2x16.c",
6105 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006106 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
6107 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006108 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006109 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006110 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006111 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
6112 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006113 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006114 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
6115 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
6116 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006117 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006118 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
6119 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006120 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006121 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006122 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006123 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
6124 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006125 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006126 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
6127 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
6128 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006129 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006130 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
6131 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006132 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006133 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006134 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006135 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
6136 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006137 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006138 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
6139 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
6140 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006141 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006142 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006143 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
6144 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
6145 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
6146 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
6147 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
6148 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
6149 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
6150 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08006151 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
6152 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
6153 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
6154 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
6155 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
6156 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
6157 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
6158 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006159 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
6160 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
6161 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
6162 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
6163 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
6164 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
6165 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
6166 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07006167 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
6168 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
6169 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
6170 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006171 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
6172 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
6173 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
6174 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07006175 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
6176 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006177 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
6178 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
6179 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
6180 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
6181 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
6182 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
6183 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
6184 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
6185 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
6186 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
6187 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
6188 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
6189 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
6190 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
6191 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
6192 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07006193 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
6194 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07006195 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
6196 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07006197 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
6198 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006199 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
6200 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
6201 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
6202 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
6203 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
6204 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
6205 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
6206 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07006207 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08006208 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
6209 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
6210 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
6211 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
6212 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
6213 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
6214 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
6215 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
6216 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
6217 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
6218 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
6219 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
6220 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
6221 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
6222 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
6223 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
6224 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
6225 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
6226 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
6227 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
6228 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
6229 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
6230 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
6231 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07006232 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
6233 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
6234 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
6235 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
6236 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
6237 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
6238 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
6239 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
6240 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
6241 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
6242 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
6243 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
6244 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
6245 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
6246 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
6247 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
6248 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
6249 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
6250 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
6251 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
6252 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
6253 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
6254 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
6255 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
6256 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
6257 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
6258 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
6259 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
6260 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
6261 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
6262 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
6263 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
6264 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
6265 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
6266 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
6267 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
6268 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
6269 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
6270 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
6271 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
6272 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
6273 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
6274 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
6275 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
6276 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
6277 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
6278 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
6279 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006280 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
6281 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
6282 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
6283 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
6284 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
6285 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
6286 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
6287 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07006288 "src/f32-vunary/gen/vabs-avx512f-x16.c",
6289 "src/f32-vunary/gen/vabs-avx512f-x32.c",
6290 "src/f32-vunary/gen/vneg-avx512f-x16.c",
6291 "src/f32-vunary/gen/vneg-avx512f-x32.c",
6292 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
6293 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08006294 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
6295 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
6296 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
6297 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
6298 "src/math/exp-avx512f-rr2-p5-scalef.c",
6299 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08006300 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
6301 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006302 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07006303 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07006304 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006305 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07006306 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07006307 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006308 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07006309 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07006310 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006311 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
6312 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
6313 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
6314 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
6315 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
6316 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
6317 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
6318 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
6319 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
6320 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07006321 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07006322 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006323 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
6324 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
6325 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
6326 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07006327 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07006328 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07006329 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006330]
6331
Marat Dukhan2c724952021-07-27 18:46:30 -07006332PROD_AVX512SKX_MICROKERNEL_SRCS = [
Marat Dukhanaf2ba002021-10-24 14:21:41 -07006333 "src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c",
Marat Dukhana0c61682021-11-10 19:23:41 -08006334 "src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c",
Marat Dukhan2edf8632021-12-14 23:17:14 -08006335 "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c",
6336 "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07006337 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
6338 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
6339 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
6340 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
6341 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
6342 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
6343 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
6344 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan98393ad2021-12-15 11:07:40 -08006345 "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07006346 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
6347 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
6348 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
6349 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
6350 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
6351 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
6352 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
6353 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan98393ad2021-12-15 11:07:40 -08006354 "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07006355 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
6356 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
6357 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
6358 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
6359 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
6360 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
Marat Dukhan98e054b2021-09-13 09:43:50 -07006361 "src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c",
Marat Dukhan2c724952021-07-27 18:46:30 -07006362]
6363
6364ALL_AVX512SKX_MICROKERNEL_SRCS = [
Marat Dukhan79c76ab2021-09-26 20:26:39 -07006365 "src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c",
6366 "src/f16-f32-vcvt/gen/vcvt-avx512skx-x32.c",
Marat Dukhand77f77d2021-10-24 15:39:59 -07006367 "src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c",
6368 "src/f32-f16-vcvt/gen/vcvt-avx512skx-x32.c",
Marat Dukhan2edf8632021-12-14 23:17:14 -08006369 "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x32.c",
6370 "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x64.c",
6371 "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x96.c",
6372 "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c",
6373 "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x32.c",
6374 "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x64.c",
6375 "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x96.c",
6376 "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07006377 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
6378 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
6379 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
6380 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07006381 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
6382 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
6383 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
6384 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
6385 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
6386 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
6387 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
6388 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006389 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006390 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006391 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006392 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan98393ad2021-12-15 11:07:40 -08006393 "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x16.c",
6394 "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c",
6395 "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x48.c",
6396 "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x64.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006397 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006398 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006399 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006400 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006401 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006402 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006403 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07006404 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhane76049a2021-07-22 14:48:59 -07006405 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
6406 "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c",
6407 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
6408 "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c",
Marat Dukhancfd606b2021-07-09 01:18:45 -07006409 "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
6410 "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
6411 "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
6412 "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhan98393ad2021-12-15 11:07:40 -08006413 "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x16.c",
6414 "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c",
6415 "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x48.c",
6416 "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x64.c",
Marat Dukhan3cf2e222021-07-08 11:38:45 -07006417 "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
6418 "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
6419 "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
6420 "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
6421 "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
6422 "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
6423 "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
6424 "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhane76049a2021-07-22 14:48:59 -07006425 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c",
6426 "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c",
6427 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c",
6428 "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c",
Marat Dukhan2b3c4102021-09-10 19:05:37 -07006429 "src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c",
6430 "src/x8-lut/gen/lut-avx512skx-vpshufb-x128.c",
6431 "src/x8-lut/gen/lut-avx512skx-vpshufb-x192.c",
6432 "src/x8-lut/gen/lut-avx512skx-vpshufb-x256.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07006433]
6434
Marat Dukhandb3b0a72021-07-27 08:58:01 -07006435WASM32_ASM_MICROKERNEL_SRCS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006436 "src/f32-vrelu/wasm_shr_x1.S",
6437 "src/f32-vrelu/wasm_shr_x2.S",
6438 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07006439]
6440
Marat Dukhandb3b0a72021-07-27 08:58:01 -07006441AARCH32_ASM_MICROKERNEL_SRCS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07006442 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07006443 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006444 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
6445 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07006446 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006447 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07006448 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07006449 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006450 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
6451 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07006452 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
6453 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
6454 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
6455 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Frank Barchardda7b2e22021-12-13 23:50:53 -08006456 "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S",
6457 "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S",
Frank Barchard9f3f4202021-12-16 18:13:51 -08006458 "src/qs8-gemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S",
Frank Barcharde48b5c12021-12-21 07:22:45 -08006459 "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S",
6460 "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S",
Frank Barchard48410212021-12-20 17:14:00 -08006461 "src/qs8-igemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006462]
6463
Marat Dukhandb3b0a72021-07-27 08:58:01 -07006464AARCH64_ASM_MICROKERNEL_SRCS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07006465 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006466 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07006467 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006468 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07006469 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07006470 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07006471 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07006472 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
6473 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006474 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
6475 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
6476 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
6477 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
6478 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard80fc5f42021-06-07 10:43:16 -07006479 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S",
Frank Barchard97374612021-06-07 11:51:07 -07006480 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S",
Frank Barchard23eb4822021-06-08 15:03:41 -07006481 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
6482 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006483 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
6484 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006485 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006486 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006487 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006488 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006489 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006490 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
6491 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006492 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006493 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006494 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006495 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006496 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006497 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006498 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006499 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
6500 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006501 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006502 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006503 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006504 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006505 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006506 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006507 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
6508 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006509 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006510 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
6511 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
6512 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006513 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
6514 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
6515 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006516 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006517 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006518 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006519 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006520 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
6521 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006522 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
6523 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
6524 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
6525 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006526 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006527 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006528 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006529 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
6530 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006531 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
6532 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
6533 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
6534 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
Frank Barchard04336c12020-10-22 16:48:55 -07006535 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006536 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07006537 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07006538 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07006539 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006540 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
6541 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
6542 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
6543 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07006544 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07006545 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07006546 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006547 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S",
6548 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S",
6549 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S",
6550 "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07006551 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
6552 "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006553 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S",
6554 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S",
6555 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S",
6556 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S",
6557 "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S",
6558 "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07006559 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006560 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07006561 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006562 "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07006563 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
6564 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
6565 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
6566 "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006567 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S",
6568 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S",
6569 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S",
6570 "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S",
6571 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S",
6572 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S",
6573 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S",
6574 "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S",
6575 "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07006576 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006577 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07006578 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006579 "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S",
Frank Barchardf10af6c2021-06-30 12:42:29 -07006580 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
6581 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
6582 "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006583 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S",
6584 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S",
6585 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S",
6586 "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006587 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S",
6588 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S",
6589 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S",
6590 "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07006591 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S",
6592 "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07006593 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S",
6594 "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006595 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S",
6596 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S",
6597 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S",
6598 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S",
6599 "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006600 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S",
6601 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S",
6602 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S",
6603 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S",
6604 "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull.S",
6605 "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006606 "src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S",
Frank Barchard914f57b2021-12-13 12:31:42 -08006607 "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S",
6608 "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07006609 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006610 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07006611 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006612 "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07006613 "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006614 "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07006615 "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006616 "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07006617 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
6618 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S",
6619 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
6620 "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07006621 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
6622 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S",
6623 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07006624 "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006625 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S",
6626 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S",
6627 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S",
6628 "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006629 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S",
6630 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S",
6631 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S",
6632 "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S",
6633 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S",
6634 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S",
6635 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S",
6636 "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006637 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S",
6638 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S",
6639 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S",
6640 "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S",
6641 "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S",
Frank Barcharde22685a2021-11-12 11:36:58 -08006642 "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S",
Frank Barchard914f57b2021-12-13 12:31:42 -08006643 "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S",
6644 "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07006645 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006646 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S",
Frank Barchard98af05c2021-06-30 12:15:04 -07006647 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006648 "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07006649 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006650 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07006651 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard0bc58012021-11-22 18:12:05 -08006652 "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S",
Frank Barchard1a0b2762021-06-29 18:37:59 -07006653 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
6654 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S",
6655 "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barchard13db60f2021-07-20 14:34:35 -07006656 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
6657 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
Frank Barchard60729d02021-07-20 12:25:09 -07006658 "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Frank Barchardca4c68e2021-08-25 19:06:40 -07006659 "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
Frank Barcharddf8e6042021-09-03 13:56:29 -07006660 "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S",
Frank Barchard59ed1da2021-08-02 11:34:59 -07006661 "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
Frank Barchardfb3a94f2021-08-02 20:37:06 -07006662 "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S",
Frank Barchard9cdc10d2021-11-22 19:03:54 -08006663 "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S",
Frank Barchard59ed1da2021-08-02 11:34:59 -07006664 "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardfb3a94f2021-08-02 20:37:06 -07006665 "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S",
Frank Barchard9cdc10d2021-11-22 19:03:54 -08006666 "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S",
Digant Desai10f9f622021-11-23 13:33:52 -08006667 "src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
Digant Desai2e2d1792021-11-24 11:06:37 -08006668 "src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barcharda49e41f2021-08-31 20:30:24 -07006669 "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
Frank Barchard0c764222021-08-24 16:13:06 -07006670 "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Frank Barchardca4c68e2021-08-25 19:06:40 -07006671 "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
Frank Barcharddf8e6042021-09-03 13:56:29 -07006672 "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S",
Frank Barchard59ed1da2021-08-02 11:34:59 -07006673 "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
Frank Barchardfb3a94f2021-08-02 20:37:06 -07006674 "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S",
Frank Barchard9cdc10d2021-11-22 19:03:54 -08006675 "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S",
Frank Barchard59ed1da2021-08-02 11:34:59 -07006676 "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardfb3a94f2021-08-02 20:37:06 -07006677 "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S",
Frank Barchard9cdc10d2021-11-22 19:03:54 -08006678 "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S",
Digant Desai10f9f622021-11-23 13:33:52 -08006679 "src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S",
Digant Desai2e2d1792021-11-24 11:06:37 -08006680 "src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S",
Frank Barcharda49e41f2021-08-31 20:30:24 -07006681 "src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
Frank Barchard0c764222021-08-24 16:13:06 -07006682 "src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006683]
6684
Marat Dukhan1b354632020-03-23 12:50:22 -07006685INTERNAL_MICROKERNEL_HDRS = [
Zhi An Ngb43b47a2021-12-23 16:27:22 -08006686 "src/xnnpack/allocator.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006687 "src/xnnpack/argmaxpool.h",
6688 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006689 "src/xnnpack/common.h",
6690 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08006691 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006692 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006693 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006694 "src/xnnpack/gavgpool.h",
6695 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07006696 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006697 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08006698 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006699 "src/xnnpack/lut.h",
6700 "src/xnnpack/math.h",
6701 "src/xnnpack/maxpool.h",
6702 "src/xnnpack/packx.h",
6703 "src/xnnpack/pad.h",
6704 "src/xnnpack/params.h",
6705 "src/xnnpack/pavgpool.h",
6706 "src/xnnpack/ppmm.h",
6707 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07006708 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006709 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07006710 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006711 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006712 "src/xnnpack/spmm.h",
Frank Barchard70e8c992021-12-16 18:35:18 -08006713 "src/xnnpack/transpose.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006714 "src/xnnpack/unpool.h",
Marat Dukhan64287252021-09-07 16:20:03 -07006715 "src/xnnpack/vaddsub.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006716 "src/xnnpack/vbinary.h",
Marat Dukhanf1a6ed32021-09-26 13:40:19 -07006717 "src/xnnpack/vcvt.h",
Marat Dukhana212eac2021-08-02 09:58:04 -07006718 "src/xnnpack/vmul.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006719 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07006720 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07006721 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006722 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006723 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006724 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07006725]
6726
6727INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07006728 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006729 "src/xnnpack/compute.h",
6730 "src/xnnpack/im2col.h",
6731 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006732 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07006733 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006734 "src/xnnpack/operator.h",
6735 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07006736 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006737 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006738 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08006739 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006740]
6741
Marat Dukhan1b354632020-03-23 12:50:22 -07006742ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006743 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006744]
6745
Marat Dukhan1b354632020-03-23 12:50:22 -07006746MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07006747 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07006748 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006749]
6750
Marat Dukhan1b354632020-03-23 12:50:22 -07006751MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07006752 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006753 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07006754 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006755 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006756]
6757
6758OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07006759 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006760 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006761]
6762
6763WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07006764 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07006765 "src/xnnpack/operator.h",
6766 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006767]
6768
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07006769LOGGING_COPTS = select({
6770 # No logging in optimized mode
6771 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
6772 # Full logging in debug mode
6773 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
6774 # Error-only logging in default (fastbuild) mode
6775 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
6776})
6777
Marat Dukhan3b59de22020-06-03 20:15:19 -07006778LOGGING_SRCS = select({
6779 # No logging in optimized mode
6780 ":optimized_build": [],
6781 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07006782 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07006783 "src/operator-strings.c",
6784 "src/subgraph-strings.c",
6785 ],
6786})
6787
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07006788LOGGING_HDRS = [
6789 "src/xnnpack/log.h",
6790]
6791
Marat Dukhan08c4a432019-10-03 09:29:21 -07006792xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08006793 name = "tables",
6794 srcs = TABLE_SRCS,
6795 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006796 gcc_copts = xnnpack_gcc_std_copts(),
6797 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08006798)
6799
6800xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07006801 name = "scalar_bench_microkernels",
6802 srcs = ALL_SCALAR_MICROKERNEL_SRCS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07006803 hdrs = INTERNAL_HDRS,
6804 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07006805 gcc_copts = xnnpack_gcc_std_copts(),
6806 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07006807 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08006808 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006809 "@FP16",
6810 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08006811 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006812 ],
6813)
6814
6815xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07006816 name = "scalar_prod_microkernels",
Marat Dukhane0f15ad2021-12-22 15:15:25 -08006817 srcs = PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS,
Marat Dukhan2c724952021-07-27 18:46:30 -07006818 hdrs = INTERNAL_HDRS,
6819 aarch32_copts = ["-marm"],
Marat Dukhane0f15ad2021-12-22 15:15:25 -08006820 aarch32_srcs = PROD_SCALAR_AARCH32_MICROKERNEL_SRCS,
Marat Dukhan2c724952021-07-27 18:46:30 -07006821 gcc_copts = xnnpack_gcc_std_copts(),
6822 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhane0f15ad2021-12-22 15:15:25 -08006823 wasm_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS,
6824 wasmrelaxedsimd_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS,
6825 wasmsimd_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS,
Marat Dukhan2c724952021-07-27 18:46:30 -07006826 deps = [
6827 ":tables",
6828 "@FP16",
6829 "@FXdiv",
6830 "@pthreadpool",
6831 ],
6832)
6833
6834xnnpack_cc_library(
6835 name = "scalar_test_microkernels",
6836 srcs = ALL_SCALAR_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07006837 hdrs = INTERNAL_HDRS,
6838 aarch32_copts = ["-marm"],
6839 copts = [
6840 "-UNDEBUG",
6841 "-DXNN_TEST_MODE=1",
6842 ],
6843 gcc_copts = xnnpack_gcc_std_copts(),
6844 msvc_copts = xnnpack_msvc_std_copts(),
6845 deps = [
6846 ":tables",
6847 "@FP16",
6848 "@FXdiv",
6849 "@pthreadpool",
6850 ],
6851)
6852
6853xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07006854 name = "wasm_bench_microkernels",
Marat Dukhan436ebe62019-12-04 15:10:12 -08006855 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006856 gcc_copts = xnnpack_gcc_std_copts(),
6857 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan2c724952021-07-27 18:46:30 -07006858 wasm_srcs = ALL_WASM_MICROKERNEL_SRCS,
Marat Dukhan19bfefe2021-12-21 19:16:06 -08006859 wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS,
Marat Dukhan2c724952021-07-27 18:46:30 -07006860 wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08006861 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08006862 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08006863 "@FP16",
6864 "@FXdiv",
6865 "@pthreadpool",
6866 ],
6867)
6868
6869xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07006870 name = "wasm_prod_microkernels",
6871 hdrs = INTERNAL_HDRS,
6872 gcc_copts = xnnpack_gcc_std_copts(),
6873 msvc_copts = xnnpack_msvc_std_copts(),
6874 wasm_srcs = ALL_WASM_MICROKERNEL_SRCS,
Marat Dukhan19bfefe2021-12-21 19:16:06 -08006875 wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS,
Marat Dukhan2c724952021-07-27 18:46:30 -07006876 wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS,
6877 deps = [
6878 ":tables",
6879 "@FP16",
6880 "@FXdiv",
6881 "@pthreadpool",
6882 ],
6883)
6884
6885xnnpack_cc_library(
6886 name = "wasm_test_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07006887 hdrs = INTERNAL_HDRS,
6888 copts = [
6889 "-UNDEBUG",
6890 "-DXNN_TEST_MODE=1",
6891 ],
6892 gcc_copts = xnnpack_gcc_std_copts(),
6893 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan2c724952021-07-27 18:46:30 -07006894 wasm_srcs = ALL_WASM_MICROKERNEL_SRCS,
Marat Dukhan19bfefe2021-12-21 19:16:06 -08006895 wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS,
Marat Dukhan2c724952021-07-27 18:46:30 -07006896 wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07006897 deps = [
6898 ":tables",
6899 "@FP16",
6900 "@FXdiv",
6901 "@pthreadpool",
6902 ],
6903)
6904
6905xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07006906 name = "neon_bench_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006907 hdrs = INTERNAL_HDRS,
6908 aarch32_copts = [
6909 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07006910 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006911 "-mfpu=neon",
6912 ],
Marat Dukhan2c724952021-07-27 18:46:30 -07006913 aarch32_srcs = ALL_NEON_MICROKERNEL_SRCS,
Marat Dukhanf7182322021-09-09 18:53:46 -07006914 aarch64_srcs = ALL_NEON_MICROKERNEL_SRCS + ALL_AARCH64_NEON_MICROKERNEL_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07006915 gcc_copts = xnnpack_gcc_std_copts(),
6916 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08006917 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08006918 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08006919 "@FP16",
6920 "@pthreadpool",
6921 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006922)
6923
6924xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07006925 name = "neon_prod_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07006926 hdrs = INTERNAL_HDRS,
6927 aarch32_copts = [
6928 "-marm",
6929 "-march=armv7-a",
6930 "-mfpu=neon",
6931 ],
Marat Dukhan2c724952021-07-27 18:46:30 -07006932 aarch32_srcs = PROD_NEON_MICROKERNEL_SRCS,
Marat Dukhanf7182322021-09-09 18:53:46 -07006933 aarch64_srcs = PROD_NEON_MICROKERNEL_SRCS + PROD_AARCH64_NEON_MICROKERNEL_SRCS,
Marat Dukhan2c724952021-07-27 18:46:30 -07006934 gcc_copts = xnnpack_gcc_std_copts(),
6935 msvc_copts = xnnpack_msvc_std_copts(),
6936 deps = [
6937 ":tables",
6938 "@FP16",
6939 "@pthreadpool",
6940 ],
6941)
6942
6943xnnpack_cc_library(
6944 name = "neon_test_microkernels",
6945 hdrs = INTERNAL_HDRS,
6946 aarch32_copts = [
6947 "-marm",
6948 "-march=armv7-a",
6949 "-mfpu=neon",
6950 ],
6951 aarch32_srcs = ALL_NEON_MICROKERNEL_SRCS,
Marat Dukhanf7182322021-09-09 18:53:46 -07006952 aarch64_srcs = ALL_NEON_MICROKERNEL_SRCS + ALL_AARCH64_NEON_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07006953 copts = [
6954 "-UNDEBUG",
6955 "-DXNN_TEST_MODE=1",
6956 ],
6957 gcc_copts = xnnpack_gcc_std_copts(),
6958 msvc_copts = xnnpack_msvc_std_copts(),
6959 deps = [
6960 ":tables",
6961 "@FP16",
6962 "@pthreadpool",
6963 ],
6964)
6965
6966xnnpack_cc_library(
Marat Dukhan8ff372c2021-09-28 14:43:17 -07006967 name = "neonfp16_bench_microkernels",
6968 hdrs = INTERNAL_HDRS,
6969 aarch32_copts = [
6970 "-marm",
6971 "-march=armv7-a",
6972 "-mfpu=neon-fp16",
6973 ],
6974 aarch32_srcs = ALL_NEONFP16_MICROKERNEL_SRCS,
6975 aarch64_srcs = ALL_NEONFP16_MICROKERNEL_SRCS,
6976 apple_aarch32_copts = [
6977 "-mcpu=cortex-a9",
6978 "-mtune=generic",
6979 ],
6980 gcc_copts = xnnpack_gcc_std_copts(),
6981 msvc_copts = xnnpack_msvc_std_copts(),
6982 deps = [
6983 ":tables",
6984 "@FP16",
6985 "@pthreadpool",
6986 ],
6987)
6988
6989xnnpack_cc_library(
6990 name = "neonfp16_prod_microkernels",
6991 hdrs = INTERNAL_HDRS,
6992 aarch32_copts = [
6993 "-marm",
6994 "-march=armv7-a",
6995 "-mfpu=neon-fp16",
6996 ],
6997 aarch32_srcs = PROD_NEONFP16_MICROKERNEL_SRCS,
6998 aarch64_srcs = PROD_NEONFP16_MICROKERNEL_SRCS,
6999 apple_aarch32_copts = [
7000 "-mcpu=cortex-a9",
7001 "-mtune=generic",
7002 ],
7003 gcc_copts = xnnpack_gcc_std_copts(),
7004 msvc_copts = xnnpack_msvc_std_copts(),
7005 deps = [
7006 ":tables",
7007 "@FP16",
7008 "@pthreadpool",
7009 ],
7010)
7011
7012xnnpack_cc_library(
7013 name = "neonfp16_test_microkernels",
7014 hdrs = INTERNAL_HDRS,
7015 aarch32_copts = [
7016 "-marm",
7017 "-march=armv7-a",
7018 "-mfpu=neon-fp16",
7019 ],
7020 aarch32_srcs = ALL_NEONFP16_MICROKERNEL_SRCS,
7021 aarch64_srcs = ALL_NEONFP16_MICROKERNEL_SRCS,
7022 apple_aarch32_copts = [
7023 "-mcpu=cortex-a9",
7024 "-mtune=generic",
7025 ],
7026 copts = [
7027 "-UNDEBUG",
7028 "-DXNN_TEST_MODE=1",
7029 ],
7030 gcc_copts = xnnpack_gcc_std_copts(),
7031 msvc_copts = xnnpack_msvc_std_copts(),
7032 deps = [
7033 ":tables",
7034 "@FP16",
7035 "@pthreadpool",
7036 ],
7037)
7038
7039xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007040 name = "neonfma_bench_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007041 hdrs = INTERNAL_HDRS,
7042 aarch32_copts = [
7043 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07007044 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007045 "-mfpu=neon-vfpv4",
7046 ],
Marat Dukhan2c724952021-07-27 18:46:30 -07007047 aarch32_srcs = ALL_NEONFMA_MICROKERNEL_SRCS,
Marat Dukhanf7182322021-09-09 18:53:46 -07007048 aarch64_srcs = ALL_NEONFMA_MICROKERNEL_SRCS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07007049 apple_aarch32_copts = [
7050 "-mcpu=swift",
7051 "-mtune=generic",
7052 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07007053 gcc_copts = xnnpack_gcc_std_copts(),
7054 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08007055 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08007056 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08007057 "@FP16",
7058 "@pthreadpool",
7059 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007060)
7061
7062xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007063 name = "neonfma_prod_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07007064 hdrs = INTERNAL_HDRS,
7065 aarch32_copts = [
7066 "-marm",
7067 "-march=armv7-a",
7068 "-mfpu=neon-vfpv4",
7069 ],
Marat Dukhan2c724952021-07-27 18:46:30 -07007070 aarch32_srcs = PROD_NEONFMA_MICROKERNEL_SRCS,
Marat Dukhanf7182322021-09-09 18:53:46 -07007071 aarch64_srcs = PROD_NEONFMA_MICROKERNEL_SRCS,
Marat Dukhan2c724952021-07-27 18:46:30 -07007072 apple_aarch32_copts = [
7073 "-mcpu=swift",
7074 "-mtune=generic",
7075 ],
7076 gcc_copts = xnnpack_gcc_std_copts(),
7077 msvc_copts = xnnpack_msvc_std_copts(),
7078 deps = [
7079 ":tables",
7080 "@FP16",
7081 "@pthreadpool",
7082 ],
7083)
7084
7085xnnpack_cc_library(
7086 name = "neonfma_test_microkernels",
7087 hdrs = INTERNAL_HDRS,
7088 aarch32_copts = [
7089 "-marm",
7090 "-march=armv7-a",
7091 "-mfpu=neon-vfpv4",
7092 ],
7093 aarch32_srcs = ALL_NEONFMA_MICROKERNEL_SRCS,
Marat Dukhanf7182322021-09-09 18:53:46 -07007094 aarch64_srcs = ALL_NEONFMA_MICROKERNEL_SRCS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07007095 apple_aarch32_copts = [
7096 "-mcpu=swift",
7097 "-mtune=generic",
7098 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07007099 copts = [
7100 "-UNDEBUG",
7101 "-DXNN_TEST_MODE=1",
7102 ],
7103 gcc_copts = xnnpack_gcc_std_copts(),
7104 msvc_copts = xnnpack_msvc_std_copts(),
7105 deps = [
7106 ":tables",
7107 "@FP16",
7108 "@pthreadpool",
7109 ],
7110)
7111
7112xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007113 name = "neonv8_bench_microkernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07007114 hdrs = INTERNAL_HDRS,
7115 aarch32_copts = [
7116 "-marm",
7117 "-march=armv8-a",
7118 "-mfpu=neon-fp-armv8",
7119 ],
Marat Dukhan2c724952021-07-27 18:46:30 -07007120 aarch32_srcs = ALL_NEONV8_MICROKERNEL_SRCS,
7121 aarch64_srcs = ALL_NEONV8_MICROKERNEL_SRCS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07007122 apple_aarch32_copts = [
7123 "-mcpu=cyclone",
7124 "-mtune=generic",
7125 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07007126 gcc_copts = xnnpack_gcc_std_copts(),
7127 msvc_copts = xnnpack_msvc_std_copts(),
7128 deps = [
7129 ":tables",
7130 "@FP16",
7131 "@pthreadpool",
7132 ],
7133)
7134
7135xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007136 name = "neonv8_prod_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07007137 hdrs = INTERNAL_HDRS,
7138 aarch32_copts = [
7139 "-marm",
7140 "-march=armv8-a",
7141 "-mfpu=neon-fp-armv8",
7142 ],
Marat Dukhan2c724952021-07-27 18:46:30 -07007143 aarch32_srcs = PROD_NEONV8_MICROKERNEL_SRCS,
7144 aarch64_srcs = PROD_NEONV8_MICROKERNEL_SRCS,
7145 apple_aarch32_copts = [
7146 "-mcpu=cyclone",
7147 "-mtune=generic",
7148 ],
7149 gcc_copts = xnnpack_gcc_std_copts(),
7150 msvc_copts = xnnpack_msvc_std_copts(),
7151 deps = [
7152 ":tables",
7153 "@FP16",
7154 "@pthreadpool",
7155 ],
7156)
7157
7158xnnpack_cc_library(
7159 name = "neonv8_test_microkernels",
7160 hdrs = INTERNAL_HDRS,
7161 aarch32_copts = [
7162 "-marm",
7163 "-march=armv8-a",
7164 "-mfpu=neon-fp-armv8",
7165 ],
7166 aarch32_srcs = ALL_NEONV8_MICROKERNEL_SRCS,
7167 aarch64_srcs = ALL_NEONV8_MICROKERNEL_SRCS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07007168 apple_aarch32_copts = [
7169 "-mcpu=cyclone",
7170 "-mtune=generic",
7171 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07007172 copts = [
7173 "-UNDEBUG",
7174 "-DXNN_TEST_MODE=1",
7175 ],
7176 gcc_copts = xnnpack_gcc_std_copts(),
7177 msvc_copts = xnnpack_msvc_std_copts(),
7178 deps = [
7179 ":tables",
7180 "@FP16",
7181 "@pthreadpool",
7182 ],
7183)
7184
7185xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007186 name = "neonfp16arith_bench_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007187 hdrs = INTERNAL_HDRS,
7188 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007189 aarch64_srcs = ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07007190 gcc_copts = xnnpack_gcc_std_copts(),
7191 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08007192 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08007193 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08007194 "@FP16",
7195 "@pthreadpool",
7196 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007197)
7198
7199xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007200 name = "neonfp16arith_prod_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07007201 hdrs = INTERNAL_HDRS,
7202 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007203 aarch64_srcs = PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS,
7204 gcc_copts = xnnpack_gcc_std_copts(),
7205 msvc_copts = xnnpack_msvc_std_copts(),
7206 deps = [
7207 ":tables",
7208 "@FP16",
7209 "@pthreadpool",
7210 ],
7211)
7212
7213xnnpack_cc_library(
7214 name = "neonfp16arith_test_microkernels",
7215 hdrs = INTERNAL_HDRS,
7216 aarch64_copts = ["-march=armv8.2-a+fp16"],
7217 aarch64_srcs = ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07007218 copts = [
7219 "-UNDEBUG",
7220 "-DXNN_TEST_MODE=1",
7221 ],
7222 gcc_copts = xnnpack_gcc_std_copts(),
7223 msvc_copts = xnnpack_msvc_std_copts(),
7224 deps = [
7225 ":tables",
7226 "@FP16",
7227 "@pthreadpool",
7228 ],
7229)
7230
7231xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007232 name = "neondot_bench_microkernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07007233 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07007234 aarch32_copts = [
7235 "-marm",
7236 "-march=armv8.2-a+dotprod",
7237 "-mfpu=neon-fp-armv8",
7238 ],
Marat Dukhan2c724952021-07-27 18:46:30 -07007239 aarch32_srcs = ALL_NEONDOT_MICROKERNEL_SRCS,
Benoit Jacoba9644732020-08-13 12:48:55 -07007240 aarch64_copts = ["-march=armv8.2-a+dotprod"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007241 aarch64_srcs = ALL_NEONDOT_MICROKERNEL_SRCS,
Benoit Jacoba9644732020-08-13 12:48:55 -07007242 gcc_copts = xnnpack_gcc_std_copts(),
7243 msvc_copts = xnnpack_msvc_std_copts(),
7244 deps = [
7245 ":tables",
7246 "@FP16",
7247 "@pthreadpool",
7248 ],
7249)
7250
7251xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007252 name = "neondot_prod_microkernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07007253 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07007254 aarch32_copts = [
7255 "-marm",
7256 "-march=armv8.2-a+dotprod",
7257 "-mfpu=neon-fp-armv8",
7258 ],
Marat Dukhan2c724952021-07-27 18:46:30 -07007259 aarch32_srcs = PROD_NEONDOT_MICROKERNEL_SRCS,
Benoit Jacoba9644732020-08-13 12:48:55 -07007260 aarch64_copts = ["-march=armv8.2-a+dotprod"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007261 aarch64_srcs = PROD_NEONDOT_MICROKERNEL_SRCS,
7262 gcc_copts = xnnpack_gcc_std_copts(),
7263 msvc_copts = xnnpack_msvc_std_copts(),
7264 deps = [
7265 ":tables",
7266 "@FP16",
7267 "@pthreadpool",
7268 ],
7269)
7270
7271xnnpack_cc_library(
7272 name = "neondot_test_microkernels",
7273 hdrs = INTERNAL_HDRS,
7274 aarch32_copts = [
7275 "-marm",
7276 "-march=armv8.2-a+dotprod",
7277 "-mfpu=neon-fp-armv8",
7278 ],
7279 aarch32_srcs = ALL_NEONDOT_MICROKERNEL_SRCS,
7280 aarch64_copts = ["-march=armv8.2-a+dotprod"],
7281 aarch64_srcs = ALL_NEONDOT_MICROKERNEL_SRCS,
Benoit Jacoba9644732020-08-13 12:48:55 -07007282 copts = [
7283 "-UNDEBUG",
7284 "-DXNN_TEST_MODE=1",
7285 ],
7286 gcc_copts = xnnpack_gcc_std_copts(),
7287 msvc_copts = xnnpack_msvc_std_copts(),
7288 deps = [
7289 ":tables",
7290 "@FP16",
7291 "@pthreadpool",
7292 ],
7293)
7294
7295xnnpack_cc_library(
Marat Dukhan51c61342021-12-22 23:08:39 -08007296 name = "sse2_amalgam_microkernels",
7297 hdrs = INTERNAL_HDRS,
7298 gcc_copts = xnnpack_gcc_std_copts(),
7299 gcc_x86_copts = ["-msse2"],
7300 msvc_copts = xnnpack_msvc_std_copts(),
7301 msvc_x86_32_copts = ["/arch:SSE2"],
7302 x86_srcs = [
7303 "src/amalgam/sse.c",
7304 "src/amalgam/sse2.c",
7305 ],
7306 deps = [
7307 ":tables",
7308 "@FP16",
7309 "@pthreadpool",
7310 ],
7311)
7312
7313xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007314 name = "sse2_bench_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007315 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07007316 gcc_copts = xnnpack_gcc_std_copts(),
7317 gcc_x86_copts = ["-msse2"],
7318 msvc_copts = xnnpack_msvc_std_copts(),
7319 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007320 x86_srcs = ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08007321 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08007322 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08007323 "@FP16",
7324 "@pthreadpool",
7325 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007326)
7327
7328xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007329 name = "sse2_prod_microkernels",
7330 hdrs = INTERNAL_HDRS,
7331 gcc_copts = xnnpack_gcc_std_copts(),
7332 gcc_x86_copts = ["-msse2"],
7333 msvc_copts = xnnpack_msvc_std_copts(),
7334 msvc_x86_32_copts = ["/arch:SSE2"],
7335 x86_srcs = PROD_SSE_MICROKERNEL_SRCS + PROD_SSE2_MICROKERNEL_SRCS,
7336 deps = [
7337 ":tables",
7338 "@FP16",
7339 "@pthreadpool",
7340 ],
7341)
7342
7343xnnpack_cc_library(
7344 name = "sse2_test_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07007345 hdrs = INTERNAL_HDRS,
7346 copts = [
7347 "-UNDEBUG",
7348 "-DXNN_TEST_MODE=1",
7349 ],
7350 gcc_copts = xnnpack_gcc_std_copts(),
7351 gcc_x86_copts = ["-msse2"],
7352 msvc_copts = xnnpack_msvc_std_copts(),
7353 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007354 x86_srcs = ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07007355 deps = [
7356 ":tables",
7357 "@FP16",
7358 "@pthreadpool",
7359 ],
7360)
7361
7362xnnpack_cc_library(
Marat Dukhan51c61342021-12-22 23:08:39 -08007363 name = "ssse3_amalgam_microkernels",
7364 hdrs = INTERNAL_HDRS,
7365 gcc_copts = xnnpack_gcc_std_copts(),
7366 gcc_x86_copts = ["-mssse3"],
7367 msvc_copts = xnnpack_msvc_std_copts(),
7368 msvc_x86_32_copts = ["/arch:SSE2"],
7369 x86_srcs = ["src/amalgam/ssse3.c"],
7370 deps = [
7371 ":tables",
7372 "@FP16",
7373 "@pthreadpool",
7374 ],
7375)
7376
7377xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007378 name = "ssse3_bench_microkernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07007379 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07007380 gcc_copts = xnnpack_gcc_std_copts(),
7381 gcc_x86_copts = ["-mssse3"],
7382 msvc_copts = xnnpack_msvc_std_copts(),
7383 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007384 x86_srcs = ALL_SSSE3_MICROKERNEL_SRCS,
Marat Dukhanfe7acb62020-03-09 19:30:05 -07007385 deps = [
7386 ":tables",
7387 "@FP16",
7388 "@pthreadpool",
7389 ],
7390)
7391
7392xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007393 name = "ssse3_prod_microkernels",
7394 hdrs = INTERNAL_HDRS,
7395 gcc_copts = xnnpack_gcc_std_copts(),
7396 gcc_x86_copts = ["-mssse3"],
7397 msvc_copts = xnnpack_msvc_std_copts(),
7398 msvc_x86_32_copts = ["/arch:SSE2"],
7399 x86_srcs = PROD_SSSE3_MICROKERNEL_SRCS,
7400 deps = [
7401 ":tables",
7402 "@FP16",
7403 "@pthreadpool",
7404 ],
7405)
7406
7407xnnpack_cc_library(
7408 name = "ssse3_test_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07007409 hdrs = INTERNAL_HDRS,
7410 copts = [
7411 "-UNDEBUG",
7412 "-DXNN_TEST_MODE=1",
7413 ],
7414 gcc_copts = xnnpack_gcc_std_copts(),
7415 gcc_x86_copts = ["-mssse3"],
7416 msvc_copts = xnnpack_msvc_std_copts(),
7417 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007418 x86_srcs = ALL_SSSE3_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07007419 deps = [
7420 ":tables",
7421 "@FP16",
7422 "@pthreadpool",
7423 ],
7424)
7425
7426xnnpack_cc_library(
Marat Dukhan51c61342021-12-22 23:08:39 -08007427 name = "sse41_amalgam_microkernels",
7428 hdrs = INTERNAL_HDRS,
7429 gcc_copts = xnnpack_gcc_std_copts(),
7430 gcc_x86_copts = ["-msse4.1"],
7431 msvc_copts = xnnpack_msvc_std_copts(),
7432 msvc_x86_32_copts = ["/arch:SSE2"],
7433 x86_srcs = ["src/amalgam/sse41.c"],
7434 deps = [
7435 ":tables",
7436 "@FP16",
7437 "@pthreadpool",
7438 ],
7439)
7440
7441xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007442 name = "sse41_bench_microkernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08007443 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07007444 gcc_copts = xnnpack_gcc_std_copts(),
7445 gcc_x86_copts = ["-msse4.1"],
7446 msvc_copts = xnnpack_msvc_std_copts(),
7447 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007448 x86_srcs = ALL_SSE41_MICROKERNEL_SRCS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08007449 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08007450 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08007451 "@FP16",
7452 "@pthreadpool",
7453 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08007454)
7455
7456xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007457 name = "sse41_prod_microkernels",
7458 hdrs = INTERNAL_HDRS,
7459 gcc_copts = xnnpack_gcc_std_copts(),
7460 gcc_x86_copts = ["-msse4.1"],
7461 msvc_copts = xnnpack_msvc_std_copts(),
7462 msvc_x86_32_copts = ["/arch:SSE2"],
7463 x86_srcs = PROD_SSE41_MICROKERNEL_SRCS,
7464 deps = [
7465 ":tables",
7466 "@FP16",
7467 "@pthreadpool",
7468 ],
7469)
7470
7471xnnpack_cc_library(
7472 name = "sse41_test_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07007473 hdrs = INTERNAL_HDRS,
7474 copts = [
7475 "-UNDEBUG",
7476 "-DXNN_TEST_MODE=1",
7477 ],
7478 gcc_copts = xnnpack_gcc_std_copts(),
7479 gcc_x86_copts = ["-msse4.1"],
7480 msvc_copts = xnnpack_msvc_std_copts(),
7481 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007482 x86_srcs = ALL_SSE41_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07007483 deps = [
7484 ":tables",
7485 "@FP16",
7486 "@pthreadpool",
7487 ],
7488)
7489
7490xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007491 name = "avx_bench_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007492 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07007493 gcc_copts = xnnpack_gcc_std_copts(),
7494 gcc_x86_copts = ["-mavx"],
7495 msvc_copts = xnnpack_msvc_std_copts(),
7496 msvc_x86_32_copts = ["/arch:AVX"],
7497 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007498 x86_srcs = ALL_AVX_MICROKERNEL_SRCS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08007499 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08007500 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08007501 "@FP16",
7502 "@pthreadpool",
7503 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007504)
7505
7506xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007507 name = "avx_prod_microkernels",
7508 hdrs = INTERNAL_HDRS,
7509 gcc_copts = xnnpack_gcc_std_copts(),
7510 gcc_x86_copts = ["-mavx"],
7511 msvc_copts = xnnpack_msvc_std_copts(),
7512 msvc_x86_32_copts = ["/arch:AVX"],
7513 msvc_x86_64_copts = ["/arch:AVX"],
7514 x86_srcs = PROD_AVX_MICROKERNEL_SRCS,
7515 deps = [
7516 ":tables",
7517 "@FP16",
7518 "@pthreadpool",
7519 ],
7520)
7521
7522xnnpack_cc_library(
7523 name = "avx_test_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07007524 hdrs = INTERNAL_HDRS,
7525 copts = [
7526 "-UNDEBUG",
7527 "-DXNN_TEST_MODE=1",
7528 ],
7529 gcc_copts = xnnpack_gcc_std_copts(),
7530 gcc_x86_copts = ["-mavx"],
7531 msvc_copts = xnnpack_msvc_std_copts(),
7532 msvc_x86_32_copts = ["/arch:AVX"],
7533 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007534 x86_srcs = ALL_AVX_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07007535 deps = [
7536 ":tables",
7537 "@FP16",
7538 "@pthreadpool",
7539 ],
7540)
7541
7542xnnpack_cc_library(
Marat Dukhanf1a6ed32021-09-26 13:40:19 -07007543 name = "f16c_bench_microkernels",
7544 hdrs = INTERNAL_HDRS,
7545 gcc_copts = xnnpack_gcc_std_copts(),
7546 gcc_x86_copts = ["-mf16c"],
7547 msvc_copts = xnnpack_msvc_std_copts(),
7548 msvc_x86_32_copts = ["/arch:AVX"],
7549 msvc_x86_64_copts = ["/arch:AVX"],
7550 x86_srcs = ALL_F16C_MICROKERNEL_SRCS,
7551 deps = [
7552 "@FP16",
7553 "@pthreadpool",
7554 ],
7555)
7556
7557xnnpack_cc_library(
7558 name = "f16c_prod_microkernels",
7559 hdrs = INTERNAL_HDRS,
7560 gcc_copts = xnnpack_gcc_std_copts(),
7561 gcc_x86_copts = ["-mf16c"],
7562 msvc_copts = xnnpack_msvc_std_copts(),
7563 msvc_x86_32_copts = ["/arch:AVX"],
7564 msvc_x86_64_copts = ["/arch:AVX"],
7565 x86_srcs = PROD_F16C_MICROKERNEL_SRCS,
7566 deps = [
7567 "@FP16",
7568 "@pthreadpool",
7569 ],
7570)
7571
7572xnnpack_cc_library(
7573 name = "f16c_test_microkernels",
7574 hdrs = INTERNAL_HDRS,
7575 copts = [
7576 "-UNDEBUG",
7577 "-DXNN_TEST_MODE=1",
7578 ],
7579 gcc_copts = xnnpack_gcc_std_copts(),
7580 gcc_x86_copts = ["-mf16c"],
7581 msvc_copts = xnnpack_msvc_std_copts(),
7582 msvc_x86_32_copts = ["/arch:AVX"],
7583 msvc_x86_64_copts = ["/arch:AVX"],
7584 x86_srcs = ALL_F16C_MICROKERNEL_SRCS,
7585 deps = [
7586 "@FP16",
7587 "@pthreadpool",
7588 ],
7589)
7590
7591xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007592 name = "xop_bench_microkernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07007593 hdrs = INTERNAL_HDRS,
7594 gcc_copts = xnnpack_gcc_std_copts(),
7595 gcc_x86_copts = ["-mxop"],
7596 msvc_copts = xnnpack_msvc_std_copts(),
7597 msvc_x86_32_copts = ["/arch:AVX"],
7598 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007599 x86_srcs = ALL_XOP_MICROKERNEL_SRCS,
Marat Dukhan1566fee2020-08-02 21:55:41 -07007600 deps = [
7601 ":tables",
7602 "@FP16",
7603 "@pthreadpool",
7604 ],
7605)
7606
7607xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007608 name = "xop_prod_microkernels",
7609 hdrs = INTERNAL_HDRS,
7610 gcc_copts = xnnpack_gcc_std_copts(),
7611 gcc_x86_copts = ["-mxop"],
7612 msvc_copts = xnnpack_msvc_std_copts(),
7613 msvc_x86_32_copts = ["/arch:AVX"],
7614 msvc_x86_64_copts = ["/arch:AVX"],
7615 x86_srcs = PROD_XOP_MICROKERNEL_SRCS,
7616 deps = [
7617 ":tables",
7618 "@FP16",
7619 "@pthreadpool",
7620 ],
7621)
7622
7623xnnpack_cc_library(
7624 name = "xop_test_microkernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07007625 hdrs = INTERNAL_HDRS,
7626 copts = [
7627 "-UNDEBUG",
7628 "-DXNN_TEST_MODE=1",
7629 ],
7630 gcc_copts = xnnpack_gcc_std_copts(),
7631 gcc_x86_copts = ["-mxop"],
7632 msvc_copts = xnnpack_msvc_std_copts(),
7633 msvc_x86_32_copts = ["/arch:AVX"],
7634 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007635 x86_srcs = ALL_XOP_MICROKERNEL_SRCS,
Marat Dukhan1566fee2020-08-02 21:55:41 -07007636 deps = [
7637 ":tables",
7638 "@FP16",
7639 "@pthreadpool",
7640 ],
7641)
7642
7643xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007644 name = "fma3_bench_microkernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08007645 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07007646 gcc_copts = xnnpack_gcc_std_copts(),
7647 gcc_x86_copts = ["-mfma"],
7648 msvc_copts = xnnpack_msvc_std_copts(),
7649 msvc_x86_32_copts = ["/arch:AVX"],
7650 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007651 x86_srcs = ALL_FMA3_MICROKERNEL_SRCS,
Marat Dukhanfda12b82019-11-21 12:27:59 -08007652 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08007653 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08007654 "@FP16",
7655 "@pthreadpool",
7656 ],
7657)
7658
7659xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007660 name = "fma3_prod_microkernels",
7661 hdrs = INTERNAL_HDRS,
7662 gcc_copts = xnnpack_gcc_std_copts(),
7663 gcc_x86_copts = ["-mfma"],
7664 msvc_copts = xnnpack_msvc_std_copts(),
7665 msvc_x86_32_copts = ["/arch:AVX"],
7666 msvc_x86_64_copts = ["/arch:AVX"],
7667 x86_srcs = PROD_FMA3_MICROKERNEL_SRCS,
7668 deps = [
7669 ":tables",
7670 "@FP16",
7671 "@pthreadpool",
7672 ],
7673)
7674
7675xnnpack_cc_library(
7676 name = "fma3_test_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07007677 hdrs = INTERNAL_HDRS,
7678 copts = [
7679 "-UNDEBUG",
7680 "-DXNN_TEST_MODE=1",
7681 ],
7682 gcc_copts = xnnpack_gcc_std_copts(),
7683 gcc_x86_copts = ["-mfma"],
7684 msvc_copts = xnnpack_msvc_std_copts(),
7685 msvc_x86_32_copts = ["/arch:AVX"],
7686 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007687 x86_srcs = ALL_FMA3_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07007688 deps = [
7689 ":tables",
7690 "@FP16",
7691 "@pthreadpool",
7692 ],
7693)
7694
7695xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007696 name = "avx2_bench_microkernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07007697 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07007698 gcc_copts = xnnpack_gcc_std_copts(),
7699 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07007700 "-mfma",
7701 "-mavx2",
7702 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07007703 msvc_copts = xnnpack_msvc_std_copts(),
7704 msvc_x86_32_copts = ["/arch:AVX2"],
7705 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007706 x86_srcs = ALL_AVX2_MICROKERNEL_SRCS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08007707 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08007708 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08007709 "@FP16",
7710 "@pthreadpool",
7711 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07007712)
7713
7714xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007715 name = "avx2_prod_microkernels",
7716 hdrs = INTERNAL_HDRS,
7717 gcc_copts = xnnpack_gcc_std_copts(),
7718 gcc_x86_copts = [
7719 "-mfma",
7720 "-mavx2",
7721 ],
7722 msvc_copts = xnnpack_msvc_std_copts(),
7723 msvc_x86_32_copts = ["/arch:AVX2"],
7724 msvc_x86_64_copts = ["/arch:AVX2"],
7725 x86_srcs = PROD_AVX2_MICROKERNEL_SRCS,
7726 deps = [
7727 ":tables",
7728 "@FP16",
7729 "@pthreadpool",
7730 ],
7731)
7732
7733xnnpack_cc_library(
7734 name = "avx2_test_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07007735 hdrs = INTERNAL_HDRS,
7736 copts = [
7737 "-UNDEBUG",
7738 "-DXNN_TEST_MODE=1",
7739 ],
7740 gcc_copts = xnnpack_gcc_std_copts(),
7741 gcc_x86_copts = [
7742 "-mfma",
7743 "-mavx2",
7744 ],
7745 msvc_copts = xnnpack_msvc_std_copts(),
7746 msvc_x86_32_copts = ["/arch:AVX2"],
7747 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007748 x86_srcs = ALL_AVX2_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07007749 deps = [
7750 ":tables",
7751 "@FP16",
7752 "@pthreadpool",
7753 ],
7754)
7755
7756xnnpack_cc_library(
Marat Dukhan51c61342021-12-22 23:08:39 -08007757 name = "avx512f_amalgam_microkernels",
7758 hdrs = INTERNAL_HDRS,
7759 gcc_copts = xnnpack_gcc_std_copts(),
7760 gcc_x86_copts = ["-mavx512f"],
7761 mingw_copts = ["-fno-asynchronous-unwind-tables"],
7762 msvc_copts = xnnpack_msvc_std_copts(),
7763 msvc_x86_32_copts = ["/arch:AVX512"],
7764 msvc_x86_64_copts = ["/arch:AVX512"],
7765 msys_copts = ["-fno-asynchronous-unwind-tables"],
7766 x86_srcs = ["src/amalgam/avx512f.c"],
7767 deps = [
7768 ":tables",
7769 "@FP16",
7770 "@pthreadpool",
7771 ],
7772)
7773
7774xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007775 name = "avx512f_bench_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007776 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07007777 gcc_copts = xnnpack_gcc_std_copts(),
7778 gcc_x86_copts = ["-mavx512f"],
7779 mingw_copts = ["-fno-asynchronous-unwind-tables"],
7780 msvc_copts = xnnpack_msvc_std_copts(),
7781 msvc_x86_32_copts = ["/arch:AVX512"],
7782 msvc_x86_64_copts = ["/arch:AVX512"],
7783 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007784 x86_srcs = ALL_AVX512F_MICROKERNEL_SRCS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08007785 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08007786 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08007787 "@FP16",
7788 "@pthreadpool",
7789 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007790)
7791
7792xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007793 name = "avx512f_prod_microkernels",
7794 hdrs = INTERNAL_HDRS,
7795 gcc_copts = xnnpack_gcc_std_copts(),
7796 gcc_x86_copts = ["-mavx512f"],
7797 mingw_copts = ["-fno-asynchronous-unwind-tables"],
7798 msvc_copts = xnnpack_msvc_std_copts(),
7799 msvc_x86_32_copts = ["/arch:AVX512"],
7800 msvc_x86_64_copts = ["/arch:AVX512"],
7801 msys_copts = ["-fno-asynchronous-unwind-tables"],
7802 x86_srcs = PROD_AVX512F_MICROKERNEL_SRCS,
7803 deps = [
7804 ":tables",
7805 "@FP16",
7806 "@pthreadpool",
7807 ],
7808)
7809
7810xnnpack_cc_library(
7811 name = "avx512f_test_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07007812 hdrs = INTERNAL_HDRS,
7813 copts = [
7814 "-UNDEBUG",
7815 "-DXNN_TEST_MODE=1",
7816 ],
7817 gcc_copts = xnnpack_gcc_std_copts(),
7818 gcc_x86_copts = ["-mavx512f"],
7819 mingw_copts = ["-fno-asynchronous-unwind-tables"],
7820 msvc_copts = xnnpack_msvc_std_copts(),
7821 msvc_x86_32_copts = ["/arch:AVX512"],
7822 msvc_x86_64_copts = ["/arch:AVX512"],
7823 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007824 x86_srcs = ALL_AVX512F_MICROKERNEL_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07007825 deps = [
7826 ":tables",
7827 "@FP16",
7828 "@pthreadpool",
7829 ],
7830)
7831
7832xnnpack_cc_library(
Marat Dukhan51c61342021-12-22 23:08:39 -08007833 name = "avx512skx_amalgam_microkernels",
7834 hdrs = INTERNAL_HDRS,
7835 gcc_copts = xnnpack_gcc_std_copts(),
7836 gcc_x86_copts = [
7837 "-mavx512f",
7838 "-mavx512cd",
7839 "-mavx512bw",
7840 "-mavx512dq",
7841 "-mavx512vl",
7842 ],
7843 mingw_copts = ["-fno-asynchronous-unwind-tables"],
7844 msvc_copts = xnnpack_msvc_std_copts(),
7845 msvc_x86_32_copts = ["/arch:AVX512"],
7846 msvc_x86_64_copts = ["/arch:AVX512"],
7847 msys_copts = ["-fno-asynchronous-unwind-tables"],
7848 x86_srcs = ["src/amalgam/avx512skx.c"],
7849 deps = [
7850 ":tables",
7851 "@FP16",
7852 "@pthreadpool",
7853 ],
7854)
7855
7856xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007857 name = "avx512skx_bench_microkernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07007858 hdrs = INTERNAL_HDRS,
7859 gcc_copts = xnnpack_gcc_std_copts(),
7860 gcc_x86_copts = [
7861 "-mavx512f",
7862 "-mavx512cd",
7863 "-mavx512bw",
7864 "-mavx512dq",
7865 "-mavx512vl",
7866 ],
7867 mingw_copts = ["-fno-asynchronous-unwind-tables"],
7868 msvc_copts = xnnpack_msvc_std_copts(),
7869 msvc_x86_32_copts = ["/arch:AVX512"],
7870 msvc_x86_64_copts = ["/arch:AVX512"],
7871 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007872 x86_srcs = ALL_AVX512SKX_MICROKERNEL_SRCS,
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07007873 deps = [
7874 ":tables",
7875 "@FP16",
7876 "@pthreadpool",
7877 ],
7878)
7879
7880xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007881 name = "avx512skx_prod_microkernels",
7882 hdrs = INTERNAL_HDRS,
7883 gcc_copts = xnnpack_gcc_std_copts(),
7884 gcc_x86_copts = [
7885 "-mavx512f",
7886 "-mavx512cd",
7887 "-mavx512bw",
7888 "-mavx512dq",
7889 "-mavx512vl",
7890 ],
7891 mingw_copts = ["-fno-asynchronous-unwind-tables"],
7892 msvc_copts = xnnpack_msvc_std_copts(),
7893 msvc_x86_32_copts = ["/arch:AVX512"],
7894 msvc_x86_64_copts = ["/arch:AVX512"],
7895 msys_copts = ["-fno-asynchronous-unwind-tables"],
7896 x86_srcs = PROD_AVX512SKX_MICROKERNEL_SRCS,
7897 deps = [
7898 ":tables",
7899 "@FP16",
7900 "@pthreadpool",
7901 ],
7902)
7903
7904xnnpack_cc_library(
7905 name = "avx512skx_test_microkernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07007906 hdrs = INTERNAL_HDRS,
7907 copts = [
7908 "-UNDEBUG",
7909 "-DXNN_TEST_MODE=1",
7910 ],
7911 gcc_copts = xnnpack_gcc_std_copts(),
7912 gcc_x86_copts = [
7913 "-mavx512f",
7914 "-mavx512cd",
7915 "-mavx512bw",
7916 "-mavx512dq",
7917 "-mavx512vl",
7918 ],
7919 mingw_copts = ["-fno-asynchronous-unwind-tables"],
7920 msvc_copts = xnnpack_msvc_std_copts(),
7921 msvc_x86_32_copts = ["/arch:AVX512"],
7922 msvc_x86_64_copts = ["/arch:AVX512"],
7923 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan2c724952021-07-27 18:46:30 -07007924 x86_srcs = ALL_AVX512SKX_MICROKERNEL_SRCS,
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07007925 deps = [
7926 ":tables",
7927 "@FP16",
7928 "@pthreadpool",
7929 ],
7930)
7931
7932xnnpack_cc_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07007933 name = "asm_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007934 hdrs = ["src/xnnpack/assembly.h"],
Frank Barchard9f3f4202021-12-16 18:13:51 -08007935 aarch32_copts = [
7936 "-marm",
7937 "-march=armv8.2-a+dotprod",
7938 "-mfpu=neon-fp-armv8",
7939 ],
Marat Dukhandb3b0a72021-07-27 08:58:01 -07007940 aarch32_srcs = AARCH32_ASM_MICROKERNEL_SRCS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07007941 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhandb3b0a72021-07-27 08:58:01 -07007942 aarch64_srcs = AARCH64_ASM_MICROKERNEL_SRCS,
7943 wasm_srcs = WASM32_ASM_MICROKERNEL_SRCS,
Marat Dukhan19bfefe2021-12-21 19:16:06 -08007944 wasmrelaxedsimd_srcs = WASM32_ASM_MICROKERNEL_SRCS,
Marat Dukhandb3b0a72021-07-27 08:58:01 -07007945 wasmsimd_srcs = WASM32_ASM_MICROKERNEL_SRCS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007946)
7947
Marat Dukhan3b59de22020-06-03 20:15:19 -07007948xnnpack_cc_library(
7949 name = "logging_utils",
7950 srcs = LOGGING_SRCS,
7951 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
7952 copts = LOGGING_COPTS + [
7953 "-Isrc",
7954 "-Iinclude",
7955 ] + select({
7956 ":debug_build": [],
7957 "//conditions:default": xnnpack_min_size_copts(),
7958 }),
7959 gcc_copts = xnnpack_gcc_std_copts(),
7960 msvc_copts = xnnpack_msvc_std_copts(),
7961 visibility = xnnpack_visibility(),
7962 deps = [
7963 "@FP16",
7964 "@clog",
7965 "@pthreadpool",
7966 ],
7967)
7968
Marat Dukhan08c4a432019-10-03 09:29:21 -07007969xnnpack_aggregate_library(
Marat Dukhan51c61342021-12-22 23:08:39 -08007970 name = "amalgam_microkernels",
7971 aarch32_ios_deps = [
7972 ":neon_prod_microkernels",
7973 ":neonfp16_prod_microkernels",
7974 ":neonfma_prod_microkernels",
7975 ":neonv8_prod_microkernels",
7976 ":asm_microkernels",
7977 ],
7978 aarch32_nonios_deps = [
7979 ":neon_prod_microkernels",
7980 ":neonfp16_prod_microkernels",
7981 ":neonfma_prod_microkernels",
7982 ":neonv8_prod_microkernels",
7983 ":neondot_prod_microkernels",
7984 ":asm_microkernels",
7985 ],
7986 aarch64_deps = [
7987 ":neon_prod_microkernels",
7988 ":neonfp16_prod_microkernels",
7989 ":neonfma_prod_microkernels",
7990 ":neonv8_prod_microkernels",
7991 ":neonfp16arith_prod_microkernels",
7992 ":neondot_prod_microkernels",
7993 ":asm_microkernels",
7994 ],
7995 generic_deps = [
7996 ":scalar_prod_microkernels",
7997 ],
7998 wasm_deps = [
7999 ":wasm_prod_microkernels",
8000 ":asm_microkernels",
8001 ],
8002 wasmrelaxedsimd_deps = [
8003 ":wasm_prod_microkernels",
8004 ":asm_microkernels",
8005 ],
8006 wasmsimd_deps = [
8007 ":wasm_prod_microkernels",
8008 ":asm_microkernels",
8009 ],
8010 x86_deps = [
8011 ":sse2_amalgam_microkernels",
8012 ":ssse3_amalgam_microkernels",
8013 ":sse41_amalgam_microkernels",
8014 ":avx_prod_microkernels",
8015 ":f16c_prod_microkernels",
8016 ":xop_prod_microkernels",
8017 ":fma3_prod_microkernels",
8018 ":avx2_prod_microkernels",
8019 ":avx512f_amalgam_microkernels",
8020 ":avx512skx_amalgam_microkernels",
8021 ],
8022)
8023
8024xnnpack_aggregate_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07008025 name = "bench_microkernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07008026 aarch32_ios_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008027 ":neon_bench_microkernels",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07008028 ":neonfp16_bench_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008029 ":neonfma_bench_microkernels",
8030 ":neonv8_bench_microkernels",
8031 ":asm_microkernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07008032 ],
8033 aarch32_nonios_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008034 ":neon_bench_microkernels",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07008035 ":neonfp16_bench_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008036 ":neonfma_bench_microkernels",
8037 ":neonv8_bench_microkernels",
8038 ":neondot_bench_microkernels",
8039 ":asm_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008040 ],
8041 aarch64_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008042 ":neon_bench_microkernels",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07008043 ":neonfp16_bench_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008044 ":neonfma_bench_microkernels",
8045 ":neonv8_bench_microkernels",
8046 ":neonfp16arith_bench_microkernels",
8047 ":neondot_bench_microkernels",
8048 ":asm_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008049 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07008050 generic_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008051 ":scalar_bench_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008052 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07008053 wasm_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008054 ":wasm_bench_microkernels",
8055 ":asm_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008056 ],
Marat Dukhan19bfefe2021-12-21 19:16:06 -08008057 wasmrelaxedsimd_deps = [
8058 ":wasm_bench_microkernels",
8059 ":asm_microkernels",
8060 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07008061 wasmsimd_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008062 ":wasm_bench_microkernels",
8063 ":asm_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008064 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008065 x86_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008066 ":sse2_bench_microkernels",
8067 ":ssse3_bench_microkernels",
8068 ":sse41_bench_microkernels",
8069 ":avx_bench_microkernels",
Marat Dukhanf1a6ed32021-09-26 13:40:19 -07008070 ":f16c_bench_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008071 ":xop_bench_microkernels",
8072 ":fma3_bench_microkernels",
8073 ":avx2_bench_microkernels",
8074 ":avx512f_bench_microkernels",
8075 ":avx512skx_bench_microkernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008076 ],
8077)
8078
Marat Dukhan33fcf782020-05-24 14:27:15 -07008079xnnpack_aggregate_library(
Marat Dukhan2c724952021-07-27 18:46:30 -07008080 name = "prod_microkernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07008081 aarch32_ios_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008082 ":neon_prod_microkernels",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07008083 ":neonfp16_prod_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008084 ":neonfma_prod_microkernels",
8085 ":neonv8_prod_microkernels",
8086 ":asm_microkernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07008087 ],
8088 aarch32_nonios_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008089 ":neon_prod_microkernels",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07008090 ":neonfp16_prod_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008091 ":neonfma_prod_microkernels",
8092 ":neonv8_prod_microkernels",
8093 ":neondot_prod_microkernels",
8094 ":asm_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008095 ],
8096 aarch64_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008097 ":neon_prod_microkernels",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07008098 ":neonfp16_prod_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008099 ":neonfma_prod_microkernels",
8100 ":neonv8_prod_microkernels",
8101 ":neonfp16arith_prod_microkernels",
8102 ":neondot_prod_microkernels",
8103 ":asm_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008104 ],
8105 generic_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008106 ":scalar_prod_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008107 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07008108 wasm_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008109 ":wasm_prod_microkernels",
8110 ":asm_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008111 ],
Marat Dukhan19bfefe2021-12-21 19:16:06 -08008112 wasmrelaxedsimd_deps = [
8113 ":wasm_prod_microkernels",
8114 ":asm_microkernels",
8115 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07008116 wasmsimd_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008117 ":wasm_prod_microkernels",
8118 ":asm_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008119 ],
8120 x86_deps = [
Marat Dukhan2c724952021-07-27 18:46:30 -07008121 ":sse2_prod_microkernels",
8122 ":ssse3_prod_microkernels",
8123 ":sse41_prod_microkernels",
8124 ":avx_prod_microkernels",
Marat Dukhanf1a6ed32021-09-26 13:40:19 -07008125 ":f16c_prod_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008126 ":xop_prod_microkernels",
8127 ":fma3_prod_microkernels",
8128 ":avx2_prod_microkernels",
8129 ":avx512f_prod_microkernels",
8130 ":avx512skx_prod_microkernels",
8131 ],
8132)
8133
8134xnnpack_aggregate_library(
8135 name = "test_microkernels",
8136 aarch32_ios_deps = [
8137 ":neon_test_microkernels",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07008138 ":neonfp16_test_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008139 ":neonfma_test_microkernels",
8140 ":neonv8_test_microkernels",
8141 ":asm_microkernels",
8142 ],
8143 aarch32_nonios_deps = [
8144 ":neon_test_microkernels",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07008145 ":neonfp16_test_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008146 ":neonfma_test_microkernels",
8147 ":neonv8_test_microkernels",
8148 ":neondot_test_microkernels",
8149 ":asm_microkernels",
8150 ],
8151 aarch64_deps = [
8152 ":neon_test_microkernels",
Marat Dukhan8ff372c2021-09-28 14:43:17 -07008153 ":neonfp16_test_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008154 ":neonfma_test_microkernels",
8155 ":neonv8_test_microkernels",
8156 ":neonfp16arith_test_microkernels",
8157 ":neondot_test_microkernels",
8158 ":asm_microkernels",
8159 ],
8160 generic_deps = [
8161 ":scalar_test_microkernels",
8162 ],
8163 wasm_deps = [
8164 ":wasm_test_microkernels",
8165 ":asm_microkernels",
8166 ],
Marat Dukhan19bfefe2021-12-21 19:16:06 -08008167 wasmrelaxedsimd_deps = [
8168 ":wasm_test_microkernels",
8169 ":asm_microkernels",
8170 ],
Marat Dukhan2c724952021-07-27 18:46:30 -07008171 wasmsimd_deps = [
8172 ":wasm_test_microkernels",
8173 ":asm_microkernels",
8174 ],
8175 x86_deps = [
8176 ":sse2_test_microkernels",
8177 ":ssse3_test_microkernels",
8178 ":sse41_test_microkernels",
8179 ":avx_test_microkernels",
Marat Dukhanf1a6ed32021-09-26 13:40:19 -07008180 ":f16c_test_microkernels",
Marat Dukhan2c724952021-07-27 18:46:30 -07008181 ":xop_test_microkernels",
8182 ":fma3_test_microkernels",
8183 ":avx2_test_microkernels",
8184 ":avx512f_test_microkernels",
8185 ":avx512skx_test_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008186 ],
8187)
8188
Marat Dukhan08c4a432019-10-03 09:29:21 -07008189xnnpack_cc_library(
8190 name = "im2col",
8191 srcs = ["src/im2col.c"],
8192 hdrs = [
8193 "src/xnnpack/common.h",
8194 "src/xnnpack/im2col.h",
8195 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07008196 gcc_copts = xnnpack_gcc_std_copts(),
8197 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07008198)
8199
8200xnnpack_cc_library(
8201 name = "indirection",
8202 srcs = ["src/indirection.c"],
8203 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07008204 gcc_copts = xnnpack_gcc_std_copts(),
8205 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07008206 deps = [
8207 "@FP16",
8208 "@FXdiv",
8209 "@pthreadpool",
8210 ],
8211)
8212
8213xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07008214 name = "indirection_test_mode",
8215 srcs = ["src/indirection.c"],
8216 hdrs = INTERNAL_HDRS,
8217 copts = [
8218 "-UNDEBUG",
8219 "-DXNN_TEST_MODE=1",
8220 ],
8221 gcc_copts = xnnpack_gcc_std_copts(),
8222 msvc_copts = xnnpack_msvc_std_copts(),
8223 deps = [
8224 "@FP16",
8225 "@FXdiv",
8226 "@pthreadpool",
8227 ],
8228)
8229
8230xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07008231 name = "packing",
8232 srcs = ["src/packing.c"],
8233 hdrs = INTERNAL_HDRS,
8234 gcc_copts = xnnpack_gcc_std_copts(),
8235 msvc_copts = xnnpack_msvc_std_copts(),
8236 deps = [
8237 "@FP16",
8238 "@FXdiv",
8239 "@pthreadpool",
8240 ],
8241)
8242
8243xnnpack_cc_library(
8244 name = "packing_test_mode",
8245 srcs = ["src/packing.c"],
8246 hdrs = INTERNAL_HDRS,
8247 copts = [
8248 "-UNDEBUG",
8249 "-DXNN_TEST_MODE=1",
8250 ],
8251 gcc_copts = xnnpack_gcc_std_copts(),
8252 msvc_copts = xnnpack_msvc_std_copts(),
8253 deps = [
8254 "@FP16",
8255 "@FXdiv",
8256 "@pthreadpool",
8257 ],
8258)
8259
8260xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008261 name = "operator_run",
8262 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07008263 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07008264 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07008265 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
8266 "//conditions:default": [],
8267 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07008268 gcc_copts = xnnpack_gcc_std_copts(),
8269 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07008270 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07008271 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008272 "@FP16",
8273 "@FXdiv",
8274 "@clog",
8275 "@pthreadpool",
8276 ],
8277)
8278
Chao Mei6ddfc602020-05-13 22:29:36 -07008279xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07008280 name = "operator_run_test_mode",
8281 srcs = ["src/operator-run.c"],
8282 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
8283 copts = LOGGING_COPTS + [
8284 "-UNDEBUG",
8285 "-DXNN_TEST_MODE=1",
8286 ] + select({
8287 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
8288 "//conditions:default": [],
8289 }),
8290 gcc_copts = xnnpack_gcc_std_copts(),
8291 msvc_copts = xnnpack_msvc_std_copts(),
8292 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07008293 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008294 "@FP16",
8295 "@FXdiv",
8296 "@clog",
8297 "@pthreadpool",
8298 ],
8299)
8300
8301xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07008302 name = "memory_planner",
8303 srcs = ["src/memory-planner.c"],
8304 hdrs = INTERNAL_HDRS,
8305 defines = select({
8306 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
8307 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
8308 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
8309 }),
8310 gcc_copts = xnnpack_gcc_std_copts(),
8311 msvc_copts = xnnpack_msvc_std_copts(),
8312 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07008313 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07008314 "@pthreadpool",
8315 ],
8316)
8317
Marat Dukhan33fcf782020-05-24 14:27:15 -07008318xnnpack_cc_library(
8319 name = "memory_planner_test_mode",
8320 srcs = ["src/memory-planner.c"],
8321 hdrs = INTERNAL_HDRS,
8322 copts = [
8323 "-UNDEBUG",
8324 "-DXNN_TEST_MODE=1",
8325 ],
8326 defines = select({
8327 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
8328 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
8329 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
8330 }),
8331 gcc_copts = xnnpack_gcc_std_copts(),
8332 msvc_copts = xnnpack_msvc_std_copts(),
8333 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07008334 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008335 "@pthreadpool",
8336 ],
8337)
8338
Marat Dukhan08c4a432019-10-03 09:29:21 -07008339cc_library(
8340 name = "enable_assembly",
8341 defines = select({
8342 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
8343 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07008344 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008345 }),
8346)
8347
Marat Dukhan9de90e02020-06-18 16:04:12 -07008348cc_library(
8349 name = "enable_sparse",
8350 defines = select({
8351 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
8352 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08008353 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07008354 }),
8355)
8356
Marat Dukhancf056b22019-10-07 10:26:29 -07008357xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008358 name = "operators",
8359 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07008360 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008361 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07008362 ],
8363 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07008364 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07008365 "-Isrc",
8366 "-Iinclude",
8367 ] + select({
8368 ":debug_build": [],
8369 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07008370 }) + select({
8371 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
8372 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008373 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07008374 gcc_copts = xnnpack_gcc_std_copts(),
8375 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07008376 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07008377 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07008378 ":logging_utils",
Marat Dukhan1b1b0322021-09-27 14:23:23 -07008379 ":operator_run",
Marat Dukhanab582382020-07-06 13:32:08 -07008380 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008381 "@FP16",
8382 "@FXdiv",
8383 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008384 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008385 ],
8386)
8387
Marat Dukhan10a38082020-04-17 03:58:35 -07008388xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07008389 name = "operators_test_mode",
8390 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07008391 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008392 "src/operator-delete.c",
8393 ],
8394 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
8395 copts = LOGGING_COPTS + [
8396 "-Isrc",
8397 "-Iinclude",
8398 "-UNDEBUG",
8399 "-DXNN_TEST_MODE=1",
8400 ] + select({
8401 ":debug_build": [],
8402 "//conditions:default": xnnpack_min_size_copts(),
8403 }) + select({
8404 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
8405 "//conditions:default": [],
8406 }),
8407 gcc_copts = xnnpack_gcc_std_copts(),
8408 msvc_copts = xnnpack_msvc_std_copts(),
8409 deps = [
8410 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07008411 ":logging_utils",
Marat Dukhan1b1b0322021-09-27 14:23:23 -07008412 ":operator_run_test_mode",
Marat Dukhanab582382020-07-06 13:32:08 -07008413 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008414 "@FP16",
8415 "@FXdiv",
8416 "@clog",
8417 "@pthreadpool",
8418 ],
8419)
8420
8421xnnpack_cc_library(
Zhi An Ng6883abb2021-12-14 10:13:18 -08008422 name = "jit",
Zhi An Ngb559fe92021-12-06 09:25:38 -08008423 srcs = [
8424 "src/jit/aarch32-assembler.cc",
Zhi An Ng6883abb2021-12-14 10:13:18 -08008425 "src/jit/memory.c",
Zhi An Ngb559fe92021-12-06 09:25:38 -08008426 ],
Zhi An Ng6883abb2021-12-14 10:13:18 -08008427 hdrs = INTERNAL_HDRS + [
8428 "src/xnnpack/aarch32-assembler.h",
8429 ],
Zhi An Ngb43b47a2021-12-23 16:27:22 -08008430 aarch32_srcs = [
8431 "src/f32-gemm/4x8-aarch32-neon-cortex-a55.cc",
8432 ],
Zhi An Ng6883abb2021-12-14 10:13:18 -08008433 copts = LOGGING_COPTS,
8434 msvc_copts = xnnpack_msvc_std_copts(),
8435 deps = [
8436 ":logging_utils",
8437 ],
8438)
8439
8440xnnpack_cc_library(
8441 name = "jit_test_mode",
8442 srcs = [
8443 "src/jit/aarch32-assembler.cc",
8444 "src/jit/memory.c",
8445 ],
8446 hdrs = INTERNAL_HDRS + [
8447 "src/xnnpack/aarch32-assembler.h",
8448 ],
8449 copts = LOGGING_COPTS + [
8450 "-UNDEBUG",
8451 "-DXNN_TEST_MODE=1",
8452 ],
8453 msvc_copts = xnnpack_msvc_std_copts(),
8454 deps = [
8455 ":logging_utils",
8456 ],
Zhi An Ngb559fe92021-12-06 09:25:38 -08008457)
8458
8459xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008460 name = "XNNPACK",
8461 srcs = [
8462 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08008463 "src/runtime.c",
8464 "src/subgraph.c",
8465 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07008466 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07008467 hdrs = ["include/xnnpack.h"],
8468 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008469 "-Isrc",
8470 "-Iinclude",
8471 ] + select({
8472 ":debug_build": [],
8473 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07008474 }) + select({
8475 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
8476 "//conditions:default": [],
Marat Dukhan1ce78ab2021-09-03 17:37:51 -07008477 }) + select({
8478 ":xnn_wasmsimd_version_m87": [
8479 "-DXNN_WASMSIMD_VERSION=87",
8480 ],
8481 ":xnn_wasmsimd_version_m88": [
8482 "-DXNN_WASMSIMD_VERSION=88",
8483 ],
8484 ":xnn_wasmsimd_version_m91": [
8485 "-DXNN_WASMSIMD_VERSION=91",
8486 ],
8487 "//conditions:default": [
8488 "-DXNN_WASMSIMD_VERSION=87",
8489 ],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008490 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07008491 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008492 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07008493 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008494 visibility = xnnpack_visibility(),
8495 deps = [
8496 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07008497 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07008498 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07008499 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008500 ":operators",
Marat Dukhan2c724952021-07-27 18:46:30 -07008501 ":prod_microkernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008502 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07008503 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008504 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07008505 ] + select({
8506 ":emscripten": [],
8507 "//conditions:default": ["@cpuinfo"],
8508 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07008509)
8510
Marat Dukhan10a38082020-04-17 03:58:35 -07008511xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07008512 name = "XNNPACK_test_mode",
8513 srcs = [
8514 "src/init.c",
8515 "src/runtime.c",
8516 "src/subgraph.c",
8517 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07008518 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07008519 hdrs = ["include/xnnpack.h"],
8520 copts = LOGGING_COPTS + [
8521 "-Isrc",
8522 "-Iinclude",
8523 "-UNDEBUG",
8524 "-DXNN_TEST_MODE=1",
8525 ] + select({
8526 ":debug_build": [],
8527 "//conditions:default": xnnpack_min_size_copts(),
8528 }) + select({
8529 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
8530 "//conditions:default": [],
Marat Dukhan1ce78ab2021-09-03 17:37:51 -07008531 }) + select({
8532 ":xnn_wasmsimd_version_m87": [
8533 "-DXNN_WASMSIMD_VERSION=87",
8534 ],
8535 ":xnn_wasmsimd_version_m88": [
8536 "-DXNN_WASMSIMD_VERSION=88",
8537 ],
8538 ":xnn_wasmsimd_version_m91": [
8539 "-DXNN_WASMSIMD_VERSION=91",
8540 ],
8541 "//conditions:default": [
8542 "-DXNN_WASMSIMD_VERSION=87",
8543 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07008544 }),
8545 gcc_copts = xnnpack_gcc_std_copts(),
8546 includes = ["include"],
8547 msvc_copts = xnnpack_msvc_std_copts(),
8548 visibility = xnnpack_visibility(),
8549 deps = [
8550 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07008551 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07008552 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008553 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008554 ":operators_test_mode",
Marat Dukhan2c724952021-07-27 18:46:30 -07008555 ":test_microkernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07008556 "@clog",
8557 "@FP16",
8558 "@pthreadpool",
8559 ] + select({
8560 ":emscripten": [],
8561 "//conditions:default": ["@cpuinfo"],
8562 }),
8563)
8564
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008565# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
8566# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07008567xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008568 name = "xnnpack_for_tflite",
8569 srcs = [
8570 "src/init.c",
8571 "src/runtime.c",
8572 "src/subgraph.c",
8573 "src/tensor.c",
8574 ] + SUBGRAPH_SRCS,
8575 hdrs = ["include/xnnpack.h"],
8576 copts = LOGGING_COPTS + [
8577 "-Isrc",
8578 "-Iinclude",
8579 ] + select({
8580 ":debug_build": [],
8581 "//conditions:default": xnnpack_min_size_copts(),
8582 }) + select({
8583 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
8584 "//conditions:default": [],
8585 }),
Marat Dukhan9e924512021-12-08 00:13:45 -08008586 defines = select({
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008587 ":xnn_enable_qu8_explicit_true": [],
8588 ":xnn_enable_qu8_explicit_false": [
8589 "XNN_NO_QU8_OPERATORS",
Marat Dukhan0d00baa2021-08-16 23:59:07 -07008590 "XNN_NO_U8_OPERATORS",
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008591 ],
Marat Dukhan6507b172021-08-19 03:23:40 -07008592 ":emscripten": [],
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008593 "//conditions:default": [
8594 "XNN_NO_QU8_OPERATORS",
Marat Dukhan0d00baa2021-08-16 23:59:07 -07008595 "XNN_NO_U8_OPERATORS",
Marat Dukhan8c8c1592021-07-13 13:59:02 -07008596 ],
Marat Dukhan189c1d02021-09-03 15:39:54 -07008597 }) + select({
8598 ":xnn_wasmsimd_version_m87": [
8599 "XNN_WASMSIMD_VERSION=87",
8600 ],
8601 ":xnn_wasmsimd_version_m88": [
8602 "XNN_WASMSIMD_VERSION=88",
8603 ],
8604 ":xnn_wasmsimd_version_m91": [
8605 "XNN_WASMSIMD_VERSION=91",
8606 ],
8607 "//conditions:default": [
8608 "XNN_WASMSIMD_VERSION=87",
8609 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008610 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008611 gcc_copts = xnnpack_gcc_std_copts(),
8612 includes = ["include"],
8613 msvc_copts = xnnpack_msvc_std_copts(),
8614 visibility = xnnpack_visibility(),
8615 deps = [
8616 ":enable_assembly",
8617 ":enable_sparse",
8618 ":logging_utils",
8619 ":memory_planner",
8620 ":operator_run",
8621 ":operators",
Marat Dukhan51c61342021-12-22 23:08:39 -08008622 ":amalgam_microkernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07008623 "@clog",
8624 "@FP16",
8625 "@pthreadpool",
8626 ] + select({
8627 ":emscripten": [],
8628 "//conditions:default": ["@cpuinfo"],
8629 }),
8630)
8631
8632# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
8633# not used by the TensorFlow.js WebAssembly backend to minimize code size.
8634xnnpack_cc_library(
8635 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008636 srcs = [
8637 "src/init.c",
8638 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07008639 hdrs = ["include/xnnpack.h"],
8640 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008641 "-Isrc",
8642 "-Iinclude",
8643 ] + select({
8644 ":debug_build": [],
8645 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07008646 }) + select({
8647 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
8648 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008649 }),
8650 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07008651 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07008652 "XNN_NO_QU8_OPERATORS",
Marat Dukhan23147532021-08-16 07:26:56 -07008653 "XNN_NO_S8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008654 "XNN_NO_U8_OPERATORS",
8655 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08008656 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008657 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07008658 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07008659 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07008660 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07008661 visibility = xnnpack_visibility(),
8662 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008663 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07008664 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008665 ":operator_run",
8666 ":operators",
Marat Dukhan2c724952021-07-27 18:46:30 -07008667 ":prod_microkernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008668 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008669 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07008670 ] + select({
8671 ":emscripten": [],
8672 "//conditions:default": ["@cpuinfo"],
8673 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07008674)
8675
Marat Dukhancf056b22019-10-07 10:26:29 -07008676xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008677 name = "bench_utils",
8678 srcs = ["bench/utils.cc"],
8679 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08008680 deps = [
8681 "@com_google_benchmark//:benchmark",
8682 "@cpuinfo",
8683 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008684)
8685
Frank Barchard7e955972019-10-11 10:34:25 -07008686######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07008687
8688xnnpack_benchmark(
Marat Dukhan0744fa02021-07-26 22:56:27 -07008689 name = "qs8_dwconv_bench",
8690 srcs = [
8691 "bench/dwconv.h",
8692 "bench/qs8-dwconv.cc",
8693 "src/xnnpack/AlignedAllocator.h",
8694 ] + MICROKERNEL_BENCHMARK_HDRS,
8695 deps = MICROKERNEL_BENCHMARK_DEPS + [
8696 ":indirection",
8697 ":packing",
8698 ],
8699)
8700
8701xnnpack_benchmark(
Marat Dukhanad6f2dc2021-12-10 14:38:41 -08008702 name = "qs8_f32_vcvt_bench",
8703 srcs = [
8704 "bench/qs8-f32-vcvt.cc",
8705 "src/xnnpack/AlignedAllocator.h",
8706 ] + MICROKERNEL_BENCHMARK_HDRS,
8707 deps = MICROKERNEL_BENCHMARK_DEPS,
8708)
8709
8710xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07008711 name = "qs8_gemm_bench",
8712 srcs = [
8713 "bench/gemm.h",
8714 "bench/qs8-gemm.cc",
8715 "src/xnnpack/AlignedAllocator.h",
8716 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07008717 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
8718 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07008719)
8720
8721xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07008722 name = "qs8_requantization_bench",
8723 srcs = [
8724 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07008725 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07008726 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07008727 ] + MICROKERNEL_BENCHMARK_HDRS,
8728 deps = MICROKERNEL_BENCHMARK_DEPS,
8729)
8730
8731xnnpack_benchmark(
Marat Dukhan83a8d2f2021-07-29 16:41:19 -07008732 name = "qs8_vadd_bench",
8733 srcs = [
8734 "bench/qs8-vadd.cc",
8735 "src/xnnpack/AlignedAllocator.h",
8736 ] + MICROKERNEL_BENCHMARK_HDRS,
8737 deps = MICROKERNEL_BENCHMARK_DEPS,
8738)
8739
8740xnnpack_benchmark(
8741 name = "qs8_vaddc_bench",
8742 srcs = [
8743 "bench/qs8-vaddc.cc",
8744 "src/xnnpack/AlignedAllocator.h",
8745 ] + MICROKERNEL_BENCHMARK_HDRS,
8746 deps = MICROKERNEL_BENCHMARK_DEPS,
8747)
8748
8749xnnpack_benchmark(
Marat Dukhan795e5ab2021-08-02 19:07:52 -07008750 name = "qs8_vmul_bench",
8751 srcs = [
8752 "bench/qs8-vmul.cc",
8753 "src/xnnpack/AlignedAllocator.h",
8754 ] + MICROKERNEL_BENCHMARK_HDRS,
8755 deps = MICROKERNEL_BENCHMARK_DEPS,
8756)
8757
8758xnnpack_benchmark(
Marat Dukhan8b024c92021-08-03 00:05:14 -07008759 name = "qs8_vmulc_bench",
8760 srcs = [
8761 "bench/qs8-vmulc.cc",
8762 "src/xnnpack/AlignedAllocator.h",
8763 ] + MICROKERNEL_BENCHMARK_HDRS,
8764 deps = MICROKERNEL_BENCHMARK_DEPS,
8765)
8766
8767xnnpack_benchmark(
Marat Dukhanad6f2dc2021-12-10 14:38:41 -08008768 name = "qu8_f32_vcvt_bench",
8769 srcs = [
8770 "bench/qu8-f32-vcvt.cc",
8771 "src/xnnpack/AlignedAllocator.h",
8772 ] + MICROKERNEL_BENCHMARK_HDRS,
8773 deps = MICROKERNEL_BENCHMARK_DEPS,
8774)
8775
8776xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07008777 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008778 srcs = [
8779 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07008780 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008781 "src/xnnpack/AlignedAllocator.h",
8782 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07008783 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07008784 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07008785)
8786
8787xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07008788 name = "qu8_requantization_bench",
8789 srcs = [
8790 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07008791 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07008792 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07008793 ] + MICROKERNEL_BENCHMARK_HDRS,
8794 deps = MICROKERNEL_BENCHMARK_DEPS,
8795)
8796
8797xnnpack_benchmark(
Marat Dukhan1ef9de82021-07-29 17:15:33 -07008798 name = "qu8_vadd_bench",
8799 srcs = [
8800 "bench/qu8-vadd.cc",
8801 "src/xnnpack/AlignedAllocator.h",
8802 ] + MICROKERNEL_BENCHMARK_HDRS,
8803 deps = MICROKERNEL_BENCHMARK_DEPS,
8804)
8805
8806xnnpack_benchmark(
8807 name = "qu8_vaddc_bench",
8808 srcs = [
8809 "bench/qu8-vaddc.cc",
8810 "src/xnnpack/AlignedAllocator.h",
8811 ] + MICROKERNEL_BENCHMARK_HDRS,
8812 deps = MICROKERNEL_BENCHMARK_DEPS,
8813)
8814
8815xnnpack_benchmark(
Marat Dukhan795e5ab2021-08-02 19:07:52 -07008816 name = "qu8_vmul_bench",
8817 srcs = [
8818 "bench/qu8-vmul.cc",
8819 "src/xnnpack/AlignedAllocator.h",
8820 ] + MICROKERNEL_BENCHMARK_HDRS,
8821 deps = MICROKERNEL_BENCHMARK_DEPS,
8822)
8823
8824xnnpack_benchmark(
Marat Dukhan8b024c92021-08-03 00:05:14 -07008825 name = "qu8_vmulc_bench",
8826 srcs = [
8827 "bench/qu8-vmulc.cc",
8828 "src/xnnpack/AlignedAllocator.h",
8829 ] + MICROKERNEL_BENCHMARK_HDRS,
8830 deps = MICROKERNEL_BENCHMARK_DEPS,
8831)
8832
8833xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07008834 name = "f16_igemm_bench",
8835 srcs = [
8836 "bench/f16-igemm.cc",
8837 "bench/conv.h",
Frank Barchard40d20fe2020-05-05 00:37:45 -07008838 "src/xnnpack/AlignedAllocator.h",
8839 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008840 deps = MICROKERNEL_BENCHMARK_DEPS + [
8841 ":indirection",
8842 ":packing",
8843 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07008844)
8845
8846xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008847 name = "f16_gemm_bench",
8848 srcs = [
8849 "bench/f16-gemm.cc",
8850 "bench/gemm.h",
8851 "src/xnnpack/AlignedAllocator.h",
8852 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008853 deps = MICROKERNEL_BENCHMARK_DEPS + [
8854 ":packing",
8855 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008856)
8857
8858xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08008859 name = "f16_spmm_bench",
8860 srcs = [
8861 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08008862 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08008863 "src/xnnpack/AlignedAllocator.h",
8864 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08008865 deps = MICROKERNEL_BENCHMARK_DEPS,
8866)
8867
8868xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07008869 name = "f16_vrelu_bench",
8870 srcs = [
8871 "bench/f16-vrelu.cc",
8872 "src/xnnpack/AlignedAllocator.h",
8873 ] + MICROKERNEL_BENCHMARK_HDRS,
8874 deps = MICROKERNEL_BENCHMARK_DEPS,
8875)
8876
8877xnnpack_benchmark(
Marat Dukhan434352f2021-10-16 18:28:55 -07008878 name = "f16_f32_vcvt_bench",
8879 srcs = [
8880 "bench/f16-f32-vcvt.cc",
8881 "src/xnnpack/AlignedAllocator.h",
8882 ] + MICROKERNEL_BENCHMARK_HDRS,
8883 deps = MICROKERNEL_BENCHMARK_DEPS,
8884)
8885
8886xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008887 name = "f32_igemm_bench",
8888 srcs = [
8889 "bench/f32-igemm.cc",
8890 "bench/conv.h",
8891 "src/xnnpack/AlignedAllocator.h",
8892 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008893 deps = MICROKERNEL_BENCHMARK_DEPS + [
8894 ":indirection",
8895 ":packing",
8896 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008897)
8898
8899xnnpack_benchmark(
8900 name = "f32_conv_hwc_bench",
8901 srcs = [
8902 "bench/f32-conv-hwc.cc",
8903 "bench/dconv.h",
8904 "src/xnnpack/AlignedAllocator.h",
8905 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008906 deps = MICROKERNEL_BENCHMARK_DEPS + [
8907 ":packing",
8908 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008909)
8910
8911xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07008912 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07008913 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07008914 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07008915 "bench/dconv.h",
8916 "src/xnnpack/AlignedAllocator.h",
8917 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008918 deps = MICROKERNEL_BENCHMARK_DEPS + [
8919 ":packing",
8920 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07008921)
8922
8923xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07008924 name = "f16_dwconv_bench",
8925 srcs = [
8926 "bench/f16-dwconv.cc",
8927 "bench/dwconv.h",
Frank Barchard5a599a62020-06-04 20:12:44 -07008928 "src/xnnpack/AlignedAllocator.h",
8929 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008930 deps = MICROKERNEL_BENCHMARK_DEPS + [
8931 ":indirection",
8932 ":packing",
8933 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07008934)
8935
8936xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008937 name = "f32_dwconv_bench",
8938 srcs = [
8939 "bench/f32-dwconv.cc",
8940 "bench/dwconv.h",
8941 "src/xnnpack/AlignedAllocator.h",
8942 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008943 deps = MICROKERNEL_BENCHMARK_DEPS + [
8944 ":indirection",
8945 ":packing",
8946 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008947)
8948
8949xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07008950 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008951 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07008952 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008953 "bench/dwconv.h",
8954 "src/xnnpack/AlignedAllocator.h",
8955 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07008956 deps = MICROKERNEL_BENCHMARK_DEPS + [
8957 ":indirection",
8958 ":packing",
8959 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07008960)
8961
8962xnnpack_benchmark(
Marat Dukhand77f77d2021-10-24 15:39:59 -07008963 name = "f32_f16_vcvt_bench",
8964 srcs = [
8965 "bench/f32-f16-vcvt.cc",
8966 "src/xnnpack/AlignedAllocator.h",
8967 ] + MICROKERNEL_BENCHMARK_HDRS,
8968 deps = MICROKERNEL_BENCHMARK_DEPS,
8969)
8970
8971xnnpack_benchmark(
Alan Kellyfda06cb2021-12-15 03:30:32 -08008972 name = "x32_transpose_bench",
8973 srcs = [
8974 "bench/x32-transpose.cc",
8975 "src/xnnpack/AlignedAllocator.h",
8976 ] + MICROKERNEL_BENCHMARK_HDRS,
8977 deps = MICROKERNEL_BENCHMARK_DEPS,
8978)
8979
8980xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008981 name = "f32_gemm_bench",
8982 srcs = [
8983 "bench/f32-gemm.cc",
8984 "bench/gemm.h",
8985 "src/xnnpack/AlignedAllocator.h",
8986 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07008987 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07008988 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07008989)
8990
8991xnnpack_benchmark(
Marat Dukhan563eee12021-12-02 14:44:25 -08008992 name = "f32_qs8_vcvt_bench",
8993 srcs = [
8994 "bench/f32-qs8-vcvt.cc",
8995 "src/xnnpack/AlignedAllocator.h",
8996 ] + MICROKERNEL_BENCHMARK_HDRS,
8997 deps = MICROKERNEL_BENCHMARK_DEPS,
8998)
8999
9000xnnpack_benchmark(
9001 name = "f32_qu8_vcvt_bench",
9002 srcs = [
9003 "bench/f32-qu8-vcvt.cc",
9004 "src/xnnpack/AlignedAllocator.h",
9005 ] + MICROKERNEL_BENCHMARK_HDRS,
9006 deps = MICROKERNEL_BENCHMARK_DEPS,
9007)
9008
9009xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08009010 name = "f32_raddexpminusmax_bench",
9011 srcs = [
9012 "bench/f32-raddexpminusmax.cc",
9013 "src/xnnpack/AlignedAllocator.h",
9014 ] + MICROKERNEL_BENCHMARK_HDRS,
9015 deps = MICROKERNEL_BENCHMARK_DEPS,
9016)
9017
9018xnnpack_benchmark(
9019 name = "f32_raddextexp_bench",
9020 srcs = [
9021 "bench/f32-raddextexp.cc",
9022 "src/xnnpack/AlignedAllocator.h",
9023 ] + MICROKERNEL_BENCHMARK_HDRS,
9024 deps = MICROKERNEL_BENCHMARK_DEPS,
9025)
9026
9027xnnpack_benchmark(
9028 name = "f32_raddstoreexpminusmax_bench",
9029 srcs = [
9030 "bench/f32-raddstoreexpminusmax.cc",
9031 "src/xnnpack/AlignedAllocator.h",
9032 ] + MICROKERNEL_BENCHMARK_HDRS,
9033 deps = MICROKERNEL_BENCHMARK_DEPS,
9034)
9035
9036xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07009037 name = "f32_rmax_bench",
9038 srcs = [
9039 "bench/f32-rmax.cc",
9040 "src/xnnpack/AlignedAllocator.h",
9041 ] + MICROKERNEL_BENCHMARK_HDRS,
9042 deps = MICROKERNEL_BENCHMARK_DEPS,
9043)
9044
9045xnnpack_benchmark(
9046 name = "f32_spmm_bench",
9047 srcs = [
9048 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08009049 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07009050 "src/xnnpack/AlignedAllocator.h",
9051 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07009052 deps = MICROKERNEL_BENCHMARK_DEPS,
9053)
9054
9055xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08009056 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07009057 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08009058 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07009059 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07009060 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08009061 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07009062)
9063
9064xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08009065 name = "f32_velu_bench",
9066 srcs = [
9067 "bench/f32-velu.cc",
9068 "src/xnnpack/AlignedAllocator.h",
9069 ] + MICROKERNEL_BENCHMARK_HDRS,
9070 deps = MICROKERNEL_BENCHMARK_DEPS,
9071)
9072
9073xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07009074 name = "f32_vhswish_bench",
9075 srcs = [
9076 "bench/f32-vhswish.cc",
9077 "src/xnnpack/AlignedAllocator.h",
9078 ] + MICROKERNEL_BENCHMARK_HDRS,
9079 deps = MICROKERNEL_BENCHMARK_DEPS,
9080)
9081
9082xnnpack_benchmark(
Marat Dukhan7c74aff2021-08-07 15:44:27 -07009083 name = "f32_vlrelu_bench",
9084 srcs = [
9085 "bench/f32-vlrelu.cc",
9086 "src/xnnpack/AlignedAllocator.h",
9087 ] + MICROKERNEL_BENCHMARK_HDRS,
9088 deps = MICROKERNEL_BENCHMARK_DEPS,
9089)
9090
9091xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07009092 name = "f32_vrelu_bench",
9093 srcs = [
9094 "bench/f32-vrelu.cc",
9095 "src/xnnpack/AlignedAllocator.h",
9096 ] + MICROKERNEL_BENCHMARK_HDRS,
9097 deps = MICROKERNEL_BENCHMARK_DEPS,
9098)
9099
9100xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08009101 name = "f32_vscaleexpminusmax_bench",
9102 srcs = [
9103 "bench/f32-vscaleexpminusmax.cc",
9104 "src/xnnpack/AlignedAllocator.h",
9105 ] + MICROKERNEL_BENCHMARK_HDRS,
9106 deps = MICROKERNEL_BENCHMARK_DEPS,
9107)
9108
9109xnnpack_benchmark(
9110 name = "f32_vscaleextexp_bench",
9111 srcs = [
9112 "bench/f32-vscaleextexp.cc",
9113 "src/xnnpack/AlignedAllocator.h",
9114 ] + MICROKERNEL_BENCHMARK_HDRS,
9115 deps = MICROKERNEL_BENCHMARK_DEPS,
9116)
9117
9118xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07009119 name = "f32_vsigmoid_bench",
9120 srcs = [
9121 "bench/f32-vsigmoid.cc",
9122 "src/xnnpack/AlignedAllocator.h",
9123 ] + MICROKERNEL_BENCHMARK_HDRS,
9124 deps = MICROKERNEL_BENCHMARK_DEPS,
9125)
9126
9127xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07009128 name = "f32_vsqrt_bench",
9129 srcs = [
9130 "bench/f32-vsqrt.cc",
9131 "src/xnnpack/AlignedAllocator.h",
9132 ] + MICROKERNEL_BENCHMARK_HDRS,
9133 deps = MICROKERNEL_BENCHMARK_DEPS,
9134)
9135
9136xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07009137 name = "f32_im2col_gemm_bench",
9138 srcs = [
9139 "bench/f32-im2col-gemm.cc",
9140 "bench/conv.h",
9141 "src/xnnpack/AlignedAllocator.h",
9142 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07009143 deps = MICROKERNEL_BENCHMARK_DEPS + [
9144 ":im2col",
9145 ":packing",
9146 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07009147)
9148
Marat Dukhanfe7acb62020-03-09 19:30:05 -07009149xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07009150 name = "rounding_bench",
9151 srcs = [
9152 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07009153 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07009154 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07009155 ] + MICROKERNEL_BENCHMARK_HDRS,
9156 deps = MICROKERNEL_BENCHMARK_DEPS,
9157)
9158
Marat Dukhan54074372021-09-08 23:28:46 -07009159xnnpack_benchmark(
9160 name = "x8_lut_bench",
9161 srcs = [
9162 "bench/x8-lut.cc",
9163 "src/xnnpack/AlignedAllocator.h",
9164 ] + MICROKERNEL_BENCHMARK_HDRS,
9165 deps = MICROKERNEL_BENCHMARK_DEPS,
9166)
9167
Marat Dukhan08c4a432019-10-03 09:29:21 -07009168########################### Benchmarks for operators ###########################
9169
9170xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07009171 name = "average_pooling_bench",
9172 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07009173 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07009174 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07009175 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07009176)
9177
9178xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07009179 name = "bankers_rounding_bench",
9180 srcs = ["bench/bankers-rounding.cc"],
9181 copts = xnnpack_optional_tflite_copts(),
9182 tags = ["nowin32"],
9183 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
9184)
9185
9186xnnpack_benchmark(
9187 name = "ceiling_bench",
9188 srcs = ["bench/ceiling.cc"],
9189 copts = xnnpack_optional_tflite_copts(),
9190 tags = ["nowin32"],
9191 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
9192)
9193
9194xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07009195 name = "channel_shuffle_bench",
9196 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07009197 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07009198)
9199
9200xnnpack_benchmark(
Marat Dukhan710fb422021-12-13 16:32:26 -08009201 name = "convert_bench",
9202 srcs = [
9203 "bench/convert.cc",
9204 ],
9205 copts = xnnpack_optional_tflite_copts(),
9206 tags = ["nowin32"],
9207 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
9208)
9209
9210xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07009211 name = "convolution_bench",
9212 srcs = ["bench/convolution.cc"],
9213 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07009214 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07009215 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07009216)
9217
9218xnnpack_benchmark(
9219 name = "deconvolution_bench",
9220 srcs = ["bench/deconvolution.cc"],
9221 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07009222 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07009223 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07009224)
9225
9226xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08009227 name = "elu_bench",
9228 srcs = ["bench/elu.cc"],
9229 copts = xnnpack_optional_tflite_copts(),
9230 tags = ["nowin32"],
9231 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
9232)
9233
9234xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07009235 name = "floor_bench",
9236 srcs = ["bench/floor.cc"],
9237 copts = xnnpack_optional_tflite_copts(),
9238 tags = ["nowin32"],
9239 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
9240)
9241
9242xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07009243 name = "global_average_pooling_bench",
9244 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07009245 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07009246)
9247
9248xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07009249 name = "hardswish_bench",
9250 srcs = ["bench/hardswish.cc"],
9251 copts = xnnpack_optional_tflite_copts(),
9252 tags = ["nowin32"],
9253 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
9254)
9255
9256xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07009257 name = "max_pooling_bench",
9258 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07009259 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07009260)
9261
9262xnnpack_benchmark(
9263 name = "sigmoid_bench",
9264 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08009265 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07009266 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07009267 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07009268)
9269
9270xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07009271 name = "prelu_bench",
9272 srcs = ["bench/prelu.cc"],
9273 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07009274 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07009275 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07009276)
9277
9278xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08009279 name = "softmax_bench",
9280 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08009281 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07009282 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07009283 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07009284)
9285
Marat Dukhan87727142020-06-24 15:24:10 -07009286xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07009287 name = "square_root_bench",
9288 srcs = ["bench/square-root.cc"],
9289 copts = xnnpack_optional_tflite_copts(),
9290 tags = ["nowin32"],
9291 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
9292)
9293
9294xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07009295 name = "truncation_bench",
9296 srcs = ["bench/truncation.cc"],
9297 deps = OPERATOR_BENCHMARK_DEPS,
9298)
9299
Marat Dukhanc068bb62019-10-04 13:24:39 -07009300############################# End-to-end benchmarks ############################
9301
9302cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07009303 name = "fp32_mobilenet_v1",
9304 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07009305 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08009306 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07009307 linkstatic = True,
9308 deps = [
9309 ":XNNPACK",
9310 "@pthreadpool",
9311 ],
9312)
9313
9314cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08009315 name = "fp32_sparse_mobilenet_v1",
9316 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
9317 hdrs = ["models/models.h"],
9318 copts = xnnpack_std_cxxopts(),
9319 linkstatic = True,
9320 deps = [
9321 ":XNNPACK",
9322 "@pthreadpool",
9323 ],
9324)
9325
9326cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07009327 name = "fp16_mobilenet_v1",
9328 srcs = ["models/fp16-mobilenet-v1.cc"],
9329 hdrs = ["models/models.h"],
9330 copts = xnnpack_std_cxxopts(),
9331 linkstatic = True,
9332 deps = [
9333 ":XNNPACK",
9334 "@FP16",
9335 "@pthreadpool",
9336 ],
9337)
9338
9339cc_library(
Marat Dukhane252f922021-08-31 08:57:41 -07009340 name = "qc8_mobilenet_v1",
9341 srcs = ["models/qc8-mobilenet-v1.cc"],
9342 hdrs = ["models/models.h"],
9343 copts = xnnpack_std_cxxopts(),
9344 linkstatic = True,
9345 deps = [
9346 ":XNNPACK",
9347 "@pthreadpool",
9348 ],
9349)
9350
9351cc_library(
9352 name = "qc8_mobilenet_v2",
9353 srcs = ["models/qc8-mobilenet-v2.cc"],
9354 hdrs = ["models/models.h"],
9355 copts = xnnpack_std_cxxopts(),
9356 linkstatic = True,
9357 deps = [
9358 ":XNNPACK",
9359 "@pthreadpool",
9360 ],
9361)
9362
9363cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07009364 name = "qs8_mobilenet_v1",
9365 srcs = ["models/qs8-mobilenet-v1.cc"],
9366 hdrs = ["models/models.h"],
9367 copts = xnnpack_std_cxxopts(),
9368 linkstatic = True,
9369 deps = [
9370 ":XNNPACK",
9371 "@pthreadpool",
9372 ],
9373)
9374
9375cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07009376 name = "qs8_mobilenet_v2",
9377 srcs = ["models/qs8-mobilenet-v2.cc"],
9378 hdrs = ["models/models.h"],
9379 copts = xnnpack_std_cxxopts(),
9380 linkstatic = True,
9381 deps = [
9382 ":XNNPACK",
9383 "@pthreadpool",
9384 ],
9385)
9386
9387cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08009388 name = "qu8_mobilenet_v1",
9389 srcs = ["models/qu8-mobilenet-v1.cc"],
9390 hdrs = ["models/models.h"],
9391 copts = xnnpack_std_cxxopts(),
9392 linkstatic = True,
9393 deps = [
9394 ":XNNPACK",
9395 "@pthreadpool",
9396 ],
9397)
9398
9399cc_library(
Marat Dukhan036b2b12021-07-21 01:12:58 -07009400 name = "qu8_mobilenet_v2",
9401 srcs = ["models/qu8-mobilenet-v2.cc"],
9402 hdrs = ["models/models.h"],
9403 copts = xnnpack_std_cxxopts(),
9404 linkstatic = True,
9405 deps = [
9406 ":XNNPACK",
9407 "@pthreadpool",
9408 ],
9409)
9410
9411cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07009412 name = "fp32_mobilenet_v2",
9413 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07009414 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08009415 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07009416 linkstatic = True,
9417 deps = [
9418 ":XNNPACK",
9419 "@pthreadpool",
9420 ],
9421)
9422
Marat Dukhanc08cdf52019-12-09 09:17:51 -08009423cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08009424 name = "fp32_sparse_mobilenet_v2",
9425 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
9426 hdrs = ["models/models.h"],
9427 copts = xnnpack_std_cxxopts(),
9428 linkstatic = True,
9429 deps = [
9430 ":XNNPACK",
9431 "@pthreadpool",
9432 ],
9433)
9434
9435cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07009436 name = "fp16_mobilenet_v2",
9437 srcs = ["models/fp16-mobilenet-v2.cc"],
9438 hdrs = ["models/models.h"],
9439 copts = xnnpack_std_cxxopts(),
9440 linkstatic = True,
9441 deps = [
9442 ":XNNPACK",
9443 "@FP16",
9444 "@pthreadpool",
9445 ],
9446)
9447
9448cc_library(
9449 name = "fp32_mobilenet_v3_large",
9450 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08009451 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08009452 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08009453 linkstatic = True,
9454 deps = [
9455 ":XNNPACK",
9456 "@pthreadpool",
9457 ],
9458)
9459
9460cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08009461 name = "fp32_sparse_mobilenet_v3_large",
9462 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
9463 hdrs = ["models/models.h"],
9464 copts = xnnpack_std_cxxopts(),
9465 linkstatic = True,
9466 deps = [
9467 ":XNNPACK",
9468 "@pthreadpool",
9469 ],
9470)
9471
9472cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07009473 name = "fp16_mobilenet_v3_large",
9474 srcs = ["models/fp16-mobilenet-v3-large.cc"],
9475 hdrs = ["models/models.h"],
9476 copts = xnnpack_std_cxxopts(),
9477 linkstatic = True,
9478 deps = [
9479 ":XNNPACK",
9480 "@FP16",
9481 "@pthreadpool",
9482 ],
9483)
9484
9485cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07009486 name = "fp32_mobilenet_v3_small",
9487 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08009488 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08009489 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08009490 linkstatic = True,
9491 deps = [
9492 ":XNNPACK",
9493 "@pthreadpool",
9494 ],
9495)
9496
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07009497cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08009498 name = "fp32_sparse_mobilenet_v3_small",
9499 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
9500 hdrs = ["models/models.h"],
9501 copts = xnnpack_std_cxxopts(),
9502 linkstatic = True,
9503 deps = [
9504 ":XNNPACK",
9505 "@pthreadpool",
9506 ],
9507)
9508
9509cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07009510 name = "fp16_mobilenet_v3_small",
9511 srcs = ["models/fp16-mobilenet-v3-small.cc"],
9512 hdrs = ["models/models.h"],
9513 copts = xnnpack_std_cxxopts(),
9514 linkstatic = True,
9515 deps = [
9516 ":XNNPACK",
9517 "@FP16",
9518 "@pthreadpool",
9519 ],
9520)
9521
Marat Dukhanc068bb62019-10-04 13:24:39 -07009522xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07009523 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08009524 srcs = [
9525 "bench/f32-dwconv-e2e.cc",
9526 "bench/end2end.h",
9527 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07009528 deps = MICROKERNEL_BENCHMARK_DEPS + [
9529 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07009530 ":fp32_mobilenet_v1",
9531 ":fp32_mobilenet_v2",
9532 ":fp32_mobilenet_v3_large",
9533 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07009534 ],
9535)
9536
9537xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07009538 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08009539 srcs = [
9540 "bench/f32-gemm-e2e.cc",
9541 "bench/end2end.h",
9542 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07009543 deps = MICROKERNEL_BENCHMARK_DEPS + [
9544 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07009545 ":fp32_mobilenet_v1",
9546 ":fp32_mobilenet_v2",
9547 ":fp32_mobilenet_v3_large",
9548 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07009549 ],
9550)
9551
9552xnnpack_benchmark(
Marat Dukhanbbfc6d32021-07-26 18:31:02 -07009553 name = "qs8_dwconv_e2e_bench",
9554 srcs = [
9555 "bench/qs8-dwconv-e2e.cc",
9556 "bench/end2end.h",
9557 ] + MICROKERNEL_BENCHMARK_HDRS,
9558 deps = MICROKERNEL_BENCHMARK_DEPS + [
9559 ":XNNPACK",
9560 ":qs8_mobilenet_v1",
9561 ":qs8_mobilenet_v2",
9562 ],
9563)
9564
9565xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08009566 name = "qs8_gemm_e2e_bench",
9567 srcs = [
9568 "bench/qs8-gemm-e2e.cc",
9569 "bench/end2end.h",
9570 ] + MICROKERNEL_BENCHMARK_HDRS,
9571 deps = MICROKERNEL_BENCHMARK_DEPS + [
9572 ":XNNPACK",
9573 ":qs8_mobilenet_v1",
9574 ":qs8_mobilenet_v2",
9575 ],
9576)
9577
9578xnnpack_benchmark(
Frank Barchard9098aba2021-08-12 12:20:03 -07009579 name = "qu8_gemm_e2e_bench",
9580 srcs = [
9581 "bench/qu8-gemm-e2e.cc",
9582 "bench/end2end.h",
9583 ] + MICROKERNEL_BENCHMARK_HDRS,
9584 deps = MICROKERNEL_BENCHMARK_DEPS + [
9585 ":XNNPACK",
9586 ":qu8_mobilenet_v1",
9587 ":qu8_mobilenet_v2",
9588 ],
9589)
9590
9591xnnpack_benchmark(
Marat Dukhan6084fb82021-07-27 07:45:02 -07009592 name = "qu8_dwconv_e2e_bench",
9593 srcs = [
9594 "bench/qu8-dwconv-e2e.cc",
9595 "bench/end2end.h",
9596 ] + MICROKERNEL_BENCHMARK_HDRS,
9597 deps = MICROKERNEL_BENCHMARK_DEPS + [
9598 ":XNNPACK",
9599 ":qu8_mobilenet_v1",
9600 ":qu8_mobilenet_v2",
9601 ],
9602)
9603
9604xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07009605 name = "end2end_bench",
9606 srcs = ["bench/end2end.cc"],
9607 deps = [
9608 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07009609 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07009610 ":fp16_mobilenet_v1",
9611 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07009612 ":fp16_mobilenet_v3_large",
9613 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07009614 ":fp32_mobilenet_v1",
9615 ":fp32_mobilenet_v2",
9616 ":fp32_mobilenet_v3_large",
9617 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08009618 ":fp32_sparse_mobilenet_v1",
9619 ":fp32_sparse_mobilenet_v2",
9620 ":fp32_sparse_mobilenet_v3_large",
9621 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhane252f922021-08-31 08:57:41 -07009622 ":qc8_mobilenet_v1",
9623 ":qc8_mobilenet_v2",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07009624 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07009625 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08009626 ":qu8_mobilenet_v1",
Marat Dukhan036b2b12021-07-21 01:12:58 -07009627 ":qu8_mobilenet_v2",
Marat Dukhanc068bb62019-10-04 13:24:39 -07009628 "@pthreadpool",
9629 ],
9630)
9631
Marat Dukhan6adff4e2019-10-14 18:32:07 -07009632#################### Accuracy evaluation for math functions ####################
9633
9634xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08009635 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07009636 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08009637 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07009638 "src/xnnpack/AlignedAllocator.h",
9639 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08009640 deps = ACCURACY_EVAL_DEPS + [
9641 ":bench_utils",
9642 "@cpuinfo",
9643 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07009644)
9645
Marat Dukhan515c9772019-10-17 18:07:57 -07009646xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08009647 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07009648 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08009649 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07009650 "src/xnnpack/AlignedAllocator.h",
9651 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08009652 deps = ACCURACY_EVAL_DEPS + [
9653 ":bench_utils",
9654 "@cpuinfo",
9655 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07009656)
9657
Marat Dukhan98ba4412019-10-23 02:14:28 -07009658xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08009659 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08009660 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08009661 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08009662 "src/xnnpack/AlignedAllocator.h",
9663 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08009664 deps = ACCURACY_EVAL_DEPS + [
9665 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08009666 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08009667 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08009668)
9669
9670xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08009671 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07009672 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08009673 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07009674 "src/xnnpack/AlignedAllocator.h",
9675 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08009676 deps = ACCURACY_EVAL_DEPS + [
9677 ":bench_utils",
9678 "@cpuinfo",
9679 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07009680)
9681
Marat Dukhanf44f0222020-12-14 11:53:27 -08009682xnnpack_benchmark(
9683 name = "f32_sigmoid_ulp_eval",
9684 srcs = [
9685 "eval/f32-sigmoid-ulp.cc",
9686 "src/xnnpack/AlignedAllocator.h",
9687 ] + ACCURACY_EVAL_HDRS,
9688 deps = ACCURACY_EVAL_DEPS + [
9689 ":bench_utils",
9690 "@cpuinfo",
9691 ],
9692)
9693
9694xnnpack_benchmark(
9695 name = "f32_sqrt_ulp_eval",
9696 srcs = [
9697 "eval/f32-sqrt-ulp.cc",
9698 "src/xnnpack/AlignedAllocator.h",
9699 ] + ACCURACY_EVAL_HDRS,
9700 deps = ACCURACY_EVAL_DEPS + [
9701 ":bench_utils",
9702 "@cpuinfo",
9703 ],
9704)
9705
9706################### Accuracy verification for math functions ##################
9707
9708xnnpack_unit_test(
Marat Dukhan3ed866b2021-09-29 08:23:33 -07009709 name = "f16_f32_cvt_eval",
9710 srcs = [
9711 "eval/f16-f32-cvt.cc",
9712 "src/xnnpack/AlignedAllocator.h",
9713 "src/xnnpack/math-stubs.h",
9714 ] + MICROKERNEL_TEST_HDRS,
9715 automatic = False,
9716 deps = MICROKERNEL_TEST_DEPS,
9717)
9718
9719xnnpack_unit_test(
Marat Dukhan582e1842021-10-25 17:18:36 -07009720 name = "f32_f16_cvt_eval",
9721 srcs = [
9722 "eval/f32-f16-cvt.cc",
9723 "src/xnnpack/AlignedAllocator.h",
9724 "src/xnnpack/math-stubs.h",
9725 ] + MICROKERNEL_TEST_HDRS,
9726 automatic = False,
9727 deps = MICROKERNEL_TEST_DEPS,
9728)
9729
9730xnnpack_unit_test(
Marat Dukhand24301d2021-12-02 00:13:45 -08009731 name = "f32_qs8_cvt_eval",
9732 srcs = [
9733 "eval/f32-qs8-cvt.cc",
9734 "src/xnnpack/AlignedAllocator.h",
9735 "src/xnnpack/math-stubs.h",
9736 ] + MICROKERNEL_TEST_HDRS,
9737 automatic = False,
9738 deps = MICROKERNEL_TEST_DEPS,
9739)
9740
9741xnnpack_unit_test(
9742 name = "f32_qu8_cvt_eval",
9743 srcs = [
9744 "eval/f32-qu8-cvt.cc",
9745 "src/xnnpack/AlignedAllocator.h",
9746 "src/xnnpack/math-stubs.h",
9747 ] + MICROKERNEL_TEST_HDRS,
9748 automatic = False,
9749 deps = MICROKERNEL_TEST_DEPS,
9750)
9751
9752xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08009753 name = "f32_exp_eval",
9754 srcs = [
9755 "eval/f32-exp.cc",
9756 "src/xnnpack/AlignedAllocator.h",
9757 "src/xnnpack/math-stubs.h",
9758 ] + MICROKERNEL_TEST_HDRS,
9759 automatic = False,
9760 deps = MICROKERNEL_TEST_DEPS,
9761)
9762
9763xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08009764 name = "f32_expm1minus_eval",
9765 srcs = [
9766 "eval/f32-expm1minus.cc",
9767 "src/xnnpack/AlignedAllocator.h",
9768 "src/xnnpack/math-stubs.h",
9769 ] + MICROKERNEL_TEST_HDRS,
9770 automatic = False,
9771 deps = MICROKERNEL_TEST_DEPS,
9772)
9773
Marat Dukhan8853b822020-05-07 12:19:01 -07009774xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08009775 name = "f32_expminus_eval",
9776 srcs = [
9777 "eval/f32-expminus.cc",
9778 "src/xnnpack/AlignedAllocator.h",
9779 "src/xnnpack/math-stubs.h",
9780 ] + MICROKERNEL_TEST_HDRS,
9781 automatic = False,
9782 deps = MICROKERNEL_TEST_DEPS,
9783)
9784
9785xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07009786 name = "f32_roundne_eval",
9787 srcs = [
9788 "eval/f32-roundne.cc",
9789 "src/xnnpack/AlignedAllocator.h",
9790 "src/xnnpack/math-stubs.h",
9791 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07009792 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07009793 deps = MICROKERNEL_TEST_DEPS,
9794)
9795
Marat Dukhan2dbb9442020-05-12 20:43:43 -07009796xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07009797 name = "f32_roundd_eval",
9798 srcs = [
9799 "eval/f32-roundd.cc",
9800 "src/xnnpack/AlignedAllocator.h",
9801 "src/xnnpack/math-stubs.h",
9802 ] + MICROKERNEL_TEST_HDRS,
9803 automatic = False,
9804 deps = MICROKERNEL_TEST_DEPS,
9805)
9806
9807xnnpack_unit_test(
9808 name = "f32_roundu_eval",
9809 srcs = [
9810 "eval/f32-roundu.cc",
9811 "src/xnnpack/AlignedAllocator.h",
9812 "src/xnnpack/math-stubs.h",
9813 ] + MICROKERNEL_TEST_HDRS,
9814 automatic = False,
9815 deps = MICROKERNEL_TEST_DEPS,
9816)
9817
9818xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07009819 name = "f32_roundz_eval",
9820 srcs = [
9821 "eval/f32-roundz.cc",
9822 "src/xnnpack/AlignedAllocator.h",
9823 "src/xnnpack/math-stubs.h",
9824 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07009825 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07009826 deps = MICROKERNEL_TEST_DEPS,
9827)
9828
Marat Dukhan08c4a432019-10-03 09:29:21 -07009829######################### Unit tests for micro-kernels #########################
9830
9831xnnpack_unit_test(
Marat Dukhanf1a6ed32021-09-26 13:40:19 -07009832 name = "f16_f32_vcvt_test",
9833 srcs = [
9834 "test/f16-f32-vcvt.cc",
9835 "test/vcvt-microkernel-tester.h",
9836 ] + MICROKERNEL_TEST_HDRS,
9837 deps = MICROKERNEL_TEST_DEPS,
9838)
9839
9840xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07009841 name = "f16_dwconv_minmax_test",
9842 srcs = [
9843 "test/f16-dwconv-minmax.cc",
9844 "test/dwconv-microkernel-tester.h",
9845 "src/xnnpack/AlignedAllocator.h",
9846 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
9847 deps = MICROKERNEL_TEST_DEPS + [":packing"],
9848)
9849
9850xnnpack_unit_test(
9851 name = "f16_gavgpool_minmax_test",
9852 srcs = [
9853 "test/f16-gavgpool-minmax.cc",
9854 "test/gavgpool-microkernel-tester.h",
9855 "src/xnnpack/AlignedAllocator.h",
9856 ] + MICROKERNEL_TEST_HDRS,
9857 deps = MICROKERNEL_TEST_DEPS,
9858)
9859
9860xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07009861 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07009862 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07009863 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07009864 "test/gemm-microkernel-tester.h",
9865 "src/xnnpack/AlignedAllocator.h",
9866 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07009867 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07009868)
9869
9870xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07009871 name = "f16_igemm_minmax_test",
9872 srcs = [
9873 "test/f16-igemm-minmax.cc",
9874 "test/gemm-microkernel-tester.h",
9875 "src/xnnpack/AlignedAllocator.h",
9876 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
9877 deps = MICROKERNEL_TEST_DEPS + [":packing"],
9878)
9879
9880xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07009881 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08009882 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07009883 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08009884 "test/spmm-microkernel-tester.h",
9885 "src/xnnpack/AlignedAllocator.h",
9886 ] + MICROKERNEL_TEST_HDRS,
9887 deps = MICROKERNEL_TEST_DEPS,
9888)
9889
9890xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07009891 name = "f16_vadd_minmax_test",
9892 srcs = [
9893 "test/f16-vadd-minmax.cc",
9894 "test/vbinary-microkernel-tester.h",
9895 ] + MICROKERNEL_TEST_HDRS,
9896 deps = MICROKERNEL_TEST_DEPS,
9897)
9898
9899xnnpack_unit_test(
9900 name = "f16_vaddc_minmax_test",
9901 srcs = [
9902 "test/f16-vaddc-minmax.cc",
9903 "test/vbinaryc-microkernel-tester.h",
9904 ] + MICROKERNEL_TEST_HDRS,
9905 deps = MICROKERNEL_TEST_DEPS,
9906)
9907
9908xnnpack_unit_test(
9909 name = "f16_vclamp_test",
9910 srcs = [
9911 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07009912 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07009913 ] + MICROKERNEL_TEST_HDRS,
9914 deps = MICROKERNEL_TEST_DEPS,
9915)
9916
9917xnnpack_unit_test(
9918 name = "f16_vdiv_minmax_test",
9919 srcs = [
9920 "test/f16-vdiv-minmax.cc",
9921 "test/vbinary-microkernel-tester.h",
9922 ] + MICROKERNEL_TEST_HDRS,
9923 deps = MICROKERNEL_TEST_DEPS,
9924)
9925
9926xnnpack_unit_test(
9927 name = "f16_vdivc_minmax_test",
9928 srcs = [
9929 "test/f16-vdivc-minmax.cc",
9930 "test/vbinaryc-microkernel-tester.h",
9931 ] + MICROKERNEL_TEST_HDRS,
9932 deps = MICROKERNEL_TEST_DEPS,
9933)
9934
9935xnnpack_unit_test(
9936 name = "f16_vrdivc_minmax_test",
9937 srcs = [
9938 "test/f16-vrdivc-minmax.cc",
9939 "test/vbinaryc-microkernel-tester.h",
9940 ] + MICROKERNEL_TEST_HDRS,
9941 deps = MICROKERNEL_TEST_DEPS,
9942)
9943
9944xnnpack_unit_test(
9945 name = "f16_vhswish_test",
9946 srcs = [
9947 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07009948 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07009949 ] + MICROKERNEL_TEST_HDRS,
9950 deps = MICROKERNEL_TEST_DEPS,
9951)
9952
9953xnnpack_unit_test(
9954 name = "f16_vmax_test",
9955 srcs = [
9956 "test/f16-vmax.cc",
9957 "test/vbinary-microkernel-tester.h",
9958 ] + MICROKERNEL_TEST_HDRS,
9959 deps = MICROKERNEL_TEST_DEPS,
9960)
9961
9962xnnpack_unit_test(
9963 name = "f16_vmaxc_test",
9964 srcs = [
9965 "test/f16-vmaxc.cc",
9966 "test/vbinaryc-microkernel-tester.h",
9967 ] + MICROKERNEL_TEST_HDRS,
9968 deps = MICROKERNEL_TEST_DEPS,
9969)
9970
9971xnnpack_unit_test(
9972 name = "f16_vmin_test",
9973 srcs = [
9974 "test/f16-vmin.cc",
9975 "test/vbinary-microkernel-tester.h",
9976 ] + MICROKERNEL_TEST_HDRS,
9977 deps = MICROKERNEL_TEST_DEPS,
9978)
9979
9980xnnpack_unit_test(
9981 name = "f16_vminc_test",
9982 srcs = [
9983 "test/f16-vminc.cc",
9984 "test/vbinaryc-microkernel-tester.h",
9985 ] + MICROKERNEL_TEST_HDRS,
9986 deps = MICROKERNEL_TEST_DEPS,
9987)
9988
9989xnnpack_unit_test(
9990 name = "f16_vmul_minmax_test",
9991 srcs = [
9992 "test/f16-vmul-minmax.cc",
9993 "test/vbinary-microkernel-tester.h",
9994 ] + MICROKERNEL_TEST_HDRS,
9995 deps = MICROKERNEL_TEST_DEPS,
9996)
9997
9998xnnpack_unit_test(
9999 name = "f16_vmulc_minmax_test",
10000 srcs = [
10001 "test/f16-vmulc-minmax.cc",
10002 "test/vbinaryc-microkernel-tester.h",
10003 ] + MICROKERNEL_TEST_HDRS,
10004 deps = MICROKERNEL_TEST_DEPS,
10005)
10006
10007xnnpack_unit_test(
10008 name = "f16_vmulcaddc_minmax_test",
10009 srcs = [
10010 "test/f16-vmulcaddc-minmax.cc",
10011 "test/vmulcaddc-microkernel-tester.h",
10012 "src/xnnpack/AlignedAllocator.h",
10013 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
10014 deps = MICROKERNEL_TEST_DEPS + [":packing"],
10015)
10016
10017xnnpack_unit_test(
10018 name = "f16_vsub_minmax_test",
10019 srcs = [
10020 "test/f16-vsub-minmax.cc",
10021 "test/vbinary-microkernel-tester.h",
10022 ] + MICROKERNEL_TEST_HDRS,
10023 deps = MICROKERNEL_TEST_DEPS,
10024)
10025
10026xnnpack_unit_test(
10027 name = "f16_vsubc_minmax_test",
10028 srcs = [
10029 "test/f16-vsubc-minmax.cc",
10030 "test/vbinaryc-microkernel-tester.h",
10031 ] + MICROKERNEL_TEST_HDRS,
10032 deps = MICROKERNEL_TEST_DEPS,
10033)
10034
10035xnnpack_unit_test(
10036 name = "f16_vrsubc_minmax_test",
10037 srcs = [
10038 "test/f16-vrsubc-minmax.cc",
10039 "test/vbinaryc-microkernel-tester.h",
10040 ] + MICROKERNEL_TEST_HDRS,
10041 deps = MICROKERNEL_TEST_DEPS,
10042)
10043
10044xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -070010045 name = "f32_argmaxpool_test",
10046 srcs = [
10047 "test/f32-argmaxpool.cc",
10048 "test/argmaxpool-microkernel-tester.h",
10049 "src/xnnpack/AlignedAllocator.h",
10050 ] + MICROKERNEL_TEST_HDRS,
10051 deps = MICROKERNEL_TEST_DEPS,
10052)
10053
10054xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -070010055 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010056 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -070010057 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010058 "test/avgpool-microkernel-tester.h",
10059 "src/xnnpack/AlignedAllocator.h",
10060 ] + MICROKERNEL_TEST_HDRS,
10061 deps = MICROKERNEL_TEST_DEPS,
10062)
10063
10064xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -070010065 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -080010066 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -070010067 "test/f32-ibilinear.cc",
10068 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -080010069 "src/xnnpack/AlignedAllocator.h",
10070 ] + MICROKERNEL_TEST_HDRS,
10071 deps = MICROKERNEL_TEST_DEPS,
10072)
10073
10074xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -070010075 name = "f32_ibilinear_chw_test",
10076 srcs = [
10077 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -070010078 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -070010079 "src/xnnpack/AlignedAllocator.h",
10080 ] + MICROKERNEL_TEST_HDRS,
10081 deps = MICROKERNEL_TEST_DEPS,
10082)
10083
10084xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -070010085 name = "f32_igemm_test",
10086 srcs = [
10087 "test/f32-igemm.cc",
10088 "test/gemm-microkernel-tester.h",
10089 "src/xnnpack/AlignedAllocator.h",
10090 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010091 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -070010092)
10093
10094xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -070010095 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010096 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -070010097 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010098 "test/gemm-microkernel-tester.h",
10099 "src/xnnpack/AlignedAllocator.h",
10100 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010101 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -070010102)
10103
10104xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -070010105 name = "f32_igemm_minmax_test",
10106 srcs = [
10107 "test/f32-igemm-minmax.cc",
10108 "test/gemm-microkernel-tester.h",
10109 "src/xnnpack/AlignedAllocator.h",
10110 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010111 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -070010112)
10113
10114xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -070010115 name = "f32_conv_hwc_test",
10116 srcs = [
10117 "test/f32-conv-hwc.cc",
10118 "test/conv-hwc-microkernel-tester.h",
10119 "src/xnnpack/AlignedAllocator.h",
10120 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010121 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -070010122)
10123
10124xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -070010125 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010126 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -070010127 "test/f32-conv-hwc2chw.cc",
10128 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010129 "src/xnnpack/AlignedAllocator.h",
10130 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010131 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -070010132)
10133
10134xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -070010135 name = "f32_dwconv_test",
10136 srcs = [
10137 "test/f32-dwconv.cc",
10138 "test/dwconv-microkernel-tester.h",
10139 "src/xnnpack/AlignedAllocator.h",
10140 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010141 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -070010142)
10143
10144xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -070010145 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010146 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -070010147 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010148 "test/dwconv-microkernel-tester.h",
10149 "src/xnnpack/AlignedAllocator.h",
10150 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010151 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -070010152)
10153
10154xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -070010155 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010156 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -070010157 "test/f32-dwconv2d-chw.cc",
10158 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010159 "src/xnnpack/AlignedAllocator.h",
10160 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010161 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -070010162)
10163
10164xnnpack_unit_test(
Marat Dukhand77f77d2021-10-24 15:39:59 -070010165 name = "f32_f16_vcvt_test",
10166 srcs = [
10167 "test/f32-f16-vcvt.cc",
10168 "test/vcvt-microkernel-tester.h",
10169 ] + MICROKERNEL_TEST_HDRS,
10170 deps = MICROKERNEL_TEST_DEPS,
10171)
10172
10173xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -070010174 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010175 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -070010176 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010177 "test/gavgpool-microkernel-tester.h",
10178 "src/xnnpack/AlignedAllocator.h",
10179 ] + MICROKERNEL_TEST_HDRS,
10180 deps = MICROKERNEL_TEST_DEPS,
10181)
10182
10183xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -070010184 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010185 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -070010186 "test/f32-gavgpool-cw.cc",
10187 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010188 "src/xnnpack/AlignedAllocator.h",
10189 ] + MICROKERNEL_TEST_HDRS,
10190 deps = MICROKERNEL_TEST_DEPS,
10191)
10192
10193xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -070010194 name = "f32_gemm_test",
10195 srcs = [
10196 "test/f32-gemm.cc",
10197 "test/gemm-microkernel-tester.h",
10198 "src/xnnpack/AlignedAllocator.h",
10199 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010200 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -070010201)
10202
10203xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -070010204 name = "f32_gemm_relu_test",
10205 srcs = [
10206 "test/f32-gemm-relu.cc",
10207 "test/gemm-microkernel-tester.h",
10208 "src/xnnpack/AlignedAllocator.h",
10209 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010210 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -070010211)
10212
10213xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -070010214 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010215 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -070010216 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010217 "test/gemm-microkernel-tester.h",
10218 "src/xnnpack/AlignedAllocator.h",
10219 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Zhi An Ngb43b47a2021-12-23 16:27:22 -080010220 deps = MICROKERNEL_TEST_DEPS + [
10221 ":packing",
10222 ":jit",
10223 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -070010224)
10225
10226xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -070010227 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010228 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -070010229 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010230 "test/gemm-microkernel-tester.h",
10231 "src/xnnpack/AlignedAllocator.h",
10232 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010233 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -070010234)
10235
10236xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -070010237 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -070010238 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -070010239 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -070010240 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010241 ] + MICROKERNEL_TEST_HDRS,
10242 deps = MICROKERNEL_TEST_DEPS,
10243)
10244
10245xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -070010246 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010247 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -070010248 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010249 "test/maxpool-microkernel-tester.h",
10250 ] + MICROKERNEL_TEST_HDRS,
10251 deps = MICROKERNEL_TEST_DEPS,
10252)
10253
10254xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -070010255 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010256 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -070010257 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010258 "test/avgpool-microkernel-tester.h",
10259 "src/xnnpack/AlignedAllocator.h",
10260 ] + MICROKERNEL_TEST_HDRS,
10261 deps = MICROKERNEL_TEST_DEPS,
10262)
10263
10264xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -070010265 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010266 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -070010267 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010268 "test/gemm-microkernel-tester.h",
10269 "src/xnnpack/AlignedAllocator.h",
10270 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010271 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -070010272)
10273
10274xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -070010275 name = "f16_prelu_test",
10276 srcs = [
10277 "test/f16-prelu.cc",
10278 "test/prelu-microkernel-tester.h",
10279 "src/xnnpack/AlignedAllocator.h",
10280 ] + MICROKERNEL_TEST_HDRS,
10281 deps = MICROKERNEL_TEST_DEPS,
10282)
10283
10284xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -070010285 name = "f32_prelu_test",
10286 srcs = [
10287 "test/f32-prelu.cc",
10288 "test/prelu-microkernel-tester.h",
10289 "src/xnnpack/AlignedAllocator.h",
10290 ] + MICROKERNEL_TEST_HDRS,
10291 deps = MICROKERNEL_TEST_DEPS,
10292)
10293
10294xnnpack_unit_test(
Marat Dukhanfee66be2021-12-09 17:51:15 -080010295 name = "f32_qs8_vcvt_test",
10296 srcs = [
10297 "test/f32-qs8-vcvt.cc",
10298 "test/vcvt-microkernel-tester.h",
10299 ] + MICROKERNEL_TEST_HDRS,
10300 deps = MICROKERNEL_TEST_DEPS,
10301)
10302
10303xnnpack_unit_test(
10304 name = "f32_qu8_vcvt_test",
10305 srcs = [
10306 "test/f32-qu8-vcvt.cc",
10307 "test/vcvt-microkernel-tester.h",
10308 ] + MICROKERNEL_TEST_HDRS,
10309 deps = MICROKERNEL_TEST_DEPS,
10310)
10311
10312xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -070010313 name = "f32_raddexpminusmax_test",
10314 srcs = [
10315 "test/f32-raddexpminusmax.cc",
10316 "test/raddexpminusmax-microkernel-tester.h",
10317 ] + MICROKERNEL_TEST_HDRS,
10318 deps = MICROKERNEL_TEST_DEPS,
10319)
10320
10321xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -070010322 name = "f32_raddextexp_test",
10323 srcs = [
10324 "test/f32-raddextexp.cc",
10325 "test/raddextexp-microkernel-tester.h",
10326 ] + MICROKERNEL_TEST_HDRS,
10327 deps = MICROKERNEL_TEST_DEPS,
10328)
10329
10330xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -070010331 name = "f32_raddstoreexpminusmax_test",
10332 srcs = [
10333 "test/f32-raddstoreexpminusmax.cc",
10334 "test/raddstoreexpminusmax-microkernel-tester.h",
10335 ] + MICROKERNEL_TEST_HDRS,
10336 deps = MICROKERNEL_TEST_DEPS,
10337)
10338
10339xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -070010340 name = "f32_rmax_test",
10341 srcs = [
10342 "test/f32-rmax.cc",
10343 "test/rmax-microkernel-tester.h",
10344 ] + MICROKERNEL_TEST_HDRS,
10345 deps = MICROKERNEL_TEST_DEPS,
10346)
10347
10348xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -070010349 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010350 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -070010351 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010352 "test/spmm-microkernel-tester.h",
10353 "src/xnnpack/AlignedAllocator.h",
10354 ] + MICROKERNEL_TEST_HDRS,
10355 deps = MICROKERNEL_TEST_DEPS,
10356)
10357
10358xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -070010359 name = "f32_vabs_test",
10360 srcs = [
10361 "test/f32-vabs.cc",
10362 "test/vunary-microkernel-tester.h",
10363 ] + MICROKERNEL_TEST_HDRS,
10364 deps = MICROKERNEL_TEST_DEPS,
10365)
10366
10367xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -070010368 name = "f32_vadd_test",
10369 srcs = [
10370 "test/f32-vadd.cc",
10371 "test/vbinary-microkernel-tester.h",
10372 ] + MICROKERNEL_TEST_HDRS,
10373 deps = MICROKERNEL_TEST_DEPS,
10374)
10375
10376xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010377 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010378 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010379 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -080010380 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -080010381 ] + MICROKERNEL_TEST_HDRS,
10382 deps = MICROKERNEL_TEST_DEPS,
10383)
10384
10385xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -070010386 name = "f32_vadd_relu_test",
10387 srcs = [
10388 "test/f32-vadd-relu.cc",
10389 "test/vbinary-microkernel-tester.h",
10390 ] + MICROKERNEL_TEST_HDRS,
10391 deps = MICROKERNEL_TEST_DEPS,
10392)
10393
10394xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -070010395 name = "f32_vaddc_test",
10396 srcs = [
10397 "test/f32-vaddc.cc",
10398 "test/vbinaryc-microkernel-tester.h",
10399 ] + MICROKERNEL_TEST_HDRS,
10400 deps = MICROKERNEL_TEST_DEPS,
10401)
10402
10403xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010404 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -080010405 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010406 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -080010407 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010408 ] + MICROKERNEL_TEST_HDRS,
10409 deps = MICROKERNEL_TEST_DEPS,
10410)
10411
10412xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -070010413 name = "f32_vaddc_relu_test",
10414 srcs = [
10415 "test/f32-vaddc-relu.cc",
10416 "test/vbinaryc-microkernel-tester.h",
10417 ] + MICROKERNEL_TEST_HDRS,
10418 deps = MICROKERNEL_TEST_DEPS,
10419)
10420
10421xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -070010422 name = "f32_vclamp_test",
10423 srcs = [
10424 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -070010425 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -070010426 ] + MICROKERNEL_TEST_HDRS,
10427 deps = MICROKERNEL_TEST_DEPS,
10428)
10429
10430xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -070010431 name = "f32_vdiv_test",
10432 srcs = [
10433 "test/f32-vdiv.cc",
10434 "test/vbinary-microkernel-tester.h",
10435 ] + MICROKERNEL_TEST_HDRS,
10436 deps = MICROKERNEL_TEST_DEPS,
10437)
10438
10439xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010440 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -080010441 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010442 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -080010443 "test/vbinary-microkernel-tester.h",
10444 ] + MICROKERNEL_TEST_HDRS,
10445 deps = MICROKERNEL_TEST_DEPS,
10446)
10447
10448xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -070010449 name = "f32_vdiv_relu_test",
10450 srcs = [
10451 "test/f32-vdiv-relu.cc",
10452 "test/vbinary-microkernel-tester.h",
10453 ] + MICROKERNEL_TEST_HDRS,
10454 deps = MICROKERNEL_TEST_DEPS,
10455)
10456
10457xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -070010458 name = "f32_vdivc_test",
10459 srcs = [
10460 "test/f32-vdivc.cc",
10461 "test/vbinaryc-microkernel-tester.h",
10462 ] + MICROKERNEL_TEST_HDRS,
10463 deps = MICROKERNEL_TEST_DEPS,
10464)
10465
10466xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010467 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -080010468 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010469 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -080010470 "test/vbinaryc-microkernel-tester.h",
10471 ] + MICROKERNEL_TEST_HDRS,
10472 deps = MICROKERNEL_TEST_DEPS,
10473)
10474
10475xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -070010476 name = "f32_vdivc_relu_test",
10477 srcs = [
10478 "test/f32-vdivc-relu.cc",
10479 "test/vbinaryc-microkernel-tester.h",
10480 ] + MICROKERNEL_TEST_HDRS,
10481 deps = MICROKERNEL_TEST_DEPS,
10482)
10483
10484xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -070010485 name = "f32_vrdivc_test",
10486 srcs = [
10487 "test/f32-vrdivc.cc",
10488 "test/vbinaryc-microkernel-tester.h",
10489 ] + MICROKERNEL_TEST_HDRS,
10490 deps = MICROKERNEL_TEST_DEPS,
10491)
10492
10493xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010494 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -080010495 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010496 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -080010497 "test/vbinaryc-microkernel-tester.h",
10498 ] + MICROKERNEL_TEST_HDRS,
10499 deps = MICROKERNEL_TEST_DEPS,
10500)
10501
10502xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -070010503 name = "f32_vrdivc_relu_test",
10504 srcs = [
10505 "test/f32-vrdivc-relu.cc",
10506 "test/vbinaryc-microkernel-tester.h",
10507 ] + MICROKERNEL_TEST_HDRS,
10508 deps = MICROKERNEL_TEST_DEPS,
10509)
10510
10511xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -080010512 name = "f32_velu_test",
10513 srcs = [
10514 "test/f32-velu.cc",
10515 "test/vunary-microkernel-tester.h",
10516 ] + MICROKERNEL_TEST_HDRS,
10517 deps = MICROKERNEL_TEST_DEPS,
10518)
10519
10520xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -080010521 name = "f32_vmax_test",
10522 srcs = [
10523 "test/f32-vmax.cc",
10524 "test/vbinary-microkernel-tester.h",
10525 ] + MICROKERNEL_TEST_HDRS,
10526 deps = MICROKERNEL_TEST_DEPS,
10527)
10528
10529xnnpack_unit_test(
10530 name = "f32_vmaxc_test",
10531 srcs = [
10532 "test/f32-vmaxc.cc",
10533 "test/vbinaryc-microkernel-tester.h",
10534 ] + MICROKERNEL_TEST_HDRS,
10535 deps = MICROKERNEL_TEST_DEPS,
10536)
10537
10538xnnpack_unit_test(
10539 name = "f32_vmin_test",
10540 srcs = [
10541 "test/f32-vmin.cc",
10542 "test/vbinary-microkernel-tester.h",
10543 ] + MICROKERNEL_TEST_HDRS,
10544 deps = MICROKERNEL_TEST_DEPS,
10545)
10546
10547xnnpack_unit_test(
10548 name = "f32_vminc_test",
10549 srcs = [
10550 "test/f32-vminc.cc",
10551 "test/vbinaryc-microkernel-tester.h",
10552 ] + MICROKERNEL_TEST_HDRS,
10553 deps = MICROKERNEL_TEST_DEPS,
10554)
10555
10556xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -070010557 name = "f32_vmul_test",
10558 srcs = [
10559 "test/f32-vmul.cc",
10560 "test/vbinary-microkernel-tester.h",
10561 ] + MICROKERNEL_TEST_HDRS,
10562 deps = MICROKERNEL_TEST_DEPS,
10563)
10564
10565xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010566 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010567 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010568 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -080010569 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -080010570 ] + MICROKERNEL_TEST_HDRS,
10571 deps = MICROKERNEL_TEST_DEPS,
10572)
10573
10574xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -070010575 name = "f32_vmul_relu_test",
10576 srcs = [
10577 "test/f32-vmul-relu.cc",
10578 "test/vbinary-microkernel-tester.h",
10579 ] + MICROKERNEL_TEST_HDRS,
10580 deps = MICROKERNEL_TEST_DEPS,
10581)
10582
10583xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -070010584 name = "f32_vmulc_test",
10585 srcs = [
10586 "test/f32-vmulc.cc",
10587 "test/vbinaryc-microkernel-tester.h",
10588 ] + MICROKERNEL_TEST_HDRS,
10589 deps = MICROKERNEL_TEST_DEPS,
10590)
10591
10592xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010593 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -080010594 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010595 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -080010596 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010597 ] + MICROKERNEL_TEST_HDRS,
10598 deps = MICROKERNEL_TEST_DEPS,
10599)
10600
10601xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -070010602 name = "f32_vmulc_relu_test",
10603 srcs = [
10604 "test/f32-vmulc-relu.cc",
10605 "test/vbinaryc-microkernel-tester.h",
10606 ] + MICROKERNEL_TEST_HDRS,
10607 deps = MICROKERNEL_TEST_DEPS,
10608)
10609
10610xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -070010611 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010612 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -070010613 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070010614 "test/vmulcaddc-microkernel-tester.h",
10615 "src/xnnpack/AlignedAllocator.h",
10616 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -070010617 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -070010618)
10619
10620xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -070010621 name = "f32_vlrelu_test",
10622 srcs = [
10623 "test/f32-vlrelu.cc",
10624 "test/vunary-microkernel-tester.h",
10625 ] + MICROKERNEL_TEST_HDRS,
10626 deps = MICROKERNEL_TEST_DEPS,
10627)
10628
10629xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -070010630 name = "f32_vneg_test",
10631 srcs = [
10632 "test/f32-vneg.cc",
10633 "test/vunary-microkernel-tester.h",
10634 ] + MICROKERNEL_TEST_HDRS,
10635 deps = MICROKERNEL_TEST_DEPS,
10636)
10637
10638xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -070010639 name = "f32_vrelu_test",
10640 srcs = [
10641 "test/f32-vrelu.cc",
10642 "test/vunary-microkernel-tester.h",
10643 ] + MICROKERNEL_TEST_HDRS,
10644 deps = MICROKERNEL_TEST_DEPS,
10645)
10646
10647xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -070010648 name = "f32_vrndne_test",
10649 srcs = [
10650 "test/f32-vrndne.cc",
10651 "test/vunary-microkernel-tester.h",
10652 ] + MICROKERNEL_TEST_HDRS,
10653 deps = MICROKERNEL_TEST_DEPS,
10654)
10655
10656xnnpack_unit_test(
10657 name = "f32_vrndz_test",
10658 srcs = [
10659 "test/f32-vrndz.cc",
10660 "test/vunary-microkernel-tester.h",
10661 ] + MICROKERNEL_TEST_HDRS,
10662 deps = MICROKERNEL_TEST_DEPS,
10663)
10664
10665xnnpack_unit_test(
10666 name = "f32_vrndu_test",
10667 srcs = [
10668 "test/f32-vrndu.cc",
10669 "test/vunary-microkernel-tester.h",
10670 ] + MICROKERNEL_TEST_HDRS,
10671 deps = MICROKERNEL_TEST_DEPS,
10672)
10673
10674xnnpack_unit_test(
10675 name = "f32_vrndd_test",
10676 srcs = [
10677 "test/f32-vrndd.cc",
10678 "test/vunary-microkernel-tester.h",
10679 ] + MICROKERNEL_TEST_HDRS,
10680 deps = MICROKERNEL_TEST_DEPS,
10681)
10682
10683xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -070010684 name = "f32_vscale_test",
10685 srcs = [
10686 "test/f32-vscale.cc",
10687 "test/vscale-microkernel-tester.h",
10688 ] + MICROKERNEL_TEST_HDRS,
10689 deps = MICROKERNEL_TEST_DEPS,
10690)
10691
10692xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -070010693 name = "f32_vscaleexpminusmax_test",
10694 srcs = [
10695 "test/f32-vscaleexpminusmax.cc",
10696 "test/vscaleexpminusmax-microkernel-tester.h",
10697 ] + MICROKERNEL_TEST_HDRS,
10698 deps = MICROKERNEL_TEST_DEPS,
10699)
10700
10701xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -070010702 name = "f32_vscaleextexp_test",
10703 srcs = [
10704 "test/f32-vscaleextexp.cc",
10705 "test/vscaleextexp-microkernel-tester.h",
10706 ] + MICROKERNEL_TEST_HDRS,
10707 deps = MICROKERNEL_TEST_DEPS,
10708)
10709
10710xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -070010711 name = "f32_vsigmoid_test",
10712 srcs = [
10713 "test/f32-vsigmoid.cc",
10714 "test/vunary-microkernel-tester.h",
10715 ] + MICROKERNEL_TEST_HDRS,
10716 deps = MICROKERNEL_TEST_DEPS,
10717)
10718
10719xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -070010720 name = "f32_vsqr_test",
10721 srcs = [
10722 "test/f32-vsqr.cc",
10723 "test/vunary-microkernel-tester.h",
10724 ] + MICROKERNEL_TEST_HDRS,
10725 deps = MICROKERNEL_TEST_DEPS,
10726)
10727
10728xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -070010729 name = "f32_vsqrdiff_test",
10730 srcs = [
10731 "test/f32-vsqrdiff.cc",
10732 "test/vbinary-microkernel-tester.h",
10733 ] + MICROKERNEL_TEST_HDRS,
10734 deps = MICROKERNEL_TEST_DEPS,
10735)
10736
10737xnnpack_unit_test(
10738 name = "f32_vsqrdiffc_test",
10739 srcs = [
10740 "test/f32-vsqrdiffc.cc",
10741 "test/vbinaryc-microkernel-tester.h",
10742 ] + MICROKERNEL_TEST_HDRS,
10743 deps = MICROKERNEL_TEST_DEPS,
10744)
10745
10746xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -070010747 name = "f32_vsqrt_test",
10748 srcs = [
10749 "test/f32-vsqrt.cc",
10750 "test/vunary-microkernel-tester.h",
10751 ] + MICROKERNEL_TEST_HDRS,
10752 deps = MICROKERNEL_TEST_DEPS,
10753)
10754
10755xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -070010756 name = "f32_vsub_test",
10757 srcs = [
10758 "test/f32-vsub.cc",
10759 "test/vbinary-microkernel-tester.h",
10760 ] + MICROKERNEL_TEST_HDRS,
10761 deps = MICROKERNEL_TEST_DEPS,
10762)
10763
10764xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010765 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -070010766 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010767 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -080010768 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -080010769 ] + MICROKERNEL_TEST_HDRS,
10770 deps = MICROKERNEL_TEST_DEPS,
10771)
10772
10773xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -070010774 name = "f32_vsub_relu_test",
10775 srcs = [
10776 "test/f32-vsub-relu.cc",
10777 "test/vbinary-microkernel-tester.h",
10778 ] + MICROKERNEL_TEST_HDRS,
10779 deps = MICROKERNEL_TEST_DEPS,
10780)
10781
10782xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -070010783 name = "f32_vsubc_test",
10784 srcs = [
10785 "test/f32-vsubc.cc",
10786 "test/vbinaryc-microkernel-tester.h",
10787 ] + MICROKERNEL_TEST_HDRS,
10788 deps = MICROKERNEL_TEST_DEPS,
10789)
10790
10791xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010792 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -080010793 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010794 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -080010795 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -080010796 ] + MICROKERNEL_TEST_HDRS,
10797 deps = MICROKERNEL_TEST_DEPS,
10798)
10799
10800xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -070010801 name = "f32_vsubc_relu_test",
10802 srcs = [
10803 "test/f32-vsubc-relu.cc",
10804 "test/vbinaryc-microkernel-tester.h",
10805 ] + MICROKERNEL_TEST_HDRS,
10806 deps = MICROKERNEL_TEST_DEPS,
10807)
10808
10809xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -070010810 name = "f32_vrsubc_test",
10811 srcs = [
10812 "test/f32-vrsubc.cc",
10813 "test/vbinaryc-microkernel-tester.h",
10814 ] + MICROKERNEL_TEST_HDRS,
10815 deps = MICROKERNEL_TEST_DEPS,
10816)
10817
10818xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010819 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -080010820 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -070010821 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -080010822 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -070010823 ] + MICROKERNEL_TEST_HDRS,
10824 deps = MICROKERNEL_TEST_DEPS,
10825)
10826
10827xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -070010828 name = "f32_vrsubc_relu_test",
10829 srcs = [
10830 "test/f32-vrsubc-relu.cc",
10831 "test/vbinaryc-microkernel-tester.h",
10832 ] + MICROKERNEL_TEST_HDRS,
10833 deps = MICROKERNEL_TEST_DEPS,
10834)
10835
10836xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -070010837 name = "qc8_dwconv_minmax_fp32_test",
10838 timeout = "moderate",
10839 srcs = [
10840 "test/qc8-dwconv-minmax-fp32.cc",
10841 "test/dwconv-microkernel-tester.h",
10842 "src/xnnpack/AlignedAllocator.h",
10843 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Alan Kelly66210582021-11-23 00:57:36 -080010844 shard_count = 10,
Marat Dukhan82286892021-06-04 17:27:27 -070010845 deps = MICROKERNEL_TEST_DEPS + [":packing"],
10846)
10847
10848xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -070010849 name = "qc8_gemm_minmax_fp32_test",
10850 timeout = "moderate",
10851 srcs = [
10852 "test/qc8-gemm-minmax-fp32.cc",
10853 "test/gemm-microkernel-tester.h",
10854 "src/xnnpack/AlignedAllocator.h",
10855 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Alan Kelly66210582021-11-23 00:57:36 -080010856 shard_count = 10,
Marat Dukhan0b043742021-06-02 18:29:11 -070010857 deps = MICROKERNEL_TEST_DEPS + [":packing"],
10858)
10859
10860xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -070010861 name = "qc8_igemm_minmax_fp32_test",
10862 timeout = "moderate",
10863 srcs = [
10864 "test/qc8-igemm-minmax-fp32.cc",
10865 "test/gemm-microkernel-tester.h",
10866 "src/xnnpack/AlignedAllocator.h",
10867 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Alan Kelly66210582021-11-23 00:57:36 -080010868 shard_count = 10,
Marat Dukhane06c8132021-06-03 08:59:11 -070010869 deps = MICROKERNEL_TEST_DEPS + [":packing"],
10870)
10871
10872xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -070010873 name = "qs8_dwconv_minmax_fp32_test",
10874 srcs = [
10875 "test/qs8-dwconv-minmax-fp32.cc",
10876 "test/dwconv-microkernel-tester.h",
10877 "src/xnnpack/AlignedAllocator.h",
10878 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Alan Kelly66210582021-11-23 00:57:36 -080010879 shard_count = 10,
Marat Dukhanbe18f5c2021-07-16 18:46:39 -070010880 deps = MICROKERNEL_TEST_DEPS + [":packing"],
10881)
10882
10883xnnpack_unit_test(
Marat Dukhanbe18f5c2021-07-16 18:46:39 -070010884 name = "qs8_dwconv_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -070010885 srcs = [
Marat Dukhanbe18f5c2021-07-16 18:46:39 -070010886 "test/qs8-dwconv-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -070010887 "test/dwconv-microkernel-tester.h",
10888 "src/xnnpack/AlignedAllocator.h",
10889 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
10890 deps = MICROKERNEL_TEST_DEPS + [":packing"],
10891)
10892
10893xnnpack_unit_test(
Marat Dukhanfee66be2021-12-09 17:51:15 -080010894 name = "qs8_f32_vcvt_test",
10895 srcs = [
10896 "test/qs8-f32-vcvt.cc",
10897 "test/vcvt-microkernel-tester.h",
10898 ] + MICROKERNEL_TEST_HDRS,
10899 deps = MICROKERNEL_TEST_DEPS,
10900)
10901
10902xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -070010903 name = "qs8_gavgpool_minmax_test",
10904 srcs = [
10905 "test/qs8-gavgpool-minmax.cc",
10906 "test/gavgpool-microkernel-tester.h",
10907 "src/xnnpack/AlignedAllocator.h",
10908 ] + MICROKERNEL_TEST_HDRS,
10909 deps = MICROKERNEL_TEST_DEPS,
10910)
10911
10912xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -070010913 name = "qs8_gemm_minmax_fp32_test",
10914 timeout = "moderate",
10915 srcs = [
10916 "test/qs8-gemm-minmax-fp32.cc",
10917 "test/gemm-microkernel-tester.h",
10918 "src/xnnpack/AlignedAllocator.h",
10919 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Alan Kelly66210582021-11-23 00:57:36 -080010920 shard_count = 10,
Marat Dukhane903dff2021-07-16 19:43:41 -070010921 deps = MICROKERNEL_TEST_DEPS + [":packing"],
10922)
10923
10924xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -070010925 name = "qs8_gemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -070010926 timeout = "moderate",
10927 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -070010928 "test/qs8-gemm-minmax-rndnu.cc",
10929 "test/gemm-microkernel-tester.h",
10930 "src/xnnpack/AlignedAllocator.h",
10931 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
10932 deps = MICROKERNEL_TEST_DEPS + [":packing"],
10933)
10934
10935xnnpack_unit_test(
10936 name = "qs8_igemm_minmax_fp32_test",
10937 timeout = "moderate",
10938 srcs = [
10939 "test/qs8-igemm-minmax-fp32.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -070010940 "test/gemm-microkernel-tester.h",
10941 "src/xnnpack/AlignedAllocator.h",
10942 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Alan Kelly66210582021-11-23 00:57:36 -080010943 shard_count = 10,
Marat Dukhan9b474cf2021-05-25 16:37:48 -070010944 deps = MICROKERNEL_TEST_DEPS + [":packing"],
10945)
10946
10947xnnpack_unit_test(
Marat Dukhane903dff2021-07-16 19:43:41 -070010948 name = "qs8_igemm_minmax_rndnu_test",
Marat Dukhan9b474cf2021-05-25 16:37:48 -070010949 timeout = "moderate",
10950 srcs = [
Marat Dukhane903dff2021-07-16 19:43:41 -070010951 "test/qs8-igemm-minmax-rndnu.cc",
Marat Dukhan9b474cf2021-05-25 16:37:48 -070010952 "test/gemm-microkernel-tester.h",
10953 "src/xnnpack/AlignedAllocator.h",
10954 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
10955 deps = MICROKERNEL_TEST_DEPS + [":packing"],
10956)
10957
10958xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -070010959 name = "qs8_requantization_test",
10960 srcs = [
10961 "src/xnnpack/requantization-stubs.h",
10962 "test/qs8-requantization.cc",
10963 "test/requantization-tester.h",
10964 ] + MICROKERNEL_TEST_HDRS,
10965 deps = MICROKERNEL_TEST_DEPS,
10966)
10967
10968xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -070010969 name = "qs8_vadd_minmax_test",
10970 srcs = [
10971 "test/qs8-vadd-minmax.cc",
10972 "test/vadd-microkernel-tester.h",
10973 ] + MICROKERNEL_TEST_HDRS,
10974 deps = MICROKERNEL_TEST_DEPS,
10975)
10976
10977xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -070010978 name = "qs8_vaddc_minmax_test",
10979 srcs = [
10980 "test/qs8-vaddc-minmax.cc",
10981 "test/vaddc-microkernel-tester.h",
10982 ] + MICROKERNEL_TEST_HDRS,
10983 deps = MICROKERNEL_TEST_DEPS,
10984)
10985
10986xnnpack_unit_test(
Marat Dukhana212eac2021-08-02 09:58:04 -070010987 name = "qs8_vmul_minmax_fp32_test",
10988 srcs = [
10989 "test/qs8-vmul-minmax-fp32.cc",
10990 "test/vmul-microkernel-tester.h",
10991 ] + MICROKERNEL_TEST_HDRS,
10992 deps = MICROKERNEL_TEST_DEPS,
10993)
10994
10995xnnpack_unit_test(
10996 name = "qs8_vmulc_minmax_fp32_test",
10997 srcs = [
10998 "test/qs8-vmulc-minmax-fp32.cc",
10999 "test/vmulc-microkernel-tester.h",
11000 ] + MICROKERNEL_TEST_HDRS,
11001 deps = MICROKERNEL_TEST_DEPS,
11002)
11003
11004xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -070011005 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011006 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -070011007 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011008 "test/avgpool-microkernel-tester.h",
11009 "src/xnnpack/AlignedAllocator.h",
11010 ] + MICROKERNEL_TEST_HDRS,
11011 deps = MICROKERNEL_TEST_DEPS,
11012)
11013
11014xnnpack_unit_test(
Marat Dukhan3c35f7a2021-07-08 18:55:42 -070011015 name = "qu8_dwconv_minmax_fp32_test",
11016 srcs = [
11017 "test/qu8-dwconv-minmax-fp32.cc",
11018 "test/dwconv-microkernel-tester.h",
11019 "src/xnnpack/AlignedAllocator.h",
11020 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
11021 deps = MICROKERNEL_TEST_DEPS + [":packing"],
11022)
11023
11024xnnpack_unit_test(
Marat Dukhan73a899a2021-07-27 00:10:38 -070011025 name = "qu8_dwconv_minmax_rndnu_test",
11026 srcs = [
11027 "test/qu8-dwconv-minmax-rndnu.cc",
11028 "test/dwconv-microkernel-tester.h",
11029 "src/xnnpack/AlignedAllocator.h",
11030 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
11031 deps = MICROKERNEL_TEST_DEPS + [":packing"],
11032)
11033
11034xnnpack_unit_test(
Marat Dukhanfee66be2021-12-09 17:51:15 -080011035 name = "qu8_f32_vcvt_test",
11036 srcs = [
11037 "test/qu8-f32-vcvt.cc",
11038 "test/vcvt-microkernel-tester.h",
11039 ] + MICROKERNEL_TEST_HDRS,
11040 deps = MICROKERNEL_TEST_DEPS,
11041)
11042
11043xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -070011044 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011045 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -070011046 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011047 "test/gavgpool-microkernel-tester.h",
11048 "src/xnnpack/AlignedAllocator.h",
11049 ] + MICROKERNEL_TEST_HDRS,
11050 deps = MICROKERNEL_TEST_DEPS,
11051)
11052
11053xnnpack_unit_test(
Marat Dukhanef47f8d2021-07-02 15:08:32 -070011054 name = "qu8_gemm_minmax_fp32_test",
11055 srcs = [
11056 "test/qu8-gemm-minmax-fp32.cc",
11057 "test/gemm-microkernel-tester.h",
11058 "src/xnnpack/AlignedAllocator.h",
11059 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Alan Kelly66210582021-11-23 00:57:36 -080011060 shard_count = 10,
Marat Dukhanef47f8d2021-07-02 15:08:32 -070011061 deps = MICROKERNEL_TEST_DEPS + [":packing"],
11062)
11063
11064xnnpack_unit_test(
Marat Dukhan173661d2021-07-26 23:47:08 -070011065 name = "qu8_gemm_minmax_rndnu_test",
11066 srcs = [
11067 "test/qu8-gemm-minmax-rndnu.cc",
11068 "test/gemm-microkernel-tester.h",
11069 "src/xnnpack/AlignedAllocator.h",
11070 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
11071 deps = MICROKERNEL_TEST_DEPS + [":packing"],
11072)
11073
11074xnnpack_unit_test(
11075 name = "qu8_igemm_minmax_fp32_test",
11076 srcs = [
11077 "test/qu8-igemm-minmax-fp32.cc",
11078 "test/gemm-microkernel-tester.h",
11079 "src/xnnpack/AlignedAllocator.h",
11080 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Alan Kelly66210582021-11-23 00:57:36 -080011081 shard_count = 10,
Marat Dukhan173661d2021-07-26 23:47:08 -070011082 deps = MICROKERNEL_TEST_DEPS + [":packing"],
11083)
11084
11085xnnpack_unit_test(
Marat Dukhan173661d2021-07-26 23:47:08 -070011086 name = "qu8_igemm_minmax_rndnu_test",
11087 srcs = [
11088 "test/qu8-igemm-minmax-rndnu.cc",
11089 "test/gemm-microkernel-tester.h",
11090 "src/xnnpack/AlignedAllocator.h",
11091 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
11092 deps = MICROKERNEL_TEST_DEPS + [":packing"],
11093)
11094
11095xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -070011096 name = "qu8_requantization_test",
11097 srcs = [
11098 "src/xnnpack/requantization-stubs.h",
11099 "test/qu8-requantization.cc",
11100 "test/requantization-tester.h",
11101 ] + MICROKERNEL_TEST_HDRS,
11102 deps = MICROKERNEL_TEST_DEPS,
11103)
11104
11105xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -070011106 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011107 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -070011108 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011109 "test/vadd-microkernel-tester.h",
11110 ] + MICROKERNEL_TEST_HDRS,
11111 deps = MICROKERNEL_TEST_DEPS,
11112)
11113
11114xnnpack_unit_test(
Marat Dukhan76e78c82021-07-20 21:11:23 -070011115 name = "qu8_vaddc_minmax_test",
11116 srcs = [
11117 "test/qu8-vaddc-minmax.cc",
11118 "test/vaddc-microkernel-tester.h",
11119 ] + MICROKERNEL_TEST_HDRS,
11120 deps = MICROKERNEL_TEST_DEPS,
11121)
11122
11123xnnpack_unit_test(
Marat Dukhana212eac2021-08-02 09:58:04 -070011124 name = "qu8_vmul_minmax_fp32_test",
11125 srcs = [
11126 "test/qu8-vmul-minmax-fp32.cc",
11127 "test/vmul-microkernel-tester.h",
11128 ] + MICROKERNEL_TEST_HDRS,
11129 deps = MICROKERNEL_TEST_DEPS,
11130)
11131
11132xnnpack_unit_test(
11133 name = "qu8_vmulc_minmax_fp32_test",
11134 srcs = [
11135 "test/qu8-vmulc-minmax-fp32.cc",
11136 "test/vmulc-microkernel-tester.h",
11137 ] + MICROKERNEL_TEST_HDRS,
11138 deps = MICROKERNEL_TEST_DEPS,
11139)
11140
11141xnnpack_unit_test(
Marat Dukhancdb42a52021-11-22 20:09:32 -080011142 name = "s8_ibilinear_test",
11143 srcs = [
11144 "test/s8-ibilinear.cc",
11145 "test/ibilinear-microkernel-tester.h",
11146 "src/xnnpack/AlignedAllocator.h",
11147 ] + MICROKERNEL_TEST_HDRS,
11148 deps = MICROKERNEL_TEST_DEPS,
11149)
11150
11151xnnpack_unit_test(
Marat Dukhan23147532021-08-16 07:26:56 -070011152 name = "s8_maxpool_minmax_test",
11153 srcs = [
11154 "test/s8-maxpool-minmax.cc",
11155 "test/maxpool-microkernel-tester.h",
11156 ] + MICROKERNEL_TEST_HDRS,
11157 deps = MICROKERNEL_TEST_DEPS,
11158)
11159
11160xnnpack_unit_test(
Marat Dukhane79acb72021-08-16 19:03:53 -070011161 name = "s8_vclamp_test",
11162 srcs = [
11163 "test/s8-vclamp.cc",
11164 "test/vunary-microkernel-tester.h",
11165 ] + MICROKERNEL_TEST_HDRS,
11166 deps = MICROKERNEL_TEST_DEPS,
11167)
11168
11169xnnpack_unit_test(
Marat Dukhancdb42a52021-11-22 20:09:32 -080011170 name = "u8_ibilinear_test",
11171 srcs = [
11172 "test/u8-ibilinear.cc",
11173 "test/ibilinear-microkernel-tester.h",
11174 "src/xnnpack/AlignedAllocator.h",
11175 ] + MICROKERNEL_TEST_HDRS,
11176 deps = MICROKERNEL_TEST_DEPS,
11177)
11178
11179xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -070011180 name = "u8_lut32norm_test",
11181 srcs = [
11182 "test/u8-lut32norm.cc",
11183 "test/lut-norm-microkernel-tester.h",
11184 ] + MICROKERNEL_TEST_HDRS,
11185 deps = MICROKERNEL_TEST_DEPS,
11186)
11187
11188xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -070011189 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011190 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -070011191 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011192 "test/maxpool-microkernel-tester.h",
11193 ] + MICROKERNEL_TEST_HDRS,
11194 deps = MICROKERNEL_TEST_DEPS,
11195)
11196
11197xnnpack_unit_test(
11198 name = "u8_rmax_test",
11199 srcs = [
11200 "test/u8-rmax.cc",
11201 "test/rmax-microkernel-tester.h",
11202 ] + MICROKERNEL_TEST_HDRS,
11203 deps = MICROKERNEL_TEST_DEPS,
11204)
11205
11206xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -070011207 name = "u8_vclamp_test",
11208 srcs = [
11209 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -070011210 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -070011211 ] + MICROKERNEL_TEST_HDRS,
11212 deps = MICROKERNEL_TEST_DEPS,
11213)
11214
11215xnnpack_unit_test(
Marat Dukhan933051b2021-08-07 16:26:15 -070011216 name = "x8_lut_test",
Yury Kartynnike7841862020-11-04 18:22:18 -080011217 srcs = [
Marat Dukhan933051b2021-08-07 16:26:15 -070011218 "test/x8-lut.cc",
11219 "test/lut-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -080011220 ] + MICROKERNEL_TEST_HDRS,
11221 deps = MICROKERNEL_TEST_DEPS,
11222)
11223
11224xnnpack_unit_test(
Marat Dukhan933051b2021-08-07 16:26:15 -070011225 name = "x8_zip_test",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -070011226 srcs = [
Marat Dukhan933051b2021-08-07 16:26:15 -070011227 "test/x8-zip.cc",
11228 "test/zip-microkernel-tester.h",
11229 ] + MICROKERNEL_TEST_HDRS,
11230 deps = MICROKERNEL_TEST_DEPS,
11231)
11232
11233xnnpack_unit_test(
11234 name = "x32_depthtospace2d_chw2hwc_test",
11235 srcs = [
11236 "test/x32-depthtospace2d-chw2hwc.cc",
11237 "test/depthtospace-microkernel-tester.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -070011238 ] + MICROKERNEL_TEST_HDRS,
11239 deps = MICROKERNEL_TEST_DEPS,
11240)
11241
11242xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -070011243 name = "x32_packx_test",
11244 srcs = [
11245 "test/x32-packx.cc",
11246 "test/pack-microkernel-tester.h",
11247 "src/xnnpack/AlignedAllocator.h",
11248 ] + MICROKERNEL_TEST_HDRS,
11249 deps = MICROKERNEL_TEST_DEPS,
11250)
11251
11252xnnpack_unit_test(
Alan Kellyfda06cb2021-12-15 03:30:32 -080011253 name = "x32_transpose_test",
11254 srcs = [
11255 "test/x32-transpose.cc",
11256 "test/transpose-microkernel-tester.h",
11257 ] + MICROKERNEL_TEST_HDRS,
11258 deps = MICROKERNEL_TEST_DEPS,
11259)
11260
11261xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -070011262 name = "x32_unpool_test",
11263 srcs = [
11264 "test/x32-unpool.cc",
11265 "test/unpool-microkernel-tester.h",
11266 ] + MICROKERNEL_TEST_HDRS,
11267 deps = MICROKERNEL_TEST_DEPS,
11268)
11269
11270xnnpack_unit_test(
11271 name = "x32_zip_test",
11272 srcs = [
11273 "test/x32-zip.cc",
11274 "test/zip-microkernel-tester.h",
11275 ] + MICROKERNEL_TEST_HDRS,
11276 deps = MICROKERNEL_TEST_DEPS,
11277)
11278
11279xnnpack_unit_test(
Marat Dukhan933051b2021-08-07 16:26:15 -070011280 name = "xx_fill_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011281 srcs = [
Marat Dukhan933051b2021-08-07 16:26:15 -070011282 "test/xx-fill.cc",
11283 "test/fill-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011284 ] + MICROKERNEL_TEST_HDRS,
11285 deps = MICROKERNEL_TEST_DEPS,
11286)
11287
Marat Dukhan0461f2d2021-08-08 12:36:29 -070011288xnnpack_unit_test(
11289 name = "xx_pad_test",
11290 srcs = [
11291 "test/xx-pad.cc",
11292 "test/pad-microkernel-tester.h",
11293 ] + MICROKERNEL_TEST_HDRS,
11294 deps = MICROKERNEL_TEST_DEPS,
11295)
11296
Marat Dukhan20c3b922020-03-10 03:45:06 -070011297########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -070011298
11299xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -070011300 name = "operator_size_test",
11301 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -070011302 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -070011303)
11304
Marat Dukhan20c3b922020-03-10 03:45:06 -070011305xnnpack_binary(
11306 name = "subgraph_size_test",
11307 srcs = ["test/subgraph-size.c"],
11308 deps = [":XNNPACK"],
11309)
11310
11311########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -070011312
11313xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -070011314 name = "abs_nc_test",
11315 srcs = [
11316 "test/abs-nc.cc",
11317 "test/abs-operator-tester.h",
11318 ],
11319 deps = OPERATOR_TEST_DEPS,
11320)
11321
11322xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -080011323 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -080011324 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -080011325 srcs = [
11326 "test/add-nd.cc",
11327 "test/binary-elementwise-operator-tester.h",
11328 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011329 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -080011330)
11331
11332xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011333 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011334 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011335 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011336 "test/argmax-pooling-operator-tester.h",
11337 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -070011338 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011339)
11340
11341xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011342 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011343 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011344 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011345 "test/average-pooling-operator-tester.h",
11346 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -070011347 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011348)
11349
11350xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -070011351 name = "bankers_rounding_nc_test",
11352 srcs = [
11353 "test/bankers-rounding-nc.cc",
11354 "test/bankers-rounding-operator-tester.h",
11355 ],
11356 deps = OPERATOR_TEST_DEPS,
11357)
11358
11359xnnpack_unit_test(
11360 name = "ceiling_nc_test",
11361 srcs = [
11362 "test/ceiling-nc.cc",
11363 "test/ceiling-operator-tester.h",
11364 ],
11365 deps = OPERATOR_TEST_DEPS,
11366)
11367
11368xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011369 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011370 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011371 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011372 "test/channel-shuffle-operator-tester.h",
11373 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011374 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011375)
11376
11377xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011378 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011379 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011380 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011381 "test/clamp-operator-tester.h",
11382 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011383 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011384)
11385
11386xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -070011387 name = "constant_pad_nd_test",
11388 srcs = [
11389 "test/constant-pad-nd.cc",
11390 "test/constant-pad-operator-tester.h",
11391 ],
11392 deps = OPERATOR_TEST_DEPS,
11393)
11394
11395xnnpack_unit_test(
Marat Dukhanaf2ba002021-10-24 14:21:41 -070011396 name = "convert_nc_test",
11397 srcs = [
11398 "test/convert-nc.cc",
11399 "test/convert-operator-tester.h",
11400 ],
11401 deps = OPERATOR_TEST_DEPS,
11402)
11403
11404xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011405 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -080011406 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011407 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011408 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011409 "test/convolution-operator-tester.h",
11410 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011411 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011412)
11413
11414xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011415 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -080011416 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011417 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011418 "test/convolution-nchw.cc",
11419 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011420 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011421 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011422)
11423
11424xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -070011425 name = "copy_nc_test",
11426 srcs = [
11427 "test/copy-nc.cc",
11428 "test/copy-operator-tester.h",
11429 ],
11430 deps = OPERATOR_TEST_DEPS,
11431)
11432
11433xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011434 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -080011435 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011436 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011437 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011438 "test/deconvolution-operator-tester.h",
11439 ] + OPERATOR_TEST_PARAMS_HDRS,
Alan Kelly66210582021-11-23 00:57:36 -080011440 shard_count = 10,
Marat Dukhan1b354632020-03-23 12:50:22 -070011441 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011442)
11443
11444xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -080011445 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -080011446 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -080011447 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -080011448 "test/depth-to-space-operator-tester.h",
11449 ] + OPERATOR_TEST_PARAMS_HDRS,
11450 deps = OPERATOR_TEST_DEPS,
11451)
11452
11453xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -080011454 name = "depth_to_space_nhwc_test",
11455 srcs = [
11456 "test/depth-to-space-nhwc.cc",
11457 "test/depth-to-space-operator-tester.h",
11458 ] + OPERATOR_TEST_PARAMS_HDRS,
11459 deps = OPERATOR_TEST_DEPS,
11460)
11461
11462xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -080011463 name = "divide_nd_test",
11464 srcs = [
11465 "test/binary-elementwise-operator-tester.h",
11466 "test/divide-nd.cc",
11467 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011468 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -080011469)
11470
11471xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -080011472 name = "elu_nc_test",
11473 srcs = [
11474 "test/elu-nc.cc",
11475 "test/elu-operator-tester.h",
11476 ],
11477 deps = OPERATOR_TEST_DEPS,
11478)
11479
11480xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011481 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011482 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011483 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011484 "test/fully-connected-operator-tester.h",
11485 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011486 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011487)
11488
11489xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -070011490 name = "floor_nc_test",
11491 srcs = [
11492 "test/floor-nc.cc",
11493 "test/floor-operator-tester.h",
11494 ],
11495 deps = OPERATOR_TEST_DEPS,
11496)
11497
11498xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011499 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011500 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011501 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011502 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -070011503 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -070011504 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011505)
11506
11507xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011508 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011509 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011510 "test/global-average-pooling-ncw.cc",
11511 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011512 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011513 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011514)
11515
11516xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011517 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011518 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011519 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011520 "test/hardswish-operator-tester.h",
11521 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011522 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011523)
11524
11525xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011526 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011527 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011528 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011529 "test/leaky-relu-operator-tester.h",
11530 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011531 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011532)
11533
11534xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011535 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -080011536 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011537 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011538 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011539 "test/max-pooling-operator-tester.h",
11540 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -070011541 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011542)
11543
11544xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -080011545 name = "maximum_nd_test",
11546 srcs = [
11547 "test/binary-elementwise-operator-tester.h",
11548 "test/maximum-nd.cc",
11549 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011550 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -080011551)
11552
11553xnnpack_unit_test(
11554 name = "minimum_nd_test",
11555 srcs = [
11556 "test/binary-elementwise-operator-tester.h",
11557 "test/minimum-nd.cc",
11558 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011559 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -080011560)
11561
11562xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011563 name = "multiply_nd_test",
Marat Dukhancf557d42021-08-10 23:28:38 -070011564 timeout = "moderate",
Marat Dukhanca2733c2019-11-15 23:21:17 -080011565 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -080011566 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -080011567 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -080011568 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011569 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -080011570)
11571
11572xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -070011573 name = "negate_nc_test",
11574 srcs = [
11575 "test/negate-nc.cc",
11576 "test/negate-operator-tester.h",
11577 ],
11578 deps = OPERATOR_TEST_DEPS,
11579)
11580
11581xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011582 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011583 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011584 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011585 "test/prelu-operator-tester.h",
11586 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -070011587 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011588)
11589
11590xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011591 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -080011592 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011593 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -080011594 "test/resize-bilinear-operator-tester.h",
11595 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -070011596 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -080011597)
11598
11599xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -070011600 name = "resize_bilinear_nchw_test",
11601 srcs = [
11602 "test/resize-bilinear-nchw.cc",
11603 "test/resize-bilinear-operator-tester.h",
11604 ] + OPERATOR_TEST_PARAMS_HDRS,
11605 deps = OPERATOR_TEST_DEPS,
11606)
11607
11608xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011609 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011610 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011611 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011612 "test/sigmoid-operator-tester.h",
11613 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011614 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011615)
11616
11617xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -080011618 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011619 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -080011620 "test/softmax-nc.cc",
11621 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011622 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011623 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011624)
11625
11626xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -070011627 name = "square_nc_test",
11628 srcs = [
11629 "test/square-nc.cc",
11630 "test/square-operator-tester.h",
11631 ],
11632 deps = OPERATOR_TEST_DEPS,
11633)
11634
11635xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -070011636 name = "square_root_nc_test",
11637 srcs = [
11638 "test/square-root-nc.cc",
11639 "test/square-root-operator-tester.h",
11640 ],
11641 deps = OPERATOR_TEST_DEPS,
11642)
11643
11644xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -070011645 name = "squared_difference_nd_test",
11646 srcs = [
11647 "test/binary-elementwise-operator-tester.h",
11648 "test/squared-difference-nd.cc",
11649 ],
11650 deps = OPERATOR_TEST_DEPS,
11651)
11652
11653xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -080011654 name = "subtract_nd_test",
11655 srcs = [
11656 "test/binary-elementwise-operator-tester.h",
11657 "test/subtract-nd.cc",
11658 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011659 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -080011660)
11661
11662xnnpack_unit_test(
Marat Dukhan5de7bc02021-09-09 19:04:01 -070011663 name = "tanh_nc_test",
11664 srcs = [
11665 "test/tanh-nc.cc",
11666 "test/tanh-operator-tester.h",
11667 ],
11668 deps = OPERATOR_TEST_DEPS,
11669)
11670
11671xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -070011672 name = "truncation_nc_test",
11673 srcs = [
11674 "test/truncation-nc.cc",
11675 "test/truncation-operator-tester.h",
11676 ],
11677 deps = OPERATOR_TEST_DEPS,
11678)
11679
11680xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -080011681 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011682 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -080011683 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011684 "test/unpooling-operator-tester.h",
11685 ],
Marat Dukhan1b354632020-03-23 12:50:22 -070011686 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -070011687)
11688
Chao Mei6ddfc602020-05-13 22:29:36 -070011689############################### Misc unit tests ###############################
11690
11691xnnpack_unit_test(
11692 name = "memory_planner_test",
11693 srcs = [
11694 "test/memory-planner-test.cc",
11695 ],
11696 deps = [
11697 ":XNNPACK",
11698 ":memory_planner",
11699 ],
11700)
11701
XNNPACK Teamab8c4c82020-10-09 08:05:51 -070011702xnnpack_unit_test(
11703 name = "subgraph_nchw_test",
11704 srcs = [
11705 "src/xnnpack/subgraph.h",
11706 "test/subgraph-nchw.cc",
11707 "test/subgraph-tester.h",
11708 ],
11709 deps = [
11710 ":XNNPACK",
11711 ],
11712)
11713
Zhi An Ngb559fe92021-12-06 09:25:38 -080011714xnnpack_unit_test(
11715 name = "aarch32_assembler_test",
11716 srcs = [
11717 "test/aarch32-assembler.cc",
11718 ],
11719 deps = [
Zhi An Ng6883abb2021-12-14 10:13:18 -080011720 ":XNNPACK",
11721 ":jit_test_mode",
Zhi An Ngb559fe92021-12-06 09:25:38 -080011722 ],
11723)
11724
Marat Dukhan08c4a432019-10-03 09:29:21 -070011725############################# Build configurations #############################
11726
Marat Dukhanb8642352019-10-30 15:43:02 -070011727# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -070011728config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -070011729 name = "xnn_enable_assembly_explicit_true",
11730 define_values = {"xnn_enable_assembly": "true"},
11731)
11732
11733# Disables usage of assembly kernels.
11734config_setting(
11735 name = "xnn_enable_assembly_explicit_false",
11736 define_values = {"xnn_enable_assembly": "false"},
11737)
11738
Marat Dukhan9de90e02020-06-18 16:04:12 -070011739# Enables usage of sparse inference.
11740config_setting(
11741 name = "xnn_enable_sparse_explicit_true",
11742 define_values = {"xnn_enable_sparse": "true"},
11743)
11744
11745# Disables usage of sparse inference.
11746config_setting(
11747 name = "xnn_enable_sparse_explicit_false",
11748 define_values = {"xnn_enable_sparse": "false"},
11749)
11750
Marat Dukhan05702cf2020-03-26 15:41:33 -070011751# Disables usage of HMP-aware optimizations.
11752config_setting(
11753 name = "xnn_enable_hmp_explicit_false",
11754 define_values = {"xnn_enable_hmp": "false"},
11755)
11756
Chao Mei6ddfc602020-05-13 22:29:36 -070011757# Enable usage of optimized memory allocation
11758config_setting(
11759 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -070011760 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -070011761)
11762
11763# Disable usage of optimized memory allocation
11764config_setting(
11765 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -070011766 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -070011767)
11768
Marat Dukhanb939cdb2021-03-30 18:51:51 -070011769# Enable QS8 inference in TFLite-specific version
11770config_setting(
11771 name = "xnn_enable_qs8_explicit_true",
11772 define_values = {"xnn_enable_qs8": "true"},
11773)
11774
11775# Disable QS8 inference in TFLite-specific version
11776config_setting(
11777 name = "xnn_enable_qs8_explicit_false",
11778 define_values = {"xnn_enable_qs8": "false"},
11779)
11780
Marat Dukhan8c8c1592021-07-13 13:59:02 -070011781# Enable QU8 inference in TFLite-specific version
11782config_setting(
11783 name = "xnn_enable_qu8_explicit_true",
11784 define_values = {"xnn_enable_qu8": "true"},
11785)
11786
11787# Disable QU8 inference in TFLite-specific version
11788config_setting(
11789 name = "xnn_enable_qu8_explicit_false",
11790 define_values = {"xnn_enable_qu8": "false"},
11791)
11792
Marat Dukhan189c1d02021-09-03 15:39:54 -070011793# Target Chrome M87 instructions in WAsm SIMD build
11794config_setting(
11795 name = "xnn_wasmsimd_version_m87",
11796 define_values = {"xnn_wasmsimd_version": "m87"},
11797)
11798
11799# Target Chrome M88 instructions in WAsm SIMD build
11800config_setting(
11801 name = "xnn_wasmsimd_version_m88",
11802 define_values = {"xnn_wasmsimd_version": "m88"},
11803)
11804
11805# Target Chrome M91 instructions in WAsm SIMD build
11806config_setting(
11807 name = "xnn_wasmsimd_version_m91",
11808 define_values = {"xnn_wasmsimd_version": "m91"},
11809)
11810
Marat Dukhanb8642352019-10-30 15:43:02 -070011811# Builds with -c dbg
11812config_setting(
11813 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011814 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -070011815 "compilation_mode": "dbg",
11816 },
11817)
11818
11819# Builds with -c opt
11820config_setting(
11821 name = "optimized_build",
11822 values = {
11823 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011824 },
11825)
11826
11827config_setting(
Marat Dukhan52e44432021-08-20 11:58:11 -070011828 name = "linux_arm64",
11829 values = {"cpu": "aarch64"},
11830)
11831
11832config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -070011833 name = "linux_k8",
11834 values = {"cpu": "k8"},
11835)
11836
11837config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -070011838 name = "linux_arm",
11839 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -070011840)
11841
11842config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -070011843 name = "linux_armeabi",
11844 values = {"cpu": "armeabi"},
11845)
11846
11847config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -070011848 name = "linux_armhf",
11849 values = {"cpu": "armhf"},
11850)
11851
11852config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -070011853 name = "linux_armv7a",
11854 values = {"cpu": "armv7a"},
11855)
11856
11857config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -070011858 name = "android",
11859 values = {"crosstool_top": "//external:android/crosstool"},
11860)
11861
11862config_setting(
11863 name = "android_armv7",
11864 values = {
11865 "crosstool_top": "//external:android/crosstool",
11866 "cpu": "armeabi-v7a",
11867 },
11868)
11869
11870config_setting(
11871 name = "android_arm64",
11872 values = {
11873 "crosstool_top": "//external:android/crosstool",
11874 "cpu": "arm64-v8a",
11875 },
11876)
11877
11878config_setting(
11879 name = "android_x86",
11880 values = {
11881 "crosstool_top": "//external:android/crosstool",
11882 "cpu": "x86",
11883 },
11884)
11885
11886config_setting(
11887 name = "android_x86_64",
11888 values = {
11889 "crosstool_top": "//external:android/crosstool",
11890 "cpu": "x86_64",
11891 },
11892)
11893
11894config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -070011895 name = "windows_x86_64",
11896 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -070011897)
11898
11899config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -070011900 name = "windows_x86_64_clang",
11901 values = {
11902 "compiler": "clang-cl",
11903 "cpu": "x64_windows",
11904 },
11905)
11906
11907config_setting(
11908 name = "windows_x86_64_mingw",
11909 values = {
11910 "compiler": "mingw-gcc",
11911 "cpu": "x64_windows",
11912 },
11913)
11914
11915config_setting(
11916 name = "windows_x86_64_msys",
11917 values = {
11918 "compiler": "msys-gcc",
11919 "cpu": "x64_windows",
11920 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -070011921)
11922
11923config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -070011924 name = "macos_x86_64",
11925 values = {
11926 "apple_platform_type": "macos",
11927 "cpu": "darwin",
11928 },
11929)
11930
11931config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +010011932 name = "macos_arm64",
11933 values = {
11934 "apple_platform_type": "macos",
11935 "cpu": "darwin_arm64",
11936 },
11937)
11938
11939config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -070011940 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -070011941 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -070011942)
11943
11944config_setting(
11945 name = "emscripten_wasm",
11946 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -070011947 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011948 "cpu": "wasm",
11949 },
11950)
11951
11952config_setting(
11953 name = "emscripten_wasmsimd",
11954 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -070011955 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011956 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -070011957 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -070011958 },
11959)
11960
11961config_setting(
Marat Dukhan19bfefe2021-12-21 19:16:06 -080011962 name = "emscripten_wasmrelaxedsimd",
Marat Dukhan4c617792021-12-21 15:47:58 -080011963 values = {
Marat Dukhan19bfefe2021-12-21 19:16:06 -080011964 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan4c617792021-12-21 15:47:58 -080011965 "cpu": "wasm",
Marat Dukhan19bfefe2021-12-21 19:16:06 -080011966 "copt": "-msimd128",
Marat Dukhan4c617792021-12-21 15:47:58 -080011967 "copt": "-mrelaxed-simd",
Marat Dukhan4c617792021-12-21 15:47:58 -080011968 },
11969)
11970
11971config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -080011972 name = "ios_armv7",
11973 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080011974 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080011975 "cpu": "ios_armv7",
11976 },
11977)
11978
11979config_setting(
11980 name = "ios_arm64",
11981 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080011982 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080011983 "cpu": "ios_arm64",
11984 },
11985)
11986
11987config_setting(
11988 name = "ios_arm64e",
11989 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080011990 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080011991 "cpu": "ios_arm64e",
11992 },
11993)
11994
11995config_setting(
11996 name = "ios_x86",
11997 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080011998 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080011999 "cpu": "ios_i386",
12000 },
12001)
12002
12003config_setting(
12004 name = "ios_x86_64",
12005 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080012006 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080012007 "cpu": "ios_x86_64",
12008 },
12009)
12010
12011config_setting(
12012 name = "watchos_armv7k",
12013 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080012014 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080012015 "cpu": "watchos_armv7k",
12016 },
12017)
12018
12019config_setting(
12020 name = "watchos_arm64_32",
12021 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080012022 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080012023 "cpu": "watchos_arm64_32",
12024 },
12025)
12026
12027config_setting(
12028 name = "watchos_x86",
12029 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080012030 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080012031 "cpu": "watchos_i386",
12032 },
12033)
12034
12035config_setting(
12036 name = "watchos_x86_64",
12037 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080012038 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080012039 "cpu": "watchos_x86_64",
12040 },
12041)
12042
12043config_setting(
12044 name = "tvos_arm64",
12045 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080012046 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080012047 "cpu": "tvos_arm64",
12048 },
12049)
12050
12051config_setting(
12052 name = "tvos_x86_64",
12053 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -080012054 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -080012055 "cpu": "tvos_x86_64",
12056 },
12057)