| Frank Barchard | 1a95305 | 2020-11-16 18:44:58 -0800 | [diff] [blame] | 1 | # Copyright 2020 Google LLC |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2 | # |
| 3 | # This source code is licensed under the BSD-style license found in the |
| 4 | # LICENSE file in the root directory of this source tree. |
| 5 | # |
| 6 | # Description: |
| 7 | # XNNPACK - optimized floating-point neural network operators library |
| 8 | |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9 | load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility") |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 10 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11 | licenses(["notice"]) |
| 12 | |
| 13 | exports_files(["LICENSE"]) |
| 14 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 15 | OPERATOR_BENCHMARK_DEPS = [ |
| 16 | ":XNNPACK", |
| 17 | ":bench_utils", |
| 18 | "@cpuinfo", |
| Frank Barchard | 0c84973 | 2020-06-12 13:31:32 -0700 | [diff] [blame] | 19 | "@FP16", |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 20 | "@pthreadpool", |
| 21 | ] |
| 22 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 23 | MICROKERNEL_BENCHMARK_DEPS = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 24 | ":bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 25 | ":bench_utils", |
| Frank Barchard | 7e95597 | 2019-10-11 10:34:25 -0700 | [diff] [blame] | 26 | ":enable_assembly", |
| Zhi An Ng | 25764d8 | 2022-01-07 11:27:36 -0800 | [diff] [blame] | 27 | ":enable_jit", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 28 | "@cpuinfo", |
| 29 | "@FP16", |
| 30 | "@pthreadpool", |
| 31 | ] |
| 32 | |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 33 | ACCURACY_EVAL_DEPS = [ |
| 34 | ":XNNPACK", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 35 | ":bench_microkernels", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 36 | "@FP16", |
| 37 | "@pthreadpool", |
| 38 | ] |
| 39 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 40 | MICROKERNEL_TEST_DEPS = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 41 | ":test_microkernels", |
| Frank Barchard | 7e95597 | 2019-10-11 10:34:25 -0700 | [diff] [blame] | 42 | ":enable_assembly", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 43 | "@cpuinfo", |
| 44 | "@FP16", |
| 45 | "@pthreadpool", |
| 46 | ] |
| 47 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 48 | OPERATOR_TEST_DEPS = [ |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 49 | ":XNNPACK_test_mode", |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 50 | "@pthreadpool", |
| 51 | "@FP16", |
| 52 | ] |
| 53 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 54 | OPERATOR_SRCS = [ |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 55 | "src/operators/argmax-pooling-nhwc.c", |
| 56 | "src/operators/average-pooling-nhwc.c", |
| 57 | "src/operators/binary-elementwise-nd.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 58 | "src/operators/channel-shuffle-nc.c", |
| Marat Dukhan | 065b11e | 2020-05-22 09:49:41 -0700 | [diff] [blame] | 59 | "src/operators/constant-pad-nd.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 60 | "src/operators/convolution-nchw.c", |
| 61 | "src/operators/convolution-nhwc.c", |
| 62 | "src/operators/deconvolution-nhwc.c", |
| Marat Dukhan | 13b68f2 | 2020-11-12 11:55:19 -0800 | [diff] [blame] | 63 | "src/operators/depth-to-space-nchw2nhwc.c", |
| Marat Dukhan | 0e52117 | 2020-11-25 13:10:04 -0800 | [diff] [blame] | 64 | "src/operators/depth-to-space-nhwc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 65 | "src/operators/fully-connected-nc.c", |
| 66 | "src/operators/global-average-pooling-ncw.c", |
| 67 | "src/operators/global-average-pooling-nwc.c", |
| Marat Dukhan | f6c991e | 2021-09-09 01:10:40 -0700 | [diff] [blame] | 68 | "src/operators/lut-elementwise-nc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 69 | "src/operators/max-pooling-nhwc.c", |
| 70 | "src/operators/prelu-nc.c", |
| Artsiom Ablavatski | 9791810 | 2020-10-27 15:52:59 -0700 | [diff] [blame] | 71 | "src/operators/resize-bilinear-nchw.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 72 | "src/operators/resize-bilinear-nhwc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 73 | "src/operators/softmax-nc.c", |
| Marat Dukhan | c3065f5 | 2020-06-04 13:33:32 -0700 | [diff] [blame] | 74 | "src/operators/unary-elementwise-nc.c", |
| Marat Dukhan | e826543 | 2020-04-28 18:42:59 -0700 | [diff] [blame] | 75 | "src/operators/unpooling-nhwc.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 76 | ] |
| 77 | |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 78 | SUBGRAPH_SRCS = [ |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 79 | "src/subgraph/abs.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 80 | "src/subgraph/add2.c", |
| 81 | "src/subgraph/argmax-pooling-2d.c", |
| 82 | "src/subgraph/average-pooling-2d.c", |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 83 | "src/subgraph/bankers-rounding.c", |
| 84 | "src/subgraph/ceiling.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 85 | "src/subgraph/clamp.c", |
| Marat Dukhan | 20483c7 | 2021-12-05 09:56:40 -0800 | [diff] [blame] | 86 | "src/subgraph/convert.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 87 | "src/subgraph/convolution-2d.c", |
| 88 | "src/subgraph/deconvolution-2d.c", |
| Artsiom Ablavatski | bbe8506 | 2020-11-05 14:07:37 -0800 | [diff] [blame] | 89 | "src/subgraph/depth-to-space.c", |
| Frank Barchard | 9cef5ea | 2020-11-18 14:52:08 -0800 | [diff] [blame] | 90 | "src/subgraph/depthwise-convolution-2d.c", |
| Marat Dukhan | 9d3a459 | 2020-06-05 16:52:42 -0700 | [diff] [blame] | 91 | "src/subgraph/divide.c", |
| Marat Dukhan | a160020 | 2020-12-01 22:17:16 -0800 | [diff] [blame] | 92 | "src/subgraph/elu.c", |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 93 | "src/subgraph/floor.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 94 | "src/subgraph/fully-connected.c", |
| Marat Dukhan | a059b7d | 2020-06-11 11:41:27 -0700 | [diff] [blame] | 95 | "src/subgraph/global-average-pooling-2d.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 96 | "src/subgraph/hardswish.c", |
| Marat Dukhan | 5bbebac | 2020-06-10 19:42:15 -0700 | [diff] [blame] | 97 | "src/subgraph/leaky-relu.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 98 | "src/subgraph/max-pooling-2d.c", |
| Marat Dukhan | 9d3a459 | 2020-06-05 16:52:42 -0700 | [diff] [blame] | 99 | "src/subgraph/maximum2.c", |
| 100 | "src/subgraph/minimum2.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 101 | "src/subgraph/multiply2.c", |
| Marat Dukhan | 5fab409 | 2020-06-10 01:28:28 -0700 | [diff] [blame] | 102 | "src/subgraph/negate.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 103 | "src/subgraph/prelu.c", |
| 104 | "src/subgraph/sigmoid.c", |
| 105 | "src/subgraph/softmax.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 106 | "src/subgraph/square-root.c", |
| 107 | "src/subgraph/square.c", |
| 108 | "src/subgraph/squared-difference.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 109 | "src/subgraph/static-constant-pad.c", |
| Marat Dukhan | d27202d | 2020-07-09 23:43:40 -0700 | [diff] [blame] | 110 | "src/subgraph/static-reshape.c", |
| Marat Dukhan | aff24e2 | 2020-07-23 01:43:58 -0700 | [diff] [blame] | 111 | "src/subgraph/static-resize-bilinear-2d.c", |
| Marat Dukhan | 9d3a459 | 2020-06-05 16:52:42 -0700 | [diff] [blame] | 112 | "src/subgraph/subtract.c", |
| Marat Dukhan | 95e8b7a | 2020-06-03 12:46:26 -0700 | [diff] [blame] | 113 | "src/subgraph/unpooling-2d.c", |
| 114 | ] |
| 115 | |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 116 | TABLE_SRCS = [ |
| 117 | "src/tables/exp2-k-over-64.c", |
| 118 | "src/tables/exp2-k-over-2048.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 119 | "src/tables/exp2minus-k-over-4.c", |
| 120 | "src/tables/exp2minus-k-over-8.c", |
| Marat Dukhan | c60742b | 2020-11-23 12:33:27 -0800 | [diff] [blame] | 121 | "src/tables/exp2minus-k-over-16.c", |
| Marat Dukhan | 1f256fc | 2020-09-24 21:27:14 -0700 | [diff] [blame] | 122 | "src/tables/exp2minus-k-over-64.c", |
| 123 | "src/tables/exp2minus-k-over-2048.c", |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 124 | ] |
| 125 | |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 126 | PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS = [ |
| 127 | "src/params-init.c", |
| 128 | "src/u8-lut32norm/scalar.c", |
| 129 | "src/x8-lut/gen/lut-scalar-x4.c", |
| 130 | "src/x32-depthtospace2d-chw2hwc/scalar.c", |
| 131 | "src/xx-copy/memcpy.c", |
| 132 | ] |
| 133 | |
| 134 | PROD_SCALAR_AARCH32_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 134f984 | 2021-12-29 19:57:31 -0800 | [diff] [blame] | 135 | "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 136 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 137 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 138 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| 139 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 140 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| 141 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 142 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| 143 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 144 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 145 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| Frank Barchard | 66ae257 | 2021-11-02 17:36:21 -0700 | [diff] [blame] | 146 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 147 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 148 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 149 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 150 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 151 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 152 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 153 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 154 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 155 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 156 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 157 | "src/f32-gavgpool-cw/scalar-x1.c", |
| 158 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 159 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 160 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| 161 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 162 | "src/f32-gemm/gen/1x4-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 163 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 164 | "src/f32-gemm/gen/4x2-scalar.c", |
| 165 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| 166 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 167 | "src/f32-gemm/gen/4x4-scalar.c", |
| 168 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| 169 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 170 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| 171 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 172 | "src/f32-igemm/gen/1x4-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 173 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 174 | "src/f32-igemm/gen/4x2-scalar.c", |
| 175 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| 176 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 177 | "src/f32-igemm/gen/4x4-scalar.c", |
| 178 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 179 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 180 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 181 | "src/f32-prelu/gen/scalar-2x4.c", |
| Marat Dukhan | bdf1099 | 2022-01-04 09:20:14 -0800 | [diff] [blame] | 182 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| 183 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 184 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 185 | "src/f32-rmax/scalar.c", |
| 186 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 187 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 188 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 189 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 190 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 191 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 192 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 193 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| 194 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| 195 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| 196 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| 197 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 198 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| 199 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 200 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 201 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| 202 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| 203 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 204 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 205 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| 206 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 207 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| 208 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| 209 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 210 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| 211 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 212 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 213 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 214 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 215 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 216 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 217 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 218 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 219 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 220 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| 221 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| 222 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 223 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 224 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 225 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 226 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| 227 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 228 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 229 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 230 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 231 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 232 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 233 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 234 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 235 | "src/qs8-vadd/gen/minmax-scalar-x1.c", |
| 236 | "src/qs8-vaddc/gen/minmax-scalar-x1.c", |
| 237 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 238 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 239 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 240 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 241 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| 242 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 243 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 244 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 245 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 246 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 247 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 248 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 249 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 250 | "src/qu8-vadd/gen/minmax-scalar-x1.c", |
| 251 | "src/qu8-vaddc/gen/minmax-scalar-x1.c", |
| 252 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 253 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 254 | "src/s8-ibilinear/gen/scalar-c1.c", |
| 255 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| 256 | "src/s8-vclamp/scalar-x4.c", |
| 257 | "src/u8-ibilinear/gen/scalar-c1.c", |
| 258 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| 259 | "src/u8-rmax/scalar.c", |
| 260 | "src/u8-vclamp/scalar-x4.c", |
| 261 | "src/x8-zip/x2-scalar.c", |
| 262 | "src/x8-zip/x3-scalar.c", |
| 263 | "src/x8-zip/x4-scalar.c", |
| 264 | "src/x8-zip/xm-scalar.c", |
| 265 | "src/x32-packx/x2-scalar.c", |
| 266 | "src/x32-packx/x3-scalar.c", |
| 267 | "src/x32-packx/x4-scalar.c", |
| 268 | "src/x32-unpool/scalar.c", |
| 269 | "src/x32-zip/x2-scalar.c", |
| 270 | "src/x32-zip/x3-scalar.c", |
| 271 | "src/x32-zip/x4-scalar.c", |
| 272 | "src/x32-zip/xm-scalar.c", |
| 273 | "src/xx-fill/scalar-x16.c", |
| 274 | "src/xx-pad/scalar.c", |
| 275 | ] |
| 276 | |
| 277 | PROD_SCALAR_WASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 134f984 | 2021-12-29 19:57:31 -0800 | [diff] [blame] | 278 | "src/f16-f32-vcvt/gen/vcvt-scalar-x1.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 279 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 280 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 281 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| 282 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 283 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| 284 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 285 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| 286 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| 287 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| 288 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| 289 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| 290 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 291 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 292 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 293 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 294 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 295 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| 296 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 297 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| 298 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 299 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c", |
| 300 | "src/f32-gavgpool-cw/scalar-x1.c", |
| 301 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 302 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 303 | "src/f32-gemm/gen/2x4-minmax-scalar.c", |
| 304 | "src/f32-gemm/gen/2x4-relu-scalar.c", |
| 305 | "src/f32-gemm/gen/2x4-scalar.c", |
| 306 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| 307 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 308 | "src/f32-igemm/gen/2x4-minmax-scalar.c", |
| 309 | "src/f32-igemm/gen/2x4-relu-scalar.c", |
| 310 | "src/f32-igemm/gen/2x4-scalar.c", |
| 311 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 312 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 313 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 314 | "src/f32-prelu/gen/scalar-2x4.c", |
| Marat Dukhan | bdf1099 | 2022-01-04 09:20:14 -0800 | [diff] [blame] | 315 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| 316 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 317 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 318 | "src/f32-rmax/scalar.c", |
| 319 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 320 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 321 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 322 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 323 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 324 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c", |
| 325 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c", |
| 326 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| 327 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| 328 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| 329 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| 330 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 331 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 332 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c", |
| 333 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 334 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| 335 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| 336 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 337 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 338 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| 339 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 340 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| 341 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| 342 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 343 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 344 | "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 345 | "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 346 | "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 347 | "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 348 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 349 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 350 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 351 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 352 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 353 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 354 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 355 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 356 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 357 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 358 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 359 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 360 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 361 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 362 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c4.c", |
| 363 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c4.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 364 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 365 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 366 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 367 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 368 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| 369 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 370 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 371 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 372 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 373 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 374 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 375 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 376 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 377 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c4.c", |
| 378 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c4.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 379 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 380 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 381 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 382 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 383 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 384 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 385 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 386 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 387 | "src/s8-ibilinear/gen/scalar-c1.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 388 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 389 | "src/s8-vclamp/scalar-x4.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 390 | "src/u8-ibilinear/gen/scalar-c1.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 391 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| 392 | "src/u8-rmax/scalar.c", |
| 393 | "src/u8-vclamp/scalar-x4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 394 | "src/x8-zip/x2-scalar.c", |
| 395 | "src/x8-zip/x3-scalar.c", |
| 396 | "src/x8-zip/x4-scalar.c", |
| 397 | "src/x8-zip/xm-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 398 | "src/x32-packx/x2-scalar.c", |
| 399 | "src/x32-packx/x3-scalar.c", |
| 400 | "src/x32-packx/x4-scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 401 | "src/x32-unpool/scalar.c", |
| 402 | "src/x32-zip/x2-scalar.c", |
| 403 | "src/x32-zip/x3-scalar.c", |
| 404 | "src/x32-zip/x4-scalar.c", |
| 405 | "src/x32-zip/xm-scalar.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 406 | "src/xx-fill/scalar-x16.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 407 | "src/xx-pad/scalar.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 408 | ] |
| 409 | |
| Marat Dukhan | a198f00 | 2022-01-04 18:45:11 -0800 | [diff] [blame] | 410 | PROD_SCALAR_RISCV_MICROKERNEL_SRCS = [ |
| 411 | "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 412 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 413 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 414 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| 415 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 416 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| 417 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 418 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| 419 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| 420 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| 421 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| 422 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| 423 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 424 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 425 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 426 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 427 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 428 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| 429 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 430 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| 431 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 432 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| 433 | "src/f32-gavgpool-cw/scalar-x1.c", |
| 434 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 435 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 436 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| 437 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 438 | "src/f32-gemm/gen/1x4-scalar.c", |
| 439 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| 440 | "src/f32-gemm/gen/4x2-scalar.c", |
| 441 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| 442 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 443 | "src/f32-gemm/gen/4x4-scalar.c", |
| 444 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| 445 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 446 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| 447 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 448 | "src/f32-igemm/gen/1x4-scalar.c", |
| 449 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| 450 | "src/f32-igemm/gen/4x2-scalar.c", |
| 451 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| 452 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 453 | "src/f32-igemm/gen/4x4-scalar.c", |
| 454 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 455 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 456 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 457 | "src/f32-prelu/gen/scalar-2x4.c", |
| 458 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| 459 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 460 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| Marat Dukhan | a198f00 | 2022-01-04 18:45:11 -0800 | [diff] [blame] | 461 | "src/f32-rmax/scalar.c", |
| 462 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 463 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 464 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 465 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 466 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 467 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| 468 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| 469 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| 470 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| 471 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| 472 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| 473 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 474 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| 475 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| 476 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 477 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| 478 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| 479 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 480 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 481 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| 482 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 483 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| 484 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| 485 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 486 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| 487 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 488 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 489 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 490 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| 491 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| 492 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 493 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 494 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 495 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| 496 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 497 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 498 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 499 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 500 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 501 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 502 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 503 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 504 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 505 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 506 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| Marat Dukhan | a198f00 | 2022-01-04 18:45:11 -0800 | [diff] [blame] | 507 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 508 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 509 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 510 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 511 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| 512 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| 513 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 514 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 515 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 516 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| 517 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 518 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 519 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 520 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 521 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| Marat Dukhan | a198f00 | 2022-01-04 18:45:11 -0800 | [diff] [blame] | 522 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 523 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 524 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 525 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 526 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| 527 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| 528 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 529 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 530 | "src/s8-ibilinear/gen/scalar-c1.c", |
| 531 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| 532 | "src/s8-vclamp/scalar-x4.c", |
| 533 | "src/u8-ibilinear/gen/scalar-c1.c", |
| 534 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| 535 | "src/u8-rmax/scalar.c", |
| 536 | "src/u8-vclamp/scalar-x4.c", |
| 537 | "src/x8-zip/x2-scalar.c", |
| 538 | "src/x8-zip/x3-scalar.c", |
| 539 | "src/x8-zip/x4-scalar.c", |
| 540 | "src/x8-zip/xm-scalar.c", |
| 541 | "src/x32-packx/x2-scalar.c", |
| 542 | "src/x32-packx/x3-scalar.c", |
| 543 | "src/x32-packx/x4-scalar.c", |
| 544 | "src/x32-unpool/scalar.c", |
| 545 | "src/x32-zip/x2-scalar.c", |
| 546 | "src/x32-zip/x3-scalar.c", |
| 547 | "src/x32-zip/x4-scalar.c", |
| 548 | "src/x32-zip/xm-scalar.c", |
| 549 | "src/xx-fill/scalar-x16.c", |
| 550 | "src/xx-pad/scalar.c", |
| 551 | ] |
| 552 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 553 | ALL_SCALAR_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 134f984 | 2021-12-29 19:57:31 -0800 | [diff] [blame] | 554 | "src/f16-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 555 | "src/f16-f32-vcvt/gen/vcvt-scalar-x2.c", |
| 556 | "src/f16-f32-vcvt/gen/vcvt-scalar-x3.c", |
| 557 | "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 558 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 559 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 560 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 561 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 562 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 563 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 564 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 565 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 566 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| 567 | "src/f32-dwconv/gen/up1x3-minmax-scalar.c", |
| 568 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| 569 | "src/f32-dwconv/gen/up1x3-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 570 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 571 | "src/f32-dwconv/gen/up1x4-minmax-scalar.c", |
| 572 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 573 | "src/f32-dwconv/gen/up1x4-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 574 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 575 | "src/f32-dwconv/gen/up1x9-minmax-scalar.c", |
| 576 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 577 | "src/f32-dwconv/gen/up1x9-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 578 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 579 | "src/f32-dwconv/gen/up1x25-minmax-scalar.c", |
| 580 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 581 | "src/f32-dwconv/gen/up1x25-scalar.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 582 | "src/f32-dwconv/gen/up2x3-minmax-scalar-acc2.c", |
| 583 | "src/f32-dwconv/gen/up2x3-minmax-scalar.c", |
| 584 | "src/f32-dwconv/gen/up2x3-scalar-acc2.c", |
| 585 | "src/f32-dwconv/gen/up2x3-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 586 | "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 587 | "src/f32-dwconv/gen/up2x4-minmax-scalar.c", |
| 588 | "src/f32-dwconv/gen/up2x4-scalar-acc2.c", |
| 589 | "src/f32-dwconv/gen/up2x4-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 590 | "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 591 | "src/f32-dwconv/gen/up2x9-minmax-scalar.c", |
| 592 | "src/f32-dwconv/gen/up2x9-scalar-acc2.c", |
| 593 | "src/f32-dwconv/gen/up2x9-scalar.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 594 | "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 595 | "src/f32-dwconv/gen/up2x25-minmax-scalar.c", |
| 596 | "src/f32-dwconv/gen/up2x25-scalar-acc2.c", |
| 597 | "src/f32-dwconv/gen/up2x25-scalar.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 598 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c", |
| 599 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c", |
| 600 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c", |
| Marat Dukhan | 91249d2 | 2020-10-24 12:02:51 -0700 | [diff] [blame] | 601 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 602 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| Marat Dukhan | 91249d2 | 2020-10-24 12:02:51 -0700 | [diff] [blame] | 603 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c", |
| 604 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c", |
| 605 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c", |
| 606 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c", |
| 607 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c", |
| Marat Dukhan | cf5b3c3 | 2020-10-25 19:21:10 -0700 | [diff] [blame] | 608 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 609 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c", |
| 610 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 611 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c", |
| Marat Dukhan | cf5b3c3 | 2020-10-25 19:21:10 -0700 | [diff] [blame] | 612 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 613 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c", |
| 614 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c", |
| 615 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c", |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 616 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c", |
| 617 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c", |
| 618 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c", |
| 619 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 620 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c", |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 621 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c", |
| 622 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 623 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c", |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 624 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 625 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c", |
| Marat Dukhan | 29c0c33 | 2020-10-28 22:11:00 -0700 | [diff] [blame] | 626 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c", |
| 627 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c", |
| 628 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c", |
| 629 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 630 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c", |
| 631 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c", |
| 632 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c", |
| 633 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c", |
| 634 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c", |
| 635 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c", |
| Marat Dukhan | 1fe8995 | 2021-11-10 01:27:15 -0800 | [diff] [blame] | 636 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x1.c", |
| 637 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x2.c", |
| 638 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x3.c", |
| 639 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c", |
| 640 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x1.c", |
| 641 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| 642 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x3.c", |
| 643 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x4.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 644 | "src/f32-gavgpool-cw/scalar-x1.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 645 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 646 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 647 | "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c", |
| 648 | "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c", |
| 649 | "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 650 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| 651 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 652 | "src/f32-gemm/gen/1x4-scalar.c", |
| 653 | "src/f32-gemm/gen/2x4-minmax-scalar.c", |
| 654 | "src/f32-gemm/gen/2x4-relu-scalar.c", |
| 655 | "src/f32-gemm/gen/2x4-scalar.c", |
| 656 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| 657 | "src/f32-gemm/gen/4x2-relu-scalar.c", |
| 658 | "src/f32-gemm/gen/4x2-scalar.c", |
| 659 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| 660 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 661 | "src/f32-gemm/gen/4x4-scalar.c", |
| XNNPACK Team | 2143267 | 2020-10-19 19:58:48 -0700 | [diff] [blame] | 662 | "src/f32-ibilinear-chw/gen/scalar-p1.c", |
| 663 | "src/f32-ibilinear-chw/gen/scalar-p2.c", |
| 664 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 665 | "src/f32-ibilinear/gen/scalar-c1.c", |
| 666 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 667 | "src/f32-ibilinear/gen/scalar-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 668 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 669 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 670 | "src/f32-igemm/gen/1x4-scalar.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 671 | "src/f32-igemm/gen/2x4-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 672 | "src/f32-igemm/gen/2x4-relu-scalar.c", |
| 673 | "src/f32-igemm/gen/2x4-scalar.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 674 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 675 | "src/f32-igemm/gen/4x2-relu-scalar.c", |
| 676 | "src/f32-igemm/gen/4x2-scalar.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 677 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 678 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 679 | "src/f32-igemm/gen/4x4-scalar.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 680 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 681 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 682 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 683 | "src/f32-ppmm/gen/2x4-minmax-scalar.c", |
| 684 | "src/f32-ppmm/gen/3x3-minmax-scalar.c", |
| 685 | "src/f32-ppmm/gen/4x2-minmax-scalar.c", |
| 686 | "src/f32-ppmm/gen/4x4-minmax-scalar.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 687 | "src/f32-prelu/gen/scalar-2x1.c", |
| 688 | "src/f32-prelu/gen/scalar-2x4.c", |
| Marat Dukhan | bdf1099 | 2022-01-04 09:20:14 -0800 | [diff] [blame] | 689 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x1.c", |
| 690 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x2.c", |
| 691 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x3.c", |
| 692 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x4.c", |
| 693 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| 694 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x2.c", |
| 695 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x3.c", |
| 696 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| Marat Dukhan | f721e37 | 2022-01-04 10:41:12 -0800 | [diff] [blame] | 697 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x1.c", |
| 698 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x2.c", |
| 699 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x3.c", |
| 700 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| Marat Dukhan | bdf1099 | 2022-01-04 09:20:14 -0800 | [diff] [blame] | 701 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x1.c", |
| 702 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x2.c", |
| 703 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x3.c", |
| 704 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x4.c", |
| 705 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| 706 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x2.c", |
| 707 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x3.c", |
| 708 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| Marat Dukhan | f721e37 | 2022-01-04 10:41:12 -0800 | [diff] [blame] | 709 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x1.c", |
| 710 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x2.c", |
| 711 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x3.c", |
| 712 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 713 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x1.c", |
| 714 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x2-acc2.c", |
| 715 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x2.c", |
| 716 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4-acc2.c", |
| 717 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4-acc4.c", |
| 718 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4.c", |
| 719 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x1.c", |
| 720 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x2-acc2.c", |
| 721 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x2.c", |
| 722 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| 723 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc4.c", |
| 724 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 725 | "src/f32-rmax/scalar.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 726 | "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c", |
| 727 | "src/f32-spmm/gen/1x1-minmax-scalar.c", |
| 728 | "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c", |
| 729 | "src/f32-spmm/gen/2x1-minmax-scalar.c", |
| 730 | "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c", |
| 731 | "src/f32-spmm/gen/4x1-minmax-scalar.c", |
| 732 | "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c", |
| 733 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 734 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 735 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 736 | "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c", |
| 737 | "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c", |
| 738 | "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 739 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 740 | "src/f32-vbinary/gen/vadd-relu-scalar-x1.c", |
| 741 | "src/f32-vbinary/gen/vadd-relu-scalar-x2.c", |
| 742 | "src/f32-vbinary/gen/vadd-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 743 | "src/f32-vbinary/gen/vadd-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 744 | "src/f32-vbinary/gen/vadd-scalar-x1.c", |
| 745 | "src/f32-vbinary/gen/vadd-scalar-x2.c", |
| 746 | "src/f32-vbinary/gen/vadd-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 747 | "src/f32-vbinary/gen/vadd-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 748 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c", |
| 749 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c", |
| 750 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 751 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 752 | "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c", |
| 753 | "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c", |
| 754 | "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 755 | "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 756 | "src/f32-vbinary/gen/vaddc-scalar-x1.c", |
| 757 | "src/f32-vbinary/gen/vaddc-scalar-x2.c", |
| 758 | "src/f32-vbinary/gen/vaddc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 759 | "src/f32-vbinary/gen/vaddc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 760 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c", |
| 761 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| 762 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 763 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 764 | "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c", |
| 765 | "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c", |
| 766 | "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 767 | "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 768 | "src/f32-vbinary/gen/vdiv-scalar-x1.c", |
| 769 | "src/f32-vbinary/gen/vdiv-scalar-x2.c", |
| 770 | "src/f32-vbinary/gen/vdiv-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 771 | "src/f32-vbinary/gen/vdiv-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 772 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c", |
| 773 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| 774 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 775 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 776 | "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c", |
| 777 | "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c", |
| 778 | "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 779 | "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 780 | "src/f32-vbinary/gen/vdivc-scalar-x1.c", |
| 781 | "src/f32-vbinary/gen/vdivc-scalar-x2.c", |
| 782 | "src/f32-vbinary/gen/vdivc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 783 | "src/f32-vbinary/gen/vdivc-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 784 | "src/f32-vbinary/gen/vmax-scalar-x1.c", |
| 785 | "src/f32-vbinary/gen/vmax-scalar-x2.c", |
| 786 | "src/f32-vbinary/gen/vmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 787 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 788 | "src/f32-vbinary/gen/vmaxc-scalar-x1.c", |
| 789 | "src/f32-vbinary/gen/vmaxc-scalar-x2.c", |
| 790 | "src/f32-vbinary/gen/vmaxc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 791 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 792 | "src/f32-vbinary/gen/vmin-scalar-x1.c", |
| 793 | "src/f32-vbinary/gen/vmin-scalar-x2.c", |
| 794 | "src/f32-vbinary/gen/vmin-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 795 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 796 | "src/f32-vbinary/gen/vminc-scalar-x1.c", |
| 797 | "src/f32-vbinary/gen/vminc-scalar-x2.c", |
| 798 | "src/f32-vbinary/gen/vminc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 799 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 800 | "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c", |
| 801 | "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c", |
| 802 | "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 803 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 804 | "src/f32-vbinary/gen/vmul-relu-scalar-x1.c", |
| 805 | "src/f32-vbinary/gen/vmul-relu-scalar-x2.c", |
| 806 | "src/f32-vbinary/gen/vmul-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 807 | "src/f32-vbinary/gen/vmul-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 808 | "src/f32-vbinary/gen/vmul-scalar-x1.c", |
| 809 | "src/f32-vbinary/gen/vmul-scalar-x2.c", |
| 810 | "src/f32-vbinary/gen/vmul-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 811 | "src/f32-vbinary/gen/vmul-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 812 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c", |
| 813 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c", |
| 814 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 815 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 816 | "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c", |
| 817 | "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c", |
| 818 | "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 819 | "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 820 | "src/f32-vbinary/gen/vmulc-scalar-x1.c", |
| 821 | "src/f32-vbinary/gen/vmulc-scalar-x2.c", |
| 822 | "src/f32-vbinary/gen/vmulc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 823 | "src/f32-vbinary/gen/vmulc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 824 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c", |
| 825 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| 826 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 827 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 828 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c", |
| 829 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c", |
| 830 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 831 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 832 | "src/f32-vbinary/gen/vrdivc-scalar-x1.c", |
| 833 | "src/f32-vbinary/gen/vrdivc-scalar-x2.c", |
| 834 | "src/f32-vbinary/gen/vrdivc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 835 | "src/f32-vbinary/gen/vrdivc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 836 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c", |
| 837 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c", |
| 838 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 839 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 840 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c", |
| 841 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c", |
| 842 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 843 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 844 | "src/f32-vbinary/gen/vrsubc-scalar-x1.c", |
| 845 | "src/f32-vbinary/gen/vrsubc-scalar-x2.c", |
| 846 | "src/f32-vbinary/gen/vrsubc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 847 | "src/f32-vbinary/gen/vrsubc-scalar-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 848 | "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c", |
| 849 | "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c", |
| 850 | "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 851 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 852 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c", |
| 853 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c", |
| 854 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 855 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 856 | "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c", |
| 857 | "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c", |
| 858 | "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 859 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 860 | "src/f32-vbinary/gen/vsub-relu-scalar-x1.c", |
| 861 | "src/f32-vbinary/gen/vsub-relu-scalar-x2.c", |
| 862 | "src/f32-vbinary/gen/vsub-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 863 | "src/f32-vbinary/gen/vsub-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 864 | "src/f32-vbinary/gen/vsub-scalar-x1.c", |
| 865 | "src/f32-vbinary/gen/vsub-scalar-x2.c", |
| 866 | "src/f32-vbinary/gen/vsub-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 867 | "src/f32-vbinary/gen/vsub-scalar-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 868 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c", |
| 869 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c", |
| 870 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 871 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 872 | "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c", |
| 873 | "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c", |
| 874 | "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 875 | "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c", |
| Frank Barchard | 8e229db | 2020-07-06 23:31:35 -0700 | [diff] [blame] | 876 | "src/f32-vbinary/gen/vsubc-scalar-x1.c", |
| 877 | "src/f32-vbinary/gen/vsubc-scalar-x2.c", |
| 878 | "src/f32-vbinary/gen/vsubc-scalar-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 879 | "src/f32-vbinary/gen/vsubc-scalar-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 880 | "src/f32-vclamp/gen/vclamp-scalar-x1.c", |
| 881 | "src/f32-vclamp/gen/vclamp-scalar-x2.c", |
| 882 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 883 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c", |
| 884 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c", |
| 885 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c", |
| 886 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 887 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c", |
| 888 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c", |
| 889 | "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c", |
| 890 | "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c", |
| 891 | "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c", |
| 892 | "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c", |
| 893 | "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c", |
| 894 | "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 895 | "src/f32-vhswish/gen/vhswish-scalar-x1.c", |
| 896 | "src/f32-vhswish/gen/vhswish-scalar-x2.c", |
| 897 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 898 | "src/f32-vlrelu/gen/vlrelu-scalar-x1.c", |
| 899 | "src/f32-vlrelu/gen/vlrelu-scalar-x2.c", |
| 900 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 901 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 902 | "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c", |
| 903 | "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 904 | "src/f32-vrelu/gen/vrelu-scalar-x1.c", |
| 905 | "src/f32-vrelu/gen/vrelu-scalar-x2.c", |
| 906 | "src/f32-vrelu/gen/vrelu-scalar-x4.c", |
| 907 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 908 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 909 | "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c", |
| 910 | "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c", |
| Frank Barchard | c9c320e | 2020-08-07 22:12:46 -0700 | [diff] [blame] | 911 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 912 | "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c", |
| 913 | "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c", |
| 914 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 915 | "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c", |
| 916 | "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c", |
| 917 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| 918 | "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c", |
| 919 | "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 920 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x1.c", |
| 921 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| 922 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x4.c", |
| 923 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x1.c", |
| 924 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x2.c", |
| 925 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x4.c", |
| 926 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x1.c", |
| 927 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x2.c", |
| 928 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x4.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 929 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 930 | "src/f32-vsqrt/gen/scalar-sqrt-x2.c", |
| 931 | "src/f32-vsqrt/gen/scalar-sqrt-x4.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 932 | "src/f32-vunary/gen/vabs-scalar-x1.c", |
| 933 | "src/f32-vunary/gen/vabs-scalar-x2.c", |
| 934 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 935 | "src/f32-vunary/gen/vneg-scalar-x1.c", |
| 936 | "src/f32-vunary/gen/vneg-scalar-x2.c", |
| 937 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 938 | "src/f32-vunary/gen/vsqr-scalar-x1.c", |
| 939 | "src/f32-vunary/gen/vsqr-scalar-x2.c", |
| 940 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| Marat Dukhan | 78f039d | 2021-11-09 16:42:27 -0800 | [diff] [blame] | 941 | "src/math/cvt-f32-f16-scalar-bitcast.c", |
| 942 | "src/math/cvt-f32-f16-scalar-fabsf.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 943 | "src/math/expm1minus-scalar-rr2-lut4-p4.c", |
| 944 | "src/math/expm1minus-scalar-rr2-lut8-p3.c", |
| 945 | "src/math/expm1minus-scalar-rr2-lut8-p4.c", |
| Marat Dukhan | c60742b | 2020-11-23 12:33:27 -0800 | [diff] [blame] | 946 | "src/math/expm1minus-scalar-rr2-lut16-p3.c", |
| 947 | "src/math/expm1minus-scalar-rr2-lut16-p4.c", |
| 948 | "src/math/expm1minus-scalar-rr2-p5.c", |
| 949 | "src/math/expm1minus-scalar-rr2-p6.c", |
| Frank Barchard | 2213606 | 2020-11-24 18:44:46 -0800 | [diff] [blame] | 950 | "src/math/expminus-scalar-rr2-lut64-p2.c", |
| 951 | "src/math/expminus-scalar-rr2-lut2048-p1.c", |
| 952 | "src/math/expminus-scalar-rr2-p5.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 953 | "src/math/roundd-scalar-addsub.c", |
| 954 | "src/math/roundd-scalar-cvt.c", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 955 | "src/math/roundd-scalar-floor.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 956 | "src/math/roundne-scalar-addsub.c", |
| 957 | "src/math/roundne-scalar-nearbyint.c", |
| 958 | "src/math/roundne-scalar-rint.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 959 | "src/math/roundu-scalar-addsub.c", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 960 | "src/math/roundu-scalar-ceil.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 961 | "src/math/roundu-scalar-cvt.c", |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 962 | "src/math/roundz-scalar-addsub.c", |
| 963 | "src/math/roundz-scalar-cvt.c", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 964 | "src/math/roundz-scalar-trunc.c", |
| Marat Dukhan | f8475d6 | 2020-09-17 15:01:43 -0700 | [diff] [blame] | 965 | "src/math/sigmoid-scalar-rr2-lut64-p2-div.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 966 | "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c", |
| Marat Dukhan | f8475d6 | 2020-09-17 15:01:43 -0700 | [diff] [blame] | 967 | "src/math/sigmoid-scalar-rr2-p5-div.c", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 968 | "src/params-init.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 969 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 970 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c", |
| 971 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 972 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 973 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 974 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 975 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 976 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 977 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 978 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 979 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c", |
| 980 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 981 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 982 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c", |
| 983 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 984 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 985 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c", |
| 986 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 987 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 988 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 989 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 990 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 991 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 992 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 993 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 994 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 995 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 996 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 997 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 998 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 999 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1000 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1001 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1002 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1003 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1004 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1005 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1006 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1007 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1008 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1009 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1010 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1011 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1012 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1013 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1014 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1015 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1016 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1017 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1018 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1019 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1020 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1021 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1022 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1023 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1024 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1025 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1026 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1027 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1028 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1029 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1030 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1031 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1032 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1033 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1034 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1035 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1036 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c", |
| 1037 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1038 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1039 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 1040 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1041 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1042 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 1043 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1044 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1045 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c", |
| 1046 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1047 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1048 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c", |
| 1049 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1050 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1051 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c", |
| 1052 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 86bd270 | 2021-12-10 02:19:56 -0800 | [diff] [blame] | 1053 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 1054 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x2.c", |
| 1055 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x3.c", |
| 1056 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1057 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c1.c", |
| Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1058 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c2.c", |
| Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1059 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c4.c", |
| Frank Barchard | 7781786 | 2022-01-11 23:20:38 -0800 | [diff] [blame] | 1060 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 1061 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c2.c", |
| 1062 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c4.c", |
| 1063 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c1.c", |
| 1064 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c2.c", |
| Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1065 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c4.c", |
| Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1066 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c1.c", |
| Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1067 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c2.c", |
| Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1068 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c4.c", |
| Frank Barchard | 7781786 | 2022-01-11 23:20:38 -0800 | [diff] [blame] | 1069 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| 1070 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c2.c", |
| 1071 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c4.c", |
| 1072 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c1.c", |
| 1073 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c2.c", |
| Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1074 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c4.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1075 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1076 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1077 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1078 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1079 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1080 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1081 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1082 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1083 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1084 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1085 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1086 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1087 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1088 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1089 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1090 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1091 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1092 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1093 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1094 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1095 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1096 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1097 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1098 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1099 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1100 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1101 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1102 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1103 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1104 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1105 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1106 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1107 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1108 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1109 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1110 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1111 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1112 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1113 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1114 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1115 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1116 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1117 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1118 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1119 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1120 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1121 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1122 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1123 | "src/qs8-requantization/fp32-scalar-fmagic.c", |
| Frank Barchard | cccb012 | 2022-01-04 15:24:00 -0800 | [diff] [blame] | 1124 | "src/qs8-requantization/fp32-scalar-lrintf.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 1125 | "src/qs8-requantization/gemmlowp-scalar.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 1126 | "src/qs8-requantization/rndna-scalar-signed64.c", |
| 1127 | "src/qs8-requantization/rndna-scalar-unsigned32.c", |
| 1128 | "src/qs8-requantization/rndna-scalar-unsigned64.c", |
| Marat Dukhan | 062bee3 | 2021-05-27 20:31:07 -0700 | [diff] [blame] | 1129 | "src/qs8-requantization/rndnu-scalar.c", |
| Marat Dukhan | d481c28 | 2021-05-11 23:48:31 -0700 | [diff] [blame] | 1130 | "src/qs8-vadd/gen/minmax-scalar-x1.c", |
| 1131 | "src/qs8-vadd/gen/minmax-scalar-x2.c", |
| 1132 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| 1133 | "src/qs8-vaddc/gen/minmax-scalar-x1.c", |
| 1134 | "src/qs8-vaddc/gen/minmax-scalar-x2.c", |
| 1135 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 7999341 | 2021-08-02 15:02:57 -0700 | [diff] [blame] | 1136 | "src/qs8-vmul/gen/minmax-fp32-scalar-x1.c", |
| 1137 | "src/qs8-vmul/gen/minmax-fp32-scalar-x2.c", |
| 1138 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 1139 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x1.c", |
| 1140 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x2.c", |
| 1141 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 1142 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 1143 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1144 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1145 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c", |
| 1146 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1147 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1148 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 1149 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1150 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1151 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 1152 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1153 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1154 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c", |
| 1155 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1156 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1157 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c", |
| 1158 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1159 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1160 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c", |
| 1161 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 86bd270 | 2021-12-10 02:19:56 -0800 | [diff] [blame] | 1162 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 1163 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x2.c", |
| 1164 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x3.c", |
| 1165 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 1166 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c1.c", |
| 1167 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c2.c", |
| 1168 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c4.c", |
| 1169 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 1170 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c2.c", |
| 1171 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c4.c", |
| 1172 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c1.c", |
| 1173 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c2.c", |
| 1174 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c4.c", |
| 1175 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c1.c", |
| 1176 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c2.c", |
| 1177 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c4.c", |
| 1178 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| 1179 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c2.c", |
| 1180 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c4.c", |
| 1181 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c1.c", |
| 1182 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c2.c", |
| 1183 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c4.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1184 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1185 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1186 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1187 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1188 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1189 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1190 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1191 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1192 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1193 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1194 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1195 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1196 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1197 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1198 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1199 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1200 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1201 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1202 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1203 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1204 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1205 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1206 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1207 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1208 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1209 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1210 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1211 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1212 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1213 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1214 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1215 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1216 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1217 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1218 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1219 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1220 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1221 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1222 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1223 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1224 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1225 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1226 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1227 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1228 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1229 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| Marat Dukhan | 272d4d9 | 2022-01-04 15:07:14 -0800 | [diff] [blame] | 1230 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1231 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| Marat Dukhan | 2ac722e | 2022-01-04 01:54:20 -0800 | [diff] [blame] | 1232 | "src/qu8-requantization/fp32-scalar-fmagic.c", |
| Frank Barchard | cccb012 | 2022-01-04 15:24:00 -0800 | [diff] [blame] | 1233 | "src/qu8-requantization/fp32-scalar-lrintf.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 1234 | "src/qu8-requantization/gemmlowp-scalar.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 1235 | "src/qu8-requantization/rndna-scalar-signed64.c", |
| 1236 | "src/qu8-requantization/rndna-scalar-unsigned32.c", |
| 1237 | "src/qu8-requantization/rndna-scalar-unsigned64.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 1238 | "src/qu8-vadd/gen/minmax-scalar-x1.c", |
| 1239 | "src/qu8-vadd/gen/minmax-scalar-x2.c", |
| 1240 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| 1241 | "src/qu8-vaddc/gen/minmax-scalar-x1.c", |
| 1242 | "src/qu8-vaddc/gen/minmax-scalar-x2.c", |
| 1243 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| Marat Dukhan | 7999341 | 2021-08-02 15:02:57 -0700 | [diff] [blame] | 1244 | "src/qu8-vmul/gen/minmax-fp32-scalar-x1.c", |
| 1245 | "src/qu8-vmul/gen/minmax-fp32-scalar-x2.c", |
| 1246 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 1247 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x1.c", |
| 1248 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x2.c", |
| 1249 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Marat Dukhan | 6a69c8e | 2021-11-24 15:00:59 -0800 | [diff] [blame] | 1250 | "src/s8-ibilinear/gen/scalar-c1.c", |
| 1251 | "src/s8-ibilinear/gen/scalar-c2.c", |
| 1252 | "src/s8-ibilinear/gen/scalar-c4.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 1253 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 1254 | "src/s8-vclamp/scalar-x4.c", |
| Marat Dukhan | 6a69c8e | 2021-11-24 15:00:59 -0800 | [diff] [blame] | 1255 | "src/u8-ibilinear/gen/scalar-c1.c", |
| 1256 | "src/u8-ibilinear/gen/scalar-c2.c", |
| 1257 | "src/u8-ibilinear/gen/scalar-c4.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1258 | "src/u8-lut32norm/scalar.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1259 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1260 | "src/u8-rmax/scalar.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 1261 | "src/u8-vclamp/scalar-x4.c", |
| Marat Dukhan | d67539d | 2021-09-08 23:06:03 -0700 | [diff] [blame] | 1262 | "src/x8-lut/gen/lut-scalar-x1.c", |
| 1263 | "src/x8-lut/gen/lut-scalar-x2.c", |
| 1264 | "src/x8-lut/gen/lut-scalar-x4.c", |
| 1265 | "src/x8-lut/gen/lut-scalar-x8.c", |
| 1266 | "src/x8-lut/gen/lut-scalar-x16.c", |
| Alan Kelly | cd21b02 | 2022-01-14 01:44:59 -0800 | [diff] [blame] | 1267 | "src/x8-transpose/gen/1x2-scalar-int.c", |
| 1268 | "src/x8-transpose/gen/1x4-scalar-int.c", |
| 1269 | "src/x8-transpose/gen/2x1-scalar-int.c", |
| 1270 | "src/x8-transpose/gen/2x2-scalar-int.c", |
| 1271 | "src/x8-transpose/gen/2x4-scalar-int.c", |
| 1272 | "src/x8-transpose/gen/4x1-scalar-int.c", |
| 1273 | "src/x8-transpose/gen/4x2-scalar-int.c", |
| 1274 | "src/x8-transpose/gen/4x4-scalar-int.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1275 | "src/x8-zip/x2-scalar.c", |
| 1276 | "src/x8-zip/x3-scalar.c", |
| 1277 | "src/x8-zip/x4-scalar.c", |
| 1278 | "src/x8-zip/xm-scalar.c", |
| Alan Kelly | 84aae41 | 2022-01-14 01:41:06 -0800 | [diff] [blame] | 1279 | "src/x16-transpose/gen/1x2-scalar-int.c", |
| 1280 | "src/x16-transpose/gen/1x4-scalar-int.c", |
| 1281 | "src/x16-transpose/gen/2x1-scalar-int.c", |
| 1282 | "src/x16-transpose/gen/2x2-scalar-int.c", |
| 1283 | "src/x16-transpose/gen/2x4-scalar-int.c", |
| 1284 | "src/x16-transpose/gen/4x1-scalar-int.c", |
| 1285 | "src/x16-transpose/gen/4x2-scalar-int.c", |
| 1286 | "src/x16-transpose/gen/4x4-scalar-int.c", |
| Marat Dukhan | ad71b9a | 2020-11-20 00:01:51 -0800 | [diff] [blame] | 1287 | "src/x32-depthtospace2d-chw2hwc/scalar.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1288 | "src/x32-packx/x2-scalar.c", |
| 1289 | "src/x32-packx/x3-scalar.c", |
| 1290 | "src/x32-packx/x4-scalar.c", |
| Alan Kelly | 2780863 | 2022-01-10 11:16:33 -0800 | [diff] [blame] | 1291 | "src/x32-transpose/gen/1x2-scalar-float.c", |
| Frank Barchard | 969e61f | 2022-01-10 11:40:53 -0800 | [diff] [blame] | 1292 | "src/x32-transpose/gen/1x2-scalar-int.c", |
| Alan Kelly | 2780863 | 2022-01-10 11:16:33 -0800 | [diff] [blame] | 1293 | "src/x32-transpose/gen/1x4-scalar-float.c", |
| Frank Barchard | 969e61f | 2022-01-10 11:40:53 -0800 | [diff] [blame] | 1294 | "src/x32-transpose/gen/1x4-scalar-int.c", |
| Alan Kelly | 2780863 | 2022-01-10 11:16:33 -0800 | [diff] [blame] | 1295 | "src/x32-transpose/gen/2x1-scalar-float.c", |
| Frank Barchard | 969e61f | 2022-01-10 11:40:53 -0800 | [diff] [blame] | 1296 | "src/x32-transpose/gen/2x1-scalar-int.c", |
| Alan Kelly | 2780863 | 2022-01-10 11:16:33 -0800 | [diff] [blame] | 1297 | "src/x32-transpose/gen/2x2-scalar-float.c", |
| Frank Barchard | 969e61f | 2022-01-10 11:40:53 -0800 | [diff] [blame] | 1298 | "src/x32-transpose/gen/2x2-scalar-int.c", |
| Alan Kelly | 2780863 | 2022-01-10 11:16:33 -0800 | [diff] [blame] | 1299 | "src/x32-transpose/gen/2x4-scalar-float.c", |
| Frank Barchard | 969e61f | 2022-01-10 11:40:53 -0800 | [diff] [blame] | 1300 | "src/x32-transpose/gen/2x4-scalar-int.c", |
| Alan Kelly | 2780863 | 2022-01-10 11:16:33 -0800 | [diff] [blame] | 1301 | "src/x32-transpose/gen/4x1-scalar-float.c", |
| Frank Barchard | 969e61f | 2022-01-10 11:40:53 -0800 | [diff] [blame] | 1302 | "src/x32-transpose/gen/4x1-scalar-int.c", |
| Alan Kelly | 2780863 | 2022-01-10 11:16:33 -0800 | [diff] [blame] | 1303 | "src/x32-transpose/gen/4x2-scalar-float.c", |
| Frank Barchard | 969e61f | 2022-01-10 11:40:53 -0800 | [diff] [blame] | 1304 | "src/x32-transpose/gen/4x2-scalar-int.c", |
| Alan Kelly | 2780863 | 2022-01-10 11:16:33 -0800 | [diff] [blame] | 1305 | "src/x32-transpose/gen/4x4-scalar-float.c", |
| Frank Barchard | 969e61f | 2022-01-10 11:40:53 -0800 | [diff] [blame] | 1306 | "src/x32-transpose/gen/4x4-scalar-int.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1307 | "src/x32-unpool/scalar.c", |
| 1308 | "src/x32-zip/x2-scalar.c", |
| 1309 | "src/x32-zip/x3-scalar.c", |
| 1310 | "src/x32-zip/x4-scalar.c", |
| 1311 | "src/x32-zip/xm-scalar.c", |
| Alan Kelly | d19bde9 | 2022-01-14 02:30:28 -0800 | [diff] [blame^] | 1312 | "src/x64-transpose/gen/1x2-scalar-float.c", |
| 1313 | "src/x64-transpose/gen/1x2-scalar-int.c", |
| 1314 | "src/x64-transpose/gen/2x1-scalar-float.c", |
| 1315 | "src/x64-transpose/gen/2x1-scalar-int.c", |
| 1316 | "src/x64-transpose/gen/2x2-scalar-float.c", |
| 1317 | "src/x64-transpose/gen/2x2-scalar-int.c", |
| 1318 | "src/x64-transpose/gen/4x1-scalar-float.c", |
| 1319 | "src/x64-transpose/gen/4x1-scalar-int.c", |
| 1320 | "src/x64-transpose/gen/4x2-scalar-float.c", |
| 1321 | "src/x64-transpose/gen/4x2-scalar-int.c", |
| Marat Dukhan | 048931b | 2020-11-24 20:53:54 -0800 | [diff] [blame] | 1322 | "src/xx-copy/memcpy.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 1323 | "src/xx-fill/scalar-x16.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 1324 | "src/xx-pad/scalar.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 1325 | ] |
| 1326 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 1327 | ALL_WASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1328 | "src/f32-avgpool/9p8x-minmax-wasm-c1.c", |
| 1329 | "src/f32-avgpool/9x-minmax-wasm-c1.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 1330 | "src/f32-dwconv/gen/up1x3-minmax-wasm-acc2.c", |
| 1331 | "src/f32-dwconv/gen/up1x3-minmax-wasm.c", |
| 1332 | "src/f32-dwconv/gen/up1x3-wasm-acc2.c", |
| 1333 | "src/f32-dwconv/gen/up1x3-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1334 | "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c", |
| 1335 | "src/f32-dwconv/gen/up1x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1336 | "src/f32-dwconv/gen/up1x4-wasm-acc2.c", |
| 1337 | "src/f32-dwconv/gen/up1x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1338 | "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c", |
| 1339 | "src/f32-dwconv/gen/up1x9-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1340 | "src/f32-dwconv/gen/up1x9-wasm-acc2.c", |
| 1341 | "src/f32-dwconv/gen/up1x9-wasm.c", |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 1342 | "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c", |
| 1343 | "src/f32-dwconv/gen/up1x25-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1344 | "src/f32-dwconv/gen/up1x25-wasm-acc2.c", |
| 1345 | "src/f32-dwconv/gen/up1x25-wasm.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 1346 | "src/f32-dwconv/gen/up2x3-minmax-wasm-acc2.c", |
| 1347 | "src/f32-dwconv/gen/up2x3-minmax-wasm.c", |
| 1348 | "src/f32-dwconv/gen/up2x3-wasm-acc2.c", |
| 1349 | "src/f32-dwconv/gen/up2x3-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1350 | "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c", |
| 1351 | "src/f32-dwconv/gen/up2x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1352 | "src/f32-dwconv/gen/up2x4-wasm-acc2.c", |
| 1353 | "src/f32-dwconv/gen/up2x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1354 | "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c", |
| 1355 | "src/f32-dwconv/gen/up2x9-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1356 | "src/f32-dwconv/gen/up2x9-wasm-acc2.c", |
| 1357 | "src/f32-dwconv/gen/up2x9-wasm.c", |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 1358 | "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c", |
| 1359 | "src/f32-dwconv/gen/up2x25-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1360 | "src/f32-dwconv/gen/up2x25-wasm-acc2.c", |
| 1361 | "src/f32-dwconv/gen/up2x25-wasm.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1362 | "src/f32-gavgpool/7p7x-minmax-wasm-c1.c", |
| 1363 | "src/f32-gavgpool/7x-minmax-wasm-c1.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1364 | "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c", |
| 1365 | "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c", |
| 1366 | "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c", |
| 1367 | "src/f32-gemm/gen/1x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1368 | "src/f32-gemm/gen/1x4-relu-wasm.c", |
| 1369 | "src/f32-gemm/gen/1x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1370 | "src/f32-gemm/gen/2x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1371 | "src/f32-gemm/gen/2x4-relu-wasm.c", |
| 1372 | "src/f32-gemm/gen/2x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1373 | "src/f32-gemm/gen/4x2-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1374 | "src/f32-gemm/gen/4x2-relu-wasm.c", |
| 1375 | "src/f32-gemm/gen/4x2-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1376 | "src/f32-gemm/gen/4x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1377 | "src/f32-gemm/gen/4x4-relu-wasm.c", |
| 1378 | "src/f32-gemm/gen/4x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1379 | "src/f32-igemm/gen/1x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1380 | "src/f32-igemm/gen/1x4-relu-wasm.c", |
| 1381 | "src/f32-igemm/gen/1x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1382 | "src/f32-igemm/gen/2x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1383 | "src/f32-igemm/gen/2x4-relu-wasm.c", |
| 1384 | "src/f32-igemm/gen/2x4-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1385 | "src/f32-igemm/gen/4x2-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1386 | "src/f32-igemm/gen/4x2-relu-wasm.c", |
| 1387 | "src/f32-igemm/gen/4x2-wasm.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 1388 | "src/f32-igemm/gen/4x4-minmax-wasm.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1389 | "src/f32-igemm/gen/4x4-relu-wasm.c", |
| 1390 | "src/f32-igemm/gen/4x4-wasm.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1391 | "src/f32-maxpool/9p8x-minmax-wasm-c1.c", |
| Frank Barchard | cb052a3 | 2021-12-10 14:16:33 -0800 | [diff] [blame] | 1392 | "src/f32-pavgpool/9p8x-minmax-wasm-c1.c", |
| 1393 | "src/f32-pavgpool/9x-minmax-wasm-c1.c", |
| 1394 | "src/f32-prelu/gen/wasm-2x1.c", |
| 1395 | "src/f32-prelu/gen/wasm-2x4.c", |
| Marat Dukhan | bdf1099 | 2022-01-04 09:20:14 -0800 | [diff] [blame] | 1396 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x1.c", |
| 1397 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x2.c", |
| 1398 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x3.c", |
| 1399 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x4.c", |
| 1400 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x1.c", |
| 1401 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x2.c", |
| 1402 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x3.c", |
| 1403 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x4.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 1404 | "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c", |
| 1405 | "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c", |
| 1406 | "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1407 | "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1408 | "src/f32-vbinary/gen/vadd-relu-wasm-x1.c", |
| 1409 | "src/f32-vbinary/gen/vadd-relu-wasm-x2.c", |
| 1410 | "src/f32-vbinary/gen/vadd-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1411 | "src/f32-vbinary/gen/vadd-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1412 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c", |
| 1413 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c", |
| 1414 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c", |
| 1415 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1416 | "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c", |
| 1417 | "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c", |
| 1418 | "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1419 | "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1420 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c", |
| 1421 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c", |
| 1422 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c", |
| 1423 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1424 | "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c", |
| 1425 | "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c", |
| 1426 | "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1427 | "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1428 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c", |
| 1429 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c", |
| 1430 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c", |
| 1431 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1432 | "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c", |
| 1433 | "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c", |
| 1434 | "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1435 | "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1436 | "src/f32-vbinary/gen/vmax-wasm-x1.c", |
| 1437 | "src/f32-vbinary/gen/vmax-wasm-x2.c", |
| 1438 | "src/f32-vbinary/gen/vmax-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1439 | "src/f32-vbinary/gen/vmax-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1440 | "src/f32-vbinary/gen/vmaxc-wasm-x1.c", |
| 1441 | "src/f32-vbinary/gen/vmaxc-wasm-x2.c", |
| 1442 | "src/f32-vbinary/gen/vmaxc-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1443 | "src/f32-vbinary/gen/vmaxc-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1444 | "src/f32-vbinary/gen/vmin-wasm-x1.c", |
| 1445 | "src/f32-vbinary/gen/vmin-wasm-x2.c", |
| 1446 | "src/f32-vbinary/gen/vmin-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1447 | "src/f32-vbinary/gen/vmin-wasm-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 1448 | "src/f32-vbinary/gen/vminc-wasm-x1.c", |
| 1449 | "src/f32-vbinary/gen/vminc-wasm-x2.c", |
| 1450 | "src/f32-vbinary/gen/vminc-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1451 | "src/f32-vbinary/gen/vminc-wasm-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 1452 | "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c", |
| 1453 | "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c", |
| 1454 | "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1455 | "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1456 | "src/f32-vbinary/gen/vmul-relu-wasm-x1.c", |
| 1457 | "src/f32-vbinary/gen/vmul-relu-wasm-x2.c", |
| 1458 | "src/f32-vbinary/gen/vmul-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1459 | "src/f32-vbinary/gen/vmul-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1460 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c", |
| 1461 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c", |
| 1462 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c", |
| 1463 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1464 | "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c", |
| 1465 | "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c", |
| 1466 | "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1467 | "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1468 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c", |
| 1469 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c", |
| 1470 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c", |
| 1471 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1472 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c", |
| 1473 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c", |
| 1474 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1475 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1476 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c", |
| 1477 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c", |
| 1478 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c", |
| 1479 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1480 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c", |
| 1481 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c", |
| 1482 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1483 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1484 | "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c", |
| 1485 | "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c", |
| 1486 | "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c", |
| 1487 | "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1488 | "src/f32-vbinary/gen/vsub-relu-wasm-x1.c", |
| 1489 | "src/f32-vbinary/gen/vsub-relu-wasm-x2.c", |
| 1490 | "src/f32-vbinary/gen/vsub-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1491 | "src/f32-vbinary/gen/vsub-relu-wasm-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1492 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c", |
| 1493 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c", |
| 1494 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c", |
| 1495 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 1496 | "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c", |
| 1497 | "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c", |
| 1498 | "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 1499 | "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 1500 | "src/f32-vclamp/gen/vclamp-wasm-x1.c", |
| 1501 | "src/f32-vclamp/gen/vclamp-wasm-x2.c", |
| 1502 | "src/f32-vclamp/gen/vclamp-wasm-x4.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1503 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c", |
| 1504 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c", |
| 1505 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c", |
| 1506 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c", |
| 1507 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c", |
| 1508 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c", |
| 1509 | "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c", |
| 1510 | "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c", |
| 1511 | "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c", |
| 1512 | "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c", |
| 1513 | "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c", |
| 1514 | "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 1515 | "src/f32-vhswish/gen/vhswish-wasm-x1.c", |
| 1516 | "src/f32-vhswish/gen/vhswish-wasm-x2.c", |
| 1517 | "src/f32-vhswish/gen/vhswish-wasm-x4.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 1518 | "src/f32-vlrelu/gen/vlrelu-wasm-x1.c", |
| 1519 | "src/f32-vlrelu/gen/vlrelu-wasm-x2.c", |
| 1520 | "src/f32-vlrelu/gen/vlrelu-wasm-x4.c", |
| Frank Barchard | d4416d6 | 2021-05-17 15:51:37 -0700 | [diff] [blame] | 1521 | "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c", |
| 1522 | "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c", |
| 1523 | "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 1524 | "src/f32-vrelu/gen/vrelu-wasm-x1.c", |
| 1525 | "src/f32-vrelu/gen/vrelu-wasm-x2.c", |
| 1526 | "src/f32-vrelu/gen/vrelu-wasm-x4.c", |
| 1527 | "src/f32-vrelu/gen/vrelu-wasm-x8.c", |
| Marat Dukhan | 7c1115f | 2022-01-04 17:18:41 -0800 | [diff] [blame] | 1528 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-wasm-fmagic.c", |
| 1529 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-wasm-fmagic.c", |
| 1530 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-wasm-fmagic.c", |
| 1531 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-wasm-fmagic.c", |
| 1532 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-wasm-fmagic.c", |
| 1533 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-wasm-fmagic.c", |
| 1534 | "src/qc8-gemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1535 | "src/qc8-gemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1536 | "src/qc8-gemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1537 | "src/qc8-gemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1538 | "src/qc8-gemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1539 | "src/qc8-gemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1540 | "src/qc8-gemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1541 | "src/qc8-gemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1542 | "src/qc8-igemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1543 | "src/qc8-igemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1544 | "src/qc8-igemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1545 | "src/qc8-igemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1546 | "src/qc8-igemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1547 | "src/qc8-igemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1548 | "src/qc8-igemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1549 | "src/qc8-igemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1550 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-wasm-fmagic.c", |
| 1551 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-wasm-fmagic.c", |
| 1552 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-wasm-fmagic.c", |
| 1553 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-wasm-fmagic.c", |
| 1554 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-wasm-fmagic.c", |
| 1555 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-wasm-fmagic.c", |
| 1556 | "src/qs8-gemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1557 | "src/qs8-gemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1558 | "src/qs8-gemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1559 | "src/qs8-gemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1560 | "src/qs8-gemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1561 | "src/qs8-gemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1562 | "src/qs8-gemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1563 | "src/qs8-gemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1564 | "src/qs8-igemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1565 | "src/qs8-igemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1566 | "src/qs8-igemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1567 | "src/qs8-igemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1568 | "src/qs8-igemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1569 | "src/qs8-igemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1570 | "src/qs8-igemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1571 | "src/qs8-igemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1572 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-wasm-fmagic.c", |
| 1573 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-wasm-fmagic.c", |
| 1574 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-wasm-fmagic.c", |
| 1575 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-wasm-fmagic.c", |
| 1576 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-wasm-fmagic.c", |
| 1577 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-wasm-fmagic.c", |
| 1578 | "src/qu8-gemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1579 | "src/qu8-gemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1580 | "src/qu8-gemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1581 | "src/qu8-gemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1582 | "src/qu8-gemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1583 | "src/qu8-gemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1584 | "src/qu8-gemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1585 | "src/qu8-gemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1586 | "src/qu8-igemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1587 | "src/qu8-igemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1588 | "src/qu8-igemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1589 | "src/qu8-igemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1590 | "src/qu8-igemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1591 | "src/qu8-igemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1592 | "src/qu8-igemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1593 | "src/qu8-igemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1594 | ] |
| 1595 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 1596 | ALL_WASMSIMD_MICROKERNEL_SRCS = [ |
| Marat Dukhan | f6507f8 | 2021-10-16 18:13:04 -0700 | [diff] [blame] | 1597 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x8.c", |
| 1598 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x16.c", |
| 1599 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x24.c", |
| 1600 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x32.c", |
| 1601 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x8.c", |
| 1602 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x16.c", |
| 1603 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x24.c", |
| 1604 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x32.c", |
| Marat Dukhan | 40f0552 | 2020-07-16 22:33:12 -0700 | [diff] [blame] | 1605 | "src/f32-argmaxpool/4x-wasmsimd-c4.c", |
| 1606 | "src/f32-argmaxpool/9p8x-wasmsimd-c4.c", |
| 1607 | "src/f32-argmaxpool/9x-wasmsimd-c4.c", |
| Marat Dukhan | 3b7432d | 2020-07-16 17:46:32 -0700 | [diff] [blame] | 1608 | "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1609 | "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| 1610 | "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c", |
| 1611 | "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c", |
| Frank Barchard | 2213606 | 2020-11-24 18:44:46 -0800 | [diff] [blame] | 1612 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 1613 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-arm-acc2.c", |
| 1614 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-arm.c", |
| 1615 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-x86-acc2.c", |
| 1616 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-x86.c", |
| Frank Barchard | 66ae257 | 2021-11-02 17:36:21 -0700 | [diff] [blame] | 1617 | "src/f32-dwconv/gen/up4x3-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1618 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1619 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1620 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1621 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1622 | "src/f32-dwconv/gen/up4x4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1623 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1624 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1625 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1626 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1627 | "src/f32-dwconv/gen/up4x9-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1628 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1629 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1630 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1631 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c", |
| 1632 | "src/f32-dwconv/gen/up4x25-wasmsimd.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 1633 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-arm-acc2.c", |
| 1634 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-arm.c", |
| 1635 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-x86-acc2.c", |
| 1636 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-x86.c", |
| Frank Barchard | 66ae257 | 2021-11-02 17:36:21 -0700 | [diff] [blame] | 1637 | "src/f32-dwconv/gen/up8x3-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1638 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1639 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1640 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1641 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1642 | "src/f32-dwconv/gen/up8x4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1643 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1644 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1645 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c", |
| Marat Dukhan | ac014d7 | 2020-06-16 08:36:47 -0700 | [diff] [blame] | 1646 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1647 | "src/f32-dwconv/gen/up8x9-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1648 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1649 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1650 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1651 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c", |
| 1652 | "src/f32-dwconv/gen/up8x25-wasmsimd.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1653 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1654 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1655 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1656 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1657 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1658 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1659 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1660 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| 1661 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c", |
| 1662 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c", |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 1663 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1664 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1665 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1666 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c", |
| 1667 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1668 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c", |
| 1669 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c", |
| 1670 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c", |
| 1671 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c", |
| 1672 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1673 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1674 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1675 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1676 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1677 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1678 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1679 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1680 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| 1681 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c", |
| 1682 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c", |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 1683 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1684 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1685 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1686 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c", |
| 1687 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1688 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c", |
| 1689 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c", |
| 1690 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c", |
| 1691 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c", |
| 1692 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c", |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 1693 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1694 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1695 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1696 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1697 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1698 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1699 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1700 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1701 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1702 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1703 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1704 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c", |
| 1705 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1706 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c", |
| 1707 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c", |
| 1708 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c", |
| Frank Barchard | cadd422 | 2021-01-20 16:27:25 -0800 | [diff] [blame] | 1709 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1710 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1711 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1712 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1713 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1714 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1715 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1716 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1717 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1718 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1719 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1720 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c", |
| 1721 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1722 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c", |
| 1723 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c", |
| 1724 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c", |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 1725 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1726 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1727 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1728 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c", |
| 1729 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1730 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1731 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c", |
| 1732 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1733 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c", |
| 1734 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1735 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c", |
| 1736 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| 1737 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1738 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1739 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1740 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1741 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c", |
| 1742 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c", |
| 1743 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1744 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c", |
| 1745 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c", |
| 1746 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c", |
| 1747 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c", |
| 1748 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c", |
| 1749 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c", |
| 1750 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c", |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 1751 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1752 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1753 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1754 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c", |
| 1755 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1756 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1757 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c", |
| 1758 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1759 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c", |
| 1760 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1761 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c", |
| 1762 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| 1763 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1764 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1765 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1766 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1767 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c", |
| 1768 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c", |
| 1769 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1770 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c", |
| 1771 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c", |
| 1772 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c", |
| 1773 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c", |
| 1774 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c", |
| 1775 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c", |
| 1776 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c", |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 1777 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1778 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1779 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1780 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c", |
| 1781 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1782 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1783 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c", |
| 1784 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1785 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c", |
| 1786 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1787 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1788 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1789 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1790 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c", |
| 1791 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c", |
| 1792 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1793 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c", |
| 1794 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c", |
| 1795 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c", |
| 1796 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c", |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 1797 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1798 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1799 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1800 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c", |
| 1801 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1802 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1803 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c", |
| 1804 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1805 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c", |
| 1806 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 1807 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1808 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1809 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1810 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c", |
| 1811 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c", |
| 1812 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1813 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c", |
| 1814 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c", |
| 1815 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c", |
| 1816 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c", |
| Marat Dukhan | 22e31c8 | 2021-11-09 00:00:28 -0800 | [diff] [blame] | 1817 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x8.c", |
| 1818 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x16.c", |
| 1819 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x24.c", |
| 1820 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x32.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1821 | "src/f32-gavgpool-cw/wasmsimd-arm-x4.c", |
| 1822 | "src/f32-gavgpool-cw/wasmsimd-x86-x4.c", |
| Marat Dukhan | c601680 | 2020-07-16 18:51:28 -0700 | [diff] [blame] | 1823 | "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c", |
| 1824 | "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c", |
| 1825 | "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c", |
| 1826 | "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1827 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1828 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c", |
| 1829 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1830 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1831 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c", |
| 1832 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1833 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1834 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c", |
| 1835 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1836 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1837 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c", |
| 1838 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1839 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1840 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c", |
| 1841 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1842 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1843 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c", |
| 1844 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1845 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1846 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c", |
| 1847 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1848 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1849 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c", |
| 1850 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1851 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1852 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c", |
| 1853 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1854 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1855 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c", |
| 1856 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1857 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1858 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c", |
| 1859 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1860 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1861 | "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c", |
| 1862 | "src/f32-gemm/gen/1x8-wasmsimd-splat.c", |
| 1863 | "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c", |
| 1864 | "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1865 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1866 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c", |
| 1867 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1868 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1869 | "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c", |
| 1870 | "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c", |
| 1871 | "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c", |
| 1872 | "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c", |
| 1873 | "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c", |
| 1874 | "src/f32-gemm/gen/4x2c4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1875 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1876 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1877 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1878 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1879 | "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c", |
| 1880 | "src/f32-gemm/gen/4x8-wasmsimd-splat.c", |
| 1881 | "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c", |
| 1882 | "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1883 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1884 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c", |
| 1885 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1886 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1887 | "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c", |
| 1888 | "src/f32-gemm/gen/5x8-wasmsimd-splat.c", |
| 1889 | "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c", |
| 1890 | "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1891 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1892 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c", |
| 1893 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1894 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1895 | "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c", |
| 1896 | "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c", |
| XNNPACK Team | 965272b | 2020-10-23 21:10:15 -0700 | [diff] [blame] | 1897 | "src/f32-ibilinear-chw/gen/wasmsimd-p4.c", |
| 1898 | "src/f32-ibilinear-chw/gen/wasmsimd-p8.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 1899 | "src/f32-ibilinear/gen/wasmsimd-c4.c", |
| 1900 | "src/f32-ibilinear/gen/wasmsimd-c8.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1901 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1902 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c", |
| 1903 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1904 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1905 | "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c", |
| 1906 | "src/f32-igemm/gen/1x8-wasmsimd-splat.c", |
| 1907 | "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c", |
| 1908 | "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1909 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1910 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c", |
| 1911 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1912 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1913 | "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c", |
| 1914 | "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c", |
| 1915 | "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c", |
| 1916 | "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c", |
| 1917 | "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c", |
| 1918 | "src/f32-igemm/gen/4x2c4-wasmsimd.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1919 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1920 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1921 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1922 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1923 | "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c", |
| 1924 | "src/f32-igemm/gen/4x8-wasmsimd-splat.c", |
| 1925 | "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c", |
| 1926 | "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1927 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1928 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c", |
| 1929 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1930 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1931 | "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c", |
| 1932 | "src/f32-igemm/gen/5x8-wasmsimd-splat.c", |
| 1933 | "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c", |
| 1934 | "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1935 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1936 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c", |
| 1937 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1938 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 1939 | "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c", |
| 1940 | "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c", |
| Marat Dukhan | f6e2480 | 2020-07-08 22:20:40 -0700 | [diff] [blame] | 1941 | "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1942 | "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1943 | "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1944 | "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| 1945 | "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c", |
| 1946 | "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c", |
| Frank Barchard | 0725b8d | 2020-12-07 11:07:35 -0800 | [diff] [blame] | 1947 | "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1948 | "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 1949 | "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c", |
| 1950 | "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c", |
| 1951 | "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c", |
| Marat Dukhan | 195f8eb | 2020-06-25 12:50:57 -0700 | [diff] [blame] | 1952 | "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c", |
| 1953 | "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 1954 | "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c", |
| 1955 | "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c", |
| 1956 | "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c", |
| 1957 | "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c", |
| 1958 | "src/f32-prelu/gen/wasmsimd-minmax-1x4.c", |
| 1959 | "src/f32-prelu/gen/wasmsimd-minmax-1x8.c", |
| 1960 | "src/f32-prelu/gen/wasmsimd-minmax-1x16.c", |
| Marat Dukhan | 195f8eb | 2020-06-25 12:50:57 -0700 | [diff] [blame] | 1961 | "src/f32-prelu/gen/wasmsimd-minmax-2x4.c", |
| 1962 | "src/f32-prelu/gen/wasmsimd-minmax-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 1963 | "src/f32-prelu/gen/wasmsimd-minmax-2x16.c", |
| 1964 | "src/f32-prelu/gen/wasmsimd-minmax-4x4.c", |
| 1965 | "src/f32-prelu/gen/wasmsimd-minmax-4x8.c", |
| 1966 | "src/f32-prelu/gen/wasmsimd-minmax-4x16.c", |
| Marat Dukhan | 4bd1de9 | 2021-12-02 14:00:33 -0800 | [diff] [blame] | 1967 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x8.c", |
| 1968 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x16.c", |
| 1969 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x24.c", |
| 1970 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x32.c", |
| Marat Dukhan | 98d5552 | 2021-12-02 11:03:53 -0800 | [diff] [blame] | 1971 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x8.c", |
| 1972 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x16.c", |
| 1973 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x24.c", |
| 1974 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x32.c", |
| Marat Dukhan | 4bd1de9 | 2021-12-02 14:00:33 -0800 | [diff] [blame] | 1975 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x8.c", |
| 1976 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x16.c", |
| 1977 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x24.c", |
| 1978 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x32.c", |
| Marat Dukhan | 98d5552 | 2021-12-02 11:03:53 -0800 | [diff] [blame] | 1979 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x8.c", |
| 1980 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x16.c", |
| 1981 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x24.c", |
| 1982 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x32.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 1983 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x4.c", |
| 1984 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x8-acc2.c", |
| 1985 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x8.c", |
| 1986 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x12-acc2.c", |
| 1987 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x12-acc3.c", |
| 1988 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x12.c", |
| 1989 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x16-acc2.c", |
| 1990 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x16-acc4.c", |
| 1991 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x16.c", |
| 1992 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x20-acc2.c", |
| 1993 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x20-acc5.c", |
| 1994 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x20.c", |
| Marat Dukhan | 8c41796 | 2020-07-08 12:27:50 -0700 | [diff] [blame] | 1995 | "src/f32-rmax/wasmsimd-arm.c", |
| 1996 | "src/f32-rmax/wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 1997 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1998 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 1999 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c", |
| 2000 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2001 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 2002 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 2003 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2004 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c", |
| 2005 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2006 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 2007 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 2008 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2009 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c", |
| 2010 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2011 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 2012 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 2013 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2014 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c", |
| 2015 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2016 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 2017 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 2018 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2019 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c", |
| 2020 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2021 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 2022 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 2023 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2024 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c", |
| 2025 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2026 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 2027 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 2028 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2029 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c", |
| 2030 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 2031 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 2032 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 2033 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2034 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c", |
| 2035 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 2036 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2037 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c", |
| 2038 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2039 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2040 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c", |
| 2041 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2042 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2043 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c", |
| 2044 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2045 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2046 | "src/f32-vbinary/gen/vadd-wasmsimd-x4.c", |
| 2047 | "src/f32-vbinary/gen/vadd-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2048 | "src/f32-vbinary/gen/vadd-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2049 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c", |
| 2050 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2051 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2052 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c", |
| 2053 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2054 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2055 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c", |
| 2056 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2057 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2058 | "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c", |
| 2059 | "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2060 | "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2061 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c", |
| 2062 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2063 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2064 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c", |
| 2065 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2066 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2067 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c", |
| 2068 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2069 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2070 | "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c", |
| 2071 | "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2072 | "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2073 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c", |
| 2074 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2075 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2076 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c", |
| 2077 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2078 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2079 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c", |
| 2080 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2081 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2082 | "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c", |
| 2083 | "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2084 | "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2085 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c", |
| 2086 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2087 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2088 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c", |
| 2089 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2090 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2091 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c", |
| 2092 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2093 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2094 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c", |
| 2095 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2096 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2097 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c", |
| 2098 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2099 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2100 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c", |
| 2101 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2102 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2103 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c", |
| 2104 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2105 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2106 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c", |
| 2107 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2108 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2109 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c", |
| 2110 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2111 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2112 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c", |
| 2113 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2114 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2115 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c", |
| 2116 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2117 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2118 | "src/f32-vbinary/gen/vmul-wasmsimd-x4.c", |
| 2119 | "src/f32-vbinary/gen/vmul-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2120 | "src/f32-vbinary/gen/vmul-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2121 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c", |
| 2122 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2123 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2124 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c", |
| 2125 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2126 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2127 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c", |
| 2128 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2129 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2130 | "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c", |
| 2131 | "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2132 | "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2133 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c", |
| 2134 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2135 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2136 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c", |
| 2137 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2138 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2139 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c", |
| 2140 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2141 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2142 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c", |
| 2143 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2144 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2145 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c", |
| 2146 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2147 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2148 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c", |
| 2149 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2150 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2151 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c", |
| 2152 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2153 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2154 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c", |
| 2155 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2156 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2157 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c", |
| 2158 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2159 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2160 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c", |
| 2161 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2162 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2163 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c", |
| 2164 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2165 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 93d1ba1 | 2020-06-26 12:33:35 -0700 | [diff] [blame] | 2166 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c", |
| 2167 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2168 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2169 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c", |
| 2170 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2171 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2172 | "src/f32-vbinary/gen/vsub-wasmsimd-x4.c", |
| 2173 | "src/f32-vbinary/gen/vsub-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2174 | "src/f32-vbinary/gen/vsub-wasmsimd-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2175 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c", |
| 2176 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2177 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c", |
| Marat Dukhan | 0e97d6f | 2020-06-26 19:35:09 -0700 | [diff] [blame] | 2178 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c", |
| 2179 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2180 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c", |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 2181 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c", |
| 2182 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2183 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c", |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 2184 | "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c", |
| 2185 | "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c", |
| Frank Barchard | 9c7308f | 2020-08-31 17:03:01 -0700 | [diff] [blame] | 2186 | "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2187 | "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c", |
| 2188 | "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c", |
| 2189 | "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c", |
| 2190 | "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2191 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c", |
| 2192 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c", |
| 2193 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c", |
| 2194 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c", |
| 2195 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c", |
| 2196 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2197 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c", |
| 2198 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c", |
| 2199 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c", |
| 2200 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c", |
| 2201 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c", |
| 2202 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c", |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 2203 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c", |
| 2204 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c", |
| 2205 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c", |
| 2206 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c", |
| 2207 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c", |
| 2208 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2209 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c", |
| 2210 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c", |
| 2211 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c", |
| 2212 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c", |
| 2213 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c", |
| 2214 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 2215 | "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c", |
| 2216 | "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c", |
| 2217 | "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 2218 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c", |
| 2219 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c", |
| 2220 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c", |
| 2221 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c", |
| Marat Dukhan | d816f62 | 2020-07-15 10:14:39 -0700 | [diff] [blame] | 2222 | "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c", |
| Marat Dukhan | d816f62 | 2020-07-15 10:14:39 -0700 | [diff] [blame] | 2223 | "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2224 | "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c", |
| Marat Dukhan | d816f62 | 2020-07-15 10:14:39 -0700 | [diff] [blame] | 2225 | "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2226 | "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c", |
| 2227 | "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c", |
| 2228 | "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c", |
| Marat Dukhan | feee77f | 2021-08-31 13:39:50 -0700 | [diff] [blame] | 2229 | "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c", |
| 2230 | "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c", |
| 2231 | "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c", |
| 2232 | "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2233 | "src/f32-vrnd/gen/vrndd-wasmsimd-native-x4.c", |
| 2234 | "src/f32-vrnd/gen/vrndd-wasmsimd-native-x8.c", |
| Marat Dukhan | feee77f | 2021-08-31 13:39:50 -0700 | [diff] [blame] | 2235 | "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c", |
| 2236 | "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2237 | "src/f32-vrnd/gen/vrndne-wasmsimd-native-x4.c", |
| 2238 | "src/f32-vrnd/gen/vrndne-wasmsimd-native-x8.c", |
| Marat Dukhan | feee77f | 2021-08-31 13:39:50 -0700 | [diff] [blame] | 2239 | "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c", |
| 2240 | "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c", |
| 2241 | "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c", |
| 2242 | "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2243 | "src/f32-vrnd/gen/vrndu-wasmsimd-native-x4.c", |
| 2244 | "src/f32-vrnd/gen/vrndu-wasmsimd-native-x8.c", |
| Marat Dukhan | feee77f | 2021-08-31 13:39:50 -0700 | [diff] [blame] | 2245 | "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c", |
| 2246 | "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c", |
| 2247 | "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c", |
| 2248 | "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2249 | "src/f32-vrnd/gen/vrndz-wasmsimd-native-x4.c", |
| 2250 | "src/f32-vrnd/gen/vrndz-wasmsimd-native-x8.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 2251 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x4.c", |
| 2252 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x8.c", |
| 2253 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x12.c", |
| 2254 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x16.c", |
| 2255 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x20.c", |
| 2256 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x24.c", |
| 2257 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x4.c", |
| 2258 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x8.c", |
| 2259 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x12.c", |
| 2260 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x16.c", |
| 2261 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x20.c", |
| 2262 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x24.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 2263 | "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c", |
| 2264 | "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c", |
| Marat Dukhan | 37c8351 | 2020-06-29 13:25:53 -0700 | [diff] [blame] | 2265 | "src/f32-vunary/gen/vabs-wasmsimd-x4.c", |
| 2266 | "src/f32-vunary/gen/vabs-wasmsimd-x8.c", |
| 2267 | "src/f32-vunary/gen/vneg-wasmsimd-x4.c", |
| 2268 | "src/f32-vunary/gen/vneg-wasmsimd-x8.c", |
| 2269 | "src/f32-vunary/gen/vsqr-wasmsimd-x4.c", |
| 2270 | "src/f32-vunary/gen/vsqr-wasmsimd-x8.c", |
| Marat Dukhan | a18926a | 2021-09-29 15:02:44 -0700 | [diff] [blame] | 2271 | "src/math/cvt-f16-f32-wasmsimd-int16.c", |
| 2272 | "src/math/cvt-f16-f32-wasmsimd-int32.c", |
| Marat Dukhan | 79c78b2 | 2021-11-08 20:44:27 -0800 | [diff] [blame] | 2273 | "src/math/cvt-f32-f16-wasmsimd.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 2274 | "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c", |
| 2275 | "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c", |
| 2276 | "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c", |
| 2277 | "src/math/expm1minus-wasmsimd-rr2-p6-max.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2278 | "src/math/roundd-wasmsimd-addsub.c", |
| 2279 | "src/math/roundd-wasmsimd-cvt.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2280 | "src/math/roundd-wasmsimd-native.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2281 | "src/math/roundne-wasmsimd-addsub.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2282 | "src/math/roundne-wasmsimd-native.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2283 | "src/math/roundu-wasmsimd-addsub.c", |
| 2284 | "src/math/roundu-wasmsimd-cvt.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2285 | "src/math/roundu-wasmsimd-native.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2286 | "src/math/roundz-wasmsimd-addsub.c", |
| 2287 | "src/math/roundz-wasmsimd-cvt.c", |
| Marat Dukhan | 33b4f75 | 2021-09-03 10:53:53 -0700 | [diff] [blame] | 2288 | "src/math/roundz-wasmsimd-native.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2289 | "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c", |
| 2290 | "src/math/sigmoid-wasmsimd-rr2-p5-div.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2291 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2292 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2293 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2294 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2295 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2296 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2297 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2298 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2299 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2300 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2301 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2302 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2303 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2304 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2305 | "src/qc8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2306 | "src/qc8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2307 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2308 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2309 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2310 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2311 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2312 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2313 | "src/qc8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2314 | "src/qc8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2315 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2316 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2317 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2318 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2319 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2320 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2321 | "src/qc8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2322 | "src/qc8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2323 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2324 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2325 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2326 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2327 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2328 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2329 | "src/qc8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2330 | "src/qc8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2331 | "src/qc8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2332 | "src/qc8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2333 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2334 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2335 | "src/qc8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2336 | "src/qc8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2337 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2338 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2339 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2340 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2341 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2342 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2343 | "src/qc8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2344 | "src/qc8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2345 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2346 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2347 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2348 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2349 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2350 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2351 | "src/qc8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2352 | "src/qc8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2353 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2354 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2355 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2356 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2357 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2358 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2359 | "src/qc8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2360 | "src/qc8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2361 | "src/qc8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2362 | "src/qc8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2363 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2364 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2365 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2366 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2367 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2368 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2369 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2370 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2371 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2372 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 9cedb59 | 2021-08-17 17:25:24 -0700 | [diff] [blame] | 2373 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| Frank Barchard | 0049e89 | 2021-08-22 09:37:21 -0700 | [diff] [blame] | 2374 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | fbf12b0 | 2021-12-09 22:39:15 -0800 | [diff] [blame] | 2375 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x8.c", |
| 2376 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x16.c", |
| 2377 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x24.c", |
| 2378 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x32.c", |
| Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2379 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c8.c", |
| 2380 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c16.c", |
| 2381 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c24.c", |
| 2382 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c32.c", |
| 2383 | "src/qs8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c8.c", |
| 2384 | "src/qs8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c16.c", |
| 2385 | "src/qs8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c24.c", |
| 2386 | "src/qs8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c32.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2387 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2388 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 2389 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2390 | "src/qs8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2391 | "src/qs8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2392 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2393 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2394 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2395 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2396 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2397 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2398 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2399 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 2400 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2401 | "src/qs8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2402 | "src/qs8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2403 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2404 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2405 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2406 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2407 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2408 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2409 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2410 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 2411 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2412 | "src/qs8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2413 | "src/qs8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2414 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2415 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2416 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2417 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2418 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2419 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2420 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2421 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 2422 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2423 | "src/qs8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2424 | "src/qs8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2425 | "src/qs8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2426 | "src/qs8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2427 | "src/qs8-gemm/gen/4x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| 2428 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2429 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2430 | "src/qs8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2431 | "src/qs8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2432 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2433 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2434 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2435 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2436 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2437 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2438 | "src/qs8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2439 | "src/qs8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2440 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2441 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2442 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2443 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2444 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2445 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2446 | "src/qs8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2447 | "src/qs8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2448 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2449 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2450 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2451 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2452 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2453 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 0f1ed94 | 2021-12-08 23:25:50 -0800 | [diff] [blame] | 2454 | "src/qs8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2455 | "src/qs8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2456 | "src/qs8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2457 | "src/qs8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 2e23d2b | 2020-07-29 16:01:37 -0700 | [diff] [blame] | 2458 | "src/qs8-requantization/fp32-wasmsimd.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 2459 | "src/qs8-requantization/gemmlowp-wasmsimd.c", |
| Marat Dukhan | 5df27f8 | 2020-09-02 23:59:21 -0700 | [diff] [blame] | 2460 | "src/qs8-vadd/gen/minmax-wasmsimd-x8.c", |
| 2461 | "src/qs8-vadd/gen/minmax-wasmsimd-x16.c", |
| 2462 | "src/qs8-vadd/gen/minmax-wasmsimd-x24.c", |
| 2463 | "src/qs8-vadd/gen/minmax-wasmsimd-x32.c", |
| 2464 | "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c", |
| 2465 | "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c", |
| 2466 | "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c", |
| 2467 | "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c", |
| Marat Dukhan | 661ea6d | 2021-08-02 11:25:41 -0700 | [diff] [blame] | 2468 | "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2469 | "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| 2470 | "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2471 | "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| Marat Dukhan | f601135 | 2021-07-15 15:11:14 -0700 | [diff] [blame] | 2472 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| 2473 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| 2474 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| 2475 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| 2476 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| 2477 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| Marat Dukhan | fbf12b0 | 2021-12-09 22:39:15 -0800 | [diff] [blame] | 2478 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x8.c", |
| 2479 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x16.c", |
| 2480 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x24.c", |
| 2481 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x32.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 2482 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c8.c", |
| 2483 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c16.c", |
| 2484 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c24.c", |
| 2485 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c32.c", |
| 2486 | "src/qu8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c8.c", |
| 2487 | "src/qu8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c16.c", |
| 2488 | "src/qu8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c24.c", |
| 2489 | "src/qu8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c32.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2490 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2491 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2492 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2493 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2494 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2495 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2496 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2497 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2498 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2499 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2500 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2501 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2502 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2503 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2504 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2505 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2506 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2507 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2508 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2509 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2510 | "src/qu8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2511 | "src/qu8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2512 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2513 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2514 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2515 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2516 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2517 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2518 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2519 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2520 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2521 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2522 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2523 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2524 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2525 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2526 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2527 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | dfc2db0 | 2021-08-08 21:19:07 -0700 | [diff] [blame] | 2528 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2529 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 2530 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2531 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2532 | "src/qu8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2533 | "src/qu8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 2534 | "src/qu8-requantization/fp32-wasmsimd.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 2535 | "src/qu8-requantization/gemmlowp-wasmsimd.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 2536 | "src/qu8-vadd/gen/minmax-wasmsimd-x8.c", |
| 2537 | "src/qu8-vadd/gen/minmax-wasmsimd-x16.c", |
| Marat Dukhan | e20a873 | 2021-12-07 17:11:37 -0800 | [diff] [blame] | 2538 | "src/qu8-vadd/gen/minmax-wasmsimd-x32.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 2539 | "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c", |
| 2540 | "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c", |
| Marat Dukhan | e20a873 | 2021-12-07 17:11:37 -0800 | [diff] [blame] | 2541 | "src/qu8-vaddc/gen/minmax-wasmsimd-x32.c", |
| Marat Dukhan | 661ea6d | 2021-08-02 11:25:41 -0700 | [diff] [blame] | 2542 | "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2543 | "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| 2544 | "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2545 | "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| Marat Dukhan | 266a47b | 2021-11-24 13:58:12 -0800 | [diff] [blame] | 2546 | "src/s8-ibilinear/gen/wasmsimd-dot16x2-c8.c", |
| 2547 | "src/s8-ibilinear/gen/wasmsimd-dot16x2-c16.c", |
| 2548 | "src/s8-ibilinear/gen/wasmsimd-mul32-c8.c", |
| 2549 | "src/s8-ibilinear/gen/wasmsimd-mul32-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 2550 | "src/s8-maxpool/9p8x-minmax-wasmsimd-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 2551 | "src/s8-vclamp/wasmsimd-x64.c", |
| Marat Dukhan | 266a47b | 2021-11-24 13:58:12 -0800 | [diff] [blame] | 2552 | "src/u8-ibilinear/gen/wasmsimd-dot16x2-c8.c", |
| 2553 | "src/u8-ibilinear/gen/wasmsimd-dot16x2-c16.c", |
| 2554 | "src/u8-ibilinear/gen/wasmsimd-mul32-c8.c", |
| 2555 | "src/u8-ibilinear/gen/wasmsimd-mul32-c16.c", |
| Marat Dukhan | f158942 | 2021-08-15 20:37:06 -0700 | [diff] [blame] | 2556 | "src/u8-maxpool/9p8x-minmax-wasmsimd-c16.c", |
| Marat Dukhan | 1f5b108 | 2021-08-16 17:01:44 -0700 | [diff] [blame] | 2557 | "src/u8-vclamp/wasmsimd-x64.c", |
| Marat Dukhan | a4ad988 | 2021-09-18 08:06:04 -0700 | [diff] [blame] | 2558 | "src/x8-lut/gen/lut-wasmsimd-x16.c", |
| 2559 | "src/x8-lut/gen/lut-wasmsimd-x32.c", |
| 2560 | "src/x8-lut/gen/lut-wasmsimd-x48.c", |
| 2561 | "src/x8-lut/gen/lut-wasmsimd-x64.c", |
| Marat Dukhan | 66d99e9 | 2020-07-16 12:56:21 -0700 | [diff] [blame] | 2562 | "src/x32-packx/x4-wasmsimd.c", |
| Alan Kelly | 2493de9 | 2021-12-23 07:17:09 -0800 | [diff] [blame] | 2563 | "src/x32-transpose/4x4-wasmsimd.c", |
| Marat Dukhan | 9d4bfa2 | 2020-07-16 19:07:04 -0700 | [diff] [blame] | 2564 | "src/x32-unpool/wasmsimd.c", |
| Marat Dukhan | e3b7876 | 2020-07-16 20:02:58 -0700 | [diff] [blame] | 2565 | "src/x32-zip/x2-wasmsimd.c", |
| 2566 | "src/x32-zip/x3-wasmsimd.c", |
| 2567 | "src/x32-zip/x4-wasmsimd.c", |
| 2568 | "src/x32-zip/xm-wasmsimd.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 2569 | "src/xx-fill/wasmsimd-x64.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 2570 | "src/xx-pad/wasmsimd.c", |
| Marat Dukhan | 290055c | 2020-06-09 12:24:29 -0700 | [diff] [blame] | 2571 | ] |
| 2572 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2573 | # ISA-specific micro-kernels |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2574 | PROD_NEON_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 2575 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2576 | "src/f32-argmaxpool/4x-neon-c4.c", |
| 2577 | "src/f32-argmaxpool/9p8x-neon-c4.c", |
| 2578 | "src/f32-argmaxpool/9x-neon-c4.c", |
| 2579 | "src/f32-avgpool/9p8x-minmax-neon-c4.c", |
| 2580 | "src/f32-avgpool/9x-minmax-neon-c4.c", |
| 2581 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 2582 | "src/f32-dwconv/gen/up8x3-minmax-neon.c", |
| Frank Barchard | dbe781b | 2021-10-18 10:29:52 -0700 | [diff] [blame] | 2583 | "src/f32-dwconv/gen/up8x4-minmax-neon.c", |
| 2584 | "src/f32-dwconv/gen/up8x9-minmax-neon.c", |
| 2585 | "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2586 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c", |
| 2587 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c", |
| 2588 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c", |
| 2589 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 2590 | "src/f32-f16-vcvt/gen/vcvt-neon-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2591 | "src/f32-gavgpool-cw/neon-x4.c", |
| 2592 | "src/f32-gavgpool/7p7x-minmax-neon-c4.c", |
| 2593 | "src/f32-gavgpool/7x-minmax-neon-c4.c", |
| 2594 | "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 2595 | "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2596 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2597 | "src/f32-ibilinear-chw/gen/neon-p8.c", |
| 2598 | "src/f32-ibilinear/gen/neon-c8.c", |
| 2599 | "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 2600 | "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2601 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2602 | "src/f32-maxpool/9p8x-minmax-neon-c4.c", |
| 2603 | "src/f32-pavgpool/9p8x-minmax-neon-c4.c", |
| 2604 | "src/f32-pavgpool/9x-minmax-neon-c4.c", |
| 2605 | "src/f32-prelu/gen/neon-2x8.c", |
| Marat Dukhan | ed2d776 | 2021-12-03 23:51:19 -0800 | [diff] [blame] | 2606 | "src/f32-qs8-vcvt/gen/vcvt-neon-x32.c", |
| 2607 | "src/f32-qu8-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 2608 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2609 | "src/f32-rmax/neon.c", |
| 2610 | "src/f32-spmm/gen/32x1-minmax-neon.c", |
| 2611 | "src/f32-vbinary/gen/vadd-minmax-neon-x8.c", |
| 2612 | "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c", |
| 2613 | "src/f32-vbinary/gen/vmax-neon-x8.c", |
| 2614 | "src/f32-vbinary/gen/vmaxc-neon-x8.c", |
| 2615 | "src/f32-vbinary/gen/vmin-neon-x8.c", |
| 2616 | "src/f32-vbinary/gen/vminc-neon-x8.c", |
| 2617 | "src/f32-vbinary/gen/vmul-minmax-neon-x8.c", |
| 2618 | "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c", |
| 2619 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c", |
| 2620 | "src/f32-vbinary/gen/vsqrdiff-neon-x8.c", |
| 2621 | "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c", |
| 2622 | "src/f32-vbinary/gen/vsub-minmax-neon-x8.c", |
| 2623 | "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c", |
| 2624 | "src/f32-vclamp/gen/vclamp-neon-x8.c", |
| 2625 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c", |
| 2626 | "src/f32-vhswish/gen/vhswish-neon-x16.c", |
| 2627 | "src/f32-vlrelu/gen/vlrelu-neon-x8.c", |
| 2628 | "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c", |
| 2629 | "src/f32-vrnd/gen/vrndd-neon-x8.c", |
| 2630 | "src/f32-vrnd/gen/vrndne-neon-x8.c", |
| 2631 | "src/f32-vrnd/gen/vrndu-neon-x8.c", |
| 2632 | "src/f32-vrnd/gen/vrndz-neon-x8.c", |
| 2633 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c", |
| 2634 | "src/f32-vunary/gen/vabs-neon-x8.c", |
| 2635 | "src/f32-vunary/gen/vneg-neon-x8.c", |
| 2636 | "src/f32-vunary/gen/vsqr-neon-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2637 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c", |
| Frank Barchard | 7da8b02 | 2021-08-31 09:49:10 -0700 | [diff] [blame] | 2638 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c", |
| 2639 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2640 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 2641 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 2642 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 2643 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2644 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c", |
| Frank Barchard | 7da8b02 | 2021-08-31 09:49:10 -0700 | [diff] [blame] | 2645 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c", |
| 2646 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 2647 | "src/qs8-f32-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2648 | "src/qs8-gavgpool/gen/7p7x-minmax-rndnu-neon-c8.c", |
| 2649 | "src/qs8-gavgpool/gen/7x-minmax-rndnu-neon-c8.c", |
| Frank Barchard | 9519816 | 2021-12-21 17:29:10 -0800 | [diff] [blame] | 2650 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2651 | "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2652 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2653 | "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 9519816 | 2021-12-21 17:29:10 -0800 | [diff] [blame] | 2654 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2655 | "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2656 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 2657 | "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 01debd9 | 2021-07-29 18:14:21 -0700 | [diff] [blame] | 2658 | "src/qs8-vadd/gen/minmax-neon-ld64-x16.c", |
| 2659 | "src/qs8-vadd/gen/minmax-neon-ld64-x32.c", |
| 2660 | "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 2661 | "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 2662 | "src/qs8-vmul/gen/minmax-rndnu-neon-ld64-x16.c", |
| 2663 | "src/qs8-vmulc/gen/minmax-rndnu-neon-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2664 | "src/qu8-avgpool/9p8x-minmax-neon-c8.c", |
| 2665 | "src/qu8-avgpool/9x-minmax-neon-c8.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 2666 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c", |
| 2667 | "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 2668 | "src/qu8-f32-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2669 | "src/qu8-gavgpool/gen/7p7x-minmax-rndnu-neon-c8.c", |
| 2670 | "src/qu8-gavgpool/gen/7x-minmax-rndnu-neon-c8.c", |
| Frank Barchard | 7781786 | 2022-01-11 23:20:38 -0800 | [diff] [blame] | 2671 | "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2672 | "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 7781786 | 2022-01-11 23:20:38 -0800 | [diff] [blame] | 2673 | "src/qu8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2674 | "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 7781786 | 2022-01-11 23:20:38 -0800 | [diff] [blame] | 2675 | "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2676 | "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 7781786 | 2022-01-11 23:20:38 -0800 | [diff] [blame] | 2677 | "src/qu8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2678 | "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 0a3093c | 2021-08-31 09:58:11 -0700 | [diff] [blame] | 2679 | "src/qu8-vadd/gen/minmax-neon-ld64-x16.c", |
| 2680 | "src/qu8-vadd/gen/minmax-neon-ld64-x32.c", |
| 2681 | "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 2682 | "src/qu8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 2683 | "src/qu8-vmul/gen/minmax-rndnu-neon-ld64-x16.c", |
| 2684 | "src/qu8-vmulc/gen/minmax-rndnu-neon-ld64-x16.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 2685 | "src/s8-ibilinear/gen/neon-c8.c", |
| 2686 | "src/s8-ibilinear/gen/neon-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 2687 | "src/s8-maxpool/9p8x-minmax-neon-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 2688 | "src/s8-vclamp/neon-x64.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 2689 | "src/u8-ibilinear/gen/neon-c8.c", |
| 2690 | "src/u8-ibilinear/gen/neon-c16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2691 | "src/u8-maxpool/9p8x-minmax-neon-c16.c", |
| 2692 | "src/u8-rmax/neon.c", |
| 2693 | "src/u8-vclamp/neon-x64.c", |
| 2694 | "src/x8-zip/x2-neon.c", |
| 2695 | "src/x8-zip/x3-neon.c", |
| 2696 | "src/x8-zip/x4-neon.c", |
| 2697 | "src/x8-zip/xm-neon.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2698 | "src/x32-packx/x4-neon-st4.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2699 | "src/x32-unpool/neon.c", |
| 2700 | "src/x32-zip/x2-neon.c", |
| 2701 | "src/x32-zip/x3-neon.c", |
| 2702 | "src/x32-zip/x4-neon.c", |
| 2703 | "src/x32-zip/xm-neon.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 2704 | "src/xx-fill/neon-x64.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 2705 | "src/xx-pad/neon.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 2706 | ] |
| 2707 | |
| 2708 | ALL_NEON_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 322ed6f | 2021-10-16 17:44:16 -0700 | [diff] [blame] | 2709 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x8.c", |
| 2710 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c", |
| 2711 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x24.c", |
| 2712 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x32.c", |
| 2713 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x8.c", |
| 2714 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x16.c", |
| 2715 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x24.c", |
| 2716 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x32.c", |
| Marat Dukhan | ef25c6d | 2020-07-24 00:59:40 -0700 | [diff] [blame] | 2717 | "src/f32-argmaxpool/4x-neon-c4.c", |
| 2718 | "src/f32-argmaxpool/9p8x-neon-c4.c", |
| 2719 | "src/f32-argmaxpool/9x-neon-c4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2720 | "src/f32-avgpool/9p8x-minmax-neon-c4.c", |
| 2721 | "src/f32-avgpool/9x-minmax-neon-c4.c", |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 2722 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2723 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2724 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2725 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c", |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 2726 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2727 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2728 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 2729 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c", |
| Marat Dukhan | c763488 | 2020-12-07 15:11:12 -0800 | [diff] [blame] | 2730 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 2731 | "src/f32-dwconv/gen/up4x3-minmax-neon-acc2.c", |
| 2732 | "src/f32-dwconv/gen/up4x3-minmax-neon.c", |
| Marat Dukhan | f5425ea | 2020-04-24 01:46:00 -0700 | [diff] [blame] | 2733 | "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2734 | "src/f32-dwconv/gen/up4x4-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2735 | "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2736 | "src/f32-dwconv/gen/up4x9-minmax-neon.c", |
| Marat Dukhan | f5425ea | 2020-04-24 01:46:00 -0700 | [diff] [blame] | 2737 | "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2738 | "src/f32-dwconv/gen/up4x25-minmax-neon.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 2739 | "src/f32-dwconv/gen/up8x3-minmax-neon-acc2.c", |
| 2740 | "src/f32-dwconv/gen/up8x3-minmax-neon.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2741 | "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c", |
| 2742 | "src/f32-dwconv/gen/up8x4-minmax-neon.c", |
| 2743 | "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c", |
| 2744 | "src/f32-dwconv/gen/up8x9-minmax-neon.c", |
| Marat Dukhan | f5425ea | 2020-04-24 01:46:00 -0700 | [diff] [blame] | 2745 | "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2746 | "src/f32-dwconv/gen/up8x25-minmax-neon.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2747 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c", |
| 2748 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c", |
| 2749 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c", |
| Marat Dukhan | c581e48 | 2020-10-24 01:28:11 -0700 | [diff] [blame] | 2750 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2751 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c", |
| Marat Dukhan | c581e48 | 2020-10-24 01:28:11 -0700 | [diff] [blame] | 2752 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c", |
| 2753 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c", |
| 2754 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c", |
| 2755 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c", |
| 2756 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 2757 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c", |
| 2758 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c", |
| 2759 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2760 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 2761 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2762 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c", |
| 2763 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c", |
| 2764 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2765 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c", |
| 2766 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c", |
| 2767 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c", |
| 2768 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2769 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2770 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c", |
| 2771 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2772 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2773 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2774 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 2775 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 2776 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c", |
| 2777 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 2778 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c", |
| 2779 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c", |
| 2780 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c", |
| 2781 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c", |
| 2782 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c", |
| 2783 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c", |
| 2784 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c", |
| 2785 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 2786 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 2787 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c", |
| Marat Dukhan | 4edfdbf | 2021-11-09 13:47:11 -0800 | [diff] [blame] | 2788 | "src/f32-f16-vcvt/gen/vcvt-neon-x8.c", |
| 2789 | "src/f32-f16-vcvt/gen/vcvt-neon-x16.c", |
| 2790 | "src/f32-f16-vcvt/gen/vcvt-neon-x24.c", |
| 2791 | "src/f32-f16-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 2792 | "src/f32-gavgpool-cw/neon-x4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2793 | "src/f32-gavgpool/7p7x-minmax-neon-c4.c", |
| 2794 | "src/f32-gavgpool/7x-minmax-neon-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2795 | "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2796 | "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c", |
| 2797 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2798 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2799 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c", |
| 2800 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c", |
| 2801 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c", |
| 2802 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c", |
| 2803 | "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2804 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c", |
| 2805 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2806 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c", |
| 2807 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2808 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c", |
| 2809 | "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2810 | "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c", |
| 2811 | "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 2812 | "src/f32-gemm/gen/1x8s4-minmax-neon.c", |
| 2813 | "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2814 | "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c", |
| 2815 | "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c", |
| 2816 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2817 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c", |
| 2818 | "src/f32-gemm/gen/4x8s4-minmax-neon.c", |
| 2819 | "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c", |
| 2820 | "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c", |
| 2821 | "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c", |
| 2822 | "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c", |
| 2823 | "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c", |
| 2824 | "src/f32-gemm/gen/6x8s4-minmax-neon.c", |
| 2825 | "src/f32-gemm/gen/8x8s4-minmax-neon.c", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 2826 | "src/f32-ibilinear-chw/gen/neon-p4.c", |
| 2827 | "src/f32-ibilinear-chw/gen/neon-p8.c", |
| Frank Barchard | 8247e21 | 2021-02-03 18:12:33 -0800 | [diff] [blame] | 2828 | "src/f32-ibilinear/gen/neon-c4.c", |
| 2829 | "src/f32-ibilinear/gen/neon-c8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2830 | "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2831 | "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2832 | "src/f32-igemm/gen/1x8s4-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2833 | "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2834 | "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2835 | "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2836 | "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c", |
| 2837 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2838 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c", |
| 2839 | "src/f32-igemm/gen/4x8s4-minmax-neon.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2840 | "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c", |
| 2841 | "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2842 | "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c", |
| 2843 | "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2844 | "src/f32-igemm/gen/6x8s4-minmax-neon.c", |
| 2845 | "src/f32-igemm/gen/8x8s4-minmax-neon.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2846 | "src/f32-maxpool/9p8x-minmax-neon-c4.c", |
| 2847 | "src/f32-pavgpool/9p8x-minmax-neon-c4.c", |
| 2848 | "src/f32-pavgpool/9x-minmax-neon-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 2849 | "src/f32-ppmm/gen/4x8-minmax-neon.c", |
| 2850 | "src/f32-ppmm/gen/8x8-minmax-neon.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 2851 | "src/f32-prelu/gen/neon-1x4.c", |
| 2852 | "src/f32-prelu/gen/neon-1x8.c", |
| 2853 | "src/f32-prelu/gen/neon-1x16.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 2854 | "src/f32-prelu/gen/neon-2x4.c", |
| 2855 | "src/f32-prelu/gen/neon-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 2856 | "src/f32-prelu/gen/neon-2x16.c", |
| 2857 | "src/f32-prelu/gen/neon-4x4.c", |
| 2858 | "src/f32-prelu/gen/neon-4x8.c", |
| 2859 | "src/f32-prelu/gen/neon-4x16.c", |
| Marat Dukhan | b2d0a2a | 2021-12-02 09:04:57 -0800 | [diff] [blame] | 2860 | "src/f32-qs8-vcvt/gen/vcvt-neon-x8.c", |
| 2861 | "src/f32-qs8-vcvt/gen/vcvt-neon-x16.c", |
| 2862 | "src/f32-qs8-vcvt/gen/vcvt-neon-x24.c", |
| 2863 | "src/f32-qs8-vcvt/gen/vcvt-neon-x32.c", |
| 2864 | "src/f32-qu8-vcvt/gen/vcvt-neon-x8.c", |
| 2865 | "src/f32-qu8-vcvt/gen/vcvt-neon-x16.c", |
| 2866 | "src/f32-qu8-vcvt/gen/vcvt-neon-x24.c", |
| 2867 | "src/f32-qu8-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 2868 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x4.c", |
| 2869 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8-acc2.c", |
| 2870 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8.c", |
| 2871 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12-acc2.c", |
| 2872 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12-acc3.c", |
| 2873 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12.c", |
| 2874 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16-acc2.c", |
| 2875 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16-acc4.c", |
| 2876 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16.c", |
| 2877 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20-acc2.c", |
| 2878 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20-acc5.c", |
| 2879 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20.c", |
| 2880 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x4.c", |
| 2881 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x8-acc2.c", |
| 2882 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x8.c", |
| 2883 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12-acc2.c", |
| 2884 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12-acc3.c", |
| 2885 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12.c", |
| 2886 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16-acc2.c", |
| 2887 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16-acc4.c", |
| 2888 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16.c", |
| 2889 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20-acc2.c", |
| 2890 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20-acc5.c", |
| 2891 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 2892 | "src/f32-rmax/neon.c", |
| Marat Dukhan | 5b86c43 | 2020-12-06 19:15:03 -0800 | [diff] [blame] | 2893 | "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c", |
| 2894 | "src/f32-spmm/gen/4x1-minmax-neon-x2.c", |
| 2895 | "src/f32-spmm/gen/4x1-minmax-neon.c", |
| 2896 | "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c", |
| 2897 | "src/f32-spmm/gen/8x1-minmax-neon-x2.c", |
| 2898 | "src/f32-spmm/gen/8x1-minmax-neon.c", |
| 2899 | "src/f32-spmm/gen/12x1-minmax-neon.c", |
| 2900 | "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c", |
| 2901 | "src/f32-spmm/gen/16x1-minmax-neon-x2.c", |
| 2902 | "src/f32-spmm/gen/16x1-minmax-neon.c", |
| 2903 | "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c", |
| 2904 | "src/f32-spmm/gen/32x1-minmax-neon-x2.c", |
| 2905 | "src/f32-spmm/gen/32x1-minmax-neon.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 2906 | "src/f32-vbinary/gen/vadd-minmax-neon-x4.c", |
| 2907 | "src/f32-vbinary/gen/vadd-minmax-neon-x8.c", |
| 2908 | "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c", |
| 2909 | "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 2910 | "src/f32-vbinary/gen/vmax-neon-x4.c", |
| 2911 | "src/f32-vbinary/gen/vmax-neon-x8.c", |
| 2912 | "src/f32-vbinary/gen/vmaxc-neon-x4.c", |
| 2913 | "src/f32-vbinary/gen/vmaxc-neon-x8.c", |
| 2914 | "src/f32-vbinary/gen/vmin-neon-x4.c", |
| 2915 | "src/f32-vbinary/gen/vmin-neon-x8.c", |
| 2916 | "src/f32-vbinary/gen/vminc-neon-x4.c", |
| 2917 | "src/f32-vbinary/gen/vminc-neon-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 2918 | "src/f32-vbinary/gen/vmul-minmax-neon-x4.c", |
| 2919 | "src/f32-vbinary/gen/vmul-minmax-neon-x8.c", |
| 2920 | "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c", |
| 2921 | "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c", |
| 2922 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c", |
| 2923 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 2924 | "src/f32-vbinary/gen/vsqrdiff-neon-x4.c", |
| 2925 | "src/f32-vbinary/gen/vsqrdiff-neon-x8.c", |
| 2926 | "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c", |
| 2927 | "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 2928 | "src/f32-vbinary/gen/vsub-minmax-neon-x4.c", |
| 2929 | "src/f32-vbinary/gen/vsub-minmax-neon-x8.c", |
| 2930 | "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c", |
| 2931 | "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2932 | "src/f32-vclamp/gen/vclamp-neon-x4.c", |
| 2933 | "src/f32-vclamp/gen/vclamp-neon-x8.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2934 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c", |
| 2935 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c", |
| 2936 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c", |
| 2937 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c", |
| 2938 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c", |
| 2939 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c", |
| 2940 | "src/f32-velu/gen/velu-neon-rr2-p6-x4.c", |
| 2941 | "src/f32-velu/gen/velu-neon-rr2-p6-x8.c", |
| 2942 | "src/f32-velu/gen/velu-neon-rr2-p6-x12.c", |
| 2943 | "src/f32-velu/gen/velu-neon-rr2-p6-x16.c", |
| 2944 | "src/f32-velu/gen/velu-neon-rr2-p6-x20.c", |
| 2945 | "src/f32-velu/gen/velu-neon-rr2-p6-x24.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 2946 | "src/f32-vhswish/gen/vhswish-neon-x4.c", |
| 2947 | "src/f32-vhswish/gen/vhswish-neon-x8.c", |
| 2948 | "src/f32-vhswish/gen/vhswish-neon-x16.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 2949 | "src/f32-vlrelu/gen/vlrelu-neon-x4.c", |
| 2950 | "src/f32-vlrelu/gen/vlrelu-neon-x8.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2951 | "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c", |
| 2952 | "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2953 | "src/f32-vrelu/gen/vrelu-neon-x4.c", |
| 2954 | "src/f32-vrelu/gen/vrelu-neon-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 2955 | "src/f32-vrnd/gen/vrndd-neon-x4.c", |
| 2956 | "src/f32-vrnd/gen/vrndd-neon-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2957 | "src/f32-vrnd/gen/vrndne-neon-x4.c", |
| 2958 | "src/f32-vrnd/gen/vrndne-neon-x8.c", |
| 2959 | "src/f32-vrnd/gen/vrndu-neon-x4.c", |
| 2960 | "src/f32-vrnd/gen/vrndu-neon-x8.c", |
| 2961 | "src/f32-vrnd/gen/vrndz-neon-x4.c", |
| 2962 | "src/f32-vrnd/gen/vrndz-neon-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 2963 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c", |
| 2964 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c", |
| 2965 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c", |
| 2966 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c", |
| 2967 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c", |
| 2968 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c", |
| 2969 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c", |
| 2970 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c", |
| 2971 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c", |
| 2972 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c", |
| 2973 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c", |
| 2974 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c", |
| 2975 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c", |
| 2976 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c", |
| 2977 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c", |
| 2978 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c", |
| 2979 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c", |
| 2980 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 2981 | "src/f32-vunary/gen/vabs-neon-x4.c", |
| 2982 | "src/f32-vunary/gen/vabs-neon-x8.c", |
| 2983 | "src/f32-vunary/gen/vneg-neon-x4.c", |
| 2984 | "src/f32-vunary/gen/vneg-neon-x8.c", |
| 2985 | "src/f32-vunary/gen/vsqr-neon-x4.c", |
| 2986 | "src/f32-vunary/gen/vsqr-neon-x8.c", |
| Marat Dukhan | 60f903b | 2021-09-30 09:43:13 -0700 | [diff] [blame] | 2987 | "src/math/cvt-f16-f32-neon-int16.c", |
| 2988 | "src/math/cvt-f16-f32-neon-int32.c", |
| Marat Dukhan | a6eb1e5 | 2021-11-06 18:29:36 -0700 | [diff] [blame] | 2989 | "src/math/cvt-f32-f16-neon.c", |
| Marat Dukhan | d24301d | 2021-12-02 00:13:45 -0800 | [diff] [blame] | 2990 | "src/math/cvt-f32-qs8-neon.c", |
| 2991 | "src/math/cvt-f32-qu8-neon.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 2992 | "src/math/expm1minus-neon-rr2-lut16-p3.c", |
| 2993 | "src/math/expm1minus-neon-rr2-p6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 2994 | "src/math/roundd-neon-addsub.c", |
| 2995 | "src/math/roundd-neon-cvt.c", |
| 2996 | "src/math/roundne-neon-addsub.c", |
| 2997 | "src/math/roundu-neon-addsub.c", |
| 2998 | "src/math/roundu-neon-cvt.c", |
| 2999 | "src/math/roundz-neon-addsub.c", |
| 3000 | "src/math/roundz-neon-cvt.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3001 | "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c", |
| 3002 | "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c", |
| 3003 | "src/math/sigmoid-neon-rr2-p5-nr2recps.c", |
| 3004 | "src/math/sqrt-neon-nr1rsqrts.c", |
| 3005 | "src/math/sqrt-neon-nr2rsqrts.c", |
| 3006 | "src/math/sqrt-neon-nr3rsqrts.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3007 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c", |
| 3008 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 3009 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3010 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c", |
| 3011 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 3012 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3013 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c", |
| 3014 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c", |
| 3015 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c", |
| 3016 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 3017 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3018 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c", |
| 3019 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c", |
| 3020 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c", |
| 3021 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 3022 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| 3023 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| 3024 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| 3025 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| 3026 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3027 | "src/qc8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3028 | "src/qc8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3029 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3030 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3031 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3032 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3033 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 3034 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3035 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3036 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3037 | "src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 3038 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3039 | "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 3040 | "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3041 | "src/qc8-gemm/gen/2x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3042 | "src/qc8-gemm/gen/2x8-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3043 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3044 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3045 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3046 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3047 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3048 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3049 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3050 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3051 | "src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3052 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3053 | "src/qc8-gemm/gen/2x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3054 | "src/qc8-gemm/gen/2x16-minmax-fp32-neon-mlal-lane.c", |
| 3055 | "src/qc8-gemm/gen/3x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3056 | "src/qc8-gemm/gen/3x8-minmax-fp32-neon-mlal-lane.c", |
| 3057 | "src/qc8-gemm/gen/3x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3058 | "src/qc8-gemm/gen/3x16-minmax-fp32-neon-mlal-lane.c", |
| 3059 | "src/qc8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3060 | "src/qc8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| 3061 | "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 3062 | "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3063 | "src/qc8-gemm/gen/6x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3064 | "src/qc8-gemm/gen/6x8-minmax-fp32-neon-mlal-lane.c", |
| 3065 | "src/qc8-gemm/gen/6x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3066 | "src/qc8-gemm/gen/6x16-minmax-fp32-neon-mlal-lane.c", |
| 3067 | "src/qc8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3068 | "src/qc8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3069 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3070 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3071 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3072 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3073 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 3074 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3075 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3076 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3077 | "src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 3078 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3079 | "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 3080 | "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3081 | "src/qc8-igemm/gen/2x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3082 | "src/qc8-igemm/gen/2x8-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3083 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3084 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3085 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3086 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3087 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3088 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3089 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3090 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3091 | "src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3092 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3093 | "src/qc8-igemm/gen/2x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3094 | "src/qc8-igemm/gen/2x16-minmax-fp32-neon-mlal-lane.c", |
| 3095 | "src/qc8-igemm/gen/3x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3096 | "src/qc8-igemm/gen/3x8-minmax-fp32-neon-mlal-lane.c", |
| 3097 | "src/qc8-igemm/gen/3x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3098 | "src/qc8-igemm/gen/3x16-minmax-fp32-neon-mlal-lane.c", |
| 3099 | "src/qc8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3100 | "src/qc8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| 3101 | "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 3102 | "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 3103 | "src/qc8-igemm/gen/6x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3104 | "src/qc8-igemm/gen/6x8-minmax-fp32-neon-mlal-lane.c", |
| 3105 | "src/qc8-igemm/gen/6x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3106 | "src/qc8-igemm/gen/6x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3107 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3108 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c", |
| 3109 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 3110 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3111 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3112 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c", |
| 3113 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 3114 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3115 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3116 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c", |
| 3117 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c", |
| 3118 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c", |
| 3119 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 3120 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3121 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 3122 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c", |
| 3123 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c", |
| 3124 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c", |
| 3125 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c", |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 3126 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3127 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3128 | "src/qs8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3129 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3130 | "src/qs8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3131 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3132 | "src/qs8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 6f90529 | 2021-06-25 11:12:05 -0700 | [diff] [blame] | 3133 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 2aa2e2a | 2021-09-16 14:59:13 -0700 | [diff] [blame] | 3134 | "src/qs8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | fee66be | 2021-12-09 17:51:15 -0800 | [diff] [blame] | 3135 | "src/qs8-f32-vcvt/gen/vcvt-neon-x8.c", |
| 3136 | "src/qs8-f32-vcvt/gen/vcvt-neon-x16.c", |
| 3137 | "src/qs8-f32-vcvt/gen/vcvt-neon-x24.c", |
| 3138 | "src/qs8-f32-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3139 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neon-c8.c", |
| 3140 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neon-c16.c", |
| 3141 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neon-c24.c", |
| 3142 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neon-c32.c", |
| Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3143 | "src/qs8-gavgpool/gen/7p7x-minmax-rndnu-neon-c8.c", |
| 3144 | "src/qs8-gavgpool/gen/7p7x-minmax-rndnu-neon-c16.c", |
| 3145 | "src/qs8-gavgpool/gen/7p7x-minmax-rndnu-neon-c24.c", |
| 3146 | "src/qs8-gavgpool/gen/7p7x-minmax-rndnu-neon-c32.c", |
| Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3147 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neon-c8.c", |
| 3148 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neon-c16.c", |
| 3149 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neon-c24.c", |
| 3150 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neon-c32.c", |
| Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3151 | "src/qs8-gavgpool/gen/7x-minmax-rndnu-neon-c8.c", |
| 3152 | "src/qs8-gavgpool/gen/7x-minmax-rndnu-neon-c16.c", |
| 3153 | "src/qs8-gavgpool/gen/7x-minmax-rndnu-neon-c24.c", |
| 3154 | "src/qs8-gavgpool/gen/7x-minmax-rndnu-neon-c32.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3155 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3156 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3157 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3158 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3159 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3160 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3161 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3162 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3163 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3164 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3165 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3166 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3167 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3168 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3169 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3170 | "src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 3171 | "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3172 | "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c", |
| 3173 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3174 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3175 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3176 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3177 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3178 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3179 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3180 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3181 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3182 | "src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 3183 | "src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3184 | "src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c", |
| 3185 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3186 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3187 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mull.c", |
| 3188 | "src/qs8-gemm/gen/1x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 3189 | "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 3190 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3191 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3192 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3193 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3194 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3195 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3196 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3197 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3198 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3199 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3200 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3201 | "src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3202 | "src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c", |
| 3203 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3204 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3205 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3206 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3207 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3208 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3209 | "src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3210 | "src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3211 | "src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mlal.c", |
| 3212 | "src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mull.c", |
| 3213 | "src/qs8-gemm/gen/1x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3214 | "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3215 | "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3216 | "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3217 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3218 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3219 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3220 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3221 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3222 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3223 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3224 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3225 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3226 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3227 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3228 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3229 | "src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3230 | "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3231 | "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c", |
| 3232 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3233 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3234 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3235 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3236 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3237 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3238 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3239 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3240 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3241 | "src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3242 | "src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3243 | "src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c", |
| 3244 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3245 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3246 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mull.c", |
| 3247 | "src/qs8-gemm/gen/2x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3248 | "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3249 | "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3250 | "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3251 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3252 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3253 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3254 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3255 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3256 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3257 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3258 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3259 | "src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3260 | "src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c", |
| 3261 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3262 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3263 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3264 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3265 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3266 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3267 | "src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3268 | "src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3269 | "src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mlal.c", |
| 3270 | "src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mull.c", |
| 3271 | "src/qs8-gemm/gen/2x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3272 | "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3273 | "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3274 | "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3275 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3276 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3277 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3278 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3279 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3280 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3281 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3282 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3283 | "src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3284 | "src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c", |
| 3285 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3286 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3287 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3288 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3289 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3290 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3291 | "src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3292 | "src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3293 | "src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mlal.c", |
| 3294 | "src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mull.c", |
| 3295 | "src/qs8-gemm/gen/3x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3296 | "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3297 | "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3298 | "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3299 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3300 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3301 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3302 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3303 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3304 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3305 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3306 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3307 | "src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3308 | "src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c", |
| 3309 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3310 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3311 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3312 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3313 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3314 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3315 | "src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3316 | "src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3317 | "src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mlal.c", |
| 3318 | "src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mull.c", |
| 3319 | "src/qs8-gemm/gen/3x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3320 | "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3321 | "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3322 | "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3323 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3324 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3325 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3326 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3327 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3328 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3329 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3330 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3331 | "src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3332 | "src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c", |
| 3333 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3334 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3335 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3336 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3337 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3338 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3339 | "src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3340 | "src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3341 | "src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mlal.c", |
| 3342 | "src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mull.c", |
| 3343 | "src/qs8-gemm/gen/4x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 3344 | "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 3345 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3346 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3347 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3348 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3349 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3350 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3351 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3352 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3353 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3354 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3355 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3356 | "src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3357 | "src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c", |
| 3358 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3359 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3360 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3361 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3362 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3363 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3364 | "src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3365 | "src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3366 | "src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mlal.c", |
| 3367 | "src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mull.c", |
| 3368 | "src/qs8-gemm/gen/4x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3369 | "src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3370 | "src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3371 | "src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3372 | "src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3373 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3374 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3375 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3376 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3377 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3378 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3379 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3380 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3381 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3382 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3383 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3384 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3385 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3386 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3387 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3388 | "src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 3389 | "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3390 | "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c", |
| 3391 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3392 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3393 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3394 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3395 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3396 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3397 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3398 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3399 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3400 | "src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 3401 | "src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3402 | "src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c", |
| 3403 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3404 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3405 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mull.c", |
| 3406 | "src/qs8-igemm/gen/1x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 3407 | "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 3408 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3409 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3410 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3411 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3412 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3413 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3414 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3415 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3416 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3417 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3418 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3419 | "src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3420 | "src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c", |
| 3421 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3422 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3423 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3424 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3425 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3426 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3427 | "src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3428 | "src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3429 | "src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mlal.c", |
| 3430 | "src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mull.c", |
| 3431 | "src/qs8-igemm/gen/1x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3432 | "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3433 | "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3434 | "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3435 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3436 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3437 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3438 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3439 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3440 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3441 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3442 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3443 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3444 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3445 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3446 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3447 | "src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3448 | "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3449 | "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c", |
| 3450 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3451 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3452 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3453 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3454 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3455 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3456 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3457 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3458 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3459 | "src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3460 | "src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3461 | "src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c", |
| 3462 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3463 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3464 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mull.c", |
| 3465 | "src/qs8-igemm/gen/2x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3466 | "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3467 | "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3468 | "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3469 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3470 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3471 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3472 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3473 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3474 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3475 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3476 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3477 | "src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3478 | "src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c", |
| 3479 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3480 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3481 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3482 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3483 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3484 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3485 | "src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3486 | "src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3487 | "src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mlal.c", |
| 3488 | "src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mull.c", |
| 3489 | "src/qs8-igemm/gen/2x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3490 | "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3491 | "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3492 | "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3493 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3494 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3495 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3496 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3497 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3498 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3499 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3500 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3501 | "src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3502 | "src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c", |
| 3503 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3504 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3505 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3506 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3507 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3508 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3509 | "src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3510 | "src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3511 | "src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mlal.c", |
| 3512 | "src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mull.c", |
| 3513 | "src/qs8-igemm/gen/3x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3514 | "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3515 | "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3516 | "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3517 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3518 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3519 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3520 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3521 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3522 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3523 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3524 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3525 | "src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3526 | "src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c", |
| 3527 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3528 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3529 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3530 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3531 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3532 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3533 | "src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3534 | "src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3535 | "src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mlal.c", |
| 3536 | "src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mull.c", |
| 3537 | "src/qs8-igemm/gen/3x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3538 | "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3539 | "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 510b8e0 | 2021-07-26 17:25:18 -0700 | [diff] [blame] | 3540 | "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3541 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3542 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3543 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3544 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3545 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3546 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3547 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3548 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3549 | "src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3550 | "src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c", |
| 3551 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3552 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3553 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3554 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3555 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3556 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3557 | "src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3558 | "src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3559 | "src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mlal.c", |
| 3560 | "src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mull.c", |
| 3561 | "src/qs8-igemm/gen/4x8c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 3562 | "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Frank Barchard | 22fbe77 | 2021-07-20 15:56:32 -0700 | [diff] [blame] | 3563 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3564 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 3565 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3566 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3567 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3568 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3569 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3570 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 3571 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3572 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 3573 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3574 | "src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3575 | "src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c", |
| 3576 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3577 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3578 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3579 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 3580 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3581 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 3582 | "src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3583 | "src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c", |
| Marat Dukhan | 8999190 | 2021-12-06 00:54:36 -0800 | [diff] [blame] | 3584 | "src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mlal.c", |
| 3585 | "src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mull.c", |
| 3586 | "src/qs8-igemm/gen/4x16c16-minmax-rndnu-neon-mlal.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3587 | "src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3588 | "src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | 27bf92c | 2021-11-24 15:47:52 -0800 | [diff] [blame] | 3589 | "src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3590 | "src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 2e23d2b | 2020-07-29 16:01:37 -0700 | [diff] [blame] | 3591 | "src/qs8-requantization/fp32-neon.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 3592 | "src/qs8-requantization/gemmlowp-neon.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 3593 | "src/qs8-requantization/rndna-neon.c", |
| Marat Dukhan | d3d818c | 2021-07-16 17:56:54 -0700 | [diff] [blame] | 3594 | "src/qs8-requantization/rndnu-neon-mull.c", |
| 3595 | "src/qs8-requantization/rndnu-neon-qdmulh.c", |
| Marat Dukhan | ba7b279 | 2020-09-02 14:26:45 -0700 | [diff] [blame] | 3596 | "src/qs8-vadd/gen/minmax-neon-ld64-x8.c", |
| 3597 | "src/qs8-vadd/gen/minmax-neon-ld64-x16.c", |
| 3598 | "src/qs8-vadd/gen/minmax-neon-ld64-x24.c", |
| 3599 | "src/qs8-vadd/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 3600 | "src/qs8-vadd/gen/minmax-neon-ld128-x16.c", |
| 3601 | "src/qs8-vadd/gen/minmax-neon-ld128-x32.c", |
| Marat Dukhan | ba7b279 | 2020-09-02 14:26:45 -0700 | [diff] [blame] | 3602 | "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c", |
| 3603 | "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 3604 | "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c", |
| 3605 | "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 3606 | "src/qs8-vaddc/gen/minmax-neon-ld128-x16.c", |
| 3607 | "src/qs8-vaddc/gen/minmax-neon-ld128-x32.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 3608 | "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x8.c", |
| 3609 | "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 3610 | "src/qs8-vmul/gen/minmax-fp32-neon-ld128-x16.c", |
| Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 3611 | "src/qs8-vmul/gen/minmax-rndnu-neon-ld64-x8.c", |
| 3612 | "src/qs8-vmul/gen/minmax-rndnu-neon-ld64-x16.c", |
| 3613 | "src/qs8-vmul/gen/minmax-rndnu-neon-ld128-x16.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 3614 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x8.c", |
| 3615 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| 3616 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld128-x16.c", |
| Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 3617 | "src/qs8-vmulc/gen/minmax-rndnu-neon-ld64-x8.c", |
| 3618 | "src/qs8-vmulc/gen/minmax-rndnu-neon-ld64-x16.c", |
| 3619 | "src/qs8-vmulc/gen/minmax-rndnu-neon-ld128-x16.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 3620 | "src/qu8-avgpool/9p8x-minmax-neon-c8.c", |
| 3621 | "src/qu8-avgpool/9x-minmax-neon-c8.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3622 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3623 | "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 3624 | "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3625 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3626 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 3627 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3628 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3629 | "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 3630 | "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3631 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3632 | "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c", |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 3633 | "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3634 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3635 | "src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul8.c", |
| 3636 | "src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3637 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3638 | "src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul8.c", |
| 3639 | "src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3640 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3641 | "src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul8.c", |
| 3642 | "src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 3643 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| Frank Barchard | 354cbc6 | 2021-09-27 21:42:41 -0700 | [diff] [blame] | 3644 | "src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul8.c", |
| 3645 | "src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c", |
| Marat Dukhan | fee66be | 2021-12-09 17:51:15 -0800 | [diff] [blame] | 3646 | "src/qu8-f32-vcvt/gen/vcvt-neon-x8.c", |
| 3647 | "src/qu8-f32-vcvt/gen/vcvt-neon-x16.c", |
| 3648 | "src/qu8-f32-vcvt/gen/vcvt-neon-x24.c", |
| 3649 | "src/qu8-f32-vcvt/gen/vcvt-neon-x32.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 3650 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neon-c8.c", |
| 3651 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neon-c16.c", |
| 3652 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neon-c24.c", |
| 3653 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neon-c32.c", |
| Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3654 | "src/qu8-gavgpool/gen/7p7x-minmax-rndnu-neon-c8.c", |
| 3655 | "src/qu8-gavgpool/gen/7p7x-minmax-rndnu-neon-c16.c", |
| 3656 | "src/qu8-gavgpool/gen/7p7x-minmax-rndnu-neon-c24.c", |
| 3657 | "src/qu8-gavgpool/gen/7p7x-minmax-rndnu-neon-c32.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 3658 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neon-c8.c", |
| 3659 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neon-c16.c", |
| 3660 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neon-c24.c", |
| 3661 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neon-c32.c", |
| Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3662 | "src/qu8-gavgpool/gen/7x-minmax-rndnu-neon-c8.c", |
| 3663 | "src/qu8-gavgpool/gen/7x-minmax-rndnu-neon-c16.c", |
| 3664 | "src/qu8-gavgpool/gen/7x-minmax-rndnu-neon-c24.c", |
| 3665 | "src/qu8-gavgpool/gen/7x-minmax-rndnu-neon-c32.c", |
| Digant Desai | 59d6515 | 2021-11-29 10:44:04 -0800 | [diff] [blame] | 3666 | "src/qu8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3667 | "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 3668 | "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3669 | "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 3670 | "src/qu8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| 3671 | "src/qu8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| 3672 | "src/qu8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| 3673 | "src/qu8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| Digant Desai | 59d6515 | 2021-11-29 10:44:04 -0800 | [diff] [blame] | 3674 | "src/qu8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3675 | "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 3676 | "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3677 | "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 3678 | "src/qu8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| 3679 | "src/qu8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| Digant Desai | 59d6515 | 2021-11-29 10:44:04 -0800 | [diff] [blame] | 3680 | "src/qu8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3681 | "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 3682 | "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3683 | "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 3684 | "src/qu8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| 3685 | "src/qu8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| 3686 | "src/qu8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| 3687 | "src/qu8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| Digant Desai | 59d6515 | 2021-11-29 10:44:04 -0800 | [diff] [blame] | 3688 | "src/qu8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3689 | "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 3690 | "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 3691 | "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 3692 | "src/qu8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| 3693 | "src/qu8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 3694 | "src/qu8-requantization/fp32-neon.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 3695 | "src/qu8-requantization/gemmlowp-neon.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 3696 | "src/qu8-requantization/rndna-neon.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 3697 | "src/qu8-vadd/gen/minmax-neon-ld64-x8.c", |
| 3698 | "src/qu8-vadd/gen/minmax-neon-ld64-x16.c", |
| Frank Barchard | 0a3093c | 2021-08-31 09:58:11 -0700 | [diff] [blame] | 3699 | "src/qu8-vadd/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 3700 | "src/qu8-vadd/gen/minmax-neon-ld128-x16.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 3701 | "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c", |
| 3702 | "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c", |
| Frank Barchard | 0a3093c | 2021-08-31 09:58:11 -0700 | [diff] [blame] | 3703 | "src/qu8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Marat Dukhan | eb3cff3 | 2021-07-30 11:35:27 -0700 | [diff] [blame] | 3704 | "src/qu8-vaddc/gen/minmax-neon-ld128-x16.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 3705 | "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x8.c", |
| 3706 | "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 3707 | "src/qu8-vmul/gen/minmax-fp32-neon-ld128-x16.c", |
| Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 3708 | "src/qu8-vmul/gen/minmax-rndnu-neon-ld64-x8.c", |
| 3709 | "src/qu8-vmul/gen/minmax-rndnu-neon-ld64-x16.c", |
| 3710 | "src/qu8-vmul/gen/minmax-rndnu-neon-ld128-x16.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 3711 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x8.c", |
| 3712 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| 3713 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld128-x16.c", |
| Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 3714 | "src/qu8-vmulc/gen/minmax-rndnu-neon-ld64-x8.c", |
| 3715 | "src/qu8-vmulc/gen/minmax-rndnu-neon-ld64-x16.c", |
| 3716 | "src/qu8-vmulc/gen/minmax-rndnu-neon-ld128-x16.c", |
| Marat Dukhan | cdb42a5 | 2021-11-22 20:09:32 -0800 | [diff] [blame] | 3717 | "src/s8-ibilinear/gen/neon-c8.c", |
| 3718 | "src/s8-ibilinear/gen/neon-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 3719 | "src/s8-maxpool/9p8x-minmax-neon-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 3720 | "src/s8-vclamp/neon-x64.c", |
| Marat Dukhan | cdb42a5 | 2021-11-22 20:09:32 -0800 | [diff] [blame] | 3721 | "src/u8-ibilinear/gen/neon-c8.c", |
| 3722 | "src/u8-ibilinear/gen/neon-c16.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3723 | "src/u8-maxpool/9p8x-minmax-neon-c16.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3724 | "src/u8-rmax/neon.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 3725 | "src/u8-vclamp/neon-x64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3726 | "src/x8-zip/x2-neon.c", |
| 3727 | "src/x8-zip/x3-neon.c", |
| 3728 | "src/x8-zip/x4-neon.c", |
| 3729 | "src/x8-zip/xm-neon.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3730 | "src/x32-packx/x4-neon-st4.c", |
| Marat Dukhan | 57dccd8 | 2020-04-14 00:53:10 -0700 | [diff] [blame] | 3731 | "src/x32-unpool/neon.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3732 | "src/x32-zip/x2-neon.c", |
| 3733 | "src/x32-zip/x3-neon.c", |
| 3734 | "src/x32-zip/x4-neon.c", |
| 3735 | "src/x32-zip/xm-neon.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 3736 | "src/xx-fill/neon-x64.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 3737 | "src/xx-pad/neon.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3738 | ] |
| 3739 | |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 3740 | PROD_NEONFP16_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 3741 | "src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 3742 | "src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 3743 | ] |
| 3744 | |
| 3745 | ALL_NEONFP16_MICROKERNEL_SRCS = [ |
| 3746 | "src/f16-f32-vcvt/gen/vcvt-neonfp16-x8.c", |
| 3747 | "src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c", |
| Marat Dukhan | d77f77d | 2021-10-24 15:39:59 -0700 | [diff] [blame] | 3748 | "src/f32-f16-vcvt/gen/vcvt-neonfp16-x8.c", |
| 3749 | "src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c", |
| Marat Dukhan | 3ed866b | 2021-09-29 08:23:33 -0700 | [diff] [blame] | 3750 | "src/math/cvt-f16-f32-neonfp16.c", |
| Marat Dukhan | 582e184 | 2021-10-25 17:18:36 -0700 | [diff] [blame] | 3751 | "src/math/cvt-f32-f16-neonfp16.c", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 3752 | ] |
| 3753 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3754 | PROD_NEONFMA_MICROKERNEL_SRCS = [ |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 3755 | "src/f32-dwconv/gen/up8x3-minmax-neonfma.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3756 | "src/f32-dwconv/gen/up8x4-minmax-neonfma.c", |
| 3757 | "src/f32-dwconv/gen/up8x9-minmax-neonfma.c", |
| Frank Barchard | dbe781b | 2021-10-18 10:29:52 -0700 | [diff] [blame] | 3758 | "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3759 | "src/f32-gemm/gen/1x8s4-minmax-neonfma.c", |
| 3760 | "src/f32-gemm/gen/6x8s4-minmax-neonfma.c", |
| 3761 | "src/f32-ibilinear-chw/gen/neonfma-p8.c", |
| 3762 | "src/f32-ibilinear/gen/neonfma-c8.c", |
| 3763 | "src/f32-igemm/gen/1x8s4-minmax-neonfma.c", |
| 3764 | "src/f32-igemm/gen/6x8s4-minmax-neonfma.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 3765 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3766 | "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c", |
| 3767 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c", |
| 3768 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c", |
| 3769 | "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c", |
| 3770 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c", |
| 3771 | ] |
| 3772 | |
| 3773 | ALL_NEONFMA_MICROKERNEL_SRCS = [ |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 3774 | "src/f32-dwconv/gen/up4x3-minmax-neonfma-acc2.c", |
| 3775 | "src/f32-dwconv/gen/up4x3-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3776 | "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c", |
| 3777 | "src/f32-dwconv/gen/up4x4-minmax-neonfma.c", |
| 3778 | "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c", |
| 3779 | "src/f32-dwconv/gen/up4x9-minmax-neonfma.c", |
| 3780 | "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c", |
| 3781 | "src/f32-dwconv/gen/up4x25-minmax-neonfma.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 3782 | "src/f32-dwconv/gen/up8x3-minmax-neonfma-acc2.c", |
| 3783 | "src/f32-dwconv/gen/up8x3-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3784 | "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c", |
| 3785 | "src/f32-dwconv/gen/up8x4-minmax-neonfma.c", |
| 3786 | "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c", |
| 3787 | "src/f32-dwconv/gen/up8x9-minmax-neonfma.c", |
| 3788 | "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c", |
| 3789 | "src/f32-dwconv/gen/up8x25-minmax-neonfma.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 3790 | "src/f32-dwconv/gen/up16x3-minmax-neon-acc2.c", |
| 3791 | "src/f32-dwconv/gen/up16x3-minmax-neon.c", |
| 3792 | "src/f32-dwconv/gen/up16x3-minmax-neonfma-acc2.c", |
| 3793 | "src/f32-dwconv/gen/up16x3-minmax-neonfma.c", |
| Frank Barchard | c9f9d67 | 2021-10-18 12:51:59 -0700 | [diff] [blame] | 3794 | "src/f32-dwconv/gen/up16x4-minmax-neon-acc2.c", |
| 3795 | "src/f32-dwconv/gen/up16x4-minmax-neon.c", |
| 3796 | "src/f32-dwconv/gen/up16x4-minmax-neonfma-acc2.c", |
| 3797 | "src/f32-dwconv/gen/up16x4-minmax-neonfma.c", |
| 3798 | "src/f32-dwconv/gen/up16x9-minmax-neon-acc2.c", |
| 3799 | "src/f32-dwconv/gen/up16x9-minmax-neon.c", |
| 3800 | "src/f32-dwconv/gen/up16x9-minmax-neonfma-acc2.c", |
| 3801 | "src/f32-dwconv/gen/up16x9-minmax-neonfma.c", |
| 3802 | "src/f32-dwconv/gen/up16x25-minmax-neon-acc2.c", |
| 3803 | "src/f32-dwconv/gen/up16x25-minmax-neon.c", |
| 3804 | "src/f32-dwconv/gen/up16x25-minmax-neonfma-acc2.c", |
| 3805 | "src/f32-dwconv/gen/up16x25-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3806 | "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c", |
| 3807 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c", |
| 3808 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c", |
| 3809 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c", |
| 3810 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c", |
| 3811 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c", |
| 3812 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c", |
| 3813 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c", |
| 3814 | "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c", |
| 3815 | "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c", |
| 3816 | "src/f32-gemm/gen/1x8s4-minmax-neonfma.c", |
| 3817 | "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c", |
| 3818 | "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c", |
| 3819 | "src/f32-gemm/gen/4x8s4-minmax-neonfma.c", |
| 3820 | "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c", |
| 3821 | "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c", |
| 3822 | "src/f32-gemm/gen/6x8s4-minmax-neonfma.c", |
| 3823 | "src/f32-gemm/gen/8x8s4-minmax-neonfma.c", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 3824 | "src/f32-ibilinear-chw/gen/neonfma-p4.c", |
| 3825 | "src/f32-ibilinear-chw/gen/neonfma-p8.c", |
| Frank Barchard | 8247e21 | 2021-02-03 18:12:33 -0800 | [diff] [blame] | 3826 | "src/f32-ibilinear/gen/neonfma-c4.c", |
| 3827 | "src/f32-ibilinear/gen/neonfma-c8.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3828 | "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3829 | "src/f32-igemm/gen/1x8s4-minmax-neonfma.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3830 | "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3831 | "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c", |
| 3832 | "src/f32-igemm/gen/4x8s4-minmax-neonfma.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3833 | "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c", |
| 3834 | "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3835 | "src/f32-igemm/gen/6x8s4-minmax-neonfma.c", |
| 3836 | "src/f32-igemm/gen/8x8s4-minmax-neonfma.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 3837 | "src/f32-ppmm/gen/4x8-minmax-neonfma.c", |
| 3838 | "src/f32-ppmm/gen/8x8-minmax-neonfma.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 3839 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x4.c", |
| 3840 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x8-acc2.c", |
| 3841 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x8.c", |
| 3842 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12-acc2.c", |
| 3843 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12-acc3.c", |
| 3844 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12.c", |
| 3845 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16-acc2.c", |
| 3846 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16-acc4.c", |
| 3847 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16.c", |
| 3848 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20-acc2.c", |
| 3849 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20-acc5.c", |
| 3850 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20.c", |
| 3851 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x4.c", |
| 3852 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x8-acc2.c", |
| 3853 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x8.c", |
| 3854 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12-acc2.c", |
| 3855 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12-acc3.c", |
| 3856 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12.c", |
| 3857 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16-acc2.c", |
| 3858 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16-acc4.c", |
| 3859 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16.c", |
| 3860 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20-acc2.c", |
| 3861 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20-acc5.c", |
| 3862 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20.c", |
| Marat Dukhan | 2fa7a0c | 2020-12-06 19:09:02 -0800 | [diff] [blame] | 3863 | "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c", |
| 3864 | "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c", |
| 3865 | "src/f32-spmm/gen/4x1-minmax-neonfma.c", |
| 3866 | "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c", |
| 3867 | "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c", |
| 3868 | "src/f32-spmm/gen/8x1-minmax-neonfma.c", |
| 3869 | "src/f32-spmm/gen/12x1-minmax-neonfma.c", |
| 3870 | "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c", |
| 3871 | "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c", |
| 3872 | "src/f32-spmm/gen/16x1-minmax-neonfma.c", |
| 3873 | "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c", |
| 3874 | "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c", |
| 3875 | "src/f32-spmm/gen/32x1-minmax-neonfma.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3876 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c", |
| 3877 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c", |
| 3878 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c", |
| 3879 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c", |
| 3880 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c", |
| 3881 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c", |
| 3882 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c", |
| 3883 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c", |
| 3884 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c", |
| 3885 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c", |
| 3886 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c", |
| 3887 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3888 | "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c", |
| 3889 | "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 3890 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c", |
| 3891 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c", |
| 3892 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c", |
| 3893 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c", |
| 3894 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c", |
| 3895 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c", |
| 3896 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c", |
| 3897 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c", |
| 3898 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c", |
| 3899 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c", |
| 3900 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c", |
| 3901 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c", |
| 3902 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c", |
| 3903 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c", |
| 3904 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c", |
| 3905 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c", |
| 3906 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c", |
| 3907 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c", |
| 3908 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c", |
| 3909 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c", |
| 3910 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c", |
| 3911 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c", |
| 3912 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c", |
| 3913 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c", |
| 3914 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c", |
| 3915 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c", |
| 3916 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c", |
| 3917 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c", |
| 3918 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c", |
| 3919 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c", |
| 3920 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c", |
| 3921 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c", |
| 3922 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c", |
| 3923 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c", |
| 3924 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c", |
| 3925 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c", |
| 3926 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c", |
| 3927 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c", |
| 3928 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c", |
| 3929 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c", |
| 3930 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c", |
| 3931 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c", |
| 3932 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c", |
| 3933 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c", |
| 3934 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c", |
| 3935 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c", |
| 3936 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c", |
| 3937 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c", |
| 3938 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c", |
| 3939 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c", |
| 3940 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c", |
| 3941 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c", |
| 3942 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c", |
| 3943 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 3944 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c", |
| 3945 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c", |
| 3946 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c", |
| 3947 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c", |
| 3948 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c", |
| 3949 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c", |
| 3950 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c", |
| 3951 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c", |
| 3952 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c", |
| 3953 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c", |
| 3954 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c", |
| 3955 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c", |
| 3956 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c", |
| 3957 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c", |
| 3958 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c", |
| 3959 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c", |
| 3960 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c", |
| 3961 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c", |
| 3962 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c", |
| 3963 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 3964 | "src/math/exp-neonfma-rr2-lut64-p2.c", |
| 3965 | "src/math/exp-neonfma-rr2-p5.c", |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 3966 | "src/math/expm1minus-neonfma-rr1-lut16-p3.c", |
| 3967 | "src/math/expm1minus-neonfma-rr1-p6.c", |
| Marat Dukhan | 9dd119a | 2020-11-20 18:20:04 -0800 | [diff] [blame] | 3968 | "src/math/expminus-neonfma-rr2-lut64-p2.c", |
| 3969 | "src/math/expminus-neonfma-rr2-lut2048-p1.c", |
| 3970 | "src/math/expminus-neonfma-rr2-p5.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 3971 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c", |
| 3972 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c", |
| 3973 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3974 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c", |
| 3975 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c", |
| 3976 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 3977 | "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c", |
| 3978 | "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c", |
| 3979 | "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 3980 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c", |
| 3981 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c", |
| 3982 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3983 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c", |
| 3984 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c", |
| 3985 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 3986 | "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c", |
| 3987 | "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c", |
| 3988 | "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 3989 | "src/math/sqrt-neonfma-nr1fma.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 3990 | "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 3991 | "src/math/sqrt-neonfma-nr2fma.c", |
| 3992 | "src/math/sqrt-neonfma-nr2fma1adj.c", |
| 3993 | "src/math/sqrt-neonfma-nr3fma.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 3994 | ] |
| 3995 | |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 3996 | PROD_AARCH64_NEON_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 3997 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c", |
| 3998 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c", |
| 3999 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c", |
| 4000 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c", |
| 4001 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c", |
| 4002 | "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 4003 | "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 4004 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 4005 | "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 4006 | "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 4007 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 4008 | "src/f32-spmm/gen/32x2-minmax-neonfma.c", |
| 4009 | "src/f32-spmm/gen/32x4-minmax-neonfma.c", |
| 4010 | "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c", |
| 4011 | "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c", |
| 4012 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c", |
| 4013 | "src/f32-vsqrt/gen/neon-sqrt-x4.c", |
| Marat Dukhan | 98e054b | 2021-09-13 09:43:50 -0700 | [diff] [blame] | 4014 | "src/x8-lut/gen/lut-neon-tbx128x4-x64.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4015 | ] |
| 4016 | |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 4017 | ALL_AARCH64_NEON_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 4018 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 4019 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4020 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 4021 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c", |
| Marat Dukhan | 56b10cd | 2020-05-18 09:35:49 -0700 | [diff] [blame] | 4022 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 4023 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4024 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c", |
| Marat Dukhan | ce7a3f8 | 2020-05-17 21:46:44 -0700 | [diff] [blame] | 4025 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 4026 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4027 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c", |
| 4028 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c", |
| 4029 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c", |
| Marat Dukhan | 1268a24 | 2020-10-24 00:36:32 -0700 | [diff] [blame] | 4030 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4031 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c", |
| Marat Dukhan | 1268a24 | 2020-10-24 00:36:32 -0700 | [diff] [blame] | 4032 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c", |
| 4033 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c", |
| 4034 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c", |
| 4035 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c", |
| 4036 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 4037 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c", |
| 4038 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c", |
| 4039 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4040 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c", |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 4041 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4042 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c", |
| 4043 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c", |
| 4044 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 4045 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c", |
| 4046 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c", |
| 4047 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c", |
| 4048 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4049 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 4050 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c", |
| 4051 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4052 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 4053 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4054 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c", |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 4055 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4056 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c", |
| 4057 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 4058 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c", |
| 4059 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c", |
| 4060 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c", |
| 4061 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c", |
| 4062 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c", |
| 4063 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c", |
| 4064 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c", |
| 4065 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c", |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 4066 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 4067 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4068 | "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c", |
| 4069 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c", |
| 4070 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c", |
| 4071 | "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c", |
| 4072 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c", |
| 4073 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c", |
| 4074 | "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 4075 | "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 4076 | "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c", |
| 4077 | "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c", |
| 4078 | "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c", |
| 4079 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 4080 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c", |
| 4081 | "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 4082 | "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 4083 | "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c", |
| 4084 | "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c", |
| 4085 | "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c", |
| 4086 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 4087 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 4088 | "src/f32-spmm/gen/4x2-minmax-neonfma.c", |
| 4089 | "src/f32-spmm/gen/4x4-minmax-neonfma.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 4090 | "src/f32-spmm/gen/8x2-minmax-neonfma.c", |
| 4091 | "src/f32-spmm/gen/8x4-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4092 | "src/f32-spmm/gen/12x2-minmax-neonfma.c", |
| 4093 | "src/f32-spmm/gen/12x4-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4094 | "src/f32-spmm/gen/16x2-minmax-neonfma.c", |
| 4095 | "src/f32-spmm/gen/16x4-minmax-neonfma.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 4096 | "src/f32-spmm/gen/32x2-minmax-neonfma.c", |
| 4097 | "src/f32-spmm/gen/32x4-minmax-neonfma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4098 | "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c", |
| 4099 | "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c", |
| 4100 | "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c", |
| 4101 | "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c", |
| 4102 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c", |
| 4103 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4104 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c", |
| 4105 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c", |
| 4106 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c", |
| 4107 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c", |
| 4108 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c", |
| 4109 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c", |
| 4110 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c", |
| 4111 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c", |
| 4112 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c", |
| 4113 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c", |
| 4114 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c", |
| 4115 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c", |
| 4116 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c", |
| 4117 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c", |
| 4118 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c", |
| 4119 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c", |
| 4120 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c", |
| 4121 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 4122 | "src/f32-vsqrt/gen/neon-sqrt-x4.c", |
| 4123 | "src/f32-vsqrt/gen/neon-sqrt-x8.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 4124 | "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4125 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 4126 | "src/math/sigmoid-neonfma-rr1-p5-div.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 4127 | "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4128 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c", |
| Marat Dukhan | 77221d3 | 2020-01-06 10:04:39 -0800 | [diff] [blame] | 4129 | "src/math/sigmoid-neonfma-rr2-p5-div.c", |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 4130 | "src/x8-lut/gen/lut-neon-tbx128x4-x16.c", |
| 4131 | "src/x8-lut/gen/lut-neon-tbx128x4-x32.c", |
| 4132 | "src/x8-lut/gen/lut-neon-tbx128x4-x48.c", |
| 4133 | "src/x8-lut/gen/lut-neon-tbx128x4-x64.c", |
| Alan Kelly | ed90216 | 2022-01-05 01:51:30 -0800 | [diff] [blame] | 4134 | "src/x32-transpose/4x4-aarch64-tbl.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 4135 | ] |
| 4136 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4137 | PROD_NEONV8_MICROKERNEL_SRCS = [ |
| Frank Barchard | cb052a3 | 2021-12-10 14:16:33 -0800 | [diff] [blame] | 4138 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c", |
| 4139 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4140 | "src/f32-vrnd/gen/vrndd-neonv8-x8.c", |
| 4141 | "src/f32-vrnd/gen/vrndne-neonv8-x8.c", |
| 4142 | "src/f32-vrnd/gen/vrndu-neonv8-x8.c", |
| 4143 | "src/f32-vrnd/gen/vrndz-neonv8-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4144 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c", |
| Frank Barchard | 7da8b02 | 2021-08-31 09:49:10 -0700 | [diff] [blame] | 4145 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 4146 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c", |
| Frank Barchard | f290a14 | 2022-01-05 01:08:37 -0800 | [diff] [blame] | 4147 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4148 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4149 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4150 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4151 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4152 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4153 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4154 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | f290a14 | 2022-01-05 01:08:37 -0800 | [diff] [blame] | 4155 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4156 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4157 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4158 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4159 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4160 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4161 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4162 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4163 | ] |
| 4164 | |
| 4165 | ALL_NEONV8_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 3df14d3 | 2021-12-01 13:05:51 -0800 | [diff] [blame] | 4166 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x8.c", |
| 4167 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x16.c", |
| 4168 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x24.c", |
| 4169 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c", |
| 4170 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x8.c", |
| 4171 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x16.c", |
| 4172 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x24.c", |
| 4173 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c", |
| Frank Barchard | cb052a3 | 2021-12-10 14:16:33 -0800 | [diff] [blame] | 4174 | "src/f32-vrnd/gen/vrndd-neonv8-x4.c", |
| 4175 | "src/f32-vrnd/gen/vrndd-neonv8-x8.c", |
| 4176 | "src/f32-vrnd/gen/vrndne-neonv8-x4.c", |
| 4177 | "src/f32-vrnd/gen/vrndne-neonv8-x8.c", |
| 4178 | "src/f32-vrnd/gen/vrndu-neonv8-x4.c", |
| 4179 | "src/f32-vrnd/gen/vrndu-neonv8-x8.c", |
| 4180 | "src/f32-vrnd/gen/vrndz-neonv8-x4.c", |
| 4181 | "src/f32-vrnd/gen/vrndz-neonv8-x8.c", |
| Marat Dukhan | d24301d | 2021-12-02 00:13:45 -0800 | [diff] [blame] | 4182 | "src/math/cvt-f32-qs8-neonv8.c", |
| 4183 | "src/math/cvt-f32-qu8-neonv8.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 4184 | "src/math/roundd-neonv8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4185 | "src/math/roundne-neonv8.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 4186 | "src/math/roundu-neonv8.c", |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 4187 | "src/math/roundz-neonv8.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 4188 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 4189 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 4190 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 4191 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 4192 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 4193 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 4194 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 4195 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c", |
| 4196 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c", |
| 4197 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 4198 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 5f2939f | 2021-07-23 13:38:32 -0700 | [diff] [blame] | 4199 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 4200 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c", |
| 4201 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c", |
| 4202 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c", |
| Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 4203 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 4204 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 4205 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 4206 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 4207 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4208 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4209 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4210 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4211 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4212 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4213 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4214 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4215 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4216 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4217 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4218 | "src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4219 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4220 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 4221 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4222 | "src/qc8-gemm/gen/2x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4223 | "src/qc8-gemm/gen/2x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4224 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4225 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4226 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4227 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4228 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4229 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4230 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4231 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4232 | "src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4233 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4234 | "src/qc8-gemm/gen/2x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4235 | "src/qc8-gemm/gen/2x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4236 | "src/qc8-gemm/gen/3x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4237 | "src/qc8-gemm/gen/3x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4238 | "src/qc8-gemm/gen/3x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4239 | "src/qc8-gemm/gen/3x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4240 | "src/qc8-gemm/gen/4x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4241 | "src/qc8-gemm/gen/4x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4242 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 4243 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4244 | "src/qc8-gemm/gen/6x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4245 | "src/qc8-gemm/gen/6x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4246 | "src/qc8-gemm/gen/6x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4247 | "src/qc8-gemm/gen/6x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4248 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4249 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4250 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4251 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4252 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4253 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4254 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4255 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4256 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4257 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4258 | "src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4259 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4260 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 4261 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4262 | "src/qc8-igemm/gen/2x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4263 | "src/qc8-igemm/gen/2x8-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4264 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4265 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4266 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4267 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4268 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4269 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4270 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4271 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4272 | "src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4273 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4274 | "src/qc8-igemm/gen/2x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4275 | "src/qc8-igemm/gen/2x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4276 | "src/qc8-igemm/gen/3x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4277 | "src/qc8-igemm/gen/3x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4278 | "src/qc8-igemm/gen/3x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4279 | "src/qc8-igemm/gen/3x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4280 | "src/qc8-igemm/gen/4x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4281 | "src/qc8-igemm/gen/4x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4282 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 4283 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | f623740 | 2022-01-05 00:26:09 -0800 | [diff] [blame] | 4284 | "src/qc8-igemm/gen/6x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4285 | "src/qc8-igemm/gen/6x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4286 | "src/qc8-igemm/gen/6x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4287 | "src/qc8-igemm/gen/6x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 4288 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| 4289 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| 4290 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| 4291 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 4292 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 4293 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 4294 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 4295 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4296 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c8.c", |
| 4297 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c16.c", |
| 4298 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c24.c", |
| 4299 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c32.c", |
| 4300 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neonv8-c8.c", |
| 4301 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neonv8-c16.c", |
| 4302 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neonv8-c24.c", |
| 4303 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neonv8-c32.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4304 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4305 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4306 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4307 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4308 | "src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4309 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4310 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4311 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4312 | "src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4313 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 4314 | "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4315 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4316 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4317 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4318 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4319 | "src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4320 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4321 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4322 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4323 | "src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4324 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 4325 | "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4326 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4327 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4328 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4329 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4330 | "src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4331 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4332 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4333 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4334 | "src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4335 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 4336 | "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4337 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 15eec02 | 2021-11-17 13:26:20 -0800 | [diff] [blame] | 4338 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4339 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | 42f5c50 | 2021-11-16 10:04:21 -0800 | [diff] [blame] | 4340 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4341 | "src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4342 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| Frank Barchard | 64ab1b7 | 2021-11-22 10:57:40 -0800 | [diff] [blame] | 4343 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4344 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 4345 | "src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4346 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| Frank Barchard | a03020a | 2021-06-28 15:44:06 -0700 | [diff] [blame] | 4347 | "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 4348 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4349 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4350 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c", |
| 4351 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4352 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4353 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c", |
| Marat Dukhan | 605696a | 2021-07-15 18:01:30 -0700 | [diff] [blame] | 4354 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| 4355 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| 4356 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| 4357 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 4358 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 4359 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 4360 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 4361 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 4362 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c8.c", |
| 4363 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c16.c", |
| 4364 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c24.c", |
| 4365 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c32.c", |
| 4366 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neonv8-c8.c", |
| 4367 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neonv8-c16.c", |
| 4368 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neonv8-c24.c", |
| 4369 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neonv8-c32.c", |
| Marat Dukhan | 69c8a29 | 2021-07-14 19:34:56 -0700 | [diff] [blame] | 4370 | "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4371 | "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4372 | "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4373 | "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 4374 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4375 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4376 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c", |
| 4377 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4378 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4379 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 4380 | ] |
| 4381 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4382 | PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [ |
| 4383 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c", |
| 4384 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c", |
| 4385 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c", |
| 4386 | "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c", |
| 4387 | "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c", |
| 4388 | "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4389 | "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4390 | "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4391 | "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4392 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c", |
| 4393 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c", |
| 4394 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c", |
| 4395 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c", |
| 4396 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c", |
| 4397 | "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c", |
| 4398 | ] |
| 4399 | |
| 4400 | ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [ |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 4401 | "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c", |
| 4402 | "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c", |
| 4403 | "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c", |
| 4404 | "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4405 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c", |
| 4406 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c", |
| 4407 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c", |
| 4408 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c", |
| 4409 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c", |
| 4410 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c", |
| 4411 | "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c", |
| 4412 | "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c", |
| Frank Barchard | c9f9d67 | 2021-10-18 12:51:59 -0700 | [diff] [blame] | 4413 | "src/f16-dwconv/gen/up32x4-minmax-neonfp16arith-acc2.c", |
| 4414 | "src/f16-dwconv/gen/up32x4-minmax-neonfp16arith.c", |
| 4415 | "src/f16-dwconv/gen/up32x9-minmax-neonfp16arith-acc2.c", |
| 4416 | "src/f16-dwconv/gen/up32x9-minmax-neonfp16arith.c", |
| 4417 | "src/f16-dwconv/gen/up32x25-minmax-neonfp16arith-acc2.c", |
| 4418 | "src/f16-dwconv/gen/up32x25-minmax-neonfp16arith.c", |
| Frank Barchard | 0bb49a7 | 2020-06-04 11:35:11 -0700 | [diff] [blame] | 4419 | "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c", |
| 4420 | "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4421 | "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c", |
| 4422 | "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c", |
| 4423 | "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c", |
| 4424 | "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c", |
| 4425 | "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c", |
| 4426 | "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c", |
| 4427 | "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c", |
| 4428 | "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c", |
| 4429 | "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c", |
| 4430 | "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4431 | "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c", |
| 4432 | "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c", |
| 4433 | "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c", |
| 4434 | "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4435 | "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c", |
| 4436 | "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4437 | "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c", |
| 4438 | "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4439 | "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c", |
| 4440 | "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c", |
| 4441 | "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c", |
| 4442 | "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4443 | "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c", |
| 4444 | "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c", |
| Frank Barchard | b196659 | 2020-05-12 13:47:06 -0700 | [diff] [blame] | 4445 | "src/f16-prelu/gen/neonfp16arith-2x8.c", |
| Frank Barchard | a531698 | 2020-07-23 13:19:28 -0700 | [diff] [blame] | 4446 | "src/f16-prelu/gen/neonfp16arith-2x16.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 4447 | "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4448 | "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 4449 | "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4450 | "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 4451 | "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4452 | "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c", |
| Frank Barchard | beca652 | 2020-10-30 22:34:35 -0700 | [diff] [blame] | 4453 | "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4454 | "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c", |
| 4455 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c", |
| 4456 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c", |
| 4457 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c", |
| 4458 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c", |
| 4459 | "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c", |
| 4460 | "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c", |
| 4461 | "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c", |
| 4462 | "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c", |
| 4463 | "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c", |
| 4464 | "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c", |
| 4465 | "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c", |
| 4466 | "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c", |
| 4467 | "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c", |
| 4468 | "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c", |
| 4469 | "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c", |
| 4470 | "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c", |
| 4471 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c", |
| 4472 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c", |
| 4473 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c", |
| 4474 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c", |
| 4475 | "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c", |
| 4476 | "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c", |
| 4477 | "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c", |
| 4478 | "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c", |
| 4479 | "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c", |
| 4480 | "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c", |
| 4481 | "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c", |
| 4482 | "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4483 | "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c", |
| 4484 | "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 4485 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c", |
| 4486 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4487 | "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c", |
| 4488 | "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 4489 | ] |
| 4490 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4491 | PROD_NEONDOT_MICROKERNEL_SRCS = [ |
| 4492 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4493 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4494 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4495 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4496 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4497 | "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4498 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4499 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4500 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4501 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4502 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4503 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 4504 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4505 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4506 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4507 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 8b69802 | 2021-08-26 11:17:32 -0700 | [diff] [blame] | 4508 | "src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Frank Barchard | de9c64a | 2021-08-17 18:32:50 -0700 | [diff] [blame] | 4509 | "src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4510 | "src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| 4511 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 8b69802 | 2021-08-26 11:17:32 -0700 | [diff] [blame] | 4512 | "src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Frank Barchard | de9c64a | 2021-08-17 18:32:50 -0700 | [diff] [blame] | 4513 | "src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4514 | "src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| 4515 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4516 | ] |
| 4517 | |
| 4518 | ALL_NEONDOT_MICROKERNEL_SRCS = [ |
| Marat Dukhan | e76478b | 2021-06-28 16:35:40 -0700 | [diff] [blame] | 4519 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4520 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4521 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4522 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4523 | "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c", |
| 4524 | "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c", |
| 4525 | "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c", |
| 4526 | "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c", |
| 4527 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4528 | "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4529 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4530 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4531 | "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c", |
| 4532 | "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c", |
| 4533 | "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c", |
| 4534 | "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c", |
| Marat Dukhan | 18630de | 2021-06-02 22:20:01 -0700 | [diff] [blame] | 4535 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4536 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4537 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4538 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4539 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 4486f87 | 2021-08-07 15:22:50 -0700 | [diff] [blame] | 4540 | "src/qs8-gemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4541 | "src/qs8-gemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4542 | "src/qs8-gemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4543 | "src/qs8-gemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 18630de | 2021-06-02 22:20:01 -0700 | [diff] [blame] | 4544 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4545 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4546 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4547 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 4548 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Marat Dukhan | 4486f87 | 2021-08-07 15:22:50 -0700 | [diff] [blame] | 4549 | "src/qs8-igemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4550 | "src/qs8-igemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4551 | "src/qs8-igemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4552 | "src/qs8-igemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4553 | "src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Digant Desai | 9982ed3 | 2021-11-24 13:03:54 -0800 | [diff] [blame] | 4554 | "src/qu8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4555 | "src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4556 | "src/qu8-gemm/gen/1x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4557 | "src/qu8-gemm/gen/2x8c4-minmax-rndnu-neondot.c", |
| Digant Desai | 9982ed3 | 2021-11-24 13:03:54 -0800 | [diff] [blame] | 4558 | "src/qu8-gemm/gen/2x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4559 | "src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4560 | "src/qu8-gemm/gen/2x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4561 | "src/qu8-gemm/gen/3x8c4-minmax-rndnu-neondot.c", |
| 4562 | "src/qu8-gemm/gen/3x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4563 | "src/qu8-gemm/gen/3x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4564 | "src/qu8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| Digant Desai | 9982ed3 | 2021-11-24 13:03:54 -0800 | [diff] [blame] | 4565 | "src/qu8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4566 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4567 | "src/qu8-gemm/gen/5x8c4-minmax-rndnu-neondot.c", |
| 4568 | "src/qu8-gemm/gen/5x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4569 | "src/qu8-gemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4570 | "src/qu8-gemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4571 | "src/qu8-gemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4572 | "src/qu8-gemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| 4573 | "src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| Digant Desai | 9982ed3 | 2021-11-24 13:03:54 -0800 | [diff] [blame] | 4574 | "src/qu8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4575 | "src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4576 | "src/qu8-igemm/gen/1x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4577 | "src/qu8-igemm/gen/2x8c4-minmax-rndnu-neondot.c", |
| Digant Desai | 9982ed3 | 2021-11-24 13:03:54 -0800 | [diff] [blame] | 4578 | "src/qu8-igemm/gen/2x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4579 | "src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4580 | "src/qu8-igemm/gen/2x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4581 | "src/qu8-igemm/gen/3x8c4-minmax-rndnu-neondot.c", |
| 4582 | "src/qu8-igemm/gen/3x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cdf59a5 | 2021-09-08 13:55:24 -0700 | [diff] [blame] | 4583 | "src/qu8-igemm/gen/3x32c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4584 | "src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| Frank Barchard | cb052a3 | 2021-12-10 14:16:33 -0800 | [diff] [blame] | 4585 | "src/qu8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4586 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | e033126 | 2021-08-11 23:18:59 -0700 | [diff] [blame] | 4587 | "src/qu8-igemm/gen/5x8c4-minmax-rndnu-neondot.c", |
| 4588 | "src/qu8-igemm/gen/5x16c4-minmax-rndnu-neondot.c", |
| Frank Barchard | 88e839c | 2021-08-11 00:12:31 -0700 | [diff] [blame] | 4589 | "src/qu8-igemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4590 | "src/qu8-igemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4591 | "src/qu8-igemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4592 | "src/qu8-igemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 4593 | ] |
| 4594 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4595 | PROD_SSE_MICROKERNEL_SRCS = [ |
| 4596 | "src/f32-avgpool/9p8x-minmax-sse-c4.c", |
| 4597 | "src/f32-avgpool/9x-minmax-sse-c4.c", |
| 4598 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 4599 | "src/f32-dwconv/gen/up8x3-minmax-sse.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4600 | "src/f32-dwconv/gen/up8x4-minmax-sse.c", |
| 4601 | "src/f32-dwconv/gen/up8x9-minmax-sse.c", |
| 4602 | "src/f32-dwconv/gen/up8x25-minmax-sse.c", |
| 4603 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c", |
| 4604 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c", |
| 4605 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c", |
| 4606 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c", |
| 4607 | "src/f32-gavgpool-cw/sse-x4.c", |
| 4608 | "src/f32-gavgpool/7p7x-minmax-sse-c4.c", |
| 4609 | "src/f32-gavgpool/7x-minmax-sse-c4.c", |
| 4610 | "src/f32-gemm/gen/1x8-minmax-sse-load1.c", |
| 4611 | "src/f32-gemm/gen/4x2c4-minmax-sse.c", |
| 4612 | "src/f32-gemm/gen/4x8-minmax-sse-load1.c", |
| 4613 | "src/f32-ibilinear-chw/gen/sse-p8.c", |
| 4614 | "src/f32-ibilinear/gen/sse-c8.c", |
| 4615 | "src/f32-igemm/gen/1x8-minmax-sse-load1.c", |
| 4616 | "src/f32-igemm/gen/4x2c4-minmax-sse.c", |
| 4617 | "src/f32-igemm/gen/4x8-minmax-sse-load1.c", |
| 4618 | "src/f32-maxpool/9p8x-minmax-sse-c4.c", |
| 4619 | "src/f32-pavgpool/9p8x-minmax-sse-c4.c", |
| 4620 | "src/f32-pavgpool/9x-minmax-sse-c4.c", |
| 4621 | "src/f32-rmax/sse.c", |
| 4622 | "src/f32-spmm/gen/32x1-minmax-sse.c", |
| 4623 | "src/f32-vbinary/gen/vadd-minmax-sse-x8.c", |
| 4624 | "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c", |
| 4625 | "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c", |
| 4626 | "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c", |
| 4627 | "src/f32-vbinary/gen/vmax-sse-x8.c", |
| 4628 | "src/f32-vbinary/gen/vmaxc-sse-x8.c", |
| 4629 | "src/f32-vbinary/gen/vmin-sse-x8.c", |
| 4630 | "src/f32-vbinary/gen/vminc-sse-x8.c", |
| 4631 | "src/f32-vbinary/gen/vmul-minmax-sse-x8.c", |
| 4632 | "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c", |
| 4633 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c", |
| 4634 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c", |
| 4635 | "src/f32-vbinary/gen/vsqrdiff-sse-x8.c", |
| 4636 | "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c", |
| 4637 | "src/f32-vbinary/gen/vsub-minmax-sse-x8.c", |
| 4638 | "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c", |
| 4639 | "src/f32-vclamp/gen/vclamp-sse-x8.c", |
| 4640 | "src/f32-vhswish/gen/vhswish-sse-x8.c", |
| 4641 | "src/f32-vlrelu/gen/vlrelu-sse-x8.c", |
| 4642 | "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c", |
| 4643 | "src/f32-vsqrt/gen/sse-sqrt-x4.c", |
| 4644 | "src/f32-vunary/gen/vabs-sse-x8.c", |
| 4645 | "src/f32-vunary/gen/vneg-sse-x8.c", |
| 4646 | "src/f32-vunary/gen/vsqr-sse-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4647 | "src/x32-packx/x4-sse.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4648 | ] |
| 4649 | |
| 4650 | ALL_SSE_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4651 | "src/f32-avgpool/9p8x-minmax-sse-c4.c", |
| 4652 | "src/f32-avgpool/9x-minmax-sse-c4.c", |
| Erich Elsen | b123340 | 2020-06-08 15:53:15 -0700 | [diff] [blame] | 4653 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c", |
| 4654 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 4655 | "src/f32-dwconv/gen/up4x3-minmax-sse-acc2.c", |
| 4656 | "src/f32-dwconv/gen/up4x3-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4657 | "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c", |
| 4658 | "src/f32-dwconv/gen/up4x4-minmax-sse.c", |
| 4659 | "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c", |
| 4660 | "src/f32-dwconv/gen/up4x9-minmax-sse.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4661 | "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c", |
| 4662 | "src/f32-dwconv/gen/up4x25-minmax-sse.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 4663 | "src/f32-dwconv/gen/up8x3-minmax-sse-acc2.c", |
| 4664 | "src/f32-dwconv/gen/up8x3-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4665 | "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c", |
| 4666 | "src/f32-dwconv/gen/up8x4-minmax-sse.c", |
| 4667 | "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c", |
| 4668 | "src/f32-dwconv/gen/up8x9-minmax-sse.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4669 | "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c", |
| 4670 | "src/f32-dwconv/gen/up8x25-minmax-sse.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4671 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c", |
| 4672 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c", |
| 4673 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c", |
| Marat Dukhan | 470078a | 2020-10-23 22:36:52 -0700 | [diff] [blame] | 4674 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4675 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c", |
| Marat Dukhan | 470078a | 2020-10-23 22:36:52 -0700 | [diff] [blame] | 4676 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c", |
| 4677 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c", |
| 4678 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c", |
| 4679 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c", |
| 4680 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c", |
| Marat Dukhan | 0ff9718 | 2020-10-25 19:14:03 -0700 | [diff] [blame] | 4681 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c", |
| 4682 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c", |
| 4683 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4684 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c", |
| Marat Dukhan | 0ff9718 | 2020-10-25 19:14:03 -0700 | [diff] [blame] | 4685 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 4686 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c", |
| 4687 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c", |
| 4688 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c", |
| Marat Dukhan | d050389 | 2020-10-30 08:22:04 -0700 | [diff] [blame] | 4689 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c", |
| 4690 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c", |
| 4691 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c", |
| 4692 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c", |
| 4693 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c", |
| 4694 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c", |
| 4695 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c", |
| 4696 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c", |
| 4697 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c", |
| 4698 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c", |
| 4699 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c", |
| 4700 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c", |
| 4701 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c", |
| Marat Dukhan | ccca214 | 2020-10-30 17:32:45 -0700 | [diff] [blame] | 4702 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c", |
| 4703 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c", |
| 4704 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c", |
| 4705 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c", |
| 4706 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c", |
| 4707 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c", |
| 4708 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c", |
| 4709 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c", |
| Marat Dukhan | ccca214 | 2020-10-30 17:32:45 -0700 | [diff] [blame] | 4710 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c", |
| Frank Barchard | 8ef44cd | 2020-11-03 12:30:23 -0800 | [diff] [blame] | 4711 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c", |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 4712 | "src/f32-gavgpool-cw/sse-x4.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4713 | "src/f32-gavgpool/7p7x-minmax-sse-c4.c", |
| 4714 | "src/f32-gavgpool/7x-minmax-sse-c4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4715 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c", |
| 4716 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c", |
| 4717 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4718 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c", |
| 4719 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c", |
| 4720 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4721 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c", |
| 4722 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c", |
| 4723 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4724 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c", |
| 4725 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c", |
| 4726 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4727 | "src/f32-gemm/gen/1x8-minmax-sse-dup.c", |
| 4728 | "src/f32-gemm/gen/1x8-minmax-sse-load1.c", |
| 4729 | "src/f32-gemm/gen/1x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4730 | "src/f32-gemm/gen/3x8-minmax-sse-dup.c", |
| 4731 | "src/f32-gemm/gen/3x8-minmax-sse-load1.c", |
| 4732 | "src/f32-gemm/gen/3x8s4-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4733 | "src/f32-gemm/gen/4x2c4-minmax-sse.c", |
| 4734 | "src/f32-gemm/gen/4x8-minmax-sse-dup.c", |
| 4735 | "src/f32-gemm/gen/4x8-minmax-sse-load1.c", |
| 4736 | "src/f32-gemm/gen/4x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4737 | "src/f32-gemm/gen/5x8-minmax-sse-dup.c", |
| 4738 | "src/f32-gemm/gen/5x8-minmax-sse-load1.c", |
| 4739 | "src/f32-gemm/gen/5x8s4-minmax-sse.c", |
| Artsiom Ablavatski | b3ffd58 | 2021-03-31 13:00:08 -0700 | [diff] [blame] | 4740 | "src/f32-ibilinear-chw/gen/sse-p4.c", |
| 4741 | "src/f32-ibilinear-chw/gen/sse-p8.c", |
| Frank Barchard | 4a35204 | 2021-04-13 15:52:08 -0700 | [diff] [blame] | 4742 | "src/f32-ibilinear/gen/sse-c4.c", |
| 4743 | "src/f32-ibilinear/gen/sse-c8.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4744 | "src/f32-igemm/gen/1x8-minmax-sse-dup.c", |
| 4745 | "src/f32-igemm/gen/1x8-minmax-sse-load1.c", |
| 4746 | "src/f32-igemm/gen/1x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4747 | "src/f32-igemm/gen/3x8-minmax-sse-dup.c", |
| 4748 | "src/f32-igemm/gen/3x8-minmax-sse-load1.c", |
| 4749 | "src/f32-igemm/gen/3x8s4-minmax-sse.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4750 | "src/f32-igemm/gen/4x2c4-minmax-sse.c", |
| 4751 | "src/f32-igemm/gen/4x8-minmax-sse-dup.c", |
| 4752 | "src/f32-igemm/gen/4x8-minmax-sse-load1.c", |
| 4753 | "src/f32-igemm/gen/4x8s4-minmax-sse.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4754 | "src/f32-igemm/gen/5x8-minmax-sse-dup.c", |
| 4755 | "src/f32-igemm/gen/5x8-minmax-sse-load1.c", |
| 4756 | "src/f32-igemm/gen/5x8s4-minmax-sse.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4757 | "src/f32-maxpool/9p8x-minmax-sse-c4.c", |
| 4758 | "src/f32-pavgpool/9p8x-minmax-sse-c4.c", |
| 4759 | "src/f32-pavgpool/9x-minmax-sse-c4.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 4760 | "src/f32-ppmm/gen/4x8-minmax-sse.c", |
| Marat Dukhan | 39b5e94 | 2020-06-24 15:03:48 -0700 | [diff] [blame] | 4761 | "src/f32-prelu/gen/sse-2x4.c", |
| 4762 | "src/f32-prelu/gen/sse-2x8.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 4763 | "src/f32-rmax/sse.c", |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 4764 | "src/f32-spmm/gen/4x1-minmax-sse.c", |
| 4765 | "src/f32-spmm/gen/8x1-minmax-sse.c", |
| Erich Elsen | 6e80fdc | 2020-06-09 15:35:37 -0700 | [diff] [blame] | 4766 | "src/f32-spmm/gen/16x1-minmax-sse.c", |
| Frank Barchard | 846c0c6 | 2020-10-26 15:01:39 -0700 | [diff] [blame] | 4767 | "src/f32-spmm/gen/32x1-minmax-sse.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 4768 | "src/f32-vbinary/gen/vadd-minmax-sse-x4.c", |
| 4769 | "src/f32-vbinary/gen/vadd-minmax-sse-x8.c", |
| 4770 | "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c", |
| 4771 | "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c", |
| 4772 | "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c", |
| 4773 | "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c", |
| 4774 | "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c", |
| 4775 | "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c", |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 4776 | "src/f32-vbinary/gen/vmax-sse-x4.c", |
| 4777 | "src/f32-vbinary/gen/vmax-sse-x8.c", |
| 4778 | "src/f32-vbinary/gen/vmaxc-sse-x4.c", |
| 4779 | "src/f32-vbinary/gen/vmaxc-sse-x8.c", |
| 4780 | "src/f32-vbinary/gen/vmin-sse-x4.c", |
| 4781 | "src/f32-vbinary/gen/vmin-sse-x8.c", |
| 4782 | "src/f32-vbinary/gen/vminc-sse-x4.c", |
| 4783 | "src/f32-vbinary/gen/vminc-sse-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 4784 | "src/f32-vbinary/gen/vmul-minmax-sse-x4.c", |
| 4785 | "src/f32-vbinary/gen/vmul-minmax-sse-x8.c", |
| 4786 | "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c", |
| 4787 | "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c", |
| 4788 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c", |
| 4789 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c", |
| 4790 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c", |
| 4791 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 4792 | "src/f32-vbinary/gen/vsqrdiff-sse-x4.c", |
| 4793 | "src/f32-vbinary/gen/vsqrdiff-sse-x8.c", |
| 4794 | "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c", |
| 4795 | "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 4796 | "src/f32-vbinary/gen/vsub-minmax-sse-x4.c", |
| 4797 | "src/f32-vbinary/gen/vsub-minmax-sse-x8.c", |
| 4798 | "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c", |
| 4799 | "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4800 | "src/f32-vclamp/gen/vclamp-sse-x4.c", |
| 4801 | "src/f32-vclamp/gen/vclamp-sse-x8.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 4802 | "src/f32-vhswish/gen/vhswish-sse-x4.c", |
| 4803 | "src/f32-vhswish/gen/vhswish-sse-x8.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 4804 | "src/f32-vlrelu/gen/vlrelu-sse-x4.c", |
| 4805 | "src/f32-vlrelu/gen/vlrelu-sse-x8.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4806 | "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c", |
| 4807 | "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 4808 | "src/f32-vrelu/gen/vrelu-sse-x4.c", |
| 4809 | "src/f32-vrelu/gen/vrelu-sse-x8.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 4810 | "src/f32-vsqrt/gen/sse-sqrt-x4.c", |
| 4811 | "src/f32-vsqrt/gen/sse-sqrt-x8.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 4812 | "src/f32-vunary/gen/vabs-sse-x4.c", |
| 4813 | "src/f32-vunary/gen/vabs-sse-x8.c", |
| 4814 | "src/f32-vunary/gen/vneg-sse-x4.c", |
| 4815 | "src/f32-vunary/gen/vneg-sse-x8.c", |
| 4816 | "src/f32-vunary/gen/vsqr-sse-x4.c", |
| 4817 | "src/f32-vunary/gen/vsqr-sse-x8.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 4818 | "src/math/roundd-sse-addsub.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4819 | "src/math/roundne-sse-addsub.c", |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 4820 | "src/math/roundu-sse-addsub.c", |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 4821 | "src/math/roundz-sse-addsub.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 4822 | "src/math/sqrt-sse-hh1mac.c", |
| 4823 | "src/math/sqrt-sse-nr1mac.c", |
| 4824 | "src/math/sqrt-sse-nr2mac.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4825 | "src/x32-packx/x4-sse.c", |
| Frank Barchard | 70e8c99 | 2021-12-16 18:35:18 -0800 | [diff] [blame] | 4826 | "src/x32-transpose/4x4-sse.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 4827 | ] |
| 4828 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4829 | PROD_SSE2_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 4830 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4831 | "src/f32-argmaxpool/4x-sse2-c4.c", |
| 4832 | "src/f32-argmaxpool/9p8x-sse2-c4.c", |
| 4833 | "src/f32-argmaxpool/9x-sse2-c4.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 4834 | "src/f32-f16-vcvt/gen/vcvt-sse2-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4835 | "src/f32-prelu/gen/sse2-2x8.c", |
| Marat Dukhan | ed2d776 | 2021-12-03 23:51:19 -0800 | [diff] [blame] | 4836 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c", |
| 4837 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 4838 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4839 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c", |
| 4840 | "src/f32-vlrelu/gen/vlrelu-sse2-x8.c", |
| 4841 | "src/f32-vrnd/gen/vrndd-sse2-x8.c", |
| 4842 | "src/f32-vrnd/gen/vrndne-sse2-x8.c", |
| 4843 | "src/f32-vrnd/gen/vrndu-sse2-x8.c", |
| 4844 | "src/f32-vrnd/gen/vrndz-sse2-x8.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 4845 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4846 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 4847 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 4848 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4849 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4850 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4851 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4852 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| 4853 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 914f57b | 2021-12-13 12:31:42 -0800 | [diff] [blame] | 4854 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4855 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse2-c8.c", |
| 4856 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse2-c8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4857 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4858 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4859 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4860 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4861 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 4862 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 4863 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 4864 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4865 | "src/qu8-avgpool/9p8x-minmax-sse2-c8.c", |
| 4866 | "src/qu8-avgpool/9x-minmax-sse2-c8.c", |
| 4867 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 4868 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 4869 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 4870 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse2-c8.c", |
| 4871 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse2-c8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4872 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4873 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4874 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4875 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4876 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 4877 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 4878 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 4879 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 4880 | "src/s8-ibilinear/gen/sse2-c8.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 4881 | "src/s8-maxpool/9p8x-minmax-sse2-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 4882 | "src/s8-vclamp/sse2-x64.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 4883 | "src/u8-ibilinear/gen/sse2-c8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4884 | "src/u8-maxpool/9p8x-minmax-sse2-c16.c", |
| 4885 | "src/u8-rmax/sse2.c", |
| 4886 | "src/u8-vclamp/sse2-x64.c", |
| 4887 | "src/x8-zip/x2-sse2.c", |
| 4888 | "src/x8-zip/x3-sse2.c", |
| 4889 | "src/x8-zip/x4-sse2.c", |
| 4890 | "src/x8-zip/xm-sse2.c", |
| 4891 | "src/x32-unpool/sse2.c", |
| 4892 | "src/x32-zip/x2-sse2.c", |
| 4893 | "src/x32-zip/x3-sse2.c", |
| 4894 | "src/x32-zip/x4-sse2.c", |
| 4895 | "src/x32-zip/xm-sse2.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 4896 | "src/xx-fill/sse2-x64.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 4897 | "src/xx-pad/sse2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 4898 | ] |
| 4899 | |
| 4900 | ALL_SSE2_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 1227adb | 2021-10-16 17:33:51 -0700 | [diff] [blame] | 4901 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x8.c", |
| 4902 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x16.c", |
| 4903 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x24.c", |
| 4904 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c", |
| 4905 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x8.c", |
| 4906 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x16.c", |
| 4907 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x24.c", |
| 4908 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x32.c", |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4909 | "src/f32-argmaxpool/4x-sse2-c4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4910 | "src/f32-argmaxpool/9p8x-sse2-c4.c", |
| Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4911 | "src/f32-argmaxpool/9x-sse2-c4.c", |
| Marat Dukhan | eb84423 | 2021-11-08 23:07:53 -0800 | [diff] [blame] | 4912 | "src/f32-f16-vcvt/gen/vcvt-sse2-x8.c", |
| 4913 | "src/f32-f16-vcvt/gen/vcvt-sse2-x16.c", |
| 4914 | "src/f32-f16-vcvt/gen/vcvt-sse2-x24.c", |
| 4915 | "src/f32-f16-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 802fcae | 2020-12-11 14:37:25 -0800 | [diff] [blame] | 4916 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c", |
| 4917 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c", |
| 4918 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c", |
| 4919 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c", |
| 4920 | "src/f32-gemm/gen/1x8-minmax-sse2-dup.c", |
| 4921 | "src/f32-gemm/gen/3x8-minmax-sse2-dup.c", |
| 4922 | "src/f32-gemm/gen/4x8-minmax-sse2-dup.c", |
| 4923 | "src/f32-gemm/gen/5x8-minmax-sse2-dup.c", |
| 4924 | "src/f32-igemm/gen/1x8-minmax-sse2-dup.c", |
| 4925 | "src/f32-igemm/gen/3x8-minmax-sse2-dup.c", |
| 4926 | "src/f32-igemm/gen/4x8-minmax-sse2-dup.c", |
| 4927 | "src/f32-igemm/gen/5x8-minmax-sse2-dup.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 4928 | "src/f32-prelu/gen/sse2-2x4.c", |
| 4929 | "src/f32-prelu/gen/sse2-2x8.c", |
| Marat Dukhan | c5aa242 | 2021-12-01 00:15:19 -0800 | [diff] [blame] | 4930 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x8.c", |
| 4931 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x16.c", |
| 4932 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x24.c", |
| 4933 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c", |
| 4934 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x8.c", |
| 4935 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x16.c", |
| 4936 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x24.c", |
| 4937 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 4938 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x4.c", |
| 4939 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x8-acc2.c", |
| 4940 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x8.c", |
| 4941 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12-acc2.c", |
| 4942 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12-acc3.c", |
| 4943 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12.c", |
| 4944 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16-acc2.c", |
| 4945 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16-acc4.c", |
| 4946 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16.c", |
| 4947 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc2.c", |
| 4948 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc5.c", |
| 4949 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4950 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c", |
| 4951 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c", |
| 4952 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c", |
| 4953 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c", |
| 4954 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c", |
| 4955 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c", |
| 4956 | "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c", |
| 4957 | "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c", |
| 4958 | "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c", |
| 4959 | "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c", |
| 4960 | "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c", |
| 4961 | "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 4962 | "src/f32-vlrelu/gen/vlrelu-sse2-x4.c", |
| 4963 | "src/f32-vlrelu/gen/vlrelu-sse2-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 4964 | "src/f32-vrnd/gen/vrndd-sse2-x4.c", |
| 4965 | "src/f32-vrnd/gen/vrndd-sse2-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4966 | "src/f32-vrnd/gen/vrndne-sse2-x4.c", |
| 4967 | "src/f32-vrnd/gen/vrndne-sse2-x8.c", |
| 4968 | "src/f32-vrnd/gen/vrndu-sse2-x4.c", |
| 4969 | "src/f32-vrnd/gen/vrndu-sse2-x8.c", |
| 4970 | "src/f32-vrnd/gen/vrndz-sse2-x4.c", |
| 4971 | "src/f32-vrnd/gen/vrndz-sse2-x8.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 4972 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x4.c", |
| 4973 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x8.c", |
| 4974 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x12.c", |
| 4975 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x16.c", |
| 4976 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x20.c", |
| 4977 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x24.c", |
| 4978 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x4.c", |
| 4979 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x8.c", |
| 4980 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x12.c", |
| 4981 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x16.c", |
| 4982 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x20.c", |
| 4983 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x24.c", |
| Marat Dukhan | 3ed866b | 2021-09-29 08:23:33 -0700 | [diff] [blame] | 4984 | "src/math/cvt-f16-f32-sse2-int16.c", |
| 4985 | "src/math/cvt-f16-f32-sse2-int32.c", |
| Marat Dukhan | 056f49d | 2021-11-08 17:44:42 -0800 | [diff] [blame] | 4986 | "src/math/cvt-f32-f16-sse2.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 4987 | "src/math/exp-sse2-rr2-lut64-p2.c", |
| 4988 | "src/math/exp-sse2-rr2-p5.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 4989 | "src/math/expm1minus-sse2-rr2-lut16-p3.c", |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 4990 | "src/math/expm1minus-sse2-rr2-p6.c", |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 4991 | "src/math/expminus-sse2-rr2-p5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 4992 | "src/math/roundd-sse2-cvt.c", |
| 4993 | "src/math/roundne-sse2-cvt.c", |
| 4994 | "src/math/roundu-sse2-cvt.c", |
| 4995 | "src/math/roundz-sse2-cvt.c", |
| 4996 | "src/math/sigmoid-sse2-rr2-lut64-p2-div.c", |
| 4997 | "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c", |
| 4998 | "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c", |
| 4999 | "src/math/sigmoid-sse2-rr2-p5-div.c", |
| 5000 | "src/math/sigmoid-sse2-rr2-p5-nr1.c", |
| 5001 | "src/math/sigmoid-sse2-rr2-p5-nr2.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5002 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5003 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5004 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5005 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5006 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5007 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5008 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5009 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5010 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c", |
| 5011 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5012 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5013 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5014 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5015 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5016 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5017 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5018 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5019 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5020 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5021 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5022 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5023 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5024 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5025 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5026 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5027 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5028 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5029 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5030 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5031 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5032 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5033 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5034 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5035 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5036 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5037 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5038 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5039 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5040 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5041 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5042 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5043 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5044 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5045 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5046 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5047 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5048 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5049 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | d873fa2 | 2021-12-10 01:55:10 -0800 | [diff] [blame] | 5050 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x8.c", |
| 5051 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x16.c", |
| 5052 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x24.c", |
| 5053 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5054 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse2-c8.c", |
| 5055 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse2-c16.c", |
| 5056 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse2-c24.c", |
| 5057 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse2-c8.c", |
| 5058 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse2-c16.c", |
| 5059 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse2-c24.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5060 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5061 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5062 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5063 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5064 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5065 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5066 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5067 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5068 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5069 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5070 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5071 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5072 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5073 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5074 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5075 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5076 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5077 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5078 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5079 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5080 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse2.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5081 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5082 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5083 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5084 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5085 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5086 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5087 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5088 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5089 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5090 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5091 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5092 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5093 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5094 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | f62bbdc | 2020-08-04 13:59:04 -0700 | [diff] [blame] | 5095 | "src/qs8-requantization/fp32-sse2.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5096 | "src/qs8-requantization/gemmlowp-sse2.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5097 | "src/qs8-requantization/rndna-sse2.c", |
| Marat Dukhan | d9f3ad4 | 2020-08-10 12:30:58 -0700 | [diff] [blame] | 5098 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 5099 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c", |
| 5100 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c", |
| 5101 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c", |
| Marat Dukhan | 0270d9f | 2020-08-11 00:56:46 -0700 | [diff] [blame] | 5102 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| 5103 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c", |
| 5104 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c", |
| 5105 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5106 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 5107 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| 5108 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 5109 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 5110 | "src/qu8-avgpool/9p8x-minmax-sse2-c8.c", |
| 5111 | "src/qu8-avgpool/9x-minmax-sse2-c8.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5112 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 5113 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 5114 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| 5115 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| Marat Dukhan | d873fa2 | 2021-12-10 01:55:10 -0800 | [diff] [blame] | 5116 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x8.c", |
| 5117 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x16.c", |
| 5118 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x24.c", |
| 5119 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 5120 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse2-c8.c", |
| 5121 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse2-c16.c", |
| 5122 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse2-c24.c", |
| 5123 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse2-c8.c", |
| 5124 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse2-c16.c", |
| 5125 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse2-c24.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5126 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 5127 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 5128 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 5129 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 5130 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 5131 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 5132 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 5133 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5134 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 5135 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 5136 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 5137 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 5138 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 5139 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5140 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 5141 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 5142 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 5143 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 5144 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 5145 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 5146 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 5147 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5148 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 5149 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 5150 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 5151 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 5152 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 5153 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 5154 | "src/qu8-requantization/fp32-sse2.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5155 | "src/qu8-requantization/gemmlowp-sse2.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5156 | "src/qu8-requantization/rndna-sse2.c", |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 5157 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 5158 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c", |
| 5159 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| 5160 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5161 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 5162 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| 5163 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 5164 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| Marat Dukhan | 7519eb1 | 2021-11-23 19:08:29 -0800 | [diff] [blame] | 5165 | "src/s8-ibilinear/gen/sse2-c8.c", |
| 5166 | "src/s8-ibilinear/gen/sse2-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 5167 | "src/s8-maxpool/9p8x-minmax-sse2-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 5168 | "src/s8-vclamp/sse2-x64.c", |
| Marat Dukhan | 7519eb1 | 2021-11-23 19:08:29 -0800 | [diff] [blame] | 5169 | "src/u8-ibilinear/gen/sse2-c8.c", |
| 5170 | "src/u8-ibilinear/gen/sse2-c16.c", |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5171 | "src/u8-maxpool/9p8x-minmax-sse2-c16.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5172 | "src/u8-rmax/sse2.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 5173 | "src/u8-vclamp/sse2-x64.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5174 | "src/x8-zip/x2-sse2.c", |
| 5175 | "src/x8-zip/x3-sse2.c", |
| 5176 | "src/x8-zip/x4-sse2.c", |
| 5177 | "src/x8-zip/xm-sse2.c", |
| Alan Kelly | 1945f0b | 2021-12-24 01:26:45 -0800 | [diff] [blame] | 5178 | "src/x16-transpose/4x8-sse2.c", |
| Marat Dukhan | 57dccd8 | 2020-04-14 00:53:10 -0700 | [diff] [blame] | 5179 | "src/x32-unpool/sse2.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5180 | "src/x32-zip/x2-sse2.c", |
| 5181 | "src/x32-zip/x3-sse2.c", |
| 5182 | "src/x32-zip/x4-sse2.c", |
| 5183 | "src/x32-zip/xm-sse2.c", |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 5184 | "src/xx-fill/sse2-x64.c", |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 5185 | "src/xx-pad/sse2.c", |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 5186 | ] |
| 5187 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5188 | PROD_SSSE3_MICROKERNEL_SRCS = [ |
| 5189 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5190 | ] |
| 5191 | |
| 5192 | ALL_SSSE3_MICROKERNEL_SRCS = [ |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 5193 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c", |
| 5194 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c", |
| 5195 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c", |
| Marat Dukhan | 98f2eeb | 2020-10-23 23:13:41 -0700 | [diff] [blame] | 5196 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 5197 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c", |
| Marat Dukhan | 98f2eeb | 2020-10-23 23:13:41 -0700 | [diff] [blame] | 5198 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c", |
| 5199 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c", |
| 5200 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c", |
| 5201 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c", |
| 5202 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5203 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5204 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5205 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-ssse3.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5206 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5207 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5208 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-ssse3.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5209 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5210 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5211 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-ssse3.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5212 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5213 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5214 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5215 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5216 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5217 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5218 | "src/qs8-requantization/gemmlowp-ssse3.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5219 | "src/qs8-requantization/rndna-ssse3.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5220 | "src/qu8-requantization/gemmlowp-ssse3.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5221 | "src/qu8-requantization/rndna-ssse3.c", |
| Marat Dukhan | 7c478e3 | 2021-09-10 09:48:13 -0700 | [diff] [blame] | 5222 | "src/x8-lut/gen/lut-ssse3-x16.c", |
| 5223 | "src/x8-lut/gen/lut-ssse3-x32.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5224 | ] |
| 5225 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5226 | PROD_SSE41_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 5227 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 5228 | "src/f32-f16-vcvt/gen/vcvt-sse41-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5229 | "src/f32-prelu/gen/sse41-2x8.c", |
| Marat Dukhan | ed2d776 | 2021-12-03 23:51:19 -0800 | [diff] [blame] | 5230 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5231 | "src/f32-vlrelu/gen/vlrelu-sse41-x8.c", |
| 5232 | "src/f32-vrnd/gen/vrndd-sse41-x8.c", |
| 5233 | "src/f32-vrnd/gen/vrndne-sse41-x8.c", |
| 5234 | "src/f32-vrnd/gen/vrndu-sse41-x8.c", |
| 5235 | "src/f32-vrnd/gen/vrndz-sse41-x8.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 5236 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5237 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 5238 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| 5239 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5240 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5241 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5242 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5243 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| 5244 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 5245 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5246 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse41-c8.c", |
| 5247 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse41-c8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5248 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5249 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5250 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5251 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5252 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5253 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 5254 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5255 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5256 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 5257 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | f92206b | 2021-12-10 17:02:07 -0800 | [diff] [blame] | 5258 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 5259 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse41-c8.c", |
| 5260 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse41-c8.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5261 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5262 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5263 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5264 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5265 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5266 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 5267 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5268 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 5269 | "src/s8-ibilinear/gen/sse41-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 5270 | "src/s8-maxpool/9p8x-minmax-sse41-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 5271 | "src/s8-vclamp/sse41-x64.c", |
| Marat Dukhan | 24abe6b | 2021-11-24 15:28:57 -0800 | [diff] [blame] | 5272 | "src/u8-ibilinear/gen/sse41-c16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5273 | ] |
| 5274 | |
| 5275 | ALL_SSE41_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 1227adb | 2021-10-16 17:33:51 -0700 | [diff] [blame] | 5276 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x8.c", |
| 5277 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c", |
| 5278 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x24.c", |
| 5279 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x32.c", |
| 5280 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x8.c", |
| 5281 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x16.c", |
| 5282 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x24.c", |
| 5283 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x32.c", |
| Marat Dukhan | eb84423 | 2021-11-08 23:07:53 -0800 | [diff] [blame] | 5284 | "src/f32-f16-vcvt/gen/vcvt-sse41-x8.c", |
| 5285 | "src/f32-f16-vcvt/gen/vcvt-sse41-x16.c", |
| 5286 | "src/f32-f16-vcvt/gen/vcvt-sse41-x24.c", |
| 5287 | "src/f32-f16-vcvt/gen/vcvt-sse41-x32.c", |
| Marat Dukhan | 40a672f | 2019-11-25 03:08:22 -0800 | [diff] [blame] | 5288 | "src/f32-prelu/gen/sse41-2x4.c", |
| 5289 | "src/f32-prelu/gen/sse41-2x8.c", |
| Marat Dukhan | c5aa242 | 2021-12-01 00:15:19 -0800 | [diff] [blame] | 5290 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x8.c", |
| 5291 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x16.c", |
| 5292 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x24.c", |
| 5293 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5294 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c", |
| 5295 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c", |
| 5296 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c", |
| 5297 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c", |
| 5298 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c", |
| 5299 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c", |
| 5300 | "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c", |
| 5301 | "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c", |
| 5302 | "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c", |
| 5303 | "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c", |
| 5304 | "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c", |
| 5305 | "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 5306 | "src/f32-vlrelu/gen/vlrelu-sse41-x4.c", |
| 5307 | "src/f32-vlrelu/gen/vlrelu-sse41-x8.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 5308 | "src/f32-vrnd/gen/vrndd-sse41-x4.c", |
| 5309 | "src/f32-vrnd/gen/vrndd-sse41-x8.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5310 | "src/f32-vrnd/gen/vrndne-sse41-x4.c", |
| 5311 | "src/f32-vrnd/gen/vrndne-sse41-x8.c", |
| 5312 | "src/f32-vrnd/gen/vrndu-sse41-x4.c", |
| 5313 | "src/f32-vrnd/gen/vrndu-sse41-x8.c", |
| 5314 | "src/f32-vrnd/gen/vrndz-sse41-x4.c", |
| 5315 | "src/f32-vrnd/gen/vrndz-sse41-x8.c", |
| Marat Dukhan | ce834ad | 2022-01-03 00:22:01 -0800 | [diff] [blame] | 5316 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x4.c", |
| 5317 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x8.c", |
| 5318 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x12.c", |
| 5319 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x16.c", |
| 5320 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x20.c", |
| 5321 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x24.c", |
| 5322 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x4.c", |
| 5323 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x8.c", |
| 5324 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x12.c", |
| 5325 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x16.c", |
| 5326 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x20.c", |
| 5327 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x24.c", |
| Marat Dukhan | 3ed866b | 2021-09-29 08:23:33 -0700 | [diff] [blame] | 5328 | "src/math/cvt-f16-f32-sse41-int16.c", |
| 5329 | "src/math/cvt-f16-f32-sse41-int32.c", |
| Marat Dukhan | 056f49d | 2021-11-08 17:44:42 -0800 | [diff] [blame] | 5330 | "src/math/cvt-f32-f16-sse41.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5331 | "src/math/roundd-sse41.c", |
| 5332 | "src/math/roundne-sse41.c", |
| 5333 | "src/math/roundu-sse41.c", |
| 5334 | "src/math/roundz-sse41.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5335 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5336 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5337 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5338 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5339 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5340 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5341 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5342 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5343 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5344 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5345 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5346 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| 5347 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c", |
| 5348 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c", |
| 5349 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c", |
| 5350 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5351 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5352 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5353 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5354 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5355 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5356 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5357 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5358 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5359 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5360 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5361 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5362 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5363 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5364 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5365 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5366 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5367 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5368 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5369 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5370 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5371 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5372 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5373 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5374 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5375 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5376 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5377 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5378 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5379 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5380 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 5381 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5382 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5383 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5384 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5385 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5386 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5387 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5388 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5389 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5390 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5391 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c", |
| 5392 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5393 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c", |
| 5394 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f9cf55d | 2021-12-09 18:54:00 -0800 | [diff] [blame] | 5395 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x8.c", |
| 5396 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| 5397 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x24.c", |
| 5398 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x32.c", |
| Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5399 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse41-c8.c", |
| 5400 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse41-c16.c", |
| 5401 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse41-c24.c", |
| 5402 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse41-c8.c", |
| 5403 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse41-c16.c", |
| 5404 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse41-c24.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5405 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5406 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5407 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5408 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5409 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5410 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5411 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5412 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5413 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5414 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5415 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5416 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5417 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5418 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5419 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5420 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5421 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5422 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5423 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5424 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5425 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse41.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5426 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5427 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5428 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5429 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5430 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5431 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5432 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5433 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5434 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5435 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5436 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5437 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5438 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5439 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 2e23d2b | 2020-07-29 16:01:37 -0700 | [diff] [blame] | 5440 | "src/qs8-requantization/fp32-sse4.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5441 | "src/qs8-requantization/gemmlowp-sse4.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5442 | "src/qs8-requantization/rndna-sse4.c", |
| Marat Dukhan | 0d979d5 | 2021-06-09 13:21:18 -0700 | [diff] [blame] | 5443 | "src/qs8-requantization/rndnu-sse4-sra.c", |
| 5444 | "src/qs8-requantization/rndnu-sse4-srl.c", |
| Marat Dukhan | d9f3ad4 | 2020-08-10 12:30:58 -0700 | [diff] [blame] | 5445 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5446 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5447 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c", |
| 5448 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c", |
| Marat Dukhan | bb9225e | 2020-09-06 22:40:56 -0700 | [diff] [blame] | 5449 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5450 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c", |
| 5451 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c", |
| 5452 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c", |
| Marat Dukhan | 0270d9f | 2020-08-11 00:56:46 -0700 | [diff] [blame] | 5453 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5454 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5455 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c", |
| 5456 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c", |
| Marat Dukhan | bb9225e | 2020-09-06 22:40:56 -0700 | [diff] [blame] | 5457 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5458 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c", |
| 5459 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c", |
| 5460 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5461 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5462 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5463 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5464 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5465 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5466 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5467 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5468 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5469 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5470 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5471 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5472 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| Marat Dukhan | f9cf55d | 2021-12-09 18:54:00 -0800 | [diff] [blame] | 5473 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x8.c", |
| 5474 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| 5475 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x24.c", |
| 5476 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x32.c", |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 5477 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse41-c8.c", |
| 5478 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse41-c16.c", |
| 5479 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse41-c24.c", |
| 5480 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse41-c8.c", |
| 5481 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse41-c16.c", |
| 5482 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse41-c24.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5483 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 5484 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 5485 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5486 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 5487 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 5488 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 5489 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 5490 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5491 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 5492 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 5493 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5494 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 5495 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 5496 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5497 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 5498 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 5499 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5500 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 5501 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 5502 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 5503 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 5504 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5505 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 5506 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 5507 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5508 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 5509 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 5510 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Marat Dukhan | 9976cd8 | 2021-05-24 23:15:45 -0700 | [diff] [blame] | 5511 | "src/qu8-requantization/gemmlowp-sse4.c", |
| Marat Dukhan | 0671624 | 2021-05-26 15:56:39 -0700 | [diff] [blame] | 5512 | "src/qu8-requantization/rndna-sse4.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 5513 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5514 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5515 | "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5516 | "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c", |
| 5517 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5518 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5519 | "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5520 | "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5521 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5522 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5523 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5524 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| Marat Dukhan | 7519eb1 | 2021-11-23 19:08:29 -0800 | [diff] [blame] | 5525 | "src/s8-ibilinear/gen/sse41-c8.c", |
| 5526 | "src/s8-ibilinear/gen/sse41-c16.c", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 5527 | "src/s8-maxpool/9p8x-minmax-sse41-c16.c", |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 5528 | "src/s8-vclamp/sse41-x64.c", |
| Marat Dukhan | 7519eb1 | 2021-11-23 19:08:29 -0800 | [diff] [blame] | 5529 | "src/u8-ibilinear/gen/sse41-c8.c", |
| 5530 | "src/u8-ibilinear/gen/sse41-c16.c", |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 5531 | ] |
| 5532 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5533 | PROD_AVX_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 5534 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5535 | "src/f32-dwconv/gen/up8x25-minmax-avx.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 5536 | "src/f32-dwconv/gen/up16x3-minmax-avx.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5537 | "src/f32-dwconv/gen/up16x4-minmax-avx.c", |
| 5538 | "src/f32-dwconv/gen/up16x9-minmax-avx.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 5539 | "src/f32-f16-vcvt/gen/vcvt-avx-x24.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5540 | "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c", |
| 5541 | "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c", |
| 5542 | "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c", |
| 5543 | "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c", |
| 5544 | "src/f32-prelu/gen/avx-2x16.c", |
| Marat Dukhan | b91432c | 2021-12-14 16:52:09 -0800 | [diff] [blame] | 5545 | "src/f32-qs8-vcvt/gen/vcvt-avx-x32.c", |
| 5546 | "src/f32-qu8-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5547 | "src/f32-vbinary/gen/vadd-minmax-avx-x16.c", |
| 5548 | "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c", |
| 5549 | "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c", |
| 5550 | "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c", |
| 5551 | "src/f32-vbinary/gen/vmax-avx-x16.c", |
| 5552 | "src/f32-vbinary/gen/vmaxc-avx-x16.c", |
| 5553 | "src/f32-vbinary/gen/vmin-avx-x16.c", |
| 5554 | "src/f32-vbinary/gen/vminc-avx-x16.c", |
| 5555 | "src/f32-vbinary/gen/vmul-minmax-avx-x16.c", |
| 5556 | "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c", |
| 5557 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c", |
| 5558 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c", |
| 5559 | "src/f32-vbinary/gen/vsqrdiff-avx-x16.c", |
| 5560 | "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c", |
| 5561 | "src/f32-vbinary/gen/vsub-minmax-avx-x16.c", |
| 5562 | "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c", |
| 5563 | "src/f32-vclamp/gen/vclamp-avx-x16.c", |
| 5564 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c", |
| 5565 | "src/f32-vhswish/gen/vhswish-avx-x16.c", |
| 5566 | "src/f32-vlrelu/gen/vlrelu-avx-x16.c", |
| 5567 | "src/f32-vrnd/gen/vrndd-avx-x16.c", |
| 5568 | "src/f32-vrnd/gen/vrndne-avx-x16.c", |
| 5569 | "src/f32-vrnd/gen/vrndu-avx-x16.c", |
| 5570 | "src/f32-vrnd/gen/vrndz-avx-x16.c", |
| 5571 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c", |
| 5572 | "src/f32-vsqrt/gen/avx-sqrt-x8.c", |
| 5573 | "src/f32-vunary/gen/vabs-avx-x16.c", |
| 5574 | "src/f32-vunary/gen/vneg-avx-x16.c", |
| 5575 | "src/f32-vunary/gen/vsqr-avx-x16.c", |
| Marat Dukhan | 2848059 | 2021-07-27 23:52:27 -0700 | [diff] [blame] | 5576 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| 5577 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5578 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5579 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5580 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5581 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5582 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| 5583 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Marat Dukhan | cd4089f | 2021-12-14 23:53:33 -0800 | [diff] [blame] | 5584 | "src/qs8-f32-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5585 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5586 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5587 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5588 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5589 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5590 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 5591 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5592 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5593 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| 5594 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | cd4089f | 2021-12-14 23:53:33 -0800 | [diff] [blame] | 5595 | "src/qu8-f32-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5596 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5597 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5598 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5599 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5600 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5601 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| Marat Dukhan | 0853b8a | 2021-08-03 01:01:53 -0700 | [diff] [blame] | 5602 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5603 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | 98e054b | 2021-09-13 09:43:50 -0700 | [diff] [blame] | 5604 | "src/x8-lut/gen/lut-avx-x64.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 5605 | ] |
| 5606 | |
| 5607 | ALL_AVX_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 1227adb | 2021-10-16 17:33:51 -0700 | [diff] [blame] | 5608 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x8.c", |
| 5609 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c", |
| 5610 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x24.c", |
| 5611 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x32.c", |
| 5612 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x8.c", |
| 5613 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x16.c", |
| 5614 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x24.c", |
| 5615 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x32.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 5616 | "src/f32-dwconv/gen/up8x3-minmax-avx-acc2.c", |
| 5617 | "src/f32-dwconv/gen/up8x3-minmax-avx.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5618 | "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c", |
| 5619 | "src/f32-dwconv/gen/up8x4-minmax-avx.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5620 | "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c", |
| 5621 | "src/f32-dwconv/gen/up8x9-minmax-avx.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5622 | "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c", |
| 5623 | "src/f32-dwconv/gen/up8x25-minmax-avx.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 5624 | "src/f32-dwconv/gen/up16x3-minmax-avx-acc2.c", |
| 5625 | "src/f32-dwconv/gen/up16x3-minmax-avx.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5626 | "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c", |
| 5627 | "src/f32-dwconv/gen/up16x4-minmax-avx.c", |
| 5628 | "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c", |
| 5629 | "src/f32-dwconv/gen/up16x9-minmax-avx.c", |
| 5630 | "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c", |
| 5631 | "src/f32-dwconv/gen/up16x25-minmax-avx.c", |
| Marat Dukhan | eb84423 | 2021-11-08 23:07:53 -0800 | [diff] [blame] | 5632 | "src/f32-f16-vcvt/gen/vcvt-avx-x8.c", |
| 5633 | "src/f32-f16-vcvt/gen/vcvt-avx-x16.c", |
| 5634 | "src/f32-f16-vcvt/gen/vcvt-avx-x24.c", |
| 5635 | "src/f32-f16-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5636 | "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5637 | "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c", |
| 5638 | "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5639 | "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5640 | "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5641 | "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5642 | "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5643 | "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c", |
| 5644 | "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c", |
| 5645 | "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c", |
| 5646 | "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c", |
| 5647 | "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c", |
| 5648 | "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c", |
| 5649 | "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c", |
| 5650 | "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c", |
| 5651 | "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c", |
| 5652 | "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c", |
| 5653 | "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5654 | "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5655 | "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c", |
| 5656 | "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5657 | "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5658 | "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5659 | "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 5660 | "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5661 | "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c", |
| 5662 | "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c", |
| Marat Dukhan | 90eca0a | 2020-03-11 00:52:23 -0700 | [diff] [blame] | 5663 | "src/f32-prelu/gen/avx-2x8.c", |
| 5664 | "src/f32-prelu/gen/avx-2x16.c", |
| Marat Dukhan | b91432c | 2021-12-14 16:52:09 -0800 | [diff] [blame] | 5665 | "src/f32-qs8-vcvt/gen/vcvt-avx-x8.c", |
| 5666 | "src/f32-qs8-vcvt/gen/vcvt-avx-x16.c", |
| 5667 | "src/f32-qs8-vcvt/gen/vcvt-avx-x24.c", |
| 5668 | "src/f32-qs8-vcvt/gen/vcvt-avx-x32.c", |
| 5669 | "src/f32-qu8-vcvt/gen/vcvt-avx-x8.c", |
| 5670 | "src/f32-qu8-vcvt/gen/vcvt-avx-x16.c", |
| 5671 | "src/f32-qu8-vcvt/gen/vcvt-avx-x24.c", |
| 5672 | "src/f32-qu8-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5673 | "src/f32-rmax/avx.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 5674 | "src/f32-vbinary/gen/vadd-minmax-avx-x8.c", |
| 5675 | "src/f32-vbinary/gen/vadd-minmax-avx-x16.c", |
| 5676 | "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c", |
| 5677 | "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c", |
| 5678 | "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c", |
| 5679 | "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c", |
| 5680 | "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c", |
| 5681 | "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c", |
| Marat Dukhan | 9a88efe | 2019-12-10 15:54:24 -0800 | [diff] [blame] | 5682 | "src/f32-vbinary/gen/vmax-avx-x8.c", |
| 5683 | "src/f32-vbinary/gen/vmax-avx-x16.c", |
| 5684 | "src/f32-vbinary/gen/vmaxc-avx-x8.c", |
| 5685 | "src/f32-vbinary/gen/vmaxc-avx-x16.c", |
| 5686 | "src/f32-vbinary/gen/vmin-avx-x8.c", |
| 5687 | "src/f32-vbinary/gen/vmin-avx-x16.c", |
| 5688 | "src/f32-vbinary/gen/vminc-avx-x8.c", |
| 5689 | "src/f32-vbinary/gen/vminc-avx-x16.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 5690 | "src/f32-vbinary/gen/vmul-minmax-avx-x8.c", |
| 5691 | "src/f32-vbinary/gen/vmul-minmax-avx-x16.c", |
| 5692 | "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c", |
| 5693 | "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c", |
| 5694 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c", |
| 5695 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c", |
| 5696 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c", |
| 5697 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 5698 | "src/f32-vbinary/gen/vsqrdiff-avx-x8.c", |
| 5699 | "src/f32-vbinary/gen/vsqrdiff-avx-x16.c", |
| 5700 | "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c", |
| 5701 | "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 5702 | "src/f32-vbinary/gen/vsub-minmax-avx-x8.c", |
| 5703 | "src/f32-vbinary/gen/vsub-minmax-avx-x16.c", |
| 5704 | "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c", |
| 5705 | "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 5706 | "src/f32-vclamp/gen/vclamp-avx-x8.c", |
| 5707 | "src/f32-vclamp/gen/vclamp-avx-x16.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5708 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c", |
| 5709 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c", |
| 5710 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c", |
| 5711 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c", |
| 5712 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c", |
| 5713 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c", |
| 5714 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c", |
| 5715 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c", |
| 5716 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c", |
| 5717 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c", |
| 5718 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c", |
| 5719 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c", |
| 5720 | "src/f32-velu/gen/velu-avx-rr2-p6-x8.c", |
| 5721 | "src/f32-velu/gen/velu-avx-rr2-p6-x16.c", |
| 5722 | "src/f32-velu/gen/velu-avx-rr2-p6-x24.c", |
| 5723 | "src/f32-velu/gen/velu-avx-rr2-p6-x32.c", |
| 5724 | "src/f32-velu/gen/velu-avx-rr2-p6-x40.c", |
| 5725 | "src/f32-velu/gen/velu-avx-rr2-p6-x48.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 5726 | "src/f32-vhswish/gen/vhswish-avx-x8.c", |
| 5727 | "src/f32-vhswish/gen/vhswish-avx-x16.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 5728 | "src/f32-vlrelu/gen/vlrelu-avx-x8.c", |
| 5729 | "src/f32-vlrelu/gen/vlrelu-avx-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 5730 | "src/f32-vrelu/gen/vrelu-avx-x8.c", |
| 5731 | "src/f32-vrelu/gen/vrelu-avx-x16.c", |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 5732 | "src/f32-vrnd/gen/vrndd-avx-x8.c", |
| 5733 | "src/f32-vrnd/gen/vrndd-avx-x16.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 5734 | "src/f32-vrnd/gen/vrndne-avx-x8.c", |
| 5735 | "src/f32-vrnd/gen/vrndne-avx-x16.c", |
| 5736 | "src/f32-vrnd/gen/vrndu-avx-x8.c", |
| 5737 | "src/f32-vrnd/gen/vrndu-avx-x16.c", |
| 5738 | "src/f32-vrnd/gen/vrndz-avx-x8.c", |
| 5739 | "src/f32-vrnd/gen/vrndz-avx-x16.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 5740 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c", |
| 5741 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c", |
| 5742 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c", |
| 5743 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c", |
| 5744 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c", |
| 5745 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c", |
| 5746 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c", |
| 5747 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c", |
| 5748 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c", |
| 5749 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c", |
| 5750 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c", |
| 5751 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c", |
| 5752 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c", |
| 5753 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c", |
| 5754 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c", |
| 5755 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c", |
| 5756 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c", |
| 5757 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c", |
| 5758 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c", |
| 5759 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 5760 | "src/f32-vsqrt/gen/avx-sqrt-x8.c", |
| 5761 | "src/f32-vsqrt/gen/avx-sqrt-x16.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 5762 | "src/f32-vunary/gen/vabs-avx-x8.c", |
| 5763 | "src/f32-vunary/gen/vabs-avx-x16.c", |
| 5764 | "src/f32-vunary/gen/vneg-avx-x8.c", |
| 5765 | "src/f32-vunary/gen/vneg-avx-x16.c", |
| 5766 | "src/f32-vunary/gen/vsqr-avx-x8.c", |
| 5767 | "src/f32-vunary/gen/vsqr-avx-x16.c", |
| Frank Barchard | 4a35204 | 2021-04-13 15:52:08 -0700 | [diff] [blame] | 5768 | "src/math/exp-avx-rr2-p5.c", |
| 5769 | "src/math/expm1minus-avx-rr2-lut4-p4-perm.c", |
| 5770 | "src/math/expm1minus-avx-rr2-lut16-p3.c", |
| 5771 | "src/math/expm1minus-avx-rr2-p6.c", |
| 5772 | "src/math/sigmoid-avx-rr2-lut64-p2-div.c", |
| 5773 | "src/math/sigmoid-avx-rr2-p5-div.c", |
| 5774 | "src/math/sigmoid-avx-rr2-p5-nr1.c", |
| 5775 | "src/math/sigmoid-avx-rr2-p5-nr2.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5776 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5777 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5778 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5779 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5780 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5781 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5782 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5783 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5784 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5785 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5786 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 5787 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| 5788 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c", |
| 5789 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c", |
| 5790 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c", |
| 5791 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5792 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5793 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5794 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5795 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5796 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5797 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5798 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5799 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5800 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5801 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5802 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5803 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5804 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5805 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5806 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5807 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5808 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5809 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5810 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5811 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5812 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5813 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5814 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5815 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5816 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5817 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 5818 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5819 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5820 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5821 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 5822 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5823 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5824 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5825 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5826 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5827 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5828 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 5829 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 5830 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5831 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5832 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c", |
| 5833 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5834 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c", |
| 5835 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | cd4089f | 2021-12-14 23:53:33 -0800 | [diff] [blame] | 5836 | "src/qs8-f32-vcvt/gen/vcvt-avx-x8.c", |
| 5837 | "src/qs8-f32-vcvt/gen/vcvt-avx-x16.c", |
| 5838 | "src/qs8-f32-vcvt/gen/vcvt-avx-x24.c", |
| 5839 | "src/qs8-f32-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5840 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5841 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5842 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5843 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5844 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5845 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5846 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5847 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5848 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5849 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5850 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5851 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5852 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5853 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5854 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5855 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5856 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5857 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5858 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5859 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 5860 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-avx.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5861 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5862 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5863 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5864 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5865 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5866 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5867 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5868 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5869 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5870 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5871 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5872 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 5873 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 5874 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | e9c4b96 | 2021-04-02 16:56:55 -0700 | [diff] [blame] | 5875 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c", |
| 5876 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c", |
| 5877 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c", |
| 5878 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c", |
| 5879 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5880 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c", |
| 5881 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c", |
| 5882 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c", |
| 5883 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c", |
| 5884 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c", |
| 5885 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c", |
| 5886 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c", |
| 5887 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| 5888 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c", |
| 5889 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c", |
| 5890 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5891 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5892 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5893 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5894 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5895 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5896 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5897 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5898 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5899 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5900 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | f0f2881 | 2021-07-08 22:34:20 -0700 | [diff] [blame] | 5901 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 5902 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| Marat Dukhan | cd4089f | 2021-12-14 23:53:33 -0800 | [diff] [blame] | 5903 | "src/qu8-f32-vcvt/gen/vcvt-avx-x8.c", |
| 5904 | "src/qu8-f32-vcvt/gen/vcvt-avx-x16.c", |
| 5905 | "src/qu8-f32-vcvt/gen/vcvt-avx-x24.c", |
| 5906 | "src/qu8-f32-vcvt/gen/vcvt-avx-x32.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 5907 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 5908 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 5909 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 5910 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5911 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 5912 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 5913 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 5914 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5915 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 5916 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 5917 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 5918 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 5919 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 5920 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| 5921 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 5922 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 5923 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 5924 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5925 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 5926 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 5927 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 5928 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5929 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 5930 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 5931 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 5932 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 5933 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 5934 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 5935 | "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c", |
| 5936 | "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c", |
| 5937 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5938 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c", |
| 5939 | "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c", |
| 5940 | "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c", |
| 5941 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| 5942 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 5943 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5944 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5945 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5946 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| Marat Dukhan | 7c478e3 | 2021-09-10 09:48:13 -0700 | [diff] [blame] | 5947 | "src/x8-lut/gen/lut-avx-x16.c", |
| 5948 | "src/x8-lut/gen/lut-avx-x32.c", |
| 5949 | "src/x8-lut/gen/lut-avx-x48.c", |
| 5950 | "src/x8-lut/gen/lut-avx-x64.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 5951 | ] |
| 5952 | |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 5953 | PROD_F16C_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 5954 | "src/f16-f32-vcvt/gen/vcvt-f16c-x16.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 5955 | "src/f32-f16-vcvt/gen/vcvt-f16c-x16.c", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 5956 | ] |
| 5957 | |
| 5958 | ALL_F16C_MICROKERNEL_SRCS = [ |
| Frank Barchard | 969e61f | 2022-01-10 11:40:53 -0800 | [diff] [blame] | 5959 | "src/f16-f32-vcvt/gen/vcvt-f16c-x8.c", |
| 5960 | "src/f16-f32-vcvt/gen/vcvt-f16c-x16.c", |
| Marat Dukhan | bd7f9a4 | 2022-01-10 20:04:36 -0800 | [diff] [blame] | 5961 | "src/f16-prelu/gen/f16c-2x8.c", |
| 5962 | "src/f16-prelu/gen/f16c-2x16.c", |
| Marat Dukhan | d454545 | 2022-01-10 16:13:11 -0800 | [diff] [blame] | 5963 | "src/f16-vbinary/gen/vadd-minmax-f16c-x8.c", |
| 5964 | "src/f16-vbinary/gen/vadd-minmax-f16c-x16.c", |
| 5965 | "src/f16-vbinary/gen/vaddc-minmax-f16c-x8.c", |
| 5966 | "src/f16-vbinary/gen/vaddc-minmax-f16c-x16.c", |
| 5967 | "src/f16-vbinary/gen/vdiv-minmax-f16c-x8.c", |
| 5968 | "src/f16-vbinary/gen/vdiv-minmax-f16c-x16.c", |
| 5969 | "src/f16-vbinary/gen/vdivc-minmax-f16c-x8.c", |
| 5970 | "src/f16-vbinary/gen/vdivc-minmax-f16c-x16.c", |
| 5971 | "src/f16-vbinary/gen/vmax-f16c-x8.c", |
| 5972 | "src/f16-vbinary/gen/vmax-f16c-x16.c", |
| 5973 | "src/f16-vbinary/gen/vmaxc-f16c-x8.c", |
| 5974 | "src/f16-vbinary/gen/vmaxc-f16c-x16.c", |
| 5975 | "src/f16-vbinary/gen/vmin-f16c-x8.c", |
| 5976 | "src/f16-vbinary/gen/vmin-f16c-x16.c", |
| 5977 | "src/f16-vbinary/gen/vminc-f16c-x8.c", |
| 5978 | "src/f16-vbinary/gen/vminc-f16c-x16.c", |
| 5979 | "src/f16-vbinary/gen/vmul-minmax-f16c-x8.c", |
| 5980 | "src/f16-vbinary/gen/vmul-minmax-f16c-x16.c", |
| 5981 | "src/f16-vbinary/gen/vmulc-minmax-f16c-x8.c", |
| 5982 | "src/f16-vbinary/gen/vmulc-minmax-f16c-x16.c", |
| 5983 | "src/f16-vbinary/gen/vrdivc-minmax-f16c-x8.c", |
| 5984 | "src/f16-vbinary/gen/vrdivc-minmax-f16c-x16.c", |
| 5985 | "src/f16-vbinary/gen/vrsubc-minmax-f16c-x8.c", |
| 5986 | "src/f16-vbinary/gen/vrsubc-minmax-f16c-x16.c", |
| 5987 | "src/f16-vbinary/gen/vsub-minmax-f16c-x8.c", |
| 5988 | "src/f16-vbinary/gen/vsub-minmax-f16c-x16.c", |
| 5989 | "src/f16-vbinary/gen/vsubc-minmax-f16c-x8.c", |
| 5990 | "src/f16-vbinary/gen/vsubc-minmax-f16c-x16.c", |
| Marat Dukhan | 645af97 | 2022-01-09 22:50:27 -0800 | [diff] [blame] | 5991 | "src/f16-vclamp/gen/vclamp-f16c-x8.c", |
| 5992 | "src/f16-vclamp/gen/vclamp-f16c-x16.c", |
| Marat Dukhan | 751f622 | 2022-01-09 23:10:04 -0800 | [diff] [blame] | 5993 | "src/f16-vhswish/gen/vhswish-f16c-x8.c", |
| 5994 | "src/f16-vhswish/gen/vhswish-f16c-x16.c", |
| Marat Dukhan | d77f77d | 2021-10-24 15:39:59 -0700 | [diff] [blame] | 5995 | "src/f32-f16-vcvt/gen/vcvt-f16c-x8.c", |
| 5996 | "src/f32-f16-vcvt/gen/vcvt-f16c-x16.c", |
| Marat Dukhan | 3ed866b | 2021-09-29 08:23:33 -0700 | [diff] [blame] | 5997 | "src/math/cvt-f16-f32-f16c.c", |
| Marat Dukhan | 582e184 | 2021-10-25 17:18:36 -0700 | [diff] [blame] | 5998 | "src/math/cvt-f32-f16-f16c.c", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 5999 | ] |
| 6000 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6001 | PROD_XOP_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 2848059 | 2021-07-27 23:52:27 -0700 | [diff] [blame] | 6002 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| 6003 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6004 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6005 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6006 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6007 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6008 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| 6009 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| 6010 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6011 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6012 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6013 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6014 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 6015 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 6016 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 6017 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 6018 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6019 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6020 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6021 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6022 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 6023 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 6024 | ] |
| 6025 | |
| 6026 | ALL_XOP_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 6027 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 6028 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 6029 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 6030 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 6031 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 6032 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 6033 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 6034 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 6035 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c", |
| 6036 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6037 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6038 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6039 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6040 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6041 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6042 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6043 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6044 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6045 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6046 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6047 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6048 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6049 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6050 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6051 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6052 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6053 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6054 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6055 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6056 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6057 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6058 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6059 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6060 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6061 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6062 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | fc188ed | 2021-06-03 12:21:22 -0700 | [diff] [blame] | 6063 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6064 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 6065 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c", |
| Marat Dukhan | caf4831 | 2021-06-01 20:20:58 -0700 | [diff] [blame] | 6066 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 6067 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6068 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 6069 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6070 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | 0966856 | 2021-07-26 16:52:20 -0700 | [diff] [blame] | 6071 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6072 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6073 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6074 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6075 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6076 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 6077 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6078 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6079 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 6080 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6081 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6082 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 6083 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6084 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6085 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 6086 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6087 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6088 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 6089 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6090 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6091 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 6092 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6093 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6094 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 0ff7989 | 2021-08-06 16:05:06 -0700 | [diff] [blame] | 6095 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-xop.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6096 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6097 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6098 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6099 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6100 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6101 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6102 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6103 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6104 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6105 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6106 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6107 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 6108 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 6109 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | bb9225e | 2020-09-06 22:40:56 -0700 | [diff] [blame] | 6110 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 6111 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c", |
| 6112 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c", |
| 6113 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c", |
| 6114 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 6115 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c", |
| 6116 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c", |
| 6117 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c", |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 6118 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| 6119 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| 6120 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 6121 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 6122 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 6123 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 6124 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6125 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 6126 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 6127 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 6128 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6129 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 6130 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 6131 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 6132 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 6133 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 6134 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 6135 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| 6136 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 6137 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 6138 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6139 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 6140 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 6141 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 6142 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6143 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 6144 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 6145 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 6146 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 6147 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 6148 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 6149 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 6150 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 6151 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c", |
| 6152 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 6153 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c", |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 6154 | ] |
| 6155 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6156 | PROD_FMA3_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6157 | "src/f32-dwconv/gen/up8x25-minmax-fma3.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 6158 | "src/f32-dwconv/gen/up16x3-minmax-fma3.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6159 | "src/f32-dwconv/gen/up16x4-minmax-fma3.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6160 | "src/f32-dwconv/gen/up16x9-minmax-fma3.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6161 | "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c", |
| 6162 | "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 6163 | "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 6164 | "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c", |
| 6165 | "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c", |
| 6166 | "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 6167 | "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 6168 | "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c", |
| 6169 | "src/f32-vhswish/gen/vhswish-fma3-x16.c", |
| 6170 | ] |
| 6171 | |
| 6172 | ALL_FMA3_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 645af97 | 2022-01-09 22:50:27 -0800 | [diff] [blame] | 6173 | "src/f16-dwconv/gen/up8x4-minmax-fma3-acc2.c", |
| 6174 | "src/f16-dwconv/gen/up8x4-minmax-fma3.c", |
| 6175 | "src/f16-dwconv/gen/up8x9-minmax-fma3-acc2.c", |
| 6176 | "src/f16-dwconv/gen/up8x9-minmax-fma3.c", |
| 6177 | "src/f16-dwconv/gen/up8x25-minmax-fma3-acc2.c", |
| 6178 | "src/f16-dwconv/gen/up8x25-minmax-fma3.c", |
| 6179 | "src/f16-dwconv/gen/up16x4-minmax-fma3-acc2.c", |
| 6180 | "src/f16-dwconv/gen/up16x4-minmax-fma3.c", |
| 6181 | "src/f16-dwconv/gen/up16x9-minmax-fma3-acc2.c", |
| 6182 | "src/f16-dwconv/gen/up16x9-minmax-fma3.c", |
| 6183 | "src/f16-dwconv/gen/up16x25-minmax-fma3-acc2.c", |
| 6184 | "src/f16-dwconv/gen/up16x25-minmax-fma3.c", |
| 6185 | "src/f16-dwconv/gen/up32x4-minmax-fma3-acc2.c", |
| 6186 | "src/f16-dwconv/gen/up32x4-minmax-fma3.c", |
| 6187 | "src/f16-dwconv/gen/up32x9-minmax-fma3-acc2.c", |
| 6188 | "src/f16-dwconv/gen/up32x9-minmax-fma3.c", |
| 6189 | "src/f16-dwconv/gen/up32x25-minmax-fma3-acc2.c", |
| 6190 | "src/f16-dwconv/gen/up32x25-minmax-fma3.c", |
| 6191 | "src/f16-vmulcaddc/gen/c8-minmax-fma3-2x.c", |
| 6192 | "src/f16-vmulcaddc/gen/c16-minmax-fma3-2x.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 6193 | "src/f32-dwconv/gen/up8x3-minmax-fma3-acc2.c", |
| 6194 | "src/f32-dwconv/gen/up8x3-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6195 | "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c", |
| 6196 | "src/f32-dwconv/gen/up8x4-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6197 | "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c", |
| 6198 | "src/f32-dwconv/gen/up8x9-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6199 | "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c", |
| 6200 | "src/f32-dwconv/gen/up8x25-minmax-fma3.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 6201 | "src/f32-dwconv/gen/up16x3-minmax-fma3-acc2.c", |
| 6202 | "src/f32-dwconv/gen/up16x3-minmax-fma3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6203 | "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c", |
| 6204 | "src/f32-dwconv/gen/up16x4-minmax-fma3.c", |
| 6205 | "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c", |
| 6206 | "src/f32-dwconv/gen/up16x9-minmax-fma3.c", |
| 6207 | "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c", |
| 6208 | "src/f32-dwconv/gen/up16x25-minmax-fma3.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6209 | "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6210 | "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c", |
| 6211 | "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c", |
| 6212 | "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c", |
| 6213 | "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6214 | "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6215 | "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c", |
| 6216 | "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6217 | "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6218 | "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c", |
| 6219 | "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6220 | "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c", |
| 6221 | "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c", |
| 6222 | "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6223 | "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c", |
| 6224 | "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c", |
| 6225 | "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 6226 | "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c", |
| 6227 | "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c", |
| 6228 | "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c", |
| 6229 | "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c", |
| 6230 | "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 6231 | "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c", |
| 6232 | "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c", |
| 6233 | "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c", |
| 6234 | "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c", |
| 6235 | "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c", |
| 6236 | "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6237 | "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6238 | "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c", |
| 6239 | "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 6240 | "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c", |
| 6241 | "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6242 | "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6243 | "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c", |
| 6244 | "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6245 | "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6246 | "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c", |
| 6247 | "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6248 | "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c", |
| 6249 | "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c", |
| 6250 | "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 6251 | "src/f32-vhswish/gen/vhswish-fma3-x8.c", |
| 6252 | "src/f32-vhswish/gen/vhswish-fma3-x16.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 6253 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c", |
| 6254 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c", |
| 6255 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c", |
| 6256 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c", |
| 6257 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c", |
| 6258 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c", |
| 6259 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c", |
| 6260 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 6261 | "src/math/sqrt-fma3-nr1fma.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 6262 | "src/math/sqrt-fma3-nr1fma1adj.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6263 | "src/math/sqrt-fma3-nr2fma.c", |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 6264 | ] |
| 6265 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6266 | PROD_AVX2_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 0d399ca | 2021-12-14 19:25:50 -0800 | [diff] [blame] | 6267 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c", |
| 6268 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6269 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c", |
| 6270 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c", |
| 6271 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6272 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6273 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6274 | "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6275 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6276 | "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6277 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6278 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 7b5f779 | 2021-12-15 00:29:39 -0800 | [diff] [blame] | 6279 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6280 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6281 | "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6282 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6283 | "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6284 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6285 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6286 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6287 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 7b5f779 | 2021-12-15 00:29:39 -0800 | [diff] [blame] | 6288 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6289 | "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6290 | "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6291 | "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6292 | "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6293 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6294 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| Marat Dukhan | 98e054b | 2021-09-13 09:43:50 -0700 | [diff] [blame] | 6295 | "src/x8-lut/gen/lut-avx2-x128.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6296 | ] |
| 6297 | |
| 6298 | ALL_AVX2_MICROKERNEL_SRCS = [ |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 6299 | "src/f16-gemm/gen/1x8-minmax-avx2-broadcast.c", |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 6300 | "src/f16-gemm/gen/1x16-minmax-avx2-broadcast.c", |
| 6301 | "src/f16-gemm/gen/3x16-minmax-avx2-broadcast.c", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 6302 | "src/f16-gemm/gen/4x8-minmax-avx2-broadcast.c", |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 6303 | "src/f16-gemm/gen/4x16-minmax-avx2-broadcast.c", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 6304 | "src/f16-gemm/gen/5x8-minmax-avx2-broadcast.c", |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 6305 | "src/f16-gemm/gen/5x16-minmax-avx2-broadcast.c", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 6306 | "src/f16-gemm/gen/6x8-minmax-avx2-broadcast.c", |
| 6307 | "src/f16-gemm/gen/7x8-minmax-avx2-broadcast.c", |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 6308 | "src/f16-igemm/gen/1x8-minmax-avx2-broadcast.c", |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 6309 | "src/f16-igemm/gen/1x16-minmax-avx2-broadcast.c", |
| 6310 | "src/f16-igemm/gen/3x16-minmax-avx2-broadcast.c", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 6311 | "src/f16-igemm/gen/4x8-minmax-avx2-broadcast.c", |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 6312 | "src/f16-igemm/gen/4x16-minmax-avx2-broadcast.c", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 6313 | "src/f16-igemm/gen/5x8-minmax-avx2-broadcast.c", |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 6314 | "src/f16-igemm/gen/5x16-minmax-avx2-broadcast.c", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 6315 | "src/f16-igemm/gen/6x8-minmax-avx2-broadcast.c", |
| 6316 | "src/f16-igemm/gen/7x8-minmax-avx2-broadcast.c", |
| Marat Dukhan | 0d399ca | 2021-12-14 19:25:50 -0800 | [diff] [blame] | 6317 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x16.c", |
| 6318 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x32.c", |
| 6319 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x48.c", |
| 6320 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c", |
| 6321 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x16.c", |
| 6322 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x32.c", |
| 6323 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x48.c", |
| 6324 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6325 | "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c", |
| 6326 | "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6327 | "src/f32-raddexpminusmax/gen/avx2-p5-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6328 | "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6329 | "src/f32-raddexpminusmax/gen/avx2-p5-x72.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6330 | "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c", |
| 6331 | "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6332 | "src/f32-raddexpminusmax/gen/avx2-p5-x80.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6333 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c", |
| 6334 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c", |
| 6335 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6336 | "src/f32-raddexpminusmax/gen/avx2-p5-x96.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6337 | "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c", |
| 6338 | "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6339 | "src/f32-raddextexp/gen/avx2-p5-x64.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6340 | "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6341 | "src/f32-raddextexp/gen/avx2-p5-x72.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6342 | "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c", |
| 6343 | "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6344 | "src/f32-raddextexp/gen/avx2-p5-x80.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6345 | "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c", |
| 6346 | "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c", |
| 6347 | "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6348 | "src/f32-raddextexp/gen/avx2-p5-x96.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 6349 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64-acc2.c", |
| 6350 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64-acc4.c", |
| 6351 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64.c", |
| 6352 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x72-acc3.c", |
| 6353 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x72.c", |
| 6354 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80-acc2.c", |
| 6355 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80-acc5.c", |
| 6356 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80.c", |
| 6357 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc2.c", |
| 6358 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc3.c", |
| 6359 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc6.c", |
| 6360 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6361 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c", |
| 6362 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c", |
| 6363 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c", |
| 6364 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c", |
| 6365 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c", |
| 6366 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c", |
| 6367 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c", |
| 6368 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c", |
| 6369 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c", |
| 6370 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c", |
| 6371 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c", |
| 6372 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c", |
| 6373 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c", |
| 6374 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c", |
| 6375 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c", |
| 6376 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c", |
| 6377 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c", |
| 6378 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c", |
| 6379 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c", |
| 6380 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c", |
| 6381 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c", |
| 6382 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c", |
| 6383 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c", |
| 6384 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c", |
| 6385 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c", |
| 6386 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c", |
| 6387 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c", |
| 6388 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c", |
| 6389 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c", |
| 6390 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c", |
| 6391 | "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c", |
| 6392 | "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c", |
| 6393 | "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c", |
| 6394 | "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c", |
| 6395 | "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c", |
| 6396 | "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c", |
| 6397 | "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c", |
| 6398 | "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c", |
| 6399 | "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c", |
| 6400 | "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6401 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c", |
| 6402 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c", |
| 6403 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c", |
| 6404 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c", |
| 6405 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c", |
| 6406 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c", |
| 6407 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c", |
| 6408 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c", |
| 6409 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c", |
| 6410 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c", |
| 6411 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c", |
| 6412 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c", |
| 6413 | "src/f32-vscaleextexp/gen/avx2-p5-x8.c", |
| 6414 | "src/f32-vscaleextexp/gen/avx2-p5-x16.c", |
| 6415 | "src/f32-vscaleextexp/gen/avx2-p5-x24.c", |
| 6416 | "src/f32-vscaleextexp/gen/avx2-p5-x32.c", |
| 6417 | "src/f32-vscaleextexp/gen/avx2-p5-x40.c", |
| 6418 | "src/f32-vscaleextexp/gen/avx2-p5-x48.c", |
| 6419 | "src/f32-vscaleextexp/gen/avx2-p5-x56.c", |
| 6420 | "src/f32-vscaleextexp/gen/avx2-p5-x64.c", |
| 6421 | "src/f32-vscaleextexp/gen/avx2-p5-x72.c", |
| 6422 | "src/f32-vscaleextexp/gen/avx2-p5-x80.c", |
| 6423 | "src/f32-vscaleextexp/gen/avx2-p5-x88.c", |
| 6424 | "src/f32-vscaleextexp/gen/avx2-p5-x96.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 6425 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c", |
| 6426 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c", |
| 6427 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c", |
| 6428 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c", |
| 6429 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c", |
| 6430 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c", |
| 6431 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c", |
| 6432 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c", |
| 6433 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c", |
| 6434 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c", |
| 6435 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c", |
| 6436 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c", |
| 6437 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c", |
| 6438 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c", |
| 6439 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c", |
| 6440 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c", |
| 6441 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c", |
| 6442 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c", |
| 6443 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c", |
| 6444 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c", |
| 6445 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c", |
| 6446 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c", |
| 6447 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c", |
| 6448 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c", |
| 6449 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c", |
| 6450 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c", |
| 6451 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c", |
| 6452 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c", |
| 6453 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c", |
| 6454 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 6455 | "src/math/exp-avx2-rr2-lut8-p3-perm.c", |
| 6456 | "src/math/exp-avx2-rr2-lut8-p4-perm.c", |
| 6457 | "src/math/exp-avx2-rr2-p5.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 6458 | "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c", |
| 6459 | "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c", |
| 6460 | "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c", |
| 6461 | "src/math/expm1minus-avx2-rr1-p6.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 6462 | "src/math/expminus-avx2-rr1-p5.c", |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 6463 | "src/math/expminus-avx2-rr2-p5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6464 | "src/math/extexp-avx2-p5.c", |
| 6465 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c", |
| 6466 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c", |
| 6467 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c", |
| 6468 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c", |
| 6469 | "src/math/sigmoid-avx2-rr1-p5-div.c", |
| 6470 | "src/math/sigmoid-avx2-rr1-p5-nr1fma.c", |
| 6471 | "src/math/sigmoid-avx2-rr1-p5-nr2fma.c", |
| 6472 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c", |
| 6473 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c", |
| 6474 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c", |
| 6475 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c", |
| 6476 | "src/math/sigmoid-avx2-rr2-p5-div.c", |
| 6477 | "src/math/sigmoid-avx2-rr2-p5-nr1fma.c", |
| 6478 | "src/math/sigmoid-avx2-rr2-p5-nr2fma.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 6479 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| 6480 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6481 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6482 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6483 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 6484 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6485 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6486 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6487 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 6488 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6489 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c", |
| 6490 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6491 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6492 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6493 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 6494 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6495 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6496 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6497 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 6498 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 6499 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6500 | "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c", |
| 6501 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6502 | "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c", |
| 6503 | "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6504 | "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | e06c813 | 2021-06-03 08:59:11 -0700 | [diff] [blame] | 6505 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6506 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6507 | "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6508 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6509 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6510 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6511 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6512 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6513 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6514 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6515 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6516 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6517 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6518 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6519 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6520 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6521 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6522 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6523 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 6524 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| Marat Dukhan | 881ab02 | 2021-07-28 13:49:26 -0700 | [diff] [blame] | 6525 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6526 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6527 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 7b5f779 | 2021-12-15 00:29:39 -0800 | [diff] [blame] | 6528 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x8.c", |
| 6529 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| 6530 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x24.c", |
| 6531 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x32.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6532 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 6533 | "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6534 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 6535 | "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6536 | "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 6537 | "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6538 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6539 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 6540 | "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | e6dc0b6 | 2020-09-08 23:57:14 -0700 | [diff] [blame] | 6541 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6542 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6543 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c", |
| 6544 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c", |
| 6545 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6546 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6547 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c", |
| 6548 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c", |
| Marat Dukhan | 09c312b | 2021-07-09 00:45:04 -0700 | [diff] [blame] | 6549 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| 6550 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| 6551 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6552 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6553 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| 6554 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| Marat Dukhan | 7b5f779 | 2021-12-15 00:29:39 -0800 | [diff] [blame] | 6555 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x8.c", |
| 6556 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| 6557 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x24.c", |
| 6558 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x32.c", |
| Marat Dukhan | 902ef7f | 2021-07-02 16:11:06 -0700 | [diff] [blame] | 6559 | "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6560 | "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6561 | "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6562 | "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6563 | "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6564 | "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Marat Dukhan | 3eac69c | 2021-07-21 01:42:29 -0700 | [diff] [blame] | 6565 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6566 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6567 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6568 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| Marat Dukhan | 7c478e3 | 2021-09-10 09:48:13 -0700 | [diff] [blame] | 6569 | "src/x8-lut/gen/lut-avx2-x32.c", |
| 6570 | "src/x8-lut/gen/lut-avx2-x64.c", |
| 6571 | "src/x8-lut/gen/lut-avx2-x96.c", |
| 6572 | "src/x8-lut/gen/lut-avx2-x128.c", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 6573 | ] |
| 6574 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6575 | PROD_AVX512F_MICROKERNEL_SRCS = [ |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 6576 | "src/f32-dwconv/gen/up16x3-minmax-avx512f.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6577 | "src/f32-dwconv/gen/up16x4-minmax-avx512f.c", |
| 6578 | "src/f32-dwconv/gen/up16x9-minmax-avx512f.c", |
| 6579 | "src/f32-dwconv/gen/up16x25-minmax-avx512f.c", |
| 6580 | "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6581 | "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6582 | "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6583 | "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6584 | "src/f32-prelu/gen/avx512f-2x16.c", |
| 6585 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c", |
| 6586 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c", |
| 6587 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c", |
| 6588 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c", |
| 6589 | "src/f32-vbinary/gen/vmax-avx512f-x32.c", |
| 6590 | "src/f32-vbinary/gen/vmaxc-avx512f-x32.c", |
| 6591 | "src/f32-vbinary/gen/vmin-avx512f-x32.c", |
| 6592 | "src/f32-vbinary/gen/vminc-avx512f-x32.c", |
| 6593 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c", |
| 6594 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c", |
| 6595 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c", |
| 6596 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c", |
| 6597 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c", |
| 6598 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c", |
| 6599 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c", |
| 6600 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c", |
| 6601 | "src/f32-vclamp/gen/vclamp-avx512f-x16.c", |
| 6602 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c", |
| 6603 | "src/f32-vhswish/gen/vhswish-avx512f-x16.c", |
| 6604 | "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c", |
| 6605 | "src/f32-vrnd/gen/vrndd-avx512f-x16.c", |
| 6606 | "src/f32-vrnd/gen/vrndne-avx512f-x16.c", |
| 6607 | "src/f32-vrnd/gen/vrndu-avx512f-x16.c", |
| 6608 | "src/f32-vrnd/gen/vrndz-avx512f-x16.c", |
| 6609 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c", |
| 6610 | "src/f32-vunary/gen/vabs-avx512f-x16.c", |
| 6611 | "src/f32-vunary/gen/vneg-avx512f-x16.c", |
| 6612 | "src/f32-vunary/gen/vsqr-avx512f-x16.c", |
| 6613 | ] |
| 6614 | |
| 6615 | ALL_AVX512F_MICROKERNEL_SRCS = [ |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 6616 | "src/f32-dwconv/gen/up16x3-minmax-avx512f-acc2.c", |
| 6617 | "src/f32-dwconv/gen/up16x3-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6618 | "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c", |
| 6619 | "src/f32-dwconv/gen/up16x4-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6620 | "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c", |
| 6621 | "src/f32-dwconv/gen/up16x9-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6622 | "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c", |
| 6623 | "src/f32-dwconv/gen/up16x25-minmax-avx512f.c", |
| Artsiom Ablavatski | 47a74db | 2021-11-02 13:40:24 -0700 | [diff] [blame] | 6624 | "src/f32-dwconv/gen/up32x3-minmax-avx512f-acc2.c", |
| 6625 | "src/f32-dwconv/gen/up32x3-minmax-avx512f.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6626 | "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c", |
| 6627 | "src/f32-dwconv/gen/up32x4-minmax-avx512f.c", |
| 6628 | "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c", |
| 6629 | "src/f32-dwconv/gen/up32x9-minmax-avx512f.c", |
| 6630 | "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c", |
| 6631 | "src/f32-dwconv/gen/up32x25-minmax-avx512f.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6632 | "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c", |
| 6633 | "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c", |
| 6634 | "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c", |
| 6635 | "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c", |
| 6636 | "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c", |
| 6637 | "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6638 | "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6639 | "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c", |
| 6640 | "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c", |
| 6641 | "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c", |
| 6642 | "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6643 | "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6644 | "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6645 | "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c", |
| 6646 | "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c", |
| 6647 | "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c", |
| 6648 | "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6649 | "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c", |
| Marat Dukhan | 90eca0a | 2020-03-11 00:52:23 -0700 | [diff] [blame] | 6650 | "src/f32-prelu/gen/avx512f-2x16.c", |
| 6651 | "src/f32-prelu/gen/avx512f-2x32.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6652 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c", |
| 6653 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6654 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6655 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6656 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6657 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c", |
| 6658 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6659 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6660 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c", |
| 6661 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c", |
| 6662 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6663 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6664 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c", |
| 6665 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6666 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6667 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6668 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6669 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c", |
| 6670 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6671 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6672 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c", |
| 6673 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c", |
| 6674 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6675 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c", |
| Marat Dukhan | 5999c92 | 2022-01-05 18:10:20 -0800 | [diff] [blame] | 6676 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128-acc2.c", |
| 6677 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128-acc4.c", |
| 6678 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128.c", |
| 6679 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x144-acc3.c", |
| 6680 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x144.c", |
| 6681 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160-acc2.c", |
| 6682 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160-acc5.c", |
| 6683 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160.c", |
| 6684 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc2.c", |
| 6685 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc3.c", |
| 6686 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc6.c", |
| 6687 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6688 | "src/f32-rmax/avx512f.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 6689 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c", |
| 6690 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c", |
| 6691 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c", |
| 6692 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c", |
| 6693 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c", |
| 6694 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c", |
| 6695 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c", |
| 6696 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c", |
| Marat Dukhan | 9a88efe | 2019-12-10 15:54:24 -0800 | [diff] [blame] | 6697 | "src/f32-vbinary/gen/vmax-avx512f-x16.c", |
| 6698 | "src/f32-vbinary/gen/vmax-avx512f-x32.c", |
| 6699 | "src/f32-vbinary/gen/vmaxc-avx512f-x16.c", |
| 6700 | "src/f32-vbinary/gen/vmaxc-avx512f-x32.c", |
| 6701 | "src/f32-vbinary/gen/vmin-avx512f-x16.c", |
| 6702 | "src/f32-vbinary/gen/vmin-avx512f-x32.c", |
| 6703 | "src/f32-vbinary/gen/vminc-avx512f-x16.c", |
| 6704 | "src/f32-vbinary/gen/vminc-avx512f-x32.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 6705 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c", |
| 6706 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c", |
| 6707 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c", |
| 6708 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c", |
| 6709 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c", |
| 6710 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c", |
| 6711 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c", |
| 6712 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c", |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 6713 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c", |
| 6714 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c", |
| 6715 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c", |
| 6716 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c", |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 6717 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c", |
| 6718 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c", |
| 6719 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c", |
| 6720 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 6721 | "src/f32-vclamp/gen/vclamp-avx512f-x16.c", |
| 6722 | "src/f32-vclamp/gen/vclamp-avx512f-x32.c", |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6723 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c", |
| 6724 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c", |
| 6725 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c", |
| 6726 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c", |
| 6727 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c", |
| 6728 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c", |
| 6729 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c", |
| 6730 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c", |
| 6731 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c", |
| 6732 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c", |
| 6733 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c", |
| 6734 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c", |
| 6735 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c", |
| 6736 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c", |
| 6737 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c", |
| 6738 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 6739 | "src/f32-vhswish/gen/vhswish-avx512f-x16.c", |
| 6740 | "src/f32-vhswish/gen/vhswish-avx512f-x32.c", |
| Marat Dukhan | 19dd91d | 2020-07-16 11:12:44 -0700 | [diff] [blame] | 6741 | "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c", |
| 6742 | "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 6743 | "src/f32-vrelu/gen/vrelu-avx512f-x16.c", |
| 6744 | "src/f32-vrelu/gen/vrelu-avx512f-x32.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6745 | "src/f32-vrnd/gen/vrndd-avx512f-x16.c", |
| 6746 | "src/f32-vrnd/gen/vrndd-avx512f-x32.c", |
| 6747 | "src/f32-vrnd/gen/vrndne-avx512f-x16.c", |
| 6748 | "src/f32-vrnd/gen/vrndne-avx512f-x32.c", |
| 6749 | "src/f32-vrnd/gen/vrndu-avx512f-x16.c", |
| 6750 | "src/f32-vrnd/gen/vrndu-avx512f-x32.c", |
| 6751 | "src/f32-vrnd/gen/vrndz-avx512f-x16.c", |
| 6752 | "src/f32-vrnd/gen/vrndz-avx512f-x32.c", |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 6753 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c", |
| 6754 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c", |
| 6755 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c", |
| 6756 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c", |
| 6757 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c", |
| 6758 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c", |
| 6759 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c", |
| 6760 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| 6761 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| 6762 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| 6763 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c", |
| 6764 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| 6765 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c", |
| 6766 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c", |
| 6767 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c", |
| 6768 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c", |
| 6769 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c", |
| 6770 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c", |
| 6771 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c", |
| 6772 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c", |
| 6773 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c", |
| 6774 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c", |
| 6775 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c", |
| 6776 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c", |
| Marat Dukhan | b1eec08 | 2021-05-05 23:24:55 -0700 | [diff] [blame] | 6777 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c", |
| 6778 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c", |
| 6779 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c", |
| 6780 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c", |
| 6781 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c", |
| 6782 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c", |
| 6783 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c", |
| 6784 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c", |
| 6785 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c", |
| 6786 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c", |
| 6787 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c", |
| 6788 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c", |
| 6789 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c", |
| 6790 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c", |
| 6791 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c", |
| 6792 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c", |
| 6793 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c", |
| 6794 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c", |
| 6795 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c", |
| 6796 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c", |
| 6797 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c", |
| 6798 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c", |
| 6799 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c", |
| 6800 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c", |
| 6801 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c", |
| 6802 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c", |
| 6803 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c", |
| 6804 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c", |
| 6805 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c", |
| 6806 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c", |
| 6807 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c", |
| 6808 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c", |
| 6809 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c", |
| 6810 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c", |
| 6811 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c", |
| 6812 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c", |
| 6813 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c", |
| 6814 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c", |
| 6815 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c", |
| 6816 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c", |
| 6817 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c", |
| 6818 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c", |
| 6819 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c", |
| 6820 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c", |
| 6821 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c", |
| 6822 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c", |
| 6823 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c", |
| 6824 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c", |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 6825 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c", |
| 6826 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c", |
| 6827 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c", |
| 6828 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c", |
| 6829 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c", |
| 6830 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c", |
| 6831 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c", |
| 6832 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c", |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 6833 | "src/f32-vunary/gen/vabs-avx512f-x16.c", |
| 6834 | "src/f32-vunary/gen/vabs-avx512f-x32.c", |
| 6835 | "src/f32-vunary/gen/vneg-avx512f-x16.c", |
| 6836 | "src/f32-vunary/gen/vneg-avx512f-x32.c", |
| 6837 | "src/f32-vunary/gen/vsqr-avx512f-x16.c", |
| 6838 | "src/f32-vunary/gen/vsqr-avx512f-x32.c", |
| Marat Dukhan | b7633f2 | 2020-11-20 16:34:56 -0800 | [diff] [blame] | 6839 | "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c", |
| 6840 | "src/math/exp-avx512f-rr2-lut16-p3-perm.c", |
| 6841 | "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c", |
| 6842 | "src/math/exp-avx512f-rr2-lut32-p2-perm2.c", |
| 6843 | "src/math/exp-avx512f-rr2-p5-scalef.c", |
| 6844 | "src/math/exp-avx512f-rr2-p5.c", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 6845 | "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c", |
| 6846 | "src/math/expm1minus-avx512f-rr1-p6.c", |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 6847 | "src/math/extexp-avx512f-p5.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 6848 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 6849 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6850 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 6851 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c", |
| Marat Dukhan | 6a34c5f | 2020-09-22 21:44:15 -0700 | [diff] [blame] | 6852 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6853 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 6854 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 6855 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6856 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c", |
| 6857 | "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c", |
| 6858 | "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c", |
| 6859 | "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c", |
| 6860 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c", |
| 6861 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c", |
| 6862 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c", |
| 6863 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c", |
| 6864 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c", |
| 6865 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 6866 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c", |
| Marat Dukhan | 36173d2 | 2020-10-15 17:14:26 -0700 | [diff] [blame] | 6867 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6868 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c", |
| 6869 | "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c", |
| 6870 | "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c", |
| 6871 | "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 6872 | "src/math/sqrt-avx512f-nr1fma.c", |
| Marat Dukhan | 8400076 | 2020-06-29 18:38:43 -0700 | [diff] [blame] | 6873 | "src/math/sqrt-avx512f-nr1fma1adj.c", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 6874 | "src/math/sqrt-avx512f-nr2fma.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 6875 | ] |
| 6876 | |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6877 | PROD_AVX512SKX_MICROKERNEL_SRCS = [ |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 6878 | "src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| Marat Dukhan | a0c6168 | 2021-11-10 19:23:41 -0800 | [diff] [blame] | 6879 | "src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c", |
| Marat Dukhan | 2edf863 | 2021-12-14 23:17:14 -0800 | [diff] [blame] | 6880 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c", |
| 6881 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6882 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6883 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 6884 | "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6885 | "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6886 | "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6887 | "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6888 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6889 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 98393ad | 2021-12-15 11:07:40 -0800 | [diff] [blame] | 6890 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6891 | "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6892 | "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6893 | "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6894 | "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6895 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6896 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6897 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6898 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 98393ad | 2021-12-15 11:07:40 -0800 | [diff] [blame] | 6899 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6900 | "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6901 | "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6902 | "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6903 | "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6904 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6905 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| Marat Dukhan | 98e054b | 2021-09-13 09:43:50 -0700 | [diff] [blame] | 6906 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 6907 | ] |
| 6908 | |
| 6909 | ALL_AVX512SKX_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 79c76ab | 2021-09-26 20:26:39 -0700 | [diff] [blame] | 6910 | "src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6911 | "src/f16-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| Marat Dukhan | d77f77d | 2021-10-24 15:39:59 -0700 | [diff] [blame] | 6912 | "src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6913 | "src/f32-f16-vcvt/gen/vcvt-avx512skx-x32.c", |
| Marat Dukhan | 2edf863 | 2021-12-14 23:17:14 -0800 | [diff] [blame] | 6914 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6915 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x64.c", |
| 6916 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x96.c", |
| 6917 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c", |
| 6918 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6919 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x64.c", |
| 6920 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x96.c", |
| 6921 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c", |
| Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 6922 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| 6923 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| 6924 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6925 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | c3e3f1c | 2021-06-03 09:56:16 -0700 | [diff] [blame] | 6926 | "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6927 | "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 6928 | "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 6929 | "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6930 | "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6931 | "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 6932 | "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 6933 | "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6934 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6935 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6936 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6937 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 98393ad | 2021-12-15 11:07:40 -0800 | [diff] [blame] | 6938 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6939 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6940 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x48.c", |
| 6941 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x64.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6942 | "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6943 | "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6944 | "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6945 | "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6946 | "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6947 | "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6948 | "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 6949 | "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | e76049a | 2021-07-22 14:48:59 -0700 | [diff] [blame] | 6950 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6951 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| 6952 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6953 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| Marat Dukhan | cfd606b | 2021-07-09 01:18:45 -0700 | [diff] [blame] | 6954 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| 6955 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| 6956 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6957 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| Marat Dukhan | 98393ad | 2021-12-15 11:07:40 -0800 | [diff] [blame] | 6958 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6959 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6960 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x48.c", |
| 6961 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x64.c", |
| Marat Dukhan | 3cf2e22 | 2021-07-08 11:38:45 -0700 | [diff] [blame] | 6962 | "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6963 | "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 6964 | "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 6965 | "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6966 | "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6967 | "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 6968 | "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 6969 | "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| Marat Dukhan | e76049a | 2021-07-22 14:48:59 -0700 | [diff] [blame] | 6970 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6971 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| 6972 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6973 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| Marat Dukhan | 2b3c410 | 2021-09-10 19:05:37 -0700 | [diff] [blame] | 6974 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c", |
| 6975 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x128.c", |
| 6976 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x192.c", |
| 6977 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x256.c", |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 6978 | ] |
| 6979 | |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 6980 | WASM32_ASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 6981 | "src/f32-vrelu/wasm_shr_x1.S", |
| 6982 | "src/f32-vrelu/wasm_shr_x2.S", |
| 6983 | "src/f32-vrelu/wasm_shr_x4.S", |
| Frank Barchard | bcedc08 | 2020-08-17 18:00:51 -0700 | [diff] [blame] | 6984 | ] |
| 6985 | |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 6986 | AARCH32_ASM_MICROKERNEL_SRCS = [ |
| Marat Dukhan | 32f9381 | 2020-05-17 20:31:21 -0700 | [diff] [blame] | 6987 | "src/f32-gemm/4x4-aarch32-vfp-ld64.S", |
| Marat Dukhan | 3b98f6b | 2020-05-17 10:09:22 -0700 | [diff] [blame] | 6988 | "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6989 | "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S", |
| 6990 | "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S", |
| Frank Barchard | 490febe | 2020-07-16 18:42:17 -0700 | [diff] [blame] | 6991 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6992 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S", |
| Frank Barchard | 569561d | 2020-06-17 13:11:12 -0700 | [diff] [blame] | 6993 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S", |
| Frank Barchard | 7873586 | 2022-01-04 16:47:44 -0800 | [diff] [blame] | 6994 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 6995 | "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S", |
| 6996 | "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S", |
| Frank Barchard | 490febe | 2020-07-16 18:42:17 -0700 | [diff] [blame] | 6997 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S", |
| 6998 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S", |
| 6999 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S", |
| Frank Barchard | 7873586 | 2022-01-04 16:47:44 -0800 | [diff] [blame] | 7000 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-prfm-cortex-a75.S", |
| Frank Barchard | 87fe410 | 2021-12-28 14:42:23 -0800 | [diff] [blame] | 7001 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-ld64.S", |
| 7002 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-ld64.S", |
| 7003 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-aarch32-neondot-ld64.S", |
| 7004 | "src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-ld64.S", |
| 7005 | "src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-ld64.S", |
| 7006 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-aarch32-neondot-ld64.S", |
| Frank Barchard | cccb012 | 2022-01-04 15:24:00 -0800 | [diff] [blame] | 7007 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S", |
| 7008 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S", |
| 7009 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S", |
| 7010 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S", |
| 7011 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S", |
| 7012 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7013 | ] |
| 7014 | |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 7015 | AARCH64_ASM_MICROKERNEL_SRCS = [ |
| Frank Barchard | bddfbcd | 2020-04-15 12:32:41 -0700 | [diff] [blame] | 7016 | "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7017 | "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| Frank Barchard | bddfbcd | 2020-04-15 12:32:41 -0700 | [diff] [blame] | 7018 | "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7019 | "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| Frank Barchard | bddfbcd | 2020-04-15 12:32:41 -0700 | [diff] [blame] | 7020 | "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 80fc5f4 | 2021-06-07 10:43:16 -0700 | [diff] [blame] | 7021 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S", |
| Frank Barchard | 9737461 | 2021-06-07 11:51:07 -0700 | [diff] [blame] | 7022 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 7023 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| 7024 | "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7025 | "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S", |
| 7026 | "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 7027 | "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S", |
| 7028 | "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 7029 | "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S", |
| Frank Barchard | 80fc5f4 | 2021-06-07 10:43:16 -0700 | [diff] [blame] | 7030 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S", |
| Frank Barchard | 9737461 | 2021-06-07 11:51:07 -0700 | [diff] [blame] | 7031 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S", |
| Frank Barchard | 23eb482 | 2021-06-08 15:03:41 -0700 | [diff] [blame] | 7032 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 7033 | "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7034 | "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S", |
| 7035 | "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7036 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7037 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7038 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7039 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7040 | "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7041 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| 7042 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7043 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7044 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7045 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7046 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7047 | "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7048 | "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7049 | "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7050 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| 7051 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7052 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7053 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7054 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7055 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7056 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7057 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7058 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 7059 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7060 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7061 | "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S", |
| 7062 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 7063 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7064 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 7065 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S", |
| 7066 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7067 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7068 | "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7069 | "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7070 | "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7071 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 7072 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7073 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S", |
| 7074 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 7075 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S", |
| 7076 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7077 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7078 | "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7079 | "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7080 | "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 7081 | "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7082 | "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S", |
| 7083 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 7084 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S", |
| 7085 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7086 | "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7087 | "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 7088 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | e349124 | 2021-06-11 14:04:57 -0700 | [diff] [blame] | 7089 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 79cd5f9 | 2021-06-21 17:34:59 -0700 | [diff] [blame] | 7090 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7091 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| 7092 | "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 7093 | "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| 7094 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Frank Barchard | e349124 | 2021-06-11 14:04:57 -0700 | [diff] [blame] | 7095 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S", |
| Frank Barchard | 79cd5f9 | 2021-06-21 17:34:59 -0700 | [diff] [blame] | 7096 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S", |
| Frank Barchard | 143a110 | 2021-06-15 09:15:34 -0700 | [diff] [blame] | 7097 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7098 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7099 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7100 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7101 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 7102 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 7103 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7104 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7105 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7106 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7107 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7108 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S", |
| 7109 | "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 7110 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7111 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 7112 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7113 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 7114 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 7115 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 7116 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 7117 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7118 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7119 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7120 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7121 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7122 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7123 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7124 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7125 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7126 | "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 7127 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7128 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 7129 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7130 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | f10af6c | 2021-06-30 12:42:29 -0700 | [diff] [blame] | 7131 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 7132 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 7133 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7134 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7135 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7136 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7137 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7138 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 7139 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7140 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 7141 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| Frank Barchard | 1a0b276 | 2021-06-29 18:37:59 -0700 | [diff] [blame] | 7142 | "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 7143 | "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 7144 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S", |
| 7145 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7146 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7147 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7148 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7149 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7150 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7151 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 7152 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7153 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 7154 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| 7155 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull.S", |
| 7156 | "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7157 | "src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S", |
| Frank Barchard | 914f57b | 2021-12-13 12:31:42 -0800 | [diff] [blame] | 7158 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| 7159 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 98af05c | 2021-06-30 12:15:04 -0700 | [diff] [blame] | 7160 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7161 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 98af05c | 2021-06-30 12:15:04 -0700 | [diff] [blame] | 7162 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7163 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 7164 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7165 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 7166 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7167 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 1a0b276 | 2021-06-29 18:37:59 -0700 | [diff] [blame] | 7168 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 7169 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 7170 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 7171 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 7172 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 7173 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S", |
| 7174 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| Frank Barchard | 60729d0 | 2021-07-20 12:25:09 -0700 | [diff] [blame] | 7175 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7176 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7177 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7178 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7179 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7180 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 7181 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7182 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 7183 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| 7184 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7185 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7186 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7187 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7188 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 7189 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7190 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 7191 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| 7192 | "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| Frank Barchard | e22685a | 2021-11-12 11:36:58 -0800 | [diff] [blame] | 7193 | "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S", |
| Frank Barchard | 914f57b | 2021-12-13 12:31:42 -0800 | [diff] [blame] | 7194 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| 7195 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 98af05c | 2021-06-30 12:15:04 -0700 | [diff] [blame] | 7196 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7197 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 98af05c | 2021-06-30 12:15:04 -0700 | [diff] [blame] | 7198 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7199 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 7200 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7201 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 7202 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | 0bc5801 | 2021-11-22 18:12:05 -0800 | [diff] [blame] | 7203 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Frank Barchard | 1a0b276 | 2021-06-29 18:37:59 -0700 | [diff] [blame] | 7204 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 7205 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 7206 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | 13db60f | 2021-07-20 14:34:35 -0700 | [diff] [blame] | 7207 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 7208 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| Frank Barchard | 60729d0 | 2021-07-20 12:25:09 -0700 | [diff] [blame] | 7209 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | ca4c68e | 2021-08-25 19:06:40 -0700 | [diff] [blame] | 7210 | "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| Frank Barchard | df8e604 | 2021-09-03 13:56:29 -0700 | [diff] [blame] | 7211 | "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 7212 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 7213 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S", |
| Frank Barchard | 9cdc10d | 2021-11-22 19:03:54 -0800 | [diff] [blame] | 7214 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 7215 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 7216 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S", |
| Frank Barchard | 9cdc10d | 2021-11-22 19:03:54 -0800 | [diff] [blame] | 7217 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Digant Desai | 10f9f62 | 2021-11-23 13:33:52 -0800 | [diff] [blame] | 7218 | "src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| Digant Desai | 2e2d179 | 2021-11-24 11:06:37 -0800 | [diff] [blame] | 7219 | "src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 7220 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| Frank Barchard | 0c76422 | 2021-08-24 16:13:06 -0700 | [diff] [blame] | 7221 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | ca4c68e | 2021-08-25 19:06:40 -0700 | [diff] [blame] | 7222 | "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| Frank Barchard | df8e604 | 2021-09-03 13:56:29 -0700 | [diff] [blame] | 7223 | "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 7224 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 7225 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S", |
| Frank Barchard | 9cdc10d | 2021-11-22 19:03:54 -0800 | [diff] [blame] | 7226 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| Frank Barchard | 59ed1da | 2021-08-02 11:34:59 -0700 | [diff] [blame] | 7227 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| Frank Barchard | fb3a94f | 2021-08-02 20:37:06 -0700 | [diff] [blame] | 7228 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S", |
| Frank Barchard | 9cdc10d | 2021-11-22 19:03:54 -0800 | [diff] [blame] | 7229 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| Digant Desai | 10f9f62 | 2021-11-23 13:33:52 -0800 | [diff] [blame] | 7230 | "src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| Digant Desai | 2e2d179 | 2021-11-24 11:06:37 -0800 | [diff] [blame] | 7231 | "src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| Frank Barchard | a49e41f | 2021-08-31 20:30:24 -0700 | [diff] [blame] | 7232 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| Frank Barchard | 0c76422 | 2021-08-24 16:13:06 -0700 | [diff] [blame] | 7233 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7234 | ] |
| 7235 | |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 7236 | JIT_AARCH32_SRCS = [ |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 7237 | "src/f32-gemm/4x8-aarch32-neon-cortex-a7.cc", |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 7238 | "src/f32-gemm/4x8-aarch32-neon-cortex-a53.cc", |
| 7239 | "src/f32-gemm/4x8-aarch32-neon-cortex-a55.cc", |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 7240 | "src/f32-gemm/4x8-aarch32-neon-cortex-a75.cc", |
| Zhi An Ng | 16b734c | 2022-01-06 13:54:40 -0800 | [diff] [blame] | 7241 | "src/f32-gemm/4x8-aarch32-neon-ld64.cc", |
| Frank Barchard | d5a5333 | 2022-01-10 03:44:40 -0800 | [diff] [blame] | 7242 | "src/f32-igemm/4x8-aarch32-neon-cortex-a7.cc", |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 7243 | "src/f32-igemm/4x8-aarch32-neon-cortex-a53.cc", |
| 7244 | "src/f32-igemm/4x8-aarch32-neon-cortex-a55.cc", |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 7245 | "src/f32-igemm/4x8-aarch32-neon-cortex-a75.cc", |
| Zhi An Ng | 16b734c | 2022-01-06 13:54:40 -0800 | [diff] [blame] | 7246 | "src/f32-igemm/4x8-aarch32-neon-ld64.cc", |
| 7247 | "src/qc8-gemm/4x8-fp32-aarch32-neonv8-mlal-lane-ld64.cc", |
| Zhi An Ng | ed73fb6 | 2022-01-06 10:19:18 -0800 | [diff] [blame] | 7248 | "src/qc8-gemm/4x8c4-fp32-aarch32-neondot-ld64.cc", |
| Zhi An Ng | 16b734c | 2022-01-06 13:54:40 -0800 | [diff] [blame] | 7249 | "src/qc8-igemm/4x8-fp32-aarch32-neonv8-mlal-lane-ld64.cc", |
| Zhi An Ng | ed73fb6 | 2022-01-06 10:19:18 -0800 | [diff] [blame] | 7250 | "src/qc8-igemm/4x8c4-fp32-aarch32-neondot-ld64.cc", |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 7251 | "src/qs8-gemm/4x8-rndnu-aarch32-neon-mlal-lane-ld64.cc", |
| 7252 | "src/qs8-gemm/4x8c4-rndnu-aarch32-neondot-ld64.cc", |
| 7253 | "src/qs8-igemm/4x8-rndnu-aarch32-neon-mlal-lane-ld64.cc", |
| 7254 | "src/qs8-igemm/4x8c4-rndnu-aarch32-neondot-ld64.cc", |
| 7255 | ] |
| 7256 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7257 | INTERNAL_MICROKERNEL_HDRS = [ |
| Zhi An Ng | b43b47a | 2021-12-23 16:27:22 -0800 | [diff] [blame] | 7258 | "src/xnnpack/allocator.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7259 | "src/xnnpack/argmaxpool.h", |
| 7260 | "src/xnnpack/avgpool.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7261 | "src/xnnpack/common.h", |
| 7262 | "src/xnnpack/conv.h", |
| Yury Kartynnik | e784186 | 2020-11-04 18:22:18 -0800 | [diff] [blame] | 7263 | "src/xnnpack/depthtospace.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7264 | "src/xnnpack/dwconv.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7265 | "src/xnnpack/fill.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7266 | "src/xnnpack/gavgpool.h", |
| 7267 | "src/xnnpack/gemm.h", |
| Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 7268 | "src/xnnpack/ibilinear.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7269 | "src/xnnpack/igemm.h", |
| Marat Dukhan | cfb3134 | 2019-12-05 10:42:57 -0800 | [diff] [blame] | 7270 | "src/xnnpack/intrinsics-polyfill.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7271 | "src/xnnpack/lut.h", |
| 7272 | "src/xnnpack/math.h", |
| 7273 | "src/xnnpack/maxpool.h", |
| 7274 | "src/xnnpack/packx.h", |
| 7275 | "src/xnnpack/pad.h", |
| 7276 | "src/xnnpack/params.h", |
| 7277 | "src/xnnpack/pavgpool.h", |
| 7278 | "src/xnnpack/ppmm.h", |
| 7279 | "src/xnnpack/prelu.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 7280 | "src/xnnpack/raddexpminusmax.h", |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 7281 | "src/xnnpack/raddextexp.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 7282 | "src/xnnpack/raddstoreexpminusmax.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7283 | "src/xnnpack/rmax.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7284 | "src/xnnpack/spmm.h", |
| Frank Barchard | 70e8c99 | 2021-12-16 18:35:18 -0800 | [diff] [blame] | 7285 | "src/xnnpack/transpose.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7286 | "src/xnnpack/unpool.h", |
| Marat Dukhan | 6428725 | 2021-09-07 16:20:03 -0700 | [diff] [blame] | 7287 | "src/xnnpack/vaddsub.h", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 7288 | "src/xnnpack/vbinary.h", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 7289 | "src/xnnpack/vcvt.h", |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 7290 | "src/xnnpack/vmul.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7291 | "src/xnnpack/vmulcaddc.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 7292 | "src/xnnpack/vscaleexpminusmax.h", |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 7293 | "src/xnnpack/vscaleextexp.h", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 7294 | "src/xnnpack/vunary.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7295 | "src/xnnpack/zip.h", |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7296 | ] |
| 7297 | |
| 7298 | INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7299 | "include/xnnpack.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7300 | "src/xnnpack/compute.h", |
| 7301 | "src/xnnpack/im2col.h", |
| 7302 | "src/xnnpack/indirection.h", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 7303 | "src/xnnpack/math-stubs.h", |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 7304 | "src/xnnpack/memory-planner.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7305 | "src/xnnpack/operator.h", |
| 7306 | "src/xnnpack/pack.h", |
| Marat Dukhan | eeaa7bd | 2019-10-25 17:31:25 -0700 | [diff] [blame] | 7307 | "src/xnnpack/params-init.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7308 | "src/xnnpack/requantization-stubs.h", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 7309 | "src/xnnpack/requantization.h", |
| Marat Dukhan | 1d75a54 | 2020-02-03 12:23:01 -0800 | [diff] [blame] | 7310 | "src/xnnpack/subgraph.h", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 7311 | ] |
| 7312 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7313 | ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 7314 | "src/xnnpack/math-stubs.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7315 | ] |
| 7316 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7317 | MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7318 | "include/xnnpack.h", |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 7319 | "src/xnnpack/params-init.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7320 | ] |
| 7321 | |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 7322 | MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| Frank Barchard | 35db7d0 | 2020-10-26 13:37:34 -0700 | [diff] [blame] | 7323 | "include/xnnpack.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7324 | "src/xnnpack/isa-checks.h", |
| Marat Dukhan | eeaa7bd | 2019-10-25 17:31:25 -0700 | [diff] [blame] | 7325 | "src/xnnpack/params-init.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7326 | "src/xnnpack/requantization.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7327 | ] |
| 7328 | |
| 7329 | OPERATOR_TEST_PARAMS_HDRS = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7330 | "src/xnnpack/common.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7331 | "src/xnnpack/params.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7332 | ] |
| 7333 | |
| 7334 | WEIGHTS_PACK_HDRS = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7335 | "src/xnnpack/compute.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 7336 | "src/xnnpack/operator.h", |
| 7337 | "src/xnnpack/pack.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7338 | ] |
| 7339 | |
| Marat Dukhan | c8e00eb | 2019-10-04 14:55:26 -0700 | [diff] [blame] | 7340 | LOGGING_HDRS = [ |
| 7341 | "src/xnnpack/log.h", |
| 7342 | ] |
| 7343 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7344 | xnnpack_cc_library( |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7345 | name = "tables", |
| 7346 | srcs = TABLE_SRCS, |
| 7347 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7348 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7349 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7350 | ) |
| 7351 | |
| 7352 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7353 | name = "scalar_bench_microkernels", |
| 7354 | srcs = ALL_SCALAR_MICROKERNEL_SRCS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7355 | hdrs = INTERNAL_HDRS, |
| 7356 | aarch32_copts = ["-marm"], |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7357 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7358 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7359 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7360 | ":tables", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7361 | "@FP16", |
| 7362 | "@FXdiv", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7363 | "@pthreadpool", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7364 | ], |
| 7365 | ) |
| 7366 | |
| 7367 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7368 | name = "scalar_prod_microkernels", |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 7369 | srcs = PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7370 | hdrs = INTERNAL_HDRS, |
| 7371 | aarch32_copts = ["-marm"], |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 7372 | aarch32_srcs = PROD_SCALAR_AARCH32_MICROKERNEL_SRCS, |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7373 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7374 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | a198f00 | 2022-01-04 18:45:11 -0800 | [diff] [blame] | 7375 | riscv_srcs = PROD_SCALAR_RISCV_MICROKERNEL_SRCS, |
| Marat Dukhan | e0f15ad | 2021-12-22 15:15:25 -0800 | [diff] [blame] | 7376 | wasm_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS, |
| 7377 | wasmrelaxedsimd_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS, |
| 7378 | wasmsimd_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7379 | deps = [ |
| 7380 | ":tables", |
| 7381 | "@FP16", |
| 7382 | "@FXdiv", |
| 7383 | "@pthreadpool", |
| 7384 | ], |
| 7385 | ) |
| 7386 | |
| 7387 | xnnpack_cc_library( |
| 7388 | name = "scalar_test_microkernels", |
| 7389 | srcs = ALL_SCALAR_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7390 | hdrs = INTERNAL_HDRS, |
| 7391 | aarch32_copts = ["-marm"], |
| 7392 | copts = [ |
| 7393 | "-UNDEBUG", |
| 7394 | "-DXNN_TEST_MODE=1", |
| 7395 | ], |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7396 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7397 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7398 | deps = [ |
| 7399 | ":tables", |
| 7400 | "@FP16", |
| 7401 | "@FXdiv", |
| 7402 | "@pthreadpool", |
| 7403 | ], |
| 7404 | ) |
| 7405 | |
| 7406 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7407 | name = "wasm_bench_microkernels", |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 7408 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7409 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7410 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7411 | wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 7412 | wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7413 | wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 7414 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7415 | ":tables", |
| Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 7416 | "@FP16", |
| 7417 | "@FXdiv", |
| 7418 | "@pthreadpool", |
| 7419 | ], |
| 7420 | ) |
| 7421 | |
| 7422 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7423 | name = "wasm_prod_microkernels", |
| 7424 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7425 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7426 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7427 | wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 7428 | wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7429 | wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| 7430 | deps = [ |
| 7431 | ":tables", |
| 7432 | "@FP16", |
| 7433 | "@FXdiv", |
| 7434 | "@pthreadpool", |
| 7435 | ], |
| 7436 | ) |
| 7437 | |
| 7438 | xnnpack_cc_library( |
| 7439 | name = "wasm_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7440 | hdrs = INTERNAL_HDRS, |
| 7441 | copts = [ |
| 7442 | "-UNDEBUG", |
| 7443 | "-DXNN_TEST_MODE=1", |
| 7444 | ], |
| Marat Dukhan | bd11e6a | 2022-01-04 15:37:48 -0800 | [diff] [blame] | 7445 | gcc_copts = xnnpack_gcc_std_copts() + ["-fno-math-errno"], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7446 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7447 | wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 7448 | wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7449 | wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7450 | deps = [ |
| 7451 | ":tables", |
| 7452 | "@FP16", |
| 7453 | "@FXdiv", |
| 7454 | "@pthreadpool", |
| 7455 | ], |
| 7456 | ) |
| 7457 | |
| 7458 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7459 | name = "neon_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7460 | hdrs = INTERNAL_HDRS, |
| 7461 | aarch32_copts = [ |
| 7462 | "-marm", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 7463 | "-march=armv7-a", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7464 | "-mfpu=neon", |
| 7465 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7466 | aarch32_srcs = ALL_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7467 | aarch64_srcs = ALL_NEON_MICROKERNEL_SRCS + ALL_AARCH64_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7468 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7469 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7470 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7471 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7472 | "@FP16", |
| 7473 | "@pthreadpool", |
| 7474 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7475 | ) |
| 7476 | |
| 7477 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7478 | name = "neon_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7479 | hdrs = INTERNAL_HDRS, |
| 7480 | aarch32_copts = [ |
| 7481 | "-marm", |
| 7482 | "-march=armv7-a", |
| 7483 | "-mfpu=neon", |
| 7484 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7485 | aarch32_srcs = PROD_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7486 | aarch64_srcs = PROD_NEON_MICROKERNEL_SRCS + PROD_AARCH64_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7487 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7488 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7489 | deps = [ |
| 7490 | ":tables", |
| 7491 | "@FP16", |
| 7492 | "@pthreadpool", |
| 7493 | ], |
| 7494 | ) |
| 7495 | |
| 7496 | xnnpack_cc_library( |
| 7497 | name = "neon_test_microkernels", |
| 7498 | hdrs = INTERNAL_HDRS, |
| 7499 | aarch32_copts = [ |
| 7500 | "-marm", |
| 7501 | "-march=armv7-a", |
| 7502 | "-mfpu=neon", |
| 7503 | ], |
| 7504 | aarch32_srcs = ALL_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7505 | aarch64_srcs = ALL_NEON_MICROKERNEL_SRCS + ALL_AARCH64_NEON_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7506 | copts = [ |
| 7507 | "-UNDEBUG", |
| 7508 | "-DXNN_TEST_MODE=1", |
| 7509 | ], |
| 7510 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7511 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7512 | deps = [ |
| 7513 | ":tables", |
| 7514 | "@FP16", |
| 7515 | "@pthreadpool", |
| 7516 | ], |
| 7517 | ) |
| 7518 | |
| 7519 | xnnpack_cc_library( |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 7520 | name = "neonfp16_bench_microkernels", |
| 7521 | hdrs = INTERNAL_HDRS, |
| 7522 | aarch32_copts = [ |
| 7523 | "-marm", |
| 7524 | "-march=armv7-a", |
| 7525 | "-mfpu=neon-fp16", |
| 7526 | ], |
| 7527 | aarch32_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| 7528 | aarch64_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| 7529 | apple_aarch32_copts = [ |
| 7530 | "-mcpu=cortex-a9", |
| 7531 | "-mtune=generic", |
| 7532 | ], |
| 7533 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7534 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7535 | deps = [ |
| 7536 | ":tables", |
| 7537 | "@FP16", |
| 7538 | "@pthreadpool", |
| 7539 | ], |
| 7540 | ) |
| 7541 | |
| 7542 | xnnpack_cc_library( |
| 7543 | name = "neonfp16_prod_microkernels", |
| 7544 | hdrs = INTERNAL_HDRS, |
| 7545 | aarch32_copts = [ |
| 7546 | "-marm", |
| 7547 | "-march=armv7-a", |
| 7548 | "-mfpu=neon-fp16", |
| 7549 | ], |
| 7550 | aarch32_srcs = PROD_NEONFP16_MICROKERNEL_SRCS, |
| 7551 | aarch64_srcs = PROD_NEONFP16_MICROKERNEL_SRCS, |
| 7552 | apple_aarch32_copts = [ |
| 7553 | "-mcpu=cortex-a9", |
| 7554 | "-mtune=generic", |
| 7555 | ], |
| 7556 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7557 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7558 | deps = [ |
| 7559 | ":tables", |
| 7560 | "@FP16", |
| 7561 | "@pthreadpool", |
| 7562 | ], |
| 7563 | ) |
| 7564 | |
| 7565 | xnnpack_cc_library( |
| 7566 | name = "neonfp16_test_microkernels", |
| 7567 | hdrs = INTERNAL_HDRS, |
| 7568 | aarch32_copts = [ |
| 7569 | "-marm", |
| 7570 | "-march=armv7-a", |
| 7571 | "-mfpu=neon-fp16", |
| 7572 | ], |
| 7573 | aarch32_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| 7574 | aarch64_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| 7575 | apple_aarch32_copts = [ |
| 7576 | "-mcpu=cortex-a9", |
| 7577 | "-mtune=generic", |
| 7578 | ], |
| 7579 | copts = [ |
| 7580 | "-UNDEBUG", |
| 7581 | "-DXNN_TEST_MODE=1", |
| 7582 | ], |
| 7583 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7584 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7585 | deps = [ |
| 7586 | ":tables", |
| 7587 | "@FP16", |
| 7588 | "@pthreadpool", |
| 7589 | ], |
| 7590 | ) |
| 7591 | |
| 7592 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7593 | name = "neonfma_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7594 | hdrs = INTERNAL_HDRS, |
| 7595 | aarch32_copts = [ |
| 7596 | "-marm", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 7597 | "-march=armv7-a", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7598 | "-mfpu=neon-vfpv4", |
| 7599 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7600 | aarch32_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7601 | aarch64_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 7602 | apple_aarch32_copts = [ |
| 7603 | "-mcpu=swift", |
| 7604 | "-mtune=generic", |
| 7605 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7606 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7607 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7608 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7609 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7610 | "@FP16", |
| 7611 | "@pthreadpool", |
| 7612 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7613 | ) |
| 7614 | |
| 7615 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7616 | name = "neonfma_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7617 | hdrs = INTERNAL_HDRS, |
| 7618 | aarch32_copts = [ |
| 7619 | "-marm", |
| 7620 | "-march=armv7-a", |
| 7621 | "-mfpu=neon-vfpv4", |
| 7622 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7623 | aarch32_srcs = PROD_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7624 | aarch64_srcs = PROD_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7625 | apple_aarch32_copts = [ |
| 7626 | "-mcpu=swift", |
| 7627 | "-mtune=generic", |
| 7628 | ], |
| 7629 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7630 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7631 | deps = [ |
| 7632 | ":tables", |
| 7633 | "@FP16", |
| 7634 | "@pthreadpool", |
| 7635 | ], |
| 7636 | ) |
| 7637 | |
| 7638 | xnnpack_cc_library( |
| 7639 | name = "neonfma_test_microkernels", |
| 7640 | hdrs = INTERNAL_HDRS, |
| 7641 | aarch32_copts = [ |
| 7642 | "-marm", |
| 7643 | "-march=armv7-a", |
| 7644 | "-mfpu=neon-vfpv4", |
| 7645 | ], |
| 7646 | aarch32_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | f718232 | 2021-09-09 18:53:46 -0700 | [diff] [blame] | 7647 | aarch64_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 7648 | apple_aarch32_copts = [ |
| 7649 | "-mcpu=swift", |
| 7650 | "-mtune=generic", |
| 7651 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7652 | copts = [ |
| 7653 | "-UNDEBUG", |
| 7654 | "-DXNN_TEST_MODE=1", |
| 7655 | ], |
| 7656 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7657 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7658 | deps = [ |
| 7659 | ":tables", |
| 7660 | "@FP16", |
| 7661 | "@pthreadpool", |
| 7662 | ], |
| 7663 | ) |
| 7664 | |
| 7665 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7666 | name = "neonv8_bench_microkernels", |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 7667 | hdrs = INTERNAL_HDRS, |
| 7668 | aarch32_copts = [ |
| 7669 | "-marm", |
| 7670 | "-march=armv8-a", |
| 7671 | "-mfpu=neon-fp-armv8", |
| 7672 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7673 | aarch32_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| 7674 | aarch64_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 7675 | apple_aarch32_copts = [ |
| 7676 | "-mcpu=cyclone", |
| 7677 | "-mtune=generic", |
| 7678 | ], |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 7679 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7680 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7681 | deps = [ |
| 7682 | ":tables", |
| 7683 | "@FP16", |
| 7684 | "@pthreadpool", |
| 7685 | ], |
| 7686 | ) |
| 7687 | |
| 7688 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7689 | name = "neonv8_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7690 | hdrs = INTERNAL_HDRS, |
| 7691 | aarch32_copts = [ |
| 7692 | "-marm", |
| 7693 | "-march=armv8-a", |
| 7694 | "-mfpu=neon-fp-armv8", |
| 7695 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7696 | aarch32_srcs = PROD_NEONV8_MICROKERNEL_SRCS, |
| 7697 | aarch64_srcs = PROD_NEONV8_MICROKERNEL_SRCS, |
| 7698 | apple_aarch32_copts = [ |
| 7699 | "-mcpu=cyclone", |
| 7700 | "-mtune=generic", |
| 7701 | ], |
| 7702 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7703 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7704 | deps = [ |
| 7705 | ":tables", |
| 7706 | "@FP16", |
| 7707 | "@pthreadpool", |
| 7708 | ], |
| 7709 | ) |
| 7710 | |
| 7711 | xnnpack_cc_library( |
| 7712 | name = "neonv8_test_microkernels", |
| 7713 | hdrs = INTERNAL_HDRS, |
| 7714 | aarch32_copts = [ |
| 7715 | "-marm", |
| 7716 | "-march=armv8-a", |
| 7717 | "-mfpu=neon-fp-armv8", |
| 7718 | ], |
| 7719 | aarch32_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| 7720 | aarch64_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| Marat Dukhan | bc69ed6 | 2020-06-09 21:34:56 -0700 | [diff] [blame] | 7721 | apple_aarch32_copts = [ |
| 7722 | "-mcpu=cyclone", |
| 7723 | "-mtune=generic", |
| 7724 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7725 | copts = [ |
| 7726 | "-UNDEBUG", |
| 7727 | "-DXNN_TEST_MODE=1", |
| 7728 | ], |
| 7729 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7730 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7731 | deps = [ |
| 7732 | ":tables", |
| 7733 | "@FP16", |
| 7734 | "@pthreadpool", |
| 7735 | ], |
| 7736 | ) |
| 7737 | |
| 7738 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7739 | name = "neonfp16arith_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7740 | hdrs = INTERNAL_HDRS, |
| 7741 | aarch64_copts = ["-march=armv8.2-a+fp16"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7742 | aarch64_srcs = ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7743 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7744 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7745 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7746 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7747 | "@FP16", |
| 7748 | "@pthreadpool", |
| 7749 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7750 | ) |
| 7751 | |
| 7752 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7753 | name = "neonfp16arith_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7754 | hdrs = INTERNAL_HDRS, |
| 7755 | aarch64_copts = ["-march=armv8.2-a+fp16"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7756 | aarch64_srcs = PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| 7757 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7758 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7759 | deps = [ |
| 7760 | ":tables", |
| 7761 | "@FP16", |
| 7762 | "@pthreadpool", |
| 7763 | ], |
| 7764 | ) |
| 7765 | |
| 7766 | xnnpack_cc_library( |
| 7767 | name = "neonfp16arith_test_microkernels", |
| 7768 | hdrs = INTERNAL_HDRS, |
| 7769 | aarch64_copts = ["-march=armv8.2-a+fp16"], |
| 7770 | aarch64_srcs = ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7771 | copts = [ |
| 7772 | "-UNDEBUG", |
| 7773 | "-DXNN_TEST_MODE=1", |
| 7774 | ], |
| 7775 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7776 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7777 | deps = [ |
| 7778 | ":tables", |
| 7779 | "@FP16", |
| 7780 | "@pthreadpool", |
| 7781 | ], |
| 7782 | ) |
| 7783 | |
| 7784 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7785 | name = "neondot_bench_microkernels", |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7786 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 799ac75 | 2020-08-13 16:08:03 -0700 | [diff] [blame] | 7787 | aarch32_copts = [ |
| 7788 | "-marm", |
| 7789 | "-march=armv8.2-a+dotprod", |
| 7790 | "-mfpu=neon-fp-armv8", |
| 7791 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7792 | aarch32_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7793 | aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7794 | aarch64_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7795 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7796 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7797 | deps = [ |
| 7798 | ":tables", |
| 7799 | "@FP16", |
| 7800 | "@pthreadpool", |
| 7801 | ], |
| 7802 | ) |
| 7803 | |
| 7804 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7805 | name = "neondot_prod_microkernels", |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7806 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 799ac75 | 2020-08-13 16:08:03 -0700 | [diff] [blame] | 7807 | aarch32_copts = [ |
| 7808 | "-marm", |
| 7809 | "-march=armv8.2-a+dotprod", |
| 7810 | "-mfpu=neon-fp-armv8", |
| 7811 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7812 | aarch32_srcs = PROD_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7813 | aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7814 | aarch64_srcs = PROD_NEONDOT_MICROKERNEL_SRCS, |
| 7815 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7816 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7817 | deps = [ |
| 7818 | ":tables", |
| 7819 | "@FP16", |
| 7820 | "@pthreadpool", |
| 7821 | ], |
| 7822 | ) |
| 7823 | |
| 7824 | xnnpack_cc_library( |
| 7825 | name = "neondot_test_microkernels", |
| 7826 | hdrs = INTERNAL_HDRS, |
| 7827 | aarch32_copts = [ |
| 7828 | "-marm", |
| 7829 | "-march=armv8.2-a+dotprod", |
| 7830 | "-mfpu=neon-fp-armv8", |
| 7831 | ], |
| 7832 | aarch32_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| 7833 | aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| 7834 | aarch64_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| Benoit Jacob | a964473 | 2020-08-13 12:48:55 -0700 | [diff] [blame] | 7835 | copts = [ |
| 7836 | "-UNDEBUG", |
| 7837 | "-DXNN_TEST_MODE=1", |
| 7838 | ], |
| 7839 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7840 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7841 | deps = [ |
| 7842 | ":tables", |
| 7843 | "@FP16", |
| 7844 | "@pthreadpool", |
| 7845 | ], |
| 7846 | ) |
| 7847 | |
| 7848 | xnnpack_cc_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 7849 | name = "sse2_amalgam_microkernels", |
| 7850 | hdrs = INTERNAL_HDRS, |
| 7851 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7852 | gcc_x86_copts = ["-msse2"], |
| 7853 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7854 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7855 | x86_srcs = [ |
| 7856 | "src/amalgam/sse.c", |
| 7857 | "src/amalgam/sse2.c", |
| 7858 | ], |
| 7859 | deps = [ |
| 7860 | ":tables", |
| 7861 | "@FP16", |
| 7862 | "@pthreadpool", |
| 7863 | ], |
| 7864 | ) |
| 7865 | |
| 7866 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7867 | name = "sse2_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7868 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7869 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7870 | gcc_x86_copts = ["-msse2"], |
| 7871 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7872 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7873 | x86_srcs = ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7874 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 7875 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 7876 | "@FP16", |
| 7877 | "@pthreadpool", |
| 7878 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 7879 | ) |
| 7880 | |
| 7881 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7882 | name = "sse2_prod_microkernels", |
| 7883 | hdrs = INTERNAL_HDRS, |
| 7884 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7885 | gcc_x86_copts = ["-msse2"], |
| 7886 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7887 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7888 | x86_srcs = PROD_SSE_MICROKERNEL_SRCS + PROD_SSE2_MICROKERNEL_SRCS, |
| 7889 | deps = [ |
| 7890 | ":tables", |
| 7891 | "@FP16", |
| 7892 | "@pthreadpool", |
| 7893 | ], |
| 7894 | ) |
| 7895 | |
| 7896 | xnnpack_cc_library( |
| 7897 | name = "sse2_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7898 | hdrs = INTERNAL_HDRS, |
| 7899 | copts = [ |
| 7900 | "-UNDEBUG", |
| 7901 | "-DXNN_TEST_MODE=1", |
| 7902 | ], |
| 7903 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7904 | gcc_x86_copts = ["-msse2"], |
| 7905 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7906 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7907 | x86_srcs = ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7908 | deps = [ |
| 7909 | ":tables", |
| 7910 | "@FP16", |
| 7911 | "@pthreadpool", |
| 7912 | ], |
| 7913 | ) |
| 7914 | |
| 7915 | xnnpack_cc_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 7916 | name = "ssse3_amalgam_microkernels", |
| 7917 | hdrs = INTERNAL_HDRS, |
| 7918 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7919 | gcc_x86_copts = ["-mssse3"], |
| 7920 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7921 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7922 | x86_srcs = ["src/amalgam/ssse3.c"], |
| 7923 | deps = [ |
| 7924 | ":tables", |
| 7925 | "@FP16", |
| 7926 | "@pthreadpool", |
| 7927 | ], |
| 7928 | ) |
| 7929 | |
| 7930 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7931 | name = "ssse3_bench_microkernels", |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 7932 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7933 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7934 | gcc_x86_copts = ["-mssse3"], |
| 7935 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7936 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7937 | x86_srcs = ALL_SSSE3_MICROKERNEL_SRCS, |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 7938 | deps = [ |
| 7939 | ":tables", |
| 7940 | "@FP16", |
| 7941 | "@pthreadpool", |
| 7942 | ], |
| 7943 | ) |
| 7944 | |
| 7945 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7946 | name = "ssse3_prod_microkernels", |
| 7947 | hdrs = INTERNAL_HDRS, |
| 7948 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7949 | gcc_x86_copts = ["-mssse3"], |
| 7950 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7951 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7952 | x86_srcs = PROD_SSSE3_MICROKERNEL_SRCS, |
| 7953 | deps = [ |
| 7954 | ":tables", |
| 7955 | "@FP16", |
| 7956 | "@pthreadpool", |
| 7957 | ], |
| 7958 | ) |
| 7959 | |
| 7960 | xnnpack_cc_library( |
| 7961 | name = "ssse3_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7962 | hdrs = INTERNAL_HDRS, |
| 7963 | copts = [ |
| 7964 | "-UNDEBUG", |
| 7965 | "-DXNN_TEST_MODE=1", |
| 7966 | ], |
| 7967 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7968 | gcc_x86_copts = ["-mssse3"], |
| 7969 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7970 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7971 | x86_srcs = ALL_SSSE3_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 7972 | deps = [ |
| 7973 | ":tables", |
| 7974 | "@FP16", |
| 7975 | "@pthreadpool", |
| 7976 | ], |
| 7977 | ) |
| 7978 | |
| 7979 | xnnpack_cc_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 7980 | name = "sse41_amalgam_microkernels", |
| 7981 | hdrs = INTERNAL_HDRS, |
| 7982 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7983 | gcc_x86_copts = ["-msse4.1"], |
| 7984 | msvc_copts = xnnpack_msvc_std_copts(), |
| 7985 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 7986 | x86_srcs = ["src/amalgam/sse41.c"], |
| 7987 | deps = [ |
| 7988 | ":tables", |
| 7989 | "@FP16", |
| 7990 | "@pthreadpool", |
| 7991 | ], |
| 7992 | ) |
| 7993 | |
| 7994 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 7995 | name = "sse41_bench_microkernels", |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 7996 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 7997 | gcc_copts = xnnpack_gcc_std_copts(), |
| 7998 | gcc_x86_copts = ["-msse4.1"], |
| 7999 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8000 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8001 | x86_srcs = ALL_SSE41_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8002 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 8003 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8004 | "@FP16", |
| 8005 | "@pthreadpool", |
| 8006 | ], |
| Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 8007 | ) |
| 8008 | |
| 8009 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8010 | name = "sse41_prod_microkernels", |
| 8011 | hdrs = INTERNAL_HDRS, |
| 8012 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8013 | gcc_x86_copts = ["-msse4.1"], |
| 8014 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8015 | msvc_x86_32_copts = ["/arch:SSE2"], |
| 8016 | x86_srcs = PROD_SSE41_MICROKERNEL_SRCS, |
| 8017 | deps = [ |
| 8018 | ":tables", |
| 8019 | "@FP16", |
| 8020 | "@pthreadpool", |
| 8021 | ], |
| 8022 | ) |
| 8023 | |
| 8024 | xnnpack_cc_library( |
| 8025 | name = "sse41_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8026 | hdrs = INTERNAL_HDRS, |
| 8027 | copts = [ |
| 8028 | "-UNDEBUG", |
| 8029 | "-DXNN_TEST_MODE=1", |
| 8030 | ], |
| 8031 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8032 | gcc_x86_copts = ["-msse4.1"], |
| 8033 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8034 | msvc_x86_32_copts = ["/arch:SSE2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8035 | x86_srcs = ALL_SSE41_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8036 | deps = [ |
| 8037 | ":tables", |
| 8038 | "@FP16", |
| 8039 | "@pthreadpool", |
| 8040 | ], |
| 8041 | ) |
| 8042 | |
| 8043 | xnnpack_cc_library( |
| Marat Dukhan | 8a9eac6 | 2022-01-06 09:22:01 -0800 | [diff] [blame] | 8044 | name = "avx_amalgam_microkernels", |
| 8045 | hdrs = INTERNAL_HDRS, |
| 8046 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8047 | gcc_x86_copts = ["-mavx"], |
| 8048 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8049 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8050 | msvc_x86_64_copts = ["/arch:AVX"], |
| 8051 | x86_srcs = ["src/amalgam/avx.c"], |
| 8052 | deps = [ |
| 8053 | ":tables", |
| 8054 | "@FP16", |
| 8055 | "@pthreadpool", |
| 8056 | ], |
| 8057 | ) |
| 8058 | |
| 8059 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8060 | name = "avx_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8061 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8062 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8063 | gcc_x86_copts = ["-mavx"], |
| 8064 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8065 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8066 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8067 | x86_srcs = ALL_AVX_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8068 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 8069 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8070 | "@FP16", |
| 8071 | "@pthreadpool", |
| 8072 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8073 | ) |
| 8074 | |
| 8075 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8076 | name = "avx_prod_microkernels", |
| 8077 | hdrs = INTERNAL_HDRS, |
| 8078 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8079 | gcc_x86_copts = ["-mavx"], |
| 8080 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8081 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8082 | msvc_x86_64_copts = ["/arch:AVX"], |
| 8083 | x86_srcs = PROD_AVX_MICROKERNEL_SRCS, |
| 8084 | deps = [ |
| 8085 | ":tables", |
| 8086 | "@FP16", |
| 8087 | "@pthreadpool", |
| 8088 | ], |
| 8089 | ) |
| 8090 | |
| 8091 | xnnpack_cc_library( |
| 8092 | name = "avx_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8093 | hdrs = INTERNAL_HDRS, |
| 8094 | copts = [ |
| 8095 | "-UNDEBUG", |
| 8096 | "-DXNN_TEST_MODE=1", |
| 8097 | ], |
| 8098 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8099 | gcc_x86_copts = ["-mavx"], |
| 8100 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8101 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8102 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8103 | x86_srcs = ALL_AVX_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8104 | deps = [ |
| 8105 | ":tables", |
| 8106 | "@FP16", |
| 8107 | "@pthreadpool", |
| 8108 | ], |
| 8109 | ) |
| 8110 | |
| 8111 | xnnpack_cc_library( |
| Marat Dukhan | 68db12e | 2022-01-05 15:11:49 -0800 | [diff] [blame] | 8112 | name = "f16c_amalgam_microkernels", |
| 8113 | hdrs = INTERNAL_HDRS, |
| 8114 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8115 | gcc_x86_copts = ["-mf16c"], |
| 8116 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8117 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8118 | msvc_x86_64_copts = ["/arch:AVX"], |
| 8119 | x86_srcs = ["src/amalgam/f16c.c"], |
| 8120 | deps = [ |
| 8121 | "@FP16", |
| 8122 | "@pthreadpool", |
| 8123 | ], |
| 8124 | ) |
| 8125 | |
| 8126 | xnnpack_cc_library( |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 8127 | name = "f16c_bench_microkernels", |
| 8128 | hdrs = INTERNAL_HDRS, |
| 8129 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8130 | gcc_x86_copts = ["-mf16c"], |
| 8131 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8132 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8133 | msvc_x86_64_copts = ["/arch:AVX"], |
| 8134 | x86_srcs = ALL_F16C_MICROKERNEL_SRCS, |
| 8135 | deps = [ |
| 8136 | "@FP16", |
| 8137 | "@pthreadpool", |
| 8138 | ], |
| 8139 | ) |
| 8140 | |
| 8141 | xnnpack_cc_library( |
| 8142 | name = "f16c_prod_microkernels", |
| 8143 | hdrs = INTERNAL_HDRS, |
| 8144 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8145 | gcc_x86_copts = ["-mf16c"], |
| 8146 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8147 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8148 | msvc_x86_64_copts = ["/arch:AVX"], |
| 8149 | x86_srcs = PROD_F16C_MICROKERNEL_SRCS, |
| 8150 | deps = [ |
| 8151 | "@FP16", |
| 8152 | "@pthreadpool", |
| 8153 | ], |
| 8154 | ) |
| 8155 | |
| 8156 | xnnpack_cc_library( |
| 8157 | name = "f16c_test_microkernels", |
| 8158 | hdrs = INTERNAL_HDRS, |
| 8159 | copts = [ |
| 8160 | "-UNDEBUG", |
| 8161 | "-DXNN_TEST_MODE=1", |
| 8162 | ], |
| 8163 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8164 | gcc_x86_copts = ["-mf16c"], |
| 8165 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8166 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8167 | msvc_x86_64_copts = ["/arch:AVX"], |
| 8168 | x86_srcs = ALL_F16C_MICROKERNEL_SRCS, |
| 8169 | deps = [ |
| 8170 | "@FP16", |
| 8171 | "@pthreadpool", |
| 8172 | ], |
| 8173 | ) |
| 8174 | |
| 8175 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8176 | name = "xop_bench_microkernels", |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 8177 | hdrs = INTERNAL_HDRS, |
| 8178 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8179 | gcc_x86_copts = ["-mxop"], |
| 8180 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8181 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8182 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8183 | x86_srcs = ALL_XOP_MICROKERNEL_SRCS, |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 8184 | deps = [ |
| 8185 | ":tables", |
| 8186 | "@FP16", |
| 8187 | "@pthreadpool", |
| 8188 | ], |
| 8189 | ) |
| 8190 | |
| 8191 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8192 | name = "xop_prod_microkernels", |
| 8193 | hdrs = INTERNAL_HDRS, |
| 8194 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8195 | gcc_x86_copts = ["-mxop"], |
| 8196 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8197 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8198 | msvc_x86_64_copts = ["/arch:AVX"], |
| 8199 | x86_srcs = PROD_XOP_MICROKERNEL_SRCS, |
| 8200 | deps = [ |
| 8201 | ":tables", |
| 8202 | "@FP16", |
| 8203 | "@pthreadpool", |
| 8204 | ], |
| 8205 | ) |
| 8206 | |
| 8207 | xnnpack_cc_library( |
| 8208 | name = "xop_test_microkernels", |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 8209 | hdrs = INTERNAL_HDRS, |
| 8210 | copts = [ |
| 8211 | "-UNDEBUG", |
| 8212 | "-DXNN_TEST_MODE=1", |
| 8213 | ], |
| 8214 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8215 | gcc_x86_copts = ["-mxop"], |
| 8216 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8217 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8218 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8219 | x86_srcs = ALL_XOP_MICROKERNEL_SRCS, |
| Marat Dukhan | 1566fee | 2020-08-02 21:55:41 -0700 | [diff] [blame] | 8220 | deps = [ |
| 8221 | ":tables", |
| 8222 | "@FP16", |
| 8223 | "@pthreadpool", |
| 8224 | ], |
| 8225 | ) |
| 8226 | |
| 8227 | xnnpack_cc_library( |
| Marat Dukhan | 8a9eac6 | 2022-01-06 09:22:01 -0800 | [diff] [blame] | 8228 | name = "fma3_amalgam_microkernels", |
| 8229 | hdrs = INTERNAL_HDRS, |
| 8230 | gcc_copts = xnnpack_gcc_std_copts(), |
| Marat Dukhan | 645af97 | 2022-01-09 22:50:27 -0800 | [diff] [blame] | 8231 | gcc_x86_copts = [ |
| 8232 | "-mf16c", |
| 8233 | "-mfma", |
| 8234 | ], |
| Marat Dukhan | 8a9eac6 | 2022-01-06 09:22:01 -0800 | [diff] [blame] | 8235 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8236 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8237 | msvc_x86_64_copts = ["/arch:AVX"], |
| 8238 | x86_srcs = ["src/amalgam/fma3.c"], |
| 8239 | deps = [ |
| 8240 | ":tables", |
| 8241 | "@FP16", |
| 8242 | "@pthreadpool", |
| 8243 | ], |
| 8244 | ) |
| 8245 | |
| 8246 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8247 | name = "fma3_bench_microkernels", |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 8248 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8249 | gcc_copts = xnnpack_gcc_std_copts(), |
| Marat Dukhan | 645af97 | 2022-01-09 22:50:27 -0800 | [diff] [blame] | 8250 | gcc_x86_copts = [ |
| 8251 | "-mf16c", |
| 8252 | "-mfma", |
| 8253 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8254 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8255 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8256 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8257 | x86_srcs = ALL_FMA3_MICROKERNEL_SRCS, |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 8258 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 8259 | ":tables", |
| Marat Dukhan | fda12b8 | 2019-11-21 12:27:59 -0800 | [diff] [blame] | 8260 | "@FP16", |
| 8261 | "@pthreadpool", |
| 8262 | ], |
| 8263 | ) |
| 8264 | |
| 8265 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8266 | name = "fma3_prod_microkernels", |
| 8267 | hdrs = INTERNAL_HDRS, |
| 8268 | gcc_copts = xnnpack_gcc_std_copts(), |
| Marat Dukhan | 645af97 | 2022-01-09 22:50:27 -0800 | [diff] [blame] | 8269 | gcc_x86_copts = [ |
| 8270 | "-mf16c", |
| 8271 | "-mfma", |
| 8272 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8273 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8274 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8275 | msvc_x86_64_copts = ["/arch:AVX"], |
| 8276 | x86_srcs = PROD_FMA3_MICROKERNEL_SRCS, |
| 8277 | deps = [ |
| 8278 | ":tables", |
| 8279 | "@FP16", |
| 8280 | "@pthreadpool", |
| 8281 | ], |
| 8282 | ) |
| 8283 | |
| 8284 | xnnpack_cc_library( |
| 8285 | name = "fma3_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8286 | hdrs = INTERNAL_HDRS, |
| 8287 | copts = [ |
| 8288 | "-UNDEBUG", |
| 8289 | "-DXNN_TEST_MODE=1", |
| 8290 | ], |
| 8291 | gcc_copts = xnnpack_gcc_std_copts(), |
| Marat Dukhan | 645af97 | 2022-01-09 22:50:27 -0800 | [diff] [blame] | 8292 | gcc_x86_copts = [ |
| 8293 | "-mf16c", |
| 8294 | "-mfma", |
| 8295 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8296 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8297 | msvc_x86_32_copts = ["/arch:AVX"], |
| 8298 | msvc_x86_64_copts = ["/arch:AVX"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8299 | x86_srcs = ALL_FMA3_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8300 | deps = [ |
| 8301 | ":tables", |
| 8302 | "@FP16", |
| 8303 | "@pthreadpool", |
| 8304 | ], |
| 8305 | ) |
| 8306 | |
| 8307 | xnnpack_cc_library( |
| Marat Dukhan | 8a9eac6 | 2022-01-06 09:22:01 -0800 | [diff] [blame] | 8308 | name = "avx2_amalgam_microkernels", |
| 8309 | hdrs = INTERNAL_HDRS, |
| 8310 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8311 | gcc_x86_copts = [ |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 8312 | "-mf16c", |
| Marat Dukhan | 8a9eac6 | 2022-01-06 09:22:01 -0800 | [diff] [blame] | 8313 | "-mfma", |
| 8314 | "-mavx2", |
| 8315 | ], |
| 8316 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8317 | msvc_x86_32_copts = ["/arch:AVX2"], |
| 8318 | msvc_x86_64_copts = ["/arch:AVX2"], |
| 8319 | x86_srcs = ["src/amalgam/avx2.c"], |
| 8320 | deps = [ |
| 8321 | ":tables", |
| 8322 | "@FP16", |
| 8323 | "@pthreadpool", |
| 8324 | ], |
| 8325 | ) |
| 8326 | |
| 8327 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8328 | name = "avx2_bench_microkernels", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 8329 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8330 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8331 | gcc_x86_copts = [ |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 8332 | "-mf16c", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 8333 | "-mfma", |
| 8334 | "-mavx2", |
| 8335 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8336 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8337 | msvc_x86_32_copts = ["/arch:AVX2"], |
| 8338 | msvc_x86_64_copts = ["/arch:AVX2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8339 | x86_srcs = ALL_AVX2_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8340 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 8341 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8342 | "@FP16", |
| 8343 | "@pthreadpool", |
| 8344 | ], |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 8345 | ) |
| 8346 | |
| 8347 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8348 | name = "avx2_prod_microkernels", |
| 8349 | hdrs = INTERNAL_HDRS, |
| 8350 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8351 | gcc_x86_copts = [ |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 8352 | "-mf16c", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8353 | "-mfma", |
| 8354 | "-mavx2", |
| 8355 | ], |
| 8356 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8357 | msvc_x86_32_copts = ["/arch:AVX2"], |
| 8358 | msvc_x86_64_copts = ["/arch:AVX2"], |
| 8359 | x86_srcs = PROD_AVX2_MICROKERNEL_SRCS, |
| 8360 | deps = [ |
| 8361 | ":tables", |
| 8362 | "@FP16", |
| 8363 | "@pthreadpool", |
| 8364 | ], |
| 8365 | ) |
| 8366 | |
| 8367 | xnnpack_cc_library( |
| 8368 | name = "avx2_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8369 | hdrs = INTERNAL_HDRS, |
| 8370 | copts = [ |
| 8371 | "-UNDEBUG", |
| 8372 | "-DXNN_TEST_MODE=1", |
| 8373 | ], |
| 8374 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8375 | gcc_x86_copts = [ |
| Marat Dukhan | c4302c2 | 2022-01-06 19:27:03 -0800 | [diff] [blame] | 8376 | "-mf16c", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8377 | "-mfma", |
| 8378 | "-mavx2", |
| 8379 | ], |
| 8380 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8381 | msvc_x86_32_copts = ["/arch:AVX2"], |
| 8382 | msvc_x86_64_copts = ["/arch:AVX2"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8383 | x86_srcs = ALL_AVX2_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8384 | deps = [ |
| 8385 | ":tables", |
| 8386 | "@FP16", |
| 8387 | "@pthreadpool", |
| 8388 | ], |
| 8389 | ) |
| 8390 | |
| 8391 | xnnpack_cc_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 8392 | name = "avx512f_amalgam_microkernels", |
| 8393 | hdrs = INTERNAL_HDRS, |
| 8394 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8395 | gcc_x86_copts = ["-mavx512f"], |
| 8396 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8397 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8398 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8399 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8400 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| 8401 | x86_srcs = ["src/amalgam/avx512f.c"], |
| 8402 | deps = [ |
| 8403 | ":tables", |
| 8404 | "@FP16", |
| 8405 | "@pthreadpool", |
| 8406 | ], |
| 8407 | ) |
| 8408 | |
| 8409 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8410 | name = "avx512f_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8411 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8412 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8413 | gcc_x86_copts = ["-mavx512f"], |
| 8414 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8415 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8416 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8417 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8418 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8419 | x86_srcs = ALL_AVX512F_MICROKERNEL_SRCS, |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8420 | deps = [ |
| Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 8421 | ":tables", |
| Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 8422 | "@FP16", |
| 8423 | "@pthreadpool", |
| 8424 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8425 | ) |
| 8426 | |
| 8427 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8428 | name = "avx512f_prod_microkernels", |
| 8429 | hdrs = INTERNAL_HDRS, |
| 8430 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8431 | gcc_x86_copts = ["-mavx512f"], |
| 8432 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8433 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8434 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8435 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8436 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| 8437 | x86_srcs = PROD_AVX512F_MICROKERNEL_SRCS, |
| 8438 | deps = [ |
| 8439 | ":tables", |
| 8440 | "@FP16", |
| 8441 | "@pthreadpool", |
| 8442 | ], |
| 8443 | ) |
| 8444 | |
| 8445 | xnnpack_cc_library( |
| 8446 | name = "avx512f_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8447 | hdrs = INTERNAL_HDRS, |
| 8448 | copts = [ |
| 8449 | "-UNDEBUG", |
| 8450 | "-DXNN_TEST_MODE=1", |
| 8451 | ], |
| 8452 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8453 | gcc_x86_copts = ["-mavx512f"], |
| 8454 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8455 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8456 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8457 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8458 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8459 | x86_srcs = ALL_AVX512F_MICROKERNEL_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8460 | deps = [ |
| 8461 | ":tables", |
| 8462 | "@FP16", |
| 8463 | "@pthreadpool", |
| 8464 | ], |
| 8465 | ) |
| 8466 | |
| 8467 | xnnpack_cc_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 8468 | name = "avx512skx_amalgam_microkernels", |
| 8469 | hdrs = INTERNAL_HDRS, |
| 8470 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8471 | gcc_x86_copts = [ |
| 8472 | "-mavx512f", |
| 8473 | "-mavx512cd", |
| 8474 | "-mavx512bw", |
| 8475 | "-mavx512dq", |
| 8476 | "-mavx512vl", |
| 8477 | ], |
| 8478 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8479 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8480 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8481 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8482 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| 8483 | x86_srcs = ["src/amalgam/avx512skx.c"], |
| 8484 | deps = [ |
| 8485 | ":tables", |
| 8486 | "@FP16", |
| 8487 | "@pthreadpool", |
| 8488 | ], |
| 8489 | ) |
| 8490 | |
| 8491 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8492 | name = "avx512skx_bench_microkernels", |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 8493 | hdrs = INTERNAL_HDRS, |
| 8494 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8495 | gcc_x86_copts = [ |
| 8496 | "-mavx512f", |
| 8497 | "-mavx512cd", |
| 8498 | "-mavx512bw", |
| 8499 | "-mavx512dq", |
| 8500 | "-mavx512vl", |
| 8501 | ], |
| 8502 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8503 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8504 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8505 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8506 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8507 | x86_srcs = ALL_AVX512SKX_MICROKERNEL_SRCS, |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 8508 | deps = [ |
| 8509 | ":tables", |
| 8510 | "@FP16", |
| 8511 | "@pthreadpool", |
| 8512 | ], |
| 8513 | ) |
| 8514 | |
| 8515 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8516 | name = "avx512skx_prod_microkernels", |
| 8517 | hdrs = INTERNAL_HDRS, |
| 8518 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8519 | gcc_x86_copts = [ |
| 8520 | "-mavx512f", |
| 8521 | "-mavx512cd", |
| 8522 | "-mavx512bw", |
| 8523 | "-mavx512dq", |
| 8524 | "-mavx512vl", |
| 8525 | ], |
| 8526 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8527 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8528 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8529 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8530 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| 8531 | x86_srcs = PROD_AVX512SKX_MICROKERNEL_SRCS, |
| 8532 | deps = [ |
| 8533 | ":tables", |
| 8534 | "@FP16", |
| 8535 | "@pthreadpool", |
| 8536 | ], |
| 8537 | ) |
| 8538 | |
| 8539 | xnnpack_cc_library( |
| 8540 | name = "avx512skx_test_microkernels", |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 8541 | hdrs = INTERNAL_HDRS, |
| 8542 | copts = [ |
| 8543 | "-UNDEBUG", |
| 8544 | "-DXNN_TEST_MODE=1", |
| 8545 | ], |
| 8546 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8547 | gcc_x86_copts = [ |
| 8548 | "-mavx512f", |
| 8549 | "-mavx512cd", |
| 8550 | "-mavx512bw", |
| 8551 | "-mavx512dq", |
| 8552 | "-mavx512vl", |
| 8553 | ], |
| 8554 | mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| 8555 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8556 | msvc_x86_32_copts = ["/arch:AVX512"], |
| 8557 | msvc_x86_64_copts = ["/arch:AVX512"], |
| 8558 | msys_copts = ["-fno-asynchronous-unwind-tables"], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8559 | x86_srcs = ALL_AVX512SKX_MICROKERNEL_SRCS, |
| Marat Dukhan | bb00b1d | 2020-08-10 11:37:23 -0700 | [diff] [blame] | 8560 | deps = [ |
| 8561 | ":tables", |
| 8562 | "@FP16", |
| 8563 | "@pthreadpool", |
| 8564 | ], |
| 8565 | ) |
| 8566 | |
| 8567 | xnnpack_cc_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8568 | name = "asm_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8569 | hdrs = ["src/xnnpack/assembly.h"], |
| Frank Barchard | 9f3f420 | 2021-12-16 18:13:51 -0800 | [diff] [blame] | 8570 | aarch32_copts = [ |
| 8571 | "-marm", |
| 8572 | "-march=armv8.2-a+dotprod", |
| 8573 | "-mfpu=neon-fp-armv8", |
| 8574 | ], |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 8575 | aarch32_srcs = AARCH32_ASM_MICROKERNEL_SRCS, |
| Frank Barchard | 31bb45b | 2020-10-06 00:26:33 -0700 | [diff] [blame] | 8576 | aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"], |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 8577 | aarch64_srcs = AARCH64_ASM_MICROKERNEL_SRCS, |
| 8578 | wasm_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 8579 | wasmrelaxedsimd_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| Marat Dukhan | db3b0a7 | 2021-07-27 08:58:01 -0700 | [diff] [blame] | 8580 | wasmsimd_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8581 | ) |
| 8582 | |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8583 | xnnpack_cc_library( |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 8584 | name = "log_level_default", |
| 8585 | defines = select({ |
| 8586 | # No logging in optimized mode |
| 8587 | ":optimized_build": ["XNN_LOG_LEVEL=0"], |
| 8588 | # Full logging in debug mode |
| 8589 | ":debug_build": ["XNN_LOG_LEVEL=5"], |
| 8590 | # Error-only logging in default (fastbuild) mode |
| 8591 | "//conditions:default": ["XNN_LOG_LEVEL=2"], |
| 8592 | }), |
| 8593 | ) |
| 8594 | |
| 8595 | xnnpack_cc_library( |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8596 | name = "logging_utils", |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 8597 | srcs = [ |
| 8598 | "src/datatype-strings.c", |
| 8599 | "src/operator-strings.c", |
| 8600 | "src/subgraph-strings.c", |
| 8601 | ], |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8602 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 8603 | copts = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8604 | "-Isrc", |
| 8605 | "-Iinclude", |
| 8606 | ] + select({ |
| 8607 | ":debug_build": [], |
| 8608 | "//conditions:default": xnnpack_min_size_copts(), |
| 8609 | }), |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 8610 | defines = select({ |
| 8611 | ":xnn_log_level_explicit_none": ["XNN_LOG_LEVEL=0"], |
| 8612 | ":xnn_log_level_explicit_fatal": ["XNN_LOG_LEVEL=1"], |
| 8613 | ":xnn_log_level_explicit_error": ["XNN_LOG_LEVEL=2"], |
| 8614 | ":xnn_log_level_explicit_warning": ["XNN_LOG_LEVEL=3"], |
| 8615 | ":xnn_log_level_explicit_info": ["XNN_LOG_LEVEL=4"], |
| 8616 | ":xnn_log_level_explicit_debug": ["XNN_LOG_LEVEL=5"], |
| 8617 | "//conditions:default": [], |
| 8618 | }), |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8619 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8620 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8621 | visibility = xnnpack_visibility(), |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 8622 | deps = select({ |
| 8623 | ":xnn_log_level_explicit_none": [], |
| 8624 | ":xnn_log_level_explicit_fatal": [], |
| 8625 | ":xnn_log_level_explicit_error": [], |
| 8626 | ":xnn_log_level_explicit_warning": [], |
| 8627 | ":xnn_log_level_explicit_info": [], |
| 8628 | ":xnn_log_level_explicit_debug": [], |
| 8629 | "//conditions:default": [":log_level_default"], |
| 8630 | }) + [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8631 | "@FP16", |
| 8632 | "@clog", |
| 8633 | "@pthreadpool", |
| 8634 | ], |
| 8635 | ) |
| 8636 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8637 | xnnpack_aggregate_library( |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 8638 | name = "amalgam_microkernels", |
| 8639 | aarch32_ios_deps = [ |
| 8640 | ":neon_prod_microkernels", |
| 8641 | ":neonfp16_prod_microkernels", |
| 8642 | ":neonfma_prod_microkernels", |
| 8643 | ":neonv8_prod_microkernels", |
| 8644 | ":asm_microkernels", |
| 8645 | ], |
| 8646 | aarch32_nonios_deps = [ |
| 8647 | ":neon_prod_microkernels", |
| 8648 | ":neonfp16_prod_microkernels", |
| 8649 | ":neonfma_prod_microkernels", |
| 8650 | ":neonv8_prod_microkernels", |
| 8651 | ":neondot_prod_microkernels", |
| 8652 | ":asm_microkernels", |
| 8653 | ], |
| 8654 | aarch64_deps = [ |
| 8655 | ":neon_prod_microkernels", |
| 8656 | ":neonfp16_prod_microkernels", |
| 8657 | ":neonfma_prod_microkernels", |
| 8658 | ":neonv8_prod_microkernels", |
| 8659 | ":neonfp16arith_prod_microkernels", |
| 8660 | ":neondot_prod_microkernels", |
| 8661 | ":asm_microkernels", |
| 8662 | ], |
| 8663 | generic_deps = [ |
| 8664 | ":scalar_prod_microkernels", |
| 8665 | ], |
| 8666 | wasm_deps = [ |
| 8667 | ":wasm_prod_microkernels", |
| 8668 | ":asm_microkernels", |
| 8669 | ], |
| 8670 | wasmrelaxedsimd_deps = [ |
| 8671 | ":wasm_prod_microkernels", |
| 8672 | ":asm_microkernels", |
| 8673 | ], |
| 8674 | wasmsimd_deps = [ |
| 8675 | ":wasm_prod_microkernels", |
| 8676 | ":asm_microkernels", |
| 8677 | ], |
| 8678 | x86_deps = [ |
| 8679 | ":sse2_amalgam_microkernels", |
| 8680 | ":ssse3_amalgam_microkernels", |
| 8681 | ":sse41_amalgam_microkernels", |
| Marat Dukhan | 8a9eac6 | 2022-01-06 09:22:01 -0800 | [diff] [blame] | 8682 | ":avx_amalgam_microkernels", |
| Marat Dukhan | 68db12e | 2022-01-05 15:11:49 -0800 | [diff] [blame] | 8683 | ":f16c_amalgam_microkernels", |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 8684 | ":xop_prod_microkernels", |
| Marat Dukhan | 8a9eac6 | 2022-01-06 09:22:01 -0800 | [diff] [blame] | 8685 | ":fma3_amalgam_microkernels", |
| 8686 | ":avx2_amalgam_microkernels", |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 8687 | ":avx512f_amalgam_microkernels", |
| 8688 | ":avx512skx_amalgam_microkernels", |
| 8689 | ], |
| 8690 | ) |
| 8691 | |
| 8692 | xnnpack_aggregate_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8693 | name = "bench_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 8694 | aarch32_ios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8695 | ":neon_bench_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8696 | ":neonfp16_bench_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8697 | ":neonfma_bench_microkernels", |
| 8698 | ":neonv8_bench_microkernels", |
| 8699 | ":asm_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 8700 | ], |
| 8701 | aarch32_nonios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8702 | ":neon_bench_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8703 | ":neonfp16_bench_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8704 | ":neonfma_bench_microkernels", |
| 8705 | ":neonv8_bench_microkernels", |
| 8706 | ":neondot_bench_microkernels", |
| 8707 | ":asm_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8708 | ], |
| 8709 | aarch64_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8710 | ":neon_bench_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8711 | ":neonfp16_bench_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8712 | ":neonfma_bench_microkernels", |
| 8713 | ":neonv8_bench_microkernels", |
| 8714 | ":neonfp16arith_bench_microkernels", |
| 8715 | ":neondot_bench_microkernels", |
| 8716 | ":asm_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8717 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8718 | generic_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8719 | ":scalar_bench_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8720 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8721 | wasm_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8722 | ":wasm_bench_microkernels", |
| 8723 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8724 | ], |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 8725 | wasmrelaxedsimd_deps = [ |
| 8726 | ":wasm_bench_microkernels", |
| 8727 | ":asm_microkernels", |
| 8728 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8729 | wasmsimd_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8730 | ":wasm_bench_microkernels", |
| 8731 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8732 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8733 | x86_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8734 | ":sse2_bench_microkernels", |
| 8735 | ":ssse3_bench_microkernels", |
| 8736 | ":sse41_bench_microkernels", |
| 8737 | ":avx_bench_microkernels", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 8738 | ":f16c_bench_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8739 | ":xop_bench_microkernels", |
| 8740 | ":fma3_bench_microkernels", |
| 8741 | ":avx2_bench_microkernels", |
| 8742 | ":avx512f_bench_microkernels", |
| 8743 | ":avx512skx_bench_microkernels", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8744 | ], |
| 8745 | ) |
| 8746 | |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8747 | xnnpack_aggregate_library( |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8748 | name = "prod_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 8749 | aarch32_ios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8750 | ":neon_prod_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8751 | ":neonfp16_prod_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8752 | ":neonfma_prod_microkernels", |
| 8753 | ":neonv8_prod_microkernels", |
| 8754 | ":asm_microkernels", |
| Marat Dukhan | 6e8c0ce | 2021-04-13 14:35:08 -0700 | [diff] [blame] | 8755 | ], |
| 8756 | aarch32_nonios_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8757 | ":neon_prod_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8758 | ":neonfp16_prod_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8759 | ":neonfma_prod_microkernels", |
| 8760 | ":neonv8_prod_microkernels", |
| 8761 | ":neondot_prod_microkernels", |
| 8762 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8763 | ], |
| 8764 | aarch64_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8765 | ":neon_prod_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8766 | ":neonfp16_prod_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8767 | ":neonfma_prod_microkernels", |
| 8768 | ":neonv8_prod_microkernels", |
| 8769 | ":neonfp16arith_prod_microkernels", |
| 8770 | ":neondot_prod_microkernels", |
| 8771 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8772 | ], |
| 8773 | generic_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8774 | ":scalar_prod_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8775 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8776 | wasm_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8777 | ":wasm_prod_microkernels", |
| 8778 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8779 | ], |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 8780 | wasmrelaxedsimd_deps = [ |
| 8781 | ":wasm_prod_microkernels", |
| 8782 | ":asm_microkernels", |
| 8783 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8784 | wasmsimd_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8785 | ":wasm_prod_microkernels", |
| 8786 | ":asm_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8787 | ], |
| 8788 | x86_deps = [ |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8789 | ":sse2_prod_microkernels", |
| 8790 | ":ssse3_prod_microkernels", |
| 8791 | ":sse41_prod_microkernels", |
| 8792 | ":avx_prod_microkernels", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 8793 | ":f16c_prod_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8794 | ":xop_prod_microkernels", |
| 8795 | ":fma3_prod_microkernels", |
| 8796 | ":avx2_prod_microkernels", |
| 8797 | ":avx512f_prod_microkernels", |
| 8798 | ":avx512skx_prod_microkernels", |
| 8799 | ], |
| 8800 | ) |
| 8801 | |
| 8802 | xnnpack_aggregate_library( |
| 8803 | name = "test_microkernels", |
| 8804 | aarch32_ios_deps = [ |
| 8805 | ":neon_test_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8806 | ":neonfp16_test_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8807 | ":neonfma_test_microkernels", |
| 8808 | ":neonv8_test_microkernels", |
| 8809 | ":asm_microkernels", |
| 8810 | ], |
| 8811 | aarch32_nonios_deps = [ |
| 8812 | ":neon_test_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8813 | ":neonfp16_test_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8814 | ":neonfma_test_microkernels", |
| 8815 | ":neonv8_test_microkernels", |
| 8816 | ":neondot_test_microkernels", |
| 8817 | ":asm_microkernels", |
| 8818 | ], |
| 8819 | aarch64_deps = [ |
| 8820 | ":neon_test_microkernels", |
| Marat Dukhan | 8ff372c | 2021-09-28 14:43:17 -0700 | [diff] [blame] | 8821 | ":neonfp16_test_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8822 | ":neonfma_test_microkernels", |
| 8823 | ":neonv8_test_microkernels", |
| 8824 | ":neonfp16arith_test_microkernels", |
| 8825 | ":neondot_test_microkernels", |
| 8826 | ":asm_microkernels", |
| 8827 | ], |
| 8828 | generic_deps = [ |
| 8829 | ":scalar_test_microkernels", |
| 8830 | ], |
| 8831 | wasm_deps = [ |
| 8832 | ":wasm_test_microkernels", |
| 8833 | ":asm_microkernels", |
| 8834 | ], |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 8835 | wasmrelaxedsimd_deps = [ |
| 8836 | ":wasm_test_microkernels", |
| 8837 | ":asm_microkernels", |
| 8838 | ], |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8839 | wasmsimd_deps = [ |
| 8840 | ":wasm_test_microkernels", |
| 8841 | ":asm_microkernels", |
| 8842 | ], |
| 8843 | x86_deps = [ |
| 8844 | ":sse2_test_microkernels", |
| 8845 | ":ssse3_test_microkernels", |
| 8846 | ":sse41_test_microkernels", |
| 8847 | ":avx_test_microkernels", |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 8848 | ":f16c_test_microkernels", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 8849 | ":xop_test_microkernels", |
| 8850 | ":fma3_test_microkernels", |
| 8851 | ":avx2_test_microkernels", |
| 8852 | ":avx512f_test_microkernels", |
| 8853 | ":avx512skx_test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8854 | ], |
| 8855 | ) |
| 8856 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8857 | xnnpack_cc_library( |
| 8858 | name = "im2col", |
| 8859 | srcs = ["src/im2col.c"], |
| 8860 | hdrs = [ |
| 8861 | "src/xnnpack/common.h", |
| 8862 | "src/xnnpack/im2col.h", |
| 8863 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8864 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8865 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8866 | ) |
| 8867 | |
| 8868 | xnnpack_cc_library( |
| 8869 | name = "indirection", |
| 8870 | srcs = ["src/indirection.c"], |
| 8871 | hdrs = INTERNAL_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8872 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8873 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8874 | deps = [ |
| 8875 | "@FP16", |
| 8876 | "@FXdiv", |
| 8877 | "@pthreadpool", |
| 8878 | ], |
| 8879 | ) |
| 8880 | |
| 8881 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8882 | name = "indirection_test_mode", |
| 8883 | srcs = ["src/indirection.c"], |
| 8884 | hdrs = INTERNAL_HDRS, |
| 8885 | copts = [ |
| 8886 | "-UNDEBUG", |
| 8887 | "-DXNN_TEST_MODE=1", |
| 8888 | ], |
| 8889 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8890 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8891 | deps = [ |
| 8892 | "@FP16", |
| 8893 | "@FXdiv", |
| 8894 | "@pthreadpool", |
| 8895 | ], |
| 8896 | ) |
| 8897 | |
| 8898 | xnnpack_cc_library( |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 8899 | name = "packing", |
| 8900 | srcs = ["src/packing.c"], |
| 8901 | hdrs = INTERNAL_HDRS, |
| 8902 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8903 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8904 | deps = [ |
| 8905 | "@FP16", |
| 8906 | "@FXdiv", |
| 8907 | "@pthreadpool", |
| 8908 | ], |
| 8909 | ) |
| 8910 | |
| 8911 | xnnpack_cc_library( |
| 8912 | name = "packing_test_mode", |
| 8913 | srcs = ["src/packing.c"], |
| 8914 | hdrs = INTERNAL_HDRS, |
| 8915 | copts = [ |
| 8916 | "-UNDEBUG", |
| 8917 | "-DXNN_TEST_MODE=1", |
| 8918 | ], |
| 8919 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8920 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8921 | deps = [ |
| 8922 | "@FP16", |
| 8923 | "@FXdiv", |
| 8924 | "@pthreadpool", |
| 8925 | ], |
| 8926 | ) |
| 8927 | |
| 8928 | xnnpack_cc_library( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8929 | name = "operator_run", |
| 8930 | srcs = ["src/operator-run.c"], |
| Marat Dukhan | c8e00eb | 2019-10-04 14:55:26 -0700 | [diff] [blame] | 8931 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 8932 | copts = select({ |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 8933 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 8934 | "//conditions:default": [], |
| 8935 | }), |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 8936 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8937 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8938 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8939 | ":logging_utils", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 8940 | "@FP16", |
| 8941 | "@FXdiv", |
| 8942 | "@clog", |
| 8943 | "@pthreadpool", |
| 8944 | ], |
| 8945 | ) |
| 8946 | |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 8947 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8948 | name = "operator_run_test_mode", |
| 8949 | srcs = ["src/operator-run.c"], |
| 8950 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 8951 | copts = [ |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8952 | "-UNDEBUG", |
| 8953 | "-DXNN_TEST_MODE=1", |
| 8954 | ] + select({ |
| 8955 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 8956 | "//conditions:default": [], |
| 8957 | }), |
| 8958 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8959 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8960 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8961 | ":logging_utils", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8962 | "@FP16", |
| 8963 | "@FXdiv", |
| 8964 | "@clog", |
| 8965 | "@pthreadpool", |
| 8966 | ], |
| 8967 | ) |
| 8968 | |
| 8969 | xnnpack_cc_library( |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 8970 | name = "memory_planner", |
| 8971 | srcs = ["src/memory-planner.c"], |
| 8972 | hdrs = INTERNAL_HDRS, |
| 8973 | defines = select({ |
| 8974 | ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"], |
| 8975 | ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"], |
| 8976 | "//conditions:default": ["XNN_ENABLE_MEMOPT=1"], |
| 8977 | }), |
| 8978 | gcc_copts = xnnpack_gcc_std_copts(), |
| 8979 | msvc_copts = xnnpack_msvc_std_copts(), |
| 8980 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 8981 | ":logging_utils", |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 8982 | "@pthreadpool", |
| 8983 | ], |
| 8984 | ) |
| 8985 | |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 8986 | xnnpack_cc_library( |
| 8987 | name = "memory_planner_test_mode", |
| 8988 | srcs = ["src/memory-planner.c"], |
| 8989 | hdrs = INTERNAL_HDRS, |
| 8990 | copts = [ |
| 8991 | "-UNDEBUG", |
| 8992 | "-DXNN_TEST_MODE=1", |
| 8993 | ], |
| 8994 | defines = select({ |
| 8995 | ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"], |
| 8996 | ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"], |
| 8997 | "//conditions:default": ["XNN_ENABLE_MEMOPT=1"], |
| 8998 | }), |
| 8999 | gcc_copts = xnnpack_gcc_std_copts(), |
| 9000 | msvc_copts = xnnpack_msvc_std_copts(), |
| 9001 | deps = [ |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 9002 | ":logging_utils", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9003 | "@pthreadpool", |
| 9004 | ], |
| 9005 | ) |
| 9006 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9007 | cc_library( |
| 9008 | name = "enable_assembly", |
| 9009 | defines = select({ |
| 9010 | ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"], |
| 9011 | ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"], |
| Frank Barchard | 810171d | 2019-10-10 10:34:51 -0700 | [diff] [blame] | 9012 | "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9013 | }), |
| 9014 | ) |
| 9015 | |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 9016 | cc_library( |
| 9017 | name = "enable_sparse", |
| 9018 | defines = select({ |
| 9019 | ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"], |
| 9020 | ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"], |
| Marat Dukhan | b36582b | 2020-12-08 11:16:28 -0800 | [diff] [blame] | 9021 | "//conditions:default": ["XNN_ENABLE_SPARSE=1"], |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 9022 | }), |
| 9023 | ) |
| 9024 | |
| Zhi An Ng | 25764d8 | 2022-01-07 11:27:36 -0800 | [diff] [blame] | 9025 | cc_library( |
| 9026 | name = "enable_jit", |
| 9027 | defines = select({ |
| 9028 | ":xnn_enable_jit_explicit_true": ["XNN_ENABLE_JIT=1"], |
| 9029 | ":xnn_enable_jit_explicit_false": ["XNN_ENABLE_JIT=0"], |
| 9030 | "//conditions:default": ["XNN_ENABLE_JIT=0"], |
| 9031 | }), |
| 9032 | ) |
| 9033 | |
| Marat Dukhan | cf056b2 | 2019-10-07 10:26:29 -0700 | [diff] [blame] | 9034 | xnnpack_cc_library( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9035 | name = "operators", |
| 9036 | srcs = OPERATOR_SRCS + [ |
| Marat Dukhan | 496389f | 2021-04-07 15:47:12 -0700 | [diff] [blame] | 9037 | "src/allocator.c", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9038 | "src/operator-delete.c", |
| Marat Dukhan | cf056b2 | 2019-10-07 10:26:29 -0700 | [diff] [blame] | 9039 | ], |
| 9040 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 9041 | copts = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9042 | "-Isrc", |
| 9043 | "-Iinclude", |
| 9044 | ] + select({ |
| 9045 | ":debug_build": [], |
| 9046 | "//conditions:default": xnnpack_min_size_copts(), |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 9047 | }) + select({ |
| 9048 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 9049 | "//conditions:default": [], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9050 | }), |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9051 | gcc_copts = xnnpack_gcc_std_copts(), |
| 9052 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9053 | deps = [ |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9054 | ":indirection", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 9055 | ":logging_utils", |
| Marat Dukhan | 1b1b032 | 2021-09-27 14:23:23 -0700 | [diff] [blame] | 9056 | ":operator_run", |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9057 | ":packing", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9058 | "@FP16", |
| 9059 | "@FXdiv", |
| 9060 | "@clog", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9061 | "@pthreadpool", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9062 | ], |
| 9063 | ) |
| 9064 | |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9065 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9066 | name = "operators_test_mode", |
| 9067 | srcs = OPERATOR_SRCS + [ |
| Marat Dukhan | 496389f | 2021-04-07 15:47:12 -0700 | [diff] [blame] | 9068 | "src/allocator.c", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9069 | "src/operator-delete.c", |
| 9070 | ], |
| 9071 | hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 9072 | copts = [ |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9073 | "-Isrc", |
| 9074 | "-Iinclude", |
| 9075 | "-UNDEBUG", |
| 9076 | "-DXNN_TEST_MODE=1", |
| 9077 | ] + select({ |
| 9078 | ":debug_build": [], |
| 9079 | "//conditions:default": xnnpack_min_size_copts(), |
| 9080 | }) + select({ |
| 9081 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 9082 | "//conditions:default": [], |
| 9083 | }), |
| 9084 | gcc_copts = xnnpack_gcc_std_copts(), |
| 9085 | msvc_copts = xnnpack_msvc_std_copts(), |
| 9086 | deps = [ |
| 9087 | ":indirection_test_mode", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 9088 | ":logging_utils", |
| Marat Dukhan | 1b1b032 | 2021-09-27 14:23:23 -0700 | [diff] [blame] | 9089 | ":operator_run_test_mode", |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9090 | ":packing_test_mode", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9091 | "@FP16", |
| 9092 | "@FXdiv", |
| 9093 | "@clog", |
| 9094 | "@pthreadpool", |
| 9095 | ], |
| 9096 | ) |
| 9097 | |
| 9098 | xnnpack_cc_library( |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 9099 | name = "jit", |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 9100 | srcs = [ |
| 9101 | "src/jit/aarch32-assembler.cc", |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 9102 | "src/jit/memory.c", |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 9103 | ], |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 9104 | hdrs = INTERNAL_HDRS + [ |
| 9105 | "src/xnnpack/aarch32-assembler.h", |
| 9106 | ], |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 9107 | aarch32_srcs = JIT_AARCH32_SRCS, |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 9108 | msvc_copts = xnnpack_msvc_std_copts(), |
| 9109 | deps = [ |
| 9110 | ":logging_utils", |
| 9111 | ], |
| 9112 | ) |
| 9113 | |
| 9114 | xnnpack_cc_library( |
| 9115 | name = "jit_test_mode", |
| 9116 | srcs = [ |
| 9117 | "src/jit/aarch32-assembler.cc", |
| 9118 | "src/jit/memory.c", |
| 9119 | ], |
| 9120 | hdrs = INTERNAL_HDRS + [ |
| 9121 | "src/xnnpack/aarch32-assembler.h", |
| 9122 | ], |
| Zhi An Ng | 8f2eeee | 2022-01-11 15:50:18 -0800 | [diff] [blame] | 9123 | aarch32_srcs = JIT_AARCH32_SRCS, |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 9124 | copts = [ |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 9125 | "-UNDEBUG", |
| 9126 | "-DXNN_TEST_MODE=1", |
| 9127 | ], |
| 9128 | msvc_copts = xnnpack_msvc_std_copts(), |
| 9129 | deps = [ |
| 9130 | ":logging_utils", |
| 9131 | ], |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 9132 | ) |
| 9133 | |
| 9134 | xnnpack_cc_library( |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9135 | name = "XNNPACK", |
| 9136 | srcs = [ |
| 9137 | "src/init.c", |
| Marat Dukhan | ccfdbd1 | 2020-02-03 14:27:45 -0800 | [diff] [blame] | 9138 | "src/runtime.c", |
| 9139 | "src/subgraph.c", |
| 9140 | "src/tensor.c", |
| Marat Dukhan | f03da0d | 2020-06-10 16:00:20 -0700 | [diff] [blame] | 9141 | ] + SUBGRAPH_SRCS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9142 | hdrs = ["include/xnnpack.h"], |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 9143 | copts = [ |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9144 | "-Isrc", |
| 9145 | "-Iinclude", |
| 9146 | ] + select({ |
| 9147 | ":debug_build": [], |
| 9148 | "//conditions:default": xnnpack_min_size_copts(), |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 9149 | }) + select({ |
| 9150 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 9151 | "//conditions:default": [], |
| Marat Dukhan | 1ce78ab | 2021-09-03 17:37:51 -0700 | [diff] [blame] | 9152 | }) + select({ |
| 9153 | ":xnn_wasmsimd_version_m87": [ |
| 9154 | "-DXNN_WASMSIMD_VERSION=87", |
| 9155 | ], |
| 9156 | ":xnn_wasmsimd_version_m88": [ |
| 9157 | "-DXNN_WASMSIMD_VERSION=88", |
| 9158 | ], |
| 9159 | ":xnn_wasmsimd_version_m91": [ |
| 9160 | "-DXNN_WASMSIMD_VERSION=91", |
| 9161 | ], |
| 9162 | "//conditions:default": [ |
| 9163 | "-DXNN_WASMSIMD_VERSION=87", |
| 9164 | ], |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9165 | }), |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9166 | gcc_copts = xnnpack_gcc_std_copts(), |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9167 | includes = ["include"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9168 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9169 | visibility = xnnpack_visibility(), |
| 9170 | deps = [ |
| 9171 | ":enable_assembly", |
| Zhi An Ng | e8c1979 | 2022-01-10 09:49:12 -0800 | [diff] [blame] | 9172 | ":enable_jit", |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 9173 | ":enable_sparse", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 9174 | ":logging_utils", |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 9175 | ":memory_planner", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9176 | ":operators", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 9177 | ":prod_microkernels", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9178 | "@clog", |
| Marat Dukhan | ab2946c | 2020-05-21 20:04:13 -0700 | [diff] [blame] | 9179 | "@FP16", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9180 | "@pthreadpool", |
| Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 9181 | ] + select({ |
| 9182 | ":emscripten": [], |
| 9183 | "//conditions:default": ["@cpuinfo"], |
| 9184 | }), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9185 | ) |
| 9186 | |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9187 | xnnpack_cc_library( |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9188 | name = "XNNPACK_test_mode", |
| 9189 | srcs = [ |
| 9190 | "src/init.c", |
| 9191 | "src/runtime.c", |
| 9192 | "src/subgraph.c", |
| 9193 | "src/tensor.c", |
| Marat Dukhan | f03da0d | 2020-06-10 16:00:20 -0700 | [diff] [blame] | 9194 | ] + SUBGRAPH_SRCS, |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9195 | hdrs = ["include/xnnpack.h"], |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 9196 | copts = [ |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9197 | "-Isrc", |
| 9198 | "-Iinclude", |
| 9199 | "-UNDEBUG", |
| 9200 | "-DXNN_TEST_MODE=1", |
| 9201 | ] + select({ |
| 9202 | ":debug_build": [], |
| 9203 | "//conditions:default": xnnpack_min_size_copts(), |
| 9204 | }) + select({ |
| 9205 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 9206 | "//conditions:default": [], |
| Marat Dukhan | 1ce78ab | 2021-09-03 17:37:51 -0700 | [diff] [blame] | 9207 | }) + select({ |
| 9208 | ":xnn_wasmsimd_version_m87": [ |
| 9209 | "-DXNN_WASMSIMD_VERSION=87", |
| 9210 | ], |
| 9211 | ":xnn_wasmsimd_version_m88": [ |
| 9212 | "-DXNN_WASMSIMD_VERSION=88", |
| 9213 | ], |
| 9214 | ":xnn_wasmsimd_version_m91": [ |
| 9215 | "-DXNN_WASMSIMD_VERSION=91", |
| 9216 | ], |
| 9217 | "//conditions:default": [ |
| 9218 | "-DXNN_WASMSIMD_VERSION=87", |
| 9219 | ], |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9220 | }), |
| 9221 | gcc_copts = xnnpack_gcc_std_copts(), |
| 9222 | includes = ["include"], |
| 9223 | msvc_copts = xnnpack_msvc_std_copts(), |
| 9224 | visibility = xnnpack_visibility(), |
| 9225 | deps = [ |
| 9226 | ":enable_assembly", |
| Zhi An Ng | e8c1979 | 2022-01-10 09:49:12 -0800 | [diff] [blame] | 9227 | ":enable_jit", |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 9228 | ":enable_sparse", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 9229 | ":logging_utils", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9230 | ":memory_planner_test_mode", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9231 | ":operators_test_mode", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 9232 | ":test_microkernels", |
| Marat Dukhan | 33fcf78 | 2020-05-24 14:27:15 -0700 | [diff] [blame] | 9233 | "@clog", |
| 9234 | "@FP16", |
| 9235 | "@pthreadpool", |
| 9236 | ] + select({ |
| 9237 | ":emscripten": [], |
| 9238 | "//conditions:default": ["@cpuinfo"], |
| 9239 | }), |
| 9240 | ) |
| 9241 | |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 9242 | # Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently |
| 9243 | # not used by the TensorFlow Lite XNNPACK delegate to minimize code size. |
| Marat Dukhan | ae046f5 | 2020-06-15 13:16:14 -0700 | [diff] [blame] | 9244 | xnnpack_cc_library( |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 9245 | name = "xnnpack_for_tflite", |
| 9246 | srcs = [ |
| 9247 | "src/init.c", |
| 9248 | "src/runtime.c", |
| 9249 | "src/subgraph.c", |
| 9250 | "src/tensor.c", |
| 9251 | ] + SUBGRAPH_SRCS, |
| 9252 | hdrs = ["include/xnnpack.h"], |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 9253 | copts = [ |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 9254 | "-Isrc", |
| 9255 | "-Iinclude", |
| 9256 | ] + select({ |
| 9257 | ":debug_build": [], |
| 9258 | "//conditions:default": xnnpack_min_size_copts(), |
| 9259 | }) + select({ |
| 9260 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 9261 | "//conditions:default": [], |
| 9262 | }), |
| Marat Dukhan | 9e92451 | 2021-12-08 00:13:45 -0800 | [diff] [blame] | 9263 | defines = select({ |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 9264 | ":xnn_enable_qu8_explicit_true": [], |
| 9265 | ":xnn_enable_qu8_explicit_false": [ |
| 9266 | "XNN_NO_QU8_OPERATORS", |
| Marat Dukhan | 0d00baa | 2021-08-16 23:59:07 -0700 | [diff] [blame] | 9267 | "XNN_NO_U8_OPERATORS", |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 9268 | ], |
| Marat Dukhan | 6507b17 | 2021-08-19 03:23:40 -0700 | [diff] [blame] | 9269 | ":emscripten": [], |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 9270 | "//conditions:default": [ |
| 9271 | "XNN_NO_QU8_OPERATORS", |
| Marat Dukhan | 0d00baa | 2021-08-16 23:59:07 -0700 | [diff] [blame] | 9272 | "XNN_NO_U8_OPERATORS", |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 9273 | ], |
| Marat Dukhan | 189c1d0 | 2021-09-03 15:39:54 -0700 | [diff] [blame] | 9274 | }) + select({ |
| 9275 | ":xnn_wasmsimd_version_m87": [ |
| 9276 | "XNN_WASMSIMD_VERSION=87", |
| 9277 | ], |
| 9278 | ":xnn_wasmsimd_version_m88": [ |
| 9279 | "XNN_WASMSIMD_VERSION=88", |
| 9280 | ], |
| 9281 | ":xnn_wasmsimd_version_m91": [ |
| 9282 | "XNN_WASMSIMD_VERSION=91", |
| 9283 | ], |
| 9284 | "//conditions:default": [ |
| 9285 | "XNN_WASMSIMD_VERSION=87", |
| 9286 | ], |
| Marat Dukhan | b939cdb | 2021-03-30 18:51:51 -0700 | [diff] [blame] | 9287 | }), |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 9288 | gcc_copts = xnnpack_gcc_std_copts(), |
| 9289 | includes = ["include"], |
| 9290 | msvc_copts = xnnpack_msvc_std_copts(), |
| 9291 | visibility = xnnpack_visibility(), |
| 9292 | deps = [ |
| 9293 | ":enable_assembly", |
| Zhi An Ng | e8c1979 | 2022-01-10 09:49:12 -0800 | [diff] [blame] | 9294 | ":enable_jit", |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 9295 | ":enable_sparse", |
| 9296 | ":logging_utils", |
| 9297 | ":memory_planner", |
| 9298 | ":operator_run", |
| 9299 | ":operators", |
| Marat Dukhan | 51c6134 | 2021-12-22 23:08:39 -0800 | [diff] [blame] | 9300 | ":amalgam_microkernels", |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 9301 | "@clog", |
| 9302 | "@FP16", |
| 9303 | "@pthreadpool", |
| 9304 | ] + select({ |
| 9305 | ":emscripten": [], |
| 9306 | "//conditions:default": ["@cpuinfo"], |
| 9307 | }), |
| 9308 | ) |
| 9309 | |
| 9310 | # Specialized XNNPACK version for TensorFlow.js. Excludes operators currently |
| 9311 | # not used by the TensorFlow.js WebAssembly backend to minimize code size. |
| 9312 | xnnpack_cc_library( |
| 9313 | name = "xnnpack_for_tfjs", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9314 | srcs = [ |
| 9315 | "src/init.c", |
| 9316 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9317 | hdrs = ["include/xnnpack.h"], |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 9318 | copts = [ |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9319 | "-Isrc", |
| 9320 | "-Iinclude", |
| 9321 | ] + select({ |
| 9322 | ":debug_build": [], |
| 9323 | "//conditions:default": xnnpack_min_size_copts(), |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 9324 | }) + select({ |
| 9325 | ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| 9326 | "//conditions:default": [], |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9327 | }), |
| 9328 | defines = [ |
| Marat Dukhan | 16f1e1a | 2020-08-04 16:38:22 -0700 | [diff] [blame] | 9329 | "XNN_NO_QS8_OPERATORS", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9330 | "XNN_NO_QU8_OPERATORS", |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 9331 | "XNN_NO_S8_OPERATORS", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9332 | "XNN_NO_U8_OPERATORS", |
| 9333 | "XNN_NO_X8_OPERATORS", |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 9334 | "XNN_NO_NCHW_OPERATORS", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9335 | ], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9336 | gcc_copts = xnnpack_gcc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9337 | includes = ["include"], |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9338 | msvc_copts = xnnpack_msvc_std_copts(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9339 | visibility = xnnpack_visibility(), |
| 9340 | deps = [ |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9341 | ":enable_assembly", |
| Zhi An Ng | e8c1979 | 2022-01-10 09:49:12 -0800 | [diff] [blame] | 9342 | ":enable_jit", |
| Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 9343 | ":logging_utils", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9344 | ":operator_run", |
| 9345 | ":operators", |
| Marat Dukhan | 2c72495 | 2021-07-27 18:46:30 -0700 | [diff] [blame] | 9346 | ":prod_microkernels", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9347 | "@clog", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9348 | "@pthreadpool", |
| Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 9349 | ] + select({ |
| 9350 | ":emscripten": [], |
| 9351 | "//conditions:default": ["@cpuinfo"], |
| 9352 | }), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9353 | ) |
| 9354 | |
| Marat Dukhan | cf056b2 | 2019-10-07 10:26:29 -0700 | [diff] [blame] | 9355 | xnnpack_cc_library( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9356 | name = "bench_utils", |
| 9357 | srcs = ["bench/utils.cc"], |
| Zhi An Ng | 717665f | 2022-01-10 15:59:11 -0800 | [diff] [blame] | 9358 | hdrs = [ |
| 9359 | "bench/utils.h", |
| 9360 | "src/xnnpack/allocator.h", |
| 9361 | ], |
| Marat Dukhan | bad48fe | 2019-11-04 10:35:22 -0800 | [diff] [blame] | 9362 | deps = [ |
| Zhi An Ng | 717665f | 2022-01-10 15:59:11 -0800 | [diff] [blame] | 9363 | ":XNNPACK", |
| 9364 | ":jit", |
| Marat Dukhan | bad48fe | 2019-11-04 10:35:22 -0800 | [diff] [blame] | 9365 | "@com_google_benchmark//:benchmark", |
| 9366 | "@cpuinfo", |
| 9367 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9368 | ) |
| 9369 | |
| Frank Barchard | 7e95597 | 2019-10-11 10:34:25 -0700 | [diff] [blame] | 9370 | ######################### Benchmarks for micro-kernels ######################### |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9371 | |
| 9372 | xnnpack_benchmark( |
| Marat Dukhan | 0744fa0 | 2021-07-26 22:56:27 -0700 | [diff] [blame] | 9373 | name = "qs8_dwconv_bench", |
| 9374 | srcs = [ |
| 9375 | "bench/dwconv.h", |
| 9376 | "bench/qs8-dwconv.cc", |
| 9377 | "src/xnnpack/AlignedAllocator.h", |
| 9378 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9379 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9380 | ":indirection", |
| 9381 | ":packing", |
| 9382 | ], |
| 9383 | ) |
| 9384 | |
| 9385 | xnnpack_benchmark( |
| Marat Dukhan | ad6f2dc | 2021-12-10 14:38:41 -0800 | [diff] [blame] | 9386 | name = "qs8_f32_vcvt_bench", |
| 9387 | srcs = [ |
| 9388 | "bench/qs8-f32-vcvt.cc", |
| 9389 | "src/xnnpack/AlignedAllocator.h", |
| 9390 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9391 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9392 | ) |
| 9393 | |
| 9394 | xnnpack_benchmark( |
| Marat Dukhan | 595e170 | 2020-07-31 10:12:52 -0700 | [diff] [blame] | 9395 | name = "qs8_gemm_bench", |
| 9396 | srcs = [ |
| 9397 | "bench/gemm.h", |
| 9398 | "bench/qs8-gemm.cc", |
| 9399 | "src/xnnpack/AlignedAllocator.h", |
| 9400 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Frank Barchard | 31328cb | 2020-10-12 11:55:18 -0700 | [diff] [blame] | 9401 | copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(), |
| Zhi An Ng | 1bef0f2 | 2022-01-07 16:13:31 -0800 | [diff] [blame] | 9402 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9403 | ":packing", |
| 9404 | ":jit", |
| 9405 | ] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(), |
| Marat Dukhan | 595e170 | 2020-07-31 10:12:52 -0700 | [diff] [blame] | 9406 | ) |
| 9407 | |
| 9408 | xnnpack_benchmark( |
| Marat Dukhan | 56bdd4a | 2020-08-03 19:47:04 -0700 | [diff] [blame] | 9409 | name = "qs8_requantization_bench", |
| 9410 | srcs = [ |
| 9411 | "bench/qs8-requantization.cc", |
| Marat Dukhan | 56bdd4a | 2020-08-03 19:47:04 -0700 | [diff] [blame] | 9412 | "src/xnnpack/AlignedAllocator.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 9413 | "src/xnnpack/requantization-stubs.h", |
| Marat Dukhan | 56bdd4a | 2020-08-03 19:47:04 -0700 | [diff] [blame] | 9414 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9415 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9416 | ) |
| 9417 | |
| 9418 | xnnpack_benchmark( |
| Marat Dukhan | 83a8d2f | 2021-07-29 16:41:19 -0700 | [diff] [blame] | 9419 | name = "qs8_vadd_bench", |
| 9420 | srcs = [ |
| 9421 | "bench/qs8-vadd.cc", |
| 9422 | "src/xnnpack/AlignedAllocator.h", |
| 9423 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9424 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9425 | ) |
| 9426 | |
| 9427 | xnnpack_benchmark( |
| 9428 | name = "qs8_vaddc_bench", |
| 9429 | srcs = [ |
| 9430 | "bench/qs8-vaddc.cc", |
| 9431 | "src/xnnpack/AlignedAllocator.h", |
| 9432 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9433 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9434 | ) |
| 9435 | |
| 9436 | xnnpack_benchmark( |
| Marat Dukhan | 795e5ab | 2021-08-02 19:07:52 -0700 | [diff] [blame] | 9437 | name = "qs8_vmul_bench", |
| 9438 | srcs = [ |
| 9439 | "bench/qs8-vmul.cc", |
| 9440 | "src/xnnpack/AlignedAllocator.h", |
| 9441 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9442 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9443 | ) |
| 9444 | |
| 9445 | xnnpack_benchmark( |
| Marat Dukhan | 8b024c9 | 2021-08-03 00:05:14 -0700 | [diff] [blame] | 9446 | name = "qs8_vmulc_bench", |
| 9447 | srcs = [ |
| 9448 | "bench/qs8-vmulc.cc", |
| 9449 | "src/xnnpack/AlignedAllocator.h", |
| 9450 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9451 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9452 | ) |
| 9453 | |
| 9454 | xnnpack_benchmark( |
| Marat Dukhan | ad6f2dc | 2021-12-10 14:38:41 -0800 | [diff] [blame] | 9455 | name = "qu8_f32_vcvt_bench", |
| 9456 | srcs = [ |
| 9457 | "bench/qu8-f32-vcvt.cc", |
| 9458 | "src/xnnpack/AlignedAllocator.h", |
| 9459 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9460 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9461 | ) |
| 9462 | |
| 9463 | xnnpack_benchmark( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9464 | name = "qu8_gemm_bench", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9465 | srcs = [ |
| 9466 | "bench/gemm.h", |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 9467 | "bench/qu8-gemm.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9468 | "src/xnnpack/AlignedAllocator.h", |
| 9469 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9470 | copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(), |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9471 | deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9472 | ) |
| 9473 | |
| 9474 | xnnpack_benchmark( |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 9475 | name = "qu8_requantization_bench", |
| 9476 | srcs = [ |
| 9477 | "bench/qu8-requantization.cc", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 9478 | "src/xnnpack/AlignedAllocator.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 9479 | "src/xnnpack/requantization-stubs.h", |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 9480 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9481 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9482 | ) |
| 9483 | |
| 9484 | xnnpack_benchmark( |
| Marat Dukhan | 1ef9de8 | 2021-07-29 17:15:33 -0700 | [diff] [blame] | 9485 | name = "qu8_vadd_bench", |
| 9486 | srcs = [ |
| 9487 | "bench/qu8-vadd.cc", |
| 9488 | "src/xnnpack/AlignedAllocator.h", |
| 9489 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9490 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9491 | ) |
| 9492 | |
| 9493 | xnnpack_benchmark( |
| 9494 | name = "qu8_vaddc_bench", |
| 9495 | srcs = [ |
| 9496 | "bench/qu8-vaddc.cc", |
| 9497 | "src/xnnpack/AlignedAllocator.h", |
| 9498 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9499 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9500 | ) |
| 9501 | |
| 9502 | xnnpack_benchmark( |
| Marat Dukhan | 795e5ab | 2021-08-02 19:07:52 -0700 | [diff] [blame] | 9503 | name = "qu8_vmul_bench", |
| 9504 | srcs = [ |
| 9505 | "bench/qu8-vmul.cc", |
| 9506 | "src/xnnpack/AlignedAllocator.h", |
| 9507 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9508 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9509 | ) |
| 9510 | |
| 9511 | xnnpack_benchmark( |
| Marat Dukhan | 8b024c9 | 2021-08-03 00:05:14 -0700 | [diff] [blame] | 9512 | name = "qu8_vmulc_bench", |
| 9513 | srcs = [ |
| 9514 | "bench/qu8-vmulc.cc", |
| 9515 | "src/xnnpack/AlignedAllocator.h", |
| 9516 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9517 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9518 | ) |
| 9519 | |
| 9520 | xnnpack_benchmark( |
| Frank Barchard | 40d20fe | 2020-05-05 00:37:45 -0700 | [diff] [blame] | 9521 | name = "f16_igemm_bench", |
| 9522 | srcs = [ |
| 9523 | "bench/f16-igemm.cc", |
| 9524 | "bench/conv.h", |
| Frank Barchard | 40d20fe | 2020-05-05 00:37:45 -0700 | [diff] [blame] | 9525 | "src/xnnpack/AlignedAllocator.h", |
| 9526 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9527 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9528 | ":indirection", |
| 9529 | ":packing", |
| 9530 | ], |
| Frank Barchard | 40d20fe | 2020-05-05 00:37:45 -0700 | [diff] [blame] | 9531 | ) |
| 9532 | |
| 9533 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9534 | name = "f16_gemm_bench", |
| 9535 | srcs = [ |
| 9536 | "bench/f16-gemm.cc", |
| 9537 | "bench/gemm.h", |
| 9538 | "src/xnnpack/AlignedAllocator.h", |
| 9539 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9540 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9541 | ":packing", |
| 9542 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9543 | ) |
| 9544 | |
| 9545 | xnnpack_benchmark( |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 9546 | name = "f16_spmm_bench", |
| 9547 | srcs = [ |
| 9548 | "bench/f16-spmm.cc", |
| Marat Dukhan | 1631e3e | 2020-12-06 19:29:31 -0800 | [diff] [blame] | 9549 | "bench/spmm.h", |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 9550 | "src/xnnpack/AlignedAllocator.h", |
| 9551 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 9552 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9553 | ) |
| 9554 | |
| 9555 | xnnpack_benchmark( |
| Marat Dukhan | 434352f | 2021-10-16 18:28:55 -0700 | [diff] [blame] | 9556 | name = "f16_f32_vcvt_bench", |
| 9557 | srcs = [ |
| 9558 | "bench/f16-f32-vcvt.cc", |
| 9559 | "src/xnnpack/AlignedAllocator.h", |
| 9560 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9561 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9562 | ) |
| 9563 | |
| 9564 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9565 | name = "f32_igemm_bench", |
| 9566 | srcs = [ |
| 9567 | "bench/f32-igemm.cc", |
| 9568 | "bench/conv.h", |
| 9569 | "src/xnnpack/AlignedAllocator.h", |
| 9570 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9571 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9572 | ":indirection", |
| 9573 | ":packing", |
| 9574 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9575 | ) |
| 9576 | |
| 9577 | xnnpack_benchmark( |
| 9578 | name = "f32_conv_hwc_bench", |
| 9579 | srcs = [ |
| 9580 | "bench/f32-conv-hwc.cc", |
| 9581 | "bench/dconv.h", |
| 9582 | "src/xnnpack/AlignedAllocator.h", |
| 9583 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9584 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9585 | ":packing", |
| 9586 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9587 | ) |
| 9588 | |
| 9589 | xnnpack_benchmark( |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 9590 | name = "f32_conv_hwc2chw_bench", |
| Erich Elsen | 563df5f | 2019-10-23 08:02:21 -0700 | [diff] [blame] | 9591 | srcs = [ |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 9592 | "bench/f32-conv-hwc2chw.cc", |
| Erich Elsen | 563df5f | 2019-10-23 08:02:21 -0700 | [diff] [blame] | 9593 | "bench/dconv.h", |
| 9594 | "src/xnnpack/AlignedAllocator.h", |
| 9595 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9596 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9597 | ":packing", |
| 9598 | ], |
| Erich Elsen | 563df5f | 2019-10-23 08:02:21 -0700 | [diff] [blame] | 9599 | ) |
| 9600 | |
| 9601 | xnnpack_benchmark( |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 9602 | name = "f16_dwconv_bench", |
| 9603 | srcs = [ |
| 9604 | "bench/f16-dwconv.cc", |
| 9605 | "bench/dwconv.h", |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 9606 | "src/xnnpack/AlignedAllocator.h", |
| 9607 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9608 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9609 | ":indirection", |
| 9610 | ":packing", |
| 9611 | ], |
| Frank Barchard | 5a599a6 | 2020-06-04 20:12:44 -0700 | [diff] [blame] | 9612 | ) |
| 9613 | |
| 9614 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9615 | name = "f32_dwconv_bench", |
| 9616 | srcs = [ |
| 9617 | "bench/f32-dwconv.cc", |
| 9618 | "bench/dwconv.h", |
| 9619 | "src/xnnpack/AlignedAllocator.h", |
| 9620 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9621 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9622 | ":indirection", |
| 9623 | ":packing", |
| 9624 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9625 | ) |
| 9626 | |
| 9627 | xnnpack_benchmark( |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9628 | name = "f32_dwconv2d_chw_bench", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9629 | srcs = [ |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9630 | "bench/f32-dwconv2d-chw.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9631 | "bench/dwconv.h", |
| 9632 | "src/xnnpack/AlignedAllocator.h", |
| 9633 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9634 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9635 | ":indirection", |
| 9636 | ":packing", |
| 9637 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9638 | ) |
| 9639 | |
| 9640 | xnnpack_benchmark( |
| Marat Dukhan | d77f77d | 2021-10-24 15:39:59 -0700 | [diff] [blame] | 9641 | name = "f32_f16_vcvt_bench", |
| 9642 | srcs = [ |
| 9643 | "bench/f32-f16-vcvt.cc", |
| 9644 | "src/xnnpack/AlignedAllocator.h", |
| 9645 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9646 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9647 | ) |
| 9648 | |
| 9649 | xnnpack_benchmark( |
| Alan Kelly | 1945f0b | 2021-12-24 01:26:45 -0800 | [diff] [blame] | 9650 | name = "x16_transpose_bench", |
| 9651 | srcs = [ |
| 9652 | "bench/x16-transpose.cc", |
| 9653 | "src/xnnpack/AlignedAllocator.h", |
| 9654 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9655 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9656 | ) |
| 9657 | |
| 9658 | xnnpack_benchmark( |
| Alan Kelly | fda06cb | 2021-12-15 03:30:32 -0800 | [diff] [blame] | 9659 | name = "x32_transpose_bench", |
| 9660 | srcs = [ |
| 9661 | "bench/x32-transpose.cc", |
| 9662 | "src/xnnpack/AlignedAllocator.h", |
| 9663 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9664 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9665 | ) |
| 9666 | |
| 9667 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9668 | name = "f32_gemm_bench", |
| 9669 | srcs = [ |
| 9670 | "bench/f32-gemm.cc", |
| 9671 | "bench/gemm.h", |
| 9672 | "src/xnnpack/AlignedAllocator.h", |
| 9673 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9674 | copts = xnnpack_optional_ruy_copts(), |
| Zhi An Ng | 25764d8 | 2022-01-07 11:27:36 -0800 | [diff] [blame] | 9675 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9676 | ":packing", |
| 9677 | ":jit", |
| 9678 | ] + xnnpack_optional_ruy_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9679 | ) |
| 9680 | |
| 9681 | xnnpack_benchmark( |
| Marat Dukhan | 563eee1 | 2021-12-02 14:44:25 -0800 | [diff] [blame] | 9682 | name = "f32_qs8_vcvt_bench", |
| 9683 | srcs = [ |
| 9684 | "bench/f32-qs8-vcvt.cc", |
| 9685 | "src/xnnpack/AlignedAllocator.h", |
| 9686 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9687 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9688 | ) |
| 9689 | |
| 9690 | xnnpack_benchmark( |
| 9691 | name = "f32_qu8_vcvt_bench", |
| 9692 | srcs = [ |
| 9693 | "bench/f32-qu8-vcvt.cc", |
| 9694 | "src/xnnpack/AlignedAllocator.h", |
| 9695 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9696 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9697 | ) |
| 9698 | |
| 9699 | xnnpack_benchmark( |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 9700 | name = "f32_raddexpminusmax_bench", |
| 9701 | srcs = [ |
| 9702 | "bench/f32-raddexpminusmax.cc", |
| 9703 | "src/xnnpack/AlignedAllocator.h", |
| 9704 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9705 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9706 | ) |
| 9707 | |
| 9708 | xnnpack_benchmark( |
| 9709 | name = "f32_raddextexp_bench", |
| 9710 | srcs = [ |
| 9711 | "bench/f32-raddextexp.cc", |
| 9712 | "src/xnnpack/AlignedAllocator.h", |
| 9713 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9714 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9715 | ) |
| 9716 | |
| 9717 | xnnpack_benchmark( |
| 9718 | name = "f32_raddstoreexpminusmax_bench", |
| 9719 | srcs = [ |
| 9720 | "bench/f32-raddstoreexpminusmax.cc", |
| 9721 | "src/xnnpack/AlignedAllocator.h", |
| 9722 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9723 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9724 | ) |
| 9725 | |
| 9726 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9727 | name = "f32_rmax_bench", |
| 9728 | srcs = [ |
| 9729 | "bench/f32-rmax.cc", |
| 9730 | "src/xnnpack/AlignedAllocator.h", |
| 9731 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9732 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9733 | ) |
| 9734 | |
| 9735 | xnnpack_benchmark( |
| 9736 | name = "f32_spmm_bench", |
| 9737 | srcs = [ |
| 9738 | "bench/f32-spmm.cc", |
| Marat Dukhan | 1631e3e | 2020-12-06 19:29:31 -0800 | [diff] [blame] | 9739 | "bench/spmm.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9740 | "src/xnnpack/AlignedAllocator.h", |
| 9741 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9742 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9743 | ) |
| 9744 | |
| 9745 | xnnpack_benchmark( |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 9746 | name = "f32_softmax_bench", |
| Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 9747 | srcs = [ |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 9748 | "bench/f32-softmax.cc", |
| Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 9749 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 9750 | copts = xnnpack_optional_dnnl_copts(), |
| Marat Dukhan | 8d3c693 | 2020-03-06 20:27:27 -0800 | [diff] [blame] | 9751 | deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(), |
| Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 9752 | ) |
| 9753 | |
| 9754 | xnnpack_benchmark( |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9755 | name = "f32_velu_bench", |
| 9756 | srcs = [ |
| 9757 | "bench/f32-velu.cc", |
| 9758 | "src/xnnpack/AlignedAllocator.h", |
| 9759 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9760 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9761 | ) |
| 9762 | |
| 9763 | xnnpack_benchmark( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 9764 | name = "f32_vhswish_bench", |
| 9765 | srcs = [ |
| 9766 | "bench/f32-vhswish.cc", |
| 9767 | "src/xnnpack/AlignedAllocator.h", |
| 9768 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9769 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9770 | ) |
| 9771 | |
| 9772 | xnnpack_benchmark( |
| Marat Dukhan | 7c74aff | 2021-08-07 15:44:27 -0700 | [diff] [blame] | 9773 | name = "f32_vlrelu_bench", |
| 9774 | srcs = [ |
| 9775 | "bench/f32-vlrelu.cc", |
| 9776 | "src/xnnpack/AlignedAllocator.h", |
| 9777 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9778 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9779 | ) |
| 9780 | |
| 9781 | xnnpack_benchmark( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 9782 | name = "f32_vrelu_bench", |
| 9783 | srcs = [ |
| 9784 | "bench/f32-vrelu.cc", |
| 9785 | "src/xnnpack/AlignedAllocator.h", |
| 9786 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9787 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9788 | ) |
| 9789 | |
| 9790 | xnnpack_benchmark( |
| Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 9791 | name = "f32_vscaleexpminusmax_bench", |
| 9792 | srcs = [ |
| 9793 | "bench/f32-vscaleexpminusmax.cc", |
| 9794 | "src/xnnpack/AlignedAllocator.h", |
| 9795 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9796 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9797 | ) |
| 9798 | |
| 9799 | xnnpack_benchmark( |
| 9800 | name = "f32_vscaleextexp_bench", |
| 9801 | srcs = [ |
| 9802 | "bench/f32-vscaleextexp.cc", |
| 9803 | "src/xnnpack/AlignedAllocator.h", |
| 9804 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9805 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9806 | ) |
| 9807 | |
| 9808 | xnnpack_benchmark( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 9809 | name = "f32_vsigmoid_bench", |
| 9810 | srcs = [ |
| 9811 | "bench/f32-vsigmoid.cc", |
| 9812 | "src/xnnpack/AlignedAllocator.h", |
| 9813 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9814 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9815 | ) |
| 9816 | |
| 9817 | xnnpack_benchmark( |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 9818 | name = "f32_vsqrt_bench", |
| 9819 | srcs = [ |
| 9820 | "bench/f32-vsqrt.cc", |
| 9821 | "src/xnnpack/AlignedAllocator.h", |
| 9822 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9823 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9824 | ) |
| 9825 | |
| 9826 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9827 | name = "f32_im2col_gemm_bench", |
| 9828 | srcs = [ |
| 9829 | "bench/f32-im2col-gemm.cc", |
| 9830 | "bench/conv.h", |
| 9831 | "src/xnnpack/AlignedAllocator.h", |
| 9832 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 9833 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 9834 | ":im2col", |
| 9835 | ":packing", |
| 9836 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9837 | ) |
| 9838 | |
| Marat Dukhan | fe7acb6 | 2020-03-09 19:30:05 -0700 | [diff] [blame] | 9839 | xnnpack_benchmark( |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 9840 | name = "rounding_bench", |
| 9841 | srcs = [ |
| 9842 | "bench/rounding.cc", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 9843 | "src/xnnpack/AlignedAllocator.h", |
| Frank Barchard | 04336c1 | 2020-10-22 16:48:55 -0700 | [diff] [blame] | 9844 | "src/xnnpack/math-stubs.h", |
| Marat Dukhan | ffbf96a | 2020-05-14 02:59:08 -0700 | [diff] [blame] | 9845 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9846 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9847 | ) |
| 9848 | |
| Marat Dukhan | 5407437 | 2021-09-08 23:28:46 -0700 | [diff] [blame] | 9849 | xnnpack_benchmark( |
| 9850 | name = "x8_lut_bench", |
| 9851 | srcs = [ |
| 9852 | "bench/x8-lut.cc", |
| 9853 | "src/xnnpack/AlignedAllocator.h", |
| 9854 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 9855 | deps = MICROKERNEL_BENCHMARK_DEPS, |
| 9856 | ) |
| 9857 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9858 | ########################### Benchmarks for operators ########################### |
| 9859 | |
| 9860 | xnnpack_benchmark( |
| Marat Dukhan | 3ddc20c | 2021-12-31 10:15:28 -0800 | [diff] [blame] | 9861 | name = "abs_bench", |
| 9862 | srcs = ["bench/abs.cc"], |
| 9863 | copts = xnnpack_optional_tflite_copts(), |
| 9864 | tags = ["nowin32"], |
| 9865 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9866 | ) |
| 9867 | |
| 9868 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9869 | name = "average_pooling_bench", |
| 9870 | srcs = ["bench/average-pooling.cc"], |
| Marat Dukhan | 7a16d8b | 2020-03-11 04:22:44 -0700 | [diff] [blame] | 9871 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 9872 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9873 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9874 | ) |
| 9875 | |
| 9876 | xnnpack_benchmark( |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 9877 | name = "bankers_rounding_bench", |
| 9878 | srcs = ["bench/bankers-rounding.cc"], |
| 9879 | copts = xnnpack_optional_tflite_copts(), |
| 9880 | tags = ["nowin32"], |
| 9881 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9882 | ) |
| 9883 | |
| 9884 | xnnpack_benchmark( |
| 9885 | name = "ceiling_bench", |
| 9886 | srcs = ["bench/ceiling.cc"], |
| 9887 | copts = xnnpack_optional_tflite_copts(), |
| 9888 | tags = ["nowin32"], |
| 9889 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9890 | ) |
| 9891 | |
| 9892 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9893 | name = "channel_shuffle_bench", |
| 9894 | srcs = ["bench/channel-shuffle.cc"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9895 | deps = OPERATOR_BENCHMARK_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9896 | ) |
| 9897 | |
| 9898 | xnnpack_benchmark( |
| Marat Dukhan | 710fb42 | 2021-12-13 16:32:26 -0800 | [diff] [blame] | 9899 | name = "convert_bench", |
| 9900 | srcs = [ |
| 9901 | "bench/convert.cc", |
| 9902 | ], |
| 9903 | copts = xnnpack_optional_tflite_copts(), |
| 9904 | tags = ["nowin32"], |
| 9905 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9906 | ) |
| 9907 | |
| 9908 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9909 | name = "convolution_bench", |
| 9910 | srcs = ["bench/convolution.cc"], |
| 9911 | copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 9912 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9913 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9914 | ) |
| 9915 | |
| 9916 | xnnpack_benchmark( |
| 9917 | name = "deconvolution_bench", |
| 9918 | srcs = ["bench/deconvolution.cc"], |
| 9919 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 9920 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9921 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9922 | ) |
| 9923 | |
| 9924 | xnnpack_benchmark( |
| Marat Dukhan | b6bd4bc | 2020-12-01 17:01:40 -0800 | [diff] [blame] | 9925 | name = "elu_bench", |
| 9926 | srcs = ["bench/elu.cc"], |
| 9927 | copts = xnnpack_optional_tflite_copts(), |
| 9928 | tags = ["nowin32"], |
| 9929 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9930 | ) |
| 9931 | |
| 9932 | xnnpack_benchmark( |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 9933 | name = "floor_bench", |
| 9934 | srcs = ["bench/floor.cc"], |
| 9935 | copts = xnnpack_optional_tflite_copts(), |
| 9936 | tags = ["nowin32"], |
| 9937 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9938 | ) |
| 9939 | |
| 9940 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9941 | name = "global_average_pooling_bench", |
| 9942 | srcs = ["bench/global-average-pooling.cc"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9943 | deps = OPERATOR_BENCHMARK_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9944 | ) |
| 9945 | |
| 9946 | xnnpack_benchmark( |
| Marat Dukhan | ad35260 | 2020-06-25 21:50:54 -0700 | [diff] [blame] | 9947 | name = "hardswish_bench", |
| 9948 | srcs = ["bench/hardswish.cc"], |
| 9949 | copts = xnnpack_optional_tflite_copts(), |
| 9950 | tags = ["nowin32"], |
| 9951 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9952 | ) |
| 9953 | |
| 9954 | xnnpack_benchmark( |
| Marat Dukhan | 5c7fd89 | 2021-12-30 16:04:23 -0800 | [diff] [blame] | 9955 | name = "leaky_relu_bench", |
| 9956 | srcs = ["bench/leaky-relu.cc"], |
| 9957 | copts = xnnpack_optional_tflite_copts(), |
| 9958 | tags = ["nowin32"], |
| 9959 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9960 | ) |
| 9961 | |
| 9962 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9963 | name = "max_pooling_bench", |
| 9964 | srcs = ["bench/max-pooling.cc"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9965 | deps = OPERATOR_BENCHMARK_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9966 | ) |
| 9967 | |
| 9968 | xnnpack_benchmark( |
| Marat Dukhan | 3ddc20c | 2021-12-31 10:15:28 -0800 | [diff] [blame] | 9969 | name = "negate_bench", |
| 9970 | srcs = ["bench/negate.cc"], |
| 9971 | copts = xnnpack_optional_tflite_copts(), |
| 9972 | tags = ["nowin32"], |
| 9973 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 9974 | ) |
| 9975 | |
| 9976 | xnnpack_benchmark( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9977 | name = "sigmoid_bench", |
| 9978 | srcs = ["bench/sigmoid.cc"], |
| Marat Dukhan | c3b9e86 | 2019-11-17 13:18:54 -0800 | [diff] [blame] | 9979 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | ca2ba70 | 2020-04-24 01:31:47 -0700 | [diff] [blame] | 9980 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9981 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9982 | ) |
| 9983 | |
| 9984 | xnnpack_benchmark( |
| Marat Dukhan | 95b2243 | 2019-10-30 16:30:14 -0700 | [diff] [blame] | 9985 | name = "prelu_bench", |
| 9986 | srcs = ["bench/prelu.cc"], |
| 9987 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | 8ea0b07 | 2020-04-23 16:12:18 -0700 | [diff] [blame] | 9988 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9989 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 95b2243 | 2019-10-30 16:30:14 -0700 | [diff] [blame] | 9990 | ) |
| 9991 | |
| 9992 | xnnpack_benchmark( |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 9993 | name = "softmax_bench", |
| 9994 | srcs = ["bench/softmax.cc"], |
| Marat Dukhan | 9c0db96 | 2020-01-28 12:30:14 -0800 | [diff] [blame] | 9995 | copts = xnnpack_optional_tflite_copts(), |
| Marat Dukhan | ca2ba70 | 2020-04-24 01:31:47 -0700 | [diff] [blame] | 9996 | tags = ["nowin32"], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 9997 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 9998 | ) |
| 9999 | |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 10000 | xnnpack_benchmark( |
| Marat Dukhan | 3ddc20c | 2021-12-31 10:15:28 -0800 | [diff] [blame] | 10001 | name = "square_bench", |
| 10002 | srcs = ["bench/square.cc"], |
| 10003 | copts = xnnpack_optional_tflite_copts(), |
| 10004 | tags = ["nowin32"], |
| 10005 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 10006 | ) |
| 10007 | |
| 10008 | xnnpack_benchmark( |
| Marat Dukhan | 6804bbd | 2020-06-30 19:26:11 -0700 | [diff] [blame] | 10009 | name = "square_root_bench", |
| 10010 | srcs = ["bench/square-root.cc"], |
| 10011 | copts = xnnpack_optional_tflite_copts(), |
| 10012 | tags = ["nowin32"], |
| 10013 | deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| 10014 | ) |
| 10015 | |
| 10016 | xnnpack_benchmark( |
| Marat Dukhan | 8772714 | 2020-06-24 15:24:10 -0700 | [diff] [blame] | 10017 | name = "truncation_bench", |
| 10018 | srcs = ["bench/truncation.cc"], |
| 10019 | deps = OPERATOR_BENCHMARK_DEPS, |
| 10020 | ) |
| 10021 | |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 10022 | ############################# End-to-end benchmarks ############################ |
| 10023 | |
| 10024 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10025 | name = "fp32_mobilenet_v1", |
| 10026 | srcs = ["models/fp32-mobilenet-v1.cc"], |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 10027 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 10028 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 10029 | linkstatic = True, |
| 10030 | deps = [ |
| 10031 | ":XNNPACK", |
| 10032 | "@pthreadpool", |
| 10033 | ], |
| 10034 | ) |
| 10035 | |
| 10036 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 10037 | name = "fp32_sparse_mobilenet_v1", |
| 10038 | srcs = ["models/fp32-sparse-mobilenet-v1.cc"], |
| 10039 | hdrs = ["models/models.h"], |
| 10040 | copts = xnnpack_std_cxxopts(), |
| 10041 | linkstatic = True, |
| 10042 | deps = [ |
| 10043 | ":XNNPACK", |
| 10044 | "@pthreadpool", |
| 10045 | ], |
| 10046 | ) |
| 10047 | |
| 10048 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10049 | name = "fp16_mobilenet_v1", |
| 10050 | srcs = ["models/fp16-mobilenet-v1.cc"], |
| 10051 | hdrs = ["models/models.h"], |
| 10052 | copts = xnnpack_std_cxxopts(), |
| 10053 | linkstatic = True, |
| 10054 | deps = [ |
| 10055 | ":XNNPACK", |
| 10056 | "@FP16", |
| 10057 | "@pthreadpool", |
| 10058 | ], |
| 10059 | ) |
| 10060 | |
| 10061 | cc_library( |
| Marat Dukhan | e252f92 | 2021-08-31 08:57:41 -0700 | [diff] [blame] | 10062 | name = "qc8_mobilenet_v1", |
| 10063 | srcs = ["models/qc8-mobilenet-v1.cc"], |
| 10064 | hdrs = ["models/models.h"], |
| 10065 | copts = xnnpack_std_cxxopts(), |
| 10066 | linkstatic = True, |
| 10067 | deps = [ |
| 10068 | ":XNNPACK", |
| 10069 | "@pthreadpool", |
| 10070 | ], |
| 10071 | ) |
| 10072 | |
| 10073 | cc_library( |
| 10074 | name = "qc8_mobilenet_v2", |
| 10075 | srcs = ["models/qc8-mobilenet-v2.cc"], |
| 10076 | hdrs = ["models/models.h"], |
| 10077 | copts = xnnpack_std_cxxopts(), |
| 10078 | linkstatic = True, |
| 10079 | deps = [ |
| 10080 | ":XNNPACK", |
| 10081 | "@pthreadpool", |
| 10082 | ], |
| 10083 | ) |
| 10084 | |
| 10085 | cc_library( |
| Marat Dukhan | 0743cdf | 2020-08-04 18:52:07 -0700 | [diff] [blame] | 10086 | name = "qs8_mobilenet_v1", |
| 10087 | srcs = ["models/qs8-mobilenet-v1.cc"], |
| 10088 | hdrs = ["models/models.h"], |
| 10089 | copts = xnnpack_std_cxxopts(), |
| 10090 | linkstatic = True, |
| 10091 | deps = [ |
| 10092 | ":XNNPACK", |
| 10093 | "@pthreadpool", |
| 10094 | ], |
| 10095 | ) |
| 10096 | |
| 10097 | cc_library( |
| Marat Dukhan | 70a9618 | 2020-09-03 17:13:58 -0700 | [diff] [blame] | 10098 | name = "qs8_mobilenet_v2", |
| 10099 | srcs = ["models/qs8-mobilenet-v2.cc"], |
| 10100 | hdrs = ["models/models.h"], |
| 10101 | copts = xnnpack_std_cxxopts(), |
| 10102 | linkstatic = True, |
| 10103 | deps = [ |
| 10104 | ":XNNPACK", |
| 10105 | "@pthreadpool", |
| 10106 | ], |
| 10107 | ) |
| 10108 | |
| 10109 | cc_library( |
| Marat Dukhan | 12a23bb | 2021-03-08 08:13:21 -0800 | [diff] [blame] | 10110 | name = "qu8_mobilenet_v1", |
| 10111 | srcs = ["models/qu8-mobilenet-v1.cc"], |
| 10112 | hdrs = ["models/models.h"], |
| 10113 | copts = xnnpack_std_cxxopts(), |
| 10114 | linkstatic = True, |
| 10115 | deps = [ |
| 10116 | ":XNNPACK", |
| 10117 | "@pthreadpool", |
| 10118 | ], |
| 10119 | ) |
| 10120 | |
| 10121 | cc_library( |
| Marat Dukhan | 036b2b1 | 2021-07-21 01:12:58 -0700 | [diff] [blame] | 10122 | name = "qu8_mobilenet_v2", |
| 10123 | srcs = ["models/qu8-mobilenet-v2.cc"], |
| 10124 | hdrs = ["models/models.h"], |
| 10125 | copts = xnnpack_std_cxxopts(), |
| 10126 | linkstatic = True, |
| 10127 | deps = [ |
| 10128 | ":XNNPACK", |
| 10129 | "@pthreadpool", |
| 10130 | ], |
| 10131 | ) |
| 10132 | |
| 10133 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10134 | name = "fp32_mobilenet_v2", |
| 10135 | srcs = ["models/fp32-mobilenet-v2.cc"], |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 10136 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 10137 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 10138 | linkstatic = True, |
| 10139 | deps = [ |
| 10140 | ":XNNPACK", |
| 10141 | "@pthreadpool", |
| 10142 | ], |
| 10143 | ) |
| 10144 | |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 10145 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 10146 | name = "fp32_sparse_mobilenet_v2", |
| 10147 | srcs = ["models/fp32-sparse-mobilenet-v2.cc"], |
| 10148 | hdrs = ["models/models.h"], |
| 10149 | copts = xnnpack_std_cxxopts(), |
| 10150 | linkstatic = True, |
| 10151 | deps = [ |
| 10152 | ":XNNPACK", |
| 10153 | "@pthreadpool", |
| 10154 | ], |
| 10155 | ) |
| 10156 | |
| 10157 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10158 | name = "fp16_mobilenet_v2", |
| 10159 | srcs = ["models/fp16-mobilenet-v2.cc"], |
| 10160 | hdrs = ["models/models.h"], |
| 10161 | copts = xnnpack_std_cxxopts(), |
| 10162 | linkstatic = True, |
| 10163 | deps = [ |
| 10164 | ":XNNPACK", |
| 10165 | "@FP16", |
| 10166 | "@pthreadpool", |
| 10167 | ], |
| 10168 | ) |
| 10169 | |
| 10170 | cc_library( |
| 10171 | name = "fp32_mobilenet_v3_large", |
| 10172 | srcs = ["models/fp32-mobilenet-v3-large.cc"], |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 10173 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 10174 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 10175 | linkstatic = True, |
| 10176 | deps = [ |
| 10177 | ":XNNPACK", |
| 10178 | "@pthreadpool", |
| 10179 | ], |
| 10180 | ) |
| 10181 | |
| 10182 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 10183 | name = "fp32_sparse_mobilenet_v3_large", |
| 10184 | srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"], |
| 10185 | hdrs = ["models/models.h"], |
| 10186 | copts = xnnpack_std_cxxopts(), |
| 10187 | linkstatic = True, |
| 10188 | deps = [ |
| 10189 | ":XNNPACK", |
| 10190 | "@pthreadpool", |
| 10191 | ], |
| 10192 | ) |
| 10193 | |
| 10194 | cc_library( |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 10195 | name = "fp16_mobilenet_v3_large", |
| 10196 | srcs = ["models/fp16-mobilenet-v3-large.cc"], |
| 10197 | hdrs = ["models/models.h"], |
| 10198 | copts = xnnpack_std_cxxopts(), |
| 10199 | linkstatic = True, |
| 10200 | deps = [ |
| 10201 | ":XNNPACK", |
| 10202 | "@FP16", |
| 10203 | "@pthreadpool", |
| 10204 | ], |
| 10205 | ) |
| 10206 | |
| 10207 | cc_library( |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10208 | name = "fp32_mobilenet_v3_small", |
| 10209 | srcs = ["models/fp32-mobilenet-v3-small.cc"], |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 10210 | hdrs = ["models/models.h"], |
| Marat Dukhan | a84e40b | 2019-12-11 15:38:03 -0800 | [diff] [blame] | 10211 | copts = xnnpack_std_cxxopts(), |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 10212 | linkstatic = True, |
| 10213 | deps = [ |
| 10214 | ":XNNPACK", |
| 10215 | "@pthreadpool", |
| 10216 | ], |
| 10217 | ) |
| 10218 | |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 10219 | cc_library( |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 10220 | name = "fp32_sparse_mobilenet_v3_small", |
| 10221 | srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"], |
| 10222 | hdrs = ["models/models.h"], |
| 10223 | copts = xnnpack_std_cxxopts(), |
| 10224 | linkstatic = True, |
| 10225 | deps = [ |
| 10226 | ":XNNPACK", |
| 10227 | "@pthreadpool", |
| 10228 | ], |
| 10229 | ) |
| 10230 | |
| 10231 | cc_library( |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 10232 | name = "fp16_mobilenet_v3_small", |
| 10233 | srcs = ["models/fp16-mobilenet-v3-small.cc"], |
| 10234 | hdrs = ["models/models.h"], |
| 10235 | copts = xnnpack_std_cxxopts(), |
| 10236 | linkstatic = True, |
| 10237 | deps = [ |
| 10238 | ":XNNPACK", |
| 10239 | "@FP16", |
| 10240 | "@pthreadpool", |
| 10241 | ], |
| 10242 | ) |
| 10243 | |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 10244 | xnnpack_benchmark( |
| Marat Dukhan | ef4416e | 2019-10-31 13:44:40 -0700 | [diff] [blame] | 10245 | name = "f32_dwconv_e2e_bench", |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 10246 | srcs = [ |
| 10247 | "bench/f32-dwconv-e2e.cc", |
| 10248 | "bench/end2end.h", |
| 10249 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | ef4416e | 2019-10-31 13:44:40 -0700 | [diff] [blame] | 10250 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 10251 | ":XNNPACK", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10252 | ":fp32_mobilenet_v1", |
| 10253 | ":fp32_mobilenet_v2", |
| 10254 | ":fp32_mobilenet_v3_large", |
| 10255 | ":fp32_mobilenet_v3_small", |
| Marat Dukhan | ef4416e | 2019-10-31 13:44:40 -0700 | [diff] [blame] | 10256 | ], |
| 10257 | ) |
| 10258 | |
| 10259 | xnnpack_benchmark( |
| Marat Dukhan | 5f18d26 | 2019-10-31 10:24:14 -0700 | [diff] [blame] | 10260 | name = "f32_gemm_e2e_bench", |
| Marat Dukhan | c08cdf5 | 2019-12-09 09:17:51 -0800 | [diff] [blame] | 10261 | srcs = [ |
| 10262 | "bench/f32-gemm-e2e.cc", |
| 10263 | "bench/end2end.h", |
| 10264 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| Marat Dukhan | 5f18d26 | 2019-10-31 10:24:14 -0700 | [diff] [blame] | 10265 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 10266 | ":XNNPACK", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10267 | ":fp32_mobilenet_v1", |
| 10268 | ":fp32_mobilenet_v2", |
| 10269 | ":fp32_mobilenet_v3_large", |
| 10270 | ":fp32_mobilenet_v3_small", |
| Zhi An Ng | 717665f | 2022-01-10 15:59:11 -0800 | [diff] [blame] | 10271 | ":jit", |
| Marat Dukhan | 5f18d26 | 2019-10-31 10:24:14 -0700 | [diff] [blame] | 10272 | ], |
| 10273 | ) |
| 10274 | |
| 10275 | xnnpack_benchmark( |
| Marat Dukhan | bbfc6d3 | 2021-07-26 18:31:02 -0700 | [diff] [blame] | 10276 | name = "qs8_dwconv_e2e_bench", |
| 10277 | srcs = [ |
| 10278 | "bench/qs8-dwconv-e2e.cc", |
| 10279 | "bench/end2end.h", |
| 10280 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 10281 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 10282 | ":XNNPACK", |
| 10283 | ":qs8_mobilenet_v1", |
| 10284 | ":qs8_mobilenet_v2", |
| 10285 | ], |
| 10286 | ) |
| 10287 | |
| 10288 | xnnpack_benchmark( |
| Frank Barchard | dc909cb | 2021-02-08 13:59:31 -0800 | [diff] [blame] | 10289 | name = "qs8_gemm_e2e_bench", |
| 10290 | srcs = [ |
| 10291 | "bench/qs8-gemm-e2e.cc", |
| 10292 | "bench/end2end.h", |
| 10293 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 10294 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 10295 | ":XNNPACK", |
| 10296 | ":qs8_mobilenet_v1", |
| 10297 | ":qs8_mobilenet_v2", |
| 10298 | ], |
| 10299 | ) |
| 10300 | |
| 10301 | xnnpack_benchmark( |
| Frank Barchard | 9098aba | 2021-08-12 12:20:03 -0700 | [diff] [blame] | 10302 | name = "qu8_gemm_e2e_bench", |
| 10303 | srcs = [ |
| 10304 | "bench/qu8-gemm-e2e.cc", |
| 10305 | "bench/end2end.h", |
| 10306 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 10307 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 10308 | ":XNNPACK", |
| 10309 | ":qu8_mobilenet_v1", |
| 10310 | ":qu8_mobilenet_v2", |
| 10311 | ], |
| 10312 | ) |
| 10313 | |
| 10314 | xnnpack_benchmark( |
| Marat Dukhan | 6084fb8 | 2021-07-27 07:45:02 -0700 | [diff] [blame] | 10315 | name = "qu8_dwconv_e2e_bench", |
| 10316 | srcs = [ |
| 10317 | "bench/qu8-dwconv-e2e.cc", |
| 10318 | "bench/end2end.h", |
| 10319 | ] + MICROKERNEL_BENCHMARK_HDRS, |
| 10320 | deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| 10321 | ":XNNPACK", |
| 10322 | ":qu8_mobilenet_v1", |
| 10323 | ":qu8_mobilenet_v2", |
| 10324 | ], |
| 10325 | ) |
| 10326 | |
| 10327 | xnnpack_benchmark( |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 10328 | name = "end2end_bench", |
| 10329 | srcs = ["bench/end2end.cc"], |
| 10330 | deps = [ |
| 10331 | ":XNNPACK", |
| Frank Barchard | c712fa4 | 2019-10-31 14:00:21 -0700 | [diff] [blame] | 10332 | ":bench_utils", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10333 | ":fp16_mobilenet_v1", |
| 10334 | ":fp16_mobilenet_v2", |
| Marat Dukhan | 66f3ccd | 2020-09-14 16:09:38 -0700 | [diff] [blame] | 10335 | ":fp16_mobilenet_v3_large", |
| 10336 | ":fp16_mobilenet_v3_small", |
| Marat Dukhan | 270a2c4 | 2020-06-26 16:45:52 -0700 | [diff] [blame] | 10337 | ":fp32_mobilenet_v1", |
| 10338 | ":fp32_mobilenet_v2", |
| 10339 | ":fp32_mobilenet_v3_large", |
| 10340 | ":fp32_mobilenet_v3_small", |
| Marat Dukhan | 4cea232 | 2021-03-09 09:35:36 -0800 | [diff] [blame] | 10341 | ":fp32_sparse_mobilenet_v1", |
| 10342 | ":fp32_sparse_mobilenet_v2", |
| 10343 | ":fp32_sparse_mobilenet_v3_large", |
| 10344 | ":fp32_sparse_mobilenet_v3_small", |
| Marat Dukhan | e252f92 | 2021-08-31 08:57:41 -0700 | [diff] [blame] | 10345 | ":qc8_mobilenet_v1", |
| 10346 | ":qc8_mobilenet_v2", |
| Marat Dukhan | 0743cdf | 2020-08-04 18:52:07 -0700 | [diff] [blame] | 10347 | ":qs8_mobilenet_v1", |
| Marat Dukhan | 70a9618 | 2020-09-03 17:13:58 -0700 | [diff] [blame] | 10348 | ":qs8_mobilenet_v2", |
| Marat Dukhan | 12a23bb | 2021-03-08 08:13:21 -0800 | [diff] [blame] | 10349 | ":qu8_mobilenet_v1", |
| Marat Dukhan | 036b2b1 | 2021-07-21 01:12:58 -0700 | [diff] [blame] | 10350 | ":qu8_mobilenet_v2", |
| Marat Dukhan | c068bb6 | 2019-10-04 13:24:39 -0700 | [diff] [blame] | 10351 | "@pthreadpool", |
| 10352 | ], |
| 10353 | ) |
| 10354 | |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 10355 | #################### Accuracy evaluation for math functions #################### |
| 10356 | |
| 10357 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10358 | name = "f32_exp_ulp_eval", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 10359 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10360 | "eval/f32-exp-ulp.cc", |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 10361 | "src/xnnpack/AlignedAllocator.h", |
| 10362 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 10363 | deps = ACCURACY_EVAL_DEPS + [ |
| 10364 | ":bench_utils", |
| 10365 | "@cpuinfo", |
| 10366 | ], |
| Marat Dukhan | 6adff4e | 2019-10-14 18:32:07 -0700 | [diff] [blame] | 10367 | ) |
| 10368 | |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 10369 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10370 | name = "f32_expminus_ulp_eval", |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 10371 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10372 | "eval/f32-expminus-ulp.cc", |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 10373 | "src/xnnpack/AlignedAllocator.h", |
| 10374 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 10375 | deps = ACCURACY_EVAL_DEPS + [ |
| 10376 | ":bench_utils", |
| 10377 | "@cpuinfo", |
| 10378 | ], |
| Marat Dukhan | 515c977 | 2019-10-17 18:07:57 -0700 | [diff] [blame] | 10379 | ) |
| 10380 | |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 10381 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10382 | name = "f32_expm1minus_ulp_eval", |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 10383 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10384 | "eval/f32-expm1minus-ulp.cc", |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 10385 | "src/xnnpack/AlignedAllocator.h", |
| 10386 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 10387 | deps = ACCURACY_EVAL_DEPS + [ |
| 10388 | ":bench_utils", |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 10389 | "@cpuinfo", |
| Marat Dukhan | de390d4 | 2020-11-29 19:32:18 -0800 | [diff] [blame] | 10390 | ], |
| Marat Dukhan | a438aca | 2020-11-20 15:45:01 -0800 | [diff] [blame] | 10391 | ) |
| 10392 | |
| 10393 | xnnpack_benchmark( |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10394 | name = "f32_extexp_ulp_eval", |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 10395 | srcs = [ |
| Marat Dukhan | cf67ec6 | 2020-12-14 09:56:37 -0800 | [diff] [blame] | 10396 | "eval/f32-extexp-ulp.cc", |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 10397 | "src/xnnpack/AlignedAllocator.h", |
| 10398 | ] + ACCURACY_EVAL_HDRS, |
| Marat Dukhan | 3a30521 | 2020-12-06 19:24:27 -0800 | [diff] [blame] | 10399 | deps = ACCURACY_EVAL_DEPS + [ |
| 10400 | ":bench_utils", |
| 10401 | "@cpuinfo", |
| 10402 | ], |
| Marat Dukhan | 98ba441 | 2019-10-23 02:14:28 -0700 | [diff] [blame] | 10403 | ) |
| 10404 | |
| Marat Dukhan | f44f022 | 2020-12-14 11:53:27 -0800 | [diff] [blame] | 10405 | xnnpack_benchmark( |
| 10406 | name = "f32_sigmoid_ulp_eval", |
| 10407 | srcs = [ |
| 10408 | "eval/f32-sigmoid-ulp.cc", |
| 10409 | "src/xnnpack/AlignedAllocator.h", |
| 10410 | ] + ACCURACY_EVAL_HDRS, |
| 10411 | deps = ACCURACY_EVAL_DEPS + [ |
| 10412 | ":bench_utils", |
| 10413 | "@cpuinfo", |
| 10414 | ], |
| 10415 | ) |
| 10416 | |
| 10417 | xnnpack_benchmark( |
| 10418 | name = "f32_sqrt_ulp_eval", |
| 10419 | srcs = [ |
| 10420 | "eval/f32-sqrt-ulp.cc", |
| 10421 | "src/xnnpack/AlignedAllocator.h", |
| 10422 | ] + ACCURACY_EVAL_HDRS, |
| 10423 | deps = ACCURACY_EVAL_DEPS + [ |
| 10424 | ":bench_utils", |
| 10425 | "@cpuinfo", |
| 10426 | ], |
| 10427 | ) |
| 10428 | |
| 10429 | ################### Accuracy verification for math functions ################## |
| 10430 | |
| 10431 | xnnpack_unit_test( |
| Marat Dukhan | 3ed866b | 2021-09-29 08:23:33 -0700 | [diff] [blame] | 10432 | name = "f16_f32_cvt_eval", |
| 10433 | srcs = [ |
| 10434 | "eval/f16-f32-cvt.cc", |
| 10435 | "src/xnnpack/AlignedAllocator.h", |
| 10436 | "src/xnnpack/math-stubs.h", |
| 10437 | ] + MICROKERNEL_TEST_HDRS, |
| 10438 | automatic = False, |
| 10439 | deps = MICROKERNEL_TEST_DEPS, |
| 10440 | ) |
| 10441 | |
| 10442 | xnnpack_unit_test( |
| Marat Dukhan | 582e184 | 2021-10-25 17:18:36 -0700 | [diff] [blame] | 10443 | name = "f32_f16_cvt_eval", |
| 10444 | srcs = [ |
| 10445 | "eval/f32-f16-cvt.cc", |
| 10446 | "src/xnnpack/AlignedAllocator.h", |
| 10447 | "src/xnnpack/math-stubs.h", |
| 10448 | ] + MICROKERNEL_TEST_HDRS, |
| 10449 | automatic = False, |
| 10450 | deps = MICROKERNEL_TEST_DEPS, |
| 10451 | ) |
| 10452 | |
| 10453 | xnnpack_unit_test( |
| Marat Dukhan | d24301d | 2021-12-02 00:13:45 -0800 | [diff] [blame] | 10454 | name = "f32_qs8_cvt_eval", |
| 10455 | srcs = [ |
| 10456 | "eval/f32-qs8-cvt.cc", |
| 10457 | "src/xnnpack/AlignedAllocator.h", |
| 10458 | "src/xnnpack/math-stubs.h", |
| 10459 | ] + MICROKERNEL_TEST_HDRS, |
| 10460 | automatic = False, |
| 10461 | deps = MICROKERNEL_TEST_DEPS, |
| 10462 | ) |
| 10463 | |
| 10464 | xnnpack_unit_test( |
| 10465 | name = "f32_qu8_cvt_eval", |
| 10466 | srcs = [ |
| 10467 | "eval/f32-qu8-cvt.cc", |
| 10468 | "src/xnnpack/AlignedAllocator.h", |
| 10469 | "src/xnnpack/math-stubs.h", |
| 10470 | ] + MICROKERNEL_TEST_HDRS, |
| 10471 | automatic = False, |
| 10472 | deps = MICROKERNEL_TEST_DEPS, |
| 10473 | ) |
| 10474 | |
| 10475 | xnnpack_unit_test( |
| Marat Dukhan | f7291fc | 2020-12-15 11:02:50 -0800 | [diff] [blame] | 10476 | name = "f32_exp_eval", |
| 10477 | srcs = [ |
| 10478 | "eval/f32-exp.cc", |
| 10479 | "src/xnnpack/AlignedAllocator.h", |
| 10480 | "src/xnnpack/math-stubs.h", |
| 10481 | ] + MICROKERNEL_TEST_HDRS, |
| 10482 | automatic = False, |
| 10483 | deps = MICROKERNEL_TEST_DEPS, |
| 10484 | ) |
| 10485 | |
| 10486 | xnnpack_unit_test( |
| Marat Dukhan | f44f022 | 2020-12-14 11:53:27 -0800 | [diff] [blame] | 10487 | name = "f32_expm1minus_eval", |
| 10488 | srcs = [ |
| 10489 | "eval/f32-expm1minus.cc", |
| 10490 | "src/xnnpack/AlignedAllocator.h", |
| 10491 | "src/xnnpack/math-stubs.h", |
| 10492 | ] + MICROKERNEL_TEST_HDRS, |
| 10493 | automatic = False, |
| 10494 | deps = MICROKERNEL_TEST_DEPS, |
| 10495 | ) |
| 10496 | |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 10497 | xnnpack_unit_test( |
| Marat Dukhan | d28a5a2 | 2020-12-14 15:27:22 -0800 | [diff] [blame] | 10498 | name = "f32_expminus_eval", |
| 10499 | srcs = [ |
| 10500 | "eval/f32-expminus.cc", |
| 10501 | "src/xnnpack/AlignedAllocator.h", |
| 10502 | "src/xnnpack/math-stubs.h", |
| 10503 | ] + MICROKERNEL_TEST_HDRS, |
| 10504 | automatic = False, |
| 10505 | deps = MICROKERNEL_TEST_DEPS, |
| 10506 | ) |
| 10507 | |
| 10508 | xnnpack_unit_test( |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 10509 | name = "f32_roundne_eval", |
| 10510 | srcs = [ |
| 10511 | "eval/f32-roundne.cc", |
| 10512 | "src/xnnpack/AlignedAllocator.h", |
| 10513 | "src/xnnpack/math-stubs.h", |
| 10514 | ] + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | 22eed3d | 2020-05-11 20:13:37 -0700 | [diff] [blame] | 10515 | automatic = False, |
| Marat Dukhan | 8853b82 | 2020-05-07 12:19:01 -0700 | [diff] [blame] | 10516 | deps = MICROKERNEL_TEST_DEPS, |
| 10517 | ) |
| 10518 | |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 10519 | xnnpack_unit_test( |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 10520 | name = "f32_roundd_eval", |
| 10521 | srcs = [ |
| 10522 | "eval/f32-roundd.cc", |
| 10523 | "src/xnnpack/AlignedAllocator.h", |
| 10524 | "src/xnnpack/math-stubs.h", |
| 10525 | ] + MICROKERNEL_TEST_HDRS, |
| 10526 | automatic = False, |
| 10527 | deps = MICROKERNEL_TEST_DEPS, |
| 10528 | ) |
| 10529 | |
| 10530 | xnnpack_unit_test( |
| 10531 | name = "f32_roundu_eval", |
| 10532 | srcs = [ |
| 10533 | "eval/f32-roundu.cc", |
| 10534 | "src/xnnpack/AlignedAllocator.h", |
| 10535 | "src/xnnpack/math-stubs.h", |
| 10536 | ] + MICROKERNEL_TEST_HDRS, |
| 10537 | automatic = False, |
| 10538 | deps = MICROKERNEL_TEST_DEPS, |
| 10539 | ) |
| 10540 | |
| 10541 | xnnpack_unit_test( |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 10542 | name = "f32_roundz_eval", |
| 10543 | srcs = [ |
| 10544 | "eval/f32-roundz.cc", |
| 10545 | "src/xnnpack/AlignedAllocator.h", |
| 10546 | "src/xnnpack/math-stubs.h", |
| 10547 | ] + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | c9852ba | 2020-05-13 17:21:29 -0700 | [diff] [blame] | 10548 | automatic = False, |
| Marat Dukhan | 2dbb944 | 2020-05-12 20:43:43 -0700 | [diff] [blame] | 10549 | deps = MICROKERNEL_TEST_DEPS, |
| 10550 | ) |
| 10551 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10552 | ######################### Unit tests for micro-kernels ######################### |
| 10553 | |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 10554 | xnnpack_cc_library( |
| 10555 | name = "gemm_microkernel_tester", |
| 10556 | testonly = True, |
| 10557 | srcs = [ |
| 10558 | "test/gemm-microkernel-tester.cc", |
| 10559 | "src/xnnpack/AlignedAllocator.h", |
| 10560 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 10561 | hdrs = [ |
| 10562 | "test/gemm-microkernel-tester.h", |
| 10563 | ], |
| 10564 | deps = MICROKERNEL_TEST_DEPS + [ |
| 10565 | ":packing", |
| 10566 | "@com_google_googletest//:gtest_main", |
| 10567 | ], |
| 10568 | ) |
| 10569 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10570 | xnnpack_unit_test( |
| Marat Dukhan | f1a6ed3 | 2021-09-26 13:40:19 -0700 | [diff] [blame] | 10571 | name = "f16_f32_vcvt_test", |
| 10572 | srcs = [ |
| 10573 | "test/f16-f32-vcvt.cc", |
| 10574 | "test/vcvt-microkernel-tester.h", |
| 10575 | ] + MICROKERNEL_TEST_HDRS, |
| 10576 | deps = MICROKERNEL_TEST_DEPS, |
| 10577 | ) |
| 10578 | |
| 10579 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10580 | name = "f16_dwconv_minmax_test", |
| 10581 | srcs = [ |
| 10582 | "test/f16-dwconv-minmax.cc", |
| 10583 | "test/dwconv-microkernel-tester.h", |
| 10584 | "src/xnnpack/AlignedAllocator.h", |
| 10585 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 10586 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 10587 | ) |
| 10588 | |
| 10589 | xnnpack_unit_test( |
| 10590 | name = "f16_gavgpool_minmax_test", |
| 10591 | srcs = [ |
| 10592 | "test/f16-gavgpool-minmax.cc", |
| 10593 | "test/gavgpool-microkernel-tester.h", |
| 10594 | "src/xnnpack/AlignedAllocator.h", |
| 10595 | ] + MICROKERNEL_TEST_HDRS, |
| 10596 | deps = MICROKERNEL_TEST_DEPS, |
| 10597 | ) |
| 10598 | |
| 10599 | xnnpack_unit_test( |
| Marat Dukhan | de06f49 | 2020-04-09 00:19:31 -0700 | [diff] [blame] | 10600 | name = "f16_gemm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10601 | srcs = [ |
| Marat Dukhan | de06f49 | 2020-04-09 00:19:31 -0700 | [diff] [blame] | 10602 | "test/f16-gemm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10603 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 10604 | deps = MICROKERNEL_TEST_DEPS + [ |
| 10605 | ":gemm_microkernel_tester", |
| 10606 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10607 | ) |
| 10608 | |
| 10609 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10610 | name = "f16_igemm_minmax_test", |
| 10611 | srcs = [ |
| 10612 | "test/f16-igemm-minmax.cc", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10613 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 10614 | deps = MICROKERNEL_TEST_DEPS + [ |
| 10615 | ":gemm_microkernel_tester", |
| 10616 | ], |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10617 | ) |
| 10618 | |
| 10619 | xnnpack_unit_test( |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 10620 | name = "f16_spmm_minmax_test", |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 10621 | srcs = [ |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 10622 | "test/f16-spmm-minmax.cc", |
| Marat Dukhan | bdb56f5 | 2020-02-05 21:42:49 -0800 | [diff] [blame] | 10623 | "test/spmm-microkernel-tester.h", |
| 10624 | "src/xnnpack/AlignedAllocator.h", |
| 10625 | ] + MICROKERNEL_TEST_HDRS, |
| 10626 | deps = MICROKERNEL_TEST_DEPS, |
| 10627 | ) |
| 10628 | |
| 10629 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10630 | name = "f16_vadd_minmax_test", |
| 10631 | srcs = [ |
| 10632 | "test/f16-vadd-minmax.cc", |
| 10633 | "test/vbinary-microkernel-tester.h", |
| 10634 | ] + MICROKERNEL_TEST_HDRS, |
| 10635 | deps = MICROKERNEL_TEST_DEPS, |
| 10636 | ) |
| 10637 | |
| 10638 | xnnpack_unit_test( |
| 10639 | name = "f16_vaddc_minmax_test", |
| 10640 | srcs = [ |
| 10641 | "test/f16-vaddc-minmax.cc", |
| 10642 | "test/vbinaryc-microkernel-tester.h", |
| 10643 | ] + MICROKERNEL_TEST_HDRS, |
| 10644 | deps = MICROKERNEL_TEST_DEPS, |
| 10645 | ) |
| 10646 | |
| 10647 | xnnpack_unit_test( |
| 10648 | name = "f16_vclamp_test", |
| 10649 | srcs = [ |
| 10650 | "test/f16-vclamp.cc", |
| Marat Dukhan | a6c0516 | 2021-05-13 16:52:02 -0700 | [diff] [blame] | 10651 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10652 | ] + MICROKERNEL_TEST_HDRS, |
| 10653 | deps = MICROKERNEL_TEST_DEPS, |
| 10654 | ) |
| 10655 | |
| 10656 | xnnpack_unit_test( |
| 10657 | name = "f16_vdiv_minmax_test", |
| 10658 | srcs = [ |
| 10659 | "test/f16-vdiv-minmax.cc", |
| 10660 | "test/vbinary-microkernel-tester.h", |
| 10661 | ] + MICROKERNEL_TEST_HDRS, |
| 10662 | deps = MICROKERNEL_TEST_DEPS, |
| 10663 | ) |
| 10664 | |
| 10665 | xnnpack_unit_test( |
| 10666 | name = "f16_vdivc_minmax_test", |
| 10667 | srcs = [ |
| 10668 | "test/f16-vdivc-minmax.cc", |
| 10669 | "test/vbinaryc-microkernel-tester.h", |
| 10670 | ] + MICROKERNEL_TEST_HDRS, |
| 10671 | deps = MICROKERNEL_TEST_DEPS, |
| 10672 | ) |
| 10673 | |
| 10674 | xnnpack_unit_test( |
| 10675 | name = "f16_vrdivc_minmax_test", |
| 10676 | srcs = [ |
| 10677 | "test/f16-vrdivc-minmax.cc", |
| 10678 | "test/vbinaryc-microkernel-tester.h", |
| 10679 | ] + MICROKERNEL_TEST_HDRS, |
| 10680 | deps = MICROKERNEL_TEST_DEPS, |
| 10681 | ) |
| 10682 | |
| 10683 | xnnpack_unit_test( |
| 10684 | name = "f16_vhswish_test", |
| 10685 | srcs = [ |
| 10686 | "test/f16-vhswish.cc", |
| Marat Dukhan | a6c0516 | 2021-05-13 16:52:02 -0700 | [diff] [blame] | 10687 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10688 | ] + MICROKERNEL_TEST_HDRS, |
| 10689 | deps = MICROKERNEL_TEST_DEPS, |
| 10690 | ) |
| 10691 | |
| 10692 | xnnpack_unit_test( |
| 10693 | name = "f16_vmax_test", |
| 10694 | srcs = [ |
| 10695 | "test/f16-vmax.cc", |
| 10696 | "test/vbinary-microkernel-tester.h", |
| 10697 | ] + MICROKERNEL_TEST_HDRS, |
| 10698 | deps = MICROKERNEL_TEST_DEPS, |
| 10699 | ) |
| 10700 | |
| 10701 | xnnpack_unit_test( |
| 10702 | name = "f16_vmaxc_test", |
| 10703 | srcs = [ |
| 10704 | "test/f16-vmaxc.cc", |
| 10705 | "test/vbinaryc-microkernel-tester.h", |
| 10706 | ] + MICROKERNEL_TEST_HDRS, |
| 10707 | deps = MICROKERNEL_TEST_DEPS, |
| 10708 | ) |
| 10709 | |
| 10710 | xnnpack_unit_test( |
| 10711 | name = "f16_vmin_test", |
| 10712 | srcs = [ |
| 10713 | "test/f16-vmin.cc", |
| 10714 | "test/vbinary-microkernel-tester.h", |
| 10715 | ] + MICROKERNEL_TEST_HDRS, |
| 10716 | deps = MICROKERNEL_TEST_DEPS, |
| 10717 | ) |
| 10718 | |
| 10719 | xnnpack_unit_test( |
| 10720 | name = "f16_vminc_test", |
| 10721 | srcs = [ |
| 10722 | "test/f16-vminc.cc", |
| 10723 | "test/vbinaryc-microkernel-tester.h", |
| 10724 | ] + MICROKERNEL_TEST_HDRS, |
| 10725 | deps = MICROKERNEL_TEST_DEPS, |
| 10726 | ) |
| 10727 | |
| 10728 | xnnpack_unit_test( |
| 10729 | name = "f16_vmul_minmax_test", |
| 10730 | srcs = [ |
| 10731 | "test/f16-vmul-minmax.cc", |
| 10732 | "test/vbinary-microkernel-tester.h", |
| 10733 | ] + MICROKERNEL_TEST_HDRS, |
| 10734 | deps = MICROKERNEL_TEST_DEPS, |
| 10735 | ) |
| 10736 | |
| 10737 | xnnpack_unit_test( |
| 10738 | name = "f16_vmulc_minmax_test", |
| 10739 | srcs = [ |
| 10740 | "test/f16-vmulc-minmax.cc", |
| 10741 | "test/vbinaryc-microkernel-tester.h", |
| 10742 | ] + MICROKERNEL_TEST_HDRS, |
| 10743 | deps = MICROKERNEL_TEST_DEPS, |
| 10744 | ) |
| 10745 | |
| 10746 | xnnpack_unit_test( |
| 10747 | name = "f16_vmulcaddc_minmax_test", |
| 10748 | srcs = [ |
| 10749 | "test/f16-vmulcaddc-minmax.cc", |
| 10750 | "test/vmulcaddc-microkernel-tester.h", |
| 10751 | "src/xnnpack/AlignedAllocator.h", |
| 10752 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 10753 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 10754 | ) |
| 10755 | |
| 10756 | xnnpack_unit_test( |
| 10757 | name = "f16_vsub_minmax_test", |
| 10758 | srcs = [ |
| 10759 | "test/f16-vsub-minmax.cc", |
| 10760 | "test/vbinary-microkernel-tester.h", |
| 10761 | ] + MICROKERNEL_TEST_HDRS, |
| 10762 | deps = MICROKERNEL_TEST_DEPS, |
| 10763 | ) |
| 10764 | |
| 10765 | xnnpack_unit_test( |
| 10766 | name = "f16_vsubc_minmax_test", |
| 10767 | srcs = [ |
| 10768 | "test/f16-vsubc-minmax.cc", |
| 10769 | "test/vbinaryc-microkernel-tester.h", |
| 10770 | ] + MICROKERNEL_TEST_HDRS, |
| 10771 | deps = MICROKERNEL_TEST_DEPS, |
| 10772 | ) |
| 10773 | |
| 10774 | xnnpack_unit_test( |
| 10775 | name = "f16_vrsubc_minmax_test", |
| 10776 | srcs = [ |
| 10777 | "test/f16-vrsubc-minmax.cc", |
| 10778 | "test/vbinaryc-microkernel-tester.h", |
| 10779 | ] + MICROKERNEL_TEST_HDRS, |
| 10780 | deps = MICROKERNEL_TEST_DEPS, |
| 10781 | ) |
| 10782 | |
| 10783 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10784 | name = "f32_argmaxpool_test", |
| 10785 | srcs = [ |
| 10786 | "test/f32-argmaxpool.cc", |
| 10787 | "test/argmaxpool-microkernel-tester.h", |
| 10788 | "src/xnnpack/AlignedAllocator.h", |
| 10789 | ] + MICROKERNEL_TEST_HDRS, |
| 10790 | deps = MICROKERNEL_TEST_DEPS, |
| 10791 | ) |
| 10792 | |
| 10793 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10794 | name = "f32_avgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10795 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10796 | "test/f32-avgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10797 | "test/avgpool-microkernel-tester.h", |
| 10798 | "src/xnnpack/AlignedAllocator.h", |
| 10799 | ] + MICROKERNEL_TEST_HDRS, |
| 10800 | deps = MICROKERNEL_TEST_DEPS, |
| 10801 | ) |
| 10802 | |
| 10803 | xnnpack_unit_test( |
| Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 10804 | name = "f32_ibilinear_test", |
| Marat Dukhan | 35dacfb | 2019-11-07 19:18:16 -0800 | [diff] [blame] | 10805 | srcs = [ |
| Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 10806 | "test/f32-ibilinear.cc", |
| 10807 | "test/ibilinear-microkernel-tester.h", |
| Marat Dukhan | 35dacfb | 2019-11-07 19:18:16 -0800 | [diff] [blame] | 10808 | "src/xnnpack/AlignedAllocator.h", |
| 10809 | ] + MICROKERNEL_TEST_HDRS, |
| 10810 | deps = MICROKERNEL_TEST_DEPS, |
| 10811 | ) |
| 10812 | |
| 10813 | xnnpack_unit_test( |
| XNNPACK Team | 2143267 | 2020-10-19 19:58:48 -0700 | [diff] [blame] | 10814 | name = "f32_ibilinear_chw_test", |
| 10815 | srcs = [ |
| 10816 | "test/f32-ibilinear-chw.cc", |
| XNNPACK Team | 6be46b2 | 2020-10-22 23:34:54 -0700 | [diff] [blame] | 10817 | "test/ibilinear-microkernel-tester.h", |
| XNNPACK Team | 2143267 | 2020-10-19 19:58:48 -0700 | [diff] [blame] | 10818 | "src/xnnpack/AlignedAllocator.h", |
| 10819 | ] + MICROKERNEL_TEST_HDRS, |
| 10820 | deps = MICROKERNEL_TEST_DEPS, |
| 10821 | ) |
| 10822 | |
| 10823 | xnnpack_unit_test( |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10824 | name = "f32_igemm_test", |
| 10825 | srcs = [ |
| 10826 | "test/f32-igemm.cc", |
| Zhi An Ng | 4c1fd6f | 2022-01-10 19:35:06 -0800 | [diff] [blame] | 10827 | "test/f32-igemm-2.cc", |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10828 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 10829 | deps = MICROKERNEL_TEST_DEPS + [ |
| 10830 | ":gemm_microkernel_tester", |
| 10831 | ], |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10832 | ) |
| 10833 | |
| 10834 | xnnpack_unit_test( |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 10835 | name = "f32_igemm_relu_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10836 | srcs = [ |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 10837 | "test/f32-igemm-relu.cc", |
| Zhi An Ng | 4c1fd6f | 2022-01-10 19:35:06 -0800 | [diff] [blame] | 10838 | "test/f32-igemm-relu-2.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10839 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 10840 | deps = MICROKERNEL_TEST_DEPS + [ |
| 10841 | ":gemm_microkernel_tester", |
| 10842 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10843 | ) |
| 10844 | |
| 10845 | xnnpack_unit_test( |
| Marat Dukhan | e207b7b | 2020-05-28 16:27:42 -0700 | [diff] [blame] | 10846 | name = "f32_igemm_minmax_test", |
| 10847 | srcs = [ |
| 10848 | "test/f32-igemm-minmax.cc", |
| Zhi An Ng | 4c1fd6f | 2022-01-10 19:35:06 -0800 | [diff] [blame] | 10849 | "test/f32-igemm-minmax-2.cc", |
| Marat Dukhan | e207b7b | 2020-05-28 16:27:42 -0700 | [diff] [blame] | 10850 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 10851 | deps = MICROKERNEL_TEST_DEPS + [ |
| Zhi An Ng | 1a856c1 | 2022-01-11 16:11:46 -0800 | [diff] [blame] | 10852 | ":jit_test_mode", |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 10853 | ":gemm_microkernel_tester", |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 10854 | ], |
| Marat Dukhan | e207b7b | 2020-05-28 16:27:42 -0700 | [diff] [blame] | 10855 | ) |
| 10856 | |
| 10857 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10858 | name = "f32_conv_hwc_test", |
| 10859 | srcs = [ |
| 10860 | "test/f32-conv-hwc.cc", |
| 10861 | "test/conv-hwc-microkernel-tester.h", |
| 10862 | "src/xnnpack/AlignedAllocator.h", |
| 10863 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10864 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10865 | ) |
| 10866 | |
| 10867 | xnnpack_unit_test( |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 10868 | name = "f32_conv_hwc2chw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10869 | srcs = [ |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 10870 | "test/f32-conv-hwc2chw.cc", |
| 10871 | "test/conv-hwc2chw-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10872 | "src/xnnpack/AlignedAllocator.h", |
| 10873 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10874 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10875 | ) |
| 10876 | |
| 10877 | xnnpack_unit_test( |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10878 | name = "f32_dwconv_test", |
| 10879 | srcs = [ |
| 10880 | "test/f32-dwconv.cc", |
| 10881 | "test/dwconv-microkernel-tester.h", |
| 10882 | "src/xnnpack/AlignedAllocator.h", |
| 10883 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10884 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10885 | ) |
| 10886 | |
| 10887 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10888 | name = "f32_dwconv_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10889 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10890 | "test/f32-dwconv-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10891 | "test/dwconv-microkernel-tester.h", |
| 10892 | "src/xnnpack/AlignedAllocator.h", |
| 10893 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10894 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10895 | ) |
| 10896 | |
| 10897 | xnnpack_unit_test( |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 10898 | name = "f32_dwconv2d_chw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10899 | srcs = [ |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 10900 | "test/f32-dwconv2d-chw.cc", |
| 10901 | "test/dwconv2d-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10902 | "src/xnnpack/AlignedAllocator.h", |
| 10903 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 10904 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10905 | ) |
| 10906 | |
| 10907 | xnnpack_unit_test( |
| Marat Dukhan | d77f77d | 2021-10-24 15:39:59 -0700 | [diff] [blame] | 10908 | name = "f32_f16_vcvt_test", |
| 10909 | srcs = [ |
| 10910 | "test/f32-f16-vcvt.cc", |
| 10911 | "test/vcvt-microkernel-tester.h", |
| 10912 | ] + MICROKERNEL_TEST_HDRS, |
| 10913 | deps = MICROKERNEL_TEST_DEPS, |
| 10914 | ) |
| 10915 | |
| 10916 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10917 | name = "f32_gavgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10918 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10919 | "test/f32-gavgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10920 | "test/gavgpool-microkernel-tester.h", |
| 10921 | "src/xnnpack/AlignedAllocator.h", |
| 10922 | ] + MICROKERNEL_TEST_HDRS, |
| 10923 | deps = MICROKERNEL_TEST_DEPS, |
| 10924 | ) |
| 10925 | |
| 10926 | xnnpack_unit_test( |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 10927 | name = "f32_gavgpool_cw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10928 | srcs = [ |
| Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 10929 | "test/f32-gavgpool-cw.cc", |
| 10930 | "test/gavgpool-cw-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10931 | "src/xnnpack/AlignedAllocator.h", |
| 10932 | ] + MICROKERNEL_TEST_HDRS, |
| 10933 | deps = MICROKERNEL_TEST_DEPS, |
| 10934 | ) |
| 10935 | |
| 10936 | xnnpack_unit_test( |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10937 | name = "f32_gemm_test", |
| 10938 | srcs = [ |
| 10939 | "test/f32-gemm.cc", |
| Zhi An Ng | 4c1fd6f | 2022-01-10 19:35:06 -0800 | [diff] [blame] | 10940 | "test/f32-gemm-2.cc", |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10941 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 10942 | deps = MICROKERNEL_TEST_DEPS + [ |
| Zhi An Ng | 1a856c1 | 2022-01-11 16:11:46 -0800 | [diff] [blame] | 10943 | ":jit_test_mode", |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 10944 | ":gemm_microkernel_tester", |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 10945 | ], |
| Marat Dukhan | 163a7e6 | 2020-04-09 04:19:26 -0700 | [diff] [blame] | 10946 | ) |
| 10947 | |
| 10948 | xnnpack_unit_test( |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 10949 | name = "f32_gemm_relu_test", |
| 10950 | srcs = [ |
| 10951 | "test/f32-gemm-relu.cc", |
| Zhi An Ng | 4c1fd6f | 2022-01-10 19:35:06 -0800 | [diff] [blame] | 10952 | "test/f32-gemm-relu-2.cc", |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 10953 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 10954 | deps = MICROKERNEL_TEST_DEPS + [ |
| 10955 | ":gemm_microkernel_tester", |
| 10956 | ], |
| Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 10957 | ) |
| 10958 | |
| 10959 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10960 | name = "f32_gemm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10961 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10962 | "test/f32-gemm-minmax.cc", |
| Zhi An Ng | 4c1fd6f | 2022-01-10 19:35:06 -0800 | [diff] [blame] | 10963 | "test/f32-gemm-minmax-2.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10964 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | b43b47a | 2021-12-23 16:27:22 -0800 | [diff] [blame] | 10965 | deps = MICROKERNEL_TEST_DEPS + [ |
| Zhi An Ng | 1a856c1 | 2022-01-11 16:11:46 -0800 | [diff] [blame] | 10966 | ":jit_test_mode", |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 10967 | ":gemm_microkernel_tester", |
| Zhi An Ng | b43b47a | 2021-12-23 16:27:22 -0800 | [diff] [blame] | 10968 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10969 | ) |
| 10970 | |
| 10971 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10972 | name = "f32_gemminc_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10973 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 10974 | "test/f32-gemminc-minmax.cc", |
| Zhi An Ng | 4c1fd6f | 2022-01-10 19:35:06 -0800 | [diff] [blame] | 10975 | "test/f32-gemminc-minmax-2.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10976 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 10977 | deps = MICROKERNEL_TEST_DEPS + [ |
| 10978 | ":gemm_microkernel_tester", |
| 10979 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10980 | ) |
| 10981 | |
| 10982 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10983 | name = "f32_vhswish_test", |
| Frank Barchard | b196659 | 2020-05-12 13:47:06 -0700 | [diff] [blame] | 10984 | srcs = [ |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 10985 | "test/f32-vhswish.cc", |
| Marat Dukhan | 949b6e7 | 2021-05-13 11:21:06 -0700 | [diff] [blame] | 10986 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10987 | ] + MICROKERNEL_TEST_HDRS, |
| 10988 | deps = MICROKERNEL_TEST_DEPS, |
| 10989 | ) |
| 10990 | |
| 10991 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10992 | name = "f32_maxpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10993 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10994 | "test/f32-maxpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 10995 | "test/maxpool-microkernel-tester.h", |
| 10996 | ] + MICROKERNEL_TEST_HDRS, |
| 10997 | deps = MICROKERNEL_TEST_DEPS, |
| 10998 | ) |
| 10999 | |
| 11000 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 11001 | name = "f32_pavgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11002 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 11003 | "test/f32-pavgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11004 | "test/avgpool-microkernel-tester.h", |
| 11005 | "src/xnnpack/AlignedAllocator.h", |
| 11006 | ] + MICROKERNEL_TEST_HDRS, |
| 11007 | deps = MICROKERNEL_TEST_DEPS, |
| 11008 | ) |
| 11009 | |
| 11010 | xnnpack_unit_test( |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 11011 | name = "f32_ppmm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11012 | srcs = [ |
| Marat Dukhan | 1c58711 | 2020-04-08 20:04:28 -0700 | [diff] [blame] | 11013 | "test/f32-ppmm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11014 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11015 | deps = MICROKERNEL_TEST_DEPS + [ |
| 11016 | ":gemm_microkernel_tester", |
| 11017 | ], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11018 | ) |
| 11019 | |
| 11020 | xnnpack_unit_test( |
| Frank Barchard | b196659 | 2020-05-12 13:47:06 -0700 | [diff] [blame] | 11021 | name = "f16_prelu_test", |
| 11022 | srcs = [ |
| 11023 | "test/f16-prelu.cc", |
| 11024 | "test/prelu-microkernel-tester.h", |
| 11025 | "src/xnnpack/AlignedAllocator.h", |
| 11026 | ] + MICROKERNEL_TEST_HDRS, |
| 11027 | deps = MICROKERNEL_TEST_DEPS, |
| 11028 | ) |
| 11029 | |
| 11030 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11031 | name = "f32_prelu_test", |
| 11032 | srcs = [ |
| 11033 | "test/f32-prelu.cc", |
| 11034 | "test/prelu-microkernel-tester.h", |
| 11035 | "src/xnnpack/AlignedAllocator.h", |
| 11036 | ] + MICROKERNEL_TEST_HDRS, |
| 11037 | deps = MICROKERNEL_TEST_DEPS, |
| 11038 | ) |
| 11039 | |
| 11040 | xnnpack_unit_test( |
| Marat Dukhan | fee66be | 2021-12-09 17:51:15 -0800 | [diff] [blame] | 11041 | name = "f32_qs8_vcvt_test", |
| 11042 | srcs = [ |
| 11043 | "test/f32-qs8-vcvt.cc", |
| 11044 | "test/vcvt-microkernel-tester.h", |
| 11045 | ] + MICROKERNEL_TEST_HDRS, |
| 11046 | deps = MICROKERNEL_TEST_DEPS, |
| 11047 | ) |
| 11048 | |
| 11049 | xnnpack_unit_test( |
| 11050 | name = "f32_qu8_vcvt_test", |
| 11051 | srcs = [ |
| 11052 | "test/f32-qu8-vcvt.cc", |
| 11053 | "test/vcvt-microkernel-tester.h", |
| 11054 | ] + MICROKERNEL_TEST_HDRS, |
| 11055 | deps = MICROKERNEL_TEST_DEPS, |
| 11056 | ) |
| 11057 | |
| 11058 | xnnpack_unit_test( |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 11059 | name = "f32_raddexpminusmax_test", |
| 11060 | srcs = [ |
| 11061 | "test/f32-raddexpminusmax.cc", |
| 11062 | "test/raddexpminusmax-microkernel-tester.h", |
| 11063 | ] + MICROKERNEL_TEST_HDRS, |
| 11064 | deps = MICROKERNEL_TEST_DEPS, |
| 11065 | ) |
| 11066 | |
| 11067 | xnnpack_unit_test( |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 11068 | name = "f32_raddextexp_test", |
| 11069 | srcs = [ |
| 11070 | "test/f32-raddextexp.cc", |
| 11071 | "test/raddextexp-microkernel-tester.h", |
| 11072 | ] + MICROKERNEL_TEST_HDRS, |
| 11073 | deps = MICROKERNEL_TEST_DEPS, |
| 11074 | ) |
| 11075 | |
| 11076 | xnnpack_unit_test( |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 11077 | name = "f32_raddstoreexpminusmax_test", |
| 11078 | srcs = [ |
| 11079 | "test/f32-raddstoreexpminusmax.cc", |
| 11080 | "test/raddstoreexpminusmax-microkernel-tester.h", |
| 11081 | ] + MICROKERNEL_TEST_HDRS, |
| 11082 | deps = MICROKERNEL_TEST_DEPS, |
| 11083 | ) |
| 11084 | |
| 11085 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11086 | name = "f32_rmax_test", |
| 11087 | srcs = [ |
| 11088 | "test/f32-rmax.cc", |
| 11089 | "test/rmax-microkernel-tester.h", |
| 11090 | ] + MICROKERNEL_TEST_HDRS, |
| 11091 | deps = MICROKERNEL_TEST_DEPS, |
| 11092 | ) |
| 11093 | |
| 11094 | xnnpack_unit_test( |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 11095 | name = "f32_spmm_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11096 | srcs = [ |
| Marat Dukhan | 355ab43 | 2020-04-09 19:01:52 -0700 | [diff] [blame] | 11097 | "test/f32-spmm-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11098 | "test/spmm-microkernel-tester.h", |
| 11099 | "src/xnnpack/AlignedAllocator.h", |
| 11100 | ] + MICROKERNEL_TEST_HDRS, |
| 11101 | deps = MICROKERNEL_TEST_DEPS, |
| 11102 | ) |
| 11103 | |
| 11104 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 11105 | name = "f32_vabs_test", |
| 11106 | srcs = [ |
| 11107 | "test/f32-vabs.cc", |
| 11108 | "test/vunary-microkernel-tester.h", |
| 11109 | ] + MICROKERNEL_TEST_HDRS, |
| 11110 | deps = MICROKERNEL_TEST_DEPS, |
| 11111 | ) |
| 11112 | |
| 11113 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11114 | name = "f32_vadd_test", |
| 11115 | srcs = [ |
| 11116 | "test/f32-vadd.cc", |
| 11117 | "test/vbinary-microkernel-tester.h", |
| 11118 | ] + MICROKERNEL_TEST_HDRS, |
| 11119 | deps = MICROKERNEL_TEST_DEPS, |
| 11120 | ) |
| 11121 | |
| 11122 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11123 | name = "f32_vadd_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11124 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11125 | "test/f32-vadd-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 11126 | "test/vbinary-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11127 | ] + MICROKERNEL_TEST_HDRS, |
| 11128 | deps = MICROKERNEL_TEST_DEPS, |
| 11129 | ) |
| 11130 | |
| 11131 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11132 | name = "f32_vadd_relu_test", |
| 11133 | srcs = [ |
| 11134 | "test/f32-vadd-relu.cc", |
| 11135 | "test/vbinary-microkernel-tester.h", |
| 11136 | ] + MICROKERNEL_TEST_HDRS, |
| 11137 | deps = MICROKERNEL_TEST_DEPS, |
| 11138 | ) |
| 11139 | |
| 11140 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11141 | name = "f32_vaddc_test", |
| 11142 | srcs = [ |
| 11143 | "test/f32-vaddc.cc", |
| 11144 | "test/vbinaryc-microkernel-tester.h", |
| 11145 | ] + MICROKERNEL_TEST_HDRS, |
| 11146 | deps = MICROKERNEL_TEST_DEPS, |
| 11147 | ) |
| 11148 | |
| 11149 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11150 | name = "f32_vaddc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11151 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11152 | "test/f32-vaddc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 11153 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11154 | ] + MICROKERNEL_TEST_HDRS, |
| 11155 | deps = MICROKERNEL_TEST_DEPS, |
| 11156 | ) |
| 11157 | |
| 11158 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11159 | name = "f32_vaddc_relu_test", |
| 11160 | srcs = [ |
| 11161 | "test/f32-vaddc-relu.cc", |
| 11162 | "test/vbinaryc-microkernel-tester.h", |
| 11163 | ] + MICROKERNEL_TEST_HDRS, |
| 11164 | deps = MICROKERNEL_TEST_DEPS, |
| 11165 | ) |
| 11166 | |
| 11167 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 11168 | name = "f32_vclamp_test", |
| 11169 | srcs = [ |
| 11170 | "test/f32-vclamp.cc", |
| Marat Dukhan | 60d3f24 | 2021-05-13 11:59:02 -0700 | [diff] [blame] | 11171 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 11172 | ] + MICROKERNEL_TEST_HDRS, |
| 11173 | deps = MICROKERNEL_TEST_DEPS, |
| 11174 | ) |
| 11175 | |
| 11176 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11177 | name = "f32_vdiv_test", |
| 11178 | srcs = [ |
| 11179 | "test/f32-vdiv.cc", |
| 11180 | "test/vbinary-microkernel-tester.h", |
| 11181 | ] + MICROKERNEL_TEST_HDRS, |
| 11182 | deps = MICROKERNEL_TEST_DEPS, |
| 11183 | ) |
| 11184 | |
| 11185 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11186 | name = "f32_vdiv_minmax_test", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 11187 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11188 | "test/f32-vdiv-minmax.cc", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 11189 | "test/vbinary-microkernel-tester.h", |
| 11190 | ] + MICROKERNEL_TEST_HDRS, |
| 11191 | deps = MICROKERNEL_TEST_DEPS, |
| 11192 | ) |
| 11193 | |
| 11194 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11195 | name = "f32_vdiv_relu_test", |
| 11196 | srcs = [ |
| 11197 | "test/f32-vdiv-relu.cc", |
| 11198 | "test/vbinary-microkernel-tester.h", |
| 11199 | ] + MICROKERNEL_TEST_HDRS, |
| 11200 | deps = MICROKERNEL_TEST_DEPS, |
| 11201 | ) |
| 11202 | |
| 11203 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11204 | name = "f32_vdivc_test", |
| 11205 | srcs = [ |
| 11206 | "test/f32-vdivc.cc", |
| 11207 | "test/vbinaryc-microkernel-tester.h", |
| 11208 | ] + MICROKERNEL_TEST_HDRS, |
| 11209 | deps = MICROKERNEL_TEST_DEPS, |
| 11210 | ) |
| 11211 | |
| 11212 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11213 | name = "f32_vdivc_minmax_test", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 11214 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11215 | "test/f32-vdivc-minmax.cc", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 11216 | "test/vbinaryc-microkernel-tester.h", |
| 11217 | ] + MICROKERNEL_TEST_HDRS, |
| 11218 | deps = MICROKERNEL_TEST_DEPS, |
| 11219 | ) |
| 11220 | |
| 11221 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11222 | name = "f32_vdivc_relu_test", |
| 11223 | srcs = [ |
| 11224 | "test/f32-vdivc-relu.cc", |
| 11225 | "test/vbinaryc-microkernel-tester.h", |
| 11226 | ] + MICROKERNEL_TEST_HDRS, |
| 11227 | deps = MICROKERNEL_TEST_DEPS, |
| 11228 | ) |
| 11229 | |
| 11230 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11231 | name = "f32_vrdivc_test", |
| 11232 | srcs = [ |
| 11233 | "test/f32-vrdivc.cc", |
| 11234 | "test/vbinaryc-microkernel-tester.h", |
| 11235 | ] + MICROKERNEL_TEST_HDRS, |
| 11236 | deps = MICROKERNEL_TEST_DEPS, |
| 11237 | ) |
| 11238 | |
| 11239 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11240 | name = "f32_vrdivc_minmax_test", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 11241 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11242 | "test/f32-vrdivc-minmax.cc", |
| Marat Dukhan | 77ca630 | 2019-12-06 12:48:15 -0800 | [diff] [blame] | 11243 | "test/vbinaryc-microkernel-tester.h", |
| 11244 | ] + MICROKERNEL_TEST_HDRS, |
| 11245 | deps = MICROKERNEL_TEST_DEPS, |
| 11246 | ) |
| 11247 | |
| 11248 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11249 | name = "f32_vrdivc_relu_test", |
| 11250 | srcs = [ |
| 11251 | "test/f32-vrdivc-relu.cc", |
| 11252 | "test/vbinaryc-microkernel-tester.h", |
| 11253 | ] + MICROKERNEL_TEST_HDRS, |
| 11254 | deps = MICROKERNEL_TEST_DEPS, |
| 11255 | ) |
| 11256 | |
| 11257 | xnnpack_unit_test( |
| Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11258 | name = "f32_velu_test", |
| 11259 | srcs = [ |
| 11260 | "test/f32-velu.cc", |
| 11261 | "test/vunary-microkernel-tester.h", |
| 11262 | ] + MICROKERNEL_TEST_HDRS, |
| 11263 | deps = MICROKERNEL_TEST_DEPS, |
| 11264 | ) |
| 11265 | |
| 11266 | xnnpack_unit_test( |
| Marat Dukhan | 403b7d4 | 2019-12-05 12:49:11 -0800 | [diff] [blame] | 11267 | name = "f32_vmax_test", |
| 11268 | srcs = [ |
| 11269 | "test/f32-vmax.cc", |
| 11270 | "test/vbinary-microkernel-tester.h", |
| 11271 | ] + MICROKERNEL_TEST_HDRS, |
| 11272 | deps = MICROKERNEL_TEST_DEPS, |
| 11273 | ) |
| 11274 | |
| 11275 | xnnpack_unit_test( |
| 11276 | name = "f32_vmaxc_test", |
| 11277 | srcs = [ |
| 11278 | "test/f32-vmaxc.cc", |
| 11279 | "test/vbinaryc-microkernel-tester.h", |
| 11280 | ] + MICROKERNEL_TEST_HDRS, |
| 11281 | deps = MICROKERNEL_TEST_DEPS, |
| 11282 | ) |
| 11283 | |
| 11284 | xnnpack_unit_test( |
| 11285 | name = "f32_vmin_test", |
| 11286 | srcs = [ |
| 11287 | "test/f32-vmin.cc", |
| 11288 | "test/vbinary-microkernel-tester.h", |
| 11289 | ] + MICROKERNEL_TEST_HDRS, |
| 11290 | deps = MICROKERNEL_TEST_DEPS, |
| 11291 | ) |
| 11292 | |
| 11293 | xnnpack_unit_test( |
| 11294 | name = "f32_vminc_test", |
| 11295 | srcs = [ |
| 11296 | "test/f32-vminc.cc", |
| 11297 | "test/vbinaryc-microkernel-tester.h", |
| 11298 | ] + MICROKERNEL_TEST_HDRS, |
| 11299 | deps = MICROKERNEL_TEST_DEPS, |
| 11300 | ) |
| 11301 | |
| 11302 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11303 | name = "f32_vmul_test", |
| 11304 | srcs = [ |
| 11305 | "test/f32-vmul.cc", |
| 11306 | "test/vbinary-microkernel-tester.h", |
| 11307 | ] + MICROKERNEL_TEST_HDRS, |
| 11308 | deps = MICROKERNEL_TEST_DEPS, |
| 11309 | ) |
| 11310 | |
| 11311 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11312 | name = "f32_vmul_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11313 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11314 | "test/f32-vmul-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 11315 | "test/vbinary-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11316 | ] + MICROKERNEL_TEST_HDRS, |
| 11317 | deps = MICROKERNEL_TEST_DEPS, |
| 11318 | ) |
| 11319 | |
| 11320 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11321 | name = "f32_vmul_relu_test", |
| 11322 | srcs = [ |
| 11323 | "test/f32-vmul-relu.cc", |
| 11324 | "test/vbinary-microkernel-tester.h", |
| 11325 | ] + MICROKERNEL_TEST_HDRS, |
| 11326 | deps = MICROKERNEL_TEST_DEPS, |
| 11327 | ) |
| 11328 | |
| 11329 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11330 | name = "f32_vmulc_test", |
| 11331 | srcs = [ |
| 11332 | "test/f32-vmulc.cc", |
| 11333 | "test/vbinaryc-microkernel-tester.h", |
| 11334 | ] + MICROKERNEL_TEST_HDRS, |
| 11335 | deps = MICROKERNEL_TEST_DEPS, |
| 11336 | ) |
| 11337 | |
| 11338 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11339 | name = "f32_vmulc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11340 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11341 | "test/f32-vmulc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 11342 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11343 | ] + MICROKERNEL_TEST_HDRS, |
| 11344 | deps = MICROKERNEL_TEST_DEPS, |
| 11345 | ) |
| 11346 | |
| 11347 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11348 | name = "f32_vmulc_relu_test", |
| 11349 | srcs = [ |
| 11350 | "test/f32-vmulc-relu.cc", |
| 11351 | "test/vbinaryc-microkernel-tester.h", |
| 11352 | ] + MICROKERNEL_TEST_HDRS, |
| 11353 | deps = MICROKERNEL_TEST_DEPS, |
| 11354 | ) |
| 11355 | |
| 11356 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 11357 | name = "f32_vmulcaddc_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11358 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 11359 | "test/f32-vmulcaddc-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11360 | "test/vmulcaddc-microkernel-tester.h", |
| 11361 | "src/xnnpack/AlignedAllocator.h", |
| 11362 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Marat Dukhan | ab58238 | 2020-07-06 13:32:08 -0700 | [diff] [blame] | 11363 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11364 | ) |
| 11365 | |
| 11366 | xnnpack_unit_test( |
| Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 11367 | name = "f32_vlrelu_test", |
| 11368 | srcs = [ |
| 11369 | "test/f32-vlrelu.cc", |
| 11370 | "test/vunary-microkernel-tester.h", |
| 11371 | ] + MICROKERNEL_TEST_HDRS, |
| 11372 | deps = MICROKERNEL_TEST_DEPS, |
| 11373 | ) |
| 11374 | |
| 11375 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 11376 | name = "f32_vneg_test", |
| 11377 | srcs = [ |
| 11378 | "test/f32-vneg.cc", |
| 11379 | "test/vunary-microkernel-tester.h", |
| 11380 | ] + MICROKERNEL_TEST_HDRS, |
| 11381 | deps = MICROKERNEL_TEST_DEPS, |
| 11382 | ) |
| 11383 | |
| 11384 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 11385 | name = "f32_vrelu_test", |
| 11386 | srcs = [ |
| 11387 | "test/f32-vrelu.cc", |
| 11388 | "test/vunary-microkernel-tester.h", |
| 11389 | ] + MICROKERNEL_TEST_HDRS, |
| 11390 | deps = MICROKERNEL_TEST_DEPS, |
| 11391 | ) |
| 11392 | |
| 11393 | xnnpack_unit_test( |
| Marat Dukhan | eecf8fd | 2020-06-09 08:59:37 -0700 | [diff] [blame] | 11394 | name = "f32_vrndne_test", |
| 11395 | srcs = [ |
| 11396 | "test/f32-vrndne.cc", |
| 11397 | "test/vunary-microkernel-tester.h", |
| 11398 | ] + MICROKERNEL_TEST_HDRS, |
| 11399 | deps = MICROKERNEL_TEST_DEPS, |
| 11400 | ) |
| 11401 | |
| 11402 | xnnpack_unit_test( |
| 11403 | name = "f32_vrndz_test", |
| 11404 | srcs = [ |
| 11405 | "test/f32-vrndz.cc", |
| 11406 | "test/vunary-microkernel-tester.h", |
| 11407 | ] + MICROKERNEL_TEST_HDRS, |
| 11408 | deps = MICROKERNEL_TEST_DEPS, |
| 11409 | ) |
| 11410 | |
| 11411 | xnnpack_unit_test( |
| 11412 | name = "f32_vrndu_test", |
| 11413 | srcs = [ |
| 11414 | "test/f32-vrndu.cc", |
| 11415 | "test/vunary-microkernel-tester.h", |
| 11416 | ] + MICROKERNEL_TEST_HDRS, |
| 11417 | deps = MICROKERNEL_TEST_DEPS, |
| 11418 | ) |
| 11419 | |
| 11420 | xnnpack_unit_test( |
| 11421 | name = "f32_vrndd_test", |
| 11422 | srcs = [ |
| 11423 | "test/f32-vrndd.cc", |
| 11424 | "test/vunary-microkernel-tester.h", |
| 11425 | ] + MICROKERNEL_TEST_HDRS, |
| 11426 | deps = MICROKERNEL_TEST_DEPS, |
| 11427 | ) |
| 11428 | |
| 11429 | xnnpack_unit_test( |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 11430 | name = "f32_vscaleexpminusmax_test", |
| 11431 | srcs = [ |
| 11432 | "test/f32-vscaleexpminusmax.cc", |
| 11433 | "test/vscaleexpminusmax-microkernel-tester.h", |
| 11434 | ] + MICROKERNEL_TEST_HDRS, |
| 11435 | deps = MICROKERNEL_TEST_DEPS, |
| 11436 | ) |
| 11437 | |
| 11438 | xnnpack_unit_test( |
| Marat Dukhan | 6f8d4d3 | 2019-10-25 17:07:09 -0700 | [diff] [blame] | 11439 | name = "f32_vscaleextexp_test", |
| 11440 | srcs = [ |
| 11441 | "test/f32-vscaleextexp.cc", |
| 11442 | "test/vscaleextexp-microkernel-tester.h", |
| 11443 | ] + MICROKERNEL_TEST_HDRS, |
| 11444 | deps = MICROKERNEL_TEST_DEPS, |
| 11445 | ) |
| 11446 | |
| 11447 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 11448 | name = "f32_vsigmoid_test", |
| 11449 | srcs = [ |
| 11450 | "test/f32-vsigmoid.cc", |
| 11451 | "test/vunary-microkernel-tester.h", |
| 11452 | ] + MICROKERNEL_TEST_HDRS, |
| 11453 | deps = MICROKERNEL_TEST_DEPS, |
| 11454 | ) |
| 11455 | |
| 11456 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 11457 | name = "f32_vsqr_test", |
| 11458 | srcs = [ |
| 11459 | "test/f32-vsqr.cc", |
| 11460 | "test/vunary-microkernel-tester.h", |
| 11461 | ] + MICROKERNEL_TEST_HDRS, |
| 11462 | deps = MICROKERNEL_TEST_DEPS, |
| 11463 | ) |
| 11464 | |
| 11465 | xnnpack_unit_test( |
| Marat Dukhan | 13bafb0 | 2020-06-05 00:43:11 -0700 | [diff] [blame] | 11466 | name = "f32_vsqrdiff_test", |
| 11467 | srcs = [ |
| 11468 | "test/f32-vsqrdiff.cc", |
| 11469 | "test/vbinary-microkernel-tester.h", |
| 11470 | ] + MICROKERNEL_TEST_HDRS, |
| 11471 | deps = MICROKERNEL_TEST_DEPS, |
| 11472 | ) |
| 11473 | |
| 11474 | xnnpack_unit_test( |
| 11475 | name = "f32_vsqrdiffc_test", |
| 11476 | srcs = [ |
| 11477 | "test/f32-vsqrdiffc.cc", |
| 11478 | "test/vbinaryc-microkernel-tester.h", |
| 11479 | ] + MICROKERNEL_TEST_HDRS, |
| 11480 | deps = MICROKERNEL_TEST_DEPS, |
| 11481 | ) |
| 11482 | |
| 11483 | xnnpack_unit_test( |
| Marat Dukhan | f4db2f3 | 2020-06-30 10:55:30 -0700 | [diff] [blame] | 11484 | name = "f32_vsqrt_test", |
| 11485 | srcs = [ |
| 11486 | "test/f32-vsqrt.cc", |
| 11487 | "test/vunary-microkernel-tester.h", |
| 11488 | ] + MICROKERNEL_TEST_HDRS, |
| 11489 | deps = MICROKERNEL_TEST_DEPS, |
| 11490 | ) |
| 11491 | |
| 11492 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11493 | name = "f32_vsub_test", |
| 11494 | srcs = [ |
| 11495 | "test/f32-vsub.cc", |
| 11496 | "test/vbinary-microkernel-tester.h", |
| 11497 | ] + MICROKERNEL_TEST_HDRS, |
| 11498 | deps = MICROKERNEL_TEST_DEPS, |
| 11499 | ) |
| 11500 | |
| 11501 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11502 | name = "f32_vsub_minmax_test", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 11503 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11504 | "test/f32-vsub-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 11505 | "test/vbinary-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11506 | ] + MICROKERNEL_TEST_HDRS, |
| 11507 | deps = MICROKERNEL_TEST_DEPS, |
| 11508 | ) |
| 11509 | |
| 11510 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11511 | name = "f32_vsub_relu_test", |
| 11512 | srcs = [ |
| 11513 | "test/f32-vsub-relu.cc", |
| 11514 | "test/vbinary-microkernel-tester.h", |
| 11515 | ] + MICROKERNEL_TEST_HDRS, |
| 11516 | deps = MICROKERNEL_TEST_DEPS, |
| 11517 | ) |
| 11518 | |
| 11519 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11520 | name = "f32_vsubc_test", |
| 11521 | srcs = [ |
| 11522 | "test/f32-vsubc.cc", |
| 11523 | "test/vbinaryc-microkernel-tester.h", |
| 11524 | ] + MICROKERNEL_TEST_HDRS, |
| 11525 | deps = MICROKERNEL_TEST_DEPS, |
| 11526 | ) |
| 11527 | |
| 11528 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11529 | name = "f32_vsubc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11530 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11531 | "test/f32-vsubc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 11532 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11533 | ] + MICROKERNEL_TEST_HDRS, |
| 11534 | deps = MICROKERNEL_TEST_DEPS, |
| 11535 | ) |
| 11536 | |
| 11537 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11538 | name = "f32_vsubc_relu_test", |
| 11539 | srcs = [ |
| 11540 | "test/f32-vsubc-relu.cc", |
| 11541 | "test/vbinaryc-microkernel-tester.h", |
| 11542 | ] + MICROKERNEL_TEST_HDRS, |
| 11543 | deps = MICROKERNEL_TEST_DEPS, |
| 11544 | ) |
| 11545 | |
| 11546 | xnnpack_unit_test( |
| Frank Barchard | d5b9f1c | 2020-07-01 15:00:19 -0700 | [diff] [blame] | 11547 | name = "f32_vrsubc_test", |
| 11548 | srcs = [ |
| 11549 | "test/f32-vrsubc.cc", |
| 11550 | "test/vbinaryc-microkernel-tester.h", |
| 11551 | ] + MICROKERNEL_TEST_HDRS, |
| 11552 | deps = MICROKERNEL_TEST_DEPS, |
| 11553 | ) |
| 11554 | |
| 11555 | xnnpack_unit_test( |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11556 | name = "f32_vrsubc_minmax_test", |
| Marat Dukhan | c07cb7f | 2019-11-14 15:32:05 -0800 | [diff] [blame] | 11557 | srcs = [ |
| Marat Dukhan | 91cd2b7 | 2020-04-09 23:57:31 -0700 | [diff] [blame] | 11558 | "test/f32-vrsubc-minmax.cc", |
| Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 11559 | "test/vbinaryc-microkernel-tester.h", |
| Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 11560 | ] + MICROKERNEL_TEST_HDRS, |
| 11561 | deps = MICROKERNEL_TEST_DEPS, |
| 11562 | ) |
| 11563 | |
| 11564 | xnnpack_unit_test( |
| Frank Barchard | 674778d | 2020-08-08 10:17:25 -0700 | [diff] [blame] | 11565 | name = "f32_vrsubc_relu_test", |
| 11566 | srcs = [ |
| 11567 | "test/f32-vrsubc-relu.cc", |
| 11568 | "test/vbinaryc-microkernel-tester.h", |
| 11569 | ] + MICROKERNEL_TEST_HDRS, |
| 11570 | deps = MICROKERNEL_TEST_DEPS, |
| 11571 | ) |
| 11572 | |
| 11573 | xnnpack_unit_test( |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 11574 | name = "qc8_dwconv_minmax_fp32_test", |
| 11575 | timeout = "moderate", |
| 11576 | srcs = [ |
| 11577 | "test/qc8-dwconv-minmax-fp32.cc", |
| 11578 | "test/dwconv-microkernel-tester.h", |
| 11579 | "src/xnnpack/AlignedAllocator.h", |
| 11580 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11581 | shard_count = 10, |
| Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 11582 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11583 | ) |
| 11584 | |
| 11585 | xnnpack_unit_test( |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 11586 | name = "qc8_gemm_minmax_fp32_test", |
| 11587 | timeout = "moderate", |
| 11588 | srcs = [ |
| 11589 | "test/qc8-gemm-minmax-fp32.cc", |
| Zhi An Ng | 4c1fd6f | 2022-01-10 19:35:06 -0800 | [diff] [blame] | 11590 | "test/qc8-gemm-minmax-fp32-2.cc", |
| 11591 | "test/qc8-gemm-minmax-fp32-3.cc", |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 11592 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11593 | shard_count = 10, |
| Zhi An Ng | 16b734c | 2022-01-06 13:54:40 -0800 | [diff] [blame] | 11594 | deps = MICROKERNEL_TEST_DEPS + [ |
| Zhi An Ng | 1a856c1 | 2022-01-11 16:11:46 -0800 | [diff] [blame] | 11595 | ":jit_test_mode", |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11596 | ":gemm_microkernel_tester", |
| Zhi An Ng | 16b734c | 2022-01-06 13:54:40 -0800 | [diff] [blame] | 11597 | ], |
| Marat Dukhan | 0b04374 | 2021-06-02 18:29:11 -0700 | [diff] [blame] | 11598 | ) |
| 11599 | |
| 11600 | xnnpack_unit_test( |
| Marat Dukhan | e06c813 | 2021-06-03 08:59:11 -0700 | [diff] [blame] | 11601 | name = "qc8_igemm_minmax_fp32_test", |
| 11602 | timeout = "moderate", |
| 11603 | srcs = [ |
| 11604 | "test/qc8-igemm-minmax-fp32.cc", |
| Zhi An Ng | 4c1fd6f | 2022-01-10 19:35:06 -0800 | [diff] [blame] | 11605 | "test/qc8-igemm-minmax-fp32-2.cc", |
| 11606 | "test/qc8-igemm-minmax-fp32-3.cc", |
| Marat Dukhan | e06c813 | 2021-06-03 08:59:11 -0700 | [diff] [blame] | 11607 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11608 | shard_count = 10, |
| Zhi An Ng | 16b734c | 2022-01-06 13:54:40 -0800 | [diff] [blame] | 11609 | deps = MICROKERNEL_TEST_DEPS + [ |
| Zhi An Ng | 1a856c1 | 2022-01-11 16:11:46 -0800 | [diff] [blame] | 11610 | ":jit_test_mode", |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11611 | ":gemm_microkernel_tester", |
| Zhi An Ng | 16b734c | 2022-01-06 13:54:40 -0800 | [diff] [blame] | 11612 | ], |
| Marat Dukhan | e06c813 | 2021-06-03 08:59:11 -0700 | [diff] [blame] | 11613 | ) |
| 11614 | |
| 11615 | xnnpack_unit_test( |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 11616 | name = "qs8_dwconv_minmax_fp32_test", |
| 11617 | srcs = [ |
| 11618 | "test/qs8-dwconv-minmax-fp32.cc", |
| 11619 | "test/dwconv-microkernel-tester.h", |
| 11620 | "src/xnnpack/AlignedAllocator.h", |
| 11621 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11622 | shard_count = 10, |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 11623 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11624 | ) |
| 11625 | |
| 11626 | xnnpack_unit_test( |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 11627 | name = "qs8_dwconv_minmax_rndnu_test", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11628 | srcs = [ |
| Marat Dukhan | be18f5c | 2021-07-16 18:46:39 -0700 | [diff] [blame] | 11629 | "test/qs8-dwconv-minmax-rndnu.cc", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11630 | "test/dwconv-microkernel-tester.h", |
| 11631 | "src/xnnpack/AlignedAllocator.h", |
| 11632 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 11633 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11634 | ) |
| 11635 | |
| 11636 | xnnpack_unit_test( |
| Marat Dukhan | fee66be | 2021-12-09 17:51:15 -0800 | [diff] [blame] | 11637 | name = "qs8_f32_vcvt_test", |
| 11638 | srcs = [ |
| 11639 | "test/qs8-f32-vcvt.cc", |
| 11640 | "test/vcvt-microkernel-tester.h", |
| 11641 | ] + MICROKERNEL_TEST_HDRS, |
| 11642 | deps = MICROKERNEL_TEST_DEPS, |
| 11643 | ) |
| 11644 | |
| 11645 | xnnpack_unit_test( |
| Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 11646 | name = "qs8_gavgpool_minmax_fp32_test", |
| Marat Dukhan | 4ed53f4 | 2020-08-06 01:12:55 -0700 | [diff] [blame] | 11647 | srcs = [ |
| Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 11648 | "test/qs8-gavgpool-minmax-fp32.cc", |
| Marat Dukhan | 4ed53f4 | 2020-08-06 01:12:55 -0700 | [diff] [blame] | 11649 | "test/gavgpool-microkernel-tester.h", |
| 11650 | "src/xnnpack/AlignedAllocator.h", |
| 11651 | ] + MICROKERNEL_TEST_HDRS, |
| 11652 | deps = MICROKERNEL_TEST_DEPS, |
| 11653 | ) |
| 11654 | |
| 11655 | xnnpack_unit_test( |
| Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 11656 | name = "qs8_gavgpool_minmax_rndnu_test", |
| 11657 | srcs = [ |
| 11658 | "test/qs8-gavgpool-minmax-rndnu.cc", |
| 11659 | "test/gavgpool-microkernel-tester.h", |
| 11660 | "src/xnnpack/AlignedAllocator.h", |
| 11661 | ] + MICROKERNEL_TEST_HDRS, |
| 11662 | deps = MICROKERNEL_TEST_DEPS, |
| 11663 | ) |
| 11664 | |
| 11665 | xnnpack_unit_test( |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11666 | name = "qs8_gemm_minmax_fp32_test", |
| 11667 | timeout = "moderate", |
| 11668 | srcs = [ |
| 11669 | "test/qs8-gemm-minmax-fp32.cc", |
| Zhi An Ng | c27f04b | 2022-01-11 09:34:07 -0800 | [diff] [blame] | 11670 | "test/qs8-gemm-minmax-fp32-2.cc", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11671 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11672 | shard_count = 10, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11673 | deps = MICROKERNEL_TEST_DEPS + [ |
| 11674 | ":gemm_microkernel_tester", |
| 11675 | ], |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11676 | ) |
| 11677 | |
| 11678 | xnnpack_unit_test( |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11679 | name = "qs8_gemm_minmax_rndnu_test", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11680 | timeout = "moderate", |
| 11681 | srcs = [ |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11682 | "test/qs8-gemm-minmax-rndnu.cc", |
| Zhi An Ng | 4c1fd6f | 2022-01-10 19:35:06 -0800 | [diff] [blame] | 11683 | "test/qs8-gemm-minmax-rndnu-2.cc", |
| 11684 | "test/qs8-gemm-minmax-rndnu-3.cc", |
| 11685 | "test/qs8-gemm-minmax-rndnu-4.cc", |
| 11686 | "test/qs8-gemm-minmax-rndnu-5.cc", |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11687 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | 44616e1 | 2022-01-11 10:06:30 -0800 | [diff] [blame] | 11688 | shard_count = 10, |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 11689 | deps = MICROKERNEL_TEST_DEPS + [ |
| Zhi An Ng | 1a856c1 | 2022-01-11 16:11:46 -0800 | [diff] [blame] | 11690 | ":jit_test_mode", |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11691 | ":gemm_microkernel_tester", |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 11692 | ], |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11693 | ) |
| 11694 | |
| 11695 | xnnpack_unit_test( |
| 11696 | name = "qs8_igemm_minmax_fp32_test", |
| 11697 | timeout = "moderate", |
| 11698 | srcs = [ |
| 11699 | "test/qs8-igemm-minmax-fp32.cc", |
| Zhi An Ng | c27f04b | 2022-01-11 09:34:07 -0800 | [diff] [blame] | 11700 | "test/qs8-igemm-minmax-fp32-2.cc", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11701 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11702 | shard_count = 10, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11703 | deps = MICROKERNEL_TEST_DEPS + [ |
| 11704 | ":gemm_microkernel_tester", |
| 11705 | ], |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11706 | ) |
| 11707 | |
| 11708 | xnnpack_unit_test( |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11709 | name = "qs8_igemm_minmax_rndnu_test", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11710 | timeout = "moderate", |
| 11711 | srcs = [ |
| Marat Dukhan | e903dff | 2021-07-16 19:43:41 -0700 | [diff] [blame] | 11712 | "test/qs8-igemm-minmax-rndnu.cc", |
| Zhi An Ng | c27f04b | 2022-01-11 09:34:07 -0800 | [diff] [blame] | 11713 | "test/qs8-igemm-minmax-rndnu-2.cc", |
| 11714 | "test/qs8-igemm-minmax-rndnu-3.cc", |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11715 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | b402cbe | 2022-01-11 10:53:45 -0800 | [diff] [blame] | 11716 | shard_count = 10, |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 11717 | deps = MICROKERNEL_TEST_DEPS + [ |
| Zhi An Ng | 1a856c1 | 2022-01-11 16:11:46 -0800 | [diff] [blame] | 11718 | ":jit_test_mode", |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11719 | ":gemm_microkernel_tester", |
| Zhi An Ng | 13b57dd | 2022-01-06 09:33:20 -0800 | [diff] [blame] | 11720 | ], |
| Marat Dukhan | 9b474cf | 2021-05-25 16:37:48 -0700 | [diff] [blame] | 11721 | ) |
| 11722 | |
| 11723 | xnnpack_unit_test( |
| Marat Dukhan | f948068 | 2020-07-31 14:50:24 -0700 | [diff] [blame] | 11724 | name = "qs8_requantization_test", |
| 11725 | srcs = [ |
| 11726 | "src/xnnpack/requantization-stubs.h", |
| 11727 | "test/qs8-requantization.cc", |
| 11728 | "test/requantization-tester.h", |
| 11729 | ] + MICROKERNEL_TEST_HDRS, |
| 11730 | deps = MICROKERNEL_TEST_DEPS, |
| 11731 | ) |
| 11732 | |
| 11733 | xnnpack_unit_test( |
| Marat Dukhan | d9f3ad4 | 2020-08-10 12:30:58 -0700 | [diff] [blame] | 11734 | name = "qs8_vadd_minmax_test", |
| 11735 | srcs = [ |
| 11736 | "test/qs8-vadd-minmax.cc", |
| 11737 | "test/vadd-microkernel-tester.h", |
| 11738 | ] + MICROKERNEL_TEST_HDRS, |
| 11739 | deps = MICROKERNEL_TEST_DEPS, |
| 11740 | ) |
| 11741 | |
| 11742 | xnnpack_unit_test( |
| Marat Dukhan | 0270d9f | 2020-08-11 00:56:46 -0700 | [diff] [blame] | 11743 | name = "qs8_vaddc_minmax_test", |
| 11744 | srcs = [ |
| 11745 | "test/qs8-vaddc-minmax.cc", |
| 11746 | "test/vaddc-microkernel-tester.h", |
| 11747 | ] + MICROKERNEL_TEST_HDRS, |
| 11748 | deps = MICROKERNEL_TEST_DEPS, |
| 11749 | ) |
| 11750 | |
| 11751 | xnnpack_unit_test( |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 11752 | name = "qs8_vmul_minmax_fp32_test", |
| 11753 | srcs = [ |
| 11754 | "test/qs8-vmul-minmax-fp32.cc", |
| 11755 | "test/vmul-microkernel-tester.h", |
| 11756 | ] + MICROKERNEL_TEST_HDRS, |
| 11757 | deps = MICROKERNEL_TEST_DEPS, |
| 11758 | ) |
| 11759 | |
| 11760 | xnnpack_unit_test( |
| Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 11761 | name = "qs8_vmul_minmax_rndnu_test", |
| 11762 | srcs = [ |
| 11763 | "test/qs8-vmul-minmax-rndnu.cc", |
| 11764 | "test/vmul-microkernel-tester.h", |
| 11765 | ] + MICROKERNEL_TEST_HDRS, |
| 11766 | deps = MICROKERNEL_TEST_DEPS, |
| 11767 | ) |
| 11768 | |
| 11769 | xnnpack_unit_test( |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 11770 | name = "qs8_vmulc_minmax_fp32_test", |
| 11771 | srcs = [ |
| 11772 | "test/qs8-vmulc-minmax-fp32.cc", |
| 11773 | "test/vmulc-microkernel-tester.h", |
| 11774 | ] + MICROKERNEL_TEST_HDRS, |
| 11775 | deps = MICROKERNEL_TEST_DEPS, |
| 11776 | ) |
| 11777 | |
| 11778 | xnnpack_unit_test( |
| Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 11779 | name = "qs8_vmulc_minmax_rndnu_test", |
| 11780 | srcs = [ |
| 11781 | "test/qs8-vmulc-minmax-rndnu.cc", |
| 11782 | "test/vmulc-microkernel-tester.h", |
| 11783 | ] + MICROKERNEL_TEST_HDRS, |
| 11784 | deps = MICROKERNEL_TEST_DEPS, |
| 11785 | ) |
| 11786 | |
| 11787 | xnnpack_unit_test( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 11788 | name = "qu8_avgpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11789 | srcs = [ |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 11790 | "test/qu8-avgpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11791 | "test/avgpool-microkernel-tester.h", |
| 11792 | "src/xnnpack/AlignedAllocator.h", |
| 11793 | ] + MICROKERNEL_TEST_HDRS, |
| 11794 | deps = MICROKERNEL_TEST_DEPS, |
| 11795 | ) |
| 11796 | |
| 11797 | xnnpack_unit_test( |
| Marat Dukhan | 3c35f7a | 2021-07-08 18:55:42 -0700 | [diff] [blame] | 11798 | name = "qu8_dwconv_minmax_fp32_test", |
| 11799 | srcs = [ |
| 11800 | "test/qu8-dwconv-minmax-fp32.cc", |
| 11801 | "test/dwconv-microkernel-tester.h", |
| 11802 | "src/xnnpack/AlignedAllocator.h", |
| 11803 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 11804 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11805 | ) |
| 11806 | |
| 11807 | xnnpack_unit_test( |
| Marat Dukhan | 73a899a | 2021-07-27 00:10:38 -0700 | [diff] [blame] | 11808 | name = "qu8_dwconv_minmax_rndnu_test", |
| 11809 | srcs = [ |
| 11810 | "test/qu8-dwconv-minmax-rndnu.cc", |
| 11811 | "test/dwconv-microkernel-tester.h", |
| 11812 | "src/xnnpack/AlignedAllocator.h", |
| 11813 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| 11814 | deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| 11815 | ) |
| 11816 | |
| 11817 | xnnpack_unit_test( |
| Marat Dukhan | fee66be | 2021-12-09 17:51:15 -0800 | [diff] [blame] | 11818 | name = "qu8_f32_vcvt_test", |
| 11819 | srcs = [ |
| 11820 | "test/qu8-f32-vcvt.cc", |
| 11821 | "test/vcvt-microkernel-tester.h", |
| 11822 | ] + MICROKERNEL_TEST_HDRS, |
| 11823 | deps = MICROKERNEL_TEST_DEPS, |
| 11824 | ) |
| 11825 | |
| 11826 | xnnpack_unit_test( |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 11827 | name = "qu8_gavgpool_minmax_fp32_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11828 | srcs = [ |
| Marat Dukhan | d1f53e4 | 2022-01-12 22:34:51 -0800 | [diff] [blame] | 11829 | "test/qu8-gavgpool-minmax-fp32.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11830 | "test/gavgpool-microkernel-tester.h", |
| 11831 | "src/xnnpack/AlignedAllocator.h", |
| 11832 | ] + MICROKERNEL_TEST_HDRS, |
| 11833 | deps = MICROKERNEL_TEST_DEPS, |
| 11834 | ) |
| 11835 | |
| 11836 | xnnpack_unit_test( |
| Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 11837 | name = "qu8_gavgpool_minmax_rndnu_test", |
| 11838 | srcs = [ |
| 11839 | "test/qu8-gavgpool-minmax-rndnu.cc", |
| 11840 | "test/gavgpool-microkernel-tester.h", |
| 11841 | "src/xnnpack/AlignedAllocator.h", |
| 11842 | ] + MICROKERNEL_TEST_HDRS, |
| 11843 | deps = MICROKERNEL_TEST_DEPS, |
| 11844 | ) |
| 11845 | |
| 11846 | xnnpack_unit_test( |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 11847 | name = "qu8_gemm_minmax_fp32_test", |
| 11848 | srcs = [ |
| 11849 | "test/qu8-gemm-minmax-fp32.cc", |
| Zhi An Ng | c27f04b | 2022-01-11 09:34:07 -0800 | [diff] [blame] | 11850 | "test/qu8-gemm-minmax-fp32-2.cc", |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 11851 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11852 | shard_count = 10, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11853 | deps = MICROKERNEL_TEST_DEPS + [ |
| 11854 | ":gemm_microkernel_tester", |
| 11855 | ], |
| Marat Dukhan | ef47f8d | 2021-07-02 15:08:32 -0700 | [diff] [blame] | 11856 | ) |
| 11857 | |
| 11858 | xnnpack_unit_test( |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11859 | name = "qu8_gemm_minmax_rndnu_test", |
| 11860 | srcs = [ |
| 11861 | "test/qu8-gemm-minmax-rndnu.cc", |
| Zhi An Ng | c27f04b | 2022-01-11 09:34:07 -0800 | [diff] [blame] | 11862 | "test/qu8-gemm-minmax-rndnu-2.cc", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11863 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11864 | deps = MICROKERNEL_TEST_DEPS + [ |
| 11865 | ":gemm_microkernel_tester", |
| 11866 | ], |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11867 | ) |
| 11868 | |
| 11869 | xnnpack_unit_test( |
| 11870 | name = "qu8_igemm_minmax_fp32_test", |
| 11871 | srcs = [ |
| 11872 | "test/qu8-igemm-minmax-fp32.cc", |
| Zhi An Ng | c27f04b | 2022-01-11 09:34:07 -0800 | [diff] [blame] | 11873 | "test/qu8-igemm-minmax-fp32-2.cc", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11874 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 11875 | shard_count = 10, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11876 | deps = MICROKERNEL_TEST_DEPS + [ |
| 11877 | ":gemm_microkernel_tester", |
| 11878 | ], |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11879 | ) |
| 11880 | |
| 11881 | xnnpack_unit_test( |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11882 | name = "qu8_igemm_minmax_rndnu_test", |
| 11883 | srcs = [ |
| 11884 | "test/qu8-igemm-minmax-rndnu.cc", |
| Zhi An Ng | c27f04b | 2022-01-11 09:34:07 -0800 | [diff] [blame] | 11885 | "test/qu8-igemm-minmax-rndnu-2.cc", |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11886 | ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 11887 | shard_count = 2, |
| Zhi An Ng | d90af6f | 2022-01-10 14:36:26 -0800 | [diff] [blame] | 11888 | deps = MICROKERNEL_TEST_DEPS + [ |
| 11889 | ":gemm_microkernel_tester", |
| 11890 | ], |
| Marat Dukhan | 173661d | 2021-07-26 23:47:08 -0700 | [diff] [blame] | 11891 | ) |
| 11892 | |
| 11893 | xnnpack_unit_test( |
| Marat Dukhan | 5b69f8b | 2020-07-24 15:26:48 -0700 | [diff] [blame] | 11894 | name = "qu8_requantization_test", |
| 11895 | srcs = [ |
| 11896 | "src/xnnpack/requantization-stubs.h", |
| 11897 | "test/qu8-requantization.cc", |
| 11898 | "test/requantization-tester.h", |
| 11899 | ] + MICROKERNEL_TEST_HDRS, |
| 11900 | deps = MICROKERNEL_TEST_DEPS, |
| 11901 | ) |
| 11902 | |
| 11903 | xnnpack_unit_test( |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 11904 | name = "qu8_vadd_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11905 | srcs = [ |
| Marat Dukhan | 08b7a97 | 2020-07-14 18:17:29 -0700 | [diff] [blame] | 11906 | "test/qu8-vadd-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11907 | "test/vadd-microkernel-tester.h", |
| 11908 | ] + MICROKERNEL_TEST_HDRS, |
| 11909 | deps = MICROKERNEL_TEST_DEPS, |
| 11910 | ) |
| 11911 | |
| 11912 | xnnpack_unit_test( |
| Marat Dukhan | 76e78c8 | 2021-07-20 21:11:23 -0700 | [diff] [blame] | 11913 | name = "qu8_vaddc_minmax_test", |
| 11914 | srcs = [ |
| 11915 | "test/qu8-vaddc-minmax.cc", |
| 11916 | "test/vaddc-microkernel-tester.h", |
| 11917 | ] + MICROKERNEL_TEST_HDRS, |
| 11918 | deps = MICROKERNEL_TEST_DEPS, |
| 11919 | ) |
| 11920 | |
| 11921 | xnnpack_unit_test( |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 11922 | name = "qu8_vmul_minmax_fp32_test", |
| 11923 | srcs = [ |
| 11924 | "test/qu8-vmul-minmax-fp32.cc", |
| 11925 | "test/vmul-microkernel-tester.h", |
| 11926 | ] + MICROKERNEL_TEST_HDRS, |
| 11927 | deps = MICROKERNEL_TEST_DEPS, |
| 11928 | ) |
| 11929 | |
| 11930 | xnnpack_unit_test( |
| Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 11931 | name = "qu8_vmul_minmax_rndnu_test", |
| 11932 | srcs = [ |
| 11933 | "test/qu8-vmul-minmax-rndnu.cc", |
| 11934 | "test/vmul-microkernel-tester.h", |
| 11935 | ] + MICROKERNEL_TEST_HDRS, |
| 11936 | deps = MICROKERNEL_TEST_DEPS, |
| 11937 | ) |
| 11938 | |
| 11939 | xnnpack_unit_test( |
| Marat Dukhan | a212eac | 2021-08-02 09:58:04 -0700 | [diff] [blame] | 11940 | name = "qu8_vmulc_minmax_fp32_test", |
| 11941 | srcs = [ |
| 11942 | "test/qu8-vmulc-minmax-fp32.cc", |
| 11943 | "test/vmulc-microkernel-tester.h", |
| 11944 | ] + MICROKERNEL_TEST_HDRS, |
| 11945 | deps = MICROKERNEL_TEST_DEPS, |
| 11946 | ) |
| 11947 | |
| 11948 | xnnpack_unit_test( |
| Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 11949 | name = "qu8_vmulc_minmax_rndnu_test", |
| 11950 | srcs = [ |
| 11951 | "test/qu8-vmulc-minmax-rndnu.cc", |
| 11952 | "test/vmulc-microkernel-tester.h", |
| 11953 | ] + MICROKERNEL_TEST_HDRS, |
| 11954 | deps = MICROKERNEL_TEST_DEPS, |
| 11955 | ) |
| 11956 | |
| 11957 | xnnpack_unit_test( |
| Marat Dukhan | cdb42a5 | 2021-11-22 20:09:32 -0800 | [diff] [blame] | 11958 | name = "s8_ibilinear_test", |
| 11959 | srcs = [ |
| 11960 | "test/s8-ibilinear.cc", |
| 11961 | "test/ibilinear-microkernel-tester.h", |
| 11962 | "src/xnnpack/AlignedAllocator.h", |
| 11963 | ] + MICROKERNEL_TEST_HDRS, |
| 11964 | deps = MICROKERNEL_TEST_DEPS, |
| 11965 | ) |
| 11966 | |
| 11967 | xnnpack_unit_test( |
| Marat Dukhan | 2314753 | 2021-08-16 07:26:56 -0700 | [diff] [blame] | 11968 | name = "s8_maxpool_minmax_test", |
| 11969 | srcs = [ |
| 11970 | "test/s8-maxpool-minmax.cc", |
| 11971 | "test/maxpool-microkernel-tester.h", |
| 11972 | ] + MICROKERNEL_TEST_HDRS, |
| 11973 | deps = MICROKERNEL_TEST_DEPS, |
| 11974 | ) |
| 11975 | |
| 11976 | xnnpack_unit_test( |
| Marat Dukhan | e79acb7 | 2021-08-16 19:03:53 -0700 | [diff] [blame] | 11977 | name = "s8_vclamp_test", |
| 11978 | srcs = [ |
| 11979 | "test/s8-vclamp.cc", |
| 11980 | "test/vunary-microkernel-tester.h", |
| 11981 | ] + MICROKERNEL_TEST_HDRS, |
| 11982 | deps = MICROKERNEL_TEST_DEPS, |
| 11983 | ) |
| 11984 | |
| 11985 | xnnpack_unit_test( |
| Marat Dukhan | cdb42a5 | 2021-11-22 20:09:32 -0800 | [diff] [blame] | 11986 | name = "u8_ibilinear_test", |
| 11987 | srcs = [ |
| 11988 | "test/u8-ibilinear.cc", |
| 11989 | "test/ibilinear-microkernel-tester.h", |
| 11990 | "src/xnnpack/AlignedAllocator.h", |
| 11991 | ] + MICROKERNEL_TEST_HDRS, |
| 11992 | deps = MICROKERNEL_TEST_DEPS, |
| 11993 | ) |
| 11994 | |
| 11995 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 11996 | name = "u8_lut32norm_test", |
| 11997 | srcs = [ |
| 11998 | "test/u8-lut32norm.cc", |
| 11999 | "test/lut-norm-microkernel-tester.h", |
| 12000 | ] + MICROKERNEL_TEST_HDRS, |
| 12001 | deps = MICROKERNEL_TEST_DEPS, |
| 12002 | ) |
| 12003 | |
| 12004 | xnnpack_unit_test( |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 12005 | name = "u8_maxpool_minmax_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12006 | srcs = [ |
| Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 12007 | "test/u8-maxpool-minmax.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12008 | "test/maxpool-microkernel-tester.h", |
| 12009 | ] + MICROKERNEL_TEST_HDRS, |
| 12010 | deps = MICROKERNEL_TEST_DEPS, |
| 12011 | ) |
| 12012 | |
| 12013 | xnnpack_unit_test( |
| 12014 | name = "u8_rmax_test", |
| 12015 | srcs = [ |
| 12016 | "test/u8-rmax.cc", |
| 12017 | "test/rmax-microkernel-tester.h", |
| 12018 | ] + MICROKERNEL_TEST_HDRS, |
| 12019 | deps = MICROKERNEL_TEST_DEPS, |
| 12020 | ) |
| 12021 | |
| 12022 | xnnpack_unit_test( |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 12023 | name = "u8_vclamp_test", |
| 12024 | srcs = [ |
| 12025 | "test/u8-vclamp.cc", |
| Marat Dukhan | a6c0516 | 2021-05-13 16:52:02 -0700 | [diff] [blame] | 12026 | "test/vunary-microkernel-tester.h", |
| Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 12027 | ] + MICROKERNEL_TEST_HDRS, |
| 12028 | deps = MICROKERNEL_TEST_DEPS, |
| 12029 | ) |
| 12030 | |
| 12031 | xnnpack_unit_test( |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 12032 | name = "x8_lut_test", |
| Yury Kartynnik | e784186 | 2020-11-04 18:22:18 -0800 | [diff] [blame] | 12033 | srcs = [ |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 12034 | "test/x8-lut.cc", |
| 12035 | "test/lut-microkernel-tester.h", |
| Yury Kartynnik | e784186 | 2020-11-04 18:22:18 -0800 | [diff] [blame] | 12036 | ] + MICROKERNEL_TEST_HDRS, |
| 12037 | deps = MICROKERNEL_TEST_DEPS, |
| 12038 | ) |
| 12039 | |
| 12040 | xnnpack_unit_test( |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 12041 | name = "x8_zip_test", |
| Marat Dukhan | 3bb3bfc | 2020-05-19 17:42:46 -0700 | [diff] [blame] | 12042 | srcs = [ |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 12043 | "test/x8-zip.cc", |
| 12044 | "test/zip-microkernel-tester.h", |
| 12045 | ] + MICROKERNEL_TEST_HDRS, |
| 12046 | deps = MICROKERNEL_TEST_DEPS, |
| 12047 | ) |
| 12048 | |
| 12049 | xnnpack_unit_test( |
| 12050 | name = "x32_depthtospace2d_chw2hwc_test", |
| 12051 | srcs = [ |
| 12052 | "test/x32-depthtospace2d-chw2hwc.cc", |
| 12053 | "test/depthtospace-microkernel-tester.h", |
| Marat Dukhan | 3bb3bfc | 2020-05-19 17:42:46 -0700 | [diff] [blame] | 12054 | ] + MICROKERNEL_TEST_HDRS, |
| 12055 | deps = MICROKERNEL_TEST_DEPS, |
| 12056 | ) |
| 12057 | |
| 12058 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12059 | name = "x32_packx_test", |
| 12060 | srcs = [ |
| 12061 | "test/x32-packx.cc", |
| 12062 | "test/pack-microkernel-tester.h", |
| 12063 | "src/xnnpack/AlignedAllocator.h", |
| 12064 | ] + MICROKERNEL_TEST_HDRS, |
| 12065 | deps = MICROKERNEL_TEST_DEPS, |
| 12066 | ) |
| 12067 | |
| 12068 | xnnpack_unit_test( |
| Alan Kelly | cd21b02 | 2022-01-14 01:44:59 -0800 | [diff] [blame] | 12069 | name = "x8_transpose_test", |
| 12070 | srcs = [ |
| 12071 | "test/x8-transpose.cc", |
| 12072 | "test/transpose-microkernel-tester.h", |
| 12073 | ] + MICROKERNEL_TEST_HDRS, |
| 12074 | deps = MICROKERNEL_TEST_DEPS, |
| 12075 | ) |
| 12076 | |
| 12077 | xnnpack_unit_test( |
| Alan Kelly | 1945f0b | 2021-12-24 01:26:45 -0800 | [diff] [blame] | 12078 | name = "x16_transpose_test", |
| 12079 | srcs = [ |
| 12080 | "test/x16-transpose.cc", |
| 12081 | "test/transpose-microkernel-tester.h", |
| 12082 | ] + MICROKERNEL_TEST_HDRS, |
| 12083 | deps = MICROKERNEL_TEST_DEPS, |
| 12084 | ) |
| 12085 | |
| 12086 | xnnpack_unit_test( |
| Alan Kelly | fda06cb | 2021-12-15 03:30:32 -0800 | [diff] [blame] | 12087 | name = "x32_transpose_test", |
| 12088 | srcs = [ |
| 12089 | "test/x32-transpose.cc", |
| 12090 | "test/transpose-microkernel-tester.h", |
| 12091 | ] + MICROKERNEL_TEST_HDRS, |
| 12092 | deps = MICROKERNEL_TEST_DEPS, |
| 12093 | ) |
| 12094 | |
| 12095 | xnnpack_unit_test( |
| Alan Kelly | d19bde9 | 2022-01-14 02:30:28 -0800 | [diff] [blame^] | 12096 | name = "x64_transpose_test", |
| 12097 | srcs = [ |
| 12098 | "test/x64-transpose.cc", |
| 12099 | "test/transpose-microkernel-tester.h", |
| 12100 | ] + MICROKERNEL_TEST_HDRS, |
| 12101 | deps = MICROKERNEL_TEST_DEPS, |
| 12102 | ) |
| 12103 | |
| 12104 | xnnpack_unit_test( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12105 | name = "x32_unpool_test", |
| 12106 | srcs = [ |
| 12107 | "test/x32-unpool.cc", |
| 12108 | "test/unpool-microkernel-tester.h", |
| 12109 | ] + MICROKERNEL_TEST_HDRS, |
| 12110 | deps = MICROKERNEL_TEST_DEPS, |
| 12111 | ) |
| 12112 | |
| 12113 | xnnpack_unit_test( |
| 12114 | name = "x32_zip_test", |
| 12115 | srcs = [ |
| 12116 | "test/x32-zip.cc", |
| 12117 | "test/zip-microkernel-tester.h", |
| 12118 | ] + MICROKERNEL_TEST_HDRS, |
| 12119 | deps = MICROKERNEL_TEST_DEPS, |
| 12120 | ) |
| 12121 | |
| 12122 | xnnpack_unit_test( |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 12123 | name = "xx_fill_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12124 | srcs = [ |
| Marat Dukhan | 933051b | 2021-08-07 16:26:15 -0700 | [diff] [blame] | 12125 | "test/xx-fill.cc", |
| 12126 | "test/fill-microkernel-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12127 | ] + MICROKERNEL_TEST_HDRS, |
| 12128 | deps = MICROKERNEL_TEST_DEPS, |
| 12129 | ) |
| 12130 | |
| Marat Dukhan | 0461f2d | 2021-08-08 12:36:29 -0700 | [diff] [blame] | 12131 | xnnpack_unit_test( |
| 12132 | name = "xx_pad_test", |
| 12133 | srcs = [ |
| 12134 | "test/xx-pad.cc", |
| 12135 | "test/pad-microkernel-tester.h", |
| 12136 | ] + MICROKERNEL_TEST_HDRS, |
| 12137 | deps = MICROKERNEL_TEST_DEPS, |
| 12138 | ) |
| 12139 | |
| Marat Dukhan | 20c3b92 | 2020-03-10 03:45:06 -0700 | [diff] [blame] | 12140 | ########################## Size tests for the library ######################### |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12141 | |
| 12142 | xnnpack_binary( |
| Marat Dukhan | 20c3b92 | 2020-03-10 03:45:06 -0700 | [diff] [blame] | 12143 | name = "operator_size_test", |
| 12144 | srcs = ["test/operator-size.c"], |
| Marat Dukhan | f0cb70a | 2021-03-30 15:45:15 -0700 | [diff] [blame] | 12145 | deps = [":xnnpack_for_tfjs"], |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12146 | ) |
| 12147 | |
| Marat Dukhan | 20c3b92 | 2020-03-10 03:45:06 -0700 | [diff] [blame] | 12148 | xnnpack_binary( |
| 12149 | name = "subgraph_size_test", |
| 12150 | srcs = ["test/subgraph-size.c"], |
| 12151 | deps = [":XNNPACK"], |
| 12152 | ) |
| 12153 | |
| 12154 | ########################### Unit tests for operators ########################## |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12155 | |
| 12156 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 12157 | name = "abs_nc_test", |
| 12158 | srcs = [ |
| 12159 | "test/abs-nc.cc", |
| 12160 | "test/abs-operator-tester.h", |
| 12161 | ], |
| 12162 | deps = OPERATOR_TEST_DEPS, |
| 12163 | ) |
| 12164 | |
| 12165 | xnnpack_unit_test( |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 12166 | name = "add_nd_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 12167 | timeout = "moderate", |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 12168 | srcs = [ |
| 12169 | "test/add-nd.cc", |
| 12170 | "test/binary-elementwise-operator-tester.h", |
| 12171 | ], |
| Zhi An Ng | c7e534f | 2022-01-10 14:14:37 -0800 | [diff] [blame] | 12172 | shard_count = 5, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12173 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 12174 | ) |
| 12175 | |
| 12176 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12177 | name = "argmax_pooling_nhwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12178 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12179 | "test/argmax-pooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12180 | "test/argmax-pooling-operator-tester.h", |
| 12181 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12182 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12183 | ) |
| 12184 | |
| 12185 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12186 | name = "average_pooling_nhwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12187 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12188 | "test/average-pooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12189 | "test/average-pooling-operator-tester.h", |
| 12190 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12191 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12192 | ) |
| 12193 | |
| 12194 | xnnpack_unit_test( |
| Marat Dukhan | 64e5251 | 2020-06-09 13:41:16 -0700 | [diff] [blame] | 12195 | name = "bankers_rounding_nc_test", |
| 12196 | srcs = [ |
| 12197 | "test/bankers-rounding-nc.cc", |
| 12198 | "test/bankers-rounding-operator-tester.h", |
| 12199 | ], |
| 12200 | deps = OPERATOR_TEST_DEPS, |
| 12201 | ) |
| 12202 | |
| 12203 | xnnpack_unit_test( |
| 12204 | name = "ceiling_nc_test", |
| 12205 | srcs = [ |
| 12206 | "test/ceiling-nc.cc", |
| 12207 | "test/ceiling-operator-tester.h", |
| 12208 | ], |
| 12209 | deps = OPERATOR_TEST_DEPS, |
| 12210 | ) |
| 12211 | |
| 12212 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12213 | name = "channel_shuffle_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12214 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12215 | "test/channel-shuffle-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12216 | "test/channel-shuffle-operator-tester.h", |
| 12217 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12218 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12219 | ) |
| 12220 | |
| 12221 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12222 | name = "clamp_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12223 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12224 | "test/clamp-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12225 | "test/clamp-operator-tester.h", |
| 12226 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12227 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12228 | ) |
| 12229 | |
| 12230 | xnnpack_unit_test( |
| Marat Dukhan | 065b11e | 2020-05-22 09:49:41 -0700 | [diff] [blame] | 12231 | name = "constant_pad_nd_test", |
| 12232 | srcs = [ |
| 12233 | "test/constant-pad-nd.cc", |
| 12234 | "test/constant-pad-operator-tester.h", |
| 12235 | ], |
| 12236 | deps = OPERATOR_TEST_DEPS, |
| 12237 | ) |
| 12238 | |
| 12239 | xnnpack_unit_test( |
| Marat Dukhan | af2ba00 | 2021-10-24 14:21:41 -0700 | [diff] [blame] | 12240 | name = "convert_nc_test", |
| 12241 | srcs = [ |
| 12242 | "test/convert-nc.cc", |
| 12243 | "test/convert-operator-tester.h", |
| 12244 | ], |
| 12245 | deps = OPERATOR_TEST_DEPS, |
| 12246 | ) |
| 12247 | |
| 12248 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12249 | name = "convolution_nhwc_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 12250 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12251 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12252 | "test/convolution-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12253 | "test/convolution-operator-tester.h", |
| 12254 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12255 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12256 | ) |
| 12257 | |
| 12258 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12259 | name = "convolution_nchw_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 12260 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12261 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12262 | "test/convolution-nchw.cc", |
| 12263 | "test/convolution-operator-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12264 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12265 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12266 | ) |
| 12267 | |
| 12268 | xnnpack_unit_test( |
| Marat Dukhan | 4e21b27 | 2020-06-04 18:45:01 -0700 | [diff] [blame] | 12269 | name = "copy_nc_test", |
| 12270 | srcs = [ |
| 12271 | "test/copy-nc.cc", |
| 12272 | "test/copy-operator-tester.h", |
| 12273 | ], |
| 12274 | deps = OPERATOR_TEST_DEPS, |
| 12275 | ) |
| 12276 | |
| 12277 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12278 | name = "deconvolution_nhwc_test", |
| Artsiom Ablavatski | c1aa297 | 2020-12-08 11:23:34 -0800 | [diff] [blame] | 12279 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12280 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12281 | "test/deconvolution-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12282 | "test/deconvolution-operator-tester.h", |
| 12283 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Alan Kelly | 6621058 | 2021-11-23 00:57:36 -0800 | [diff] [blame] | 12284 | shard_count = 10, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12285 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12286 | ) |
| 12287 | |
| 12288 | xnnpack_unit_test( |
| Marat Dukhan | 188d104 | 2020-11-24 23:39:40 -0800 | [diff] [blame] | 12289 | name = "depth_to_space_nchw2nhwc_test", |
| Artsiom Ablavatski | 0f1dc18 | 2020-11-05 19:21:50 -0800 | [diff] [blame] | 12290 | srcs = [ |
| Marat Dukhan | 188d104 | 2020-11-24 23:39:40 -0800 | [diff] [blame] | 12291 | "test/depth-to-space-nchw2nhwc.cc", |
| Artsiom Ablavatski | 0f1dc18 | 2020-11-05 19:21:50 -0800 | [diff] [blame] | 12292 | "test/depth-to-space-operator-tester.h", |
| 12293 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| 12294 | deps = OPERATOR_TEST_DEPS, |
| 12295 | ) |
| 12296 | |
| 12297 | xnnpack_unit_test( |
| Marat Dukhan | 0e52117 | 2020-11-25 13:10:04 -0800 | [diff] [blame] | 12298 | name = "depth_to_space_nhwc_test", |
| 12299 | srcs = [ |
| 12300 | "test/depth-to-space-nhwc.cc", |
| 12301 | "test/depth-to-space-operator-tester.h", |
| 12302 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| 12303 | deps = OPERATOR_TEST_DEPS, |
| 12304 | ) |
| 12305 | |
| 12306 | xnnpack_unit_test( |
| Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 12307 | name = "divide_nd_test", |
| 12308 | srcs = [ |
| 12309 | "test/binary-elementwise-operator-tester.h", |
| 12310 | "test/divide-nd.cc", |
| 12311 | ], |
| Zhi An Ng | c7e534f | 2022-01-10 14:14:37 -0800 | [diff] [blame] | 12312 | shard_count = 5, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12313 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 12314 | ) |
| 12315 | |
| 12316 | xnnpack_unit_test( |
| Marat Dukhan | b6bd4bc | 2020-12-01 17:01:40 -0800 | [diff] [blame] | 12317 | name = "elu_nc_test", |
| 12318 | srcs = [ |
| 12319 | "test/elu-nc.cc", |
| 12320 | "test/elu-operator-tester.h", |
| 12321 | ], |
| 12322 | deps = OPERATOR_TEST_DEPS, |
| 12323 | ) |
| 12324 | |
| 12325 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12326 | name = "fully_connected_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12327 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12328 | "test/fully-connected-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12329 | "test/fully-connected-operator-tester.h", |
| 12330 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12331 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12332 | ) |
| 12333 | |
| 12334 | xnnpack_unit_test( |
| Marat Dukhan | 64e5251 | 2020-06-09 13:41:16 -0700 | [diff] [blame] | 12335 | name = "floor_nc_test", |
| 12336 | srcs = [ |
| 12337 | "test/floor-nc.cc", |
| 12338 | "test/floor-operator-tester.h", |
| 12339 | ], |
| 12340 | deps = OPERATOR_TEST_DEPS, |
| 12341 | ) |
| 12342 | |
| 12343 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12344 | name = "global_average_pooling_nwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12345 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12346 | "test/global-average-pooling-nwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12347 | "test/global-average-pooling-operator-tester.h", |
| Marat Dukhan | ef61d02 | 2020-06-19 13:54:49 -0700 | [diff] [blame] | 12348 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12349 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12350 | ) |
| 12351 | |
| 12352 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12353 | name = "global_average_pooling_ncw_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12354 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12355 | "test/global-average-pooling-ncw.cc", |
| 12356 | "test/global-average-pooling-operator-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12357 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12358 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12359 | ) |
| 12360 | |
| 12361 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12362 | name = "hardswish_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12363 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12364 | "test/hardswish-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12365 | "test/hardswish-operator-tester.h", |
| 12366 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12367 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12368 | ) |
| 12369 | |
| 12370 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12371 | name = "leaky_relu_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12372 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12373 | "test/leaky-relu-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12374 | "test/leaky-relu-operator-tester.h", |
| 12375 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12376 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12377 | ) |
| 12378 | |
| 12379 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12380 | name = "max_pooling_nhwc_test", |
| Artsiom Ablavatski | 2202c81 | 2021-01-22 14:16:43 -0800 | [diff] [blame] | 12381 | timeout = "moderate", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12382 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12383 | "test/max-pooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12384 | "test/max-pooling-operator-tester.h", |
| 12385 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12386 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12387 | ) |
| 12388 | |
| 12389 | xnnpack_unit_test( |
| Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 12390 | name = "maximum_nd_test", |
| 12391 | srcs = [ |
| 12392 | "test/binary-elementwise-operator-tester.h", |
| 12393 | "test/maximum-nd.cc", |
| 12394 | ], |
| Zhi An Ng | c7e534f | 2022-01-10 14:14:37 -0800 | [diff] [blame] | 12395 | shard_count = 5, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12396 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 12397 | ) |
| 12398 | |
| 12399 | xnnpack_unit_test( |
| 12400 | name = "minimum_nd_test", |
| 12401 | srcs = [ |
| 12402 | "test/binary-elementwise-operator-tester.h", |
| 12403 | "test/minimum-nd.cc", |
| 12404 | ], |
| Zhi An Ng | c7e534f | 2022-01-10 14:14:37 -0800 | [diff] [blame] | 12405 | shard_count = 5, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12406 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 12407 | ) |
| 12408 | |
| 12409 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12410 | name = "multiply_nd_test", |
| Marat Dukhan | cf557d4 | 2021-08-10 23:28:38 -0700 | [diff] [blame] | 12411 | timeout = "moderate", |
| Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 12412 | srcs = [ |
| Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 12413 | "test/binary-elementwise-operator-tester.h", |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12414 | "test/multiply-nd.cc", |
| Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 12415 | ], |
| Zhi An Ng | c7e534f | 2022-01-10 14:14:37 -0800 | [diff] [blame] | 12416 | shard_count = 5, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12417 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 12418 | ) |
| 12419 | |
| 12420 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 12421 | name = "negate_nc_test", |
| 12422 | srcs = [ |
| 12423 | "test/negate-nc.cc", |
| 12424 | "test/negate-operator-tester.h", |
| 12425 | ], |
| 12426 | deps = OPERATOR_TEST_DEPS, |
| 12427 | ) |
| 12428 | |
| 12429 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12430 | name = "prelu_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12431 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12432 | "test/prelu-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12433 | "test/prelu-operator-tester.h", |
| 12434 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12435 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12436 | ) |
| 12437 | |
| 12438 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12439 | name = "resize_bilinear_nhwc_test", |
| Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 12440 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12441 | "test/resize-bilinear-nhwc.cc", |
| Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 12442 | "test/resize-bilinear-operator-tester.h", |
| 12443 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12444 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 12445 | ) |
| 12446 | |
| 12447 | xnnpack_unit_test( |
| Artsiom Ablavatski | 9791810 | 2020-10-27 15:52:59 -0700 | [diff] [blame] | 12448 | name = "resize_bilinear_nchw_test", |
| 12449 | srcs = [ |
| 12450 | "test/resize-bilinear-nchw.cc", |
| 12451 | "test/resize-bilinear-operator-tester.h", |
| 12452 | ] + OPERATOR_TEST_PARAMS_HDRS, |
| 12453 | deps = OPERATOR_TEST_DEPS, |
| 12454 | ) |
| 12455 | |
| 12456 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12457 | name = "sigmoid_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12458 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12459 | "test/sigmoid-nc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12460 | "test/sigmoid-operator-tester.h", |
| 12461 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12462 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12463 | ) |
| 12464 | |
| 12465 | xnnpack_unit_test( |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 12466 | name = "softmax_nc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12467 | srcs = [ |
| Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 12468 | "test/softmax-nc.cc", |
| 12469 | "test/softmax-operator-tester.h", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12470 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12471 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12472 | ) |
| 12473 | |
| 12474 | xnnpack_unit_test( |
| Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame] | 12475 | name = "square_nc_test", |
| 12476 | srcs = [ |
| 12477 | "test/square-nc.cc", |
| 12478 | "test/square-operator-tester.h", |
| 12479 | ], |
| 12480 | deps = OPERATOR_TEST_DEPS, |
| 12481 | ) |
| 12482 | |
| 12483 | xnnpack_unit_test( |
| Marat Dukhan | 6804bbd | 2020-06-30 19:26:11 -0700 | [diff] [blame] | 12484 | name = "square_root_nc_test", |
| 12485 | srcs = [ |
| 12486 | "test/square-root-nc.cc", |
| 12487 | "test/square-root-operator-tester.h", |
| 12488 | ], |
| 12489 | deps = OPERATOR_TEST_DEPS, |
| 12490 | ) |
| 12491 | |
| 12492 | xnnpack_unit_test( |
| Marat Dukhan | f739926 | 2020-06-05 10:58:44 -0700 | [diff] [blame] | 12493 | name = "squared_difference_nd_test", |
| 12494 | srcs = [ |
| 12495 | "test/binary-elementwise-operator-tester.h", |
| 12496 | "test/squared-difference-nd.cc", |
| 12497 | ], |
| Zhi An Ng | c7e534f | 2022-01-10 14:14:37 -0800 | [diff] [blame] | 12498 | shard_count = 5, |
| Marat Dukhan | f739926 | 2020-06-05 10:58:44 -0700 | [diff] [blame] | 12499 | deps = OPERATOR_TEST_DEPS, |
| 12500 | ) |
| 12501 | |
| 12502 | xnnpack_unit_test( |
| Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 12503 | name = "subtract_nd_test", |
| 12504 | srcs = [ |
| 12505 | "test/binary-elementwise-operator-tester.h", |
| 12506 | "test/subtract-nd.cc", |
| 12507 | ], |
| Zhi An Ng | c7e534f | 2022-01-10 14:14:37 -0800 | [diff] [blame] | 12508 | shard_count = 5, |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12509 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 12510 | ) |
| 12511 | |
| 12512 | xnnpack_unit_test( |
| Marat Dukhan | 5de7bc0 | 2021-09-09 19:04:01 -0700 | [diff] [blame] | 12513 | name = "tanh_nc_test", |
| 12514 | srcs = [ |
| 12515 | "test/tanh-nc.cc", |
| 12516 | "test/tanh-operator-tester.h", |
| 12517 | ], |
| 12518 | deps = OPERATOR_TEST_DEPS, |
| 12519 | ) |
| 12520 | |
| 12521 | xnnpack_unit_test( |
| Marat Dukhan | 64e5251 | 2020-06-09 13:41:16 -0700 | [diff] [blame] | 12522 | name = "truncation_nc_test", |
| 12523 | srcs = [ |
| 12524 | "test/truncation-nc.cc", |
| 12525 | "test/truncation-operator-tester.h", |
| 12526 | ], |
| 12527 | deps = OPERATOR_TEST_DEPS, |
| 12528 | ) |
| 12529 | |
| 12530 | xnnpack_unit_test( |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12531 | name = "unpooling_nhwc_test", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12532 | srcs = [ |
| Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 12533 | "test/unpooling-nhwc.cc", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12534 | "test/unpooling-operator-tester.h", |
| 12535 | ], |
| Marat Dukhan | 1b35463 | 2020-03-23 12:50:22 -0700 | [diff] [blame] | 12536 | deps = OPERATOR_TEST_DEPS, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12537 | ) |
| 12538 | |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 12539 | ############################### Misc unit tests ############################### |
| 12540 | |
| 12541 | xnnpack_unit_test( |
| 12542 | name = "memory_planner_test", |
| 12543 | srcs = [ |
| 12544 | "test/memory-planner-test.cc", |
| 12545 | ], |
| 12546 | deps = [ |
| 12547 | ":XNNPACK", |
| 12548 | ":memory_planner", |
| 12549 | ], |
| 12550 | ) |
| 12551 | |
| XNNPACK Team | ab8c4c8 | 2020-10-09 08:05:51 -0700 | [diff] [blame] | 12552 | xnnpack_unit_test( |
| 12553 | name = "subgraph_nchw_test", |
| 12554 | srcs = [ |
| 12555 | "src/xnnpack/subgraph.h", |
| 12556 | "test/subgraph-nchw.cc", |
| 12557 | "test/subgraph-tester.h", |
| 12558 | ], |
| 12559 | deps = [ |
| 12560 | ":XNNPACK", |
| 12561 | ], |
| 12562 | ) |
| 12563 | |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 12564 | xnnpack_unit_test( |
| Zhi An Ng | 7d45d90 | 2022-01-12 09:18:24 -0800 | [diff] [blame] | 12565 | name = "jit_test", |
| 12566 | srcs = [ |
| 12567 | "test/jit.cc", |
| 12568 | ], |
| 12569 | deps = [ |
| 12570 | ":XNNPACK", |
| 12571 | ":jit_test_mode", |
| 12572 | ], |
| 12573 | ) |
| 12574 | |
| 12575 | xnnpack_unit_test( |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 12576 | name = "aarch32_assembler_test", |
| 12577 | srcs = [ |
| 12578 | "test/aarch32-assembler.cc", |
| 12579 | ], |
| 12580 | deps = [ |
| Zhi An Ng | 6883abb | 2021-12-14 10:13:18 -0800 | [diff] [blame] | 12581 | ":XNNPACK", |
| 12582 | ":jit_test_mode", |
| Zhi An Ng | b559fe9 | 2021-12-06 09:25:38 -0800 | [diff] [blame] | 12583 | ], |
| 12584 | ) |
| 12585 | |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12586 | ############################# Build configurations ############################# |
| 12587 | |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 12588 | # Enables usage of assembly kernels. |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12589 | config_setting( |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 12590 | name = "xnn_enable_assembly_explicit_true", |
| 12591 | define_values = {"xnn_enable_assembly": "true"}, |
| 12592 | ) |
| 12593 | |
| 12594 | # Disables usage of assembly kernels. |
| 12595 | config_setting( |
| 12596 | name = "xnn_enable_assembly_explicit_false", |
| 12597 | define_values = {"xnn_enable_assembly": "false"}, |
| 12598 | ) |
| 12599 | |
| Marat Dukhan | 9de90e0 | 2020-06-18 16:04:12 -0700 | [diff] [blame] | 12600 | # Enables usage of sparse inference. |
| 12601 | config_setting( |
| 12602 | name = "xnn_enable_sparse_explicit_true", |
| 12603 | define_values = {"xnn_enable_sparse": "true"}, |
| 12604 | ) |
| 12605 | |
| 12606 | # Disables usage of sparse inference. |
| 12607 | config_setting( |
| 12608 | name = "xnn_enable_sparse_explicit_false", |
| 12609 | define_values = {"xnn_enable_sparse": "false"}, |
| 12610 | ) |
| 12611 | |
| Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 12612 | # Disables usage of HMP-aware optimizations. |
| 12613 | config_setting( |
| 12614 | name = "xnn_enable_hmp_explicit_false", |
| 12615 | define_values = {"xnn_enable_hmp": "false"}, |
| 12616 | ) |
| 12617 | |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 12618 | # Enable usage of optimized memory allocation |
| 12619 | config_setting( |
| 12620 | name = "xnn_enable_memopt_explicit_true", |
| Marat Dukhan | 03f4621 | 2021-03-30 21:29:49 -0700 | [diff] [blame] | 12621 | define_values = {"xnn_enable_memopt": "true"}, |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 12622 | ) |
| 12623 | |
| 12624 | # Disable usage of optimized memory allocation |
| 12625 | config_setting( |
| 12626 | name = "xnn_enable_memopt_explicit_false", |
| Marat Dukhan | 03f4621 | 2021-03-30 21:29:49 -0700 | [diff] [blame] | 12627 | define_values = {"xnn_enable_memopt": "false"}, |
| Chao Mei | 6ddfc60 | 2020-05-13 22:29:36 -0700 | [diff] [blame] | 12628 | ) |
| 12629 | |
| Marat Dukhan | b939cdb | 2021-03-30 18:51:51 -0700 | [diff] [blame] | 12630 | # Enable QS8 inference in TFLite-specific version |
| 12631 | config_setting( |
| 12632 | name = "xnn_enable_qs8_explicit_true", |
| 12633 | define_values = {"xnn_enable_qs8": "true"}, |
| 12634 | ) |
| 12635 | |
| 12636 | # Disable QS8 inference in TFLite-specific version |
| 12637 | config_setting( |
| 12638 | name = "xnn_enable_qs8_explicit_false", |
| 12639 | define_values = {"xnn_enable_qs8": "false"}, |
| 12640 | ) |
| 12641 | |
| Marat Dukhan | 8c8c159 | 2021-07-13 13:59:02 -0700 | [diff] [blame] | 12642 | # Enable QU8 inference in TFLite-specific version |
| 12643 | config_setting( |
| 12644 | name = "xnn_enable_qu8_explicit_true", |
| 12645 | define_values = {"xnn_enable_qu8": "true"}, |
| 12646 | ) |
| 12647 | |
| 12648 | # Disable QU8 inference in TFLite-specific version |
| 12649 | config_setting( |
| 12650 | name = "xnn_enable_qu8_explicit_false", |
| 12651 | define_values = {"xnn_enable_qu8": "false"}, |
| 12652 | ) |
| 12653 | |
| Zhi An Ng | 25764d8 | 2022-01-07 11:27:36 -0800 | [diff] [blame] | 12654 | # Enables usage of JIT kernels. |
| 12655 | config_setting( |
| 12656 | name = "xnn_enable_jit_explicit_true", |
| 12657 | define_values = {"xnn_enable_jit": "true"}, |
| 12658 | ) |
| 12659 | |
| 12660 | # Disables usage of JIT kernels. |
| 12661 | config_setting( |
| 12662 | name = "xnn_enable_jit_explicit_false", |
| 12663 | define_values = {"xnn_enable_jit": "false"}, |
| 12664 | ) |
| 12665 | |
| Marat Dukhan | 189c1d0 | 2021-09-03 15:39:54 -0700 | [diff] [blame] | 12666 | # Target Chrome M87 instructions in WAsm SIMD build |
| 12667 | config_setting( |
| 12668 | name = "xnn_wasmsimd_version_m87", |
| 12669 | define_values = {"xnn_wasmsimd_version": "m87"}, |
| 12670 | ) |
| 12671 | |
| 12672 | # Target Chrome M88 instructions in WAsm SIMD build |
| 12673 | config_setting( |
| 12674 | name = "xnn_wasmsimd_version_m88", |
| 12675 | define_values = {"xnn_wasmsimd_version": "m88"}, |
| 12676 | ) |
| 12677 | |
| 12678 | # Target Chrome M91 instructions in WAsm SIMD build |
| 12679 | config_setting( |
| 12680 | name = "xnn_wasmsimd_version_m91", |
| 12681 | define_values = {"xnn_wasmsimd_version": "m91"}, |
| 12682 | ) |
| 12683 | |
| Marat Dukhan | a0b45e5 | 2022-01-10 14:48:36 -0800 | [diff] [blame] | 12684 | # Fully disable logging |
| 12685 | config_setting( |
| 12686 | name = "xnn_log_level_explicit_none", |
| 12687 | define_values = {"xnn_log_level": "none"}, |
| 12688 | ) |
| 12689 | |
| 12690 | # Log fatal errors only |
| 12691 | config_setting( |
| 12692 | name = "xnn_log_level_explicit_fatal", |
| 12693 | define_values = {"xnn_log_level": "fatal"}, |
| 12694 | ) |
| 12695 | |
| 12696 | # Log fatal and non-fatal errors |
| 12697 | config_setting( |
| 12698 | name = "xnn_log_level_explicit_error", |
| 12699 | define_values = {"xnn_log_level": "error"}, |
| 12700 | ) |
| 12701 | |
| 12702 | # Log warnings and errors |
| 12703 | config_setting( |
| 12704 | name = "xnn_log_level_explicit_warning", |
| 12705 | define_values = {"xnn_log_level": "warning"}, |
| 12706 | ) |
| 12707 | |
| 12708 | # Log information messages, warnings and errors |
| 12709 | config_setting( |
| 12710 | name = "xnn_log_level_explicit_info", |
| 12711 | define_values = {"xnn_log_level": "info"}, |
| 12712 | ) |
| 12713 | |
| 12714 | # Log all messages, including debug messages |
| 12715 | config_setting( |
| 12716 | name = "xnn_log_level_explicit_debug", |
| 12717 | define_values = {"xnn_log_level": "debug"}, |
| 12718 | ) |
| 12719 | |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 12720 | # Builds with -c dbg |
| 12721 | config_setting( |
| 12722 | name = "debug_build", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12723 | values = { |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 12724 | "compilation_mode": "dbg", |
| 12725 | }, |
| 12726 | ) |
| 12727 | |
| 12728 | # Builds with -c opt |
| 12729 | config_setting( |
| 12730 | name = "optimized_build", |
| 12731 | values = { |
| 12732 | "compilation_mode": "opt", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12733 | }, |
| 12734 | ) |
| 12735 | |
| 12736 | config_setting( |
| Marat Dukhan | 52e4443 | 2021-08-20 11:58:11 -0700 | [diff] [blame] | 12737 | name = "linux_arm64", |
| 12738 | values = {"cpu": "aarch64"}, |
| 12739 | ) |
| 12740 | |
| 12741 | config_setting( |
| Marat Dukhan | b864235 | 2019-10-30 15:43:02 -0700 | [diff] [blame] | 12742 | name = "linux_k8", |
| 12743 | values = {"cpu": "k8"}, |
| 12744 | ) |
| 12745 | |
| 12746 | config_setting( |
| Marat Dukhan | 582094e | 2020-04-30 17:21:25 -0700 | [diff] [blame] | 12747 | name = "linux_arm", |
| 12748 | values = {"cpu": "arm"}, |
| Marat Dukhan | 4e45e66 | 2019-10-03 15:40:24 -0700 | [diff] [blame] | 12749 | ) |
| 12750 | |
| 12751 | config_setting( |
| Marat Dukhan | f0bd4de | 2020-06-15 15:53:19 -0700 | [diff] [blame] | 12752 | name = "linux_armeabi", |
| 12753 | values = {"cpu": "armeabi"}, |
| 12754 | ) |
| 12755 | |
| 12756 | config_setting( |
| Terry Heo | 68eef3f | 2020-04-13 22:53:52 -0700 | [diff] [blame] | 12757 | name = "linux_armhf", |
| 12758 | values = {"cpu": "armhf"}, |
| 12759 | ) |
| 12760 | |
| 12761 | config_setting( |
| Marat Dukhan | a720e93 | 2020-06-10 13:01:11 -0700 | [diff] [blame] | 12762 | name = "linux_armv7a", |
| 12763 | values = {"cpu": "armv7a"}, |
| 12764 | ) |
| 12765 | |
| 12766 | config_setting( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12767 | name = "android", |
| 12768 | values = {"crosstool_top": "//external:android/crosstool"}, |
| 12769 | ) |
| 12770 | |
| 12771 | config_setting( |
| 12772 | name = "android_armv7", |
| 12773 | values = { |
| 12774 | "crosstool_top": "//external:android/crosstool", |
| 12775 | "cpu": "armeabi-v7a", |
| 12776 | }, |
| 12777 | ) |
| 12778 | |
| 12779 | config_setting( |
| 12780 | name = "android_arm64", |
| 12781 | values = { |
| 12782 | "crosstool_top": "//external:android/crosstool", |
| 12783 | "cpu": "arm64-v8a", |
| 12784 | }, |
| 12785 | ) |
| 12786 | |
| 12787 | config_setting( |
| 12788 | name = "android_x86", |
| 12789 | values = { |
| 12790 | "crosstool_top": "//external:android/crosstool", |
| 12791 | "cpu": "x86", |
| 12792 | }, |
| 12793 | ) |
| 12794 | |
| 12795 | config_setting( |
| 12796 | name = "android_x86_64", |
| 12797 | values = { |
| 12798 | "crosstool_top": "//external:android/crosstool", |
| 12799 | "cpu": "x86_64", |
| 12800 | }, |
| 12801 | ) |
| 12802 | |
| 12803 | config_setting( |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 12804 | name = "windows_x86_64", |
| 12805 | values = {"cpu": "x64_windows"}, |
| Marat Dukhan | 9fe932e | 2020-04-11 17:14:15 -0700 | [diff] [blame] | 12806 | ) |
| 12807 | |
| 12808 | config_setting( |
| Marat Dukhan | 10a3808 | 2020-04-17 03:58:35 -0700 | [diff] [blame] | 12809 | name = "windows_x86_64_clang", |
| 12810 | values = { |
| 12811 | "compiler": "clang-cl", |
| 12812 | "cpu": "x64_windows", |
| 12813 | }, |
| 12814 | ) |
| 12815 | |
| 12816 | config_setting( |
| 12817 | name = "windows_x86_64_mingw", |
| 12818 | values = { |
| 12819 | "compiler": "mingw-gcc", |
| 12820 | "cpu": "x64_windows", |
| 12821 | }, |
| 12822 | ) |
| 12823 | |
| 12824 | config_setting( |
| 12825 | name = "windows_x86_64_msys", |
| 12826 | values = { |
| 12827 | "compiler": "msys-gcc", |
| 12828 | "cpu": "x64_windows", |
| 12829 | }, |
| Marat Dukhan | 9fe932e | 2020-04-11 17:14:15 -0700 | [diff] [blame] | 12830 | ) |
| 12831 | |
| 12832 | config_setting( |
| Marat Dukhan | 885ca24 | 2019-10-07 09:17:32 -0700 | [diff] [blame] | 12833 | name = "macos_x86_64", |
| 12834 | values = { |
| 12835 | "apple_platform_type": "macos", |
| 12836 | "cpu": "darwin", |
| 12837 | }, |
| 12838 | ) |
| 12839 | |
| 12840 | config_setting( |
| Simon Maurer | ae33ab8 | 2021-03-03 23:38:22 +0100 | [diff] [blame] | 12841 | name = "macos_arm64", |
| 12842 | values = { |
| 12843 | "apple_platform_type": "macos", |
| 12844 | "cpu": "darwin_arm64", |
| 12845 | }, |
| 12846 | ) |
| 12847 | |
| 12848 | config_setting( |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12849 | name = "emscripten", |
| XNNPACK Team | 3bfbdaf | 2021-03-29 15:26:23 -0700 | [diff] [blame] | 12850 | values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"}, |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12851 | ) |
| 12852 | |
| 12853 | config_setting( |
| 12854 | name = "emscripten_wasm", |
| 12855 | values = { |
| XNNPACK Team | 3bfbdaf | 2021-03-29 15:26:23 -0700 | [diff] [blame] | 12856 | "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12857 | "cpu": "wasm", |
| 12858 | }, |
| 12859 | ) |
| 12860 | |
| 12861 | config_setting( |
| 12862 | name = "emscripten_wasmsimd", |
| 12863 | values = { |
| XNNPACK Team | 3bfbdaf | 2021-03-29 15:26:23 -0700 | [diff] [blame] | 12864 | "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12865 | "cpu": "wasm", |
| Marat Dukhan | 3220551 | 2021-12-29 14:26:50 -0800 | [diff] [blame] | 12866 | "features": "wasm_simd", |
| Marat Dukhan | 08c4a43 | 2019-10-03 09:29:21 -0700 | [diff] [blame] | 12867 | }, |
| 12868 | ) |
| 12869 | |
| 12870 | config_setting( |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 12871 | name = "emscripten_wasmrelaxedsimd", |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12872 | values = { |
| Marat Dukhan | 19bfefe | 2021-12-21 19:16:06 -0800 | [diff] [blame] | 12873 | "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12874 | "cpu": "wasm", |
| Marat Dukhan | 3220551 | 2021-12-29 14:26:50 -0800 | [diff] [blame] | 12875 | "features": "wasm_simd", |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12876 | "copt": "-mrelaxed-simd", |
| Marat Dukhan | 3220551 | 2021-12-29 14:26:50 -0800 | [diff] [blame] | 12877 | "linkopt": "-mrelaxed-simd", |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12878 | }, |
| 12879 | ) |
| 12880 | |
| 12881 | config_setting( |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12882 | name = "ios_armv7", |
| 12883 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12884 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12885 | "cpu": "ios_armv7", |
| 12886 | }, |
| 12887 | ) |
| 12888 | |
| 12889 | config_setting( |
| 12890 | name = "ios_arm64", |
| 12891 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12892 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12893 | "cpu": "ios_arm64", |
| 12894 | }, |
| 12895 | ) |
| 12896 | |
| 12897 | config_setting( |
| 12898 | name = "ios_arm64e", |
| 12899 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12900 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12901 | "cpu": "ios_arm64e", |
| 12902 | }, |
| 12903 | ) |
| 12904 | |
| 12905 | config_setting( |
| 12906 | name = "ios_x86", |
| 12907 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12908 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12909 | "cpu": "ios_i386", |
| 12910 | }, |
| 12911 | ) |
| 12912 | |
| 12913 | config_setting( |
| 12914 | name = "ios_x86_64", |
| 12915 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12916 | "apple_platform_type": "ios", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12917 | "cpu": "ios_x86_64", |
| 12918 | }, |
| 12919 | ) |
| 12920 | |
| 12921 | config_setting( |
| 12922 | name = "watchos_armv7k", |
| 12923 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12924 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12925 | "cpu": "watchos_armv7k", |
| 12926 | }, |
| 12927 | ) |
| 12928 | |
| 12929 | config_setting( |
| 12930 | name = "watchos_arm64_32", |
| 12931 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12932 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12933 | "cpu": "watchos_arm64_32", |
| 12934 | }, |
| 12935 | ) |
| 12936 | |
| 12937 | config_setting( |
| 12938 | name = "watchos_x86", |
| 12939 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12940 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12941 | "cpu": "watchos_i386", |
| 12942 | }, |
| 12943 | ) |
| 12944 | |
| 12945 | config_setting( |
| 12946 | name = "watchos_x86_64", |
| 12947 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12948 | "apple_platform_type": "watchos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12949 | "cpu": "watchos_x86_64", |
| 12950 | }, |
| 12951 | ) |
| 12952 | |
| 12953 | config_setting( |
| 12954 | name = "tvos_arm64", |
| 12955 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12956 | "apple_platform_type": "tvos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12957 | "cpu": "tvos_arm64", |
| 12958 | }, |
| 12959 | ) |
| 12960 | |
| 12961 | config_setting( |
| 12962 | name = "tvos_x86_64", |
| 12963 | values = { |
| Marat Dukhan | f85fc33 | 2020-02-13 00:05:20 -0800 | [diff] [blame] | 12964 | "apple_platform_type": "tvos", |
| Marat Dukhan | 1498d1d | 2020-02-11 20:00:05 -0800 | [diff] [blame] | 12965 | "cpu": "tvos_x86_64", |
| 12966 | }, |
| 12967 | ) |